1: /* 2: * Memory special file 3: * minor device 0 is physical memory 4: * minor device 1 is kernel memory 5: * minor device 2 is EOF/RATHOLE 6: */ 7: 8: #include "param.h" 9: #include <sys/dir.h> 10: #include <sys/user.h> 11: #include <sys/conf.h> 12: #include <sys/seg.h> 13: 14: /* 15: * SCCS id @(#)mem.c 2.1 (Berkeley) 8/5/83 16: */ 17: 18: 19: mmread(dev) 20: dev_t dev; 21: { 22: register c, bn, on; 23: int a, d; 24: 25: if(minor(dev) == 2) 26: return; 27: on = u.u_count; 28: if (minor(dev)==1 && u.u_segflg==0 && 29: ((u.u_offset | u.u_base | on) & 01) == 0) { 30: c = copyout((caddr_t)u.u_offset, u.u_base, on); 31: if (c) { 32: u.u_error = EFAULT; 33: return; 34: } 35: u.u_base += on; 36: u.u_offset += on; 37: u.u_count -= on; 38: return; 39: } 40: do { 41: bn = u.u_offset >> 6; 42: on = u.u_offset & 077; 43: a = UISA[0]; 44: d = UISD[0]; 45: UISA[0] = bn; 46: UISD[0] = RO; /* one click, read only */ 47: if(minor(dev) == 1) 48: UISA[0] = ((physadr) ka6-6)->r[(bn>>7)&07] + (bn&0177); 49: if ((c = fuibyte((caddr_t)on)) < 0) 50: u.u_error = ENXIO; 51: UISA[0] = a; 52: UISD[0] = d; 53: } while(u.u_error==0 && passc(c)>=0); 54: } 55: 56: mmwrite(dev) 57: dev_t dev; 58: { 59: register c, bn, on; 60: int a, d; 61: 62: if(minor(dev) == 2) { 63: u.u_count = 0; 64: return; 65: } 66: for(;;) { 67: bn = u.u_offset >> 6; 68: on = u.u_offset & 077; 69: if ((c=cpass())<0 || u.u_error!=0) 70: break; 71: a = UISA[0]; 72: d = UISD[0]; 73: UISA[0] = bn; 74: UISD[0] = RW; /* one click, read/write */ 75: if(minor(dev) == 1) 76: UISA[0] = ((physadr) ka6-6)->r[(bn>>7)&07] + (bn&0177); 77: if (suibyte((caddr_t)on, c) < 0) 78: u.u_error = ENXIO; 79: UISA[0] = a; 80: UISD[0] = d; 81: } 82: } 83: #ifdef UCB_ECC 84: /* 85: * Internal versions of mmread(), mmwrite() 86: * used by disk driver ecc routines. 87: */ 88: 89: int 90: getmemc(addr) 91: long addr; 92: { 93: unsigned int bn, on; 94: register a, d, s; 95: int c; 96: 97: bn = addr >> 6; 98: on = addr & 077; 99: a = UISA[0]; 100: d = UISD[0]; 101: UISA[0] = bn; 102: UISD[0] = RO; /* one click, read only */ 103: c = fuibyte((caddr_t)on); 104: UISA[0] = a; 105: UISD[0] = d; 106: return(c); 107: } 108: 109: putmemc(addr,contents) 110: long addr; 111: int contents; 112: { 113: unsigned int bn, on; 114: register a, d, s; 115: 116: bn = addr >> 6; 117: on = addr & 077; 118: a = UISA[0]; 119: d = UISD[0]; 120: UISA[0] = bn; 121: UISD[0] = RW; /* one click, read/write */ 122: suibyte((caddr_t)on, contents); 123: UISA[0] = a; 124: UISD[0] = d; 125: } 126: #endif