1: /*
2: * Copyright (c) 1982, 1986 Regents of the University of California.
3: * All rights reserved. The Berkeley software License Agreement
4: * specifies the terms and conditions for redistribution.
5: *
6: * @(#)autoconf.c 7.1 (Berkeley) 6/5/86
7: */
8:
9: #include "../machine/pte.h"
10:
11: #include "../h/param.h"
12:
13: #include "../vax/cpu.h"
14: #include "../vax/nexus.h"
15: #include "../vaxuba/ubareg.h"
16: #include "../vaxmba/mbareg.h"
17: #include "../vax/mtpr.h"
18:
19: #include "savax.h"
20:
21: #define UTR(i) ((struct uba_regs *)(NEX780+(i)))
22: #define UMA(i) ((caddr_t)UMEM780(i))
23: #define MTR(i) ((struct mba_regs *)(NEX780+(i)))
24:
25: struct uba_regs *ubaddr780[] = { UTR(3), UTR(4), UTR(5), UTR(6) };
26: caddr_t umaddr780[] = { UMA(0), UMA(1), UMA(2), UMA(3) };
27: struct mba_regs *mbaddr780[] = { MTR(8), MTR(9), MTR(10), MTR(11) };
28:
29: #undef UTR
30: #undef UMA
31: #undef MTR
32:
33: #define UTR(i) ((struct uba_regs *)(NEX750+(i)))
34: #define UMA(i) ((caddr_t)UMEM750(i))
35: #define MTR(i) ((struct mba_regs *)(NEX750+(i)))
36:
37: struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) };
38: caddr_t umaddr750[] = { UMA(0), UMA(1) };
39: struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) };
40:
41: #undef UTR
42: #undef UMA
43: #undef MTR
44:
45: #define UTR(i) ((struct uba_regs *)(NEX730+(i)))
46: #define UMA ((caddr_t)UMEM730)
47:
48: struct uba_regs *ubaddr730[] = { UTR(3) };
49: caddr_t umaddr730[] = { UMA };
50:
51: #undef UTR
52: #undef UMA
53:
54: configure()
55: {
56: union cpusid cpusid;
57: int nmba, nuba, i;
58:
59: cpusid.cpusid = mfpr(SID);
60: cpu = cpusid.cpuany.cp_type;
61: switch (cpu) {
62:
63: case VAX_8600:
64: case VAX_780:
65: mbaddr = mbaddr780;
66: ubaddr = ubaddr780;
67: umaddr = umaddr780;
68: nmba = sizeof (mbaddr780) / sizeof (mbaddr780[0]);
69: nuba = sizeof (ubaddr780) / sizeof (ubaddr780[0]);
70: break;
71:
72: case VAX_750:
73: mbaddr = mbaddr750;
74: ubaddr = ubaddr750;
75: umaddr = umaddr750;
76: nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]);
77: nuba = 0;
78: break;
79:
80: case VAX_730:
81: ubaddr = ubaddr730;
82: umaddr = umaddr730;
83: nmba = nuba = 0;
84: break;
85: }
86: /*
87: * Forward into the past...
88: */
89: /*
90: for (i = 0; i < nmba; i++)
91: if (!badloc(mbaddr[i]))
92: mbaddr[i]->mba_cr = MBCR_INIT;
93: */
94: for (i = 0; i < nuba; i++)
95: if (!badloc(ubaddr[i]))
96: ubaddr[i]->uba_cr = UBACR_ADINIT;
97: if ((cpu != VAX_780) && (cpu != VAX_8600))
98: mtpr(IUR, 0);
99: /* give unibus devices a chance to recover... */
100: if (nuba > 0)
101: DELAY(2000000);
102: }
Defined functions
Defined variables
Defined macros
MTR
defined in line
35; used 10 times
UMA
defined in line
46; used 10 times
UTR
defined in line
45; used 10 times