1: /* 2: * @(#)ka630.h 7.1 (Berkeley) 6/5/86 3: * 4: * Definitions specific to the ka630 uvax2 cpu card. Includes the tod 5: * clock chip and the cpu registers. 6: */ 7: #ifdef VAX630 8: /* Bdr register bits */ 9: #define KA630BDR_PWROK 0x8000 10: #define KA630BDR_HLTENB 0x4000 11: #define KA630BDR_CPU 0x0c00 12: #define KA630BDR_BDG 0x0300 13: #define KA630BDR_DSPL 0x000f 14: 15: /* Memory system err reg. */ 16: #define KA630MSER_CD 0x00000300 17: #define KA630MSER_NXM 0x00000080 18: #define KA630MSER_LPE 0x00000040 19: #define KA630MSER_QPE 0x00000020 20: #define KA630MSER_MERR 0x000000f0 21: #define KA630MSER_CPUER 0x00000060 22: #define KA630MSER_DQPE 0x00000010 23: #define KA630MSER_LEB 0x00000008 24: #define KA630MSER_WRWP 0x00000002 25: #define KA630MSER_PAREN 0x00000001 26: 27: /* Mem. error address regs. */ 28: #define KA630CEAR_PG 0x00007fff 29: #define KA630DEAR_PG 0x00007fff 30: 31: /* Clock registers and constants */ 32: #define MINSEC 60 33: #define HRSEC 3600 34: 35: #define KA630CLK_VRT 0200 36: #define KA630CLK_UIP 0200 37: #define KA630CLK_RATE 040 38: #define KA630CLK_ENABLE 06 39: #define KA630CLK_SET 0206 40: /* cpmbx bits */ 41: #define KA630CLK_HLTACT 03 42: /* halt action values */ 43: #define KA630CLK_RESTRT 01 44: #define KA630CLK_REBOOT 02 45: #define KA630CLK_HALT 03 46: /* in progress flags */ 47: #define KA630CLK_BOOT 04 48: #define KA630CLK_RSTRT 010 49: #define KA630CLK_LANG 0360 50: 51: #ifndef LOCORE 52: struct cldevice { 53: u_short sec; 54: u_short secalrm; 55: u_short min; 56: u_short minalrm; 57: u_short hr; 58: u_short hralrm; 59: u_short dayofwk; 60: u_short day; 61: u_short mon; 62: u_short yr; 63: u_short csr0; 64: u_short csr1; 65: u_short csr2; 66: u_short csr3; 67: u_short cpmbx; /* CPMBX is used by the boot rom. see ka630-ug-3.3.3 */ 68: }; 69: 70: struct ka630cpu { 71: u_short ka630_bdr; 72: u_short ka630_xxx; 73: u_long ka630_mser; 74: u_long ka630_cear; 75: u_long ka630_dear; 76: }; 77: #endif 78: #endif