1: / fp3 -- floating simulation 2: 3: i.addx: 4: jsr pc,setab 5: br 1f 6: 7: i.subx: 8: jsr pc,setab 9: neg bsign 10: 1: 11: tst bsign 12: beq reta 13: tst asign 14: beq retb 15: mov areg+8,r1 16: sub breg+8,r1 17: blt 1f 18: beq 2f 19: cmp r1,$56. 20: bge reta 21: mov $breg,r0 22: br 4f 23: 1: 24: neg r1 25: cmp r1,$56. 26: bge retb 27: mov $areg,r0 28: 4: 29: mov r1,-(sp) 30: mov (r0)+,r1 31: mov (r0)+,r2 32: mov (r0)+,r3 33: mov (r0)+,r4 34: add (sp),(r0) 35: 1: 36: clc 37: ror r1 38: ror r2 39: ror r3 40: ror r4 41: dec (sp) 42: bgt 1b 43: mov r4,-(r0) 44: mov r3,-(r0) 45: mov r2,-(r0) 46: mov r1,-(r0) 47: tst (sp)+ 48: 2: 49: mov $areg+8,r1 50: mov $breg+8,r2 51: mov $4,r0 52: cmp asign,bsign 53: bne 4f 54: clc 55: 1: 56: adc -(r1) 57: bcs 3f 58: add -(r2),(r1) 59: 2: 60: dec r0 61: bne 1b 62: br 5f 63: 3: 64: add -(r2),(r1) 65: sec 66: br 2b 67: br 5f 68: 4: 69: clc 70: 1: 71: sbc -(r1) 72: bcs 3f 73: sub -(r2),(r1) 74: 2: 75: dec r0 76: bne 1b 77: br 5f 78: 3: 79: sub -(r2),(r1) 80: sec 81: br 2b 82: 83: saret: 84: mov $areg,r1 85: 5: 86: tst (r1) 87: bge 3f 88: mov $areg+8,r1 89: mov $4,r0 90: clc 91: 1: 92: adc -(r1) 93: bcs 2f 94: neg (r1) 95: 2: 96: dec r0 97: bne 1b 98: neg -(r1) 99: 3: 100: jsr pc,norm 101: br reta 102: 103: retb: 104: mov $bsign,r1 105: mov $asign,r2 106: mov $6,r0 107: 1: 108: mov (r1)+,(r2)+ 109: dec r0 110: bne 1b 111: 112: reta: 113: mov r5,r2 114: mov $asign,r0 115: tst (r0) 116: beq unflo 117: mov aexp,r1 118: cmp r1,$177 119: bgt ovflo 120: cmp r1,$-177 121: blt unflo 122: add $200,r1 123: swab r1 124: clc 125: ror r1 126: tst (r0)+ 127: bge 1f 128: bis $100000,r1 129: 1: 130: bic $!177,(r0) 131: bis (r0)+,r1 132: mov r1,(r2)+ 133: mov (r0)+,(r2)+ 134: bit $m.ext,fpsr 135: beq 1f 136: mov (r0)+,(r2)+ 137: mov (r0)+,(r2)+ 138: 1: 139: rts pc 140: 141: unflo: 142: clr (r2)+ 143: clr (r2)+ 144: bit $m.ext,fpsr 145: beq 1f 146: clr (r2)+ 147: clr (r2)+ 148: 1: 149: rts pc 150: 151: ovflo: 152: bis $2,fpsr / set v-bit (overflow) 153: jmp ret 154: 155: i.mulx: 156: jsr pc,i.mul 157: br saret 158: 159: i.modx: 160: jsr pc,i.mul 161: jsr pc,norm 162: mov $asign,r0 163: mov $bsign,r1 164: mov $6,r2 165: 1: 166: mov (r0)+,(r1)+ 167: dec r2 168: bne 1b 169: clr r0 / count 170: mov $200,r1 / bit 171: clr r2 / reg offset 172: 1: 173: cmp r0,aexp 174: bge 2f / in fraction 175: bic r1,areg(r2) 176: br 3f 177: 2: 178: bic r1,breg(r2) 179: 3: 180: inc r0 181: clc 182: ror r1 183: bne 1b 184: mov $100000,r1 185: add $2,r2 186: cmp r2,$8 187: blt 1b 188: jsr pc,norm 189: jsr pc,reta 190: cmp r5,$ac1 191: beq 1f 192: cmp r5,$ac3 193: beq 1f 194: bit $200,breg 195: bne 2f 196: clr bsign 197: 2: 198: add $8,r5 199: jsr pc,retb 200: sub $8,r5 201: 1: 202: rts pc 203: 204: i.divx: 205: jsr pc,setab 206: tst bsign 207: beq ovflo 208: sub bexp,aexp 209: jsr pc,xorsign 210: mov r5,-(sp) 211: mov $areg,r0 212: mov (r0),r1 213: clr (r0)+ 214: mov (r0),r2 215: clr (r0)+ 216: mov (r0),r3 217: clr (r0)+ 218: mov (r0),r4 219: clr (r0)+ 220: mov $areg,r5 221: mov $400,-(sp) 222: 1: 223: mov $breg,r0 224: cmp (r0)+,r1 225: blt 2f 226: bgt 3f 227: cmp (r0)+,r2 228: blo 2f 229: bhi 3f 230: cmp (r0)+,r3 231: blo 2f 232: bhi 3f 233: cmp (r0)+,r4 234: bhi 3f 235: 2: 236: mov $breg,r0 237: sub (r0)+,r1 238: clr -(sp) 239: sub (r0)+,r2 240: adc (sp) 241: clr -(sp) 242: sub (r0)+,r3 243: adc (sp) 244: sub (r0)+,r4 245: sbc r3 246: adc (sp) 247: sub (sp)+,r2 248: adc (sp) 249: sub (sp)+,r1 250: bis (sp),(r5) 251: 3: 252: asl r4 253: rol r3 254: rol r2 255: rol r1 256: clc 257: ror (sp) 258: bne 1b 259: mov $100000,(sp) 260: add $2,r5 261: cmp r5,$areg+8 262: blo 1b 263: tst (sp)+ 264: mov (sp)+,r5 265: jmp saret 266: 267: 268: i.mul: 269: jsr pc,setab 270: add bexp,aexp 271: dec aexp 272: jsr pc,xorsign 273: mov r5,-(sp) 274: mov $breg+4,r5 275: bit $m.ext,fpsr 276: beq 1f 277: add $4,r5 278: 1: 279: clr r0 280: clr r1 281: clr r2 282: clr r3 283: clr r4 284: 1: 285: asl r0 286: bne 2f 287: inc r0 288: tst -(r5) 289: 2: 290: cmp r0,$400 291: bne 2f 292: cmp r5,$breg 293: bhi 2f 294: mov $areg,r0 295: mov r1,(r0)+ 296: mov r2,(r0)+ 297: mov r3,(r0)+ 298: mov r4,(r0)+ 299: mov (sp)+,r5 300: rts pc 301: 2: 302: clc 303: ror r1 304: ror r2 305: ror r3 306: ror r4 307: bit r0,(r5) 308: beq 1b 309: mov r0,-(sp) 310: mov $areg,r0 311: add (r0)+,r1 312: clr -(sp) 313: add (r0)+,r2 314: adc (sp) 315: clr -(sp) 316: add (r0)+,r3 317: adc (sp) 318: add (r0)+,r4 319: adc r3 320: adc (sp) 321: add (sp)+,r2 322: adc (sp) 323: add (sp)+,r1 324: mov (sp)+,r0 325: br 1b 326: 327: xorsign: 328: cmp asign,bsign 329: beq 1f 330: mov $-1,asign 331: rts pc 332: 1: 333: mov $1,asign 334: rts pc