J E S 2 J O B L O G 10.11.32 JOB 4 IEF677I WARNING MESSAGE(S) FOR JOB PERF#ASM ISSUED 10.11.32 JOB 4 $HASP373 PERF#ASM STARTED - INIT 6 - CLASS C - SYS TK4- 10.11.32 JOB 4 IEF403I PERF#ASM - STARTED - TIME=10.11.32 10.11.36 JOB 4 IEFACTRT - Stepname Procstep Program Retcode 10.11.36 JOB 4 PERF#ASM CLG ASM IFOX00 RC= 0000 10.11.36 JOB 4 PERF#ASM CLG LKED IEWL RC= 0000 10.11.38 JOB 4 PERF#ASM CLG GO PGM=*.DD RC= 0000 10.11.38 JOB 4 IEF404I PERF#ASM - ENDED - TIME=10.11.38 10.11.38 JOB 4 $HASP395 PERF#ASM ENDED ------ JES2 JOB STATISTICS ------ 05 JAN 19 JOB EXECUTION DATE 6,837 CARDS READ 41,146 SYSOUT PRINT RECORDS 0 SYSOUT PUNCH RECORDS 0.09 MINUTES EXECUTION TIME 1 //PERF#ASM JOB 'S322-0C4','WFJM', JOB 4 // CLASS=C,MSGCLASS=A,MSGLEVEL=(1,1), // REGION=2500K,TIME=(2,0),PRTY=8 2 //CLG EXEC ASMFCLG, // MAC1='SYS2.MACLIB', // MAC2='SYS1.AMODGEN', // MAC3='SYS1.MACLIB', // PARM.ASM='NOXREF,NORLD,NODECK,LOAD,BUFSIZE(MAX)', // PARM.LKED='MAP,LIST,LET,NCAL,SIZE=(512000,122880)', // COND.LKED=(8,LE,ASM), // PARM.GO='/G001/OPTT', // COND.GO=((8,LE,ASM),(4,LT,LKED)) 3 XXASMFCLG PROC MAC='SYS1.MACLIB',MAC1='SYS1.MACLIB', 00000100 XX MAC2='SYS1.MACLIB',MAC3='SYS1.MACLIB',SOUT='*' 00000200 4 XXASM EXEC PGM=IFOX00,PARM=OBJ,REGION=128K 00000300 5 XXSYSLIB DD DSN=&MAC,DISP=SHR 00000400 6 XX DD DSN=&MAC1,DISP=SHR 00000500 7 XX DD DSN=&MAC2,DISP=SHR 00000600 8 XX DD DSN=&MAC3,DISP=SHR 00000700 9 //ASM.SYSUT1 DD DSN=&&SYSUT1,UNIT=SYSDA,SPACE=(1700,(600,100)) X/SYSUT1 DD DSN=&&SYSUT1,UNIT=SYSSQ,SPACE=(1700,(600,100)), 00000800 XX SEP=(SYSLIB) 00000900 10 //ASM.SYSUT2 DD DSN=&&SYSUT2,UNIT=SYSDA,SPACE=(1700,(900,200)) X/SYSUT2 DD DSN=&&SYSUT2,UNIT=SYSSQ,SPACE=(1700,(300,50)), 00001000 XX SEP=(SYSLIB,SYSUT1) 00001100 11 //ASM.SYSUT3 DD DSN=&&SYSUT3,UNIT=SYSDA,SPACE=(1700,(900,200)) X/SYSUT3 DD DSN=&&SYSUT3,UNIT=SYSSQ,SPACE=(1700,(300,50)) 00001200 12 XXSYSPRINT DD SYSOUT=&SOUT,DCB=BLKSIZE=1089 00001300 13 XXSYSPUNCH DD SYSOUT=B 00001400 14 //ASM.SYSGO DD DSN=&&OBJSET,UNIT=SYSDA,SPACE=(80,(2000,500)) X/SYSGO DD DSN=&&OBJSET,UNIT=SYSSQ,SPACE=(80,(200,50)), 00001500 XX DISP=(MOD,PASS) 00001600 15 //ASM.SYSIN DD * 16 XXLKED EXEC PGM=IEWL,PARM=(XREF,LET,LIST,NCAL),REGION=128K, 00001700 XX COND=(8,LT,ASM) 00001800 17 XXSYSLIN DD DSN=&&OBJSET,DISP=(OLD,DELETE) 00001900 18 XX DD DDNAME=SYSIN 00002000 19 XXSYSLMOD DD DSN=&&GOSET(GO),UNIT=SYSDA,SPACE=(1024,(50,20,1)), 00002100 XX DISP=(MOD,PASS) 00002200 20 XXSYSUT1 DD DSN=&&SYSUT1,UNIT=(SYSDA,SEP=(SYSLIN,SYSLMOD)), 00002300 XX SPACE=(1024,(50,20)) 00002400 21 XXSYSPRINT DD SYSOUT=&SOUT 00002500 22 XXGO EXEC PGM=*.LKED.SYSLMOD,COND=((8,LT,ASM),(4,LT,LKED)) 00002600 23 //GO.SYSUDUMP DD SYSOUT=*,OUTLIM=2000 24 //GO.SYSPRINT DD SYSOUT=*,OUTLIM=5000 25 //GO.SYSIN DD * // STMT NO. MESSAGE - 5 IEF653I SUBSTITUTION JCL - DSN=SYS1.MACLIB,DISP=SHR 6 IEF653I SUBSTITUTION JCL - DSN=SYS2.MACLIB,DISP=SHR 7 IEF653I SUBSTITUTION JCL - DSN=SYS1.AMODGEN,DISP=SHR 8 IEF653I SUBSTITUTION JCL - DSN=SYS1.MACLIB,DISP=SHR 12 IEF653I SUBSTITUTION JCL - SYSOUT=*,DCB=BLKSIZE=1089 21 IEF653I SUBSTITUTION JCL - SYSOUT=* 22 IEF686I DDNAME REFERRED TO ON DDNAME KEYWORD IN PRIOR STEP WAS NOT RESOLVED IEF236I ALLOC. FOR PERF#ASM ASM CLG IEF237I 148 ALLOCATED TO SYSLIB IEF237I 148 ALLOCATED TO IEF237I 248 ALLOCATED TO IEF237I 148 ALLOCATED TO IEF237I 190 ALLOCATED TO SYSUT1 IEF237I 170 ALLOCATED TO SYSUT2 IEF237I 180 ALLOCATED TO SYSUT3 IEF237I JES2 ALLOCATED TO SYSPRINT IEF237I JES2 ALLOCATED TO SYSPUNCH IEF237I 140 ALLOCATED TO SYSGO IEF237I JES2 ALLOCATED TO SYSIN IEF142I PERF#ASM ASM CLG - STEP WAS EXECUTED - COND CODE 0000 IEF285I SYS1.MACLIB KEPT *-------44 IEF285I VOL SER NOS= MVSRES. IEF285I SYS2.MACLIB KEPT *--------0 IEF285I VOL SER NOS= MVSRES. IEF285I SYS1.AMODGEN KEPT *--------0 IEF285I VOL SER NOS= MVSDLB. IEF285I SYS1.MACLIB KEPT *--------0 IEF285I VOL SER NOS= MVSRES. IEF285I SYS19005.T101132.RA000.PERF#ASM.SYSUT1 DELETED *----3,890 IEF285I VOL SER NOS= WORK03. IEF285I SYS19005.T101132.RA000.PERF#ASM.SYSUT2 DELETED *------135 IEF285I VOL SER NOS= WORK01. IEF285I SYS19005.T101132.RA000.PERF#ASM.SYSUT3 DELETED *------198 IEF285I VOL SER NOS= WORK02. IEF285I JES2.JOB00004.SO0103 SYSOUT IEF285I JES2.JOB00004.SO0104 SYSOUT IEF285I SYS19005.T101132.RA000.PERF#ASM.OBJSET PASSED *----3,580 IEF285I VOL SER NOS= WORK00. IEF285I JES2.JOB00004.SI0101 SYSIN IEF373I STEP /ASM / START 19005.1011 IEF374I STEP /ASM / STOP 19005.1011 CPU 0MIN 02.64SEC SRB 0MIN 00.37SEC VIRT 2108K SYS 216K ************************************************************************************************************************************ * 1. Jobstep of job: PERF#ASM Stepname: ASM Program name: IFOX00 Executed on 05.01.19 from 10.11.32 to 10.11.36 * * elapsed time 00:00:03,59 CPU-Identifier: TK4- Page-in: 0 * * CPU time 00:00:03,01 Virtual Storage used: 2108K Page-out: 0 * * corr. CPU: 00:00:03,01 CPU time has been corrected by 1 / 1,0 multiplier * * * * I/O Operation * * Number of records read via DD * or DD DATA: 6814 * * 148......44 148.......0 248.......0 148.......0 190....3890 170.....135 180.....198 DMY.......0 DMY.......0 140....3580 * * DMY.......0 * * * * Charge for step (w/o SYSOUT): 5,01 * ************************************************************************************************************************************ IEF236I ALLOC. FOR PERF#ASM LKED CLG IEF237I 140 ALLOCATED TO SYSLIN IEF237I DMY ALLOCATED TO IEF237I 180 ALLOCATED TO SYSLMOD IEF237I 190 ALLOCATED TO SYSUT1 IEF237I JES2 ALLOCATED TO SYSPRINT IEF142I PERF#ASM LKED CLG - STEP WAS EXECUTED - COND CODE 0000 IEF285I SYS19005.T101132.RA000.PERF#ASM.OBJSET DELETED *----3,581 IEF285I VOL SER NOS= WORK00. IEF285I SYS19005.T101132.RA000.PERF#ASM.GOSET PASSED *-------50 IEF285I VOL SER NOS= WORK02. IEF285I SYS19005.T101132.RA000.PERF#ASM.SYSUT1 DELETED *----1,640 IEF285I VOL SER NOS= WORK03. IEF285I JES2.JOB00004.SO0105 SYSOUT IEF373I STEP /LKED / START 19005.1011 IEF374I STEP /LKED / STOP 19005.1011 CPU 0MIN 00.46SEC SRB 0MIN 00.17SEC VIRT 504K SYS 212K ************************************************************************************************************************************ * 2. Jobstep of job: PERF#ASM Stepname: LKED Program name: IEWL Executed on 05.01.19 from 10.11.36 to 10.11.36 * * elapsed time 00:00:00,76 CPU-Identifier: TK4- Page-in: 0 * * CPU time 00:00:00,63 Virtual Storage used: 504K Page-out: 0 * * corr. CPU: 00:00:00,63 CPU time has been corrected by 1 / 1,0 multiplier * * * * I/O Operation * * Number of records read via DD * or DD DATA: 0 * * 140....3581 DMY.......0 180......50 190....1640 DMY.......0 * * * * Charge for step (w/o SYSOUT): 1,05 * ************************************************************************************************************************************ IEF236I ALLOC. FOR PERF#ASM GO CLG IEF237I 180 ALLOCATED TO PGM=*.DD IEF237I JES2 ALLOCATED TO SYSUDUMP IEF237I JES2 ALLOCATED TO SYSPRINT IEF237I JES2 ALLOCATED TO SYSIN IEF142I PERF#ASM GO CLG - STEP WAS EXECUTED - COND CODE 0000 IEF285I SYS19005.T101132.RA000.PERF#ASM.GOSET KEPT *--------0 IEF285I VOL SER NOS= WORK02. IEF285I JES2.JOB00004.SO0106 SYSOUT IEF285I JES2.JOB00004.SO0107 SYSOUT IEF285I JES2.JOB00004.SI0102 SYSIN IEF373I STEP /GO / START 19005.1011 IEF374I STEP /GO / STOP 19005.1011 CPU 0MIN 01.18SEC SRB 0MIN 00.00SEC VIRT 120K SYS 212K ************************************************************************************************************************************ * 3. Jobstep of job: PERF#ASM Stepname: GO Program name: PGM=*.DD Executed on 05.01.19 from 10.11.36 to 10.11.38 * * elapsed time 00:00:01,19 CPU-Identifier: TK4- Page-in: 0 * * CPU time 00:00:01,18 Virtual Storage used: 120K Page-out: 0 * * corr. CPU: 00:00:01,18 CPU time has been corrected by 1 / 1,0 multiplier * * * * I/O Operation * * Number of records read via DD * or DD DATA: 0 * * 180.......0 DMY.......0 DMY.......0 DMY.......0 * * * * Charge for step (w/o SYSOUT): 1,96 * ************************************************************************************************************************************ IEF237I 180 ALLOCATED TO SYS00001 IEF285I SYS19005.T101138.RA000.PERF#ASM.R0000001 KEPT *--------0 IEF285I VOL SER NOS= WORK02. IEF285I SYS19005.T101132.RA000.PERF#ASM.GOSET DELETED IEF285I VOL SER NOS= WORK02. IEF375I JOB /PERF#ASM/ START 19005.1011 IEF376I JOB /PERF#ASM/ STOP 19005.1011 CPU 0MIN 04.28SEC SRB 0MIN 00.54SEC EXTERNAL SYMBOL DICTIONARY PAGE 1 SYMBOL TYPE ID ADDR LENGTH LDID ASM 0201 10.11 01/05/19 MAIN SD 0001 000000 000DEE TEXT SD 0002 000DF0 0013DB SIOSDATA SD 0003 0021D0 000198 DATA SD 0004 002368 000180 TDSCDAT SD 0005 0024E8 0024DC TDSCTBL SD 0006 0049C8 00049C TCODE SD 0007 004E68 0131DC T330CS SD 0008 018048 000068 T702CS SD 0009 0180B0 000040 PAGE 2 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 1 * 1 2 3 4 5 6 71 2 *23456789*12345*789012345678901234*678901234567890123456789012345678901 3 * $Id: s370_perf.asm 1034 2018-07-15 16:15:10Z mueller $ 4 * 5 * Copyright 2017-2018 by Walter F.J. Mueller 6 * 7 * This program is free software; you may redistribute and/or modify 8 * it under the terms of the GNU General Public License version 3. 9 * See Licence.txt in distribition directory for further details. 10 * 11 * Revision History: (!! update MSGVERS when adding here !!) 12 * Date Rev Version Comment 13 * 2018-05-27 1026 0.9.8 DISBAS substitutable via var SET_DISBAS 14 * 2018-03-30 1003 0.9.7 add and use more ltype codes; add /TCOR 15 * tune T510-T513,T540-T543,T560;fix T551,T553 16 * 2018-03-24 1001 0.9.6 use REPINSN instead of REPINS5 and REPINS2 17 * renames, add T150,T152,T153,T205-T209 18 * add T304,T305,T422,T423,T426,T427 19 * add T512,T513,T542,T543 20 * 2018-03-04 998 0.9.5 add T9**,T703; fix T232 text 21 * 2018-03-03 997 0.9.4 reorganize PARM decode; add /OPCF 22 * 2018-02-25 995 0.9.3 use R11,R12 as base to allow 8k main code 23 * add SETB DISBAS to disable BAS/BASR tests 24 * add /Cxxx, sets GMUL test; /T*** wildcards 25 * add config file handling; use sios path 26 * 2018-02-10 993 0.9.2 add STCK time to PERF003/PERF004 messages 27 * add PERF000 vers info; add warmup T102 run 28 * 2018-01-06 986 0.9.1 rename to s370_perf 29 * 2017-12-16 970 0.9 add /Dxxx and /Exxx params; 8k code support 30 * use 4k buffer for MVCL,CLCL; test renames 31 * add T284-T285,T303,T701,T702,T211,T212,T216 32 * add T116-T117,T191-T192,T156-T158,T161-T162 33 * add T165-T166,T450-T451,T507,T527 34 * 2017-12-10 969 0.8 add ltype flag in TDSC; new output format 35 * use BCTR loop closure; code test D aligned 36 * add REPINS2,REPINS5,REPINSPI,REPINSAL 37 * add T252-T254,T255-T259,T274-T277,T280-T283 38 * add T290-292,T324-T325,T415,T440-T443 39 * add T445-T446,T504-506,T524-526,T295-297 40 * add T620-T621 41 * 2017-12-03 968 0.71 renames, add T310,321,323,238,239,700 42 * 2017-12-02 967 0.7 use relocation by default, add /ORIP 43 * add /OPTT, page aligned 16k bufs 44 * 2017-11-26 966 0.6 add /OTGA /GAUT and T114,T601 45 * 2017-11-12 961 0.5 Initial version 46 * 2017-10-15 956 0.1 First draft 47 * 48 * Description: 49 * Code to determine instruction timing of S/370 non-priviledged 50 * instructions in 24 bit mode. 51 * 52 * Usage: 53 * s370_perf uses the PARM interface to determine job behaviour. The 54 * PARM string is a list of 4 letter options, each starting with a /. 55 * Valid options are: PAGE 3 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 56 * /OWTO enable step by step MVS console messages 57 * /ODBG enable debug trace output for test steps 58 * /OTGA enable debug trace output for /GAUT processing 59 * /OPCF print config file 60 * /OPTT print test table 61 * /ORIP run tests in place (default is relocate) 62 * /GAUT automatic determination of GMUL, aim is 1 sec per test 63 * /Gnnn set GMUL to nnn 64 * /GnnK set GMUL to nn * 1000 65 * /Cnnn use test Tnnn for GMUL calibration (default is C102) 66 * /Ennn enable test Tnnn (n can be digit or '*' wildcard) 67 * /Dnnn disable test Tnnn (dito) 68 * /Tnnn select test Tnnn (dito) 69 * /TCOR select all tests required for loop overhead correction 70 * 71 * Notes on option usage: 72 * 1. GMUL default and start value is 1 73 * 2. if multiple /Gnnn or /GnnK are given the last one is taken 74 * 3. /GAUT will overwrite any previous /Gnnn, but use prior /Gnnn as 75 * start value in the search for GMUL leading to 1 sec test time 76 * 4. if no /Tnnn option is seen all pre-enabled tests are executed 77 * 5. several /Tnnn options can be specified, in this case only these 78 * tests are run 79 * 6. /Dnnn allows to disable an enabled test 80 * 7. /Ennn allows to enable a disabled test 81 * 82 * Configuration file: 83 * read from SYSIN, is optional. Line starting with '#' are ignored 84 * all other lines must have the format 85 * Tnnn e lrcnt 86 * with 87 * Tnnn test name 88 * e enable flag, 0 or 1 (with 4 spaces in front) 89 * lrcnt new LRCNT, 10 digit field, ignored if zero 90 * Main usage of the config file is to redefine the LRCNT of test 91 * when s370_perf is run on systems other than a Hercules emulator. 92 * The config file is processed before the /Tnnn,/Ennn,/Dnnn PARMs. 93 * 94 * Code configuration options via hercjis variable substitutions 95 * SET_DISBAS 0 BAS/BASR tests enabled (default) 96 * 1 BAS/BASR tests disabled 97 * 98 * Return codes: 99 * RC = 0 ok 100 * RC = 4 open SYSPRINT failed 101 * RC = 8 open SYSIN failed 102 * RC = 12 unexpected SYSIN EOF (should never happen) 103 * RC = 16 bad PARMs 104 * RC = 20 execution error, see message on SYSPRINT 105 * 106 * User Abend codes: 107 * 10 test too large (> CBUFSIZE) 108 * 50 unexpected branch taken in test 109 * 60 internal consistency check in test 110 * 255 SOS buffer overflow PAGE 4 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 111 * 112 * Used CSECTS: 113 * MAIN main program code and local data 114 * TEXT text from otxtdsc 115 * SIOSDATA SOS data 116 * TDSCDAT task descriptor list 117 * TDSCTBL task table 118 * TCODE task code 119 * T330CS code for T330 120 * DATA other data 121 * 122 *** PRINT NOGEN don't show macro expansions 123 * 124 * local macros -------------------------------------------------------- 125 * 126 * OTXTDSC - setup text descriptor for simple output system - 127 * 128 MACRO 129 &LABEL OTXTDSC &TEXT 130 TEXT CSECT 131 SPTR&SYSNDX DC &TEXT 132 &SYSECT CSECT 133 DS 0F 134 &LABEL DC AL1(L'SPTR&SYSNDX),AL3(SPTR&SYSNDX) 135 MEND 136 * 137 * used global symbols 138 * type name set by used by comment 139 * GBLA TDIGCNT TDSCGEN REPINS* 140 * GBLC TTAG TSIMBEG TSIMEND 141 * 142 * TDSCGEN - setup test descriptor -------------------------- 143 * 144 MACRO 145 &LABEL TDSCGEN &TAG,&LRCNT,&IGCNT,<YPE,&TEXT 146 GBLA &TDIGCNT 147 &TDIGCNT SETA &IGCNT 148 * 149 &LABEL DC A(&TAG) // TENTRY 150 DC A(&TAG.TEND-&TAG) // TLENGTH 151 DC F'&LRCNT' // TLRCNT 152 DC F'&IGCNT' // TIGCNT 153 DC F'<YPE' // TLTYPE 154 OTXTDSC C'&TAG' // TTAGDSC 155 OTXTDSC &TEXT // TTXTDSC 156 MEND 157 * 158 * TSIMPRE - preamble code for simple test ------------------ 159 * Note: The preamble code starts at a double word boundary. This 160 * ensures that even after relocation the test code has the 161 * same alignments, especially that 'D' type allocations 162 * will stay on double word boundaries. 163 * 164 MACRO 165 &LABEL TSIMPRE &NBASE=1 PAGE 5 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 166 DS 0D ensure double word alignment for test 167 &LABEL SAVE (14,12) 168 AIF (&NBASE GT 1).NBASE2 169 LR R12,R15 base register := entry address 170 USING &LABEL,R12 declare code base register 171 LA R11,&LABEL.L load loop target to R11 172 AGO .NBASEOK 173 .NBASE2 ANOP 174 LR R11,R15 base register 1 := entry address 175 LA R12,2048(R11) 176 LA R12,2048(R12) base register 1 := entry address+4k 177 USING &LABEL,R11,R12 declare code base registers 178 LA R10,&LABEL.L load loop target to R10 179 .NBASEOK ANOP 180 L R15,=A(SAVETST) R15 := current save area 181 ST R13,4(R15) set back pointer in current save area 182 LR R2,R13 remember callers save area 183 LR R13,R15 setup current save area 184 ST R13,8(R2) set forw pointer in callers save area 185 USING TDSC,R1 declare TDSC base register 186 L R15,TLRCNT load local repeat count to R15 187 MEND 188 * 189 * TSIMRET - return code for simple test -------------------- 190 * 191 MACRO 192 &LABEL TSIMRET 193 L R15,=A(SAVETST) R15 := current save area 194 L R13,4(R15) get old save area back 195 RETURN (14,12) 196 MEND 197 * 198 * TSIMBEG - complete startup for simple test --------------- 199 * 200 MACRO 201 TSIMBEG &TAG,&LRCNT,&IGCNT,<YPE,&TEXT,&NBASE=1,&DIS=0 202 GBLC &TTAG 203 &TTAG SETC '&TAG' 204 * 205 TDSCDAT CSECT 206 DS 0D 207 &TAG.TDSC TDSCGEN &TAG,&LRCNT,&IGCNT,<YPE,&TEXT 208 * 209 TDSCTBL CSECT 210 &TAG.TPTR EQU * 211 AIF (&DIS GT 0).TDSCDIS 212 DC A(&TAG.TDSC) enabled test 213 AGO .TDSCOK 214 .TDSCDIS ANOP 215 DC X'01',AL3(&TAG.TDSC) disabled test 216 .TDSCOK ANOP 217 * 218 TCODE CSECT 219 &TAG TSIMPRE NBASE=&NBASE 220 * PAGE 6 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 221 MEND 222 * 223 * TSIMEND - end for simple test ---------------------------- 224 * 225 MACRO 226 TSIMEND 227 GBLC &TTAG 228 LTORG 229 &TTAG.TEND EQU * 230 MEND 231 * 232 * REPINS - repeat instruction ----------------------------- 233 * 234 MACRO 235 &LABEL REPINS &CODE,&ALIST,&IGCNT=0 236 GBLA &TDIGCNT 237 GBLC &MACRETC 238 LCLA &ICNT 239 LCLC &ARGS 240 * 241 * build from sublist &ALIST a comma separated string &ARGS 242 * 243 REPINSAL &ALIST 244 &ARGS SETC '&MACRETC' 245 * 246 * determine repeat count, &IGCNT if given, otherwise &TDIGCNT 247 * this allows to transfer the repeat count from last TDSCGEN call 248 * 249 &ICNT SETA &IGCNT 250 AIF (&ICNT GT 0).ICNTOK 251 &ICNT SETA &TDIGCNT 252 AIF (&ICNT GT 0).ICNTOK 253 MNOTE 8,'//REPINS: IGCNT and TDIGCNT equal 0; abort' 254 MEXIT 255 .ICNTOK ANOP 256 * 257 AIF ('&LABEL' EQ '').NOLBL 258 &LABEL EQU * 259 .NOLBL ANOP 260 * 261 * write a comment indicating what REPINS does (in case NOGEN in effect) 262 * 263 MNOTE *,'// REPINS: do &ICNT times:' 264 REPINSPI &CODE,&ARGS 265 * 266 * finally generate code: &ICNT copies of &CODE &ARGS 267 * 268 .ILOOP &CODE &ARGS 269 &ICNT SETA &ICNT-1 270 AIF (&ICNT GT 0).ILOOP 271 * 272 MEND 273 * 274 * REPINSN - repeat 5 instructions -------------------------- 275 * PAGE 7 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 276 MACRO 277 &LABEL REPINSN &CO1,&AL1,&CO2,&AL2,&CO3,&AL3,&CO4,&AL4,&CO5,&AL5 278 GBLA &TDIGCNT 279 GBLC &MACRETC 280 LCLA &ICNT 281 LCLC &ARGS1,&ARGS2,&ARGS3,&ARGS4,&ARGS5 282 * 283 * build from sublist &ALIST* a comma separated string &ARGS* 284 * 285 REPINSAL &AL1 286 &ARGS1 SETC '&MACRETC' 287 REPINSAL &AL2 288 &ARGS2 SETC '&MACRETC' 289 AIF ('&CO3' EQ '').ARGDONE 290 REPINSAL &AL3 291 &ARGS3 SETC '&MACRETC' 292 AIF ('&CO4' EQ '').ARGDONE 293 REPINSAL &AL4 294 &ARGS4 SETC '&MACRETC' 295 AIF ('&CO5' EQ '').ARGDONE 296 REPINSAL &AL5 297 &ARGS5 SETC '&MACRETC' 298 .ARGDONE ANOP 299 * 300 AIF ('&LABEL' EQ '').NOLBL 301 &LABEL EQU * 302 .NOLBL ANOP 303 * 304 &ICNT SETA &TDIGCNT 305 * 306 * write a comment indicating what REPINSN does (if NOGEN in effect) 307 * 308 MNOTE *,'// REPINSN: do &ICNT times:' 309 REPINSPI &CO1,&ARGS1 310 REPINSPI &CO2,&ARGS2 311 AIF ('&CO3' EQ '').PRTDONE 312 REPINSPI &CO3,&ARGS3 313 AIF ('&CO4' EQ '').PRTDONE 314 REPINSPI &CO4,&ARGS4 315 AIF ('&CO5' EQ '').PRTDONE 316 REPINSPI &CO5,&ARGS5 317 .PRTDONE ANOP 318 * 319 * finally generate code: &ICNT copies of &CO1 ... 320 * 321 .ILOOP &CO1 &ARGS1 322 &CO2 &ARGS2 323 AIF ('&CO3' EQ '').GENDONE 324 &CO3 &ARGS3 325 AIF ('&CO4' EQ '').GENDONE 326 &CO4 &ARGS4 327 AIF ('&CO5' EQ '').GENDONE 328 &CO5 &ARGS5 329 .GENDONE ANOP 330 &ICNT SETA &ICNT-1 PAGE 8 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 331 AIF (&ICNT GT 0).ILOOP 332 * 333 MEND 334 * 335 * REPINSAL - build from sublist a comma separated string --- 336 * 337 MACRO 338 REPINSAL &ALIST 339 GBLC &MACRETC 340 LCLA &AIND 341 * 342 &AIND SETA 2 343 &MACRETC SETC '&ALIST(1)' 344 * 345 .ALOOP AIF (&AIND GT N'&ALIST).AEND 346 &MACRETC SETC '&MACRETC'.','.'&ALIST(&AIND)' 347 &AIND SETA &AIND+1 348 AGO .ALOOP 349 .AEND ANOP 350 MEND 351 * 352 * REPINSPI - issue MNOTE with one instruction -------------- 353 * 354 MACRO 355 REPINSPI &CODE,&ARGS 356 LCLA &MAIND 357 LCLC &MASTR 358 * 359 * MNOTE requires that ' is doubled for expanded variables 360 * thus build &MASTR as a copy of '&ARGS with ' doubled 361 * 362 &MAIND SETA 1 363 &MASTR SETC '' 364 * 365 .MALOOP ANOP 366 &MASTR SETC '&MASTR'.'&ARGS'(&MAIND,1) 367 AIF ('&ARGS'(&MAIND,1) NE '''').MANEXT 368 &MASTR SETC '&MASTR'.'''' 369 .MANEXT ANOP 370 &MAIND SETA &MAIND+1 371 AIF (&MAIND LE K'&ARGS).MALOOP 372 MNOTE *,'// &CODE &MASTR' 373 MEND 374 * 375 * global definitions -------------------------------------------------- 376 * 377 GBLB &DISBAS 378 &DISBAS SETB 0 set 1 to disable BAS/BASR tests 379 * 380 * main preamble ------------------------------------------------------- 381 * 000000 382 MAIN START 0 start main code csect at base 0 383 SAVE (14,12) Save input registers 000000 384+ DS 0H 01650000 000000 90EC D00C 0000C 385+ STM 14,12,12(13) SAVE REGISTERS 02950000 PAGE 9 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000004 18BF 386 LR R11,R15 base register 1 := entry address 000006 41CB 0800 00800 387 LA R12,2048(R11) 00000A 41CC 0800 00800 388 LA R12,2048(R12) base register 2 := entry address+4k 00000 389 USING MAIN,R11,R12 declare 2 base register for 8k code 00000E 50D0 B414 00414 390 ST R13,SAVE+4 set back pointer in current save area 000012 182D 391 LR R2,R13 remember callers save area 000014 41D0 B410 00410 392 LA R13,SAVE setup current save area 000018 50D2 0008 00008 393 ST R13,8(R2) set forw pointer in callers save area 394 * 395 * general constant definitions----------------------------------------- 396 * 02000 397 CBUFSIZE EQU 8192 398 * 399 * some preparations -------------------------------------------------- 400 * 00001C 5010 B4A4 004A4 401 ST R1,ARGPTR save argument list pointer for later 000020 5830 BD90 00D90 402 L R3,=A(TDSCTBLE-4) pointer to last entry of TDSCTBL 000024 9680 3000 00000 403 OI 0(R3),X'80' mark last entry of TDSCTBL 404 * 405 * open datasets -------------------------------------------- 406 * 407 OPEN (SYSPRINT,OUTPUT) open SYSPRINT 000028 408+ CNOP 0,4 ALIGN LIST TO FULLWORD 01740001 000028 4510 B030 00030 409+ BAL 1,*+8 LOAD REG1 W/LIST ADDR. 01780000 00002C 8F 410+ DC AL1(143) OPTION BYTE 01900000 00002D 0021D0 411+ DC AL3(SYSPRINT) DCB ADDRESS 01920000 000030 0A13 412+ SVC 19 ISSUE OPEN SVC 04000000 000032 12FF 413 LTR R15,R15 test return code 000034 4780 B040 00040 414 BE OOPENOK 000038 9204 B4A3 004A3 415 MVI RC+3,X'04' 00003C 47F0 B3F4 003F4 416 B EXIT quit with RC=4 00040 417 OOPENOK EQU * 418 * 419 * allocate buffers ----------------------------------------- 420 * 421 GETMAIN RU,LV=CBUFSIZE,BNDRY=PAGE 422+* OS/VS2 RELEASE 4 VERSION -- 10/21/75 00004804 000040 423+ CNOP 0,4 00691802 000040 47F0 B04C 0004C 424+ B *+12-4*0-2*0 BRANCH AROUND DATA 00691902 000044 00002000 425+ DC A(CBUFSIZE) LENGTH 00701802 000048 00 426+IHB0003F DC AL1(0) RESERVED 00704502 000049 00 427+ DC AL1(0) RESERVED 00711902 00004A 00 428+ DC AL1(0) SUBPOOL 00727802 00004B 06 429+ DC BL1'00000110' MODE BYTE 00730402 00004C 5800 B044 00044 430+ L 0,*-8+2*0 LOAD LENGTH 00733002 000050 58F0 B048 00048 431+ L 15,IHB0003F LOAD GETMAIN PARMS 00788502 000054 1B11 432+ SR 1,1 ZERO RESERVED REG 1 00814402 000056 0A78 433+ SVC 120 ISSUE GETMAIN SVC 00820002 000058 5010 B4B0 004B0 434 ST R1,PCBUF code area pointer 435 GETMAIN RU,LV=4096,BNDRY=PAGE 436+* OS/VS2 RELEASE 4 VERSION -- 10/21/75 00004804 00005C 437+ CNOP 0,4 00691802 00005C 47F0 B068 00068 438+ B *+12-4*0-2*0 BRANCH AROUND DATA 00691902 000060 00001000 439+ DC A(4096) LENGTH 00701802 000064 00 440+IHB0004F DC AL1(0) RESERVED 00704502 PAGE 10 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000065 00 441+ DC AL1(0) RESERVED 00711902 000066 00 442+ DC AL1(0) SUBPOOL 00727802 000067 06 443+ DC BL1'00000110' MODE BYTE 00730402 000068 5800 B060 00060 444+ L 0,*-8+2*0 LOAD LENGTH 00733002 00006C 58F0 B064 00064 445+ L 15,IHB0004F LOAD GETMAIN PARMS 00788502 000070 1B11 446+ SR 1,1 ZERO RESERVED REG 1 00814402 000072 0A78 447+ SVC 120 ISSUE GETMAIN SVC 00820002 000074 5010 B4B4 004B4 448 ST R1,PBUF4K1 1st 4k data buffer pointer 449 GETMAIN RU,LV=4096,BNDRY=PAGE 450+* OS/VS2 RELEASE 4 VERSION -- 10/21/75 00004804 000078 451+ CNOP 0,4 00691802 000078 47F0 B084 00084 452+ B *+12-4*0-2*0 BRANCH AROUND DATA 00691902 00007C 00001000 453+ DC A(4096) LENGTH 00701802 000080 00 454+IHB0005F DC AL1(0) RESERVED 00704502 000081 00 455+ DC AL1(0) RESERVED 00711902 000082 00 456+ DC AL1(0) SUBPOOL 00727802 000083 06 457+ DC BL1'00000110' MODE BYTE 00730402 000084 5800 B07C 0007C 458+ L 0,*-8+2*0 LOAD LENGTH 00733002 000088 58F0 B080 00080 459+ L 15,IHB0005F LOAD GETMAIN PARMS 00788502 00008C 1B11 460+ SR 1,1 ZERO RESERVED REG 1 00814402 00008E 0A78 461+ SVC 120 ISSUE GETMAIN SVC 00820002 000090 5010 B4B8 004B8 462 ST R1,PBUF4K2 2nd 4k data buffer pointer 463 * 464 * main body ----------------------------------------------------------- 465 * 000000 466 TDSC DSECT 000000 467 TENTRY DS F entry address 000004 468 TLENGTH DS F code/data length of test 000008 469 TLRCNT DS F local repeat count 00000C 470 TIGCNT DS F local instruction group count 000010 471 TLTYPE DS F loop type 000014 472 TTAGDSC DS F tag text descriptor 000018 473 TTXTDSC DS F description text descriptor 474 * 000094 475 MAIN CSECT 476 * 477 * write header ------------------------------------------------------- 478 * 000094 5810 B574 00574 479 L R1,MSGVHDR 000098 45E0 BAB2 00AB2 480 BAL R14,OTEXT print VERS message prefix 00009C 5810 B570 00570 481 L R1,MSGVERS 0000A0 45E0 BAB2 00AB2 482 BAL R14,OTEXT print version 0000A4 45E0 BAE0 00AE0 483 BAL R14,OPUTLINE write line 484 * 485 * handle PARMs and config file---------------------------------------- 486 * 0000A8 45E0 B5DA 005DA 487 BAL R14,PARMPH1 handle PARM, phase 1 0000AC 45E0 B826 00826 488 BAL R14,CNFRD handle config file 0000B0 45E0 B748 00748 489 BAL R14,PARMPH2 handle PARM, phase 2 490 * 491 * handle /TCOR, add tests required for loop overhead correction 492 * R1 current ltype (as index or byte offset) 493 * R2 pointer into TDSCTBL 494 * R3 pointer to current TDSC 495 * R4 pointer to TCORTBL (0 based) PAGE 11 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 496 * R5 pointer into case list (starting at LTTBLxx) 497 * R6 pointer to TDSCTBL entry 498 * 0000B4 9500 B54F 0054F 499 CLI FLGTCOR,X'00' /TCOR seen ? 0000B8 4780 B132 00132 500 BE TCORE if = not, skip handling 0000BC 5820 BD94 00D94 501 L R2,=A(TDSCTBL) get head of TDSCTBL 502 * 0000C0 5832 0000 00000 503 TCORLO L R3,0(R2) get next TDSC 00000 504 USING TDSC,R3 declare TDSC base register 0000C4 9101 2000 00000 505 TM 0(R2),X'01' test disable flag 0000C8 4710 B118 00118 506 BO TCORNO if seen, continue with next 507 * 0000CC 5810 3010 00010 508 L R1,TLTYPE get lt 0000D0 1211 509 LTR R1,R1 test lt 0000D2 47D0 B118 00118 510 BNH TCORNO ignore tests with lt <= 0 0000D6 5910 BD98 00D98 511 C R1,=A(LTMAX) compare with TCORTBL size 0000DA 47D0 B0FA 000FA 512 BNH TCOROK if <= max ok 513 * 0000DE 5810 B5A0 005A0 514 L R1,MSGLTBD otherwise complain and abort 0000E2 45E0 BAB2 00AB2 515 BAL R14,OTEXT print error message 0000E6 5810 3014 00014 516 L R1,TTAGDSC 0000EA 45E0 BAB2 00AB2 517 BAL R14,OTEXT print tag 0000EE 45E0 BAE0 00AE0 518 BAL R14,OPUTLINE write line 0000F2 9214 B4A3 004A3 519 MVI RC+3,X'14' 0000F6 47F0 B3F4 003F4 520 B EXIT quit with RC=20 521 * 0000FA 5840 BD9C 00D9C 522 TCOROK L R4,=A(TCORTBL-4) get TCORTBL ptr (0 based!) 0000FE 8910 0002 00002 523 SLL R1,2 lt index to byte offset 000102 5851 4000 00000 524 L R5,0(R1,R4) get ptr to lt case list 000106 5865 0000 00000 525 TCORLI L R6,0(R5) get case (is ptr into TDSCTBL) 00010A 94FE 6000 00000 526 NI 0(R6),X'FE' clear disable flag bit 00010E 4155 0004 00004 527 LA R5,4(R5) push ptr to next case 000112 1266 528 LTR R6,R6 end tag X'80000000' seen ? 000114 47B0 B106 00106 529 BNL TCORLI if >= not, keep going 530 * 00118 531 TCORNO EQU * 532 DROP R3 000118 4122 0004 00004 533 LA R2,4(R2) push pointer to next TDSC 00011C 1233 534 LTR R3,R3 end tag X'80000000' seen ? 00011E 47B0 B0C0 000C0 535 BNL TCORLO if >= not, keep going 536 * 000122 5860 BDA0 00DA0 537 L R6,=A(T100TPTR) ptr to T100 (LR test for nrr) 000126 94FE 6000 00000 538 NI 0(R6),X'FE' clear disable flag bit 00012A 5860 BDA4 00DA4 539 L R6,=A(T102TPTR) ptr to T102 (L test for nrx) 00012E 94FE 6000 00000 540 NI 0(R6),X'FE' clear disable flag bit 541 * 00132 542 TCORE EQU * 543 * 544 * print test table if requested with /OPTT 545 * 000132 9500 B54C 0054C 546 CLI FLGOPTT,X'00' /OPTT seen ? 000136 4780 B1AE 001AE 547 BE OPTPTTE if = not 00013A 5810 B5A8 005A8 548 L R1,MSGOPTT 00013E 45E0 BAB2 00AB2 549 BAL R14,OTEXT print GMUL message prefix 000142 45E0 BAE0 00AE0 550 BAL R14,OPUTLINE write line PAGE 12 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000146 5820 BD94 00D94 551 L R2,=A(TDSCTBL) get head of TDSCTBL 552 * 00014A 5832 0000 00000 553 OPTPTTL L R3,0(R2) get next TDSC 00000 554 USING TDSC,R3 declare TDSC base register 00014E 1812 555 LR R1,R2 000150 5B10 BD94 00D94 556 S R1,=A(TDSCTBL) 000154 8810 0002 00002 557 SRL R1,2 R1 now index into TDSCTBL 000158 45E0 BBA8 00BA8 558 BAL R14,OINT04 print index 00015C 5810 B5B8 005B8 559 L R1,MSGTDIS 000160 9101 2000 00000 560 TM 0(R2),X'01' test disable flag 000164 4710 B16C 0016C 561 BO OPTPTTD if seen, prefix with " -" 000168 5810 B5B4 005B4 562 L R1,MSGTENA otherwise with " " 00016C 45E0 BAB2 00AB2 563 OPTPTTD BAL R14,OTEXT print enable/disable prefix 000170 5810 3014 00014 564 L R1,TTAGDSC 000174 45E0 BAB2 00AB2 565 BAL R14,OTEXT print tag 000178 5810 3008 00008 566 L R1,TLRCNT 00017C 45E0 BB70 00B70 567 BAL R14,OINT10 print LRCNT 000180 5810 300C 0000C 568 L R1,TIGCNT 000184 45E0 BBA8 00BA8 569 BAL R14,OINT04 print IGCNT 000188 5810 3010 00010 570 L R1,TLTYPE 00018C 45E0 BBA8 00BA8 571 BAL R14,OINT04 print LTYPE 000190 5810 3000 00000 572 L R1,TENTRY 000194 45E0 BBDC 00BDC 573 BAL R14,OHEX10 print code address 000198 5810 3004 00004 574 L R1,TLENGTH 00019C 45E0 BB70 00B70 575 BAL R14,OINT10 print code length 0001A0 45E0 BAE0 00AE0 576 BAL R14,OPUTLINE write line 577 * 578 DROP R3 0001A4 4122 0004 00004 579 LA R2,4(R2) push pointer to next TDSC 0001A8 1233 580 LTR R3,R3 end tag X'80000000' seen ? 0001AA 47B0 B14A 0014A 581 BNL OPTPTTL if >= not, keep going 582 * 001AE 583 OPTPTTE EQU * 584 * 585 * some final preparations -------------------------------------------- 586 * 587 * as warmup run test used for GMUL (with or without /GAUT !) 588 * 0001AE 5830 B4AC 004AC 589 L R3,GMULTDSC get GMUL test descriptor 0001B2 45A0 B900 00900 590 BAL R10,DOTEST run test with current GMUL 591 * 592 * handle /GAUT ----------------------- 593 * 0001B6 9500 B54E 0054E 594 CLI FLGGAUT,X'00' /GAUT active ? 0001BA 4780 B274 00274 595 BE OPTGAUTE if = not, skip handling 596 * 0001BE 5830 B4AC 004AC 597 L R3,GMULTDSC get GMUL test descriptor 0001C2 45A0 B900 00900 598 OPTGAUTL BAL R10,DOTEST run test with current GMUL 0001C6 9845 B4C8 004C8 599 LM R4,R5,TCKBEG get start time 0001CA 8C40 000C 0000C 600 SRDL R4,12 get it in usec 0001CE 9867 B4D0 004D0 601 LM R6,R7,TCKEND get end time 0001D2 8C60 000C 0000C 602 SRDL R6,12 get it in usec 0001D6 1F75 603 SLR R7,R5 R7 := end-start in usec (LSB) 604 * 0001D8 9500 B54A 0054A 605 CLI FLGOTGA,X'00' /OTGA active ? PAGE 13 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0001DC 4780 B222 00222 606 BE NOTRCTGA if = not, skip printing 0001E0 5810 B5D4 005D4 607 L R1,MSGTGA 0001E4 45E0 BAB2 00AB2 608 BAL R14,OTEXT print /OTGA message prefix 0001E8 5810 B4A8 004A8 609 L R1,GMUL 0001EC 45E0 BB70 00B70 610 BAL R14,OINT10 print GMUL 0001F0 5810 B5BC 005BC 611 L R1,MSGCSEP 0001F4 45E0 BAB2 00AB2 612 BAL R14,OTEXT print ' : ' 0001F8 4110 B4C8 004C8 613 LA R1,TCKBEG 0001FC 45E0 BC20 00C20 614 BAL R14,OHEX210 print TCKBEG (as hex) 000200 5810 B5BC 005BC 615 L R1,MSGCSEP 000204 45E0 BAB2 00AB2 616 BAL R14,OTEXT print ' : ' 000208 4110 B4D0 004D0 617 LA R1,TCKEND 00020C 45E0 BC20 00C20 618 BAL R14,OHEX210 print TCKEND (as hex) 000210 5810 B5BC 005BC 619 L R1,MSGCSEP 000214 45E0 BAB2 00AB2 620 BAL R14,OTEXT print ' : ' 000218 1817 621 LR R1,R7 00021A 45E0 BB70 00B70 622 BAL R14,OINT10 print dt (as int) 00021E 45E0 BAE0 00AE0 623 BAL R14,OPUTLINE write line 00222 624 NOTRCTGA EQU * 625 * 000222 5970 BDA8 00DA8 626 C R7,=F'200000' compare with 0.2 sec 000226 4720 B246 00246 627 BH OPTGAUTC 00022A 5840 B4A8 004A8 628 L R4,GMUL load GMUL 00022E 5940 BDAC 00DAC 629 C R4,=F'30000' already at limit ? 000232 4720 B274 00274 630 BH OPTGAUTE if > yes, quit increasing it 000236 8940 0001 00001 631 SLL R4,1 2*GMUL 00023A 5A40 B4A8 004A8 632 A R4,GMUL 3*GMUL 00023E 5040 B4A8 004A8 633 ST R4,GMUL now GMUL tripled 000242 47F0 B1C2 001C2 634 B OPTGAUTL and re-try with new GMUL 635 * 00246 636 OPTGAUTC EQU * calculate final GMUL 000246 1744 637 XR R4,R4 clear R4 000248 5850 BDB0 00DB0 638 L R5,=F'1024000000' (R4,R5) := 1024 * 1000000 00024C 1D47 639 DR R4,R7 R5 := (1024*1000000)/dt 00024E 5870 B4A8 004A8 640 L R7,GMUL 000252 1C65 641 MR R6,R5 R7 := GMUL * (1024*1000000)/dt 000254 8870 000A 0000A 642 SRL R7,10 R7 := GMUL * 1000000/dt 000258 4160 0001 00001 643 LA R6,1 00025C 1976 644 CR R7,R6 GMUL < 1 00025E 4720 B264 00264 645 BH OPTGAUTB if > not 000262 1876 646 LR R7,R6 limit to 1 000264 5860 BDB4 00DB4 647 OPTGAUTB L R6,=F'99999' 000268 1976 648 CR R7,R6 GMUL > 99999 00026A 4740 B270 00270 649 BL OPTGAUTT 00026E 1876 650 LR R7,R6 limit to 99999 000270 5070 B4A8 004A8 651 OPTGAUTT ST R7,GMUL 652 * 00274 653 OPTGAUTE EQU * 654 * 655 * print headings ----------------------- 656 * 000274 5810 B57C 0057C 657 L R1,MSGGMUL 000278 45E0 BAB2 00AB2 658 BAL R14,OTEXT print GMUL message prefix 00027C 5810 B4A8 004A8 659 L R1,GMUL 000280 45E0 BB70 00B70 660 BAL R14,OINT10 print GMUL PAGE 14 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000284 45E0 BAE0 00AE0 661 BAL R14,OPUTLINE write line 662 * 000288 5810 B580 00580 663 L R1,MSGSTRT 00028C 45E0 BAB2 00AB2 664 BAL R14,OTEXT print 'start tests' message 000290 B205 B4C0 004C0 665 STCK TPRBEG get program start time 000294 4110 B4C0 004C0 666 LA R1,TPRBEG 000298 45E0 BC20 00C20 667 BAL R14,OHEX210 print TPRBEG (as hex) 00029C 45E0 BAE0 00AE0 668 BAL R14,OPUTLINE write line 669 * 0002A0 5810 B5AC 005AC 670 L R1,MSGTHD1 0002A4 45E0 BAB2 00AB2 671 BAL R14,OTEXT print heading part 1 0002A8 4110 001E 0001E 672 LA R1,30 0002AC 45E0 BA8A 00A8A 673 BAL R14,OTAB goto tab stop 0002B0 5810 B5B0 005B0 674 L R1,MSGTHD2 0002B4 45E0 BAB2 00AB2 675 BAL R14,OTEXT print heading part 1 0002B8 45E0 BAE0 00AE0 676 BAL R14,OPUTLINE write line 677 * 678 * finally execute tests ---------------------------------------------- 679 * R2 pointer into TDSCTBL 680 * R3 pointer to current TDSC 681 * 682 * outer loop over tests 683 * 0002BC 5820 BD94 00D94 684 L R2,=A(TDSCTBL) get head of TDSCTBL 0002C0 5832 0000 00000 685 TLOOP L R3,0(R2) get next TDSC 0002C4 9101 2000 00000 686 TM 0(R2),X'01' test disable flag 0002C8 4710 B3AC 003AC 687 BO TLOOPN if seen, skip test 00000 688 USING TDSC,R3 declare TDSC base register 689 * 0002CC 9500 B548 00548 690 CLI FLGODBG,X'00' /ODGB active ? 0002D0 4780 B2D8 002D8 691 BE NOTRCSTP if = not, skip tracing 0002D4 45E0 B984 00984 692 BAL R14,TRCSTP 002D8 693 NOTRCSTP EQU * 694 * 0002D8 45A0 B900 00900 695 BAL R10,DOTEST execute test with inner GMUL loop 696 * 697 * calculate result 698 * 0002DC 4110 B4C8 004C8 699 LA R1,TCKBEG 0002E0 45E0 B942 00942 700 BAL R14,CNVCK2D 0002E4 6000 B4D8 004D8 701 STD FR0,TBEG TBEG now in 1/16 of usec 702 * 0002E8 4110 B4D0 004D0 703 LA R1,TCKEND 0002EC 45E0 B942 00942 704 BAL R14,CNVCK2D 0002F0 6000 B4E0 004E0 705 STD FR0,TEND TEND now in 1/16 of usec 706 * 0002F4 6800 B4E0 004E0 707 LD FR0,TEND 0002F8 6B00 B4D8 004D8 708 SD FR0,TBEG 0002FC 6D00 BD68 00D68 709 DD FR0,=D'16.E6' from 1/16 of usec to sec 000300 6000 B4E8 004E8 710 STD FR0,TDIF TDIF in sec 711 * 000304 5810 3008 00008 712 L R1,TLRCNT 000308 45E0 B970 00970 713 BAL R14,CNVF2D 00030C 2820 714 LDR FR2,FR0 FR2 := float(TLRCNT) 00030E 5810 300C 0000C 715 L R1,TIGCNT PAGE 15 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000312 45E0 B970 00970 716 BAL R14,CNVF2D FR0 := float(TIGCNT) 000316 2C20 717 MDR FR2,FR0 FR2 := TLRCNT*TIGCNT 000318 5810 B4A8 004A8 718 L R1,GMUL 00031C 45E0 B970 00970 719 BAL R14,CNVF2D FR0 := float(GMUL) 000320 2C20 720 MDR FR2,FR0 FR2 := TLRCNT*TIGCNT*GMUL 000322 6800 B4E8 004E8 721 LD FR0,TDIF FR0 := dt 000326 2D02 722 DDR FR0,FR2 FR0 := dt /(TLRCNT*TIGCNT*GMUL) 000328 6C00 BD70 00D70 723 MD FR0,=D'1.E6' FR0 := 1.e6 *dt/(TLRCNT*TIGCNT*GMUL) 00032C 6000 B4F0 004F0 724 STD FR0,TINS TINS now in usec 725 * 726 * print /ODBG trace output 727 * 000330 9500 B548 00548 728 CLI FLGODBG,X'00' /ODBG active ? 000334 4780 B33C 0033C 729 BE NOTRCRES if = not, skip tracing 000338 45E0 B9DC 009DC 730 BAL R14,TRCRES 0033C 731 NOTRCRES EQU * 732 * 733 * print result 734 * 00033C 5810 3014 00014 735 L R1,TTAGDSC 000340 45E0 BAB2 00AB2 736 BAL R14,OTEXT print tag 000344 45E0 BA7C 00A7C 737 BAL R14,OSKIP02 add space 000348 5810 3018 00018 738 L R1,TTXTDSC 00034C 45E0 BAB2 00AB2 739 BAL R14,OTEXT print description 000350 4110 001E 0001E 740 LA R1,30 000354 45E0 BA8A 00A8A 741 BAL R14,OTAB goto tab stop 000358 5810 B5BC 005BC 742 L R1,MSGCSEP 00035C 45E0 BAB2 00AB2 743 BAL R14,OTEXT print " : " 000360 6800 B4E8 004E8 744 LD FR0,TDIF 000364 45E0 BC5C 00C5C 745 BAL R14,OFIX1306 print run time 746 * 000368 5810 3008 00008 747 L R1,TLRCNT 00036C 45E0 BB70 00B70 748 BAL R14,OINT10 print LRCNT 000370 5810 300C 0000C 749 L R1,TIGCNT 000374 45E0 BBA8 00BA8 750 BAL R14,OINT04 print IGCNT 000378 5810 3010 00010 751 L R1,TLTYPE 00037C 45E0 BBA8 00BA8 752 BAL R14,OINT04 print LTYPE 753 * 000380 5810 B5BC 005BC 754 L R1,MSGCSEP 000384 45E0 BAB2 00AB2 755 BAL R14,OTEXT print " : " 000388 6800 B4F0 004F0 756 LD FR0,TINS 00038C 45E0 BC5C 00C5C 757 BAL R14,OFIX1306 print time per test 000390 45E0 BAE0 00AE0 758 BAL R14,OPUTLINE write line 759 * 000394 9500 B549 00549 760 CLI FLGOWTO,X'00' /OWTO active ? 000398 4780 B3AC 003AC 761 BE NOWTO if = not, skip oper messages 00039C 5810 3014 00014 762 L R1,TTAGDSC 0003A0 D203 B568 1000 00568 00000 763 MVC WTOMSG2,0(R1) insert current tag 764 WTO MF=(E,WTOPLIST) and issue operator message 0003A6 4110 B554 00554 765+ LA 1,WTOPLIST LOAD PARAMETER REG 1 01900002 0003AA 0A23 766+ SVC 35 ISSUE SVC 01500002 003AC 767 NOWTO EQU * 768 * 769 DROP R3 0003AC 4122 0004 00004 770 TLOOPN LA R2,4(R2) push pointer to next TDSC PAGE 16 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0003B0 1233 771 LTR R3,R3 end tag X'80000000' seen ? 0003B2 47B0 B2C0 002C0 772 BNL TLOOP if >= not, keep going 773 * 0003B6 5810 B584 00584 774 L R1,MSGDONE 0003BA 45E0 BAB2 00AB2 775 BAL R14,OTEXT print 'done tests' message 0003BE B205 B4D0 004D0 776 STCK TCKEND get program end time 0003C2 4110 B4D0 004D0 777 LA R1,TCKEND 0003C6 45E0 BC20 00C20 778 BAL R14,OHEX210 print TCKEND (as hex) 779 * 0003CA 4110 B4C0 004C0 780 LA R1,TPRBEG 0003CE 45E0 B942 00942 781 BAL R14,CNVCK2D convert program start time 0003D2 2860 782 LDR FR6,FR0 keep in FR6 783 * 0003D4 4110 B4D0 004D0 784 LA R1,TCKEND 0003D8 45E0 B942 00942 785 BAL R14,CNVCK2D convert program end time 0003DC 2B06 786 SDR FR0,FR6 dt = end - beg 0003DE 6D00 BD68 00D68 787 DD FR0,=D'16.E6' from 1/16 of usec to sec 788 * 0003E2 5810 B5A4 005A4 789 L R1,MSGDT 0003E6 45E0 BAB2 00AB2 790 BAL R14,OTEXT print 'done tests' message 0003EA 45E0 BC5C 00C5C 791 BAL R14,OFIX1306 print run time 0003EE 45E0 BAE0 00AE0 793 BAL R14,OPUTLINE write line 794 * 795 * close datasets and return to OS ------------------------------------- 796 * 797 EXIT CLOSE SYSPRINT close SYSPRINT 0003F2 0700 798+ CNOP 0,4 ALIGN LIST TO FULLWORD 02420002 0003F4 4510 B3FC 003FC 799+EXIT BAL 1,*+8 LOAD REG1 W/LIST ADDR 02460002 0003F8 80 800+ DC AL1(128) OPTION BYTE 02580000 0003F9 0021D0 801+ DC AL3(SYSPRINT) DCB ADDRESS 02600000 0003FC 0A14 802+ SVC 20 ISSUE CLOSE SVC 01640000 0003FE 58D0 B414 00414 803 L R13,SAVE+4 get old save area back 000402 5800 B4A0 004A0 804 L R0,RC get return code 000406 500D 0010 00010 805 ST R0,16(R13) store in old save R15 806 RETURN (14,12) return to OS (will setup RC) 00040A 98EC D00C 0000C 807+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00040E 07FE 808+ BR 14 RETURN 02000000 809 * 810 * data for MAIN program ---------------------------------------------- 811 * 000410 812 SAVE DS 18F save area (for main) 000458 813 SAVETST DS 18F save area (shared by Txxx) 0004A0 00000000 814 RC DC F'0' return code 0004A4 00000000 815 ARGPTR DC F'0' argument list pointer 816 * 0004A8 00000001 817 GMUL DC F'1' general multiplier 0004AC 00002528 818 GMULTDSC DC A(T102TDSC) test used for GMUL 819 * 0004B0 820 PCBUF DS F ptr to code area buffer 0004B4 821 PBUF4K1 DS F ptr 1st 4k data buffer 0004B8 822 PBUF4K2 DS F ptr 2nd 4k data buffer 823 * 0004C0 824 TPRBEG DS D STCK value at program begin 0004C8 825 TCKBEG DS D STCK value at test begin PAGE 17 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0004D0 826 TCKEND DS D STCK value at test end 0004D8 827 TBEG DS D TCKBEG as double in 1/16 usec 0004E0 828 TEND DS D TCKEND as double in 1/16 usec 0004E8 829 TDIF DS D test time in sec 0004F0 830 TINS DS D instruction time in usec 831 * 0004F8 832 GMULPACK DS D 000500 F0F0F0F0F0F0 833 GMULZONE DC C'000000' 834 * 000508 835 DS 0F 000508 00000548D6C4C2C7 836 FLGTBL DC X'00',AL3(FLGODBG),C'ODBG' 000510 00000549D6E3E6D6 837 DC X'00',AL3(FLGOWTO),C'OTWO' 000518 0000054AD6E3C7C1 838 DC X'00',AL3(FLGOTGA),C'OTGA' 000520 0000054BD6D7C3C6 839 DC X'00',AL3(FLGOPCF),C'OPCF' 000528 0000054CD6D7E3E3 840 DC X'00',AL3(FLGOPTT),C'OPTT' 000530 0000054DD6D9C9D7 841 DC X'00',AL3(FLGORIP),C'ORIP' 000538 0000054EC7C1E4E3 842 DC X'00',AL3(FLGGAUT),C'GAUT' 000540 8000054FE3C3D6D9 843 FTBLTCOR DC X'80',AL3(FLGTCOR),C'TCOR' 844 * 000548 00 845 FLGODBG DC X'00' /ODBG active 000549 00 846 FLGOWTO DC X'00' /OWTO active 00054A 00 847 FLGOTGA DC X'00' /OTGA active 00054B 00 848 FLGOPCF DC X'00' /OPCF active 00054C 00 849 FLGOPTT DC X'00' /OPTT active 00054D 00 850 FLGORIP DC X'00' /ORIP active 00054E 00 851 FLGGAUT DC X'00' /GAUT active 00054F 00 852 FLGTCOR DC X'00' /TCOR active 000550 00 853 TDSCDIS DC X'00' TDSC disable done after 1st /Tnnn 000551 E3 854 CHART DC C'T' just letter 'T' 000552 5C 855 CHARWC DC C'*' just letter '*' 856 * 000554 857 DS 0F 000554 0018 858 WTOPLIST DC AL2(4+L'WTOMSG1+L'WTOMSG2) text length + 4 000556 8000 859 DC B'1000000000000000' msg flags 000558 A2F3F7F06D978599 860 WTOMSG1 DC C's370_perf: done ' 000568 E3A7A7A7 861 WTOMSG2 DC C'Txxx' 00056C 0400 862 DC B'0000010000000000' descriptor codes (6=job status) 00056E 4000 863 DC B'0100000000000000' routing codes (2=console info) 864 * 000570 865 DS 0F 866 MSGVERS OTXTDSC C's370_perf V0.9.8 rev 1026 2018-05-27' 000DF0 867+TEXT CSECT 000DF0 A2F3F7F06D978599 868+SPTR0010 DC C's370_perf V0.9.8 rev 1026 2018-05-27' 000570 869+MAIN CSECT 000570 870+ DS 0F 000570 26000DF0 871+MSGVERS DC AL1(L'SPTR0010),AL3(SPTR0010) 872 MSGVHDR OTXTDSC C'PERF000I VERS: ' 000E16 873+TEXT CSECT 000E16 D7C5D9C6F0F0F0C9 874+SPTR0011 DC C'PERF000I VERS: ' 000574 875+MAIN CSECT 000574 876+ DS 0F 000574 0F000E16 877+MSGVHDR DC AL1(L'SPTR0011),AL3(SPTR0011) 878 MSGPARM OTXTDSC C'PERF001I PARM: ' 000E25 879+TEXT CSECT 000E25 D7C5D9C6F0F0F1C9 880+SPTR0012 DC C'PERF001I PARM: ' PAGE 18 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000578 881+MAIN CSECT 000578 882+ DS 0F 000578 0F000E25 883+MSGPARM DC AL1(L'SPTR0012),AL3(SPTR0012) 884 MSGGMUL OTXTDSC C'PERF002I run with GMUL= ' 000E34 885+TEXT CSECT 000E34 D7C5D9C6F0F0F2C9 886+SPTR0013 DC C'PERF002I run with GMUL= ' 00057C 887+MAIN CSECT 00057C 888+ DS 0F 00057C 18000E34 889+MSGGMUL DC AL1(L'SPTR0013),AL3(SPTR0013) 890 MSGSTRT OTXTDSC C'PERF003I start with tests at' 000E4C 891+TEXT CSECT 000E4C D7C5D9C6F0F0F3C9 892+SPTR0014 DC C'PERF003I start with tests at' 000580 893+MAIN CSECT 000580 894+ DS 0F 000580 1C000E4C 895+MSGSTRT DC AL1(L'SPTR0014),AL3(SPTR0014) 896 MSGDONE OTXTDSC C'PERF004I done with tests at' 000E68 897+TEXT CSECT 000E68 D7C5D9C6F0F0F4C9 898+SPTR0015 DC C'PERF004I done with tests at' 000584 899+MAIN CSECT 000584 900+ DS 0F 000584 1C000E68 901+MSGDONE DC AL1(L'SPTR0015),AL3(SPTR0015) 902 MSGPBAD OTXTDSC C'PERF005E bad option: ' 000E84 903+TEXT CSECT 000E84 D7C5D9C6F0F0F5C5 904+SPTR0016 DC C'PERF005E bad option: ' 000588 905+MAIN CSECT 000588 906+ DS 0F 000588 15000E84 907+MSGPBAD DC AL1(L'SPTR0016),AL3(SPTR0016) 908 MSGPDIG OTXTDSC C'PERF006E bad digit: ' 000E99 909+TEXT CSECT 000E99 D7C5D9C6F0F0F6C5 910+SPTR0017 DC C'PERF006E bad digit: ' 00058C 911+MAIN CSECT 00058C 912+ DS 0F 00058C 14000E99 913+MSGPDIG DC AL1(L'SPTR0017),AL3(SPTR0017) 914 MSGPTST OTXTDSC C'PERF007E bad test: ' 000EAD 915+TEXT CSECT 000EAD D7C5D9C6F0F0F7C5 916+SPTR0018 DC C'PERF007E bad test: ' 000590 917+MAIN CSECT 000590 918+ DS 0F 000590 13000EAD 919+MSGPTST DC AL1(L'SPTR0018),AL3(SPTR0018) 920 MSGPGM0 OTXTDSC C'PERF008E GMUL is zero: ' 000EC0 921+TEXT CSECT 000EC0 D7C5D9C6F0F0F8C5 922+SPTR0019 DC C'PERF008E GMUL is zero: ' 000594 923+MAIN CSECT 000594 924+ DS 0F 000594 17000EC0 925+MSGPGM0 DC AL1(L'SPTR0019),AL3(SPTR0019) 926 MSGCBAD OTXTDSC C'PERF009E bad config item: ' 000ED7 927+TEXT CSECT 000ED7 D7C5D9C6F0F0F9C5 928+SPTR0020 DC C'PERF009E bad config item: ' 000598 929+MAIN CSECT 000598 930+ DS 0F 000598 1A000ED7 931+MSGCBAD DC AL1(L'SPTR0020),AL3(SPTR0020) 932 MSGCLNE OTXTDSC C'PERF010I config: ' 000EF1 933+TEXT CSECT 000EF1 D7C5D9C6F0F1F0C9 934+SPTR0021 DC C'PERF010I config: ' 00059C 935+MAIN CSECT PAGE 19 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00059C 936+ DS 0F 00059C 11000EF1 937+MSGCLNE DC AL1(L'SPTR0021),AL3(SPTR0021) 938 MSGLTBD OTXTDSC C'PERF011E bad loop type for: ' 000F02 939+TEXT CSECT 000F02 D7C5D9C6F0F1F1C5 940+SPTR0022 DC C'PERF011E bad loop type for: ' 0005A0 941+MAIN CSECT 0005A0 942+ DS 0F 0005A0 1C000F02 943+MSGLTBD DC AL1(L'SPTR0022),AL3(SPTR0022) 944 MSGDT OTXTDSC C' dt=' 000F1E 945+TEXT CSECT 000F1E 404084A37E 946+SPTR0023 DC C' dt=' 0005A4 947+MAIN CSECT 0005A4 948+ DS 0F 0005A4 05000F1E 949+MSGDT DC AL1(L'SPTR0023),AL3(SPTR0023) 950 MSGOPTT OTXTDSC C' ind tag lr ig lt addr length' 000F23 951+TEXT CSECT 000F23 40899584404040A3 952+SPTR0024 DC C' ind tag lr ig lt addr length' 0005A8 953+MAIN CSECT 0005A8 954+ DS 0F 0005A8 30000F23 955+MSGOPTT DC AL1(L'SPTR0024),AL3(SPTR0024) 956 MSGTHD1 OTXTDSC C' tag description' 000F53 957+TEXT CSECT 000F53 40A3818740408485 958+SPTR0025 DC C' tag description' 0005AC 959+MAIN CSECT 0005AC 960+ DS 0F 0005AC 11000F53 961+MSGTHD1 DC AL1(L'SPTR0025),AL3(SPTR0025) 962 MSGTHD2 OTXTDSC C' : test(s) lr ig lt : inst(usec)' 000F64 963+TEXT CSECT 000F64 407A404040404040 964+SPTR0026 DC C' : test(s) lr ig lt : inst(usec)' 0005B0 965+MAIN CSECT 0005B0 966+ DS 0F 0005B0 32000F64 967+MSGTHD2 DC AL1(L'SPTR0026),AL3(SPTR0026) 968 MSGTENA OTXTDSC C' ' 000F96 969+TEXT CSECT 000F96 4040 970+SPTR0027 DC C' ' 0005B4 971+MAIN CSECT 0005B4 972+ DS 0F 0005B4 02000F96 973+MSGTENA DC AL1(L'SPTR0027),AL3(SPTR0027) 974 MSGTDIS OTXTDSC C' -' 000F98 975+TEXT CSECT 000F98 4060 976+SPTR0028 DC C' -' 0005B8 977+MAIN CSECT 0005B8 978+ DS 0F 0005B8 02000F98 979+MSGTDIS DC AL1(L'SPTR0028),AL3(SPTR0028) 980 MSGCSEP OTXTDSC C' : ' 000F9A 981+TEXT CSECT 000F9A 407A40 982+SPTR0029 DC C' : ' 0005BC 983+MAIN CSECT 0005BC 984+ DS 0F 0005BC 03000F9A 985+MSGCSEP DC AL1(L'SPTR0029),AL3(SPTR0029) 986 MSGDBG OTXTDSC C'-- ' 000F9D 987+TEXT CSECT 000F9D 60604040 988+SPTR0030 DC C'-- ' 0005C0 989+MAIN CSECT 0005C0 990+ DS 0F PAGE 20 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0005C0 04000F9D 991+MSGDBG DC AL1(L'SPTR0030),AL3(SPTR0030) 992 MSGBEG OTXTDSC C'-- TCKBEG:' 000FA1 993+TEXT CSECT 000FA1 60604040E3C3D2C2 994+SPTR0031 DC C'-- TCKBEG:' 0005C4 995+MAIN CSECT 0005C4 996+ DS 0F 0005C4 0B000FA1 997+MSGBEG DC AL1(L'SPTR0031),AL3(SPTR0031) 998 MSGEND OTXTDSC C'-- TCKEND:' 000FAC 999+TEXT CSECT 000FAC 60604040E3C3D2C5 1000+SPTR0032 DC C'-- TCKEND:' 0005C8 1001+MAIN CSECT 0005C8 1002+ DS 0F 0005C8 0B000FAC 1003+MSGEND DC AL1(L'SPTR0032),AL3(SPTR0032) 1004 MSGDIF OTXTDSC C'-- DIFF:' 000FB7 1005+TEXT CSECT 000FB7 606040404040C4C9 1006+SPTR0033 DC C'-- DIFF:' 0005CC 1007+MAIN CSECT 0005CC 1008+ DS 0F 0005CC 0B000FB7 1009+MSGDIF DC AL1(L'SPTR0033),AL3(SPTR0033) 1010 MSGINS OTXTDSC C'-- INS:' 000FC2 1011+TEXT CSECT 000FC2 60604040404040C9 1012+SPTR0034 DC C'-- INS:' 0005D0 1013+MAIN CSECT 0005D0 1014+ DS 0F 0005D0 0B000FC2 1015+MSGINS DC AL1(L'SPTR0034),AL3(SPTR0034) 1016 MSGTGA OTXTDSC C'-- GAUT:' 000FCD 1017+TEXT CSECT 000FCD 60604040C7C1E4E3 1018+SPTR0035 DC C'-- GAUT:' 0005D4 1019+MAIN CSECT 0005D4 1020+ DS 0F 0005D4 09000FCD 1021+MSGTGA DC AL1(L'SPTR0035),AL3(SPTR0035) 1022 * 0005D8 1023 DS 0H 1024 * 1025 * helper routines ---------------------------------------------------- 1026 * 1027 * -------------------------------------------------------------------- 1028 * BR14FAR: helper used in 'far call' BAL/BALR tests ================== 1029 * 0005D8 07FE 1030 BR14FAR BR R14 1031 * 1032 * -------------------------------------------------------------------- 1033 * PARMPH1: handle PARMs, phase 1, all except /Tnnn /Dnnn /Ennn ======= 1034 * R2 PARM address 1035 * R3 PARM length 1036 * 0005DA 50E0 B744 00744 1037 PARMPH1 ST R14,PARMPHXL 1038 * 0005DE 5820 B4A4 004A4 1039 L R2,ARGPTR get argument list pointer 0005E2 5822 0000 00000 1040 L R2,0(R2) load PARM base address 0005E6 4832 0000 00000 1041 LH R3,0(R2) load PARM length 0005EA 1233 1042 LTR R3,R3 test length 0005EC 4780 B70C 0070C 1043 BZ PARMPH1E if =0 no PARM specified 1044 * 0005F0 4122 0002 00002 1045 LA R2,2(R2) R2 points to 1st PARM char PAGE 21 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 1046 * 1047 * print PARM if given ------------------ 1048 * 0005F4 5810 B578 00578 1049 L R1,MSGPARM 0005F8 45E0 BAB2 00AB2 1050 BAL R14,OTEXT print PARM message prefix 0005FC 5420 BDB8 00DB8 1051 N R2,=X'00FFFFFF' force upper bit to zero 000600 1813 1052 LR R1,R3 get length 000602 8910 0018 00018 1053 SLL R1,24 put length into bits 0-7 000606 1612 1054 OR R1,R2 and address into bits 8-31 000608 45E0 BAB2 00AB2 1055 BAL R14,OTEXT print PARM as passed 00060C 45E0 BAE0 00AE0 1056 BAL R14,OPUTLINE write line 1057 * 1058 * loop over options ---------------------------------------- 1059 * 000610 9561 2000 00000 1060 PARMPH1L CLI 0(R2),C'/' does option start with / ? 000614 4770 B722 00722 1061 BNE PARMABO if != not 000618 5930 BDBC 00DBC 1062 C R3,=F'5' at least 5 chars left ? 00061C 4740 B722 00722 1063 BL PARMABO if < not 000620 4780 B62C 0062C 1064 BE OPTLOK if = exactly 5 char left 000624 9561 2005 00005 1065 CLI 5(R2),C'/' does option end with / ? 000628 4770 B722 00722 1066 BNE PARMABO if != not 1067 * 1068 * handle flags: /Oxxx,/GAUT,/TCOR ----- 1069 * R4 current option 1070 * R5 current FLGTBL entry 1071 * R6 ptr to flag 1072 * 00062C 5842 0001 00001 1073 OPTLOK L R4,1(R2) load all 4 option bytes 000630 4150 B508 00508 1074 LA R5,FLGTBL load ptr to FLGTBL 000634 5865 0000 00000 1075 FLGLOOP L R6,0(R5) load ptr to flag 000638 5945 0004 00004 1076 C R4,4(R5) does table entry match ? 00063C 4770 B648 00648 1077 BNE FLGNEXT if != not, try next table entry 000640 9201 6000 00000 1078 MVI 0(R6),X'01' otherwise set flag 000644 47F0 B700 00700 1079 B PARMPH1N and try next option 000648 4155 0008 00008 1080 FLGNEXT LA R5,8(R5) push ptr to next entry 00064C 1266 1081 LTR R6,R6 end tag X'80000000' seen ? 00064E 47B0 B634 00634 1082 BNL FLGLOOP if >= not, keep going 1083 * 1084 * check for /T /D /E, accept and ignore them in phase 1 1085 * 000652 95E3 2001 00001 1086 CLI 1(R2),C'T' is it /T ? 000656 4780 B700 00700 1087 BE PARMPH1N if = yes, accept and next option 00065A 95C4 2001 00001 1088 CLI 1(R2),C'D' is it /D ? 00065E 4780 B700 00700 1089 BE PARMPH1N if = yes, accept and next option 000662 95C5 2001 00001 1090 CLI 1(R2),C'E' is it /E ? 000666 4780 B700 00700 1091 BE PARMPH1N if = yes, accept and next option 1092 * 1093 * handle /Cnnn ------------------------- 1094 * R4 ptr to current TDSCTBL entry 1095 * R5 current TDSC 1096 * R6 current tag text descriptor 1097 * R7 current option (as Tnnn) 1098 * 00066A 95C3 2001 00001 1099 CLI 1(R2),C'C' is it /C ? 00066E 4770 B6A4 006A4 1100 BNE OPTCDONE if != try next PAGE 22 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000672 5872 0001 00001 1101 L R7,1(R2) load all 4 option bytes 000676 BF78 B551 00551 1102 ICM R7,B'1000',CHART force leading byte to 'T' 1103 * 00067A 5840 BD94 00D94 1104 L R4,=A(TDSCTBL) get head of TDSCTBL 00067E 5854 0000 00000 1105 OPTCLOOP L R5,0(R4) get next TDSC 00000 1106 USING TDSC,R5 declare TDSC base register 000682 5860 5014 00014 1107 L R6,TTAGDSC get tag text descriptor 000686 5976 0000 00000 1108 C R7,0(R6) does Tnnn option match tag ? 00068A 4770 B696 00696 1109 BNE OPTCNEXT if != not, try next 1110 * 00068E 5050 B4AC 004AC 1111 ST R5,GMULTDSC setup GMUL TDSC pointer 000692 47F0 B700 00700 1112 B PARMPH1N and consider option handled 1113 * 1114 DROP R5 1115 * 000696 4144 0004 00004 1116 OPTCNEXT LA R4,4(R4) push pointer to next TDSC 00069A 1255 1117 LTR R5,R5 end tag X'80000000' seen ? 00069C 47B0 B67E 0067E 1118 BNL OPTCLOOP if >= not, keep going 0006A0 47F0 B71A 0071A 1119 B PARMABOT if here no test found, complain 1120 * 1121 * handle /Gxxx ------------------------- 1122 * 0006A4 95C7 2001 00001 1123 OPTCDONE CLI 1(R2),C'G' is it /G ? 0006A8 4770 B722 00722 1124 BNE PARMABO if != is unknown option 1125 * 0006AC 95D2 2004 00004 1126 OPTGNNN CLI 4(R2),C'K' is it /GnnK form ? 0006B0 4780 B6BE 006BE 1127 BE OPTGNNK 0006B4 D202 B503 2002 00503 00002 1128 MVC GMULZONE+3(3),2(R2) get 3 digit, place 000nnn 0006BA 47F0 B6C4 006C4 1129 B OPTGCNV 0006BE D201 B501 2002 00501 00002 1130 OPTGNNK MVC GMULZONE+1(2),2(R2) get 2 digit, place 0nn000 1131 * 0006C4 4150 B501 00501 1132 OPTGCNV LA R5,GMULZONE+1 setup digit check, data pointer 0006C8 4160 0001 00001 1133 LA R6,1 increment 0006CC 4170 B505 00505 1134 LA R7,GMULZONE+5 end pointer 0006D0 95F0 5000 00000 1135 OPTGLOOP CLI 0(R5),C'0' is char >= '0' 0006D4 4740 B712 00712 1136 BL PARMABOD if < not 0006D8 95F9 5000 00000 1137 CLI 0(R5),C'9' is char <= '9' 0006DC 4720 B712 00712 1138 BH PARMABOD if > not 0006E0 8756 B6D0 006D0 1139 BXLE R5,R6,OPTGLOOP and loop till end 1140 * 0006E4 F275 B4F8 B500 004F8 00500 1141 PACK GMULPACK(8),GMULZONE zoned to packed 0006EA 4F00 B4F8 004F8 1142 CVB R0,GMULPACK and packed to binary 0006EE 1200 1143 LTR R0,R0 test result 0006F0 4770 B6FC 006FC 1144 BNE OPTGOK if =0 complain 0006F4 5810 B594 00594 1145 L R1,MSGPGM0 0006F8 47F0 B726 00726 1146 B PARMABO1 0006FC 5000 B4A8 004A8 1147 OPTGOK ST R0,GMUL store GMUL 1148 * 1149 * now handle next option --------------- 1150 * 000700 4122 0005 00005 1151 PARMPH1N LA R2,5(R2) push to next option 000704 5B30 BDBC 00DBC 1152 S R3,=F'5' decrement rest length 000708 4720 B610 00610 1153 BH PARMPH1L if >0 check next option 1154 * 00070C 58E0 B744 00744 1155 PARMPH1E L R14,PARMPHXL PAGE 23 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000710 07FE 1156 BR R14 1157 * 1158 * bad PARM abort handling 1159 * 000712 5810 B58C 0058C 1160 PARMABOD L R1,MSGPDIG 000716 47F0 B726 00726 1161 B PARMABO1 00071A 5810 B590 00590 1162 PARMABOT L R1,MSGPTST 00071E 47F0 B726 00726 1163 B PARMABO1 1164 * 000722 5810 B588 00588 1165 PARMABO L R1,MSGPBAD 000726 45E0 BAB2 00AB2 1166 PARMABO1 BAL R14,OTEXT print error message 00072A 1813 1167 LR R1,R3 get rest length 00072C 8910 0018 00018 1168 SLL R1,24 put length into bits 0-7 000730 1612 1169 OR R1,R2 and rest address into bits 8-31 000732 45E0 BAB2 00AB2 1170 BAL R14,OTEXT print rest of PARM 000736 45E0 BAE0 00AE0 1171 BAL R14,OPUTLINE write line 00073A 9210 B4A3 004A3 1172 MVI RC+3,X'10' 00073E 47F0 B3F4 003F4 1173 B EXIT quit with RC=16 1174 * 000744 1175 PARMPHXL DS 1F R14 save area (for PARMPH*,CNFRD) 1176 * 1177 * -------------------------------------------------------------------- 1178 * PARMPH2: handle PARMs, phase 2, handle /Tnnn /Dnnn /Ennn =========== 1179 * R2 PARM address 1180 * R3 PARM length 1181 * 000748 50E0 B744 00744 1182 PARMPH2 ST R14,PARMPHXL 1183 * 00074C 5820 B4A4 004A4 1184 L R2,ARGPTR get argument list pointer 000750 5822 0000 00000 1185 L R2,0(R2) load PARM base address 000754 4832 0000 00000 1186 LH R3,0(R2) load PARM length 000758 1233 1187 LTR R3,R3 test length 00075A 4780 B820 00820 1188 BZ PARMPH2E if =0 no PARM specified 1189 * 00075E 4122 0002 00002 1190 LA R2,2(R2) R2 points to 1st PARM char 1191 * 1192 * loop over options ---------------------------------------- 1193 * 00762 1194 PARMPH2L EQU * no checks, all done in PARMPH1 1195 * 1196 * handle /Tnnn, /Dnnn, /Ennn ----------- 1197 * R4 ptr to current TDSCTBL entry 1198 * R5 current TDSC 1199 * R6 current tag text descriptor 1200 * R7 current option (as Tnnn) 1201 * R8 disable flag (0 if /Dnnn, 1 if /Ennn or /Tnnn) 1202 * R9 current tag text (with wildcards injected) 1203 * R10 count of matched tags 1204 * 000762 5872 0001 00001 1205 L R7,1(R2) load all 4 option bytes 000766 5970 B544 00544 1206 C R7,FTBLTCOR+4 is it a /TCOR 00076A 4780 B814 00814 1207 BE PARMPH2N if = yes, skip 1208 * 00076E 4180 0001 00001 1209 LA R8,1 set disable flag 000772 95C4 2001 00001 1210 CLI 1(R2),C'D' is it /D ? PAGE 24 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000776 4780 B7AE 007AE 1211 BE OPTTDISE if = yes, proceed 00077A 1788 1212 XR R8,R8 clear disable flag 00077C 95C5 2001 00001 1213 CLI 1(R2),C'E' is it /E ? 000780 4780 B7AE 007AE 1214 BE OPTTDISE if = yes, proceed 1215 * 000784 95E3 2001 00001 1216 CLI 1(R2),C'T' is it /T ? 000788 4770 B814 00814 1217 BNE PARMPH2N if != try next 00078C 9500 B550 00550 1218 CLI TDSCDIS,X'00' TDSC disable already done ? 000790 4770 B7AE 007AE 1219 BNE OPTTDISE if != yes, skip over disable loop 1220 * 000794 9201 B550 00550 1221 MVI TDSCDIS,X'01' set disable done flag 000798 5840 BD94 00D94 1222 L R4,=A(TDSCTBL) get head of TDSCTBL 00079C 5854 0000 00000 1223 OPTTDISL L R5,0(R4) get next TDSC 0007A0 9601 4000 00000 1224 OI 0(R4),X'01' set disable flag bit 0007A4 4144 0004 00004 1225 LA R4,4(R4) push pointer to next TDSC 0007A8 1255 1226 LTR R5,R5 end tag X'80000000' seen ? 0007AA 47B0 B79C 0079C 1227 BNL OPTTDISL if >= not, keep going 1228 * 0007AE BF78 B551 00551 1229 OPTTDISE ICM R7,B'1000',CHART force leading byte to 'T' 1230 * 0007B2 17AA 1231 XR R10,R10 clear match count 0007B4 5840 BD94 00D94 1232 L R4,=A(TDSCTBL) get head of TDSCTBL 0007B8 5854 0000 00000 1233 OPTTENAL L R5,0(R4) get next TDSC 00000 1234 USING TDSC,R5 declare TDSC base register 0007BC 5860 5014 00014 1235 L R6,TTAGDSC get tag text descriptor 0007C0 5896 0000 00000 1236 L R9,0(R6) load tag text 1237 * 0007C4 955C 2002 00002 1238 CLI 2(R2),C'*' /T*nn wildcard 0007C8 4770 B7D0 007D0 1239 BNE OPTTNOW3 if != not 0007CC BF94 B552 00552 1240 ICM R9,B'0100',CHARWC otherwise inject wildcard 0007D0 955C 2003 00003 1241 OPTTNOW3 CLI 3(R2),C'*' /Tn*n wildcard 0007D4 4770 B7DC 007DC 1242 BNE OPTTNOW2 if != not 0007D8 BF92 B552 00552 1243 ICM R9,B'0010',CHARWC otherwise inject wildcard 0007DC 955C 2004 00004 1244 OPTTNOW2 CLI 4(R2),C'*' /Tnn* wildcard 0007E0 4770 B7E8 007E8 1245 BNE OPTTNOW1 if != not 0007E4 BF91 B552 00552 1246 ICM R9,B'0001',CHARWC otherwise inject wildcard 1247 * 0007E8 1979 1248 OPTTNOW1 CR R7,R9 does Tnnn option match tag ? 0007EA 4770 B804 00804 1249 BNE OPTTENAN if != not, try next 1250 * 0007EE 41AA 0001 00001 1251 LA R10,1(R10) increment match count 0007F2 1288 1252 LTR R8,R8 test disable flag 0007F4 4770 B800 00800 1253 BNE OPTTDIS if != yes, do disable 0007F8 94FE 4000 00000 1254 NI 0(R4),X'FE' clear disable flag bit 0007FC 47F0 B804 00804 1255 B OPTTENAN and go for next tag 000800 9601 4000 00000 1256 OPTTDIS OI 0(R4),X'01' set disable flag bit 1257 * 1258 DROP R5 1259 * 000804 4144 0004 00004 1260 OPTTENAN LA R4,4(R4) push pointer to next TDSC 000808 1255 1261 LTR R5,R5 end tag X'80000000' seen ? 00080A 47B0 B7B8 007B8 1262 BNL OPTTENAL if >= not, keep going 00080E 12AA 1263 LTR R10,R10 end of table, check match count 000810 4780 B71A 0071A 1264 BE PARMABOT if =, no test found, complain 1265 * PAGE 25 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 1266 * now handle next option --------------- 1267 * 000814 4122 0005 00005 1268 PARMPH2N LA R2,5(R2) push to next option 000818 5B30 BDBC 00DBC 1269 S R3,=F'5' decrement rest length 00081C 4720 B762 00762 1270 BH PARMPH2L if >0 check next option 1271 * 000820 58E0 B744 00744 1272 PARMPH2E L R14,PARMPHXL 000824 07FE 1273 BR R14 1274 * 1275 * -------------------------------------------------------------------- 1276 * CNFRD: handle config file read ===================================== 1277 * R2 new ENA state 1278 * R3 new LRCNT 1279 * R4 ptr to current TDSCTBL entry 1280 * R5 current TDSC 1281 * R6 current tag text descriptor 1282 * R7 test name 1283 * R8 address of text name 1284 * 000826 50E0 B8FC 008FC 1285 CNFRD ST R14,CNFRDL 1286 OPEN (SYSIN,INPUT) open SYSIN 00082A 0700 1287+ CNOP 0,4 ALIGN LIST TO FULLWORD 01740001 00082C 4510 B834 00834 1288+ BAL 1,*+8 LOAD REG1 W/LIST ADDR. 01780000 000830 80 1289+ DC AL1(128) OPTION BYTE 01900000 000831 0022B8 1290+ DC AL3(SYSIN) DCB ADDRESS 01920000 000834 0A13 1291+ SVC 19 ISSUE OPEN SVC 04000000 000836 12FF 1292 LTR R15,R15 test return code 000838 4770 B8F4 008F4 1293 BNE CNFRDBAD if != failed, quit 1294 * 00083C 41F0 B8E4 008E4 1295 LA R15,CNFRDE end handling address 000840 50F0 BD28 00D28 1296 ST R15,IEOFEXIT use it exit if EOF seen 000844 45E0 BCE2 00CE2 1297 CNFRDNL BAL R14,IGETLINE read input line 000848 5880 BD20 00D20 1298 L R8,ILPTR get input pointer 1299 * 00084C 957B 8000 00000 1300 CLI 0(R8),C'#' is it comnment line ? 000850 4780 B844 00844 1301 BE CNFRDNL if =, skip and try next line 1302 * 000854 9500 B54B 0054B 1303 CLI FLGOPCF,X'00' /OPCF seen ? 000858 4780 B872 00872 1304 BE OPTPCFE if = not 00085C 5810 B59C 0059C 1305 L R1,MSGCLNE 000860 45E0 BAB2 00AB2 1306 BAL R14,OTEXT print prefix 000864 1818 1307 LR R1,R8 000866 5A10 BDC0 00DC0 1308 A R1,=X'50000000' build text descriptor length=80 00086A 45E0 BAB2 00AB2 1309 BAL R14,OTEXT print input line 00086E 45E0 BAE0 00AE0 1310 BAL R14,OPUTLINE write line 1311 * 000872 5878 0000 00000 1312 OPTPCFE L R7,0(R8) get text name 000876 41F8 0004 00004 1313 LA R15,4(R8) push pointer by 4 char 00087A 50F0 BD20 00D20 1314 ST R15,ILPTR and update 00087E 45E0 BD38 00D38 1315 BAL R14,IINT05 get ENA 000882 1821 1316 LR R2,R1 R2 = ENA flag 000884 45E0 BD50 00D50 1317 BAL R14,IINT10 get LRCNT 000888 1831 1318 LR R3,R1 R3 = LRCNT 1319 * 00088A 5840 BD94 00D94 1320 L R4,=A(TDSCTBL) get head of TDSCTBL PAGE 26 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00088E 5854 0000 00000 1321 CNFRDLOP L R5,0(R4) get next TDSC 00000 1322 USING TDSC,R5 declare TDSC base register 000892 5860 5014 00014 1323 L R6,TTAGDSC get tag text descriptor 000896 5976 0000 00000 1324 C R7,0(R6) does Tnnn option match tag ? 00089A 4770 B8BA 008BA 1325 BNE CNFRDNXT if != not, try next 1326 * 00089E 94FE 4000 00000 1327 NI 0(R4),X'FE' clear disable flag bit 0008A2 1222 1328 LTR R2,R2 test enable flag 0008A4 4770 B8AC 008AC 1329 BNE CNFRDENA if !=, keep enabled 0008A8 9601 4000 00000 1330 OI 0(R4),X'01' otherwise set disable flag bit 1331 * 0008AC 1233 1332 CNFRDENA LTR R3,R3 test new LRCNT 0008AE 4780 B844 00844 1333 BE CNFRDNL if =, don't update 0008B2 5030 5008 00008 1334 ST R3,TLRCNT update LRCNT 0008B6 47F0 B844 00844 1335 B CNFRDNL line done, go for next line 1336 DROP R5 1337 * 0008BA 4144 0004 00004 1338 CNFRDNXT LA R4,4(R4) push pointer to next TDSC 0008BE 1255 1339 LTR R5,R5 end tag X'80000000' seen ? 0008C0 47B0 B88E 0088E 1340 BNL CNFRDLOP if >= not, keep going 1341 * 0008C4 5810 B598 00598 1342 L R1,MSGCBAD 0008C8 45E0 BAB2 00AB2 1343 BAL R14,OTEXT print error message 0008CC 1818 1344 LR R1,R8 get test name address 0008CE 5A10 BDC4 00DC4 1345 A R1,=X'04000000' build text descriptor length=4 0008D2 45E0 BAB2 00AB2 1346 BAL R14,OTEXT print test name 0008D6 45E0 BAE0 00AE0 1347 BAL R14,OPUTLINE write line 0008DA 9214 B4A3 004A3 1348 MVI RC+3,X'14' 0008DE 47F0 B3F4 003F4 1349 B EXIT quit with RC=20 1350 * 1351 CNFRDE CLOSE SYSIN close SYSIN 0008E2 0700 1352+ CNOP 0,4 ALIGN LIST TO FULLWORD 02420002 0008E4 4510 B8EC 008EC 1353+CNFRDE BAL 1,*+8 LOAD REG1 W/LIST ADDR 02460002 0008E8 80 1354+ DC AL1(128) OPTION BYTE 02580000 0008E9 0022B8 1355+ DC AL3(SYSIN) DCB ADDRESS 02600000 0008EC 0A14 1356+ SVC 20 ISSUE CLOSE SVC 01640000 0008EE 58E0 B8FC 008FC 1357 L R14,CNFRDL 0008F2 07FE 1358 BR R14 1359 * 0008F4 9208 B4A3 004A3 1360 CNFRDBAD MVI RC+3,X'08' handle OPEN error 0008F8 47F0 B3F4 003F4 1361 B EXIT quit with RC=8 1362 * 0008FC 1363 CNFRDL DS 1F save area for R14 (return linkage) 1364 * 1365 * -------------------------------------------------------------------- 1366 * DOTEST: helper to execute test inner loop with timing ============== 1367 * R3 holds pointer to TDSC 1368 * called with BAL R10,DOTEST 1369 * 00900 1370 DOTEST EQU * 00000 1371 USING TDSC,R3 declare TDSC base register 000900 5860 B4B0 004B0 1372 L R6,PCBUF copy destination is code buffer 000904 5870 3004 00004 1373 L R7,TLENGTH copy length 000908 5880 3000 00000 1374 L R8,TENTRY copy source is code 00090C 1897 1375 LR R9,R7 copy length PAGE 27 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 1376 * 00090E 5570 BDC8 00DC8 1377 CL R7,=A(CBUFSIZE) does code fit in buffer ? 000912 47D0 B91C 0091C 1378 BNH DOTESTOK if <= ok, doit 1379 ABEND 10 otherwise abend 000916 1380+ DS 0H 00400002 000916 4110 000A 0000A 1381+ LA 1,10 LOAD PARAMETER REG 1 01900002 00091A 0A0D 1382+ SVC 13 LINK TO ABEND ROUTINE 02050002 0091C 1383 DOTESTOK EQU * 1384 * 00091C 1856 1385 LR R5,R6 entry point (default is relocated) 00091E 9500 B54D 0054D 1386 CLI FLGORIP,X'00' /ORIP seen ? 000922 4780 B928 00928 1387 BE NOOPTRIP if = not 000926 1858 1388 LR R5,R8 use non-relocated code 00928 1389 NOOPTRIP EQU * 1390 * 000928 0E68 1391 MVCL R6,R8 relocate code 00092A B205 B4C8 004C8 1392 STCK TCKBEG get start time 1393 * 00092E 5840 B4A8 004A8 1394 L R4,GMUL inner GMUL loop 00932 1395 ILOOP EQU * 000932 1813 1396 LR R1,R3 load R1 := current TDSC 000934 18F5 1397 LR R15,R5 load entry point 000936 05EF 1398 BALR R14,R15 and execute 000938 4640 B932 00932 1399 BCT R4,ILOOP 1400 * 00093C B205 B4D0 004D0 1401 STCK TCKEND get end time 1402 DROP R3 1403 * 000940 07FA 1404 BR R10 1405 * 1406 * -------------------------------------------------------------------- 1407 * CNVCK2D: convert clock to double =================================== 1408 * input: R1 is pointer to STCK value 1409 * output: FR0 is STCK value as double in 1/16 of usec 1410 * 000942 5801 0000 00000 1411 CNVCK2D L R0,0(R1) 000946 5811 0004 00004 1412 L R1,4(R1) 00094A 8C00 0008 00008 1413 SRDL R0,8 get space for exponent 00094E 5400 BDB8 00DB8 1414 N R0,=X'00FFFFFF' 000952 5600 BDCC 00DCC 1415 O R0,=X'4E000000' now proper double 000956 9001 B968 00968 1416 STM R0,R1,CNVTMP 00095A 2B00 1417 SDR FR0,FR0 clear FR0 00095C 6A00 B968 00968 1418 AD FR0,CNVTMP get a normalized number 000960 07FE 1419 BR R14 1420 * 000968 1421 CNVTMP DS D 1422 * 1423 * -------------------------------------------------------------------- 1424 * CNVF2D: convert fullword to double ================================= 1425 * input: R1 value to be converted 1426 * output: FR0 value or R1 as double 1427 * 000970 5010 B96C 0096C 1428 CNVF2D ST R1,CNVTMP+4 store integer in lsb part 000974 5800 BB60 00B60 1429 L R0,ODNZERO 000978 5000 B968 00968 1430 ST R0,CNVTMP store de-normal zero in msb part PAGE 28 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00097C 2B00 1431 SDR FR0,FR0 clear register 00097E 6A00 B968 00968 1432 AD FR0,CNVTMP this re-normalizes 000982 07FE 1433 BR R14 1434 * 1435 * -------------------------------------------------------------------- 1436 * TRCSTP: trace test startup ========================================= 1437 * 1438 * 000984 50E0 B9D8 009D8 1439 TRCSTP ST R14,TRCSTPL 00000 1440 USING TDSC,R3 declare TDSC base register 1441 * 000988 5810 B5C0 005C0 1442 L R1,MSGDBG 00098C 45E0 BAB2 00AB2 1443 BAL R14,OTEXT print debug prefix 000990 5810 3014 00014 1444 L R1,TTAGDSC 000994 45E0 BAB2 00AB2 1445 BAL R14,OTEXT print tag 000998 45E0 BA7C 00A7C 1446 BAL R14,OSKIP02 add space 00099C 5810 3018 00018 1447 L R1,TTXTDSC 0009A0 45E0 BAB2 00AB2 1448 BAL R14,OTEXT print description 0009A4 4110 0022 00022 1449 LA R1,34 0009A8 45E0 BA8A 00A8A 1450 BAL R14,OTAB goto tab stop 0009AC 5810 3000 00000 1451 L R1,TENTRY 0009B0 45E0 BBDC 00BDC 1452 BAL R14,OHEX10 print entry address 0009B4 5810 3008 00008 1453 L R1,TLRCNT 0009B8 45E0 BB70 00B70 1454 BAL R14,OINT10 print LRCNT 0009BC 5810 300C 0000C 1455 L R1,TIGCNT 0009C0 45E0 BBA8 00BA8 1456 BAL R14,OINT04 print IGCNT 0009C4 5810 3010 00010 1457 L R1,TLTYPE 0009C8 45E0 BBA8 00BA8 1458 BAL R14,OINT04 print LTYPE 0009CC 45E0 BAE0 00AE0 1459 BAL R14,OPUTLINE write line 1460 * 1461 DROP R3 0009D0 58E0 B9D8 009D8 1462 L R14,TRCSTPL 0009D4 07FE 1463 BR R14 1464 * 0009D8 1465 TRCSTPL DS 1F save area for R14 (return linkage) 1466 * 1467 * -------------------------------------------------------------------- 1468 * TRCRES: trace test step results ==================================== 1469 * 0009DC 50E0 BA78 00A78 1470 TRCRES ST R14,TRCRESL 1471 * 0009E0 5810 B5C4 005C4 1472 L R1,MSGBEG 0009E4 45E0 BAB2 00AB2 1473 BAL R14,OTEXT print debug prefix 0009E8 4110 B4C8 004C8 1474 LA R1,TCKBEG 0009EC 45E0 BC20 00C20 1475 BAL R14,OHEX210 print start time raw in hex 0009F0 5810 B5BC 005BC 1476 L R1,MSGCSEP 0009F4 45E0 BAB2 00AB2 1477 BAL R14,OTEXT print " : " 0009F8 4110 B4D8 004D8 1478 LA R1,TBEG 0009FC 45E0 BC20 00C20 1479 BAL R14,OHEX210 print start time double in hex 000A00 45E0 BAE0 00AE0 1480 BAL R14,OPUTLINE write line 1481 * 000A04 5810 B5C8 005C8 1482 L R1,MSGEND 000A08 45E0 BAB2 00AB2 1483 BAL R14,OTEXT print debug prefix 000A0C 4110 B4D0 004D0 1484 LA R1,TCKEND 000A10 45E0 BC20 00C20 1485 BAL R14,OHEX210 print end time raw in hex PAGE 29 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000A14 5810 B5BC 005BC 1486 L R1,MSGCSEP 000A18 45E0 BAB2 00AB2 1487 BAL R14,OTEXT print " : " 000A1C 4110 B4E0 004E0 1488 LA R1,TEND 000A20 45E0 BC20 00C20 1489 BAL R14,OHEX210 print end time double in hex 000A24 45E0 BAE0 00AE0 1490 BAL R14,OPUTLINE write line 1491 * 000A28 5810 B5CC 005CC 1492 L R1,MSGDIF 000A2C 45E0 BAB2 00AB2 1493 BAL R14,OTEXT print debug prefix 000A30 4110 B4E8 004E8 1494 LA R1,TDIF 000A34 45E0 BC20 00C20 1495 BAL R14,OHEX210 print test time double in hex 000A38 5810 B5BC 005BC 1496 L R1,MSGCSEP 000A3C 45E0 BAB2 00AB2 1497 BAL R14,OTEXT print " : " 000A40 6800 B4E8 004E8 1498 LD FR0,TDIF 000A44 45E0 BC5C 00C5C 1499 BAL R14,OFIX1306 print test time 000A48 45E0 BAE0 00AE0 1500 BAL R14,OPUTLINE write line 1501 * 000A4C 5810 B5D0 005D0 1502 L R1,MSGINS 000A50 45E0 BAB2 00AB2 1503 BAL R14,OTEXT print debug prefix 000A54 4110 B4F0 004F0 1504 LA R1,TINS 000A58 45E0 BC20 00C20 1505 BAL R14,OHEX210 print instruction time double in hex 000A5C 5810 B5BC 005BC 1506 L R1,MSGCSEP 000A60 45E0 BAB2 00AB2 1507 BAL R14,OTEXT print " : " 000A64 6800 B4F0 004F0 1508 LD FR0,TINS 000A68 45E0 BC5C 00C5C 1509 BAL R14,OFIX1306 print instruction time 000A6C 45E0 BAE0 00AE0 1510 BAL R14,OPUTLINE write line 1511 * 000A70 58E0 BA78 00A78 1512 L R14,TRCRESL 000A74 07FE 1513 BR R14 1514 * 000A78 1515 TRCRESL DS 1F save area for R14 (return linkage) 1516 * 1517 * --------------------------------------------------------------------- 1518 * include simple output system ---------------------------------------- 1519 * 1520 * simple output system procedures ------------------------------------- 1521 * calling and register convention: 1522 * R1 holds value (or descriptor pointer) 1523 * R0,R1 may be modified 1524 * R14,R15 may be modified 1525 * R2-R11 are not changed 1526 * 1527 * in short 1528 * R1 holds input or output value (or pointer) 1529 * call with BAL R14, 1530 * 1531 * OSKIP02 -------------------------------------------------- 1532 * add 2 blanks 1533 * 000A7C 4110 0002 00002 1534 OSKIP02 LA R1,2 1535 * 1536 * OSKIP ---------------------------------------------------- 1537 * add blanks, count in R1 1538 * 000A80 5A10 BB44 00B44 1539 OSKIP A R1,OLPTR new edit position 000A84 5010 BB44 00B44 1540 ST R1,OLPTR store pointer PAGE 30 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000A88 07FE 1541 BR R14 1542 * 1543 * OTAB ---------------------------------------------------- 1544 * set output column, position in R1 1545 * 000A8A 5A10 BDD0 00DD0 1546 OTAB A R1,=A(OLBUF+1) new edit position 000A8E 5010 BB44 00B44 1547 ST R1,OLPTR store pointer 000A92 07FE 1548 BR R14 1549 * 1550 * OSFILL --------------------------------------------------- 1551 * add " ***" pattern, total length in R1 1552 * 000A94 58F0 BB44 00B44 1553 OSFILL L R15,OLPTR R15 points to edit position 000A98 9240 F000 00000 1554 MVI 0(R15),C' ' initial blank 000A9C 47F0 BAA4 00AA4 1555 B OSFILLN 000AA0 925C F000 00000 1556 OSFILLL MVI 0(R15),C'*' further '*' 000AA4 41FF 0001 00001 1557 OSFILLN LA R15,1(R15) 000AA8 4610 BAA0 00AA0 1558 BCT R1,OSFILLL 000AAC 50F0 BB44 00B44 1559 ST R15,OLPTR store pointer 000AB0 07FE 1560 BR R14 1561 * 1562 * OTEXT ---------------------------------------------------- 1563 * print text, R1 hold descriptor address 1564 * descriptor format 1565 * DC AL1() 1566 * DC AL2(
) 1567 * 000AB2 50E0 BADC 00ADC 1568 OTEXT ST R14,OTEXTL save R14 000AB6 18E1 1569 LR R14,R1 000AB8 88E0 0018 00018 1570 SRL R14,24 R14 now string length 000ABC 58F0 BB44 00B44 1571 L R15,OLPTR R15 points to edit position 000AC0 180F 1572 LR R0,R15 R0 too 000AC2 1A0E 1573 AR R0,R14 push pointer, add length 000AC4 5000 BB44 00B44 1574 ST R0,OLPTR store pointer 000AC8 06E0 1575 BCTR R14,0 decrement length for EX 000ACA 44E0 BAD4 00AD4 1576 EX R14,OTEXTMVC copy string via EX:MVC 000ACE 58E0 BADC 00ADC 1577 L R14,OTEXTL restore R14 linkage 000AD2 07FE 1578 BR R14 1579 * 000AD4 D200 F000 1000 00000 00000 1580 OTEXTMVC MVC 0(1,R15),0(R1) length via EX, dst R15, src R1 000ADC 1581 OTEXTL DS F save area for R14 (return linkage) 1582 * 1583 * OPUTLINE ------------------------------------------------- 1584 * write line to SYSPRINT 1585 * 000AE0 50E0 BB40 00B40 1586 OPUTLINE ST R14,OPUTLNEL save R14 000AE4 58F0 BDD4 00DD4 1587 L R15,=A(OLBUF) 000AE8 9500 F085 00085 1588 CLI 133(R15),X'00' check fence byte 000AEC 4770 BB3A 00B3A 1589 BNE OPUTLNEA crash if fence blown 000AF0 5810 BDD8 00DD8 1590 L R1,=A(SYSPRINT) R1 point to DCB 000AF4 180F 1591 LR R0,R15 R1 point to buffer 1592 PUT (1),(0) write line 000AF6 58F0 1030 00030 1593+ L 15,48(0,1) LOAD PUT ROUTINE ADDR 00550000 000AFA 05EF 1594+ BALR 14,15 LINK TO PUT ROUTINE 00600000 000AFC 58F0 BDD4 00DD4 1595 L R15,=A(OLBUF) point to CC of OLBUF PAGE 31 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000B00 9240 F000 00000 1596 MVI 0(R15),C' ' blank OLBUF(0) 000B04 D283 F001 F000 00001 00000 1597 MVC 1(L'OLBUF-1,R15),0(R15) propagate blank 000B0A 41FF 0001 00001 1598 LA R15,1(R15) point to 1st print char in OLBUF 000B0E 50F0 BB44 00B44 1599 ST R15,OLPTR reset current position pointer 000B12 41F0 0001 00001 1600 LA R15,1 000B16 4AF0 BB48 00B48 1601 AH R15,OLCNT increment line counter 000B1A 40F0 BB48 00B48 1602 STH R15,OLCNT 000B1E 4BF0 BB4A 00B4A 1603 SH R15,OLMAX R15 := OLCNT-OLMAX 000B22 4740 BB34 00B34 1604 BL OPUTLNES if < no new page 000B26 17FF 1605 XR R15,R15 R15 := 0 000B28 40F0 BB48 00B48 1606 STH R15,OLCNT clear line counter 000B2C 58F0 BDD4 00DD4 1607 L R15,=A(OLBUF) point to CC of OLBUF 000B30 92F1 F000 00000 1608 MVI 0(R15),C'1' set new page CC in OLBUF 000B34 58E0 BB40 00B40 1609 OPUTLNES L R14,OPUTLNEL restore R14 linkage 000B38 07FE 1610 BR R14 1611 * 1612 OPUTLNEA ABEND 255 abend in case of errors 000B3A 1613+OPUTLNEA DS 0H 00400002 000B3A 4110 00FF 000FF 1614+ LA 1,255 LOAD PARAMETER REG 1 01900002 000B3E 0A0D 1615+ SVC 13 LINK TO ABEND ROUTINE 02050002 1616 * 000B40 1617 OPUTLNEL DS F save area for R14 (return linkage) 1618 * 1619 * Work area for simple output system ------------------------ 1620 * 000B44 00002231 1621 OLPTR DC A(OLBUF+1) current output line position 000B48 0000 1622 OLCNT DC H'0' line counter 000B4A 003C 1623 OLMAX DC H'60' lines per page 000B50 1624 OCVD DS D buffer for CVD (8 byte, DW aligned) 1625 * 000B58 1626 ODTEMP DS D double buffer for conversions 000B60 4E00000000000000 1627 ODNZERO DC X'4E000000',X'00000000' denormalized double zero 000B68 4E00000000000001 1628 ODNONE DC X'4E000000',X'00000001' denormalized double one 1629 * 1630 * DCB and OLBUF in separate CSECT 1631 * 0021D0 1632 SIOSDATA CSECT 0021D0 1633 DS 0F 1634 SYSPRINT DCB DSORG=PS,MACRF=PM,DDNAME=SYSPRINT, X RECFM=FBA,LRECL=133,BLKSIZE=0 1636+* DATA CONTROL BLOCK 22770000 1637+* 22860000 0021D0 1638+SYSPRINT DC 0F'0' ORIGIN ON WORD BOUNDARY 22914000 1640+* DIRECT ACCESS DEVICE INTERFACE 27360000 0021D0 0000000000000000 1642+ DC BL16'0' FDAD,DVTBL 27540000 0021E0 00000000 1643+ DC A(0) KEYLE,DEVT,TRBAL 27720000 1645+* COMMON ACCESS METHOD INTERFACE 48690000 0021E4 00 1647+ DC AL1(0) BUFNO 49050000 0021E5 000001 1648+ DC AL3(1) BUFCB 54720000 PAGE 32 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0021E8 0000 1649+ DC AL2(0) BUFL 55170000 0021EA 4000 1650+ DC BL2'0100000000000000' *55800000 + DSORG 55890000 0021EC 00000001 1651+ DC A(1) IOBAD 56340000 1653+* FOUNDATION EXTENSION 56610000 0021F0 00 1655+ DC BL1'00000000' BFTEK,BFLN,HIARCHY 59850000 0021F1 000001 1656+ DC AL3(1) EODAD 65970000 0021F4 94 1657+ DC BL1'10010100' *66150000 + RECFM 66240000 0021F5 000000 1658+ DC AL3(0) EXLST 66330000 1660+* FOUNDATION BLOCK 66690000 0021F8 E2E8E2D7D9C9D5E3 1662+ DC CL8'SYSPRINT' DDNAME 66870000 002200 02 1663+ DC BL1'00000010' OFLGS 68220000 002201 00 1664+ DC BL1'00000000' IFLG 68310000 002202 0050 1665+ DC BL2'0000000001010000' *68400000 + *68490000 + MACR 68580000 1667+* BSAM-BPAM-QSAM INTERFACE 74430000 002204 00 1669+ DC BL1'00000000' *74610000 + RER1 74700000 002205 000001 1670+ DC AL3(1) CHECK, GERR, PERR 74790000 002208 00000001 1671+ DC A(1) SYNAD 74880000 00220C 0000 1672+ DC H'0' CIND1, CIND2 74970000 00220E 0000 1673+ DC AL2(0) BLKSIZE 75240000 002210 00000000 1674+ DC F'0' WCPO, WCPL, OFFSR, OFFSW 75870000 002214 00000001 1675+ DC A(1) IOBA 75960000 002218 00 1676+ DC AL1(0) NCP 76050000 002219 000001 1677+ DC AL3(1) EOBR, EOBAD 76140000 1679+* QSAM INTERFACE 81450000 00221C 00000001 1681+ DC A(1) RECAD 81630000 002220 0000 1682+ DC H'0' QSWS 81810000 002222 0085 1683+ DC AL2(133) LRECL 80730000 002224 00 1684+ DC BL1'00000000' EROPT 82530000 002225 000001 1685+ DC AL3(1) CNTRL 82620000 002228 00000000 1686+ DC F'0' PRECL 82710000 00222C 00000001 1687+ DC A(1) EOB 82800000 002230 4040404040404040 1688 OLBUF DC CL133' ',X'00' output line buffer and fence byte 1689 * 000B70 1690 MAIN CSECT 1691 * 1692 * OINT10 --------------------------------------------------- 1693 * print integer, like PL/I F(10) or C %10d format 1694 * very fast, for non-negative numbers only ! 1695 * 000B70 5510 BDDC 00DDC 1696 OINT10 CL R1,=F'999999999' too large ? 000B74 4720 BB96 00B96 1697 BH OINT10F if > yes, do OSFILL 000B78 4E10 BB50 00B50 1698 CVD R1,OCVD convert PAGE 33 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000B7C 58F0 BB44 00B44 1699 L R15,OLPTR R15 points to edit position 000B80 D209 F000 BB9E 00000 00B9E 1700 MVC 0(OEI10L,R15),OEI10 setup pattern 000B86 DE09 F000 BB53 00000 00B53 1701 ED 0(OEI10L,R15),OCVD+3 and edit 000B8C 41FF 000A 0000A 1702 LA R15,OEI10L(R15) push pointer 000B90 50F0 BB44 00B44 1703 ST R15,OLPTR store pointer 000B94 07FE 1704 BR R14 1705 * 000B96 4110 000A 0000A 1706 OINT10F LA R1,10 000B9A 47F0 BA94 00A94 1707 B OSFILL 1708 * 000B9E 4020202020202020 1709 OEI10 DC C' ',7X'20',X'21',X'20' pat: bddddddd(d 0000A 1710 OEI10L EQU *-OEI10 1711 * 1712 * OINT04 --------------------------------------------------- 1713 * print integer, like PL/I F(4) or C %4d format 1714 * very fast, for non-negative numbers only ! 1715 * 000BA8 41F0 03E7 003E7 1716 OINT04 LA R15,999 000BAC 151F 1717 CLR R1,R15 too large ? 000BAE 4720 BBD0 00BD0 1718 BH OINT04F if > yes, do OSFILL 000BB2 4E10 BB50 00B50 1719 CVD R1,OCVD convert 000BB6 58F0 BB44 00B44 1720 L R15,OLPTR R15 points to edit position 000BBA D203 F000 BBD8 00000 00BD8 1721 MVC 0(OEI04L,R15),OEI04 setup pattern 000BC0 DE03 F000 BB56 00000 00B56 1722 ED 0(OEI04L,R15),OCVD+6 and edit 000BC6 41FF 0004 00004 1723 LA R15,OEI04L(R15) push pointer 000BCA 50F0 BB44 00B44 1724 ST R15,OLPTR store pointer 000BCE 07FE 1725 BR R14 1726 * 000BD0 4110 0004 00004 1727 OINT04F LA R1,4 000BD4 47F0 BA94 00A94 1728 B OSFILL 1729 * 000BD8 40202120 1730 OEI04 DC C' ',X'20',X'21',X'20' ED pattern: bd(d 00004 1731 OEI04L EQU *-OEI04 1732 * 1733 * OHEX10 --------------------------------------------------- 1734 * print integer, like C " %8.8x" format 1735 * 000BDC 50E0 BC1C 00C1C 1736 OHEX10 ST R14,OHEX10L save R14 000BE0 58F0 BB44 00B44 1737 L R15,OLPTR R15 points to edit position 000BE4 41FF 0002 00002 1738 LA R15,2(R15) add two blanks 000BE8 41EF 0008 00008 1739 LA R14,8(R15) end of buffer 1740 * 000BEC 1700 1741 OHEX10NL XR R0,R0 R0 := 0 000BEE 8F00 0004 00004 1742 SLDA R0,4 get next 4 bits into R0 000BF2 4A00 BDE8 00DE8 1743 AH R0,=X'00F0' add '0' 000BF6 4900 BDEA 00DEA 1744 CH R0,=X'00F9' above 9 ? 000BFA 47D0 BC02 00C02 1745 BNH OHEX10OK if <= no, skip A-F correction 000BFE 4B00 BDEC 00DEC 1746 SH R0,=X'0039' sub (0xF0('0')+10)-0xC1('A')=0x39 000C02 420F 0000 00000 1747 OHEX10OK STC R0,0(R15) store hex digit 000C06 41FF 0001 00001 1748 LA R15,1(R15) push pointer 000C0A 19FE 1749 CR R15,R14 beyond end ? 000C0C 4740 BBEC 00BEC 1750 BL OHEX10NL if < not, do next nibble 1751 * 000C10 50F0 BB44 00B44 1752 ST R15,OLPTR store pointer 000C14 58E0 BC1C 00C1C 1753 L R14,OHEX10L restore R14 linkage PAGE 34 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000C18 07FE 1754 BR R14 1755 * 000C1C 1756 OHEX10L DS F save area for R14 (return linkage) 1757 * 1758 * OHEX210 -------------------------------------------------- 1759 * print 64 field as two 32 bit hex numbers 1760 * R1 points to memory location of 64 bit value 1761 * rendered as " %8.8x %8.8x" 1762 * 000C20 50E0 BC44 00C44 1763 OHEX210 ST R14,OHEX210L save R14 000C24 5010 BC48 00C48 1764 ST R1,OHEX210V save R1 000C28 5811 0000 00000 1765 L R1,0(R1) get high part 000C2C 45E0 BBDC 00BDC 1766 BAL R14,OHEX10 convert 000C30 5810 BC48 00C48 1767 L R1,OHEX210V 000C34 5811 0004 00004 1768 L R1,4(R1) get low part 000C38 45E0 BBDC 00BDC 1769 BAL R14,OHEX10 convert 000C3C 58E0 BC44 00C44 1770 L R14,OHEX210L restore R14 linkage 000C40 07FE 1771 BR R14 and return 1772 * 000C44 1773 OHEX210L DS F save area for R14 (return linkage) 000C48 1774 OHEX210V DS F save area for R1 (value ptr) 1775 * 1776 * OFIX1308, OFIX1306 - ------------------------------------- 1777 * print double, like 1778 * OFIX1308: PL/I F(13,8) or C %13.8f format 1779 * OFIX1306: PL/I F(13,6) or C %13.6f format 1780 * input value in floating reg FR0 1781 * handles signed numbers 1782 * 000C4C 6C00 BD78 00D78 1783 OFIX1308 MD FR0,=D'1.E8' 'shift' 8 digits left 000C50 4110 BCD5 00CD5 1784 LA R1,OEF1308 pointer to edit pattern 000C54 4100 0003 00003 1785 LA R0,3 offset to one behind X'21' position 000C58 47F0 BC68 00C68 1786 B OFIX13XX 1787 * 000C5C 6C00 BD70 00D70 1788 OFIX1306 MD FR0,=D'1.E6' 'shift' 6 digits left 000C60 4110 BCC8 00CC8 1789 LA R1,OEF1306 pointer to edit pattern 000C64 4100 0005 00005 1790 LA R0,5 offset to one behind X'21' position 1791 * 000C68 2020 1792 OFIX13XX LPDR FR2,FR0 get abbs() value 000C6A 6920 BD80 00D80 1793 CD FR2,=D'2.E9' too large ? 000C6E 47B0 BCC0 00CC0 1794 BNL OFX13XXF if >= yes, do OSFILL 1795 * 000C72 2842 1796 LDR FR4,FR2 000C74 6E40 BB60 00B60 1797 AW FR4,ODNZERO FR4 := de-normalized FR2 000C78 2B66 1798 SDR FR6,FR6 FR6 := 0. 000C7A 2A64 1799 ADR FR6,FR4 get integer part 000C7C 2B24 1800 SDR FR2,FR4 get fractional part 000C7E 6920 BD88 00D88 1801 CD FR2,=D'0.5' check if >= 0.5 000C82 4740 BC8A 00C8A 1802 BL OFX13XXR if < no need to round up 000C86 6E40 BB68 00B68 1803 AW FR4,ODNONE otherwise add LSB DENORM 000C8A 6040 BB58 00B58 1804 OFX13XXR STD FR4,ODTEMP roll-out to memory 000C8E 58F0 BB5C 00B5C 1805 L R15,ODTEMP+4 get integer part 000C92 4EF0 BB50 00B50 1806 CVD R15,OCVD convert 000C96 58F0 BB44 00B44 1807 L R15,OLPTR R15 points to edit position 000C9A D20C F000 1000 00000 00000 1808 MVC 0(OEF13XXL,R15),0(R1) setup pattern PAGE 35 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000CA0 181F 1809 LR R1,R15 setup R1 in case of miss 000CA2 1A10 1810 AR R1,R0 to one behind X'21' position 000CA4 DF0C F000 BB52 00000 00B52 1811 EDMK 0(OEF13XXL,R15),OCVD+2 and edit (and set R1) 000CAA 2200 1812 LTDR FR0,FR0 negative number ? 000CAC 47B0 BCB6 00CB6 1813 BNM OFX13XXP if >= not 000CB0 0610 1814 BCTR R1,0 decrement pointer 000CB2 9260 1000 00000 1815 MVI 0(R1),C'-' write '-' sign 000CB6 41FF 000D 0000D 1816 OFX13XXP LA R15,OEF13XXL(R15) push pointer 000CBA 50F0 BB44 00B44 1817 ST R15,OLPTR store pointer 000CBE 07FE 1818 BR R14 1819 * 000CC0 4110 000D 0000D 1820 OFX13XXF LA R1,OEF13XXL 000CC4 47F0 BA94 00A94 1821 B OSFILL 1822 * 000CC8 4020202021204B20 1823 OEF1306 DC C' ',3X'20',X'21',X'20',C'.',6X'20' pat: bddd(d.dddddd 000CD5 402021204B202020 1824 OEF1308 DC C' ',1X'20',X'21',X'20',C'.',8X'20' pat: bd(d.dddddddd 0000D 1825 OEF13XXL EQU *-OEF1308 1827 * include simple input system ----------------------------------------- 1828 * 1829 * simple input system procedures -------------------------------------- 1830 * calling and register convention: 1831 * R1 holds value (or descriptor pointer) 1832 * R0,R1 may be modified 1833 * R14,R15 may be modified 1834 * R2-R11 are not changed 1835 * 1836 * in short 1837 * R1 holds input or output value (or pointer) 1838 * call with BAL R14, 1839 * 1840 * IGETLINE ------------------------------------------------- 1841 * read line from SYSIN 1842 * EOF handling: 1843 * - IEOFOK holds the 'EOF OK' flag 1844 * - if EOF seen and IEOFOK = X'00', program ends with RC=8 1845 * - if EOF seen and IEOFOK != X'00', program ends with RC=0 1846 * 000CE2 50E0 BD04 00D04 1847 IGETLINE ST R14,IGETLNEL save R14 000CE6 5810 BDE0 00DE0 1848 L R1,=A(SYSIN) 000CEA 5800 BDE4 00DE4 1849 L R0,=A(ILBUF) 1850 GET (1),(0) read line 000CEE 58F0 1030 00030 1851+ L 15,48(0,1) LOAD GET ROUTINE ADDR 00600000 000CF2 05EF 1852+ BALR 14,15 LINK TO GET ROUTINE 00625000 000CF4 5800 BDE4 00DE4 1853 L R0,=A(ILBUF) 000CF8 5000 BD20 00D20 1854 ST R0,ILPTR set input ptr to begin of line 000CFC 58E0 BD04 00D04 1855 L R14,IGETLNEL restore R14 linkage 000D00 07FE 1856 BR R14 1857 * 000D04 1858 IGETLNEL DS F save area for R14 (return linkage) 1859 * 1860 * IEOFHDL -------------------------------------------------- 1861 * EODAD call-back routine. R2-R13 are preserved. R0,R1,R14,R15 are, 1862 * modified, with R14 holding address of calling macro. So code 1863 * executes in the same environment as prior to the GET call, PAGE 36 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 1864 * especially base registers are kept. 1865 * 000D08 58F0 BD28 00D28 1866 IEOFHDL L R15,IEOFEXIT load user exit address 000D0C 12FF 1867 LTR R15,R15 test address 000D0E 077F 1868 BNER R15 if !=, use user exit 000D10 41E0 B3F4 003F4 1869 LA R14,EXIT 000D14 9500 BD24 00D24 1870 CLI IEOFOK,X'00' is EOF ok ? 000D18 077E 1871 BNER R14 if != yes, jump to EXIT 000D1A 9208 B4A3 004A3 1872 MVI RC+3,X'08' otherwise set RC=8 000D1E 07FE 1873 BR R14 and jump to EXIT 1874 * 1875 * Work area for simple output system ------------------------ 1876 * 000D20 00002318 1877 ILPTR DC A(ILBUF) current input line position 000D24 1878 IEOFOK DS X'00' EOF ok flag 000D28 1879 IEOFEXIT DS F'0' user exit address (if != 0) 000D30 1880 ICVB DS D buffer for CVB (8 byte, DW aligned) 1881 * 1882 * DCB and OLBUF in separate CSECT 1883 * 0022B6 1884 SIOSDATA CSECT 0022B8 1885 DS 0F 1886 SYSIN DCB DSORG=PS,MACRF=GM,DDNAME=SYSIN,EODAD=IEOFHDL X RECFM=FB,LRECL=80,BLKSIZE=0 1888+* DATA CONTROL BLOCK 22770000 1889+* 22860000 0022B8 1890+SYSIN DC 0F'0' ORIGIN ON WORD BOUNDARY 22914000 1892+* DIRECT ACCESS DEVICE INTERFACE 27360000 0022B8 0000000000000000 1894+ DC BL16'0' FDAD,DVTBL 27540000 0022C8 00000000 1895+ DC A(0) KEYLE,DEVT,TRBAL 27720000 1897+* COMMON ACCESS METHOD INTERFACE 48690000 0022CC 00 1899+ DC AL1(0) BUFNO 49050000 0022CD 000001 1900+ DC AL3(1) BUFCB 54720000 0022D0 0000 1901+ DC AL2(0) BUFL 55170000 0022D2 4000 1902+ DC BL2'0100000000000000' *55800000 + DSORG 55890000 0022D4 00000001 1903+ DC A(1) IOBAD 56340000 1905+* FOUNDATION EXTENSION 56610000 0022D8 00 1907+ DC BL1'00000000' BFTEK,BFLN,HIARCHY 59850000 0022D9 000D08 1908+ DC AL3(IEOFHDL) EODAD 65970000 0022DC 00 1909+ DC BL1'00000000' *66150000 + RECFM 66240000 0022DD 000000 1910+ DC AL3(0) EXLST 66330000 1912+* FOUNDATION BLOCK 66690000 0022E0 E2E8E2C9D5404040 1914+ DC CL8'SYSIN' DDNAME 66870000 PAGE 37 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0022E8 02 1915+ DC BL1'00000010' OFLGS 68220000 0022E9 00 1916+ DC BL1'00000000' IFLG 68310000 0022EA 5000 1917+ DC BL2'0101000000000000' *68400000 + *68490000 + MACR 68580000 1919+* BSAM-BPAM-QSAM INTERFACE 74430000 0022EC 00 1921+ DC BL1'00000000' *74610000 + RER1 74700000 0022ED 000001 1922+ DC AL3(1) CHECK, GERR, PERR 74790000 0022F0 00000001 1923+ DC A(1) SYNAD 74880000 0022F4 0000 1924+ DC H'0' CIND1, CIND2 74970000 0022F6 0000 1925+ DC AL2(0) BLKSIZE 75240000 0022F8 00000000 1926+ DC F'0' WCPO, WCPL, OFFSR, OFFSW 75870000 0022FC 00000001 1927+ DC A(1) IOBA 75960000 002300 00 1928+ DC AL1(0) NCP 76050000 002301 000001 1929+ DC AL3(1) EOBR, EOBAD 76140000 1931+* QSAM INTERFACE 81450000 002304 00000001 1933+ DC A(1) RECAD 81630000 002308 0000 1934+ DC H'0' QSWS 81810000 00230A 0000 1935+ DC AL2(0) LRECL 80730000 00230C 00 1936+ DC BL1'00000000' EROPT 82530000 00230D 000001 1937+ DC AL3(1) CNTRL 82620000 002310 00000000 1938+ DC F'0' PRECL 82710000 002314 00000001 1939+ DC A(1) EOB 82800000 002318 4040404040404040 1940 ILBUF DC CL80' ' input line buffer 000D38 1941 MAIN CSECT 1942 * 1943 * IINT05 --------------------------------------------------- 1944 * read integer, like PL/I F(5) or C %5d format 1945 * 000D38 58F0 BD20 00D20 1946 IINT05 L R15,ILPTR get input pointer 000D3C F274 BD30 F000 00D30 00000 1947 PACK ICVB(8),0(5,R15) pack next 5 char 000D42 4F10 BD30 00D30 1948 CVB R1,ICVB and convert 000D46 41FF 0005 00005 1949 LA R15,5(R15) push pointer by 5 char 000D4A 50F0 BD20 00D20 1950 ST R15,ILPTR and update 000D4E 07FE 1951 BR R14 1952 * 1953 * IINT10 --------------------------------------------------- 1954 * read integer, like PL/I F(10) or C %10d format 1955 * 000D50 58F0 BD20 00D20 1956 IINT10 L R15,ILPTR get input pointer 000D54 F279 BD30 F000 00D30 00000 1957 PACK ICVB(8),0(10,R15) pack next 10 char 000D5A 4F10 BD30 00D30 1958 CVB R1,ICVB and convert 000D5E 41FF 000A 0000A 1959 LA R15,10(R15) push pointer by 10 char 000D62 50F0 BD20 00D20 1960 ST R15,ILPTR and update 000D66 07FE 1961 BR R14 1962 * 1963 * spill literal pool for MAIN 1964 * 000D68 1965 LTORG 000D68 46F4240000000000 1966 =D'16.E6' PAGE 38 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000D70 45F4240000000000 1967 =D'1.E6' 000D78 475F5E1000000000 1968 =D'1.E8' 000D80 4877359400000000 1969 =D'2.E9' 000D88 4080000000000000 1970 =D'0.5' 000D90 00004E60 1971 =A(TDSCTBLE-4) 000D94 000049C8 1972 =A(TDSCTBL) 000D98 0000000B 1973 =A(LTMAX) 000D9C 00002364 1974 =A(TCORTBL-4) 000DA0 000049C8 1975 =A(T100TPTR) 000DA4 000049D0 1976 =A(T102TPTR) 000DA8 00030D40 1977 =F'200000' 000DAC 00007530 1978 =F'30000' 000DB0 3D090000 1979 =F'1024000000' 000DB4 0001869F 1980 =F'99999' 000DB8 00FFFFFF 1981 =X'00FFFFFF' 000DBC 00000005 1982 =F'5' 000DC0 50000000 1983 =X'50000000' 000DC4 04000000 1984 =X'04000000' 000DC8 00002000 1985 =A(CBUFSIZE) 000DCC 4E000000 1986 =X'4E000000' 000DD0 00002231 1987 =A(OLBUF+1) 000DD4 00002230 1988 =A(OLBUF) 000DD8 000021D0 1989 =A(SYSPRINT) 000DDC 3B9AC9FF 1990 =F'999999999' 000DE0 000022B8 1991 =A(SYSIN) 000DE4 00002318 1992 =A(ILBUF) 000DE8 00F0 1993 =X'00F0' 000DEA 00F9 1994 =X'00F9' 000DEC 0039 1995 =X'0039' 1996 * 1997 * table used bt /TCOR ------------------------------------------------ 1998 * 002368 1999 DATA CSECT 002368 2000 DS 0F 2001 * 2002 * table with pointers to the lt case lists 2003 * 02368 2004 TCORTBL EQU * 002368 00002394 2005 DC A(LTTBL01) 00236C 00002398 2006 DC A(LTTBL02) 002370 0000239C 2007 DC A(LTTBL03) 002374 000023A4 2008 DC A(LTTBL04) 002378 000023AC 2009 DC A(LTTBL05) 00237C 000023B8 2010 DC A(LTTBL06) 002380 000023C0 2011 DC A(LTTBL07) 002384 000023C8 2012 DC A(LTTBL08) 002388 000023D0 2013 DC A(LTTBL09) 00238C 000023D8 2014 DC A(LTTBL10) 002390 000023E0 2015 DC A(LTTBL11) 0000B 2016 LTMAX EQU (*-TCORTBL)/4 2017 * 2018 * lt case lists, contain pointers into TDSCTBL 2019 * 02394 2020 LTTBL01 EQU * lt=1 -------------- 002394 80004BDC 2021 DC X'80',AL3(T311TPTR) T311 BCTR PAGE 39 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 02398 2022 LTTBL02 EQU * lt=2 ------------- 002398 80004BE0 2023 DC X'80',AL3(T312TPTR) T312 BCT 0239C 2024 LTTBL03 EQU * lt=3 ------------- 00239C 000049C8 2025 DC X'00',AL3(T100TPTR) T100 LR 0023A0 80004BDC 2026 DC X'80',AL3(T311TPTR) T311 BCTR 023A4 2027 LTTBL04 EQU * lt=4 ------------- 0023A4 000049CC 2028 DC X'00',AL3(T101TPTR) T101 LA 0023A8 80004BDC 2029 DC X'80',AL3(T311TPTR) T311 BCTR 023AC 2030 LTTBL05 EQU * lt=5 ------------- 0023AC 000049CC 2031 DC X'00',AL3(T101TPTR) T101 LA 0023B0 00004AF8 2032 DC X'00',AL3(T230TPTR) T230 XR 0023B4 80004BDC 2033 DC X'80',AL3(T311TPTR) T311 BCTR 023B8 2034 LTTBL06 EQU * lt=6 ------------- 0023B8 000049CC 2035 DC X'00',AL3(T101TPTR) T101 LA (3 times) 0023BC 80004BDC 2036 DC X'80',AL3(T311TPTR) T311 BCTR 023C0 2037 LTTBL07 EQU * lt=7 ------------- 0023C0 00004A2C 2038 DC X'00',AL3(T150TPTR) T150 MVC (5c) 0023C4 80004BDC 2039 DC X'80',AL3(T311TPTR) T311 BCTR 023C8 2040 LTTBL08 EQU * lt=8 ------------- 0023C8 00004A34 2041 DC X'00',AL3(T152TPTR) T152 MVC (15c) 0023CC 80004BDC 2042 DC X'80',AL3(T311TPTR) T311 BCTR 023D0 2043 LTTBL09 EQU * lt=9 ------------- 0023D0 00004C74 2044 DC X'00',AL3(T501TPTR) T501 LE 0023D4 80004BDC 2045 DC X'80',AL3(T311TPTR) T311 BCTR 023D8 2046 LTTBL10 EQU * lt=10 ------------- 0023D8 00004CCC 2047 DC X'00',AL3(T531TPTR) T531 LD 0023DC 80004BDC 2048 DC X'80',AL3(T311TPTR) T311 BCTR 023E0 2049 LTTBL11 EQU * lt=11 ------------- 0023E0 00004CCC 2050 DC X'00',AL3(T531TPTR) T531 LD (2 times) 0023E4 80004BDC 2051 DC X'80',AL3(T311TPTR) T311 BCTR 2052 * 2053 * data in DATA CSECT ------------------------------------------------- 2054 * 0023E8 2055 DATA CSECT 0023E8 2056 DS 0D 023E8 2057 TRTBLINV EQU * 0023E8 FFFEFDFCFBFAF9F8 2058 DC X'FFFEFDFCFBFAF9F8F7F6F5F4F3F2F1F0' 0023F8 EFEEEDECEBEAE9E8 2059 DC X'EFEEEDECEBEAE9E8E7E6E5E4E3E2E1E0' 002408 DFDEDDDCDBDAD9D8 2060 DC X'DFDEDDDCDBDAD9D8D7D6D5D4D3D2D1D0' 002418 CFCECDCCCBCAC9C8 2061 DC X'CFCECDCCCBCAC9C8C7C6C5C4C3C2C1C0' 002428 BFBEBDBCBBBAB9B8 2062 DC X'BFBEBDBCBBBAB9B8B7B6B5B4B3B2B1B0' 002438 AFAEADACABAAA9A8 2063 DC X'AFAEADACABAAA9A8A7A6A5A4A3A2A1A0' 002448 9F9E9D9C9B9A9998 2064 DC X'9F9E9D9C9B9A99989796959493929190' 002458 8F8E8D8C8B8A8988 2065 DC X'8F8E8D8C8B8A89888786858483828180' 002468 7F7E7D7C7B7A7978 2066 DC X'7F7E7D7C7B7A79787776757473727170' 002478 6F6E6D6C6B6A6968 2067 DC X'6F6E6D6C6B6A69686766656463626160' 002488 5F5E5D5C5B5A5958 2068 DC X'5F5E5D5C5B5A59585756555453525150' 002498 4F4E4D4C4B4A4948 2069 DC X'4F4E4D4C4B4A49484746454443424140' 0024A8 3F3E3D3C3B3A3938 2070 DC X'3F3E3D3C3B3A39383736353433323130' 0024B8 2F2E2D2C2B2A2928 2071 DC X'2F2E2D2C2B2A29282726252423222120' 0024C8 1F1E1D1C1B1A1918 2072 DC X'1F1E1D1C1B1A19181716151413121110' 0024D8 0F0E0D0C0B0A0908 2073 DC X'0F0E0D0C0B0A09080706050403020100' 2074 * 2075 * Tests ============================================================== 2076 * sections 1xx load/store/move PAGE 40 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 2077 * 2xx binary/logical 2078 * 3xx flow control 2079 * 4xx packed/decimal 2080 * 5xx floating point 2081 * 6xx miscellaneous 2082 * 7xx mix sequences 2083 * 9xx auxiliary tests 2084 * 2085 * Test 1xx -- load/store/move =================================== 2086 * 2087 * Test 10x -- load ========================================= 2088 * 2089 * Test 100 -- LR R,R --------------------------------------- 2090 * 2091 TSIMBEG T100,22000,100,1,C'LR R,R' 2092+* 0024E8 2093+TDSCDAT CSECT 0024E8 2094+ DS 0D 2095+* 0024E8 00004E68 2096+T100TDSC DC A(T100) // TENTRY 0024EC 000000FC 2097+ DC A(T100TEND-T100) // TLENGTH 0024F0 000055F0 2098+ DC F'22000' // TLRCNT 0024F4 00000064 2099+ DC F'100' // TIGCNT 0024F8 00000001 2100+ DC F'1' // TLTYPE 000FD6 2101+TEXT CSECT 000FD6 E3F1F0F0 2102+SPTR0052 DC C'T100' 0024FC 2103+TDSCDAT CSECT 0024FC 2104+ DS 0F 0024FC 04000FD6 2105+ DC AL1(L'SPTR0052),AL3(SPTR0052) 000FDA 2106+TEXT CSECT 000FDA D3D940D96BD9 2107+SPTR0053 DC C'LR R,R' 002500 2108+TDSCDAT CSECT 002500 2109+ DS 0F 002500 06000FDA 2110+ DC AL1(L'SPTR0053),AL3(SPTR0053) 2111+* 0049C8 2112+TDSCTBL CSECT 049C8 2113+T100TPTR EQU * 0049C8 000024E8 2114+ DC A(T100TDSC) enabled test 2115+* 004E68 2116+TCODE CSECT 004E68 2117+ DS 0D ensure double word alignment for test 004E68 2118+T100 DS 0H 01650000 004E68 90EC D00C 0000C 2119+ STM 14,12,12(13) SAVE REGISTERS 02950000 004E6C 18CF 2120+ LR R12,R15 base register := entry address 04E68 2121+ USING T100,R12 declare code base register 004E6E 41B0 C01E 04E86 2122+ LA R11,T100L load loop target to R11 004E72 58F0 C0F8 04F60 2123+ L R15,=A(SAVETST) R15 := current save area 004E76 50DF 0004 00004 2124+ ST R13,4(R15) set back pointer in current save area 004E7A 182D 2125+ LR R2,R13 remember callers save area 004E7C 18DF 2126+ LR R13,R15 setup current save area 004E7E 50D2 0008 00008 2127+ ST R13,8(R2) set forw pointer in callers save area 00000 2128+ USING TDSC,R1 declare TDSC base register 004E82 58F0 1008 00008 2129+ L R15,TLRCNT load local repeat count to R15 2130+* 2131 * PAGE 41 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 2132 T100L REPINS LR,(R2,R1) repeat: LR R2,R1 2133+* 2134+* build from sublist &ALIST a comma separated string &ARGS 2135+* 2136+* 2137+* 2138+* 2139+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2140+* this allows to transfer the repeat count from last TDSCGEN call 2141+* 2142+* 04E86 2143+T100L EQU * 2144+* 2145+* write a comment indicating what REPINS does (in case NOGEN in effect) 2146+* 2147+*,// REPINS: do 100 times: 2148+* 2149+* MNOTE requires that ' is doubled for expanded variables 2150+* thus build &MASTR as a copy of '&ARGS with ' doubled 2151+* 2152+* 2153+*,// LR R2,R1 2154+* 2155+* finally generate code: &ICNT copies of &CODE &ARGS 2156+* 004E86 1821 2157+ LR R2,R1 004E88 1821 2158+ LR R2,R1 004E8A 1821 2159+ LR R2,R1 004E8C 1821 2160+ LR R2,R1 004E8E 1821 2161+ LR R2,R1 004E90 1821 2162+ LR R2,R1 004E92 1821 2163+ LR R2,R1 004E94 1821 2164+ LR R2,R1 004E96 1821 2165+ LR R2,R1 004E98 1821 2166+ LR R2,R1 004E9A 1821 2167+ LR R2,R1 004E9C 1821 2168+ LR R2,R1 004E9E 1821 2169+ LR R2,R1 004EA0 1821 2170+ LR R2,R1 004EA2 1821 2171+ LR R2,R1 004EA4 1821 2172+ LR R2,R1 004EA6 1821 2173+ LR R2,R1 004EA8 1821 2174+ LR R2,R1 004EAA 1821 2175+ LR R2,R1 004EAC 1821 2176+ LR R2,R1 004EAE 1821 2177+ LR R2,R1 004EB0 1821 2178+ LR R2,R1 004EB2 1821 2179+ LR R2,R1 004EB4 1821 2180+ LR R2,R1 004EB6 1821 2181+ LR R2,R1 004EB8 1821 2182+ LR R2,R1 004EBA 1821 2183+ LR R2,R1 004EBC 1821 2184+ LR R2,R1 004EBE 1821 2185+ LR R2,R1 004EC0 1821 2186+ LR R2,R1 PAGE 42 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 004EC2 1821 2187+ LR R2,R1 004EC4 1821 2188+ LR R2,R1 004EC6 1821 2189+ LR R2,R1 004EC8 1821 2190+ LR R2,R1 004ECA 1821 2191+ LR R2,R1 004ECC 1821 2192+ LR R2,R1 004ECE 1821 2193+ LR R2,R1 004ED0 1821 2194+ LR R2,R1 004ED2 1821 2195+ LR R2,R1 004ED4 1821 2196+ LR R2,R1 004ED6 1821 2197+ LR R2,R1 004ED8 1821 2198+ LR R2,R1 004EDA 1821 2199+ LR R2,R1 004EDC 1821 2200+ LR R2,R1 004EDE 1821 2201+ LR R2,R1 004EE0 1821 2202+ LR R2,R1 004EE2 1821 2203+ LR R2,R1 004EE4 1821 2204+ LR R2,R1 004EE6 1821 2205+ LR R2,R1 004EE8 1821 2206+ LR R2,R1 004EEA 1821 2207+ LR R2,R1 004EEC 1821 2208+ LR R2,R1 004EEE 1821 2209+ LR R2,R1 004EF0 1821 2210+ LR R2,R1 004EF2 1821 2211+ LR R2,R1 004EF4 1821 2212+ LR R2,R1 004EF6 1821 2213+ LR R2,R1 004EF8 1821 2214+ LR R2,R1 004EFA 1821 2215+ LR R2,R1 004EFC 1821 2216+ LR R2,R1 004EFE 1821 2217+ LR R2,R1 004F00 1821 2218+ LR R2,R1 004F02 1821 2219+ LR R2,R1 004F04 1821 2220+ LR R2,R1 004F06 1821 2221+ LR R2,R1 004F08 1821 2222+ LR R2,R1 004F0A 1821 2223+ LR R2,R1 004F0C 1821 2224+ LR R2,R1 004F0E 1821 2225+ LR R2,R1 004F10 1821 2226+ LR R2,R1 004F12 1821 2227+ LR R2,R1 004F14 1821 2228+ LR R2,R1 004F16 1821 2229+ LR R2,R1 004F18 1821 2230+ LR R2,R1 004F1A 1821 2231+ LR R2,R1 004F1C 1821 2232+ LR R2,R1 004F1E 1821 2233+ LR R2,R1 004F20 1821 2234+ LR R2,R1 004F22 1821 2235+ LR R2,R1 004F24 1821 2236+ LR R2,R1 004F26 1821 2237+ LR R2,R1 004F28 1821 2238+ LR R2,R1 004F2A 1821 2239+ LR R2,R1 004F2C 1821 2240+ LR R2,R1 004F2E 1821 2241+ LR R2,R1 PAGE 43 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 004F30 1821 2242+ LR R2,R1 004F32 1821 2243+ LR R2,R1 004F34 1821 2244+ LR R2,R1 004F36 1821 2245+ LR R2,R1 004F38 1821 2246+ LR R2,R1 004F3A 1821 2247+ LR R2,R1 004F3C 1821 2248+ LR R2,R1 004F3E 1821 2249+ LR R2,R1 004F40 1821 2250+ LR R2,R1 004F42 1821 2251+ LR R2,R1 004F44 1821 2252+ LR R2,R1 004F46 1821 2253+ LR R2,R1 004F48 1821 2254+ LR R2,R1 004F4A 1821 2255+ LR R2,R1 004F4C 1821 2256+ LR R2,R1 2257+* 004F4E 06FB 2258 BCTR R15,R11 2259 TSIMRET 004F50 58F0 C0F8 04F60 2260+ L R15,=A(SAVETST) R15 := current save area 004F54 58DF 0004 00004 2261+ L R13,4(R15) get old save area back 004F58 98EC D00C 0000C 2262+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 004F5C 07FE 2263+ BR 14 RETURN 02000000 2264 TSIMEND 004F60 2265+ LTORG 004F60 00000458 2266 =A(SAVETST) 04F64 2267+T100TEND EQU * 2268 * 2269 * Test 101 -- LA R,n --------------------------------------- 2270 * 2271 TSIMBEG T101,17000,100,1,C'LA R,n' 2272+* 002504 2273+TDSCDAT CSECT 002508 2274+ DS 0D 2275+* 002508 00004F68 2276+T101TDSC DC A(T101) // TENTRY 00250C 000001C4 2277+ DC A(T101TEND-T101) // TLENGTH 002510 00004268 2278+ DC F'17000' // TLRCNT 002514 00000064 2279+ DC F'100' // TIGCNT 002518 00000001 2280+ DC F'1' // TLTYPE 000FE0 2281+TEXT CSECT 000FE0 E3F1F0F1 2282+SPTR0064 DC C'T101' 00251C 2283+TDSCDAT CSECT 00251C 2284+ DS 0F 00251C 04000FE0 2285+ DC AL1(L'SPTR0064),AL3(SPTR0064) 000FE4 2286+TEXT CSECT 000FE4 D3C140D96B95 2287+SPTR0065 DC C'LA R,n' 002520 2288+TDSCDAT CSECT 002520 2289+ DS 0F 002520 06000FE4 2290+ DC AL1(L'SPTR0065),AL3(SPTR0065) 2291+* 0049CC 2292+TDSCTBL CSECT 049CC 2293+T101TPTR EQU * 0049CC 00002508 2294+ DC A(T101TDSC) enabled test 2295+* 004F64 2296+TCODE CSECT PAGE 44 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 004F68 2297+ DS 0D ensure double word alignment for test 004F68 2298+T101 DS 0H 01650000 004F68 90EC D00C 0000C 2299+ STM 14,12,12(13) SAVE REGISTERS 02950000 004F6C 18CF 2300+ LR R12,R15 base register := entry address 04F68 2301+ USING T101,R12 declare code base register 004F6E 41B0 C01E 04F86 2302+ LA R11,T101L load loop target to R11 004F72 58F0 C1C0 05128 2303+ L R15,=A(SAVETST) R15 := current save area 004F76 50DF 0004 00004 2304+ ST R13,4(R15) set back pointer in current save area 004F7A 182D 2305+ LR R2,R13 remember callers save area 004F7C 18DF 2306+ LR R13,R15 setup current save area 004F7E 50D2 0008 00008 2307+ ST R13,8(R2) set forw pointer in callers save area 00000 2308+ USING TDSC,R1 declare TDSC base register 004F82 58F0 1008 00008 2309+ L R15,TLRCNT load local repeat count to R15 2310+* 2311 * 2312 T101L REPINS LA,(R2,X'123') repeat: LA R2,X'123 2313+* 2314+* build from sublist &ALIST a comma separated string &ARGS 2315+* 2316+* 2317+* 2318+* 2319+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2320+* this allows to transfer the repeat count from last TDSCGEN call 2321+* 2322+* 04F86 2323+T101L EQU * 2324+* 2325+* write a comment indicating what REPINS does (in case NOGEN in effect) 2326+* 2327+*,// REPINS: do 100 times: 2328+* 2329+* MNOTE requires that ' is doubled for expanded variables 2330+* thus build &MASTR as a copy of '&ARGS with ' doubled 2331+* 2332+* 2333+*,// LA R2,X'123' 2334+* 2335+* finally generate code: &ICNT copies of &CODE &ARGS 2336+* 004F86 4120 0123 00123 2337+ LA R2,X'123' 004F8A 4120 0123 00123 2338+ LA R2,X'123' 004F8E 4120 0123 00123 2339+ LA R2,X'123' 004F92 4120 0123 00123 2340+ LA R2,X'123' 004F96 4120 0123 00123 2341+ LA R2,X'123' 004F9A 4120 0123 00123 2342+ LA R2,X'123' 004F9E 4120 0123 00123 2343+ LA R2,X'123' 004FA2 4120 0123 00123 2344+ LA R2,X'123' 004FA6 4120 0123 00123 2345+ LA R2,X'123' 004FAA 4120 0123 00123 2346+ LA R2,X'123' 004FAE 4120 0123 00123 2347+ LA R2,X'123' 004FB2 4120 0123 00123 2348+ LA R2,X'123' 004FB6 4120 0123 00123 2349+ LA R2,X'123' 004FBA 4120 0123 00123 2350+ LA R2,X'123' 004FBE 4120 0123 00123 2351+ LA R2,X'123' PAGE 45 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 004FC2 4120 0123 00123 2352+ LA R2,X'123' 004FC6 4120 0123 00123 2353+ LA R2,X'123' 004FCA 4120 0123 00123 2354+ LA R2,X'123' 004FCE 4120 0123 00123 2355+ LA R2,X'123' 004FD2 4120 0123 00123 2356+ LA R2,X'123' 004FD6 4120 0123 00123 2357+ LA R2,X'123' 004FDA 4120 0123 00123 2358+ LA R2,X'123' 004FDE 4120 0123 00123 2359+ LA R2,X'123' 004FE2 4120 0123 00123 2360+ LA R2,X'123' 004FE6 4120 0123 00123 2361+ LA R2,X'123' 004FEA 4120 0123 00123 2362+ LA R2,X'123' 004FEE 4120 0123 00123 2363+ LA R2,X'123' 004FF2 4120 0123 00123 2364+ LA R2,X'123' 004FF6 4120 0123 00123 2365+ LA R2,X'123' 004FFA 4120 0123 00123 2366+ LA R2,X'123' 004FFE 4120 0123 00123 2367+ LA R2,X'123' 005002 4120 0123 00123 2368+ LA R2,X'123' 005006 4120 0123 00123 2369+ LA R2,X'123' 00500A 4120 0123 00123 2370+ LA R2,X'123' 00500E 4120 0123 00123 2371+ LA R2,X'123' 005012 4120 0123 00123 2372+ LA R2,X'123' 005016 4120 0123 00123 2373+ LA R2,X'123' 00501A 4120 0123 00123 2374+ LA R2,X'123' 00501E 4120 0123 00123 2375+ LA R2,X'123' 005022 4120 0123 00123 2376+ LA R2,X'123' 005026 4120 0123 00123 2377+ LA R2,X'123' 00502A 4120 0123 00123 2378+ LA R2,X'123' 00502E 4120 0123 00123 2379+ LA R2,X'123' 005032 4120 0123 00123 2380+ LA R2,X'123' 005036 4120 0123 00123 2381+ LA R2,X'123' 00503A 4120 0123 00123 2382+ LA R2,X'123' 00503E 4120 0123 00123 2383+ LA R2,X'123' 005042 4120 0123 00123 2384+ LA R2,X'123' 005046 4120 0123 00123 2385+ LA R2,X'123' 00504A 4120 0123 00123 2386+ LA R2,X'123' 00504E 4120 0123 00123 2387+ LA R2,X'123' 005052 4120 0123 00123 2388+ LA R2,X'123' 005056 4120 0123 00123 2389+ LA R2,X'123' 00505A 4120 0123 00123 2390+ LA R2,X'123' 00505E 4120 0123 00123 2391+ LA R2,X'123' 005062 4120 0123 00123 2392+ LA R2,X'123' 005066 4120 0123 00123 2393+ LA R2,X'123' 00506A 4120 0123 00123 2394+ LA R2,X'123' 00506E 4120 0123 00123 2395+ LA R2,X'123' 005072 4120 0123 00123 2396+ LA R2,X'123' 005076 4120 0123 00123 2397+ LA R2,X'123' 00507A 4120 0123 00123 2398+ LA R2,X'123' 00507E 4120 0123 00123 2399+ LA R2,X'123' 005082 4120 0123 00123 2400+ LA R2,X'123' 005086 4120 0123 00123 2401+ LA R2,X'123' 00508A 4120 0123 00123 2402+ LA R2,X'123' 00508E 4120 0123 00123 2403+ LA R2,X'123' 005092 4120 0123 00123 2404+ LA R2,X'123' 005096 4120 0123 00123 2405+ LA R2,X'123' 00509A 4120 0123 00123 2406+ LA R2,X'123' PAGE 46 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00509E 4120 0123 00123 2407+ LA R2,X'123' 0050A2 4120 0123 00123 2408+ LA R2,X'123' 0050A6 4120 0123 00123 2409+ LA R2,X'123' 0050AA 4120 0123 00123 2410+ LA R2,X'123' 0050AE 4120 0123 00123 2411+ LA R2,X'123' 0050B2 4120 0123 00123 2412+ LA R2,X'123' 0050B6 4120 0123 00123 2413+ LA R2,X'123' 0050BA 4120 0123 00123 2414+ LA R2,X'123' 0050BE 4120 0123 00123 2415+ LA R2,X'123' 0050C2 4120 0123 00123 2416+ LA R2,X'123' 0050C6 4120 0123 00123 2417+ LA R2,X'123' 0050CA 4120 0123 00123 2418+ LA R2,X'123' 0050CE 4120 0123 00123 2419+ LA R2,X'123' 0050D2 4120 0123 00123 2420+ LA R2,X'123' 0050D6 4120 0123 00123 2421+ LA R2,X'123' 0050DA 4120 0123 00123 2422+ LA R2,X'123' 0050DE 4120 0123 00123 2423+ LA R2,X'123' 0050E2 4120 0123 00123 2424+ LA R2,X'123' 0050E6 4120 0123 00123 2425+ LA R2,X'123' 0050EA 4120 0123 00123 2426+ LA R2,X'123' 0050EE 4120 0123 00123 2427+ LA R2,X'123' 0050F2 4120 0123 00123 2428+ LA R2,X'123' 0050F6 4120 0123 00123 2429+ LA R2,X'123' 0050FA 4120 0123 00123 2430+ LA R2,X'123' 0050FE 4120 0123 00123 2431+ LA R2,X'123' 005102 4120 0123 00123 2432+ LA R2,X'123' 005106 4120 0123 00123 2433+ LA R2,X'123' 00510A 4120 0123 00123 2434+ LA R2,X'123' 00510E 4120 0123 00123 2435+ LA R2,X'123' 005112 4120 0123 00123 2436+ LA R2,X'123' 2437+* 005116 06FB 2438 BCTR R15,R11 2439 TSIMRET 005118 58F0 C1C0 05128 2440+ L R15,=A(SAVETST) R15 := current save area 00511C 58DF 0004 00004 2441+ L R13,4(R15) get old save area back 005120 98EC D00C 0000C 2442+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005124 07FE 2443+ BR 14 RETURN 02000000 2444 TSIMEND 005128 2445+ LTORG 005128 00000458 2446 =A(SAVETST) 0512C 2447+T101TEND EQU * 2448 * 2449 * Test 102 -- L R,m ---------------------------------------- 2450 * 2451 TSIMBEG T102,13000,50,1,C'L R,m' 2452+* 002524 2453+TDSCDAT CSECT 002528 2454+ DS 0D 2455+* 002528 00005130 2456+T102TDSC DC A(T102) // TENTRY 00252C 00000100 2457+ DC A(T102TEND-T102) // TLENGTH 002530 000032C8 2458+ DC F'13000' // TLRCNT 002534 00000032 2459+ DC F'50' // TIGCNT 002538 00000001 2460+ DC F'1' // TLTYPE 000FEA 2461+TEXT CSECT PAGE 47 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 000FEA E3F1F0F2 2462+SPTR0076 DC C'T102' 00253C 2463+TDSCDAT CSECT 00253C 2464+ DS 0F 00253C 04000FEA 2465+ DC AL1(L'SPTR0076),AL3(SPTR0076) 000FEE 2466+TEXT CSECT 000FEE D340D96B94 2467+SPTR0077 DC C'L R,m' 002540 2468+TDSCDAT CSECT 002540 2469+ DS 0F 002540 05000FEE 2470+ DC AL1(L'SPTR0077),AL3(SPTR0077) 2471+* 0049D0 2472+TDSCTBL CSECT 049D0 2473+T102TPTR EQU * 0049D0 00002528 2474+ DC A(T102TDSC) enabled test 2475+* 00512C 2476+TCODE CSECT 005130 2477+ DS 0D ensure double word alignment for test 005130 2478+T102 DS 0H 01650000 005130 90EC D00C 0000C 2479+ STM 14,12,12(13) SAVE REGISTERS 02950000 005134 18CF 2480+ LR R12,R15 base register := entry address 05130 2481+ USING T102,R12 declare code base register 005136 41B0 C01E 0514E 2482+ LA R11,T102L load loop target to R11 00513A 58F0 C0F8 05228 2483+ L R15,=A(SAVETST) R15 := current save area 00513E 50DF 0004 00004 2484+ ST R13,4(R15) set back pointer in current save area 005142 182D 2485+ LR R2,R13 remember callers save area 005144 18DF 2486+ LR R13,R15 setup current save area 005146 50D2 0008 00008 2487+ ST R13,8(R2) set forw pointer in callers save area 00000 2488+ USING TDSC,R1 declare TDSC base register 00514A 58F0 1008 00008 2489+ L R15,TLRCNT load local repeat count to R15 2490+* 2491 * 2492 T102L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 2493+* 2494+* build from sublist &ALIST a comma separated string &ARGS 2495+* 2496+* 2497+* 2498+* 2499+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2500+* this allows to transfer the repeat count from last TDSCGEN call 2501+* 2502+* 0514E 2503+T102L EQU * 2504+* 2505+* write a comment indicating what REPINS does (in case NOGEN in effect) 2506+* 2507+*,// REPINS: do 50 times: 2508+* 2509+* MNOTE requires that ' is doubled for expanded variables 2510+* thus build &MASTR as a copy of '&ARGS with ' doubled 2511+* 2512+* 2513+*,// L R2,=F'123' 2514+* 2515+* finally generate code: &ICNT copies of &CODE &ARGS 2516+* PAGE 48 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00514E 5820 C0FC 0522C 2517+ L R2,=F'123' 005152 5820 C0FC 0522C 2518+ L R2,=F'123' 005156 5820 C0FC 0522C 2519+ L R2,=F'123' 00515A 5820 C0FC 0522C 2520+ L R2,=F'123' 00515E 5820 C0FC 0522C 2521+ L R2,=F'123' 005162 5820 C0FC 0522C 2522+ L R2,=F'123' 005166 5820 C0FC 0522C 2523+ L R2,=F'123' 00516A 5820 C0FC 0522C 2524+ L R2,=F'123' 00516E 5820 C0FC 0522C 2525+ L R2,=F'123' 005172 5820 C0FC 0522C 2526+ L R2,=F'123' 005176 5820 C0FC 0522C 2527+ L R2,=F'123' 00517A 5820 C0FC 0522C 2528+ L R2,=F'123' 00517E 5820 C0FC 0522C 2529+ L R2,=F'123' 005182 5820 C0FC 0522C 2530+ L R2,=F'123' 005186 5820 C0FC 0522C 2531+ L R2,=F'123' 00518A 5820 C0FC 0522C 2532+ L R2,=F'123' 00518E 5820 C0FC 0522C 2533+ L R2,=F'123' 005192 5820 C0FC 0522C 2534+ L R2,=F'123' 005196 5820 C0FC 0522C 2535+ L R2,=F'123' 00519A 5820 C0FC 0522C 2536+ L R2,=F'123' 00519E 5820 C0FC 0522C 2537+ L R2,=F'123' 0051A2 5820 C0FC 0522C 2538+ L R2,=F'123' 0051A6 5820 C0FC 0522C 2539+ L R2,=F'123' 0051AA 5820 C0FC 0522C 2540+ L R2,=F'123' 0051AE 5820 C0FC 0522C 2541+ L R2,=F'123' 0051B2 5820 C0FC 0522C 2542+ L R2,=F'123' 0051B6 5820 C0FC 0522C 2543+ L R2,=F'123' 0051BA 5820 C0FC 0522C 2544+ L R2,=F'123' 0051BE 5820 C0FC 0522C 2545+ L R2,=F'123' 0051C2 5820 C0FC 0522C 2546+ L R2,=F'123' 0051C6 5820 C0FC 0522C 2547+ L R2,=F'123' 0051CA 5820 C0FC 0522C 2548+ L R2,=F'123' 0051CE 5820 C0FC 0522C 2549+ L R2,=F'123' 0051D2 5820 C0FC 0522C 2550+ L R2,=F'123' 0051D6 5820 C0FC 0522C 2551+ L R2,=F'123' 0051DA 5820 C0FC 0522C 2552+ L R2,=F'123' 0051DE 5820 C0FC 0522C 2553+ L R2,=F'123' 0051E2 5820 C0FC 0522C 2554+ L R2,=F'123' 0051E6 5820 C0FC 0522C 2555+ L R2,=F'123' 0051EA 5820 C0FC 0522C 2556+ L R2,=F'123' 0051EE 5820 C0FC 0522C 2557+ L R2,=F'123' 0051F2 5820 C0FC 0522C 2558+ L R2,=F'123' 0051F6 5820 C0FC 0522C 2559+ L R2,=F'123' 0051FA 5820 C0FC 0522C 2560+ L R2,=F'123' 0051FE 5820 C0FC 0522C 2561+ L R2,=F'123' 005202 5820 C0FC 0522C 2562+ L R2,=F'123' 005206 5820 C0FC 0522C 2563+ L R2,=F'123' 00520A 5820 C0FC 0522C 2564+ L R2,=F'123' 00520E 5820 C0FC 0522C 2565+ L R2,=F'123' 005212 5820 C0FC 0522C 2566+ L R2,=F'123' 2567+* 005216 06FB 2568 BCTR R15,R11 2569 TSIMRET 005218 58F0 C0F8 05228 2570+ L R15,=A(SAVETST) R15 := current save area 00521C 58DF 0004 00004 2571+ L R13,4(R15) get old save area back PAGE 49 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005220 98EC D00C 0000C 2572+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005224 07FE 2573+ BR 14 RETURN 02000000 2574 TSIMEND 005228 2575+ LTORG 005228 00000458 2576 =A(SAVETST) 00522C 0000007B 2577 =F'123' 05230 2578+T102TEND EQU * 2579 * 2580 * Test 103 -- L R,m (unal) --------------------------------- 2581 * 2582 TSIMBEG T103,12000,50,1,C'L R,m (unal)' 2583+* 002544 2584+TDSCDAT CSECT 002548 2585+ DS 0D 2586+* 002548 00005230 2587+T103TDSC DC A(T103) // TENTRY 00254C 0000010C 2588+ DC A(T103TEND-T103) // TLENGTH 002550 00002EE0 2589+ DC F'12000' // TLRCNT 002554 00000032 2590+ DC F'50' // TIGCNT 002558 00000001 2591+ DC F'1' // TLTYPE 000FF3 2592+TEXT CSECT 000FF3 E3F1F0F3 2593+SPTR0088 DC C'T103' 00255C 2594+TDSCDAT CSECT 00255C 2595+ DS 0F 00255C 04000FF3 2596+ DC AL1(L'SPTR0088),AL3(SPTR0088) 000FF7 2597+TEXT CSECT 000FF7 D340D96B94404DA4 2598+SPTR0089 DC C'L R,m (unal)' 002560 2599+TDSCDAT CSECT 002560 2600+ DS 0F 002560 0C000FF7 2601+ DC AL1(L'SPTR0089),AL3(SPTR0089) 2602+* 0049D4 2603+TDSCTBL CSECT 049D4 2604+T103TPTR EQU * 0049D4 00002548 2605+ DC A(T103TDSC) enabled test 2606+* 005230 2607+TCODE CSECT 005230 2608+ DS 0D ensure double word alignment for test 005230 2609+T103 DS 0H 01650000 005230 90EC D00C 0000C 2610+ STM 14,12,12(13) SAVE REGISTERS 02950000 005234 18CF 2611+ LR R12,R15 base register := entry address 05230 2612+ USING T103,R12 declare code base register 005236 41B0 C022 05252 2613+ LA R11,T103L load loop target to R11 00523A 58F0 C108 05338 2614+ L R15,=A(SAVETST) R15 := current save area 00523E 50DF 0004 00004 2615+ ST R13,4(R15) set back pointer in current save area 005242 182D 2616+ LR R2,R13 remember callers save area 005244 18DF 2617+ LR R13,R15 setup current save area 005246 50D2 0008 00008 2618+ ST R13,8(R2) set forw pointer in callers save area 00000 2619+ USING TDSC,R1 declare TDSC base register 00524A 58F0 1008 00008 2620+ L R15,TLRCNT load local repeat count to R15 2621+* 2622 * 00524E 4130 C0FC 0532C 2623 LA R3,T103V 2624 T103L REPINS L,(R2,1(R3)) repeat: L R2,1(R3) 2625+* 2626+* build from sublist &ALIST a comma separated string &ARGS PAGE 50 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 2627+* 2628+* 2629+* 2630+* 2631+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2632+* this allows to transfer the repeat count from last TDSCGEN call 2633+* 2634+* 05252 2635+T103L EQU * 2636+* 2637+* write a comment indicating what REPINS does (in case NOGEN in effect) 2638+* 2639+*,// REPINS: do 50 times: 2640+* 2641+* MNOTE requires that ' is doubled for expanded variables 2642+* thus build &MASTR as a copy of '&ARGS with ' doubled 2643+* 2644+* 2645+*,// L R2,1(R3) 2646+* 2647+* finally generate code: &ICNT copies of &CODE &ARGS 2648+* 005252 5823 0001 00001 2649+ L R2,1(R3) 005256 5823 0001 00001 2650+ L R2,1(R3) 00525A 5823 0001 00001 2651+ L R2,1(R3) 00525E 5823 0001 00001 2652+ L R2,1(R3) 005262 5823 0001 00001 2653+ L R2,1(R3) 005266 5823 0001 00001 2654+ L R2,1(R3) 00526A 5823 0001 00001 2655+ L R2,1(R3) 00526E 5823 0001 00001 2656+ L R2,1(R3) 005272 5823 0001 00001 2657+ L R2,1(R3) 005276 5823 0001 00001 2658+ L R2,1(R3) 00527A 5823 0001 00001 2659+ L R2,1(R3) 00527E 5823 0001 00001 2660+ L R2,1(R3) 005282 5823 0001 00001 2661+ L R2,1(R3) 005286 5823 0001 00001 2662+ L R2,1(R3) 00528A 5823 0001 00001 2663+ L R2,1(R3) 00528E 5823 0001 00001 2664+ L R2,1(R3) 005292 5823 0001 00001 2665+ L R2,1(R3) 005296 5823 0001 00001 2666+ L R2,1(R3) 00529A 5823 0001 00001 2667+ L R2,1(R3) 00529E 5823 0001 00001 2668+ L R2,1(R3) 0052A2 5823 0001 00001 2669+ L R2,1(R3) 0052A6 5823 0001 00001 2670+ L R2,1(R3) 0052AA 5823 0001 00001 2671+ L R2,1(R3) 0052AE 5823 0001 00001 2672+ L R2,1(R3) 0052B2 5823 0001 00001 2673+ L R2,1(R3) 0052B6 5823 0001 00001 2674+ L R2,1(R3) 0052BA 5823 0001 00001 2675+ L R2,1(R3) 0052BE 5823 0001 00001 2676+ L R2,1(R3) 0052C2 5823 0001 00001 2677+ L R2,1(R3) 0052C6 5823 0001 00001 2678+ L R2,1(R3) 0052CA 5823 0001 00001 2679+ L R2,1(R3) 0052CE 5823 0001 00001 2680+ L R2,1(R3) 0052D2 5823 0001 00001 2681+ L R2,1(R3) PAGE 51 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0052D6 5823 0001 00001 2682+ L R2,1(R3) 0052DA 5823 0001 00001 2683+ L R2,1(R3) 0052DE 5823 0001 00001 2684+ L R2,1(R3) 0052E2 5823 0001 00001 2685+ L R2,1(R3) 0052E6 5823 0001 00001 2686+ L R2,1(R3) 0052EA 5823 0001 00001 2687+ L R2,1(R3) 0052EE 5823 0001 00001 2688+ L R2,1(R3) 0052F2 5823 0001 00001 2689+ L R2,1(R3) 0052F6 5823 0001 00001 2690+ L R2,1(R3) 0052FA 5823 0001 00001 2691+ L R2,1(R3) 0052FE 5823 0001 00001 2692+ L R2,1(R3) 005302 5823 0001 00001 2693+ L R2,1(R3) 005306 5823 0001 00001 2694+ L R2,1(R3) 00530A 5823 0001 00001 2695+ L R2,1(R3) 00530E 5823 0001 00001 2696+ L R2,1(R3) 005312 5823 0001 00001 2697+ L R2,1(R3) 005316 5823 0001 00001 2698+ L R2,1(R3) 2699+* 00531A 06FB 2700 BCTR R15,R11 2701 TSIMRET 00531C 58F0 C108 05338 2702+ L R15,=A(SAVETST) R15 := current save area 005320 58DF 0004 00004 2703+ L R13,4(R15) get old save area back 005324 98EC D00C 0000C 2704+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005328 07FE 2705+ BR 14 RETURN 02000000 2706 * 00532C 2707 DS 0F 00532C 0123456701234567 2708 T103V DC X'01234567',X'01234567' target for unaligned load 2709 TSIMEND 005338 2710+ LTORG 005338 00000458 2711 =A(SAVETST) 0533C 2712+T103TEND EQU * 2713 * 2714 * Test 104 -- LH R,m --------------------------------------- 2715 * 2716 TSIMBEG T104,10000,50,1,C'LH R,m' 2717+* 002564 2718+TDSCDAT CSECT 002568 2719+ DS 0D 2720+* 002568 00005340 2721+T104TDSC DC A(T104) // TENTRY 00256C 000000FE 2722+ DC A(T104TEND-T104) // TLENGTH 002570 00002710 2723+ DC F'10000' // TLRCNT 002574 00000032 2724+ DC F'50' // TIGCNT 002578 00000001 2725+ DC F'1' // TLTYPE 001003 2726+TEXT CSECT 001003 E3F1F0F4 2727+SPTR0100 DC C'T104' 00257C 2728+TDSCDAT CSECT 00257C 2729+ DS 0F 00257C 04001003 2730+ DC AL1(L'SPTR0100),AL3(SPTR0100) 001007 2731+TEXT CSECT 001007 D3C840D96B94 2732+SPTR0101 DC C'LH R,m' 002580 2733+TDSCDAT CSECT 002580 2734+ DS 0F 002580 06001007 2735+ DC AL1(L'SPTR0101),AL3(SPTR0101) 2736+* PAGE 52 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0049D8 2737+TDSCTBL CSECT 049D8 2738+T104TPTR EQU * 0049D8 00002568 2739+ DC A(T104TDSC) enabled test 2740+* 00533C 2741+TCODE CSECT 005340 2742+ DS 0D ensure double word alignment for test 005340 2743+T104 DS 0H 01650000 005340 90EC D00C 0000C 2744+ STM 14,12,12(13) SAVE REGISTERS 02950000 005344 18CF 2745+ LR R12,R15 base register := entry address 05340 2746+ USING T104,R12 declare code base register 005346 41B0 C01E 0535E 2747+ LA R11,T104L load loop target to R11 00534A 58F0 C0F8 05438 2748+ L R15,=A(SAVETST) R15 := current save area 00534E 50DF 0004 00004 2749+ ST R13,4(R15) set back pointer in current save area 005352 182D 2750+ LR R2,R13 remember callers save area 005354 18DF 2751+ LR R13,R15 setup current save area 005356 50D2 0008 00008 2752+ ST R13,8(R2) set forw pointer in callers save area 00000 2753+ USING TDSC,R1 declare TDSC base register 00535A 58F0 1008 00008 2754+ L R15,TLRCNT load local repeat count to R15 2755+* 2756 * 2757 T104L REPINS LH,(R2,=H'123') repeat: LH R2,=H'123' 2758+* 2759+* build from sublist &ALIST a comma separated string &ARGS 2760+* 2761+* 2762+* 2763+* 2764+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2765+* this allows to transfer the repeat count from last TDSCGEN call 2766+* 2767+* 0535E 2768+T104L EQU * 2769+* 2770+* write a comment indicating what REPINS does (in case NOGEN in effect) 2771+* 2772+*,// REPINS: do 50 times: 2773+* 2774+* MNOTE requires that ' is doubled for expanded variables 2775+* thus build &MASTR as a copy of '&ARGS with ' doubled 2776+* 2777+* 2778+*,// LH R2,=H'123' 2779+* 2780+* finally generate code: &ICNT copies of &CODE &ARGS 2781+* 00535E 4820 C0FC 0543C 2782+ LH R2,=H'123' 005362 4820 C0FC 0543C 2783+ LH R2,=H'123' 005366 4820 C0FC 0543C 2784+ LH R2,=H'123' 00536A 4820 C0FC 0543C 2785+ LH R2,=H'123' 00536E 4820 C0FC 0543C 2786+ LH R2,=H'123' 005372 4820 C0FC 0543C 2787+ LH R2,=H'123' 005376 4820 C0FC 0543C 2788+ LH R2,=H'123' 00537A 4820 C0FC 0543C 2789+ LH R2,=H'123' 00537E 4820 C0FC 0543C 2790+ LH R2,=H'123' 005382 4820 C0FC 0543C 2791+ LH R2,=H'123' PAGE 53 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005386 4820 C0FC 0543C 2792+ LH R2,=H'123' 00538A 4820 C0FC 0543C 2793+ LH R2,=H'123' 00538E 4820 C0FC 0543C 2794+ LH R2,=H'123' 005392 4820 C0FC 0543C 2795+ LH R2,=H'123' 005396 4820 C0FC 0543C 2796+ LH R2,=H'123' 00539A 4820 C0FC 0543C 2797+ LH R2,=H'123' 00539E 4820 C0FC 0543C 2798+ LH R2,=H'123' 0053A2 4820 C0FC 0543C 2799+ LH R2,=H'123' 0053A6 4820 C0FC 0543C 2800+ LH R2,=H'123' 0053AA 4820 C0FC 0543C 2801+ LH R2,=H'123' 0053AE 4820 C0FC 0543C 2802+ LH R2,=H'123' 0053B2 4820 C0FC 0543C 2803+ LH R2,=H'123' 0053B6 4820 C0FC 0543C 2804+ LH R2,=H'123' 0053BA 4820 C0FC 0543C 2805+ LH R2,=H'123' 0053BE 4820 C0FC 0543C 2806+ LH R2,=H'123' 0053C2 4820 C0FC 0543C 2807+ LH R2,=H'123' 0053C6 4820 C0FC 0543C 2808+ LH R2,=H'123' 0053CA 4820 C0FC 0543C 2809+ LH R2,=H'123' 0053CE 4820 C0FC 0543C 2810+ LH R2,=H'123' 0053D2 4820 C0FC 0543C 2811+ LH R2,=H'123' 0053D6 4820 C0FC 0543C 2812+ LH R2,=H'123' 0053DA 4820 C0FC 0543C 2813+ LH R2,=H'123' 0053DE 4820 C0FC 0543C 2814+ LH R2,=H'123' 0053E2 4820 C0FC 0543C 2815+ LH R2,=H'123' 0053E6 4820 C0FC 0543C 2816+ LH R2,=H'123' 0053EA 4820 C0FC 0543C 2817+ LH R2,=H'123' 0053EE 4820 C0FC 0543C 2818+ LH R2,=H'123' 0053F2 4820 C0FC 0543C 2819+ LH R2,=H'123' 0053F6 4820 C0FC 0543C 2820+ LH R2,=H'123' 0053FA 4820 C0FC 0543C 2821+ LH R2,=H'123' 0053FE 4820 C0FC 0543C 2822+ LH R2,=H'123' 005402 4820 C0FC 0543C 2823+ LH R2,=H'123' 005406 4820 C0FC 0543C 2824+ LH R2,=H'123' 00540A 4820 C0FC 0543C 2825+ LH R2,=H'123' 00540E 4820 C0FC 0543C 2826+ LH R2,=H'123' 005412 4820 C0FC 0543C 2827+ LH R2,=H'123' 005416 4820 C0FC 0543C 2828+ LH R2,=H'123' 00541A 4820 C0FC 0543C 2829+ LH R2,=H'123' 00541E 4820 C0FC 0543C 2830+ LH R2,=H'123' 005422 4820 C0FC 0543C 2831+ LH R2,=H'123' 2832+* 005426 06FB 2833 BCTR R15,R11 2834 TSIMRET 005428 58F0 C0F8 05438 2835+ L R15,=A(SAVETST) R15 := current save area 00542C 58DF 0004 00004 2836+ L R13,4(R15) get old save area back 005430 98EC D00C 0000C 2837+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005434 07FE 2838+ BR 14 RETURN 02000000 2839 TSIMEND 005438 2840+ LTORG 005438 00000458 2841 =A(SAVETST) 00543C 007B 2842 =H'123' 0543E 2843+T104TEND EQU * 2844 * 2845 * Test 105 -- LH R,m (unal3) ------------------------------- 2846 * PAGE 54 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 2847 TSIMBEG T105,10000,50,1,C'LH R,m (unal3)' 2848+* 002584 2849+TDSCDAT CSECT 002588 2850+ DS 0D 2851+* 002588 00005440 2852+T105TDSC DC A(T105) // TENTRY 00258C 0000010C 2853+ DC A(T105TEND-T105) // TLENGTH 002590 00002710 2854+ DC F'10000' // TLRCNT 002594 00000032 2855+ DC F'50' // TIGCNT 002598 00000001 2856+ DC F'1' // TLTYPE 00100D 2857+TEXT CSECT 00100D E3F1F0F5 2858+SPTR0112 DC C'T105' 00259C 2859+TDSCDAT CSECT 00259C 2860+ DS 0F 00259C 0400100D 2861+ DC AL1(L'SPTR0112),AL3(SPTR0112) 001011 2862+TEXT CSECT 001011 D3C840D96B94404D 2863+SPTR0113 DC C'LH R,m (unal3)' 0025A0 2864+TDSCDAT CSECT 0025A0 2865+ DS 0F 0025A0 0E001011 2866+ DC AL1(L'SPTR0113),AL3(SPTR0113) 2867+* 0049DC 2868+TDSCTBL CSECT 049DC 2869+T105TPTR EQU * 0049DC 00002588 2870+ DC A(T105TDSC) enabled test 2871+* 00543E 2872+TCODE CSECT 005440 2873+ DS 0D ensure double word alignment for test 005440 2874+T105 DS 0H 01650000 005440 90EC D00C 0000C 2875+ STM 14,12,12(13) SAVE REGISTERS 02950000 005444 18CF 2876+ LR R12,R15 base register := entry address 05440 2877+ USING T105,R12 declare code base register 005446 41B0 C022 05462 2878+ LA R11,T105L load loop target to R11 00544A 58F0 C108 05548 2879+ L R15,=A(SAVETST) R15 := current save area 00544E 50DF 0004 00004 2880+ ST R13,4(R15) set back pointer in current save area 005452 182D 2881+ LR R2,R13 remember callers save area 005454 18DF 2882+ LR R13,R15 setup current save area 005456 50D2 0008 00008 2883+ ST R13,8(R2) set forw pointer in callers save area 00000 2884+ USING TDSC,R1 declare TDSC base register 00545A 58F0 1008 00008 2885+ L R15,TLRCNT load local repeat count to R15 2886+* 2887 * 00545E 4130 C0FC 0553C 2888 LA R3,T105V 2889 T105L REPINS LH,(R2,3(R3)) repeat: LH R2,3(R3) 2890+* 2891+* build from sublist &ALIST a comma separated string &ARGS 2892+* 2893+* 2894+* 2895+* 2896+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2897+* this allows to transfer the repeat count from last TDSCGEN call 2898+* 2899+* 05462 2900+T105L EQU * 2901+* PAGE 55 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 2902+* write a comment indicating what REPINS does (in case NOGEN in effect) 2903+* 2904+*,// REPINS: do 50 times: 2905+* 2906+* MNOTE requires that ' is doubled for expanded variables 2907+* thus build &MASTR as a copy of '&ARGS with ' doubled 2908+* 2909+* 2910+*,// LH R2,3(R3) 2911+* 2912+* finally generate code: &ICNT copies of &CODE &ARGS 2913+* 005462 4823 0003 00003 2914+ LH R2,3(R3) 005466 4823 0003 00003 2915+ LH R2,3(R3) 00546A 4823 0003 00003 2916+ LH R2,3(R3) 00546E 4823 0003 00003 2917+ LH R2,3(R3) 005472 4823 0003 00003 2918+ LH R2,3(R3) 005476 4823 0003 00003 2919+ LH R2,3(R3) 00547A 4823 0003 00003 2920+ LH R2,3(R3) 00547E 4823 0003 00003 2921+ LH R2,3(R3) 005482 4823 0003 00003 2922+ LH R2,3(R3) 005486 4823 0003 00003 2923+ LH R2,3(R3) 00548A 4823 0003 00003 2924+ LH R2,3(R3) 00548E 4823 0003 00003 2925+ LH R2,3(R3) 005492 4823 0003 00003 2926+ LH R2,3(R3) 005496 4823 0003 00003 2927+ LH R2,3(R3) 00549A 4823 0003 00003 2928+ LH R2,3(R3) 00549E 4823 0003 00003 2929+ LH R2,3(R3) 0054A2 4823 0003 00003 2930+ LH R2,3(R3) 0054A6 4823 0003 00003 2931+ LH R2,3(R3) 0054AA 4823 0003 00003 2932+ LH R2,3(R3) 0054AE 4823 0003 00003 2933+ LH R2,3(R3) 0054B2 4823 0003 00003 2934+ LH R2,3(R3) 0054B6 4823 0003 00003 2935+ LH R2,3(R3) 0054BA 4823 0003 00003 2936+ LH R2,3(R3) 0054BE 4823 0003 00003 2937+ LH R2,3(R3) 0054C2 4823 0003 00003 2938+ LH R2,3(R3) 0054C6 4823 0003 00003 2939+ LH R2,3(R3) 0054CA 4823 0003 00003 2940+ LH R2,3(R3) 0054CE 4823 0003 00003 2941+ LH R2,3(R3) 0054D2 4823 0003 00003 2942+ LH R2,3(R3) 0054D6 4823 0003 00003 2943+ LH R2,3(R3) 0054DA 4823 0003 00003 2944+ LH R2,3(R3) 0054DE 4823 0003 00003 2945+ LH R2,3(R3) 0054E2 4823 0003 00003 2946+ LH R2,3(R3) 0054E6 4823 0003 00003 2947+ LH R2,3(R3) 0054EA 4823 0003 00003 2948+ LH R2,3(R3) 0054EE 4823 0003 00003 2949+ LH R2,3(R3) 0054F2 4823 0003 00003 2950+ LH R2,3(R3) 0054F6 4823 0003 00003 2951+ LH R2,3(R3) 0054FA 4823 0003 00003 2952+ LH R2,3(R3) 0054FE 4823 0003 00003 2953+ LH R2,3(R3) 005502 4823 0003 00003 2954+ LH R2,3(R3) 005506 4823 0003 00003 2955+ LH R2,3(R3) 00550A 4823 0003 00003 2956+ LH R2,3(R3) PAGE 56 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00550E 4823 0003 00003 2957+ LH R2,3(R3) 005512 4823 0003 00003 2958+ LH R2,3(R3) 005516 4823 0003 00003 2959+ LH R2,3(R3) 00551A 4823 0003 00003 2960+ LH R2,3(R3) 00551E 4823 0003 00003 2961+ LH R2,3(R3) 005522 4823 0003 00003 2962+ LH R2,3(R3) 005526 4823 0003 00003 2963+ LH R2,3(R3) 2964+* 00552A 06FB 2965 BCTR R15,R11 2966 TSIMRET 00552C 58F0 C108 05548 2967+ L R15,=A(SAVETST) R15 := current save area 005530 58DF 0004 00004 2968+ L R13,4(R15) get old save area back 005534 98EC D00C 0000C 2969+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005538 07FE 2970+ BR 14 RETURN 02000000 2971 * 00553C 2972 DS 0F 00553C 012301230123 2973 T105V DC X'0123',X'0123',X'0123' across word border 2974 TSIMEND 005548 2975+ LTORG 005548 00000458 2976 =A(SAVETST) 0554C 2977+T105TEND EQU * 2978 * 2979 * Test 106 -- LTR R,R -------------------------------------- 2980 * 2981 TSIMBEG T106,15000,100,1,C'LTR R,R' 2982+* 0025A4 2983+TDSCDAT CSECT 0025A8 2984+ DS 0D 2985+* 0025A8 00005550 2986+T106TDSC DC A(T106) // TENTRY 0025AC 000000FC 2987+ DC A(T106TEND-T106) // TLENGTH 0025B0 00003A98 2988+ DC F'15000' // TLRCNT 0025B4 00000064 2989+ DC F'100' // TIGCNT 0025B8 00000001 2990+ DC F'1' // TLTYPE 00101F 2991+TEXT CSECT 00101F E3F1F0F6 2992+SPTR0124 DC C'T106' 0025BC 2993+TDSCDAT CSECT 0025BC 2994+ DS 0F 0025BC 0400101F 2995+ DC AL1(L'SPTR0124),AL3(SPTR0124) 001023 2996+TEXT CSECT 001023 D3E3D940D96BD9 2997+SPTR0125 DC C'LTR R,R' 0025C0 2998+TDSCDAT CSECT 0025C0 2999+ DS 0F 0025C0 07001023 3000+ DC AL1(L'SPTR0125),AL3(SPTR0125) 3001+* 0049E0 3002+TDSCTBL CSECT 049E0 3003+T106TPTR EQU * 0049E0 000025A8 3004+ DC A(T106TDSC) enabled test 3005+* 00554C 3006+TCODE CSECT 005550 3007+ DS 0D ensure double word alignment for test 005550 3008+T106 DS 0H 01650000 005550 90EC D00C 0000C 3009+ STM 14,12,12(13) SAVE REGISTERS 02950000 005554 18CF 3010+ LR R12,R15 base register := entry address 05550 3011+ USING T106,R12 declare code base register PAGE 57 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005556 41B0 C01E 0556E 3012+ LA R11,T106L load loop target to R11 00555A 58F0 C0F8 05648 3013+ L R15,=A(SAVETST) R15 := current save area 00555E 50DF 0004 00004 3014+ ST R13,4(R15) set back pointer in current save area 005562 182D 3015+ LR R2,R13 remember callers save area 005564 18DF 3016+ LR R13,R15 setup current save area 005566 50D2 0008 00008 3017+ ST R13,8(R2) set forw pointer in callers save area 00000 3018+ USING TDSC,R1 declare TDSC base register 00556A 58F0 1008 00008 3019+ L R15,TLRCNT load local repeat count to R15 3020+* 3021 * 3022 T106L REPINS LTR,(R2,R1) repeat: LTR R2,R1 3023+* 3024+* build from sublist &ALIST a comma separated string &ARGS 3025+* 3026+* 3027+* 3028+* 3029+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3030+* this allows to transfer the repeat count from last TDSCGEN call 3031+* 3032+* 0556E 3033+T106L EQU * 3034+* 3035+* write a comment indicating what REPINS does (in case NOGEN in effect) 3036+* 3037+*,// REPINS: do 100 times: 3038+* 3039+* MNOTE requires that ' is doubled for expanded variables 3040+* thus build &MASTR as a copy of '&ARGS with ' doubled 3041+* 3042+* 3043+*,// LTR R2,R1 3044+* 3045+* finally generate code: &ICNT copies of &CODE &ARGS 3046+* 00556E 1221 3047+ LTR R2,R1 005570 1221 3048+ LTR R2,R1 005572 1221 3049+ LTR R2,R1 005574 1221 3050+ LTR R2,R1 005576 1221 3051+ LTR R2,R1 005578 1221 3052+ LTR R2,R1 00557A 1221 3053+ LTR R2,R1 00557C 1221 3054+ LTR R2,R1 00557E 1221 3055+ LTR R2,R1 005580 1221 3056+ LTR R2,R1 005582 1221 3057+ LTR R2,R1 005584 1221 3058+ LTR R2,R1 005586 1221 3059+ LTR R2,R1 005588 1221 3060+ LTR R2,R1 00558A 1221 3061+ LTR R2,R1 00558C 1221 3062+ LTR R2,R1 00558E 1221 3063+ LTR R2,R1 005590 1221 3064+ LTR R2,R1 005592 1221 3065+ LTR R2,R1 005594 1221 3066+ LTR R2,R1 PAGE 58 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005596 1221 3067+ LTR R2,R1 005598 1221 3068+ LTR R2,R1 00559A 1221 3069+ LTR R2,R1 00559C 1221 3070+ LTR R2,R1 00559E 1221 3071+ LTR R2,R1 0055A0 1221 3072+ LTR R2,R1 0055A2 1221 3073+ LTR R2,R1 0055A4 1221 3074+ LTR R2,R1 0055A6 1221 3075+ LTR R2,R1 0055A8 1221 3076+ LTR R2,R1 0055AA 1221 3077+ LTR R2,R1 0055AC 1221 3078+ LTR R2,R1 0055AE 1221 3079+ LTR R2,R1 0055B0 1221 3080+ LTR R2,R1 0055B2 1221 3081+ LTR R2,R1 0055B4 1221 3082+ LTR R2,R1 0055B6 1221 3083+ LTR R2,R1 0055B8 1221 3084+ LTR R2,R1 0055BA 1221 3085+ LTR R2,R1 0055BC 1221 3086+ LTR R2,R1 0055BE 1221 3087+ LTR R2,R1 0055C0 1221 3088+ LTR R2,R1 0055C2 1221 3089+ LTR R2,R1 0055C4 1221 3090+ LTR R2,R1 0055C6 1221 3091+ LTR R2,R1 0055C8 1221 3092+ LTR R2,R1 0055CA 1221 3093+ LTR R2,R1 0055CC 1221 3094+ LTR R2,R1 0055CE 1221 3095+ LTR R2,R1 0055D0 1221 3096+ LTR R2,R1 0055D2 1221 3097+ LTR R2,R1 0055D4 1221 3098+ LTR R2,R1 0055D6 1221 3099+ LTR R2,R1 0055D8 1221 3100+ LTR R2,R1 0055DA 1221 3101+ LTR R2,R1 0055DC 1221 3102+ LTR R2,R1 0055DE 1221 3103+ LTR R2,R1 0055E0 1221 3104+ LTR R2,R1 0055E2 1221 3105+ LTR R2,R1 0055E4 1221 3106+ LTR R2,R1 0055E6 1221 3107+ LTR R2,R1 0055E8 1221 3108+ LTR R2,R1 0055EA 1221 3109+ LTR R2,R1 0055EC 1221 3110+ LTR R2,R1 0055EE 1221 3111+ LTR R2,R1 0055F0 1221 3112+ LTR R2,R1 0055F2 1221 3113+ LTR R2,R1 0055F4 1221 3114+ LTR R2,R1 0055F6 1221 3115+ LTR R2,R1 0055F8 1221 3116+ LTR R2,R1 0055FA 1221 3117+ LTR R2,R1 0055FC 1221 3118+ LTR R2,R1 0055FE 1221 3119+ LTR R2,R1 005600 1221 3120+ LTR R2,R1 005602 1221 3121+ LTR R2,R1 PAGE 59 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005604 1221 3122+ LTR R2,R1 005606 1221 3123+ LTR R2,R1 005608 1221 3124+ LTR R2,R1 00560A 1221 3125+ LTR R2,R1 00560C 1221 3126+ LTR R2,R1 00560E 1221 3127+ LTR R2,R1 005610 1221 3128+ LTR R2,R1 005612 1221 3129+ LTR R2,R1 005614 1221 3130+ LTR R2,R1 005616 1221 3131+ LTR R2,R1 005618 1221 3132+ LTR R2,R1 00561A 1221 3133+ LTR R2,R1 00561C 1221 3134+ LTR R2,R1 00561E 1221 3135+ LTR R2,R1 005620 1221 3136+ LTR R2,R1 005622 1221 3137+ LTR R2,R1 005624 1221 3138+ LTR R2,R1 005626 1221 3139+ LTR R2,R1 005628 1221 3140+ LTR R2,R1 00562A 1221 3141+ LTR R2,R1 00562C 1221 3142+ LTR R2,R1 00562E 1221 3143+ LTR R2,R1 005630 1221 3144+ LTR R2,R1 005632 1221 3145+ LTR R2,R1 005634 1221 3146+ LTR R2,R1 3147+* 005636 06FB 3148 BCTR R15,R11 3149 TSIMRET 005638 58F0 C0F8 05648 3150+ L R15,=A(SAVETST) R15 := current save area 00563C 58DF 0004 00004 3151+ L R13,4(R15) get old save area back 005640 98EC D00C 0000C 3152+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005644 07FE 3153+ BR 14 RETURN 02000000 3154 TSIMEND 005648 3155+ LTORG 005648 00000458 3156 =A(SAVETST) 0564C 3157+T106TEND EQU * 3158 * 3159 * Test 107 -- LCR R,R -------------------------------------- 3160 * 3161 TSIMBEG T107,13000,100,1,C'LCR R,R' 3162+* 0025C4 3163+TDSCDAT CSECT 0025C8 3164+ DS 0D 3165+* 0025C8 00005650 3166+T107TDSC DC A(T107) // TENTRY 0025CC 00000108 3167+ DC A(T107TEND-T107) // TLENGTH 0025D0 000032C8 3168+ DC F'13000' // TLRCNT 0025D4 00000064 3169+ DC F'100' // TIGCNT 0025D8 00000001 3170+ DC F'1' // TLTYPE 00102A 3171+TEXT CSECT 00102A E3F1F0F7 3172+SPTR0136 DC C'T107' 0025DC 3173+TDSCDAT CSECT 0025DC 3174+ DS 0F 0025DC 0400102A 3175+ DC AL1(L'SPTR0136),AL3(SPTR0136) 00102E 3176+TEXT CSECT PAGE 60 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00102E D3C3D940D96BD9 3177+SPTR0137 DC C'LCR R,R' 0025E0 3178+TDSCDAT CSECT 0025E0 3179+ DS 0F 0025E0 0700102E 3180+ DC AL1(L'SPTR0137),AL3(SPTR0137) 3181+* 0049E4 3182+TDSCTBL CSECT 049E4 3183+T107TPTR EQU * 0049E4 000025C8 3184+ DC A(T107TDSC) enabled test 3185+* 00564C 3186+TCODE CSECT 005650 3187+ DS 0D ensure double word alignment for test 005650 3188+T107 DS 0H 01650000 005650 90EC D00C 0000C 3189+ STM 14,12,12(13) SAVE REGISTERS 02950000 005654 18CF 3190+ LR R12,R15 base register := entry address 05650 3191+ USING T107,R12 declare code base register 005656 41B0 C022 05672 3192+ LA R11,T107L load loop target to R11 00565A 58F0 C100 05750 3193+ L R15,=A(SAVETST) R15 := current save area 00565E 50DF 0004 00004 3194+ ST R13,4(R15) set back pointer in current save area 005662 182D 3195+ LR R2,R13 remember callers save area 005664 18DF 3196+ LR R13,R15 setup current save area 005666 50D2 0008 00008 3197+ ST R13,8(R2) set forw pointer in callers save area 00000 3198+ USING TDSC,R1 declare TDSC base register 00566A 58F0 1008 00008 3199+ L R15,TLRCNT load local repeat count to R15 3200+* 3201 * 00566E 4120 C104 05754 3202 LA R2,=F'1234' 3203 T107L REPINS LCR,(R2,R2) repeat: LCR R2,R2 3204+* 3205+* build from sublist &ALIST a comma separated string &ARGS 3206+* 3207+* 3208+* 3209+* 3210+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3211+* this allows to transfer the repeat count from last TDSCGEN call 3212+* 3213+* 05672 3214+T107L EQU * 3215+* 3216+* write a comment indicating what REPINS does (in case NOGEN in effect) 3217+* 3218+*,// REPINS: do 100 times: 3219+* 3220+* MNOTE requires that ' is doubled for expanded variables 3221+* thus build &MASTR as a copy of '&ARGS with ' doubled 3222+* 3223+* 3224+*,// LCR R2,R2 3225+* 3226+* finally generate code: &ICNT copies of &CODE &ARGS 3227+* 005672 1322 3228+ LCR R2,R2 005674 1322 3229+ LCR R2,R2 005676 1322 3230+ LCR R2,R2 005678 1322 3231+ LCR R2,R2 PAGE 61 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00567A 1322 3232+ LCR R2,R2 00567C 1322 3233+ LCR R2,R2 00567E 1322 3234+ LCR R2,R2 005680 1322 3235+ LCR R2,R2 005682 1322 3236+ LCR R2,R2 005684 1322 3237+ LCR R2,R2 005686 1322 3238+ LCR R2,R2 005688 1322 3239+ LCR R2,R2 00568A 1322 3240+ LCR R2,R2 00568C 1322 3241+ LCR R2,R2 00568E 1322 3242+ LCR R2,R2 005690 1322 3243+ LCR R2,R2 005692 1322 3244+ LCR R2,R2 005694 1322 3245+ LCR R2,R2 005696 1322 3246+ LCR R2,R2 005698 1322 3247+ LCR R2,R2 00569A 1322 3248+ LCR R2,R2 00569C 1322 3249+ LCR R2,R2 00569E 1322 3250+ LCR R2,R2 0056A0 1322 3251+ LCR R2,R2 0056A2 1322 3252+ LCR R2,R2 0056A4 1322 3253+ LCR R2,R2 0056A6 1322 3254+ LCR R2,R2 0056A8 1322 3255+ LCR R2,R2 0056AA 1322 3256+ LCR R2,R2 0056AC 1322 3257+ LCR R2,R2 0056AE 1322 3258+ LCR R2,R2 0056B0 1322 3259+ LCR R2,R2 0056B2 1322 3260+ LCR R2,R2 0056B4 1322 3261+ LCR R2,R2 0056B6 1322 3262+ LCR R2,R2 0056B8 1322 3263+ LCR R2,R2 0056BA 1322 3264+ LCR R2,R2 0056BC 1322 3265+ LCR R2,R2 0056BE 1322 3266+ LCR R2,R2 0056C0 1322 3267+ LCR R2,R2 0056C2 1322 3268+ LCR R2,R2 0056C4 1322 3269+ LCR R2,R2 0056C6 1322 3270+ LCR R2,R2 0056C8 1322 3271+ LCR R2,R2 0056CA 1322 3272+ LCR R2,R2 0056CC 1322 3273+ LCR R2,R2 0056CE 1322 3274+ LCR R2,R2 0056D0 1322 3275+ LCR R2,R2 0056D2 1322 3276+ LCR R2,R2 0056D4 1322 3277+ LCR R2,R2 0056D6 1322 3278+ LCR R2,R2 0056D8 1322 3279+ LCR R2,R2 0056DA 1322 3280+ LCR R2,R2 0056DC 1322 3281+ LCR R2,R2 0056DE 1322 3282+ LCR R2,R2 0056E0 1322 3283+ LCR R2,R2 0056E2 1322 3284+ LCR R2,R2 0056E4 1322 3285+ LCR R2,R2 0056E6 1322 3286+ LCR R2,R2 PAGE 62 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0056E8 1322 3287+ LCR R2,R2 0056EA 1322 3288+ LCR R2,R2 0056EC 1322 3289+ LCR R2,R2 0056EE 1322 3290+ LCR R2,R2 0056F0 1322 3291+ LCR R2,R2 0056F2 1322 3292+ LCR R2,R2 0056F4 1322 3293+ LCR R2,R2 0056F6 1322 3294+ LCR R2,R2 0056F8 1322 3295+ LCR R2,R2 0056FA 1322 3296+ LCR R2,R2 0056FC 1322 3297+ LCR R2,R2 0056FE 1322 3298+ LCR R2,R2 005700 1322 3299+ LCR R2,R2 005702 1322 3300+ LCR R2,R2 005704 1322 3301+ LCR R2,R2 005706 1322 3302+ LCR R2,R2 005708 1322 3303+ LCR R2,R2 00570A 1322 3304+ LCR R2,R2 00570C 1322 3305+ LCR R2,R2 00570E 1322 3306+ LCR R2,R2 005710 1322 3307+ LCR R2,R2 005712 1322 3308+ LCR R2,R2 005714 1322 3309+ LCR R2,R2 005716 1322 3310+ LCR R2,R2 005718 1322 3311+ LCR R2,R2 00571A 1322 3312+ LCR R2,R2 00571C 1322 3313+ LCR R2,R2 00571E 1322 3314+ LCR R2,R2 005720 1322 3315+ LCR R2,R2 005722 1322 3316+ LCR R2,R2 005724 1322 3317+ LCR R2,R2 005726 1322 3318+ LCR R2,R2 005728 1322 3319+ LCR R2,R2 00572A 1322 3320+ LCR R2,R2 00572C 1322 3321+ LCR R2,R2 00572E 1322 3322+ LCR R2,R2 005730 1322 3323+ LCR R2,R2 005732 1322 3324+ LCR R2,R2 005734 1322 3325+ LCR R2,R2 005736 1322 3326+ LCR R2,R2 005738 1322 3327+ LCR R2,R2 3328+* 00573A 06FB 3329 BCTR R15,R11 3330 TSIMRET 00573C 58F0 C100 05750 3331+ L R15,=A(SAVETST) R15 := current save area 005740 58DF 0004 00004 3332+ L R13,4(R15) get old save area back 005744 98EC D00C 0000C 3333+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005748 07FE 3334+ BR 14 RETURN 02000000 3335 TSIMEND 005750 3336+ LTORG 005750 00000458 3337 =A(SAVETST) 005754 000004D2 3338 =F'1234' 05758 3339+T107TEND EQU * 3340 * 3341 * Test 108 -- LNR R,R -------------------------------------- PAGE 63 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 3342 * 3343 TSIMBEG T108,13000,100,1,C'LNR R,R' 3344+* 0025E4 3345+TDSCDAT CSECT 0025E8 3346+ DS 0D 3347+* 0025E8 00005758 3348+T108TDSC DC A(T108) // TENTRY 0025EC 00000108 3349+ DC A(T108TEND-T108) // TLENGTH 0025F0 000032C8 3350+ DC F'13000' // TLRCNT 0025F4 00000064 3351+ DC F'100' // TIGCNT 0025F8 00000001 3352+ DC F'1' // TLTYPE 001035 3353+TEXT CSECT 001035 E3F1F0F8 3354+SPTR0148 DC C'T108' 0025FC 3355+TDSCDAT CSECT 0025FC 3356+ DS 0F 0025FC 04001035 3357+ DC AL1(L'SPTR0148),AL3(SPTR0148) 001039 3358+TEXT CSECT 001039 D3D5D940D96BD9 3359+SPTR0149 DC C'LNR R,R' 002600 3360+TDSCDAT CSECT 002600 3361+ DS 0F 002600 07001039 3362+ DC AL1(L'SPTR0149),AL3(SPTR0149) 3363+* 0049E8 3364+TDSCTBL CSECT 049E8 3365+T108TPTR EQU * 0049E8 000025E8 3366+ DC A(T108TDSC) enabled test 3367+* 005758 3368+TCODE CSECT 005758 3369+ DS 0D ensure double word alignment for test 005758 3370+T108 DS 0H 01650000 005758 90EC D00C 0000C 3371+ STM 14,12,12(13) SAVE REGISTERS 02950000 00575C 18CF 3372+ LR R12,R15 base register := entry address 05758 3373+ USING T108,R12 declare code base register 00575E 41B0 C022 0577A 3374+ LA R11,T108L load loop target to R11 005762 58F0 C100 05858 3375+ L R15,=A(SAVETST) R15 := current save area 005766 50DF 0004 00004 3376+ ST R13,4(R15) set back pointer in current save area 00576A 182D 3377+ LR R2,R13 remember callers save area 00576C 18DF 3378+ LR R13,R15 setup current save area 00576E 50D2 0008 00008 3379+ ST R13,8(R2) set forw pointer in callers save area 00000 3380+ USING TDSC,R1 declare TDSC base register 005772 58F0 1008 00008 3381+ L R15,TLRCNT load local repeat count to R15 3382+* 3383 * 005776 4110 C104 0585C 3384 LA R1,=F'1234' 3385 T108L REPINS LNR,(R2,R1) repeat: LNR R2,R1 3386+* 3387+* build from sublist &ALIST a comma separated string &ARGS 3388+* 3389+* 3390+* 3391+* 3392+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3393+* this allows to transfer the repeat count from last TDSCGEN call 3394+* 3395+* 0577A 3396+T108L EQU * PAGE 64 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 3397+* 3398+* write a comment indicating what REPINS does (in case NOGEN in effect) 3399+* 3400+*,// REPINS: do 100 times: 3401+* 3402+* MNOTE requires that ' is doubled for expanded variables 3403+* thus build &MASTR as a copy of '&ARGS with ' doubled 3404+* 3405+* 3406+*,// LNR R2,R1 3407+* 3408+* finally generate code: &ICNT copies of &CODE &ARGS 3409+* 00577A 1121 3410+ LNR R2,R1 00577C 1121 3411+ LNR R2,R1 00577E 1121 3412+ LNR R2,R1 005780 1121 3413+ LNR R2,R1 005782 1121 3414+ LNR R2,R1 005784 1121 3415+ LNR R2,R1 005786 1121 3416+ LNR R2,R1 005788 1121 3417+ LNR R2,R1 00578A 1121 3418+ LNR R2,R1 00578C 1121 3419+ LNR R2,R1 00578E 1121 3420+ LNR R2,R1 005790 1121 3421+ LNR R2,R1 005792 1121 3422+ LNR R2,R1 005794 1121 3423+ LNR R2,R1 005796 1121 3424+ LNR R2,R1 005798 1121 3425+ LNR R2,R1 00579A 1121 3426+ LNR R2,R1 00579C 1121 3427+ LNR R2,R1 00579E 1121 3428+ LNR R2,R1 0057A0 1121 3429+ LNR R2,R1 0057A2 1121 3430+ LNR R2,R1 0057A4 1121 3431+ LNR R2,R1 0057A6 1121 3432+ LNR R2,R1 0057A8 1121 3433+ LNR R2,R1 0057AA 1121 3434+ LNR R2,R1 0057AC 1121 3435+ LNR R2,R1 0057AE 1121 3436+ LNR R2,R1 0057B0 1121 3437+ LNR R2,R1 0057B2 1121 3438+ LNR R2,R1 0057B4 1121 3439+ LNR R2,R1 0057B6 1121 3440+ LNR R2,R1 0057B8 1121 3441+ LNR R2,R1 0057BA 1121 3442+ LNR R2,R1 0057BC 1121 3443+ LNR R2,R1 0057BE 1121 3444+ LNR R2,R1 0057C0 1121 3445+ LNR R2,R1 0057C2 1121 3446+ LNR R2,R1 0057C4 1121 3447+ LNR R2,R1 0057C6 1121 3448+ LNR R2,R1 0057C8 1121 3449+ LNR R2,R1 0057CA 1121 3450+ LNR R2,R1 0057CC 1121 3451+ LNR R2,R1 PAGE 65 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0057CE 1121 3452+ LNR R2,R1 0057D0 1121 3453+ LNR R2,R1 0057D2 1121 3454+ LNR R2,R1 0057D4 1121 3455+ LNR R2,R1 0057D6 1121 3456+ LNR R2,R1 0057D8 1121 3457+ LNR R2,R1 0057DA 1121 3458+ LNR R2,R1 0057DC 1121 3459+ LNR R2,R1 0057DE 1121 3460+ LNR R2,R1 0057E0 1121 3461+ LNR R2,R1 0057E2 1121 3462+ LNR R2,R1 0057E4 1121 3463+ LNR R2,R1 0057E6 1121 3464+ LNR R2,R1 0057E8 1121 3465+ LNR R2,R1 0057EA 1121 3466+ LNR R2,R1 0057EC 1121 3467+ LNR R2,R1 0057EE 1121 3468+ LNR R2,R1 0057F0 1121 3469+ LNR R2,R1 0057F2 1121 3470+ LNR R2,R1 0057F4 1121 3471+ LNR R2,R1 0057F6 1121 3472+ LNR R2,R1 0057F8 1121 3473+ LNR R2,R1 0057FA 1121 3474+ LNR R2,R1 0057FC 1121 3475+ LNR R2,R1 0057FE 1121 3476+ LNR R2,R1 005800 1121 3477+ LNR R2,R1 005802 1121 3478+ LNR R2,R1 005804 1121 3479+ LNR R2,R1 005806 1121 3480+ LNR R2,R1 005808 1121 3481+ LNR R2,R1 00580A 1121 3482+ LNR R2,R1 00580C 1121 3483+ LNR R2,R1 00580E 1121 3484+ LNR R2,R1 005810 1121 3485+ LNR R2,R1 005812 1121 3486+ LNR R2,R1 005814 1121 3487+ LNR R2,R1 005816 1121 3488+ LNR R2,R1 005818 1121 3489+ LNR R2,R1 00581A 1121 3490+ LNR R2,R1 00581C 1121 3491+ LNR R2,R1 00581E 1121 3492+ LNR R2,R1 005820 1121 3493+ LNR R2,R1 005822 1121 3494+ LNR R2,R1 005824 1121 3495+ LNR R2,R1 005826 1121 3496+ LNR R2,R1 005828 1121 3497+ LNR R2,R1 00582A 1121 3498+ LNR R2,R1 00582C 1121 3499+ LNR R2,R1 00582E 1121 3500+ LNR R2,R1 005830 1121 3501+ LNR R2,R1 005832 1121 3502+ LNR R2,R1 005834 1121 3503+ LNR R2,R1 005836 1121 3504+ LNR R2,R1 005838 1121 3505+ LNR R2,R1 00583A 1121 3506+ LNR R2,R1 PAGE 66 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00583C 1121 3507+ LNR R2,R1 00583E 1121 3508+ LNR R2,R1 005840 1121 3509+ LNR R2,R1 3510+* 005842 06FB 3511 BCTR R15,R11 3512 TSIMRET 005844 58F0 C100 05858 3513+ L R15,=A(SAVETST) R15 := current save area 005848 58DF 0004 00004 3514+ L R13,4(R15) get old save area back 00584C 98EC D00C 0000C 3515+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005850 07FE 3516+ BR 14 RETURN 02000000 3517 TSIMEND 005858 3518+ LTORG 005858 00000458 3519 =A(SAVETST) 00585C 000004D2 3520 =F'1234' 05860 3521+T108TEND EQU * 3522 * 3523 * Test 109 -- LPR R,R -------------------------------------- 3524 * 3525 TSIMBEG T109,13000,100,1,C'LPR R,R' 3526+* 002604 3527+TDSCDAT CSECT 002608 3528+ DS 0D 3529+* 002608 00005860 3530+T109TDSC DC A(T109) // TENTRY 00260C 00000108 3531+ DC A(T109TEND-T109) // TLENGTH 002610 000032C8 3532+ DC F'13000' // TLRCNT 002614 00000064 3533+ DC F'100' // TIGCNT 002618 00000001 3534+ DC F'1' // TLTYPE 001040 3535+TEXT CSECT 001040 E3F1F0F9 3536+SPTR0160 DC C'T109' 00261C 3537+TDSCDAT CSECT 00261C 3538+ DS 0F 00261C 04001040 3539+ DC AL1(L'SPTR0160),AL3(SPTR0160) 001044 3540+TEXT CSECT 001044 D3D7D940D96BD9 3541+SPTR0161 DC C'LPR R,R' 002620 3542+TDSCDAT CSECT 002620 3543+ DS 0F 002620 07001044 3544+ DC AL1(L'SPTR0161),AL3(SPTR0161) 3545+* 0049EC 3546+TDSCTBL CSECT 049EC 3547+T109TPTR EQU * 0049EC 00002608 3548+ DC A(T109TDSC) enabled test 3549+* 005860 3550+TCODE CSECT 005860 3551+ DS 0D ensure double word alignment for test 005860 3552+T109 DS 0H 01650000 005860 90EC D00C 0000C 3553+ STM 14,12,12(13) SAVE REGISTERS 02950000 005864 18CF 3554+ LR R12,R15 base register := entry address 05860 3555+ USING T109,R12 declare code base register 005866 41B0 C022 05882 3556+ LA R11,T109L load loop target to R11 00586A 58F0 C100 05960 3557+ L R15,=A(SAVETST) R15 := current save area 00586E 50DF 0004 00004 3558+ ST R13,4(R15) set back pointer in current save area 005872 182D 3559+ LR R2,R13 remember callers save area 005874 18DF 3560+ LR R13,R15 setup current save area 005876 50D2 0008 00008 3561+ ST R13,8(R2) set forw pointer in callers save area PAGE 67 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00000 3562+ USING TDSC,R1 declare TDSC base register 00587A 58F0 1008 00008 3563+ L R15,TLRCNT load local repeat count to R15 3564+* 3565 * 00587E 4110 C104 05964 3566 LA R1,=F'-1234' 3567 T109L REPINS LPR,(R2,R1) repeat: LPR R2,R1 3568+* 3569+* build from sublist &ALIST a comma separated string &ARGS 3570+* 3571+* 3572+* 3573+* 3574+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3575+* this allows to transfer the repeat count from last TDSCGEN call 3576+* 3577+* 05882 3578+T109L EQU * 3579+* 3580+* write a comment indicating what REPINS does (in case NOGEN in effect) 3581+* 3582+*,// REPINS: do 100 times: 3583+* 3584+* MNOTE requires that ' is doubled for expanded variables 3585+* thus build &MASTR as a copy of '&ARGS with ' doubled 3586+* 3587+* 3588+*,// LPR R2,R1 3589+* 3590+* finally generate code: &ICNT copies of &CODE &ARGS 3591+* 005882 1021 3592+ LPR R2,R1 005884 1021 3593+ LPR R2,R1 005886 1021 3594+ LPR R2,R1 005888 1021 3595+ LPR R2,R1 00588A 1021 3596+ LPR R2,R1 00588C 1021 3597+ LPR R2,R1 00588E 1021 3598+ LPR R2,R1 005890 1021 3599+ LPR R2,R1 005892 1021 3600+ LPR R2,R1 005894 1021 3601+ LPR R2,R1 005896 1021 3602+ LPR R2,R1 005898 1021 3603+ LPR R2,R1 00589A 1021 3604+ LPR R2,R1 00589C 1021 3605+ LPR R2,R1 00589E 1021 3606+ LPR R2,R1 0058A0 1021 3607+ LPR R2,R1 0058A2 1021 3608+ LPR R2,R1 0058A4 1021 3609+ LPR R2,R1 0058A6 1021 3610+ LPR R2,R1 0058A8 1021 3611+ LPR R2,R1 0058AA 1021 3612+ LPR R2,R1 0058AC 1021 3613+ LPR R2,R1 0058AE 1021 3614+ LPR R2,R1 0058B0 1021 3615+ LPR R2,R1 0058B2 1021 3616+ LPR R2,R1 PAGE 68 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0058B4 1021 3617+ LPR R2,R1 0058B6 1021 3618+ LPR R2,R1 0058B8 1021 3619+ LPR R2,R1 0058BA 1021 3620+ LPR R2,R1 0058BC 1021 3621+ LPR R2,R1 0058BE 1021 3622+ LPR R2,R1 0058C0 1021 3623+ LPR R2,R1 0058C2 1021 3624+ LPR R2,R1 0058C4 1021 3625+ LPR R2,R1 0058C6 1021 3626+ LPR R2,R1 0058C8 1021 3627+ LPR R2,R1 0058CA 1021 3628+ LPR R2,R1 0058CC 1021 3629+ LPR R2,R1 0058CE 1021 3630+ LPR R2,R1 0058D0 1021 3631+ LPR R2,R1 0058D2 1021 3632+ LPR R2,R1 0058D4 1021 3633+ LPR R2,R1 0058D6 1021 3634+ LPR R2,R1 0058D8 1021 3635+ LPR R2,R1 0058DA 1021 3636+ LPR R2,R1 0058DC 1021 3637+ LPR R2,R1 0058DE 1021 3638+ LPR R2,R1 0058E0 1021 3639+ LPR R2,R1 0058E2 1021 3640+ LPR R2,R1 0058E4 1021 3641+ LPR R2,R1 0058E6 1021 3642+ LPR R2,R1 0058E8 1021 3643+ LPR R2,R1 0058EA 1021 3644+ LPR R2,R1 0058EC 1021 3645+ LPR R2,R1 0058EE 1021 3646+ LPR R2,R1 0058F0 1021 3647+ LPR R2,R1 0058F2 1021 3648+ LPR R2,R1 0058F4 1021 3649+ LPR R2,R1 0058F6 1021 3650+ LPR R2,R1 0058F8 1021 3651+ LPR R2,R1 0058FA 1021 3652+ LPR R2,R1 0058FC 1021 3653+ LPR R2,R1 0058FE 1021 3654+ LPR R2,R1 005900 1021 3655+ LPR R2,R1 005902 1021 3656+ LPR R2,R1 005904 1021 3657+ LPR R2,R1 005906 1021 3658+ LPR R2,R1 005908 1021 3659+ LPR R2,R1 00590A 1021 3660+ LPR R2,R1 00590C 1021 3661+ LPR R2,R1 00590E 1021 3662+ LPR R2,R1 005910 1021 3663+ LPR R2,R1 005912 1021 3664+ LPR R2,R1 005914 1021 3665+ LPR R2,R1 005916 1021 3666+ LPR R2,R1 005918 1021 3667+ LPR R2,R1 00591A 1021 3668+ LPR R2,R1 00591C 1021 3669+ LPR R2,R1 00591E 1021 3670+ LPR R2,R1 005920 1021 3671+ LPR R2,R1 PAGE 69 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005922 1021 3672+ LPR R2,R1 005924 1021 3673+ LPR R2,R1 005926 1021 3674+ LPR R2,R1 005928 1021 3675+ LPR R2,R1 00592A 1021 3676+ LPR R2,R1 00592C 1021 3677+ LPR R2,R1 00592E 1021 3678+ LPR R2,R1 005930 1021 3679+ LPR R2,R1 005932 1021 3680+ LPR R2,R1 005934 1021 3681+ LPR R2,R1 005936 1021 3682+ LPR R2,R1 005938 1021 3683+ LPR R2,R1 00593A 1021 3684+ LPR R2,R1 00593C 1021 3685+ LPR R2,R1 00593E 1021 3686+ LPR R2,R1 005940 1021 3687+ LPR R2,R1 005942 1021 3688+ LPR R2,R1 005944 1021 3689+ LPR R2,R1 005946 1021 3690+ LPR R2,R1 005948 1021 3691+ LPR R2,R1 3692+* 00594A 06FB 3693 BCTR R15,R11 3694 TSIMRET 00594C 58F0 C100 05960 3695+ L R15,=A(SAVETST) R15 := current save area 005950 58DF 0004 00004 3696+ L R13,4(R15) get old save area back 005954 98EC D00C 0000C 3697+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005958 07FE 3698+ BR 14 RETURN 02000000 3699 TSIMEND 005960 3700+ LTORG 005960 00000458 3701 =A(SAVETST) 005964 FFFFFB2E 3702 =F'-1234' 05968 3703+T109TEND EQU * 3704 * 3705 * Test 11x -- store ======================================== 3706 * 3707 * Test 110 -- ST R,m --------------------------------------- 3708 * 3709 TSIMBEG T110,13000,50,1,C'ST R,m' 3710+* 002624 3711+TDSCDAT CSECT 002628 3712+ DS 0D 3713+* 002628 00005968 3714+T110TDSC DC A(T110) // TENTRY 00262C 00000104 3715+ DC A(T110TEND-T110) // TLENGTH 002630 000032C8 3716+ DC F'13000' // TLRCNT 002634 00000032 3717+ DC F'50' // TIGCNT 002638 00000001 3718+ DC F'1' // TLTYPE 00104B 3719+TEXT CSECT 00104B E3F1F1F0 3720+SPTR0172 DC C'T110' 00263C 3721+TDSCDAT CSECT 00263C 3722+ DS 0F 00263C 0400104B 3723+ DC AL1(L'SPTR0172),AL3(SPTR0172) 00104F 3724+TEXT CSECT 00104F E2E340D96B94 3725+SPTR0173 DC C'ST R,m' 002640 3726+TDSCDAT CSECT PAGE 70 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002640 3727+ DS 0F 002640 0600104F 3728+ DC AL1(L'SPTR0173),AL3(SPTR0173) 3729+* 0049F0 3730+TDSCTBL CSECT 049F0 3731+T110TPTR EQU * 0049F0 00002628 3732+ DC A(T110TDSC) enabled test 3733+* 005968 3734+TCODE CSECT 005968 3735+ DS 0D ensure double word alignment for test 005968 3736+T110 DS 0H 01650000 005968 90EC D00C 0000C 3737+ STM 14,12,12(13) SAVE REGISTERS 02950000 00596C 18CF 3738+ LR R12,R15 base register := entry address 05968 3739+ USING T110,R12 declare code base register 00596E 41B0 C01E 05986 3740+ LA R11,T110L load loop target to R11 005972 58F0 C100 05A68 3741+ L R15,=A(SAVETST) R15 := current save area 005976 50DF 0004 00004 3742+ ST R13,4(R15) set back pointer in current save area 00597A 182D 3743+ LR R2,R13 remember callers save area 00597C 18DF 3744+ LR R13,R15 setup current save area 00597E 50D2 0008 00008 3745+ ST R13,8(R2) set forw pointer in callers save area 00000 3746+ USING TDSC,R1 declare TDSC base register 005982 58F0 1008 00008 3747+ L R15,TLRCNT load local repeat count to R15 3748+* 3749 * 3750 T110L REPINS ST,(R2,T110V) repeat: ST R2,T110V 3751+* 3752+* build from sublist &ALIST a comma separated string &ARGS 3753+* 3754+* 3755+* 3756+* 3757+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3758+* this allows to transfer the repeat count from last TDSCGEN call 3759+* 3760+* 05986 3761+T110L EQU * 3762+* 3763+* write a comment indicating what REPINS does (in case NOGEN in effect) 3764+* 3765+*,// REPINS: do 50 times: 3766+* 3767+* MNOTE requires that ' is doubled for expanded variables 3768+* thus build &MASTR as a copy of '&ARGS with ' doubled 3769+* 3770+* 3771+*,// ST R2,T110V 3772+* 3773+* finally generate code: &ICNT copies of &CODE &ARGS 3774+* 005986 5020 C0F8 05A60 3775+ ST R2,T110V 00598A 5020 C0F8 05A60 3776+ ST R2,T110V 00598E 5020 C0F8 05A60 3777+ ST R2,T110V 005992 5020 C0F8 05A60 3778+ ST R2,T110V 005996 5020 C0F8 05A60 3779+ ST R2,T110V 00599A 5020 C0F8 05A60 3780+ ST R2,T110V 00599E 5020 C0F8 05A60 3781+ ST R2,T110V PAGE 71 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0059A2 5020 C0F8 05A60 3782+ ST R2,T110V 0059A6 5020 C0F8 05A60 3783+ ST R2,T110V 0059AA 5020 C0F8 05A60 3784+ ST R2,T110V 0059AE 5020 C0F8 05A60 3785+ ST R2,T110V 0059B2 5020 C0F8 05A60 3786+ ST R2,T110V 0059B6 5020 C0F8 05A60 3787+ ST R2,T110V 0059BA 5020 C0F8 05A60 3788+ ST R2,T110V 0059BE 5020 C0F8 05A60 3789+ ST R2,T110V 0059C2 5020 C0F8 05A60 3790+ ST R2,T110V 0059C6 5020 C0F8 05A60 3791+ ST R2,T110V 0059CA 5020 C0F8 05A60 3792+ ST R2,T110V 0059CE 5020 C0F8 05A60 3793+ ST R2,T110V 0059D2 5020 C0F8 05A60 3794+ ST R2,T110V 0059D6 5020 C0F8 05A60 3795+ ST R2,T110V 0059DA 5020 C0F8 05A60 3796+ ST R2,T110V 0059DE 5020 C0F8 05A60 3797+ ST R2,T110V 0059E2 5020 C0F8 05A60 3798+ ST R2,T110V 0059E6 5020 C0F8 05A60 3799+ ST R2,T110V 0059EA 5020 C0F8 05A60 3800+ ST R2,T110V 0059EE 5020 C0F8 05A60 3801+ ST R2,T110V 0059F2 5020 C0F8 05A60 3802+ ST R2,T110V 0059F6 5020 C0F8 05A60 3803+ ST R2,T110V 0059FA 5020 C0F8 05A60 3804+ ST R2,T110V 0059FE 5020 C0F8 05A60 3805+ ST R2,T110V 005A02 5020 C0F8 05A60 3806+ ST R2,T110V 005A06 5020 C0F8 05A60 3807+ ST R2,T110V 005A0A 5020 C0F8 05A60 3808+ ST R2,T110V 005A0E 5020 C0F8 05A60 3809+ ST R2,T110V 005A12 5020 C0F8 05A60 3810+ ST R2,T110V 005A16 5020 C0F8 05A60 3811+ ST R2,T110V 005A1A 5020 C0F8 05A60 3812+ ST R2,T110V 005A1E 5020 C0F8 05A60 3813+ ST R2,T110V 005A22 5020 C0F8 05A60 3814+ ST R2,T110V 005A26 5020 C0F8 05A60 3815+ ST R2,T110V 005A2A 5020 C0F8 05A60 3816+ ST R2,T110V 005A2E 5020 C0F8 05A60 3817+ ST R2,T110V 005A32 5020 C0F8 05A60 3818+ ST R2,T110V 005A36 5020 C0F8 05A60 3819+ ST R2,T110V 005A3A 5020 C0F8 05A60 3820+ ST R2,T110V 005A3E 5020 C0F8 05A60 3821+ ST R2,T110V 005A42 5020 C0F8 05A60 3822+ ST R2,T110V 005A46 5020 C0F8 05A60 3823+ ST R2,T110V 005A4A 5020 C0F8 05A60 3824+ ST R2,T110V 3825+* 005A4E 06FB 3826 BCTR R15,R11 3827 TSIMRET 005A50 58F0 C100 05A68 3828+ L R15,=A(SAVETST) R15 := current save area 005A54 58DF 0004 00004 3829+ L R13,4(R15) get old save area back 005A58 98EC D00C 0000C 3830+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005A5C 07FE 3831+ BR 14 RETURN 02000000 3832 * 005A60 3833 T110V DS 1F 3834 TSIMEND 005A68 3835+ LTORG 005A68 00000458 3836 =A(SAVETST) PAGE 72 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 05A6C 3837+T110TEND EQU * 3838 * 3839 * Test 111 -- ST R,m (unal) -------------------------------- 3840 * 3841 TSIMBEG T111,12000,50,1,C'ST R,m (unal)' 3842+* 002644 3843+TDSCDAT CSECT 002648 3844+ DS 0D 3845+* 002648 00005A70 3846+T111TDSC DC A(T111) // TENTRY 00264C 0000010C 3847+ DC A(T111TEND-T111) // TLENGTH 002650 00002EE0 3848+ DC F'12000' // TLRCNT 002654 00000032 3849+ DC F'50' // TIGCNT 002658 00000001 3850+ DC F'1' // TLTYPE 001055 3851+TEXT CSECT 001055 E3F1F1F1 3852+SPTR0184 DC C'T111' 00265C 3853+TDSCDAT CSECT 00265C 3854+ DS 0F 00265C 04001055 3855+ DC AL1(L'SPTR0184),AL3(SPTR0184) 001059 3856+TEXT CSECT 001059 E2E340D96B94404D 3857+SPTR0185 DC C'ST R,m (unal)' 002660 3858+TDSCDAT CSECT 002660 3859+ DS 0F 002660 0D001059 3860+ DC AL1(L'SPTR0185),AL3(SPTR0185) 3861+* 0049F4 3862+TDSCTBL CSECT 049F4 3863+T111TPTR EQU * 0049F4 00002648 3864+ DC A(T111TDSC) enabled test 3865+* 005A6C 3866+TCODE CSECT 005A70 3867+ DS 0D ensure double word alignment for test 005A70 3868+T111 DS 0H 01650000 005A70 90EC D00C 0000C 3869+ STM 14,12,12(13) SAVE REGISTERS 02950000 005A74 18CF 3870+ LR R12,R15 base register := entry address 05A70 3871+ USING T111,R12 declare code base register 005A76 41B0 C022 05A92 3872+ LA R11,T111L load loop target to R11 005A7A 58F0 C108 05B78 3873+ L R15,=A(SAVETST) R15 := current save area 005A7E 50DF 0004 00004 3874+ ST R13,4(R15) set back pointer in current save area 005A82 182D 3875+ LR R2,R13 remember callers save area 005A84 18DF 3876+ LR R13,R15 setup current save area 005A86 50D2 0008 00008 3877+ ST R13,8(R2) set forw pointer in callers save area 00000 3878+ USING TDSC,R1 declare TDSC base register 005A8A 58F0 1008 00008 3879+ L R15,TLRCNT load local repeat count to R15 3880+* 3881 * 005A8E 4130 C0FC 05B6C 3882 LA R3,T111V 3883 T111L REPINS ST,(R2,1(R3)) repeat: ST R2,1(R3) 3884+* 3885+* build from sublist &ALIST a comma separated string &ARGS 3886+* 3887+* 3888+* 3889+* 3890+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3891+* this allows to transfer the repeat count from last TDSCGEN call PAGE 73 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 3892+* 3893+* 05A92 3894+T111L EQU * 3895+* 3896+* write a comment indicating what REPINS does (in case NOGEN in effect) 3897+* 3898+*,// REPINS: do 50 times: 3899+* 3900+* MNOTE requires that ' is doubled for expanded variables 3901+* thus build &MASTR as a copy of '&ARGS with ' doubled 3902+* 3903+* 3904+*,// ST R2,1(R3) 3905+* 3906+* finally generate code: &ICNT copies of &CODE &ARGS 3907+* 005A92 5023 0001 00001 3908+ ST R2,1(R3) 005A96 5023 0001 00001 3909+ ST R2,1(R3) 005A9A 5023 0001 00001 3910+ ST R2,1(R3) 005A9E 5023 0001 00001 3911+ ST R2,1(R3) 005AA2 5023 0001 00001 3912+ ST R2,1(R3) 005AA6 5023 0001 00001 3913+ ST R2,1(R3) 005AAA 5023 0001 00001 3914+ ST R2,1(R3) 005AAE 5023 0001 00001 3915+ ST R2,1(R3) 005AB2 5023 0001 00001 3916+ ST R2,1(R3) 005AB6 5023 0001 00001 3917+ ST R2,1(R3) 005ABA 5023 0001 00001 3918+ ST R2,1(R3) 005ABE 5023 0001 00001 3919+ ST R2,1(R3) 005AC2 5023 0001 00001 3920+ ST R2,1(R3) 005AC6 5023 0001 00001 3921+ ST R2,1(R3) 005ACA 5023 0001 00001 3922+ ST R2,1(R3) 005ACE 5023 0001 00001 3923+ ST R2,1(R3) 005AD2 5023 0001 00001 3924+ ST R2,1(R3) 005AD6 5023 0001 00001 3925+ ST R2,1(R3) 005ADA 5023 0001 00001 3926+ ST R2,1(R3) 005ADE 5023 0001 00001 3927+ ST R2,1(R3) 005AE2 5023 0001 00001 3928+ ST R2,1(R3) 005AE6 5023 0001 00001 3929+ ST R2,1(R3) 005AEA 5023 0001 00001 3930+ ST R2,1(R3) 005AEE 5023 0001 00001 3931+ ST R2,1(R3) 005AF2 5023 0001 00001 3932+ ST R2,1(R3) 005AF6 5023 0001 00001 3933+ ST R2,1(R3) 005AFA 5023 0001 00001 3934+ ST R2,1(R3) 005AFE 5023 0001 00001 3935+ ST R2,1(R3) 005B02 5023 0001 00001 3936+ ST R2,1(R3) 005B06 5023 0001 00001 3937+ ST R2,1(R3) 005B0A 5023 0001 00001 3938+ ST R2,1(R3) 005B0E 5023 0001 00001 3939+ ST R2,1(R3) 005B12 5023 0001 00001 3940+ ST R2,1(R3) 005B16 5023 0001 00001 3941+ ST R2,1(R3) 005B1A 5023 0001 00001 3942+ ST R2,1(R3) 005B1E 5023 0001 00001 3943+ ST R2,1(R3) 005B22 5023 0001 00001 3944+ ST R2,1(R3) 005B26 5023 0001 00001 3945+ ST R2,1(R3) 005B2A 5023 0001 00001 3946+ ST R2,1(R3) PAGE 74 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005B2E 5023 0001 00001 3947+ ST R2,1(R3) 005B32 5023 0001 00001 3948+ ST R2,1(R3) 005B36 5023 0001 00001 3949+ ST R2,1(R3) 005B3A 5023 0001 00001 3950+ ST R2,1(R3) 005B3E 5023 0001 00001 3951+ ST R2,1(R3) 005B42 5023 0001 00001 3952+ ST R2,1(R3) 005B46 5023 0001 00001 3953+ ST R2,1(R3) 005B4A 5023 0001 00001 3954+ ST R2,1(R3) 005B4E 5023 0001 00001 3955+ ST R2,1(R3) 005B52 5023 0001 00001 3956+ ST R2,1(R3) 005B56 5023 0001 00001 3957+ ST R2,1(R3) 3958+* 005B5A 06FB 3959 BCTR R15,R11 3960 TSIMRET 005B5C 58F0 C108 05B78 3961+ L R15,=A(SAVETST) R15 := current save area 005B60 58DF 0004 00004 3962+ L R13,4(R15) get old save area back 005B64 98EC D00C 0000C 3963+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005B68 07FE 3964+ BR 14 RETURN 02000000 3965 * 005B6C 3966 T111V DS 2F 3967 TSIMEND 005B78 3968+ LTORG 005B78 00000458 3969 =A(SAVETST) 05B7C 3970+T111TEND EQU * 3971 * 3972 * Test 112 -- STH R,m -------------------------------------- 3973 * 3974 TSIMBEG T112,10000,50,1,C'STH R,m' 3975+* 002664 3976+TDSCDAT CSECT 002668 3977+ DS 0D 3978+* 002668 00005B80 3979+T112TDSC DC A(T112) // TENTRY 00266C 000000FC 3980+ DC A(T112TEND-T112) // TLENGTH 002670 00002710 3981+ DC F'10000' // TLRCNT 002674 00000032 3982+ DC F'50' // TIGCNT 002678 00000001 3983+ DC F'1' // TLTYPE 001066 3984+TEXT CSECT 001066 E3F1F1F2 3985+SPTR0196 DC C'T112' 00267C 3986+TDSCDAT CSECT 00267C 3987+ DS 0F 00267C 04001066 3988+ DC AL1(L'SPTR0196),AL3(SPTR0196) 00106A 3989+TEXT CSECT 00106A E2E3C840D96B94 3990+SPTR0197 DC C'STH R,m' 002680 3991+TDSCDAT CSECT 002680 3992+ DS 0F 002680 0700106A 3993+ DC AL1(L'SPTR0197),AL3(SPTR0197) 3994+* 0049F8 3995+TDSCTBL CSECT 049F8 3996+T112TPTR EQU * 0049F8 00002668 3997+ DC A(T112TDSC) enabled test 3998+* 005B7C 3999+TCODE CSECT 005B80 4000+ DS 0D ensure double word alignment for test 005B80 4001+T112 DS 0H 01650000 PAGE 75 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005B80 90EC D00C 0000C 4002+ STM 14,12,12(13) SAVE REGISTERS 02950000 005B84 18CF 4003+ LR R12,R15 base register := entry address 05B80 4004+ USING T112,R12 declare code base register 005B86 41B0 C01E 05B9E 4005+ LA R11,T112L load loop target to R11 005B8A 58F0 C0F8 05C78 4006+ L R15,=A(SAVETST) R15 := current save area 005B8E 50DF 0004 00004 4007+ ST R13,4(R15) set back pointer in current save area 005B92 182D 4008+ LR R2,R13 remember callers save area 005B94 18DF 4009+ LR R13,R15 setup current save area 005B96 50D2 0008 00008 4010+ ST R13,8(R2) set forw pointer in callers save area 00000 4011+ USING TDSC,R1 declare TDSC base register 005B9A 58F0 1008 00008 4012+ L R15,TLRCNT load local repeat count to R15 4013+* 4014 * 4015 T112L REPINS STH,(R2,T112V) repeat: STH R2,T112V 4016+* 4017+* build from sublist &ALIST a comma separated string &ARGS 4018+* 4019+* 4020+* 4021+* 4022+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4023+* this allows to transfer the repeat count from last TDSCGEN call 4024+* 4025+* 05B9E 4026+T112L EQU * 4027+* 4028+* write a comment indicating what REPINS does (in case NOGEN in effect) 4029+* 4030+*,// REPINS: do 50 times: 4031+* 4032+* MNOTE requires that ' is doubled for expanded variables 4033+* thus build &MASTR as a copy of '&ARGS with ' doubled 4034+* 4035+* 4036+*,// STH R2,T112V 4037+* 4038+* finally generate code: &ICNT copies of &CODE &ARGS 4039+* 005B9E 4020 C0F6 05C76 4040+ STH R2,T112V 005BA2 4020 C0F6 05C76 4041+ STH R2,T112V 005BA6 4020 C0F6 05C76 4042+ STH R2,T112V 005BAA 4020 C0F6 05C76 4043+ STH R2,T112V 005BAE 4020 C0F6 05C76 4044+ STH R2,T112V 005BB2 4020 C0F6 05C76 4045+ STH R2,T112V 005BB6 4020 C0F6 05C76 4046+ STH R2,T112V 005BBA 4020 C0F6 05C76 4047+ STH R2,T112V 005BBE 4020 C0F6 05C76 4048+ STH R2,T112V 005BC2 4020 C0F6 05C76 4049+ STH R2,T112V 005BC6 4020 C0F6 05C76 4050+ STH R2,T112V 005BCA 4020 C0F6 05C76 4051+ STH R2,T112V 005BCE 4020 C0F6 05C76 4052+ STH R2,T112V 005BD2 4020 C0F6 05C76 4053+ STH R2,T112V 005BD6 4020 C0F6 05C76 4054+ STH R2,T112V 005BDA 4020 C0F6 05C76 4055+ STH R2,T112V 005BDE 4020 C0F6 05C76 4056+ STH R2,T112V PAGE 76 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005BE2 4020 C0F6 05C76 4057+ STH R2,T112V 005BE6 4020 C0F6 05C76 4058+ STH R2,T112V 005BEA 4020 C0F6 05C76 4059+ STH R2,T112V 005BEE 4020 C0F6 05C76 4060+ STH R2,T112V 005BF2 4020 C0F6 05C76 4061+ STH R2,T112V 005BF6 4020 C0F6 05C76 4062+ STH R2,T112V 005BFA 4020 C0F6 05C76 4063+ STH R2,T112V 005BFE 4020 C0F6 05C76 4064+ STH R2,T112V 005C02 4020 C0F6 05C76 4065+ STH R2,T112V 005C06 4020 C0F6 05C76 4066+ STH R2,T112V 005C0A 4020 C0F6 05C76 4067+ STH R2,T112V 005C0E 4020 C0F6 05C76 4068+ STH R2,T112V 005C12 4020 C0F6 05C76 4069+ STH R2,T112V 005C16 4020 C0F6 05C76 4070+ STH R2,T112V 005C1A 4020 C0F6 05C76 4071+ STH R2,T112V 005C1E 4020 C0F6 05C76 4072+ STH R2,T112V 005C22 4020 C0F6 05C76 4073+ STH R2,T112V 005C26 4020 C0F6 05C76 4074+ STH R2,T112V 005C2A 4020 C0F6 05C76 4075+ STH R2,T112V 005C2E 4020 C0F6 05C76 4076+ STH R2,T112V 005C32 4020 C0F6 05C76 4077+ STH R2,T112V 005C36 4020 C0F6 05C76 4078+ STH R2,T112V 005C3A 4020 C0F6 05C76 4079+ STH R2,T112V 005C3E 4020 C0F6 05C76 4080+ STH R2,T112V 005C42 4020 C0F6 05C76 4081+ STH R2,T112V 005C46 4020 C0F6 05C76 4082+ STH R2,T112V 005C4A 4020 C0F6 05C76 4083+ STH R2,T112V 005C4E 4020 C0F6 05C76 4084+ STH R2,T112V 005C52 4020 C0F6 05C76 4085+ STH R2,T112V 005C56 4020 C0F6 05C76 4086+ STH R2,T112V 005C5A 4020 C0F6 05C76 4087+ STH R2,T112V 005C5E 4020 C0F6 05C76 4088+ STH R2,T112V 005C62 4020 C0F6 05C76 4089+ STH R2,T112V 4090+* 005C66 06FB 4091 BCTR R15,R11 4092 TSIMRET 005C68 58F0 C0F8 05C78 4093+ L R15,=A(SAVETST) R15 := current save area 005C6C 58DF 0004 00004 4094+ L R13,4(R15) get old save area back 005C70 98EC D00C 0000C 4095+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005C74 07FE 4096+ BR 14 RETURN 02000000 4097 * 005C76 4098 T112V DS 1H 4099 TSIMEND 005C78 4100+ LTORG 005C78 00000458 4101 =A(SAVETST) 05C7C 4102+T112TEND EQU * 4103 * 4104 * Test 113 -- STH R,m (unal1) ------------------------------ 4105 * 4106 TSIMBEG T113,10000,50,1,C'STH R,m (unal1)' 4107+* 002684 4108+TDSCDAT CSECT 002688 4109+ DS 0D 4110+* 002688 00005C80 4111+T113TDSC DC A(T113) // TENTRY PAGE 77 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00268C 00000104 4112+ DC A(T113TEND-T113) // TLENGTH 002690 00002710 4113+ DC F'10000' // TLRCNT 002694 00000032 4114+ DC F'50' // TIGCNT 002698 00000001 4115+ DC F'1' // TLTYPE 001071 4116+TEXT CSECT 001071 E3F1F1F3 4117+SPTR0208 DC C'T113' 00269C 4118+TDSCDAT CSECT 00269C 4119+ DS 0F 00269C 04001071 4120+ DC AL1(L'SPTR0208),AL3(SPTR0208) 001075 4121+TEXT CSECT 001075 E2E3C840D96B9440 4122+SPTR0209 DC C'STH R,m (unal1)' 0026A0 4123+TDSCDAT CSECT 0026A0 4124+ DS 0F 0026A0 0F001075 4125+ DC AL1(L'SPTR0209),AL3(SPTR0209) 4126+* 0049FC 4127+TDSCTBL CSECT 049FC 4128+T113TPTR EQU * 0049FC 00002688 4129+ DC A(T113TDSC) enabled test 4130+* 005C7C 4131+TCODE CSECT 005C80 4132+ DS 0D ensure double word alignment for test 005C80 4133+T113 DS 0H 01650000 005C80 90EC D00C 0000C 4134+ STM 14,12,12(13) SAVE REGISTERS 02950000 005C84 18CF 4135+ LR R12,R15 base register := entry address 05C80 4136+ USING T113,R12 declare code base register 005C86 41B0 C022 05CA2 4137+ LA R11,T113L load loop target to R11 005C8A 58F0 C100 05D80 4138+ L R15,=A(SAVETST) R15 := current save area 005C8E 50DF 0004 00004 4139+ ST R13,4(R15) set back pointer in current save area 005C92 182D 4140+ LR R2,R13 remember callers save area 005C94 18DF 4141+ LR R13,R15 setup current save area 005C96 50D2 0008 00008 4142+ ST R13,8(R2) set forw pointer in callers save area 00000 4143+ USING TDSC,R1 declare TDSC base register 005C9A 58F0 1008 00008 4144+ L R15,TLRCNT load local repeat count to R15 4145+* 4146 * 005C9E 4130 C0FC 05D7C 4147 LA R3,T113V 4148 T113L REPINS STH,(R2,1(R3)) repeat: STH R2,1(R3) 4149+* 4150+* build from sublist &ALIST a comma separated string &ARGS 4151+* 4152+* 4153+* 4154+* 4155+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4156+* this allows to transfer the repeat count from last TDSCGEN call 4157+* 4158+* 05CA2 4159+T113L EQU * 4160+* 4161+* write a comment indicating what REPINS does (in case NOGEN in effect) 4162+* 4163+*,// REPINS: do 50 times: 4164+* 4165+* MNOTE requires that ' is doubled for expanded variables 4166+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 78 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 4167+* 4168+* 4169+*,// STH R2,1(R3) 4170+* 4171+* finally generate code: &ICNT copies of &CODE &ARGS 4172+* 005CA2 4023 0001 00001 4173+ STH R2,1(R3) 005CA6 4023 0001 00001 4174+ STH R2,1(R3) 005CAA 4023 0001 00001 4175+ STH R2,1(R3) 005CAE 4023 0001 00001 4176+ STH R2,1(R3) 005CB2 4023 0001 00001 4177+ STH R2,1(R3) 005CB6 4023 0001 00001 4178+ STH R2,1(R3) 005CBA 4023 0001 00001 4179+ STH R2,1(R3) 005CBE 4023 0001 00001 4180+ STH R2,1(R3) 005CC2 4023 0001 00001 4181+ STH R2,1(R3) 005CC6 4023 0001 00001 4182+ STH R2,1(R3) 005CCA 4023 0001 00001 4183+ STH R2,1(R3) 005CCE 4023 0001 00001 4184+ STH R2,1(R3) 005CD2 4023 0001 00001 4185+ STH R2,1(R3) 005CD6 4023 0001 00001 4186+ STH R2,1(R3) 005CDA 4023 0001 00001 4187+ STH R2,1(R3) 005CDE 4023 0001 00001 4188+ STH R2,1(R3) 005CE2 4023 0001 00001 4189+ STH R2,1(R3) 005CE6 4023 0001 00001 4190+ STH R2,1(R3) 005CEA 4023 0001 00001 4191+ STH R2,1(R3) 005CEE 4023 0001 00001 4192+ STH R2,1(R3) 005CF2 4023 0001 00001 4193+ STH R2,1(R3) 005CF6 4023 0001 00001 4194+ STH R2,1(R3) 005CFA 4023 0001 00001 4195+ STH R2,1(R3) 005CFE 4023 0001 00001 4196+ STH R2,1(R3) 005D02 4023 0001 00001 4197+ STH R2,1(R3) 005D06 4023 0001 00001 4198+ STH R2,1(R3) 005D0A 4023 0001 00001 4199+ STH R2,1(R3) 005D0E 4023 0001 00001 4200+ STH R2,1(R3) 005D12 4023 0001 00001 4201+ STH R2,1(R3) 005D16 4023 0001 00001 4202+ STH R2,1(R3) 005D1A 4023 0001 00001 4203+ STH R2,1(R3) 005D1E 4023 0001 00001 4204+ STH R2,1(R3) 005D22 4023 0001 00001 4205+ STH R2,1(R3) 005D26 4023 0001 00001 4206+ STH R2,1(R3) 005D2A 4023 0001 00001 4207+ STH R2,1(R3) 005D2E 4023 0001 00001 4208+ STH R2,1(R3) 005D32 4023 0001 00001 4209+ STH R2,1(R3) 005D36 4023 0001 00001 4210+ STH R2,1(R3) 005D3A 4023 0001 00001 4211+ STH R2,1(R3) 005D3E 4023 0001 00001 4212+ STH R2,1(R3) 005D42 4023 0001 00001 4213+ STH R2,1(R3) 005D46 4023 0001 00001 4214+ STH R2,1(R3) 005D4A 4023 0001 00001 4215+ STH R2,1(R3) 005D4E 4023 0001 00001 4216+ STH R2,1(R3) 005D52 4023 0001 00001 4217+ STH R2,1(R3) 005D56 4023 0001 00001 4218+ STH R2,1(R3) 005D5A 4023 0001 00001 4219+ STH R2,1(R3) 005D5E 4023 0001 00001 4220+ STH R2,1(R3) 005D62 4023 0001 00001 4221+ STH R2,1(R3) PAGE 79 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005D66 4023 0001 00001 4222+ STH R2,1(R3) 4223+* 005D6A 06FB 4224 BCTR R15,R11 4225 TSIMRET 005D6C 58F0 C100 05D80 4226+ L R15,=A(SAVETST) R15 := current save area 005D70 58DF 0004 00004 4227+ L R13,4(R15) get old save area back 005D74 98EC D00C 0000C 4228+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005D78 07FE 4229+ BR 14 RETURN 02000000 4230 * 005D7C 4231 DS 0F 005D7C 4232 T113V DS 2H across halfword border 4233 TSIMEND 005D80 4234+ LTORG 005D80 00000458 4235 =A(SAVETST) 05D84 4236+T113TEND EQU * 4237 * 4238 * Test 114 -- STH R,m (unal3) ------------------------------ 4239 * 4240 TSIMBEG T114,10000,50,1,C'STH R,m (unal3)' 4241+* 0026A4 4242+TDSCDAT CSECT 0026A8 4243+ DS 0D 4244+* 0026A8 00005D88 4245+T114TDSC DC A(T114) // TENTRY 0026AC 0000010C 4246+ DC A(T114TEND-T114) // TLENGTH 0026B0 00002710 4247+ DC F'10000' // TLRCNT 0026B4 00000032 4248+ DC F'50' // TIGCNT 0026B8 00000001 4249+ DC F'1' // TLTYPE 001084 4250+TEXT CSECT 001084 E3F1F1F4 4251+SPTR0220 DC C'T114' 0026BC 4252+TDSCDAT CSECT 0026BC 4253+ DS 0F 0026BC 04001084 4254+ DC AL1(L'SPTR0220),AL3(SPTR0220) 001088 4255+TEXT CSECT 001088 E2E3C840D96B9440 4256+SPTR0221 DC C'STH R,m (unal3)' 0026C0 4257+TDSCDAT CSECT 0026C0 4258+ DS 0F 0026C0 0F001088 4259+ DC AL1(L'SPTR0221),AL3(SPTR0221) 4260+* 004A00 4261+TDSCTBL CSECT 04A00 4262+T114TPTR EQU * 004A00 000026A8 4263+ DC A(T114TDSC) enabled test 4264+* 005D84 4265+TCODE CSECT 005D88 4266+ DS 0D ensure double word alignment for test 005D88 4267+T114 DS 0H 01650000 005D88 90EC D00C 0000C 4268+ STM 14,12,12(13) SAVE REGISTERS 02950000 005D8C 18CF 4269+ LR R12,R15 base register := entry address 05D88 4270+ USING T114,R12 declare code base register 005D8E 41B0 C022 05DAA 4271+ LA R11,T114L load loop target to R11 005D92 58F0 C108 05E90 4272+ L R15,=A(SAVETST) R15 := current save area 005D96 50DF 0004 00004 4273+ ST R13,4(R15) set back pointer in current save area 005D9A 182D 4274+ LR R2,R13 remember callers save area 005D9C 18DF 4275+ LR R13,R15 setup current save area 005D9E 50D2 0008 00008 4276+ ST R13,8(R2) set forw pointer in callers save area PAGE 80 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00000 4277+ USING TDSC,R1 declare TDSC base register 005DA2 58F0 1008 00008 4278+ L R15,TLRCNT load local repeat count to R15 4279+* 4280 * 005DA6 4130 C0FC 05E84 4281 LA R3,T114V 4282 T114L REPINS STH,(R2,3(R3)) repeat: STH R2,3(R3) 4283+* 4284+* build from sublist &ALIST a comma separated string &ARGS 4285+* 4286+* 4287+* 4288+* 4289+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4290+* this allows to transfer the repeat count from last TDSCGEN call 4291+* 4292+* 05DAA 4293+T114L EQU * 4294+* 4295+* write a comment indicating what REPINS does (in case NOGEN in effect) 4296+* 4297+*,// REPINS: do 50 times: 4298+* 4299+* MNOTE requires that ' is doubled for expanded variables 4300+* thus build &MASTR as a copy of '&ARGS with ' doubled 4301+* 4302+* 4303+*,// STH R2,3(R3) 4304+* 4305+* finally generate code: &ICNT copies of &CODE &ARGS 4306+* 005DAA 4023 0003 00003 4307+ STH R2,3(R3) 005DAE 4023 0003 00003 4308+ STH R2,3(R3) 005DB2 4023 0003 00003 4309+ STH R2,3(R3) 005DB6 4023 0003 00003 4310+ STH R2,3(R3) 005DBA 4023 0003 00003 4311+ STH R2,3(R3) 005DBE 4023 0003 00003 4312+ STH R2,3(R3) 005DC2 4023 0003 00003 4313+ STH R2,3(R3) 005DC6 4023 0003 00003 4314+ STH R2,3(R3) 005DCA 4023 0003 00003 4315+ STH R2,3(R3) 005DCE 4023 0003 00003 4316+ STH R2,3(R3) 005DD2 4023 0003 00003 4317+ STH R2,3(R3) 005DD6 4023 0003 00003 4318+ STH R2,3(R3) 005DDA 4023 0003 00003 4319+ STH R2,3(R3) 005DDE 4023 0003 00003 4320+ STH R2,3(R3) 005DE2 4023 0003 00003 4321+ STH R2,3(R3) 005DE6 4023 0003 00003 4322+ STH R2,3(R3) 005DEA 4023 0003 00003 4323+ STH R2,3(R3) 005DEE 4023 0003 00003 4324+ STH R2,3(R3) 005DF2 4023 0003 00003 4325+ STH R2,3(R3) 005DF6 4023 0003 00003 4326+ STH R2,3(R3) 005DFA 4023 0003 00003 4327+ STH R2,3(R3) 005DFE 4023 0003 00003 4328+ STH R2,3(R3) 005E02 4023 0003 00003 4329+ STH R2,3(R3) 005E06 4023 0003 00003 4330+ STH R2,3(R3) 005E0A 4023 0003 00003 4331+ STH R2,3(R3) PAGE 81 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005E0E 4023 0003 00003 4332+ STH R2,3(R3) 005E12 4023 0003 00003 4333+ STH R2,3(R3) 005E16 4023 0003 00003 4334+ STH R2,3(R3) 005E1A 4023 0003 00003 4335+ STH R2,3(R3) 005E1E 4023 0003 00003 4336+ STH R2,3(R3) 005E22 4023 0003 00003 4337+ STH R2,3(R3) 005E26 4023 0003 00003 4338+ STH R2,3(R3) 005E2A 4023 0003 00003 4339+ STH R2,3(R3) 005E2E 4023 0003 00003 4340+ STH R2,3(R3) 005E32 4023 0003 00003 4341+ STH R2,3(R3) 005E36 4023 0003 00003 4342+ STH R2,3(R3) 005E3A 4023 0003 00003 4343+ STH R2,3(R3) 005E3E 4023 0003 00003 4344+ STH R2,3(R3) 005E42 4023 0003 00003 4345+ STH R2,3(R3) 005E46 4023 0003 00003 4346+ STH R2,3(R3) 005E4A 4023 0003 00003 4347+ STH R2,3(R3) 005E4E 4023 0003 00003 4348+ STH R2,3(R3) 005E52 4023 0003 00003 4349+ STH R2,3(R3) 005E56 4023 0003 00003 4350+ STH R2,3(R3) 005E5A 4023 0003 00003 4351+ STH R2,3(R3) 005E5E 4023 0003 00003 4352+ STH R2,3(R3) 005E62 4023 0003 00003 4353+ STH R2,3(R3) 005E66 4023 0003 00003 4354+ STH R2,3(R3) 005E6A 4023 0003 00003 4355+ STH R2,3(R3) 005E6E 4023 0003 00003 4356+ STH R2,3(R3) 4357+* 005E72 06FB 4358 BCTR R15,R11 4359 TSIMRET 005E74 58F0 C108 05E90 4360+ L R15,=A(SAVETST) R15 := current save area 005E78 58DF 0004 00004 4361+ L R13,4(R15) get old save area back 005E7C 98EC D00C 0000C 4362+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005E80 07FE 4363+ BR 14 RETURN 02000000 4364 * 005E84 4365 DS 0F 005E84 4366 T114V DS 3H across word border 4367 TSIMEND 005E90 4368+ LTORG 005E90 00000458 4369 =A(SAVETST) 05E94 4370+T114TEND EQU * 4371 * 4372 * Test 115 -- STC R,m -------------------------------------- 4373 * 4374 TSIMBEG T115,11000,50,1,C'STC R,m' 4375+* 0026C4 4376+TDSCDAT CSECT 0026C8 4377+ DS 0D 4378+* 0026C8 00005E98 4379+T115TDSC DC A(T115) // TENTRY 0026CC 000000FC 4380+ DC A(T115TEND-T115) // TLENGTH 0026D0 00002AF8 4381+ DC F'11000' // TLRCNT 0026D4 00000032 4382+ DC F'50' // TIGCNT 0026D8 00000001 4383+ DC F'1' // TLTYPE 001097 4384+TEXT CSECT 001097 E3F1F1F5 4385+SPTR0232 DC C'T115' 0026DC 4386+TDSCDAT CSECT PAGE 82 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0026DC 4387+ DS 0F 0026DC 04001097 4388+ DC AL1(L'SPTR0232),AL3(SPTR0232) 00109B 4389+TEXT CSECT 00109B E2E3C340D96B94 4390+SPTR0233 DC C'STC R,m' 0026E0 4391+TDSCDAT CSECT 0026E0 4392+ DS 0F 0026E0 0700109B 4393+ DC AL1(L'SPTR0233),AL3(SPTR0233) 4394+* 004A04 4395+TDSCTBL CSECT 04A04 4396+T115TPTR EQU * 004A04 000026C8 4397+ DC A(T115TDSC) enabled test 4398+* 005E94 4399+TCODE CSECT 005E98 4400+ DS 0D ensure double word alignment for test 005E98 4401+T115 DS 0H 01650000 005E98 90EC D00C 0000C 4402+ STM 14,12,12(13) SAVE REGISTERS 02950000 005E9C 18CF 4403+ LR R12,R15 base register := entry address 05E98 4404+ USING T115,R12 declare code base register 005E9E 41B0 C01E 05EB6 4405+ LA R11,T115L load loop target to R11 005EA2 58F0 C0F8 05F90 4406+ L R15,=A(SAVETST) R15 := current save area 005EA6 50DF 0004 00004 4407+ ST R13,4(R15) set back pointer in current save area 005EAA 182D 4408+ LR R2,R13 remember callers save area 005EAC 18DF 4409+ LR R13,R15 setup current save area 005EAE 50D2 0008 00008 4410+ ST R13,8(R2) set forw pointer in callers save area 00000 4411+ USING TDSC,R1 declare TDSC base register 005EB2 58F0 1008 00008 4412+ L R15,TLRCNT load local repeat count to R15 4413+* 4414 * 4415 T115L REPINS STC,(R2,T115V) repeat: STC R2,T115V 4416+* 4417+* build from sublist &ALIST a comma separated string &ARGS 4418+* 4419+* 4420+* 4421+* 4422+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4423+* this allows to transfer the repeat count from last TDSCGEN call 4424+* 4425+* 05EB6 4426+T115L EQU * 4427+* 4428+* write a comment indicating what REPINS does (in case NOGEN in effect) 4429+* 4430+*,// REPINS: do 50 times: 4431+* 4432+* MNOTE requires that ' is doubled for expanded variables 4433+* thus build &MASTR as a copy of '&ARGS with ' doubled 4434+* 4435+* 4436+*,// STC R2,T115V 4437+* 4438+* finally generate code: &ICNT copies of &CODE &ARGS 4439+* 005EB6 4220 C0F6 05F8E 4440+ STC R2,T115V 005EBA 4220 C0F6 05F8E 4441+ STC R2,T115V PAGE 83 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 005EBE 4220 C0F6 05F8E 4442+ STC R2,T115V 005EC2 4220 C0F6 05F8E 4443+ STC R2,T115V 005EC6 4220 C0F6 05F8E 4444+ STC R2,T115V 005ECA 4220 C0F6 05F8E 4445+ STC R2,T115V 005ECE 4220 C0F6 05F8E 4446+ STC R2,T115V 005ED2 4220 C0F6 05F8E 4447+ STC R2,T115V 005ED6 4220 C0F6 05F8E 4448+ STC R2,T115V 005EDA 4220 C0F6 05F8E 4449+ STC R2,T115V 005EDE 4220 C0F6 05F8E 4450+ STC R2,T115V 005EE2 4220 C0F6 05F8E 4451+ STC R2,T115V 005EE6 4220 C0F6 05F8E 4452+ STC R2,T115V 005EEA 4220 C0F6 05F8E 4453+ STC R2,T115V 005EEE 4220 C0F6 05F8E 4454+ STC R2,T115V 005EF2 4220 C0F6 05F8E 4455+ STC R2,T115V 005EF6 4220 C0F6 05F8E 4456+ STC R2,T115V 005EFA 4220 C0F6 05F8E 4457+ STC R2,T115V 005EFE 4220 C0F6 05F8E 4458+ STC R2,T115V 005F02 4220 C0F6 05F8E 4459+ STC R2,T115V 005F06 4220 C0F6 05F8E 4460+ STC R2,T115V 005F0A 4220 C0F6 05F8E 4461+ STC R2,T115V 005F0E 4220 C0F6 05F8E 4462+ STC R2,T115V 005F12 4220 C0F6 05F8E 4463+ STC R2,T115V 005F16 4220 C0F6 05F8E 4464+ STC R2,T115V 005F1A 4220 C0F6 05F8E 4465+ STC R2,T115V 005F1E 4220 C0F6 05F8E 4466+ STC R2,T115V 005F22 4220 C0F6 05F8E 4467+ STC R2,T115V 005F26 4220 C0F6 05F8E 4468+ STC R2,T115V 005F2A 4220 C0F6 05F8E 4469+ STC R2,T115V 005F2E 4220 C0F6 05F8E 4470+ STC R2,T115V 005F32 4220 C0F6 05F8E 4471+ STC R2,T115V 005F36 4220 C0F6 05F8E 4472+ STC R2,T115V 005F3A 4220 C0F6 05F8E 4473+ STC R2,T115V 005F3E 4220 C0F6 05F8E 4474+ STC R2,T115V 005F42 4220 C0F6 05F8E 4475+ STC R2,T115V 005F46 4220 C0F6 05F8E 4476+ STC R2,T115V 005F4A 4220 C0F6 05F8E 4477+ STC R2,T115V 005F4E 4220 C0F6 05F8E 4478+ STC R2,T115V 005F52 4220 C0F6 05F8E 4479+ STC R2,T115V 005F56 4220 C0F6 05F8E 4480+ STC R2,T115V 005F5A 4220 C0F6 05F8E 4481+ STC R2,T115V 005F5E 4220 C0F6 05F8E 4482+ STC R2,T115V 005F62 4220 C0F6 05F8E 4483+ STC R2,T115V 005F66 4220 C0F6 05F8E 4484+ STC R2,T115V 005F6A 4220 C0F6 05F8E 4485+ STC R2,T115V 005F6E 4220 C0F6 05F8E 4486+ STC R2,T115V 005F72 4220 C0F6 05F8E 4487+ STC R2,T115V 005F76 4220 C0F6 05F8E 4488+ STC R2,T115V 005F7A 4220 C0F6 05F8E 4489+ STC R2,T115V 4490+* 005F7E 06FB 4491 BCTR R15,R11 4492 TSIMRET 005F80 58F0 C0F8 05F90 4493+ L R15,=A(SAVETST) R15 := current save area 005F84 58DF 0004 00004 4494+ L R13,4(R15) get old save area back 005F88 98EC D00C 0000C 4495+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005F8C 07FE 4496+ BR 14 RETURN 02000000 PAGE 84 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 4497 * 005F8E 4498 T115V DS 1H 4499 TSIMEND 005F90 4500+ LTORG 005F90 00000458 4501 =A(SAVETST) 05F94 4502+T115TEND EQU * 4503 * 4504 * Test 116 -- STCM R,i,m (1c) ------------------------------ 4505 * 4506 TSIMBEG T116,8000,50,1,C'STCM R,i,m (0010)' 4507+* 0026E4 4508+TDSCDAT CSECT 0026E8 4509+ DS 0D 4510+* 0026E8 00005F98 4511+T116TDSC DC A(T116) // TENTRY 0026EC 00000104 4512+ DC A(T116TEND-T116) // TLENGTH 0026F0 00001F40 4513+ DC F'8000' // TLRCNT 0026F4 00000032 4514+ DC F'50' // TIGCNT 0026F8 00000001 4515+ DC F'1' // TLTYPE 0010A2 4516+TEXT CSECT 0010A2 E3F1F1F6 4517+SPTR0244 DC C'T116' 0026FC 4518+TDSCDAT CSECT 0026FC 4519+ DS 0F 0026FC 040010A2 4520+ DC AL1(L'SPTR0244),AL3(SPTR0244) 0010A6 4521+TEXT CSECT 0010A6 E2E3C3D440D96B89 4522+SPTR0245 DC C'STCM R,i,m (0010)' 002700 4523+TDSCDAT CSECT 002700 4524+ DS 0F 002700 110010A6 4525+ DC AL1(L'SPTR0245),AL3(SPTR0245) 4526+* 004A08 4527+TDSCTBL CSECT 04A08 4528+T116TPTR EQU * 004A08 000026E8 4529+ DC A(T116TDSC) enabled test 4530+* 005F94 4531+TCODE CSECT 005F98 4532+ DS 0D ensure double word alignment for test 005F98 4533+T116 DS 0H 01650000 005F98 90EC D00C 0000C 4534+ STM 14,12,12(13) SAVE REGISTERS 02950000 005F9C 18CF 4535+ LR R12,R15 base register := entry address 05F98 4536+ USING T116,R12 declare code base register 005F9E 41B0 C01E 05FB6 4537+ LA R11,T116L load loop target to R11 005FA2 58F0 C100 06098 4538+ L R15,=A(SAVETST) R15 := current save area 005FA6 50DF 0004 00004 4539+ ST R13,4(R15) set back pointer in current save area 005FAA 182D 4540+ LR R2,R13 remember callers save area 005FAC 18DF 4541+ LR R13,R15 setup current save area 005FAE 50D2 0008 00008 4542+ ST R13,8(R2) set forw pointer in callers save area 00000 4543+ USING TDSC,R1 declare TDSC base register 005FB2 58F0 1008 00008 4544+ L R15,TLRCNT load local repeat count to R15 4545+* 4546 * 4547 T116L REPINS STCM,(R2,B'0010',T116V) repeat: STCM R2,B'0010',T116V 4548+* 4549+* build from sublist &ALIST a comma separated string &ARGS 4550+* 4551+* PAGE 85 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 4552+* 4553+* 4554+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4555+* this allows to transfer the repeat count from last TDSCGEN call 4556+* 4557+* 05FB6 4558+T116L EQU * 4559+* 4560+* write a comment indicating what REPINS does (in case NOGEN in effect) 4561+* 4562+*,// REPINS: do 50 times: 4563+* 4564+* MNOTE requires that ' is doubled for expanded variables 4565+* thus build &MASTR as a copy of '&ARGS with ' doubled 4566+* 4567+* 4568+*,// STCM R2,B'0010',T116V 4569+* 4570+* finally generate code: &ICNT copies of &CODE &ARGS 4571+* 005FB6 BE22 C0F8 06090 4572+ STCM R2,B'0010',T116V 005FBA BE22 C0F8 06090 4573+ STCM R2,B'0010',T116V 005FBE BE22 C0F8 06090 4574+ STCM R2,B'0010',T116V 005FC2 BE22 C0F8 06090 4575+ STCM R2,B'0010',T116V 005FC6 BE22 C0F8 06090 4576+ STCM R2,B'0010',T116V 005FCA BE22 C0F8 06090 4577+ STCM R2,B'0010',T116V 005FCE BE22 C0F8 06090 4578+ STCM R2,B'0010',T116V 005FD2 BE22 C0F8 06090 4579+ STCM R2,B'0010',T116V 005FD6 BE22 C0F8 06090 4580+ STCM R2,B'0010',T116V 005FDA BE22 C0F8 06090 4581+ STCM R2,B'0010',T116V 005FDE BE22 C0F8 06090 4582+ STCM R2,B'0010',T116V 005FE2 BE22 C0F8 06090 4583+ STCM R2,B'0010',T116V 005FE6 BE22 C0F8 06090 4584+ STCM R2,B'0010',T116V 005FEA BE22 C0F8 06090 4585+ STCM R2,B'0010',T116V 005FEE BE22 C0F8 06090 4586+ STCM R2,B'0010',T116V 005FF2 BE22 C0F8 06090 4587+ STCM R2,B'0010',T116V 005FF6 BE22 C0F8 06090 4588+ STCM R2,B'0010',T116V 005FFA BE22 C0F8 06090 4589+ STCM R2,B'0010',T116V 005FFE BE22 C0F8 06090 4590+ STCM R2,B'0010',T116V 006002 BE22 C0F8 06090 4591+ STCM R2,B'0010',T116V 006006 BE22 C0F8 06090 4592+ STCM R2,B'0010',T116V 00600A BE22 C0F8 06090 4593+ STCM R2,B'0010',T116V 00600E BE22 C0F8 06090 4594+ STCM R2,B'0010',T116V 006012 BE22 C0F8 06090 4595+ STCM R2,B'0010',T116V 006016 BE22 C0F8 06090 4596+ STCM R2,B'0010',T116V 00601A BE22 C0F8 06090 4597+ STCM R2,B'0010',T116V 00601E BE22 C0F8 06090 4598+ STCM R2,B'0010',T116V 006022 BE22 C0F8 06090 4599+ STCM R2,B'0010',T116V 006026 BE22 C0F8 06090 4600+ STCM R2,B'0010',T116V 00602A BE22 C0F8 06090 4601+ STCM R2,B'0010',T116V 00602E BE22 C0F8 06090 4602+ STCM R2,B'0010',T116V 006032 BE22 C0F8 06090 4603+ STCM R2,B'0010',T116V 006036 BE22 C0F8 06090 4604+ STCM R2,B'0010',T116V 00603A BE22 C0F8 06090 4605+ STCM R2,B'0010',T116V 00603E BE22 C0F8 06090 4606+ STCM R2,B'0010',T116V PAGE 86 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 006042 BE22 C0F8 06090 4607+ STCM R2,B'0010',T116V 006046 BE22 C0F8 06090 4608+ STCM R2,B'0010',T116V 00604A BE22 C0F8 06090 4609+ STCM R2,B'0010',T116V 00604E BE22 C0F8 06090 4610+ STCM R2,B'0010',T116V 006052 BE22 C0F8 06090 4611+ STCM R2,B'0010',T116V 006056 BE22 C0F8 06090 4612+ STCM R2,B'0010',T116V 00605A BE22 C0F8 06090 4613+ STCM R2,B'0010',T116V 00605E BE22 C0F8 06090 4614+ STCM R2,B'0010',T116V 006062 BE22 C0F8 06090 4615+ STCM R2,B'0010',T116V 006066 BE22 C0F8 06090 4616+ STCM R2,B'0010',T116V 00606A BE22 C0F8 06090 4617+ STCM R2,B'0010',T116V 00606E BE22 C0F8 06090 4618+ STCM R2,B'0010',T116V 006072 BE22 C0F8 06090 4619+ STCM R2,B'0010',T116V 006076 BE22 C0F8 06090 4620+ STCM R2,B'0010',T116V 00607A BE22 C0F8 06090 4621+ STCM R2,B'0010',T116V 4622+* 00607E 06FB 4623 BCTR R15,R11 4624 TSIMRET 006080 58F0 C100 06098 4625+ L R15,=A(SAVETST) R15 := current save area 006084 58DF 0004 00004 4626+ L R13,4(R15) get old save area back 006088 98EC D00C 0000C 4627+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00608C 07FE 4628+ BR 14 RETURN 02000000 4629 * 006090 4630 T116V DS 1F 4631 TSIMEND 006098 4632+ LTORG 006098 00000458 4633 =A(SAVETST) 0609C 4634+T116TEND EQU * 4635 * 4636 * Test 117 -- STCM R,i,m (2c) ------------------------------ 4637 * 4638 TSIMBEG T117,7000,50,1,C'STCM R,i,m (1100)' 4639+* 002704 4640+TDSCDAT CSECT 002708 4641+ DS 0D 4642+* 002708 000060A0 4643+T117TDSC DC A(T117) // TENTRY 00270C 00000104 4644+ DC A(T117TEND-T117) // TLENGTH 002710 00001B58 4645+ DC F'7000' // TLRCNT 002714 00000032 4646+ DC F'50' // TIGCNT 002718 00000001 4647+ DC F'1' // TLTYPE 0010B7 4648+TEXT CSECT 0010B7 E3F1F1F7 4649+SPTR0256 DC C'T117' 00271C 4650+TDSCDAT CSECT 00271C 4651+ DS 0F 00271C 040010B7 4652+ DC AL1(L'SPTR0256),AL3(SPTR0256) 0010BB 4653+TEXT CSECT 0010BB E2E3C3D440D96B89 4654+SPTR0257 DC C'STCM R,i,m (1100)' 002720 4655+TDSCDAT CSECT 002720 4656+ DS 0F 002720 110010BB 4657+ DC AL1(L'SPTR0257),AL3(SPTR0257) 4658+* 004A0C 4659+TDSCTBL CSECT 04A0C 4660+T117TPTR EQU * 004A0C 00002708 4661+ DC A(T117TDSC) enabled test PAGE 87 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 4662+* 00609C 4663+TCODE CSECT 0060A0 4664+ DS 0D ensure double word alignment for test 0060A0 4665+T117 DS 0H 01650000 0060A0 90EC D00C 0000C 4666+ STM 14,12,12(13) SAVE REGISTERS 02950000 0060A4 18CF 4667+ LR R12,R15 base register := entry address 060A0 4668+ USING T117,R12 declare code base register 0060A6 41B0 C01E 060BE 4669+ LA R11,T117L load loop target to R11 0060AA 58F0 C100 061A0 4670+ L R15,=A(SAVETST) R15 := current save area 0060AE 50DF 0004 00004 4671+ ST R13,4(R15) set back pointer in current save area 0060B2 182D 4672+ LR R2,R13 remember callers save area 0060B4 18DF 4673+ LR R13,R15 setup current save area 0060B6 50D2 0008 00008 4674+ ST R13,8(R2) set forw pointer in callers save area 00000 4675+ USING TDSC,R1 declare TDSC base register 0060BA 58F0 1008 00008 4676+ L R15,TLRCNT load local repeat count to R15 4677+* 4678 * 4679 T117L REPINS STCM,(R2,B'1100',T117V) repeat: STCM R2,B'1100',T117V 4680+* 4681+* build from sublist &ALIST a comma separated string &ARGS 4682+* 4683+* 4684+* 4685+* 4686+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4687+* this allows to transfer the repeat count from last TDSCGEN call 4688+* 4689+* 060BE 4690+T117L EQU * 4691+* 4692+* write a comment indicating what REPINS does (in case NOGEN in effect) 4693+* 4694+*,// REPINS: do 50 times: 4695+* 4696+* MNOTE requires that ' is doubled for expanded variables 4697+* thus build &MASTR as a copy of '&ARGS with ' doubled 4698+* 4699+* 4700+*,// STCM R2,B'1100',T117V 4701+* 4702+* finally generate code: &ICNT copies of &CODE &ARGS 4703+* 0060BE BE2C C0F8 06198 4704+ STCM R2,B'1100',T117V 0060C2 BE2C C0F8 06198 4705+ STCM R2,B'1100',T117V 0060C6 BE2C C0F8 06198 4706+ STCM R2,B'1100',T117V 0060CA BE2C C0F8 06198 4707+ STCM R2,B'1100',T117V 0060CE BE2C C0F8 06198 4708+ STCM R2,B'1100',T117V 0060D2 BE2C C0F8 06198 4709+ STCM R2,B'1100',T117V 0060D6 BE2C C0F8 06198 4710+ STCM R2,B'1100',T117V 0060DA BE2C C0F8 06198 4711+ STCM R2,B'1100',T117V 0060DE BE2C C0F8 06198 4712+ STCM R2,B'1100',T117V 0060E2 BE2C C0F8 06198 4713+ STCM R2,B'1100',T117V 0060E6 BE2C C0F8 06198 4714+ STCM R2,B'1100',T117V 0060EA BE2C C0F8 06198 4715+ STCM R2,B'1100',T117V 0060EE BE2C C0F8 06198 4716+ STCM R2,B'1100',T117V PAGE 88 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0060F2 BE2C C0F8 06198 4717+ STCM R2,B'1100',T117V 0060F6 BE2C C0F8 06198 4718+ STCM R2,B'1100',T117V 0060FA BE2C C0F8 06198 4719+ STCM R2,B'1100',T117V 0060FE BE2C C0F8 06198 4720+ STCM R2,B'1100',T117V 006102 BE2C C0F8 06198 4721+ STCM R2,B'1100',T117V 006106 BE2C C0F8 06198 4722+ STCM R2,B'1100',T117V 00610A BE2C C0F8 06198 4723+ STCM R2,B'1100',T117V 00610E BE2C C0F8 06198 4724+ STCM R2,B'1100',T117V 006112 BE2C C0F8 06198 4725+ STCM R2,B'1100',T117V 006116 BE2C C0F8 06198 4726+ STCM R2,B'1100',T117V 00611A BE2C C0F8 06198 4727+ STCM R2,B'1100',T117V 00611E BE2C C0F8 06198 4728+ STCM R2,B'1100',T117V 006122 BE2C C0F8 06198 4729+ STCM R2,B'1100',T117V 006126 BE2C C0F8 06198 4730+ STCM R2,B'1100',T117V 00612A BE2C C0F8 06198 4731+ STCM R2,B'1100',T117V 00612E BE2C C0F8 06198 4732+ STCM R2,B'1100',T117V 006132 BE2C C0F8 06198 4733+ STCM R2,B'1100',T117V 006136 BE2C C0F8 06198 4734+ STCM R2,B'1100',T117V 00613A BE2C C0F8 06198 4735+ STCM R2,B'1100',T117V 00613E BE2C C0F8 06198 4736+ STCM R2,B'1100',T117V 006142 BE2C C0F8 06198 4737+ STCM R2,B'1100',T117V 006146 BE2C C0F8 06198 4738+ STCM R2,B'1100',T117V 00614A BE2C C0F8 06198 4739+ STCM R2,B'1100',T117V 00614E BE2C C0F8 06198 4740+ STCM R2,B'1100',T117V 006152 BE2C C0F8 06198 4741+ STCM R2,B'1100',T117V 006156 BE2C C0F8 06198 4742+ STCM R2,B'1100',T117V 00615A BE2C C0F8 06198 4743+ STCM R2,B'1100',T117V 00615E BE2C C0F8 06198 4744+ STCM R2,B'1100',T117V 006162 BE2C C0F8 06198 4745+ STCM R2,B'1100',T117V 006166 BE2C C0F8 06198 4746+ STCM R2,B'1100',T117V 00616A BE2C C0F8 06198 4747+ STCM R2,B'1100',T117V 00616E BE2C C0F8 06198 4748+ STCM R2,B'1100',T117V 006172 BE2C C0F8 06198 4749+ STCM R2,B'1100',T117V 006176 BE2C C0F8 06198 4750+ STCM R2,B'1100',T117V 00617A BE2C C0F8 06198 4751+ STCM R2,B'1100',T117V 00617E BE2C C0F8 06198 4752+ STCM R2,B'1100',T117V 006182 BE2C C0F8 06198 4753+ STCM R2,B'1100',T117V 4754+* 006186 06FB 4755 BCTR R15,R11 4756 TSIMRET 006188 58F0 C100 061A0 4757+ L R15,=A(SAVETST) R15 := current save area 00618C 58DF 0004 00004 4758+ L R13,4(R15) get old save area back 006190 98EC D00C 0000C 4759+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006194 07FE 4760+ BR 14 RETURN 02000000 4761 * 006198 4762 T117V DS 1F 4763 TSIMEND 0061A0 4764+ LTORG 0061A0 00000458 4765 =A(SAVETST) 061A4 4766+T117TEND EQU * 4767 * 4768 * Test 118 -- STCM R,i,m (3c) ------------------------------ 4769 * 4770 TSIMBEG T118,10000,50,1,C'STCM R,i,m (0111)' 4771+* PAGE 89 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002724 4772+TDSCDAT CSECT 002728 4773+ DS 0D 4774+* 002728 000061A8 4775+T118TDSC DC A(T118) // TENTRY 00272C 00000104 4776+ DC A(T118TEND-T118) // TLENGTH 002730 00002710 4777+ DC F'10000' // TLRCNT 002734 00000032 4778+ DC F'50' // TIGCNT 002738 00000001 4779+ DC F'1' // TLTYPE 0010CC 4780+TEXT CSECT 0010CC E3F1F1F8 4781+SPTR0268 DC C'T118' 00273C 4782+TDSCDAT CSECT 00273C 4783+ DS 0F 00273C 040010CC 4784+ DC AL1(L'SPTR0268),AL3(SPTR0268) 0010D0 4785+TEXT CSECT 0010D0 E2E3C3D440D96B89 4786+SPTR0269 DC C'STCM R,i,m (0111)' 002740 4787+TDSCDAT CSECT 002740 4788+ DS 0F 002740 110010D0 4789+ DC AL1(L'SPTR0269),AL3(SPTR0269) 4790+* 004A10 4791+TDSCTBL CSECT 04A10 4792+T118TPTR EQU * 004A10 00002728 4793+ DC A(T118TDSC) enabled test 4794+* 0061A4 4795+TCODE CSECT 0061A8 4796+ DS 0D ensure double word alignment for test 0061A8 4797+T118 DS 0H 01650000 0061A8 90EC D00C 0000C 4798+ STM 14,12,12(13) SAVE REGISTERS 02950000 0061AC 18CF 4799+ LR R12,R15 base register := entry address 061A8 4800+ USING T118,R12 declare code base register 0061AE 41B0 C01E 061C6 4801+ LA R11,T118L load loop target to R11 0061B2 58F0 C100 062A8 4802+ L R15,=A(SAVETST) R15 := current save area 0061B6 50DF 0004 00004 4803+ ST R13,4(R15) set back pointer in current save area 0061BA 182D 4804+ LR R2,R13 remember callers save area 0061BC 18DF 4805+ LR R13,R15 setup current save area 0061BE 50D2 0008 00008 4806+ ST R13,8(R2) set forw pointer in callers save area 00000 4807+ USING TDSC,R1 declare TDSC base register 0061C2 58F0 1008 00008 4808+ L R15,TLRCNT load local repeat count to R15 4809+* 4810 * 4811 T118L REPINS STCM,(R2,B'0111',T118V) repeat: STCM R2,B'0111',T118V 4812+* 4813+* build from sublist &ALIST a comma separated string &ARGS 4814+* 4815+* 4816+* 4817+* 4818+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4819+* this allows to transfer the repeat count from last TDSCGEN call 4820+* 4821+* 061C6 4822+T118L EQU * 4823+* 4824+* write a comment indicating what REPINS does (in case NOGEN in effect) 4825+* 4826+*,// REPINS: do 50 times: PAGE 90 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 4827+* 4828+* MNOTE requires that ' is doubled for expanded variables 4829+* thus build &MASTR as a copy of '&ARGS with ' doubled 4830+* 4831+* 4832+*,// STCM R2,B'0111',T118V 4833+* 4834+* finally generate code: &ICNT copies of &CODE &ARGS 4835+* 0061C6 BE27 C0F8 062A0 4836+ STCM R2,B'0111',T118V 0061CA BE27 C0F8 062A0 4837+ STCM R2,B'0111',T118V 0061CE BE27 C0F8 062A0 4838+ STCM R2,B'0111',T118V 0061D2 BE27 C0F8 062A0 4839+ STCM R2,B'0111',T118V 0061D6 BE27 C0F8 062A0 4840+ STCM R2,B'0111',T118V 0061DA BE27 C0F8 062A0 4841+ STCM R2,B'0111',T118V 0061DE BE27 C0F8 062A0 4842+ STCM R2,B'0111',T118V 0061E2 BE27 C0F8 062A0 4843+ STCM R2,B'0111',T118V 0061E6 BE27 C0F8 062A0 4844+ STCM R2,B'0111',T118V 0061EA BE27 C0F8 062A0 4845+ STCM R2,B'0111',T118V 0061EE BE27 C0F8 062A0 4846+ STCM R2,B'0111',T118V 0061F2 BE27 C0F8 062A0 4847+ STCM R2,B'0111',T118V 0061F6 BE27 C0F8 062A0 4848+ STCM R2,B'0111',T118V 0061FA BE27 C0F8 062A0 4849+ STCM R2,B'0111',T118V 0061FE BE27 C0F8 062A0 4850+ STCM R2,B'0111',T118V 006202 BE27 C0F8 062A0 4851+ STCM R2,B'0111',T118V 006206 BE27 C0F8 062A0 4852+ STCM R2,B'0111',T118V 00620A BE27 C0F8 062A0 4853+ STCM R2,B'0111',T118V 00620E BE27 C0F8 062A0 4854+ STCM R2,B'0111',T118V 006212 BE27 C0F8 062A0 4855+ STCM R2,B'0111',T118V 006216 BE27 C0F8 062A0 4856+ STCM R2,B'0111',T118V 00621A BE27 C0F8 062A0 4857+ STCM R2,B'0111',T118V 00621E BE27 C0F8 062A0 4858+ STCM R2,B'0111',T118V 006222 BE27 C0F8 062A0 4859+ STCM R2,B'0111',T118V 006226 BE27 C0F8 062A0 4860+ STCM R2,B'0111',T118V 00622A BE27 C0F8 062A0 4861+ STCM R2,B'0111',T118V 00622E BE27 C0F8 062A0 4862+ STCM R2,B'0111',T118V 006232 BE27 C0F8 062A0 4863+ STCM R2,B'0111',T118V 006236 BE27 C0F8 062A0 4864+ STCM R2,B'0111',T118V 00623A BE27 C0F8 062A0 4865+ STCM R2,B'0111',T118V 00623E BE27 C0F8 062A0 4866+ STCM R2,B'0111',T118V 006242 BE27 C0F8 062A0 4867+ STCM R2,B'0111',T118V 006246 BE27 C0F8 062A0 4868+ STCM R2,B'0111',T118V 00624A BE27 C0F8 062A0 4869+ STCM R2,B'0111',T118V 00624E BE27 C0F8 062A0 4870+ STCM R2,B'0111',T118V 006252 BE27 C0F8 062A0 4871+ STCM R2,B'0111',T118V 006256 BE27 C0F8 062A0 4872+ STCM R2,B'0111',T118V 00625A BE27 C0F8 062A0 4873+ STCM R2,B'0111',T118V 00625E BE27 C0F8 062A0 4874+ STCM R2,B'0111',T118V 006262 BE27 C0F8 062A0 4875+ STCM R2,B'0111',T118V 006266 BE27 C0F8 062A0 4876+ STCM R2,B'0111',T118V 00626A BE27 C0F8 062A0 4877+ STCM R2,B'0111',T118V 00626E BE27 C0F8 062A0 4878+ STCM R2,B'0111',T118V 006272 BE27 C0F8 062A0 4879+ STCM R2,B'0111',T118V 006276 BE27 C0F8 062A0 4880+ STCM R2,B'0111',T118V 00627A BE27 C0F8 062A0 4881+ STCM R2,B'0111',T118V PAGE 91 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00627E BE27 C0F8 062A0 4882+ STCM R2,B'0111',T118V 006282 BE27 C0F8 062A0 4883+ STCM R2,B'0111',T118V 006286 BE27 C0F8 062A0 4884+ STCM R2,B'0111',T118V 00628A BE27 C0F8 062A0 4885+ STCM R2,B'0111',T118V 4886+* 00628E 06FB 4887 BCTR R15,R11 4888 TSIMRET 006290 58F0 C100 062A8 4889+ L R15,=A(SAVETST) R15 := current save area 006294 58DF 0004 00004 4890+ L R13,4(R15) get old save area back 006298 98EC D00C 0000C 4891+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00629C 07FE 4892+ BR 14 RETURN 02000000 4893 * 0062A0 4894 T118V DS 1F 4895 TSIMEND 0062A8 4896+ LTORG 0062A8 00000458 4897 =A(SAVETST) 062AC 4898+T118TEND EQU * 4899 * 4900 * Test 12x -- load/store multiple ========================== 4901 * 4902 * Test 120 -- STM 2,3,m ------------------------------------ 4903 * 4904 TSIMBEG T120,9000,50,1,C'STM 2,3,m (2r)' 4905+* 002744 4906+TDSCDAT CSECT 002748 4907+ DS 0D 4908+* 002748 000062B0 4909+T120TDSC DC A(T120) // TENTRY 00274C 00000104 4910+ DC A(T120TEND-T120) // TLENGTH 002750 00002328 4911+ DC F'9000' // TLRCNT 002754 00000032 4912+ DC F'50' // TIGCNT 002758 00000001 4913+ DC F'1' // TLTYPE 0010E1 4914+TEXT CSECT 0010E1 E3F1F2F0 4915+SPTR0280 DC C'T120' 00275C 4916+TDSCDAT CSECT 00275C 4917+ DS 0F 00275C 040010E1 4918+ DC AL1(L'SPTR0280),AL3(SPTR0280) 0010E5 4919+TEXT CSECT 0010E5 E2E3D440F26BF36B 4920+SPTR0281 DC C'STM 2,3,m (2r)' 002760 4921+TDSCDAT CSECT 002760 4922+ DS 0F 002760 0E0010E5 4923+ DC AL1(L'SPTR0281),AL3(SPTR0281) 4924+* 004A14 4925+TDSCTBL CSECT 04A14 4926+T120TPTR EQU * 004A14 00002748 4927+ DC A(T120TDSC) enabled test 4928+* 0062AC 4929+TCODE CSECT 0062B0 4930+ DS 0D ensure double word alignment for test 0062B0 4931+T120 DS 0H 01650000 0062B0 90EC D00C 0000C 4932+ STM 14,12,12(13) SAVE REGISTERS 02950000 0062B4 18CF 4933+ LR R12,R15 base register := entry address 062B0 4934+ USING T120,R12 declare code base register 0062B6 41B0 C01E 062CE 4935+ LA R11,T120L load loop target to R11 0062BA 58F0 C100 063B0 4936+ L R15,=A(SAVETST) R15 := current save area PAGE 92 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0062BE 50DF 0004 00004 4937+ ST R13,4(R15) set back pointer in current save area 0062C2 182D 4938+ LR R2,R13 remember callers save area 0062C4 18DF 4939+ LR R13,R15 setup current save area 0062C6 50D2 0008 00008 4940+ ST R13,8(R2) set forw pointer in callers save area 00000 4941+ USING TDSC,R1 declare TDSC base register 0062CA 58F0 1008 00008 4942+ L R15,TLRCNT load local repeat count to R15 4943+* 4944 * 4945 T120L REPINS STM,(2,3,T120V) repeat: STM 2,3,T120V 4946+* 4947+* build from sublist &ALIST a comma separated string &ARGS 4948+* 4949+* 4950+* 4951+* 4952+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4953+* this allows to transfer the repeat count from last TDSCGEN call 4954+* 4955+* 062CE 4956+T120L EQU * 4957+* 4958+* write a comment indicating what REPINS does (in case NOGEN in effect) 4959+* 4960+*,// REPINS: do 50 times: 4961+* 4962+* MNOTE requires that ' is doubled for expanded variables 4963+* thus build &MASTR as a copy of '&ARGS with ' doubled 4964+* 4965+* 4966+*,// STM 2,3,T120V 4967+* 4968+* finally generate code: &ICNT copies of &CODE &ARGS 4969+* 0062CE 9023 C0F8 063A8 4970+ STM 2,3,T120V 0062D2 9023 C0F8 063A8 4971+ STM 2,3,T120V 0062D6 9023 C0F8 063A8 4972+ STM 2,3,T120V 0062DA 9023 C0F8 063A8 4973+ STM 2,3,T120V 0062DE 9023 C0F8 063A8 4974+ STM 2,3,T120V 0062E2 9023 C0F8 063A8 4975+ STM 2,3,T120V 0062E6 9023 C0F8 063A8 4976+ STM 2,3,T120V 0062EA 9023 C0F8 063A8 4977+ STM 2,3,T120V 0062EE 9023 C0F8 063A8 4978+ STM 2,3,T120V 0062F2 9023 C0F8 063A8 4979+ STM 2,3,T120V 0062F6 9023 C0F8 063A8 4980+ STM 2,3,T120V 0062FA 9023 C0F8 063A8 4981+ STM 2,3,T120V 0062FE 9023 C0F8 063A8 4982+ STM 2,3,T120V 006302 9023 C0F8 063A8 4983+ STM 2,3,T120V 006306 9023 C0F8 063A8 4984+ STM 2,3,T120V 00630A 9023 C0F8 063A8 4985+ STM 2,3,T120V 00630E 9023 C0F8 063A8 4986+ STM 2,3,T120V 006312 9023 C0F8 063A8 4987+ STM 2,3,T120V 006316 9023 C0F8 063A8 4988+ STM 2,3,T120V 00631A 9023 C0F8 063A8 4989+ STM 2,3,T120V 00631E 9023 C0F8 063A8 4990+ STM 2,3,T120V 006322 9023 C0F8 063A8 4991+ STM 2,3,T120V PAGE 93 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 006326 9023 C0F8 063A8 4992+ STM 2,3,T120V 00632A 9023 C0F8 063A8 4993+ STM 2,3,T120V 00632E 9023 C0F8 063A8 4994+ STM 2,3,T120V 006332 9023 C0F8 063A8 4995+ STM 2,3,T120V 006336 9023 C0F8 063A8 4996+ STM 2,3,T120V 00633A 9023 C0F8 063A8 4997+ STM 2,3,T120V 00633E 9023 C0F8 063A8 4998+ STM 2,3,T120V 006342 9023 C0F8 063A8 4999+ STM 2,3,T120V 006346 9023 C0F8 063A8 5000+ STM 2,3,T120V 00634A 9023 C0F8 063A8 5001+ STM 2,3,T120V 00634E 9023 C0F8 063A8 5002+ STM 2,3,T120V 006352 9023 C0F8 063A8 5003+ STM 2,3,T120V 006356 9023 C0F8 063A8 5004+ STM 2,3,T120V 00635A 9023 C0F8 063A8 5005+ STM 2,3,T120V 00635E 9023 C0F8 063A8 5006+ STM 2,3,T120V 006362 9023 C0F8 063A8 5007+ STM 2,3,T120V 006366 9023 C0F8 063A8 5008+ STM 2,3,T120V 00636A 9023 C0F8 063A8 5009+ STM 2,3,T120V 00636E 9023 C0F8 063A8 5010+ STM 2,3,T120V 006372 9023 C0F8 063A8 5011+ STM 2,3,T120V 006376 9023 C0F8 063A8 5012+ STM 2,3,T120V 00637A 9023 C0F8 063A8 5013+ STM 2,3,T120V 00637E 9023 C0F8 063A8 5014+ STM 2,3,T120V 006382 9023 C0F8 063A8 5015+ STM 2,3,T120V 006386 9023 C0F8 063A8 5016+ STM 2,3,T120V 00638A 9023 C0F8 063A8 5017+ STM 2,3,T120V 00638E 9023 C0F8 063A8 5018+ STM 2,3,T120V 006392 9023 C0F8 063A8 5019+ STM 2,3,T120V 5020+* 006396 06FB 5021 BCTR R15,R11 5022 TSIMRET 006398 58F0 C100 063B0 5023+ L R15,=A(SAVETST) R15 := current save area 00639C 58DF 0004 00004 5024+ L R13,4(R15) get old save area back 0063A0 98EC D00C 0000C 5025+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0063A4 07FE 5026+ BR 14 RETURN 02000000 5027 * 0063A8 5028 T120V DS 2F 5029 TSIMEND 0063B0 5030+ LTORG 0063B0 00000458 5031 =A(SAVETST) 063B4 5032+T120TEND EQU * 5033 * 5034 * Test 121 -- STM 2,7,m ------------------------------------ 5035 * 5036 TSIMBEG T121,6500,50,1,C'STM 2,7,m (6r)' 5037+* 002764 5038+TDSCDAT CSECT 002768 5039+ DS 0D 5040+* 002768 000063B8 5041+T121TDSC DC A(T121) // TENTRY 00276C 00000114 5042+ DC A(T121TEND-T121) // TLENGTH 002770 00001964 5043+ DC F'6500' // TLRCNT 002774 00000032 5044+ DC F'50' // TIGCNT 002778 00000001 5045+ DC F'1' // TLTYPE 0010F3 5046+TEXT CSECT PAGE 94 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0010F3 E3F1F2F1 5047+SPTR0292 DC C'T121' 00277C 5048+TDSCDAT CSECT 00277C 5049+ DS 0F 00277C 040010F3 5050+ DC AL1(L'SPTR0292),AL3(SPTR0292) 0010F7 5051+TEXT CSECT 0010F7 E2E3D440F26BF76B 5052+SPTR0293 DC C'STM 2,7,m (6r)' 002780 5053+TDSCDAT CSECT 002780 5054+ DS 0F 002780 0E0010F7 5055+ DC AL1(L'SPTR0293),AL3(SPTR0293) 5056+* 004A18 5057+TDSCTBL CSECT 04A18 5058+T121TPTR EQU * 004A18 00002768 5059+ DC A(T121TDSC) enabled test 5060+* 0063B4 5061+TCODE CSECT 0063B8 5062+ DS 0D ensure double word alignment for test 0063B8 5063+T121 DS 0H 01650000 0063B8 90EC D00C 0000C 5064+ STM 14,12,12(13) SAVE REGISTERS 02950000 0063BC 18CF 5065+ LR R12,R15 base register := entry address 063B8 5066+ USING T121,R12 declare code base register 0063BE 41B0 C01E 063D6 5067+ LA R11,T121L load loop target to R11 0063C2 58F0 C110 064C8 5068+ L R15,=A(SAVETST) R15 := current save area 0063C6 50DF 0004 00004 5069+ ST R13,4(R15) set back pointer in current save area 0063CA 182D 5070+ LR R2,R13 remember callers save area 0063CC 18DF 5071+ LR R13,R15 setup current save area 0063CE 50D2 0008 00008 5072+ ST R13,8(R2) set forw pointer in callers save area 00000 5073+ USING TDSC,R1 declare TDSC base register 0063D2 58F0 1008 00008 5074+ L R15,TLRCNT load local repeat count to R15 5075+* 5076 * 5077 T121L REPINS STM,(2,7,T121V) repeat: STM 2,7,T121V 5078+* 5079+* build from sublist &ALIST a comma separated string &ARGS 5080+* 5081+* 5082+* 5083+* 5084+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5085+* this allows to transfer the repeat count from last TDSCGEN call 5086+* 5087+* 063D6 5088+T121L EQU * 5089+* 5090+* write a comment indicating what REPINS does (in case NOGEN in effect) 5091+* 5092+*,// REPINS: do 50 times: 5093+* 5094+* MNOTE requires that ' is doubled for expanded variables 5095+* thus build &MASTR as a copy of '&ARGS with ' doubled 5096+* 5097+* 5098+*,// STM 2,7,T121V 5099+* 5100+* finally generate code: &ICNT copies of &CODE &ARGS 5101+* PAGE 95 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0063D6 9027 C0F8 064B0 5102+ STM 2,7,T121V 0063DA 9027 C0F8 064B0 5103+ STM 2,7,T121V 0063DE 9027 C0F8 064B0 5104+ STM 2,7,T121V 0063E2 9027 C0F8 064B0 5105+ STM 2,7,T121V 0063E6 9027 C0F8 064B0 5106+ STM 2,7,T121V 0063EA 9027 C0F8 064B0 5107+ STM 2,7,T121V 0063EE 9027 C0F8 064B0 5108+ STM 2,7,T121V 0063F2 9027 C0F8 064B0 5109+ STM 2,7,T121V 0063F6 9027 C0F8 064B0 5110+ STM 2,7,T121V 0063FA 9027 C0F8 064B0 5111+ STM 2,7,T121V 0063FE 9027 C0F8 064B0 5112+ STM 2,7,T121V 006402 9027 C0F8 064B0 5113+ STM 2,7,T121V 006406 9027 C0F8 064B0 5114+ STM 2,7,T121V 00640A 9027 C0F8 064B0 5115+ STM 2,7,T121V 00640E 9027 C0F8 064B0 5116+ STM 2,7,T121V 006412 9027 C0F8 064B0 5117+ STM 2,7,T121V 006416 9027 C0F8 064B0 5118+ STM 2,7,T121V 00641A 9027 C0F8 064B0 5119+ STM 2,7,T121V 00641E 9027 C0F8 064B0 5120+ STM 2,7,T121V 006422 9027 C0F8 064B0 5121+ STM 2,7,T121V 006426 9027 C0F8 064B0 5122+ STM 2,7,T121V 00642A 9027 C0F8 064B0 5123+ STM 2,7,T121V 00642E 9027 C0F8 064B0 5124+ STM 2,7,T121V 006432 9027 C0F8 064B0 5125+ STM 2,7,T121V 006436 9027 C0F8 064B0 5126+ STM 2,7,T121V 00643A 9027 C0F8 064B0 5127+ STM 2,7,T121V 00643E 9027 C0F8 064B0 5128+ STM 2,7,T121V 006442 9027 C0F8 064B0 5129+ STM 2,7,T121V 006446 9027 C0F8 064B0 5130+ STM 2,7,T121V 00644A 9027 C0F8 064B0 5131+ STM 2,7,T121V 00644E 9027 C0F8 064B0 5132+ STM 2,7,T121V 006452 9027 C0F8 064B0 5133+ STM 2,7,T121V 006456 9027 C0F8 064B0 5134+ STM 2,7,T121V 00645A 9027 C0F8 064B0 5135+ STM 2,7,T121V 00645E 9027 C0F8 064B0 5136+ STM 2,7,T121V 006462 9027 C0F8 064B0 5137+ STM 2,7,T121V 006466 9027 C0F8 064B0 5138+ STM 2,7,T121V 00646A 9027 C0F8 064B0 5139+ STM 2,7,T121V 00646E 9027 C0F8 064B0 5140+ STM 2,7,T121V 006472 9027 C0F8 064B0 5141+ STM 2,7,T121V 006476 9027 C0F8 064B0 5142+ STM 2,7,T121V 00647A 9027 C0F8 064B0 5143+ STM 2,7,T121V 00647E 9027 C0F8 064B0 5144+ STM 2,7,T121V 006482 9027 C0F8 064B0 5145+ STM 2,7,T121V 006486 9027 C0F8 064B0 5146+ STM 2,7,T121V 00648A 9027 C0F8 064B0 5147+ STM 2,7,T121V 00648E 9027 C0F8 064B0 5148+ STM 2,7,T121V 006492 9027 C0F8 064B0 5149+ STM 2,7,T121V 006496 9027 C0F8 064B0 5150+ STM 2,7,T121V 00649A 9027 C0F8 064B0 5151+ STM 2,7,T121V 5152+* 00649E 06FB 5153 BCTR R15,R11 5154 TSIMRET 0064A0 58F0 C110 064C8 5155+ L R15,=A(SAVETST) R15 := current save area 0064A4 58DF 0004 00004 5156+ L R13,4(R15) get old save area back PAGE 96 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0064A8 98EC D00C 0000C 5157+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0064AC 07FE 5158+ BR 14 RETURN 02000000 5159 * 0064B0 5160 T121V DS 6F 5161 TSIMEND 0064C8 5162+ LTORG 0064C8 00000458 5163 =A(SAVETST) 064CC 5164+T121TEND EQU * 5165 * 5166 * Test 122 -- STM (14,12),m -------------------------------- 5167 * 5168 TSIMBEG T122,5000,50,1,C'STM 14,12,m (15r)' 5169+* 002784 5170+TDSCDAT CSECT 002788 5171+ DS 0D 5172+* 002788 000064D0 5173+T122TDSC DC A(T122) // TENTRY 00278C 0000013C 5174+ DC A(T122TEND-T122) // TLENGTH 002790 00001388 5175+ DC F'5000' // TLRCNT 002794 00000032 5176+ DC F'50' // TIGCNT 002798 00000001 5177+ DC F'1' // TLTYPE 001105 5178+TEXT CSECT 001105 E3F1F2F2 5179+SPTR0304 DC C'T122' 00279C 5180+TDSCDAT CSECT 00279C 5181+ DS 0F 00279C 04001105 5182+ DC AL1(L'SPTR0304),AL3(SPTR0304) 001109 5183+TEXT CSECT 001109 E2E3D440F1F46BF1 5184+SPTR0305 DC C'STM 14,12,m (15r)' 0027A0 5185+TDSCDAT CSECT 0027A0 5186+ DS 0F 0027A0 11001109 5187+ DC AL1(L'SPTR0305),AL3(SPTR0305) 5188+* 004A1C 5189+TDSCTBL CSECT 04A1C 5190+T122TPTR EQU * 004A1C 00002788 5191+ DC A(T122TDSC) enabled test 5192+* 0064CC 5193+TCODE CSECT 0064D0 5194+ DS 0D ensure double word alignment for test 0064D0 5195+T122 DS 0H 01650000 0064D0 90EC D00C 0000C 5196+ STM 14,12,12(13) SAVE REGISTERS 02950000 0064D4 18CF 5197+ LR R12,R15 base register := entry address 064D0 5198+ USING T122,R12 declare code base register 0064D6 41B0 C01E 064EE 5199+ LA R11,T122L load loop target to R11 0064DA 58F0 C138 06608 5200+ L R15,=A(SAVETST) R15 := current save area 0064DE 50DF 0004 00004 5201+ ST R13,4(R15) set back pointer in current save area 0064E2 182D 5202+ LR R2,R13 remember callers save area 0064E4 18DF 5203+ LR R13,R15 setup current save area 0064E6 50D2 0008 00008 5204+ ST R13,8(R2) set forw pointer in callers save area 00000 5205+ USING TDSC,R1 declare TDSC base register 0064EA 58F0 1008 00008 5206+ L R15,TLRCNT load local repeat count to R15 5207+* 5208 * 5209 T122L REPINS STM,(14,12,T122V) repeat: STM 14,12,T122V 5210+* 5211+* build from sublist &ALIST a comma separated string &ARGS PAGE 97 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 5212+* 5213+* 5214+* 5215+* 5216+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5217+* this allows to transfer the repeat count from last TDSCGEN call 5218+* 5219+* 064EE 5220+T122L EQU * 5221+* 5222+* write a comment indicating what REPINS does (in case NOGEN in effect) 5223+* 5224+*,// REPINS: do 50 times: 5225+* 5226+* MNOTE requires that ' is doubled for expanded variables 5227+* thus build &MASTR as a copy of '&ARGS with ' doubled 5228+* 5229+* 5230+*,// STM 14,12,T122V 5231+* 5232+* finally generate code: &ICNT copies of &CODE &ARGS 5233+* 0064EE 90EC C0F8 065C8 5234+ STM 14,12,T122V 0064F2 90EC C0F8 065C8 5235+ STM 14,12,T122V 0064F6 90EC C0F8 065C8 5236+ STM 14,12,T122V 0064FA 90EC C0F8 065C8 5237+ STM 14,12,T122V 0064FE 90EC C0F8 065C8 5238+ STM 14,12,T122V 006502 90EC C0F8 065C8 5239+ STM 14,12,T122V 006506 90EC C0F8 065C8 5240+ STM 14,12,T122V 00650A 90EC C0F8 065C8 5241+ STM 14,12,T122V 00650E 90EC C0F8 065C8 5242+ STM 14,12,T122V 006512 90EC C0F8 065C8 5243+ STM 14,12,T122V 006516 90EC C0F8 065C8 5244+ STM 14,12,T122V 00651A 90EC C0F8 065C8 5245+ STM 14,12,T122V 00651E 90EC C0F8 065C8 5246+ STM 14,12,T122V 006522 90EC C0F8 065C8 5247+ STM 14,12,T122V 006526 90EC C0F8 065C8 5248+ STM 14,12,T122V 00652A 90EC C0F8 065C8 5249+ STM 14,12,T122V 00652E 90EC C0F8 065C8 5250+ STM 14,12,T122V 006532 90EC C0F8 065C8 5251+ STM 14,12,T122V 006536 90EC C0F8 065C8 5252+ STM 14,12,T122V 00653A 90EC C0F8 065C8 5253+ STM 14,12,T122V 00653E 90EC C0F8 065C8 5254+ STM 14,12,T122V 006542 90EC C0F8 065C8 5255+ STM 14,12,T122V 006546 90EC C0F8 065C8 5256+ STM 14,12,T122V 00654A 90EC C0F8 065C8 5257+ STM 14,12,T122V 00654E 90EC C0F8 065C8 5258+ STM 14,12,T122V 006552 90EC C0F8 065C8 5259+ STM 14,12,T122V 006556 90EC C0F8 065C8 5260+ STM 14,12,T122V 00655A 90EC C0F8 065C8 5261+ STM 14,12,T122V 00655E 90EC C0F8 065C8 5262+ STM 14,12,T122V 006562 90EC C0F8 065C8 5263+ STM 14,12,T122V 006566 90EC C0F8 065C8 5264+ STM 14,12,T122V 00656A 90EC C0F8 065C8 5265+ STM 14,12,T122V 00656E 90EC C0F8 065C8 5266+ STM 14,12,T122V PAGE 98 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 006572 90EC C0F8 065C8 5267+ STM 14,12,T122V 006576 90EC C0F8 065C8 5268+ STM 14,12,T122V 00657A 90EC C0F8 065C8 5269+ STM 14,12,T122V 00657E 90EC C0F8 065C8 5270+ STM 14,12,T122V 006582 90EC C0F8 065C8 5271+ STM 14,12,T122V 006586 90EC C0F8 065C8 5272+ STM 14,12,T122V 00658A 90EC C0F8 065C8 5273+ STM 14,12,T122V 00658E 90EC C0F8 065C8 5274+ STM 14,12,T122V 006592 90EC C0F8 065C8 5275+ STM 14,12,T122V 006596 90EC C0F8 065C8 5276+ STM 14,12,T122V 00659A 90EC C0F8 065C8 5277+ STM 14,12,T122V 00659E 90EC C0F8 065C8 5278+ STM 14,12,T122V 0065A2 90EC C0F8 065C8 5279+ STM 14,12,T122V 0065A6 90EC C0F8 065C8 5280+ STM 14,12,T122V 0065AA 90EC C0F8 065C8 5281+ STM 14,12,T122V 0065AE 90EC C0F8 065C8 5282+ STM 14,12,T122V 0065B2 90EC C0F8 065C8 5283+ STM 14,12,T122V 5284+* 0065B6 06FB 5285 BCTR R15,R11 5286 TSIMRET 0065B8 58F0 C138 06608 5287+ L R15,=A(SAVETST) R15 := current save area 0065BC 58DF 0004 00004 5288+ L R13,4(R15) get old save area back 0065C0 98EC D00C 0000C 5289+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0065C4 07FE 5290+ BR 14 RETURN 02000000 5291 * 0065C8 5292 T122V DS 15F 5293 TSIMEND 006608 5294+ LTORG 006608 00000458 5295 =A(SAVETST) 0660C 5296+T122TEND EQU * 5297 * 5298 * Test 123 -- LM 2,3,m ------------------------------------- 5299 * 5300 TSIMBEG T123,9000,50,1,C'LM 2,3,m (2r)' 5301+* 0027A4 5302+TDSCDAT CSECT 0027A8 5303+ DS 0D 5304+* 0027A8 00006610 5305+T123TDSC DC A(T123) // TENTRY 0027AC 00000104 5306+ DC A(T123TEND-T123) // TLENGTH 0027B0 00002328 5307+ DC F'9000' // TLRCNT 0027B4 00000032 5308+ DC F'50' // TIGCNT 0027B8 00000001 5309+ DC F'1' // TLTYPE 00111A 5310+TEXT CSECT 00111A E3F1F2F3 5311+SPTR0316 DC C'T123' 0027BC 5312+TDSCDAT CSECT 0027BC 5313+ DS 0F 0027BC 0400111A 5314+ DC AL1(L'SPTR0316),AL3(SPTR0316) 00111E 5315+TEXT CSECT 00111E D3D440F26BF36B94 5316+SPTR0317 DC C'LM 2,3,m (2r)' 0027C0 5317+TDSCDAT CSECT 0027C0 5318+ DS 0F 0027C0 0D00111E 5319+ DC AL1(L'SPTR0317),AL3(SPTR0317) 5320+* 004A20 5321+TDSCTBL CSECT PAGE 99 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 04A20 5322+T123TPTR EQU * 004A20 000027A8 5323+ DC A(T123TDSC) enabled test 5324+* 00660C 5325+TCODE CSECT 006610 5326+ DS 0D ensure double word alignment for test 006610 5327+T123 DS 0H 01650000 006610 90EC D00C 0000C 5328+ STM 14,12,12(13) SAVE REGISTERS 02950000 006614 18CF 5329+ LR R12,R15 base register := entry address 06610 5330+ USING T123,R12 declare code base register 006616 41B0 C01E 0662E 5331+ LA R11,T123L load loop target to R11 00661A 58F0 C100 06710 5332+ L R15,=A(SAVETST) R15 := current save area 00661E 50DF 0004 00004 5333+ ST R13,4(R15) set back pointer in current save area 006622 182D 5334+ LR R2,R13 remember callers save area 006624 18DF 5335+ LR R13,R15 setup current save area 006626 50D2 0008 00008 5336+ ST R13,8(R2) set forw pointer in callers save area 00000 5337+ USING TDSC,R1 declare TDSC base register 00662A 58F0 1008 00008 5338+ L R15,TLRCNT load local repeat count to R15 5339+* 5340 * 5341 T123L REPINS LM,(2,3,T123V) repeat: LM 2,3,T123V 5342+* 5343+* build from sublist &ALIST a comma separated string &ARGS 5344+* 5345+* 5346+* 5347+* 5348+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5349+* this allows to transfer the repeat count from last TDSCGEN call 5350+* 5351+* 0662E 5352+T123L EQU * 5353+* 5354+* write a comment indicating what REPINS does (in case NOGEN in effect) 5355+* 5356+*,// REPINS: do 50 times: 5357+* 5358+* MNOTE requires that ' is doubled for expanded variables 5359+* thus build &MASTR as a copy of '&ARGS with ' doubled 5360+* 5361+* 5362+*,// LM 2,3,T123V 5363+* 5364+* finally generate code: &ICNT copies of &CODE &ARGS 5365+* 00662E 9823 C0F8 06708 5366+ LM 2,3,T123V 006632 9823 C0F8 06708 5367+ LM 2,3,T123V 006636 9823 C0F8 06708 5368+ LM 2,3,T123V 00663A 9823 C0F8 06708 5369+ LM 2,3,T123V 00663E 9823 C0F8 06708 5370+ LM 2,3,T123V 006642 9823 C0F8 06708 5371+ LM 2,3,T123V 006646 9823 C0F8 06708 5372+ LM 2,3,T123V 00664A 9823 C0F8 06708 5373+ LM 2,3,T123V 00664E 9823 C0F8 06708 5374+ LM 2,3,T123V 006652 9823 C0F8 06708 5375+ LM 2,3,T123V 006656 9823 C0F8 06708 5376+ LM 2,3,T123V PAGE 100 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00665A 9823 C0F8 06708 5377+ LM 2,3,T123V 00665E 9823 C0F8 06708 5378+ LM 2,3,T123V 006662 9823 C0F8 06708 5379+ LM 2,3,T123V 006666 9823 C0F8 06708 5380+ LM 2,3,T123V 00666A 9823 C0F8 06708 5381+ LM 2,3,T123V 00666E 9823 C0F8 06708 5382+ LM 2,3,T123V 006672 9823 C0F8 06708 5383+ LM 2,3,T123V 006676 9823 C0F8 06708 5384+ LM 2,3,T123V 00667A 9823 C0F8 06708 5385+ LM 2,3,T123V 00667E 9823 C0F8 06708 5386+ LM 2,3,T123V 006682 9823 C0F8 06708 5387+ LM 2,3,T123V 006686 9823 C0F8 06708 5388+ LM 2,3,T123V 00668A 9823 C0F8 06708 5389+ LM 2,3,T123V 00668E 9823 C0F8 06708 5390+ LM 2,3,T123V 006692 9823 C0F8 06708 5391+ LM 2,3,T123V 006696 9823 C0F8 06708 5392+ LM 2,3,T123V 00669A 9823 C0F8 06708 5393+ LM 2,3,T123V 00669E 9823 C0F8 06708 5394+ LM 2,3,T123V 0066A2 9823 C0F8 06708 5395+ LM 2,3,T123V 0066A6 9823 C0F8 06708 5396+ LM 2,3,T123V 0066AA 9823 C0F8 06708 5397+ LM 2,3,T123V 0066AE 9823 C0F8 06708 5398+ LM 2,3,T123V 0066B2 9823 C0F8 06708 5399+ LM 2,3,T123V 0066B6 9823 C0F8 06708 5400+ LM 2,3,T123V 0066BA 9823 C0F8 06708 5401+ LM 2,3,T123V 0066BE 9823 C0F8 06708 5402+ LM 2,3,T123V 0066C2 9823 C0F8 06708 5403+ LM 2,3,T123V 0066C6 9823 C0F8 06708 5404+ LM 2,3,T123V 0066CA 9823 C0F8 06708 5405+ LM 2,3,T123V 0066CE 9823 C0F8 06708 5406+ LM 2,3,T123V 0066D2 9823 C0F8 06708 5407+ LM 2,3,T123V 0066D6 9823 C0F8 06708 5408+ LM 2,3,T123V 0066DA 9823 C0F8 06708 5409+ LM 2,3,T123V 0066DE 9823 C0F8 06708 5410+ LM 2,3,T123V 0066E2 9823 C0F8 06708 5411+ LM 2,3,T123V 0066E6 9823 C0F8 06708 5412+ LM 2,3,T123V 0066EA 9823 C0F8 06708 5413+ LM 2,3,T123V 0066EE 9823 C0F8 06708 5414+ LM 2,3,T123V 0066F2 9823 C0F8 06708 5415+ LM 2,3,T123V 5416+* 0066F6 06FB 5417 BCTR R15,R11 5418 TSIMRET 0066F8 58F0 C100 06710 5419+ L R15,=A(SAVETST) R15 := current save area 0066FC 58DF 0004 00004 5420+ L R13,4(R15) get old save area back 006700 98EC D00C 0000C 5421+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006704 07FE 5422+ BR 14 RETURN 02000000 5423 * 006706 0000 006708 0000000300000003 5424 T123V DC F'3',F'3' 5425 TSIMEND 006710 5426+ LTORG 006710 00000458 5427 =A(SAVETST) 06714 5428+T123TEND EQU * 5429 * 5430 * Test 124 -- LM 2,7,m ------------------------------------- PAGE 101 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 5431 * 5432 TSIMBEG T124,6000,50,1,C'LM 2,7,m (6r)' 5433+* 0027C4 5434+TDSCDAT CSECT 0027C8 5435+ DS 0D 5436+* 0027C8 00006718 5437+T124TDSC DC A(T124) // TENTRY 0027CC 00000114 5438+ DC A(T124TEND-T124) // TLENGTH 0027D0 00001770 5439+ DC F'6000' // TLRCNT 0027D4 00000032 5440+ DC F'50' // TIGCNT 0027D8 00000001 5441+ DC F'1' // TLTYPE 00112B 5442+TEXT CSECT 00112B E3F1F2F4 5443+SPTR0328 DC C'T124' 0027DC 5444+TDSCDAT CSECT 0027DC 5445+ DS 0F 0027DC 0400112B 5446+ DC AL1(L'SPTR0328),AL3(SPTR0328) 00112F 5447+TEXT CSECT 00112F D3D440F26BF76B94 5448+SPTR0329 DC C'LM 2,7,m (6r)' 0027E0 5449+TDSCDAT CSECT 0027E0 5450+ DS 0F 0027E0 0D00112F 5451+ DC AL1(L'SPTR0329),AL3(SPTR0329) 5452+* 004A24 5453+TDSCTBL CSECT 04A24 5454+T124TPTR EQU * 004A24 000027C8 5455+ DC A(T124TDSC) enabled test 5456+* 006714 5457+TCODE CSECT 006718 5458+ DS 0D ensure double word alignment for test 006718 5459+T124 DS 0H 01650000 006718 90EC D00C 0000C 5460+ STM 14,12,12(13) SAVE REGISTERS 02950000 00671C 18CF 5461+ LR R12,R15 base register := entry address 06718 5462+ USING T124,R12 declare code base register 00671E 41B0 C01E 06736 5463+ LA R11,T124L load loop target to R11 006722 58F0 C110 06828 5464+ L R15,=A(SAVETST) R15 := current save area 006726 50DF 0004 00004 5465+ ST R13,4(R15) set back pointer in current save area 00672A 182D 5466+ LR R2,R13 remember callers save area 00672C 18DF 5467+ LR R13,R15 setup current save area 00672E 50D2 0008 00008 5468+ ST R13,8(R2) set forw pointer in callers save area 00000 5469+ USING TDSC,R1 declare TDSC base register 006732 58F0 1008 00008 5470+ L R15,TLRCNT load local repeat count to R15 5471+* 5472 * 5473 T124L REPINS LM,(2,7,T124V) repeat: LM 2,7,T124V 5474+* 5475+* build from sublist &ALIST a comma separated string &ARGS 5476+* 5477+* 5478+* 5479+* 5480+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5481+* this allows to transfer the repeat count from last TDSCGEN call 5482+* 5483+* 06736 5484+T124L EQU * 5485+* PAGE 102 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 5486+* write a comment indicating what REPINS does (in case NOGEN in effect) 5487+* 5488+*,// REPINS: do 50 times: 5489+* 5490+* MNOTE requires that ' is doubled for expanded variables 5491+* thus build &MASTR as a copy of '&ARGS with ' doubled 5492+* 5493+* 5494+*,// LM 2,7,T124V 5495+* 5496+* finally generate code: &ICNT copies of &CODE &ARGS 5497+* 006736 9827 C0F8 06810 5498+ LM 2,7,T124V 00673A 9827 C0F8 06810 5499+ LM 2,7,T124V 00673E 9827 C0F8 06810 5500+ LM 2,7,T124V 006742 9827 C0F8 06810 5501+ LM 2,7,T124V 006746 9827 C0F8 06810 5502+ LM 2,7,T124V 00674A 9827 C0F8 06810 5503+ LM 2,7,T124V 00674E 9827 C0F8 06810 5504+ LM 2,7,T124V 006752 9827 C0F8 06810 5505+ LM 2,7,T124V 006756 9827 C0F8 06810 5506+ LM 2,7,T124V 00675A 9827 C0F8 06810 5507+ LM 2,7,T124V 00675E 9827 C0F8 06810 5508+ LM 2,7,T124V 006762 9827 C0F8 06810 5509+ LM 2,7,T124V 006766 9827 C0F8 06810 5510+ LM 2,7,T124V 00676A 9827 C0F8 06810 5511+ LM 2,7,T124V 00676E 9827 C0F8 06810 5512+ LM 2,7,T124V 006772 9827 C0F8 06810 5513+ LM 2,7,T124V 006776 9827 C0F8 06810 5514+ LM 2,7,T124V 00677A 9827 C0F8 06810 5515+ LM 2,7,T124V 00677E 9827 C0F8 06810 5516+ LM 2,7,T124V 006782 9827 C0F8 06810 5517+ LM 2,7,T124V 006786 9827 C0F8 06810 5518+ LM 2,7,T124V 00678A 9827 C0F8 06810 5519+ LM 2,7,T124V 00678E 9827 C0F8 06810 5520+ LM 2,7,T124V 006792 9827 C0F8 06810 5521+ LM 2,7,T124V 006796 9827 C0F8 06810 5522+ LM 2,7,T124V 00679A 9827 C0F8 06810 5523+ LM 2,7,T124V 00679E 9827 C0F8 06810 5524+ LM 2,7,T124V 0067A2 9827 C0F8 06810 5525+ LM 2,7,T124V 0067A6 9827 C0F8 06810 5526+ LM 2,7,T124V 0067AA 9827 C0F8 06810 5527+ LM 2,7,T124V 0067AE 9827 C0F8 06810 5528+ LM 2,7,T124V 0067B2 9827 C0F8 06810 5529+ LM 2,7,T124V 0067B6 9827 C0F8 06810 5530+ LM 2,7,T124V 0067BA 9827 C0F8 06810 5531+ LM 2,7,T124V 0067BE 9827 C0F8 06810 5532+ LM 2,7,T124V 0067C2 9827 C0F8 06810 5533+ LM 2,7,T124V 0067C6 9827 C0F8 06810 5534+ LM 2,7,T124V 0067CA 9827 C0F8 06810 5535+ LM 2,7,T124V 0067CE 9827 C0F8 06810 5536+ LM 2,7,T124V 0067D2 9827 C0F8 06810 5537+ LM 2,7,T124V 0067D6 9827 C0F8 06810 5538+ LM 2,7,T124V 0067DA 9827 C0F8 06810 5539+ LM 2,7,T124V 0067DE 9827 C0F8 06810 5540+ LM 2,7,T124V PAGE 103 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0067E2 9827 C0F8 06810 5541+ LM 2,7,T124V 0067E6 9827 C0F8 06810 5542+ LM 2,7,T124V 0067EA 9827 C0F8 06810 5543+ LM 2,7,T124V 0067EE 9827 C0F8 06810 5544+ LM 2,7,T124V 0067F2 9827 C0F8 06810 5545+ LM 2,7,T124V 0067F6 9827 C0F8 06810 5546+ LM 2,7,T124V 0067FA 9827 C0F8 06810 5547+ LM 2,7,T124V 5548+* 0067FE 06FB 5549 BCTR R15,R11 5550 TSIMRET 006800 58F0 C110 06828 5551+ L R15,=A(SAVETST) R15 := current save area 006804 58DF 0004 00004 5552+ L R13,4(R15) get old save area back 006808 98EC D00C 0000C 5553+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00680C 07FE 5554+ BR 14 RETURN 02000000 5555 * 00680E 0000 006810 0000000200000003 5556 T124V DC F'2',F'3',F'4',F'5',F'6',F'7' 5557 TSIMEND 006828 5558+ LTORG 006828 00000458 5559 =A(SAVETST) 0682C 5560+T124TEND EQU * 5561 * 5562 * Test 125 -- LM 0,11,m ------------------------------------ 5563 * 5564 TSIMBEG T125,5000,50,2,C'LM 0,11,m (12r)' 5565+* 0027E4 5566+TDSCDAT CSECT 0027E8 5567+ DS 0D 5568+* 0027E8 00006830 5569+T125TDSC DC A(T125) // TENTRY 0027EC 0000012C 5570+ DC A(T125TEND-T125) // TLENGTH 0027F0 00001388 5571+ DC F'5000' // TLRCNT 0027F4 00000032 5572+ DC F'50' // TIGCNT 0027F8 00000002 5573+ DC F'2' // TLTYPE 00113C 5574+TEXT CSECT 00113C E3F1F2F5 5575+SPTR0340 DC C'T125' 0027FC 5576+TDSCDAT CSECT 0027FC 5577+ DS 0F 0027FC 0400113C 5578+ DC AL1(L'SPTR0340),AL3(SPTR0340) 001140 5579+TEXT CSECT 001140 D3D440F06BF1F16B 5580+SPTR0341 DC C'LM 0,11,m (12r)' 002800 5581+TDSCDAT CSECT 002800 5582+ DS 0F 002800 0F001140 5583+ DC AL1(L'SPTR0341),AL3(SPTR0341) 5584+* 004A28 5585+TDSCTBL CSECT 04A28 5586+T125TPTR EQU * 004A28 000027E8 5587+ DC A(T125TDSC) enabled test 5588+* 00682C 5589+TCODE CSECT 006830 5590+ DS 0D ensure double word alignment for test 006830 5591+T125 DS 0H 01650000 006830 90EC D00C 0000C 5592+ STM 14,12,12(13) SAVE REGISTERS 02950000 006834 18CF 5593+ LR R12,R15 base register := entry address 06830 5594+ USING T125,R12 declare code base register PAGE 104 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 006836 41B0 C01E 0684E 5595+ LA R11,T125L load loop target to R11 00683A 58F0 C128 06958 5596+ L R15,=A(SAVETST) R15 := current save area 00683E 50DF 0004 00004 5597+ ST R13,4(R15) set back pointer in current save area 006842 182D 5598+ LR R2,R13 remember callers save area 006844 18DF 5599+ LR R13,R15 setup current save area 006846 50D2 0008 00008 5600+ ST R13,8(R2) set forw pointer in callers save area 00000 5601+ USING TDSC,R1 declare TDSC base register 00684A 58F0 1008 00008 5602+ L R15,TLRCNT load local repeat count to R15 5603+* 5604 * 5605 T125L REPINS LM,(0,11,T125V) repeat: LM 0,11,T125V 5606+* 5607+* build from sublist &ALIST a comma separated string &ARGS 5608+* 5609+* 5610+* 5611+* 5612+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5613+* this allows to transfer the repeat count from last TDSCGEN call 5614+* 5615+* 0684E 5616+T125L EQU * 5617+* 5618+* write a comment indicating what REPINS does (in case NOGEN in effect) 5619+* 5620+*,// REPINS: do 50 times: 5621+* 5622+* MNOTE requires that ' is doubled for expanded variables 5623+* thus build &MASTR as a copy of '&ARGS with ' doubled 5624+* 5625+* 5626+*,// LM 0,11,T125V 5627+* 5628+* finally generate code: &ICNT copies of &CODE &ARGS 5629+* 00684E 980B C0F8 06928 5630+ LM 0,11,T125V 006852 980B C0F8 06928 5631+ LM 0,11,T125V 006856 980B C0F8 06928 5632+ LM 0,11,T125V 00685A 980B C0F8 06928 5633+ LM 0,11,T125V 00685E 980B C0F8 06928 5634+ LM 0,11,T125V 006862 980B C0F8 06928 5635+ LM 0,11,T125V 006866 980B C0F8 06928 5636+ LM 0,11,T125V 00686A 980B C0F8 06928 5637+ LM 0,11,T125V 00686E 980B C0F8 06928 5638+ LM 0,11,T125V 006872 980B C0F8 06928 5639+ LM 0,11,T125V 006876 980B C0F8 06928 5640+ LM 0,11,T125V 00687A 980B C0F8 06928 5641+ LM 0,11,T125V 00687E 980B C0F8 06928 5642+ LM 0,11,T125V 006882 980B C0F8 06928 5643+ LM 0,11,T125V 006886 980B C0F8 06928 5644+ LM 0,11,T125V 00688A 980B C0F8 06928 5645+ LM 0,11,T125V 00688E 980B C0F8 06928 5646+ LM 0,11,T125V 006892 980B C0F8 06928 5647+ LM 0,11,T125V 006896 980B C0F8 06928 5648+ LM 0,11,T125V 00689A 980B C0F8 06928 5649+ LM 0,11,T125V PAGE 105 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00689E 980B C0F8 06928 5650+ LM 0,11,T125V 0068A2 980B C0F8 06928 5651+ LM 0,11,T125V 0068A6 980B C0F8 06928 5652+ LM 0,11,T125V 0068AA 980B C0F8 06928 5653+ LM 0,11,T125V 0068AE 980B C0F8 06928 5654+ LM 0,11,T125V 0068B2 980B C0F8 06928 5655+ LM 0,11,T125V 0068B6 980B C0F8 06928 5656+ LM 0,11,T125V 0068BA 980B C0F8 06928 5657+ LM 0,11,T125V 0068BE 980B C0F8 06928 5658+ LM 0,11,T125V 0068C2 980B C0F8 06928 5659+ LM 0,11,T125V 0068C6 980B C0F8 06928 5660+ LM 0,11,T125V 0068CA 980B C0F8 06928 5661+ LM 0,11,T125V 0068CE 980B C0F8 06928 5662+ LM 0,11,T125V 0068D2 980B C0F8 06928 5663+ LM 0,11,T125V 0068D6 980B C0F8 06928 5664+ LM 0,11,T125V 0068DA 980B C0F8 06928 5665+ LM 0,11,T125V 0068DE 980B C0F8 06928 5666+ LM 0,11,T125V 0068E2 980B C0F8 06928 5667+ LM 0,11,T125V 0068E6 980B C0F8 06928 5668+ LM 0,11,T125V 0068EA 980B C0F8 06928 5669+ LM 0,11,T125V 0068EE 980B C0F8 06928 5670+ LM 0,11,T125V 0068F2 980B C0F8 06928 5671+ LM 0,11,T125V 0068F6 980B C0F8 06928 5672+ LM 0,11,T125V 0068FA 980B C0F8 06928 5673+ LM 0,11,T125V 0068FE 980B C0F8 06928 5674+ LM 0,11,T125V 006902 980B C0F8 06928 5675+ LM 0,11,T125V 006906 980B C0F8 06928 5676+ LM 0,11,T125V 00690A 980B C0F8 06928 5677+ LM 0,11,T125V 00690E 980B C0F8 06928 5678+ LM 0,11,T125V 006912 980B C0F8 06928 5679+ LM 0,11,T125V 5680+* 006916 46F0 C01E 0684E 5681 BCT R15,T125L 5682 TSIMRET 00691A 58F0 C128 06958 5683+ L R15,=A(SAVETST) R15 := current save area 00691E 58DF 0004 00004 5684+ L R13,4(R15) get old save area back 006922 98EC D00C 0000C 5685+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006926 07FE 5686+ BR 14 RETURN 02000000 5687 * 006928 0000000000000001 5688 T125V DC F'0',F'1',F'2',F'3',F'4',F'5' 006940 0000000600000007 5689 DC F'6',F'7',F'8',F'9',F'10',F'11' 5690 TSIMEND 006958 5691+ LTORG 006958 00000458 5692 =A(SAVETST) 0695C 5693+T125TEND EQU * 5694 * 5695 * Test 15x -- MVC ========================================== 5696 * 5697 * Test 150 -- MVC m,m (5c) --------------------------------- 5698 * 5699 TSIMBEG T150,5000,50,1,C'MVC m,m (5c)' 5700+* 002804 5701+TDSCDAT CSECT 002808 5702+ DS 0D 5703+* 002808 00006960 5704+T150TDSC DC A(T150) // TENTRY PAGE 106 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00280C 0000016C 5705+ DC A(T150TEND-T150) // TLENGTH 002810 00001388 5706+ DC F'5000' // TLRCNT 002814 00000032 5707+ DC F'50' // TIGCNT 002818 00000001 5708+ DC F'1' // TLTYPE 00114F 5709+TEXT CSECT 00114F E3F1F5F0 5710+SPTR0352 DC C'T150' 00281C 5711+TDSCDAT CSECT 00281C 5712+ DS 0F 00281C 0400114F 5713+ DC AL1(L'SPTR0352),AL3(SPTR0352) 001153 5714+TEXT CSECT 001153 D4E5C340946B9440 5715+SPTR0353 DC C'MVC m,m (5c)' 002820 5716+TDSCDAT CSECT 002820 5717+ DS 0F 002820 0C001153 5718+ DC AL1(L'SPTR0353),AL3(SPTR0353) 5719+* 004A2C 5720+TDSCTBL CSECT 04A2C 5721+T150TPTR EQU * 004A2C 00002808 5722+ DC A(T150TDSC) enabled test 5723+* 00695C 5724+TCODE CSECT 006960 5725+ DS 0D ensure double word alignment for test 006960 5726+T150 DS 0H 01650000 006960 90EC D00C 0000C 5727+ STM 14,12,12(13) SAVE REGISTERS 02950000 006964 18CF 5728+ LR R12,R15 base register := entry address 06960 5729+ USING T150,R12 declare code base register 006966 41B0 C01E 0697E 5730+ LA R11,T150L load loop target to R11 00696A 58F0 C168 06AC8 5731+ L R15,=A(SAVETST) R15 := current save area 00696E 50DF 0004 00004 5732+ ST R13,4(R15) set back pointer in current save area 006972 182D 5733+ LR R2,R13 remember callers save area 006974 18DF 5734+ LR R13,R15 setup current save area 006976 50D2 0008 00008 5735+ ST R13,8(R2) set forw pointer in callers save area 00000 5736+ USING TDSC,R1 declare TDSC base register 00697A 58F0 1008 00008 5737+ L R15,TLRCNT load local repeat count to R15 5738+* 5739 * 5740 T150L REPINS MVC,(T150V1,T150V2) repeat: MVC T150V1,T150V2 5741+* 5742+* build from sublist &ALIST a comma separated string &ARGS 5743+* 5744+* 5745+* 5746+* 5747+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5748+* this allows to transfer the repeat count from last TDSCGEN call 5749+* 5750+* 0697E 5751+T150L EQU * 5752+* 5753+* write a comment indicating what REPINS does (in case NOGEN in effect) 5754+* 5755+*,// REPINS: do 50 times: 5756+* 5757+* MNOTE requires that ' is doubled for expanded variables 5758+* thus build &MASTR as a copy of '&ARGS with ' doubled 5759+* PAGE 107 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 5760+* 5761+*,// MVC T150V1,T150V2 5762+* 5763+* finally generate code: &ICNT copies of &CODE &ARGS 5764+* 00697E D204 C15C C161 06ABC 06AC1 5765+ MVC T150V1,T150V2 006984 D204 C15C C161 06ABC 06AC1 5766+ MVC T150V1,T150V2 00698A D204 C15C C161 06ABC 06AC1 5767+ MVC T150V1,T150V2 006990 D204 C15C C161 06ABC 06AC1 5768+ MVC T150V1,T150V2 006996 D204 C15C C161 06ABC 06AC1 5769+ MVC T150V1,T150V2 00699C D204 C15C C161 06ABC 06AC1 5770+ MVC T150V1,T150V2 0069A2 D204 C15C C161 06ABC 06AC1 5771+ MVC T150V1,T150V2 0069A8 D204 C15C C161 06ABC 06AC1 5772+ MVC T150V1,T150V2 0069AE D204 C15C C161 06ABC 06AC1 5773+ MVC T150V1,T150V2 0069B4 D204 C15C C161 06ABC 06AC1 5774+ MVC T150V1,T150V2 0069BA D204 C15C C161 06ABC 06AC1 5775+ MVC T150V1,T150V2 0069C0 D204 C15C C161 06ABC 06AC1 5776+ MVC T150V1,T150V2 0069C6 D204 C15C C161 06ABC 06AC1 5777+ MVC T150V1,T150V2 0069CC D204 C15C C161 06ABC 06AC1 5778+ MVC T150V1,T150V2 0069D2 D204 C15C C161 06ABC 06AC1 5779+ MVC T150V1,T150V2 0069D8 D204 C15C C161 06ABC 06AC1 5780+ MVC T150V1,T150V2 0069DE D204 C15C C161 06ABC 06AC1 5781+ MVC T150V1,T150V2 0069E4 D204 C15C C161 06ABC 06AC1 5782+ MVC T150V1,T150V2 0069EA D204 C15C C161 06ABC 06AC1 5783+ MVC T150V1,T150V2 0069F0 D204 C15C C161 06ABC 06AC1 5784+ MVC T150V1,T150V2 0069F6 D204 C15C C161 06ABC 06AC1 5785+ MVC T150V1,T150V2 0069FC D204 C15C C161 06ABC 06AC1 5786+ MVC T150V1,T150V2 006A02 D204 C15C C161 06ABC 06AC1 5787+ MVC T150V1,T150V2 006A08 D204 C15C C161 06ABC 06AC1 5788+ MVC T150V1,T150V2 006A0E D204 C15C C161 06ABC 06AC1 5789+ MVC T150V1,T150V2 006A14 D204 C15C C161 06ABC 06AC1 5790+ MVC T150V1,T150V2 006A1A D204 C15C C161 06ABC 06AC1 5791+ MVC T150V1,T150V2 006A20 D204 C15C C161 06ABC 06AC1 5792+ MVC T150V1,T150V2 006A26 D204 C15C C161 06ABC 06AC1 5793+ MVC T150V1,T150V2 006A2C D204 C15C C161 06ABC 06AC1 5794+ MVC T150V1,T150V2 006A32 D204 C15C C161 06ABC 06AC1 5795+ MVC T150V1,T150V2 006A38 D204 C15C C161 06ABC 06AC1 5796+ MVC T150V1,T150V2 006A3E D204 C15C C161 06ABC 06AC1 5797+ MVC T150V1,T150V2 006A44 D204 C15C C161 06ABC 06AC1 5798+ MVC T150V1,T150V2 006A4A D204 C15C C161 06ABC 06AC1 5799+ MVC T150V1,T150V2 006A50 D204 C15C C161 06ABC 06AC1 5800+ MVC T150V1,T150V2 006A56 D204 C15C C161 06ABC 06AC1 5801+ MVC T150V1,T150V2 006A5C D204 C15C C161 06ABC 06AC1 5802+ MVC T150V1,T150V2 006A62 D204 C15C C161 06ABC 06AC1 5803+ MVC T150V1,T150V2 006A68 D204 C15C C161 06ABC 06AC1 5804+ MVC T150V1,T150V2 006A6E D204 C15C C161 06ABC 06AC1 5805+ MVC T150V1,T150V2 006A74 D204 C15C C161 06ABC 06AC1 5806+ MVC T150V1,T150V2 006A7A D204 C15C C161 06ABC 06AC1 5807+ MVC T150V1,T150V2 006A80 D204 C15C C161 06ABC 06AC1 5808+ MVC T150V1,T150V2 006A86 D204 C15C C161 06ABC 06AC1 5809+ MVC T150V1,T150V2 006A8C D204 C15C C161 06ABC 06AC1 5810+ MVC T150V1,T150V2 006A92 D204 C15C C161 06ABC 06AC1 5811+ MVC T150V1,T150V2 006A98 D204 C15C C161 06ABC 06AC1 5812+ MVC T150V1,T150V2 006A9E D204 C15C C161 06ABC 06AC1 5813+ MVC T150V1,T150V2 006AA4 D204 C15C C161 06ABC 06AC1 5814+ MVC T150V1,T150V2 PAGE 108 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 5815+* 006AAA 06FB 5816 BCTR R15,R11 5817 TSIMRET 006AAC 58F0 C168 06AC8 5818+ L R15,=A(SAVETST) R15 := current save area 006AB0 58DF 0004 00004 5819+ L R13,4(R15) get old save area back 006AB4 98EC D00C 0000C 5820+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006AB8 07FE 5821+ BR 14 RETURN 02000000 5822 * 006ABC 5823 DS 0F 006ABC 4040404040 5824 T150V1 DC CL5' ' 006AC1 F0F1F2F3F4 5825 T150V2 DC CL5'01234' 006AC6 5826 DS 0H 5827 TSIMEND 006AC8 5828+ LTORG 006AC8 00000458 5829 =A(SAVETST) 06ACC 5830+T150TEND EQU * 5831 * 5832 * Test 151 -- MVC m,m (10c) -------------------------------- 5833 * 5834 TSIMBEG T151,5000,50,1,C'MVC m,m (10c)' 5835+* 002824 5836+TDSCDAT CSECT 002828 5837+ DS 0D 5838+* 002828 00006AD0 5839+T151TDSC DC A(T151) // TENTRY 00282C 00000174 5840+ DC A(T151TEND-T151) // TLENGTH 002830 00001388 5841+ DC F'5000' // TLRCNT 002834 00000032 5842+ DC F'50' // TIGCNT 002838 00000001 5843+ DC F'1' // TLTYPE 00115F 5844+TEXT CSECT 00115F E3F1F5F1 5845+SPTR0364 DC C'T151' 00283C 5846+TDSCDAT CSECT 00283C 5847+ DS 0F 00283C 0400115F 5848+ DC AL1(L'SPTR0364),AL3(SPTR0364) 001163 5849+TEXT CSECT 001163 D4E5C340946B9440 5850+SPTR0365 DC C'MVC m,m (10c)' 002840 5851+TDSCDAT CSECT 002840 5852+ DS 0F 002840 0D001163 5853+ DC AL1(L'SPTR0365),AL3(SPTR0365) 5854+* 004A30 5855+TDSCTBL CSECT 04A30 5856+T151TPTR EQU * 004A30 00002828 5857+ DC A(T151TDSC) enabled test 5858+* 006ACC 5859+TCODE CSECT 006AD0 5860+ DS 0D ensure double word alignment for test 006AD0 5861+T151 DS 0H 01650000 006AD0 90EC D00C 0000C 5862+ STM 14,12,12(13) SAVE REGISTERS 02950000 006AD4 18CF 5863+ LR R12,R15 base register := entry address 06AD0 5864+ USING T151,R12 declare code base register 006AD6 41B0 C01E 06AEE 5865+ LA R11,T151L load loop target to R11 006ADA 58F0 C170 06C40 5866+ L R15,=A(SAVETST) R15 := current save area 006ADE 50DF 0004 00004 5867+ ST R13,4(R15) set back pointer in current save area 006AE2 182D 5868+ LR R2,R13 remember callers save area 006AE4 18DF 5869+ LR R13,R15 setup current save area PAGE 109 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 006AE6 50D2 0008 00008 5870+ ST R13,8(R2) set forw pointer in callers save area 00000 5871+ USING TDSC,R1 declare TDSC base register 006AEA 58F0 1008 00008 5872+ L R15,TLRCNT load local repeat count to R15 5873+* 5874 * 5875 T151L REPINS MVC,(T151V1,T151V2) repeat: MVC T151V1,T151V2 5876+* 5877+* build from sublist &ALIST a comma separated string &ARGS 5878+* 5879+* 5880+* 5881+* 5882+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5883+* this allows to transfer the repeat count from last TDSCGEN call 5884+* 5885+* 06AEE 5886+T151L EQU * 5887+* 5888+* write a comment indicating what REPINS does (in case NOGEN in effect) 5889+* 5890+*,// REPINS: do 50 times: 5891+* 5892+* MNOTE requires that ' is doubled for expanded variables 5893+* thus build &MASTR as a copy of '&ARGS with ' doubled 5894+* 5895+* 5896+*,// MVC T151V1,T151V2 5897+* 5898+* finally generate code: &ICNT copies of &CODE &ARGS 5899+* 006AEE D209 C15C C166 06C2C 06C36 5900+ MVC T151V1,T151V2 006AF4 D209 C15C C166 06C2C 06C36 5901+ MVC T151V1,T151V2 006AFA D209 C15C C166 06C2C 06C36 5902+ MVC T151V1,T151V2 006B00 D209 C15C C166 06C2C 06C36 5903+ MVC T151V1,T151V2 006B06 D209 C15C C166 06C2C 06C36 5904+ MVC T151V1,T151V2 006B0C D209 C15C C166 06C2C 06C36 5905+ MVC T151V1,T151V2 006B12 D209 C15C C166 06C2C 06C36 5906+ MVC T151V1,T151V2 006B18 D209 C15C C166 06C2C 06C36 5907+ MVC T151V1,T151V2 006B1E D209 C15C C166 06C2C 06C36 5908+ MVC T151V1,T151V2 006B24 D209 C15C C166 06C2C 06C36 5909+ MVC T151V1,T151V2 006B2A D209 C15C C166 06C2C 06C36 5910+ MVC T151V1,T151V2 006B30 D209 C15C C166 06C2C 06C36 5911+ MVC T151V1,T151V2 006B36 D209 C15C C166 06C2C 06C36 5912+ MVC T151V1,T151V2 006B3C D209 C15C C166 06C2C 06C36 5913+ MVC T151V1,T151V2 006B42 D209 C15C C166 06C2C 06C36 5914+ MVC T151V1,T151V2 006B48 D209 C15C C166 06C2C 06C36 5915+ MVC T151V1,T151V2 006B4E D209 C15C C166 06C2C 06C36 5916+ MVC T151V1,T151V2 006B54 D209 C15C C166 06C2C 06C36 5917+ MVC T151V1,T151V2 006B5A D209 C15C C166 06C2C 06C36 5918+ MVC T151V1,T151V2 006B60 D209 C15C C166 06C2C 06C36 5919+ MVC T151V1,T151V2 006B66 D209 C15C C166 06C2C 06C36 5920+ MVC T151V1,T151V2 006B6C D209 C15C C166 06C2C 06C36 5921+ MVC T151V1,T151V2 006B72 D209 C15C C166 06C2C 06C36 5922+ MVC T151V1,T151V2 006B78 D209 C15C C166 06C2C 06C36 5923+ MVC T151V1,T151V2 006B7E D209 C15C C166 06C2C 06C36 5924+ MVC T151V1,T151V2 PAGE 110 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 006B84 D209 C15C C166 06C2C 06C36 5925+ MVC T151V1,T151V2 006B8A D209 C15C C166 06C2C 06C36 5926+ MVC T151V1,T151V2 006B90 D209 C15C C166 06C2C 06C36 5927+ MVC T151V1,T151V2 006B96 D209 C15C C166 06C2C 06C36 5928+ MVC T151V1,T151V2 006B9C D209 C15C C166 06C2C 06C36 5929+ MVC T151V1,T151V2 006BA2 D209 C15C C166 06C2C 06C36 5930+ MVC T151V1,T151V2 006BA8 D209 C15C C166 06C2C 06C36 5931+ MVC T151V1,T151V2 006BAE D209 C15C C166 06C2C 06C36 5932+ MVC T151V1,T151V2 006BB4 D209 C15C C166 06C2C 06C36 5933+ MVC T151V1,T151V2 006BBA D209 C15C C166 06C2C 06C36 5934+ MVC T151V1,T151V2 006BC0 D209 C15C C166 06C2C 06C36 5935+ MVC T151V1,T151V2 006BC6 D209 C15C C166 06C2C 06C36 5936+ MVC T151V1,T151V2 006BCC D209 C15C C166 06C2C 06C36 5937+ MVC T151V1,T151V2 006BD2 D209 C15C C166 06C2C 06C36 5938+ MVC T151V1,T151V2 006BD8 D209 C15C C166 06C2C 06C36 5939+ MVC T151V1,T151V2 006BDE D209 C15C C166 06C2C 06C36 5940+ MVC T151V1,T151V2 006BE4 D209 C15C C166 06C2C 06C36 5941+ MVC T151V1,T151V2 006BEA D209 C15C C166 06C2C 06C36 5942+ MVC T151V1,T151V2 006BF0 D209 C15C C166 06C2C 06C36 5943+ MVC T151V1,T151V2 006BF6 D209 C15C C166 06C2C 06C36 5944+ MVC T151V1,T151V2 006BFC D209 C15C C166 06C2C 06C36 5945+ MVC T151V1,T151V2 006C02 D209 C15C C166 06C2C 06C36 5946+ MVC T151V1,T151V2 006C08 D209 C15C C166 06C2C 06C36 5947+ MVC T151V1,T151V2 006C0E D209 C15C C166 06C2C 06C36 5948+ MVC T151V1,T151V2 006C14 D209 C15C C166 06C2C 06C36 5949+ MVC T151V1,T151V2 5950+* 006C1A 06FB 5951 BCTR R15,R11 5952 TSIMRET 006C1C 58F0 C170 06C40 5953+ L R15,=A(SAVETST) R15 := current save area 006C20 58DF 0004 00004 5954+ L R13,4(R15) get old save area back 006C24 98EC D00C 0000C 5955+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006C28 07FE 5956+ BR 14 RETURN 02000000 5957 * 006C2C 5958 DS 0F 006C2C 4040404040404040 5959 T151V1 DC CL10' ' 006C36 F0F1F2F3F4F5F6F7 5960 T151V2 DC CL10'0123456789' 006C40 5961 DS 0H 5962 TSIMEND 006C40 5963+ LTORG 006C40 00000458 5964 =A(SAVETST) 06C44 5965+T151TEND EQU * 5966 * 5967 * Test 152 -- MVC m,m (15c) -------------------------------- 5968 * 5969 TSIMBEG T152,5000,50,1,C'MVC m,m (15c)' 5970+* 002844 5971+TDSCDAT CSECT 002848 5972+ DS 0D 5973+* 002848 00006C48 5974+T152TDSC DC A(T152) // TENTRY 00284C 00000184 5975+ DC A(T152TEND-T152) // TLENGTH 002850 00001388 5976+ DC F'5000' // TLRCNT 002854 00000032 5977+ DC F'50' // TIGCNT 002858 00000001 5978+ DC F'1' // TLTYPE 001170 5979+TEXT CSECT PAGE 111 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 001170 E3F1F5F2 5980+SPTR0376 DC C'T152' 00285C 5981+TDSCDAT CSECT 00285C 5982+ DS 0F 00285C 04001170 5983+ DC AL1(L'SPTR0376),AL3(SPTR0376) 001174 5984+TEXT CSECT 001174 D4E5C340946B9440 5985+SPTR0377 DC C'MVC m,m (15c)' 002860 5986+TDSCDAT CSECT 002860 5987+ DS 0F 002860 0D001174 5988+ DC AL1(L'SPTR0377),AL3(SPTR0377) 5989+* 004A34 5990+TDSCTBL CSECT 04A34 5991+T152TPTR EQU * 004A34 00002848 5992+ DC A(T152TDSC) enabled test 5993+* 006C44 5994+TCODE CSECT 006C48 5995+ DS 0D ensure double word alignment for test 006C48 5996+T152 DS 0H 01650000 006C48 90EC D00C 0000C 5997+ STM 14,12,12(13) SAVE REGISTERS 02950000 006C4C 18CF 5998+ LR R12,R15 base register := entry address 06C48 5999+ USING T152,R12 declare code base register 006C4E 41B0 C01E 06C66 6000+ LA R11,T152L load loop target to R11 006C52 58F0 C180 06DC8 6001+ L R15,=A(SAVETST) R15 := current save area 006C56 50DF 0004 00004 6002+ ST R13,4(R15) set back pointer in current save area 006C5A 182D 6003+ LR R2,R13 remember callers save area 006C5C 18DF 6004+ LR R13,R15 setup current save area 006C5E 50D2 0008 00008 6005+ ST R13,8(R2) set forw pointer in callers save area 00000 6006+ USING TDSC,R1 declare TDSC base register 006C62 58F0 1008 00008 6007+ L R15,TLRCNT load local repeat count to R15 6008+* 6009 * 6010 T152L REPINS MVC,(T152V1,T152V2) repeat: MVC T152V1,T152V2 6011+* 6012+* build from sublist &ALIST a comma separated string &ARGS 6013+* 6014+* 6015+* 6016+* 6017+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6018+* this allows to transfer the repeat count from last TDSCGEN call 6019+* 6020+* 06C66 6021+T152L EQU * 6022+* 6023+* write a comment indicating what REPINS does (in case NOGEN in effect) 6024+* 6025+*,// REPINS: do 50 times: 6026+* 6027+* MNOTE requires that ' is doubled for expanded variables 6028+* thus build &MASTR as a copy of '&ARGS with ' doubled 6029+* 6030+* 6031+*,// MVC T152V1,T152V2 6032+* 6033+* finally generate code: &ICNT copies of &CODE &ARGS 6034+* PAGE 112 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 006C66 D20E C15C C16B 06DA4 06DB3 6035+ MVC T152V1,T152V2 006C6C D20E C15C C16B 06DA4 06DB3 6036+ MVC T152V1,T152V2 006C72 D20E C15C C16B 06DA4 06DB3 6037+ MVC T152V1,T152V2 006C78 D20E C15C C16B 06DA4 06DB3 6038+ MVC T152V1,T152V2 006C7E D20E C15C C16B 06DA4 06DB3 6039+ MVC T152V1,T152V2 006C84 D20E C15C C16B 06DA4 06DB3 6040+ MVC T152V1,T152V2 006C8A D20E C15C C16B 06DA4 06DB3 6041+ MVC T152V1,T152V2 006C90 D20E C15C C16B 06DA4 06DB3 6042+ MVC T152V1,T152V2 006C96 D20E C15C C16B 06DA4 06DB3 6043+ MVC T152V1,T152V2 006C9C D20E C15C C16B 06DA4 06DB3 6044+ MVC T152V1,T152V2 006CA2 D20E C15C C16B 06DA4 06DB3 6045+ MVC T152V1,T152V2 006CA8 D20E C15C C16B 06DA4 06DB3 6046+ MVC T152V1,T152V2 006CAE D20E C15C C16B 06DA4 06DB3 6047+ MVC T152V1,T152V2 006CB4 D20E C15C C16B 06DA4 06DB3 6048+ MVC T152V1,T152V2 006CBA D20E C15C C16B 06DA4 06DB3 6049+ MVC T152V1,T152V2 006CC0 D20E C15C C16B 06DA4 06DB3 6050+ MVC T152V1,T152V2 006CC6 D20E C15C C16B 06DA4 06DB3 6051+ MVC T152V1,T152V2 006CCC D20E C15C C16B 06DA4 06DB3 6052+ MVC T152V1,T152V2 006CD2 D20E C15C C16B 06DA4 06DB3 6053+ MVC T152V1,T152V2 006CD8 D20E C15C C16B 06DA4 06DB3 6054+ MVC T152V1,T152V2 006CDE D20E C15C C16B 06DA4 06DB3 6055+ MVC T152V1,T152V2 006CE4 D20E C15C C16B 06DA4 06DB3 6056+ MVC T152V1,T152V2 006CEA D20E C15C C16B 06DA4 06DB3 6057+ MVC T152V1,T152V2 006CF0 D20E C15C C16B 06DA4 06DB3 6058+ MVC T152V1,T152V2 006CF6 D20E C15C C16B 06DA4 06DB3 6059+ MVC T152V1,T152V2 006CFC D20E C15C C16B 06DA4 06DB3 6060+ MVC T152V1,T152V2 006D02 D20E C15C C16B 06DA4 06DB3 6061+ MVC T152V1,T152V2 006D08 D20E C15C C16B 06DA4 06DB3 6062+ MVC T152V1,T152V2 006D0E D20E C15C C16B 06DA4 06DB3 6063+ MVC T152V1,T152V2 006D14 D20E C15C C16B 06DA4 06DB3 6064+ MVC T152V1,T152V2 006D1A D20E C15C C16B 06DA4 06DB3 6065+ MVC T152V1,T152V2 006D20 D20E C15C C16B 06DA4 06DB3 6066+ MVC T152V1,T152V2 006D26 D20E C15C C16B 06DA4 06DB3 6067+ MVC T152V1,T152V2 006D2C D20E C15C C16B 06DA4 06DB3 6068+ MVC T152V1,T152V2 006D32 D20E C15C C16B 06DA4 06DB3 6069+ MVC T152V1,T152V2 006D38 D20E C15C C16B 06DA4 06DB3 6070+ MVC T152V1,T152V2 006D3E D20E C15C C16B 06DA4 06DB3 6071+ MVC T152V1,T152V2 006D44 D20E C15C C16B 06DA4 06DB3 6072+ MVC T152V1,T152V2 006D4A D20E C15C C16B 06DA4 06DB3 6073+ MVC T152V1,T152V2 006D50 D20E C15C C16B 06DA4 06DB3 6074+ MVC T152V1,T152V2 006D56 D20E C15C C16B 06DA4 06DB3 6075+ MVC T152V1,T152V2 006D5C D20E C15C C16B 06DA4 06DB3 6076+ MVC T152V1,T152V2 006D62 D20E C15C C16B 06DA4 06DB3 6077+ MVC T152V1,T152V2 006D68 D20E C15C C16B 06DA4 06DB3 6078+ MVC T152V1,T152V2 006D6E D20E C15C C16B 06DA4 06DB3 6079+ MVC T152V1,T152V2 006D74 D20E C15C C16B 06DA4 06DB3 6080+ MVC T152V1,T152V2 006D7A D20E C15C C16B 06DA4 06DB3 6081+ MVC T152V1,T152V2 006D80 D20E C15C C16B 06DA4 06DB3 6082+ MVC T152V1,T152V2 006D86 D20E C15C C16B 06DA4 06DB3 6083+ MVC T152V1,T152V2 006D8C D20E C15C C16B 06DA4 06DB3 6084+ MVC T152V1,T152V2 6085+* 006D92 06FB 6086 BCTR R15,R11 6087 TSIMRET 006D94 58F0 C180 06DC8 6088+ L R15,=A(SAVETST) R15 := current save area 006D98 58DF 0004 00004 6089+ L R13,4(R15) get old save area back PAGE 113 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 006D9C 98EC D00C 0000C 6090+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006DA0 07FE 6091+ BR 14 RETURN 02000000 6092 * 006DA4 6093 DS 0F 006DA4 4040404040404040 6094 T152V1 DC CL15' ' 006DB3 F0F1F2F3F4F5F6F7 6095 T152V2 DC CL15'012345678901234' 006DC2 6096 DS 0H 6097 TSIMEND 006DC8 6098+ LTORG 006DC8 00000458 6099 =A(SAVETST) 06DCC 6100+T152TEND EQU * 6101 * 6102 * Test 153 -- MVC m,m (30c) -------------------------------- 6103 * 6104 TSIMBEG T153,5000,50,1,C'MVC m,m (30c)' 6105+* 002864 6106+TDSCDAT CSECT 002868 6107+ DS 0D 6108+* 002868 00006DD0 6109+T153TDSC DC A(T153) // TENTRY 00286C 0000019C 6110+ DC A(T153TEND-T153) // TLENGTH 002870 00001388 6111+ DC F'5000' // TLRCNT 002874 00000032 6112+ DC F'50' // TIGCNT 002878 00000001 6113+ DC F'1' // TLTYPE 001181 6114+TEXT CSECT 001181 E3F1F5F3 6115+SPTR0388 DC C'T153' 00287C 6116+TDSCDAT CSECT 00287C 6117+ DS 0F 00287C 04001181 6118+ DC AL1(L'SPTR0388),AL3(SPTR0388) 001185 6119+TEXT CSECT 001185 D4E5C340946B9440 6120+SPTR0389 DC C'MVC m,m (30c)' 002880 6121+TDSCDAT CSECT 002880 6122+ DS 0F 002880 0D001185 6123+ DC AL1(L'SPTR0389),AL3(SPTR0389) 6124+* 004A38 6125+TDSCTBL CSECT 04A38 6126+T153TPTR EQU * 004A38 00002868 6127+ DC A(T153TDSC) enabled test 6128+* 006DCC 6129+TCODE CSECT 006DD0 6130+ DS 0D ensure double word alignment for test 006DD0 6131+T153 DS 0H 01650000 006DD0 90EC D00C 0000C 6132+ STM 14,12,12(13) SAVE REGISTERS 02950000 006DD4 18CF 6133+ LR R12,R15 base register := entry address 06DD0 6134+ USING T153,R12 declare code base register 006DD6 41B0 C01E 06DEE 6135+ LA R11,T153L load loop target to R11 006DDA 58F0 C198 06F68 6136+ L R15,=A(SAVETST) R15 := current save area 006DDE 50DF 0004 00004 6137+ ST R13,4(R15) set back pointer in current save area 006DE2 182D 6138+ LR R2,R13 remember callers save area 006DE4 18DF 6139+ LR R13,R15 setup current save area 006DE6 50D2 0008 00008 6140+ ST R13,8(R2) set forw pointer in callers save area 00000 6141+ USING TDSC,R1 declare TDSC base register 006DEA 58F0 1008 00008 6142+ L R15,TLRCNT load local repeat count to R15 6143+* 6144 * PAGE 114 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 6145 T153L REPINS MVC,(T153V1,T153V2) repeat: MVC T153V1,T153V2 6146+* 6147+* build from sublist &ALIST a comma separated string &ARGS 6148+* 6149+* 6150+* 6151+* 6152+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6153+* this allows to transfer the repeat count from last TDSCGEN call 6154+* 6155+* 06DEE 6156+T153L EQU * 6157+* 6158+* write a comment indicating what REPINS does (in case NOGEN in effect) 6159+* 6160+*,// REPINS: do 50 times: 6161+* 6162+* MNOTE requires that ' is doubled for expanded variables 6163+* thus build &MASTR as a copy of '&ARGS with ' doubled 6164+* 6165+* 6166+*,// MVC T153V1,T153V2 6167+* 6168+* finally generate code: &ICNT copies of &CODE &ARGS 6169+* 006DEE D21D C15C C17A 06F2C 06F4A 6170+ MVC T153V1,T153V2 006DF4 D21D C15C C17A 06F2C 06F4A 6171+ MVC T153V1,T153V2 006DFA D21D C15C C17A 06F2C 06F4A 6172+ MVC T153V1,T153V2 006E00 D21D C15C C17A 06F2C 06F4A 6173+ MVC T153V1,T153V2 006E06 D21D C15C C17A 06F2C 06F4A 6174+ MVC T153V1,T153V2 006E0C D21D C15C C17A 06F2C 06F4A 6175+ MVC T153V1,T153V2 006E12 D21D C15C C17A 06F2C 06F4A 6176+ MVC T153V1,T153V2 006E18 D21D C15C C17A 06F2C 06F4A 6177+ MVC T153V1,T153V2 006E1E D21D C15C C17A 06F2C 06F4A 6178+ MVC T153V1,T153V2 006E24 D21D C15C C17A 06F2C 06F4A 6179+ MVC T153V1,T153V2 006E2A D21D C15C C17A 06F2C 06F4A 6180+ MVC T153V1,T153V2 006E30 D21D C15C C17A 06F2C 06F4A 6181+ MVC T153V1,T153V2 006E36 D21D C15C C17A 06F2C 06F4A 6182+ MVC T153V1,T153V2 006E3C D21D C15C C17A 06F2C 06F4A 6183+ MVC T153V1,T153V2 006E42 D21D C15C C17A 06F2C 06F4A 6184+ MVC T153V1,T153V2 006E48 D21D C15C C17A 06F2C 06F4A 6185+ MVC T153V1,T153V2 006E4E D21D C15C C17A 06F2C 06F4A 6186+ MVC T153V1,T153V2 006E54 D21D C15C C17A 06F2C 06F4A 6187+ MVC T153V1,T153V2 006E5A D21D C15C C17A 06F2C 06F4A 6188+ MVC T153V1,T153V2 006E60 D21D C15C C17A 06F2C 06F4A 6189+ MVC T153V1,T153V2 006E66 D21D C15C C17A 06F2C 06F4A 6190+ MVC T153V1,T153V2 006E6C D21D C15C C17A 06F2C 06F4A 6191+ MVC T153V1,T153V2 006E72 D21D C15C C17A 06F2C 06F4A 6192+ MVC T153V1,T153V2 006E78 D21D C15C C17A 06F2C 06F4A 6193+ MVC T153V1,T153V2 006E7E D21D C15C C17A 06F2C 06F4A 6194+ MVC T153V1,T153V2 006E84 D21D C15C C17A 06F2C 06F4A 6195+ MVC T153V1,T153V2 006E8A D21D C15C C17A 06F2C 06F4A 6196+ MVC T153V1,T153V2 006E90 D21D C15C C17A 06F2C 06F4A 6197+ MVC T153V1,T153V2 006E96 D21D C15C C17A 06F2C 06F4A 6198+ MVC T153V1,T153V2 006E9C D21D C15C C17A 06F2C 06F4A 6199+ MVC T153V1,T153V2 PAGE 115 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 006EA2 D21D C15C C17A 06F2C 06F4A 6200+ MVC T153V1,T153V2 006EA8 D21D C15C C17A 06F2C 06F4A 6201+ MVC T153V1,T153V2 006EAE D21D C15C C17A 06F2C 06F4A 6202+ MVC T153V1,T153V2 006EB4 D21D C15C C17A 06F2C 06F4A 6203+ MVC T153V1,T153V2 006EBA D21D C15C C17A 06F2C 06F4A 6204+ MVC T153V1,T153V2 006EC0 D21D C15C C17A 06F2C 06F4A 6205+ MVC T153V1,T153V2 006EC6 D21D C15C C17A 06F2C 06F4A 6206+ MVC T153V1,T153V2 006ECC D21D C15C C17A 06F2C 06F4A 6207+ MVC T153V1,T153V2 006ED2 D21D C15C C17A 06F2C 06F4A 6208+ MVC T153V1,T153V2 006ED8 D21D C15C C17A 06F2C 06F4A 6209+ MVC T153V1,T153V2 006EDE D21D C15C C17A 06F2C 06F4A 6210+ MVC T153V1,T153V2 006EE4 D21D C15C C17A 06F2C 06F4A 6211+ MVC T153V1,T153V2 006EEA D21D C15C C17A 06F2C 06F4A 6212+ MVC T153V1,T153V2 006EF0 D21D C15C C17A 06F2C 06F4A 6213+ MVC T153V1,T153V2 006EF6 D21D C15C C17A 06F2C 06F4A 6214+ MVC T153V1,T153V2 006EFC D21D C15C C17A 06F2C 06F4A 6215+ MVC T153V1,T153V2 006F02 D21D C15C C17A 06F2C 06F4A 6216+ MVC T153V1,T153V2 006F08 D21D C15C C17A 06F2C 06F4A 6217+ MVC T153V1,T153V2 006F0E D21D C15C C17A 06F2C 06F4A 6218+ MVC T153V1,T153V2 006F14 D21D C15C C17A 06F2C 06F4A 6219+ MVC T153V1,T153V2 6220+* 006F1A 06FB 6221 BCTR R15,R11 6222 TSIMRET 006F1C 58F0 C198 06F68 6223+ L R15,=A(SAVETST) R15 := current save area 006F20 58DF 0004 00004 6224+ L R13,4(R15) get old save area back 006F24 98EC D00C 0000C 6225+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006F28 07FE 6226+ BR 14 RETURN 02000000 6227 * 006F2C 6228 DS 0F 006F2C 4040404040404040 6229 T153V1 DC CL30' ' 006F4A F0F1F2F3F4F5F6F7 6230 T153V2 DC CL30'012345678901234567890123456789' 006F68 6231 DS 0H 6232 TSIMEND 006F68 6233+ LTORG 006F68 00000458 6234 =A(SAVETST) 06F6C 6235+T153TEND EQU * 6236 * 6237 * Test 154 -- MVC m,m (100c) ------------------------------- 6238 * 6239 TSIMBEG T154,4000,50,1,C'MVC m,m (100c)' 6240+* 002884 6241+TDSCDAT CSECT 002888 6242+ DS 0D 6243+* 002888 00006F70 6244+T154TDSC DC A(T154) // TENTRY 00288C 0000022C 6245+ DC A(T154TEND-T154) // TLENGTH 002890 00000FA0 6246+ DC F'4000' // TLRCNT 002894 00000032 6247+ DC F'50' // TIGCNT 002898 00000001 6248+ DC F'1' // TLTYPE 001192 6249+TEXT CSECT 001192 E3F1F5F4 6250+SPTR0400 DC C'T154' 00289C 6251+TDSCDAT CSECT 00289C 6252+ DS 0F 00289C 04001192 6253+ DC AL1(L'SPTR0400),AL3(SPTR0400) 001196 6254+TEXT CSECT PAGE 116 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 001196 D4E5C340946B9440 6255+SPTR0401 DC C'MVC m,m (100c)' 0028A0 6256+TDSCDAT CSECT 0028A0 6257+ DS 0F 0028A0 0E001196 6258+ DC AL1(L'SPTR0401),AL3(SPTR0401) 6259+* 004A3C 6260+TDSCTBL CSECT 04A3C 6261+T154TPTR EQU * 004A3C 00002888 6262+ DC A(T154TDSC) enabled test 6263+* 006F6C 6264+TCODE CSECT 006F70 6265+ DS 0D ensure double word alignment for test 006F70 6266+T154 DS 0H 01650000 006F70 90EC D00C 0000C 6267+ STM 14,12,12(13) SAVE REGISTERS 02950000 006F74 18CF 6268+ LR R12,R15 base register := entry address 06F70 6269+ USING T154,R12 declare code base register 006F76 41B0 C01E 06F8E 6270+ LA R11,T154L load loop target to R11 006F7A 58F0 C228 07198 6271+ L R15,=A(SAVETST) R15 := current save area 006F7E 50DF 0004 00004 6272+ ST R13,4(R15) set back pointer in current save area 006F82 182D 6273+ LR R2,R13 remember callers save area 006F84 18DF 6274+ LR R13,R15 setup current save area 006F86 50D2 0008 00008 6275+ ST R13,8(R2) set forw pointer in callers save area 00000 6276+ USING TDSC,R1 declare TDSC base register 006F8A 58F0 1008 00008 6277+ L R15,TLRCNT load local repeat count to R15 6278+* 6279 * 6280 T154L REPINS MVC,(T154V1,T154V2) repeat: MVC T154V1,T154V2 6281+* 6282+* build from sublist &ALIST a comma separated string &ARGS 6283+* 6284+* 6285+* 6286+* 6287+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6288+* this allows to transfer the repeat count from last TDSCGEN call 6289+* 6290+* 06F8E 6291+T154L EQU * 6292+* 6293+* write a comment indicating what REPINS does (in case NOGEN in effect) 6294+* 6295+*,// REPINS: do 50 times: 6296+* 6297+* MNOTE requires that ' is doubled for expanded variables 6298+* thus build &MASTR as a copy of '&ARGS with ' doubled 6299+* 6300+* 6301+*,// MVC T154V1,T154V2 6302+* 6303+* finally generate code: &ICNT copies of &CODE &ARGS 6304+* 006F8E D263 C15C C1C0 070CC 07130 6305+ MVC T154V1,T154V2 006F94 D263 C15C C1C0 070CC 07130 6306+ MVC T154V1,T154V2 006F9A D263 C15C C1C0 070CC 07130 6307+ MVC T154V1,T154V2 006FA0 D263 C15C C1C0 070CC 07130 6308+ MVC T154V1,T154V2 006FA6 D263 C15C C1C0 070CC 07130 6309+ MVC T154V1,T154V2 PAGE 117 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 006FAC D263 C15C C1C0 070CC 07130 6310+ MVC T154V1,T154V2 006FB2 D263 C15C C1C0 070CC 07130 6311+ MVC T154V1,T154V2 006FB8 D263 C15C C1C0 070CC 07130 6312+ MVC T154V1,T154V2 006FBE D263 C15C C1C0 070CC 07130 6313+ MVC T154V1,T154V2 006FC4 D263 C15C C1C0 070CC 07130 6314+ MVC T154V1,T154V2 006FCA D263 C15C C1C0 070CC 07130 6315+ MVC T154V1,T154V2 006FD0 D263 C15C C1C0 070CC 07130 6316+ MVC T154V1,T154V2 006FD6 D263 C15C C1C0 070CC 07130 6317+ MVC T154V1,T154V2 006FDC D263 C15C C1C0 070CC 07130 6318+ MVC T154V1,T154V2 006FE2 D263 C15C C1C0 070CC 07130 6319+ MVC T154V1,T154V2 006FE8 D263 C15C C1C0 070CC 07130 6320+ MVC T154V1,T154V2 006FEE D263 C15C C1C0 070CC 07130 6321+ MVC T154V1,T154V2 006FF4 D263 C15C C1C0 070CC 07130 6322+ MVC T154V1,T154V2 006FFA D263 C15C C1C0 070CC 07130 6323+ MVC T154V1,T154V2 007000 D263 C15C C1C0 070CC 07130 6324+ MVC T154V1,T154V2 007006 D263 C15C C1C0 070CC 07130 6325+ MVC T154V1,T154V2 00700C D263 C15C C1C0 070CC 07130 6326+ MVC T154V1,T154V2 007012 D263 C15C C1C0 070CC 07130 6327+ MVC T154V1,T154V2 007018 D263 C15C C1C0 070CC 07130 6328+ MVC T154V1,T154V2 00701E D263 C15C C1C0 070CC 07130 6329+ MVC T154V1,T154V2 007024 D263 C15C C1C0 070CC 07130 6330+ MVC T154V1,T154V2 00702A D263 C15C C1C0 070CC 07130 6331+ MVC T154V1,T154V2 007030 D263 C15C C1C0 070CC 07130 6332+ MVC T154V1,T154V2 007036 D263 C15C C1C0 070CC 07130 6333+ MVC T154V1,T154V2 00703C D263 C15C C1C0 070CC 07130 6334+ MVC T154V1,T154V2 007042 D263 C15C C1C0 070CC 07130 6335+ MVC T154V1,T154V2 007048 D263 C15C C1C0 070CC 07130 6336+ MVC T154V1,T154V2 00704E D263 C15C C1C0 070CC 07130 6337+ MVC T154V1,T154V2 007054 D263 C15C C1C0 070CC 07130 6338+ MVC T154V1,T154V2 00705A D263 C15C C1C0 070CC 07130 6339+ MVC T154V1,T154V2 007060 D263 C15C C1C0 070CC 07130 6340+ MVC T154V1,T154V2 007066 D263 C15C C1C0 070CC 07130 6341+ MVC T154V1,T154V2 00706C D263 C15C C1C0 070CC 07130 6342+ MVC T154V1,T154V2 007072 D263 C15C C1C0 070CC 07130 6343+ MVC T154V1,T154V2 007078 D263 C15C C1C0 070CC 07130 6344+ MVC T154V1,T154V2 00707E D263 C15C C1C0 070CC 07130 6345+ MVC T154V1,T154V2 007084 D263 C15C C1C0 070CC 07130 6346+ MVC T154V1,T154V2 00708A D263 C15C C1C0 070CC 07130 6347+ MVC T154V1,T154V2 007090 D263 C15C C1C0 070CC 07130 6348+ MVC T154V1,T154V2 007096 D263 C15C C1C0 070CC 07130 6349+ MVC T154V1,T154V2 00709C D263 C15C C1C0 070CC 07130 6350+ MVC T154V1,T154V2 0070A2 D263 C15C C1C0 070CC 07130 6351+ MVC T154V1,T154V2 0070A8 D263 C15C C1C0 070CC 07130 6352+ MVC T154V1,T154V2 0070AE D263 C15C C1C0 070CC 07130 6353+ MVC T154V1,T154V2 0070B4 D263 C15C C1C0 070CC 07130 6354+ MVC T154V1,T154V2 6355+* 0070BA 06FB 6356 BCTR R15,R11 6357 TSIMRET 0070BC 58F0 C228 07198 6358+ L R15,=A(SAVETST) R15 := current save area 0070C0 58DF 0004 00004 6359+ L R13,4(R15) get old save area back 0070C4 98EC D00C 0000C 6360+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0070C8 07FE 6361+ BR 14 RETURN 02000000 6362 * 0070CC 6363 DS 0F 0070CC 4040404040404040 6364 T154V1 DC CL100' ' PAGE 118 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 007130 F0F1F2F3F4F5F6F7 6365 T154V2 DC CL100'0123456789' 6366 TSIMEND 007198 6367+ LTORG 007198 00000458 6368 =A(SAVETST) 0719C 6369+T154TEND EQU * 6370 * 6371 * Test 155 -- MVC m,m (250c) ------------------------------- 6372 * 6373 TSIMBEG T155,7500,20,1,C'MVC m,m (250c)' 6374+* 0028A4 6375+TDSCDAT CSECT 0028A8 6376+ DS 0D 6377+* 0028A8 000071A0 6378+T155TDSC DC A(T155) // TENTRY 0028AC 000002A4 6379+ DC A(T155TEND-T155) // TLENGTH 0028B0 00001D4C 6380+ DC F'7500' // TLRCNT 0028B4 00000014 6381+ DC F'20' // TIGCNT 0028B8 00000001 6382+ DC F'1' // TLTYPE 0011A4 6383+TEXT CSECT 0011A4 E3F1F5F5 6384+SPTR0412 DC C'T155' 0028BC 6385+TDSCDAT CSECT 0028BC 6386+ DS 0F 0028BC 040011A4 6387+ DC AL1(L'SPTR0412),AL3(SPTR0412) 0011A8 6388+TEXT CSECT 0011A8 D4E5C340946B9440 6389+SPTR0413 DC C'MVC m,m (250c)' 0028C0 6390+TDSCDAT CSECT 0028C0 6391+ DS 0F 0028C0 0E0011A8 6392+ DC AL1(L'SPTR0413),AL3(SPTR0413) 6393+* 004A40 6394+TDSCTBL CSECT 04A40 6395+T155TPTR EQU * 004A40 000028A8 6396+ DC A(T155TDSC) enabled test 6397+* 00719C 6398+TCODE CSECT 0071A0 6399+ DS 0D ensure double word alignment for test 0071A0 6400+T155 DS 0H 01650000 0071A0 90EC D00C 0000C 6401+ STM 14,12,12(13) SAVE REGISTERS 02950000 0071A4 18CF 6402+ LR R12,R15 base register := entry address 071A0 6403+ USING T155,R12 declare code base register 0071A6 41B0 C01E 071BE 6404+ LA R11,T155L load loop target to R11 0071AA 58F0 C2A0 07440 6405+ L R15,=A(SAVETST) R15 := current save area 0071AE 50DF 0004 00004 6406+ ST R13,4(R15) set back pointer in current save area 0071B2 182D 6407+ LR R2,R13 remember callers save area 0071B4 18DF 6408+ LR R13,R15 setup current save area 0071B6 50D2 0008 00008 6409+ ST R13,8(R2) set forw pointer in callers save area 00000 6410+ USING TDSC,R1 declare TDSC base register 0071BA 58F0 1008 00008 6411+ L R15,TLRCNT load local repeat count to R15 6412+* 6413 * 6414 T155L REPINS MVC,(T155V1,T155V2) repeat: MVC T155V1,T155V2 6415+* 6416+* build from sublist &ALIST a comma separated string &ARGS 6417+* 6418+* 6419+* PAGE 119 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 6420+* 6421+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6422+* this allows to transfer the repeat count from last TDSCGEN call 6423+* 6424+* 071BE 6425+T155L EQU * 6426+* 6427+* write a comment indicating what REPINS does (in case NOGEN in effect) 6428+* 6429+*,// REPINS: do 20 times: 6430+* 6431+* MNOTE requires that ' is doubled for expanded variables 6432+* thus build &MASTR as a copy of '&ARGS with ' doubled 6433+* 6434+* 6435+*,// MVC T155V1,T155V2 6436+* 6437+* finally generate code: &ICNT copies of &CODE &ARGS 6438+* 0071BE D2F9 C0A8 C1A2 07248 07342 6439+ MVC T155V1,T155V2 0071C4 D2F9 C0A8 C1A2 07248 07342 6440+ MVC T155V1,T155V2 0071CA D2F9 C0A8 C1A2 07248 07342 6441+ MVC T155V1,T155V2 0071D0 D2F9 C0A8 C1A2 07248 07342 6442+ MVC T155V1,T155V2 0071D6 D2F9 C0A8 C1A2 07248 07342 6443+ MVC T155V1,T155V2 0071DC D2F9 C0A8 C1A2 07248 07342 6444+ MVC T155V1,T155V2 0071E2 D2F9 C0A8 C1A2 07248 07342 6445+ MVC T155V1,T155V2 0071E8 D2F9 C0A8 C1A2 07248 07342 6446+ MVC T155V1,T155V2 0071EE D2F9 C0A8 C1A2 07248 07342 6447+ MVC T155V1,T155V2 0071F4 D2F9 C0A8 C1A2 07248 07342 6448+ MVC T155V1,T155V2 0071FA D2F9 C0A8 C1A2 07248 07342 6449+ MVC T155V1,T155V2 007200 D2F9 C0A8 C1A2 07248 07342 6450+ MVC T155V1,T155V2 007206 D2F9 C0A8 C1A2 07248 07342 6451+ MVC T155V1,T155V2 00720C D2F9 C0A8 C1A2 07248 07342 6452+ MVC T155V1,T155V2 007212 D2F9 C0A8 C1A2 07248 07342 6453+ MVC T155V1,T155V2 007218 D2F9 C0A8 C1A2 07248 07342 6454+ MVC T155V1,T155V2 00721E D2F9 C0A8 C1A2 07248 07342 6455+ MVC T155V1,T155V2 007224 D2F9 C0A8 C1A2 07248 07342 6456+ MVC T155V1,T155V2 00722A D2F9 C0A8 C1A2 07248 07342 6457+ MVC T155V1,T155V2 007230 D2F9 C0A8 C1A2 07248 07342 6458+ MVC T155V1,T155V2 6459+* 007236 06FB 6460 BCTR R15,R11 6461 TSIMRET 007238 58F0 C2A0 07440 6462+ L R15,=A(SAVETST) R15 := current save area 00723C 58DF 0004 00004 6463+ L R13,4(R15) get old save area back 007240 98EC D00C 0000C 6464+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007244 07FE 6465+ BR 14 RETURN 02000000 6466 * 007248 6467 DS 0F 007248 4040404040404040 6468 T155V1 DC CL250' ' 007342 F0F1F2F3F4F5F6F7 6469 T155V2 DC CL250'0123456789' 6470 TSIMEND 007440 6471+ LTORG 007440 00000458 6472 =A(SAVETST) 07444 6473+T155TEND EQU * 6474 * PAGE 120 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 6475 * Test 156 -- MVC m,m (250c,over1) ------------------------- 6476 * test byte propagation usage of MVC 6477 * destination offset by + 1 byte to source 6478 * 250 bytes touched, MVC length determined by destination 6479 * 6480 TSIMBEG T156,700,20,1,C'MVC m,m (250c,over1)' 6481+* 0028C4 6482+TDSCDAT CSECT 0028C8 6483+ DS 0D 6484+* 0028C8 00007448 6485+T156TDSC DC A(T156) // TENTRY 0028CC 000001AC 6486+ DC A(T156TEND-T156) // TLENGTH 0028D0 000002BC 6487+ DC F'700' // TLRCNT 0028D4 00000014 6488+ DC F'20' // TIGCNT 0028D8 00000001 6489+ DC F'1' // TLTYPE 0011B6 6490+TEXT CSECT 0011B6 E3F1F5F6 6491+SPTR0424 DC C'T156' 0028DC 6492+TDSCDAT CSECT 0028DC 6493+ DS 0F 0028DC 040011B6 6494+ DC AL1(L'SPTR0424),AL3(SPTR0424) 0011BA 6495+TEXT CSECT 0011BA D4E5C340946B9440 6496+SPTR0425 DC C'MVC m,m (250c,over1)' 0028E0 6497+TDSCDAT CSECT 0028E0 6498+ DS 0F 0028E0 140011BA 6499+ DC AL1(L'SPTR0425),AL3(SPTR0425) 6500+* 004A44 6501+TDSCTBL CSECT 04A44 6502+T156TPTR EQU * 004A44 000028C8 6503+ DC A(T156TDSC) enabled test 6504+* 007444 6505+TCODE CSECT 007448 6506+ DS 0D ensure double word alignment for test 007448 6507+T156 DS 0H 01650000 007448 90EC D00C 0000C 6508+ STM 14,12,12(13) SAVE REGISTERS 02950000 00744C 18CF 6509+ LR R12,R15 base register := entry address 07448 6510+ USING T156,R12 declare code base register 00744E 41B0 C01E 07466 6511+ LA R11,T156L load loop target to R11 007452 58F0 C1A8 075F0 6512+ L R15,=A(SAVETST) R15 := current save area 007456 50DF 0004 00004 6513+ ST R13,4(R15) set back pointer in current save area 00745A 182D 6514+ LR R2,R13 remember callers save area 00745C 18DF 6515+ LR R13,R15 setup current save area 00745E 50D2 0008 00008 6516+ ST R13,8(R2) set forw pointer in callers save area 00000 6517+ USING TDSC,R1 declare TDSC base register 007462 58F0 1008 00008 6518+ L R15,TLRCNT load local repeat count to R15 6519+* 6520 * 6521 T156L REPINS MVC,(T156V2,T156V1) repeat: MVC T156V2,T156V1 6522+* 6523+* build from sublist &ALIST a comma separated string &ARGS 6524+* 6525+* 6526+* 6527+* 6528+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6529+* this allows to transfer the repeat count from last TDSCGEN call PAGE 121 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 6530+* 6531+* 07466 6532+T156L EQU * 6533+* 6534+* write a comment indicating what REPINS does (in case NOGEN in effect) 6535+* 6536+*,// REPINS: do 20 times: 6537+* 6538+* MNOTE requires that ' is doubled for expanded variables 6539+* thus build &MASTR as a copy of '&ARGS with ' doubled 6540+* 6541+* 6542+*,// MVC T156V2,T156V1 6543+* 6544+* finally generate code: &ICNT copies of &CODE &ARGS 6545+* 007466 D2F9 C0A9 C0A8 074F1 074F0 6546+ MVC T156V2,T156V1 00746C D2F9 C0A9 C0A8 074F1 074F0 6547+ MVC T156V2,T156V1 007472 D2F9 C0A9 C0A8 074F1 074F0 6548+ MVC T156V2,T156V1 007478 D2F9 C0A9 C0A8 074F1 074F0 6549+ MVC T156V2,T156V1 00747E D2F9 C0A9 C0A8 074F1 074F0 6550+ MVC T156V2,T156V1 007484 D2F9 C0A9 C0A8 074F1 074F0 6551+ MVC T156V2,T156V1 00748A D2F9 C0A9 C0A8 074F1 074F0 6552+ MVC T156V2,T156V1 007490 D2F9 C0A9 C0A8 074F1 074F0 6553+ MVC T156V2,T156V1 007496 D2F9 C0A9 C0A8 074F1 074F0 6554+ MVC T156V2,T156V1 00749C D2F9 C0A9 C0A8 074F1 074F0 6555+ MVC T156V2,T156V1 0074A2 D2F9 C0A9 C0A8 074F1 074F0 6556+ MVC T156V2,T156V1 0074A8 D2F9 C0A9 C0A8 074F1 074F0 6557+ MVC T156V2,T156V1 0074AE D2F9 C0A9 C0A8 074F1 074F0 6558+ MVC T156V2,T156V1 0074B4 D2F9 C0A9 C0A8 074F1 074F0 6559+ MVC T156V2,T156V1 0074BA D2F9 C0A9 C0A8 074F1 074F0 6560+ MVC T156V2,T156V1 0074C0 D2F9 C0A9 C0A8 074F1 074F0 6561+ MVC T156V2,T156V1 0074C6 D2F9 C0A9 C0A8 074F1 074F0 6562+ MVC T156V2,T156V1 0074CC D2F9 C0A9 C0A8 074F1 074F0 6563+ MVC T156V2,T156V1 0074D2 D2F9 C0A9 C0A8 074F1 074F0 6564+ MVC T156V2,T156V1 0074D8 D2F9 C0A9 C0A8 074F1 074F0 6565+ MVC T156V2,T156V1 6566+* 0074DE 06FB 6567 BCTR R15,R11 6568 TSIMRET 0074E0 58F0 C1A8 075F0 6569+ L R15,=A(SAVETST) R15 := current save area 0074E4 58DF 0004 00004 6570+ L R13,4(R15) get old save area back 0074E8 98EC D00C 0000C 6571+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0074EC 07FE 6572+ BR 14 RETURN 02000000 6573 * 0074F0 6574 DS 0F 0074F0 40 6575 T156V1 DC C' ' byte to propagate 0074F1 F0F1F2F3F4F5F6F7 6576 T156V2 DC CL250'0123456789' into this target buffer 6577 TSIMEND 0075F0 6578+ LTORG 0075F0 00000458 6579 =A(SAVETST) 075F4 6580+T156TEND EQU * 6581 * 6582 * Test 157 -- MVC m,m (250c,over2) ------------------------- 6583 * test buffer shift left usage of MVC 6584 * destination offset by -24 byte to source PAGE 122 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 6585 * 6586 TSIMBEG T157,7500,20,1,C'MVC m,m (250c,over2)' 6587+* 0028E4 6588+TDSCDAT CSECT 0028E8 6589+ DS 0D 6590+* 0028E8 000075F8 6591+T157TDSC DC A(T157) // TENTRY 0028EC 000001C4 6592+ DC A(T157TEND-T157) // TLENGTH 0028F0 00001D4C 6593+ DC F'7500' // TLRCNT 0028F4 00000014 6594+ DC F'20' // TIGCNT 0028F8 00000001 6595+ DC F'1' // TLTYPE 0011CE 6596+TEXT CSECT 0011CE E3F1F5F7 6597+SPTR0436 DC C'T157' 0028FC 6598+TDSCDAT CSECT 0028FC 6599+ DS 0F 0028FC 040011CE 6600+ DC AL1(L'SPTR0436),AL3(SPTR0436) 0011D2 6601+TEXT CSECT 0011D2 D4E5C340946B9440 6602+SPTR0437 DC C'MVC m,m (250c,over2)' 002900 6603+TDSCDAT CSECT 002900 6604+ DS 0F 002900 140011D2 6605+ DC AL1(L'SPTR0437),AL3(SPTR0437) 6606+* 004A48 6607+TDSCTBL CSECT 04A48 6608+T157TPTR EQU * 004A48 000028E8 6609+ DC A(T157TDSC) enabled test 6610+* 0075F4 6611+TCODE CSECT 0075F8 6612+ DS 0D ensure double word alignment for test 0075F8 6613+T157 DS 0H 01650000 0075F8 90EC D00C 0000C 6614+ STM 14,12,12(13) SAVE REGISTERS 02950000 0075FC 18CF 6615+ LR R12,R15 base register := entry address 075F8 6616+ USING T157,R12 declare code base register 0075FE 41B0 C01E 07616 6617+ LA R11,T157L load loop target to R11 007602 58F0 C1C0 077B8 6618+ L R15,=A(SAVETST) R15 := current save area 007606 50DF 0004 00004 6619+ ST R13,4(R15) set back pointer in current save area 00760A 182D 6620+ LR R2,R13 remember callers save area 00760C 18DF 6621+ LR R13,R15 setup current save area 00760E 50D2 0008 00008 6622+ ST R13,8(R2) set forw pointer in callers save area 00000 6623+ USING TDSC,R1 declare TDSC base register 007612 58F0 1008 00008 6624+ L R15,TLRCNT load local repeat count to R15 6625+* 6626 * 6627 T157L REPINS MVC,(T157V1(250),T157V2) 6628+* 6629+* build from sublist &ALIST a comma separated string &ARGS 6630+* 6631+* 6632+* 6633+* 6634+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6635+* this allows to transfer the repeat count from last TDSCGEN call 6636+* 6637+* 07616 6638+T157L EQU * 6639+* PAGE 123 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 6640+* write a comment indicating what REPINS does (in case NOGEN in effect) 6641+* 6642+*,// REPINS: do 20 times: 6643+* 6644+* MNOTE requires that ' is doubled for expanded variables 6645+* thus build &MASTR as a copy of '&ARGS with ' doubled 6646+* 6647+* 6648+*,// MVC T157V1(250),T157V2 6649+* 6650+* finally generate code: &ICNT copies of &CODE &ARGS 6651+* 007616 D2F9 C0A8 C0C0 076A0 076B8 6652+ MVC T157V1(250),T157V2 00761C D2F9 C0A8 C0C0 076A0 076B8 6653+ MVC T157V1(250),T157V2 007622 D2F9 C0A8 C0C0 076A0 076B8 6654+ MVC T157V1(250),T157V2 007628 D2F9 C0A8 C0C0 076A0 076B8 6655+ MVC T157V1(250),T157V2 00762E D2F9 C0A8 C0C0 076A0 076B8 6656+ MVC T157V1(250),T157V2 007634 D2F9 C0A8 C0C0 076A0 076B8 6657+ MVC T157V1(250),T157V2 00763A D2F9 C0A8 C0C0 076A0 076B8 6658+ MVC T157V1(250),T157V2 007640 D2F9 C0A8 C0C0 076A0 076B8 6659+ MVC T157V1(250),T157V2 007646 D2F9 C0A8 C0C0 076A0 076B8 6660+ MVC T157V1(250),T157V2 00764C D2F9 C0A8 C0C0 076A0 076B8 6661+ MVC T157V1(250),T157V2 007652 D2F9 C0A8 C0C0 076A0 076B8 6662+ MVC T157V1(250),T157V2 007658 D2F9 C0A8 C0C0 076A0 076B8 6663+ MVC T157V1(250),T157V2 00765E D2F9 C0A8 C0C0 076A0 076B8 6664+ MVC T157V1(250),T157V2 007664 D2F9 C0A8 C0C0 076A0 076B8 6665+ MVC T157V1(250),T157V2 00766A D2F9 C0A8 C0C0 076A0 076B8 6666+ MVC T157V1(250),T157V2 007670 D2F9 C0A8 C0C0 076A0 076B8 6667+ MVC T157V1(250),T157V2 007676 D2F9 C0A8 C0C0 076A0 076B8 6668+ MVC T157V1(250),T157V2 00767C D2F9 C0A8 C0C0 076A0 076B8 6669+ MVC T157V1(250),T157V2 007682 D2F9 C0A8 C0C0 076A0 076B8 6670+ MVC T157V1(250),T157V2 007688 D2F9 C0A8 C0C0 076A0 076B8 6671+ MVC T157V1(250),T157V2 6672+* 00768E 06FB 6673 BCTR R15,R11 6674 TSIMRET 007690 58F0 C1C0 077B8 6675+ L R15,=A(SAVETST) R15 := current save area 007694 58DF 0004 00004 6676+ L R13,4(R15) get old save area back 007698 98EC D00C 0000C 6677+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00769C 07FE 6678+ BR 14 RETURN 02000000 6679 * 0076A0 6680 DS 0F 0076A0 6681 T157V1 DS 24C target 0076B8 F0F1F3F3F4F5F6F7 6682 T157V2 DC CL250'0133456789' source (1/10th overlap) 6683 TSIMEND 0077B8 6684+ LTORG 0077B8 00000458 6685 =A(SAVETST) 077BC 6686+T157TEND EQU * 6687 * 6688 * Test 16x -- MVI,MVN,MVZ,MVCIN ============================ 6689 * 6690 * Test 160 -- MVI m,i -------------------------------------- 6691 * 6692 TSIMBEG T160,6000,100,1,C'MVI m,i' 6693+* 002904 6694+TDSCDAT CSECT PAGE 124 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002908 6695+ DS 0D 6696+* 002908 000077C0 6697+T160TDSC DC A(T160) // TENTRY 00290C 000001C4 6698+ DC A(T160TEND-T160) // TLENGTH 002910 00001770 6699+ DC F'6000' // TLRCNT 002914 00000064 6700+ DC F'100' // TIGCNT 002918 00000001 6701+ DC F'1' // TLTYPE 0011E6 6702+TEXT CSECT 0011E6 E3F1F6F0 6703+SPTR0448 DC C'T160' 00291C 6704+TDSCDAT CSECT 00291C 6705+ DS 0F 00291C 040011E6 6706+ DC AL1(L'SPTR0448),AL3(SPTR0448) 0011EA 6707+TEXT CSECT 0011EA D4E5C940946B89 6708+SPTR0449 DC C'MVI m,i' 002920 6709+TDSCDAT CSECT 002920 6710+ DS 0F 002920 070011EA 6711+ DC AL1(L'SPTR0449),AL3(SPTR0449) 6712+* 004A4C 6713+TDSCTBL CSECT 04A4C 6714+T160TPTR EQU * 004A4C 00002908 6715+ DC A(T160TDSC) enabled test 6716+* 0077BC 6717+TCODE CSECT 0077C0 6718+ DS 0D ensure double word alignment for test 0077C0 6719+T160 DS 0H 01650000 0077C0 90EC D00C 0000C 6720+ STM 14,12,12(13) SAVE REGISTERS 02950000 0077C4 18CF 6721+ LR R12,R15 base register := entry address 077C0 6722+ USING T160,R12 declare code base register 0077C6 41B0 C01E 077DE 6723+ LA R11,T160L load loop target to R11 0077CA 58F0 C1C0 07980 6724+ L R15,=A(SAVETST) R15 := current save area 0077CE 50DF 0004 00004 6725+ ST R13,4(R15) set back pointer in current save area 0077D2 182D 6726+ LR R2,R13 remember callers save area 0077D4 18DF 6727+ LR R13,R15 setup current save area 0077D6 50D2 0008 00008 6728+ ST R13,8(R2) set forw pointer in callers save area 00000 6729+ USING TDSC,R1 declare TDSC base register 0077DA 58F0 1008 00008 6730+ L R15,TLRCNT load local repeat count to R15 6731+* 6732 * 6733 T160L REPINS MVI,(T160V1,C'x') repeat: MVI T160V1,C'x' 6734+* 6735+* build from sublist &ALIST a comma separated string &ARGS 6736+* 6737+* 6738+* 6739+* 6740+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6741+* this allows to transfer the repeat count from last TDSCGEN call 6742+* 6743+* 077DE 6744+T160L EQU * 6745+* 6746+* write a comment indicating what REPINS does (in case NOGEN in effect) 6747+* 6748+*,// REPINS: do 100 times: 6749+* PAGE 125 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 6750+* MNOTE requires that ' is doubled for expanded variables 6751+* thus build &MASTR as a copy of '&ARGS with ' doubled 6752+* 6753+* 6754+*,// MVI T160V1,C'x' 6755+* 6756+* finally generate code: &ICNT copies of &CODE &ARGS 6757+* 0077DE 92A7 C1BE 0797E 6758+ MVI T160V1,C'x' 0077E2 92A7 C1BE 0797E 6759+ MVI T160V1,C'x' 0077E6 92A7 C1BE 0797E 6760+ MVI T160V1,C'x' 0077EA 92A7 C1BE 0797E 6761+ MVI T160V1,C'x' 0077EE 92A7 C1BE 0797E 6762+ MVI T160V1,C'x' 0077F2 92A7 C1BE 0797E 6763+ MVI T160V1,C'x' 0077F6 92A7 C1BE 0797E 6764+ MVI T160V1,C'x' 0077FA 92A7 C1BE 0797E 6765+ MVI T160V1,C'x' 0077FE 92A7 C1BE 0797E 6766+ MVI T160V1,C'x' 007802 92A7 C1BE 0797E 6767+ MVI T160V1,C'x' 007806 92A7 C1BE 0797E 6768+ MVI T160V1,C'x' 00780A 92A7 C1BE 0797E 6769+ MVI T160V1,C'x' 00780E 92A7 C1BE 0797E 6770+ MVI T160V1,C'x' 007812 92A7 C1BE 0797E 6771+ MVI T160V1,C'x' 007816 92A7 C1BE 0797E 6772+ MVI T160V1,C'x' 00781A 92A7 C1BE 0797E 6773+ MVI T160V1,C'x' 00781E 92A7 C1BE 0797E 6774+ MVI T160V1,C'x' 007822 92A7 C1BE 0797E 6775+ MVI T160V1,C'x' 007826 92A7 C1BE 0797E 6776+ MVI T160V1,C'x' 00782A 92A7 C1BE 0797E 6777+ MVI T160V1,C'x' 00782E 92A7 C1BE 0797E 6778+ MVI T160V1,C'x' 007832 92A7 C1BE 0797E 6779+ MVI T160V1,C'x' 007836 92A7 C1BE 0797E 6780+ MVI T160V1,C'x' 00783A 92A7 C1BE 0797E 6781+ MVI T160V1,C'x' 00783E 92A7 C1BE 0797E 6782+ MVI T160V1,C'x' 007842 92A7 C1BE 0797E 6783+ MVI T160V1,C'x' 007846 92A7 C1BE 0797E 6784+ MVI T160V1,C'x' 00784A 92A7 C1BE 0797E 6785+ MVI T160V1,C'x' 00784E 92A7 C1BE 0797E 6786+ MVI T160V1,C'x' 007852 92A7 C1BE 0797E 6787+ MVI T160V1,C'x' 007856 92A7 C1BE 0797E 6788+ MVI T160V1,C'x' 00785A 92A7 C1BE 0797E 6789+ MVI T160V1,C'x' 00785E 92A7 C1BE 0797E 6790+ MVI T160V1,C'x' 007862 92A7 C1BE 0797E 6791+ MVI T160V1,C'x' 007866 92A7 C1BE 0797E 6792+ MVI T160V1,C'x' 00786A 92A7 C1BE 0797E 6793+ MVI T160V1,C'x' 00786E 92A7 C1BE 0797E 6794+ MVI T160V1,C'x' 007872 92A7 C1BE 0797E 6795+ MVI T160V1,C'x' 007876 92A7 C1BE 0797E 6796+ MVI T160V1,C'x' 00787A 92A7 C1BE 0797E 6797+ MVI T160V1,C'x' 00787E 92A7 C1BE 0797E 6798+ MVI T160V1,C'x' 007882 92A7 C1BE 0797E 6799+ MVI T160V1,C'x' 007886 92A7 C1BE 0797E 6800+ MVI T160V1,C'x' 00788A 92A7 C1BE 0797E 6801+ MVI T160V1,C'x' 00788E 92A7 C1BE 0797E 6802+ MVI T160V1,C'x' 007892 92A7 C1BE 0797E 6803+ MVI T160V1,C'x' 007896 92A7 C1BE 0797E 6804+ MVI T160V1,C'x' PAGE 126 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00789A 92A7 C1BE 0797E 6805+ MVI T160V1,C'x' 00789E 92A7 C1BE 0797E 6806+ MVI T160V1,C'x' 0078A2 92A7 C1BE 0797E 6807+ MVI T160V1,C'x' 0078A6 92A7 C1BE 0797E 6808+ MVI T160V1,C'x' 0078AA 92A7 C1BE 0797E 6809+ MVI T160V1,C'x' 0078AE 92A7 C1BE 0797E 6810+ MVI T160V1,C'x' 0078B2 92A7 C1BE 0797E 6811+ MVI T160V1,C'x' 0078B6 92A7 C1BE 0797E 6812+ MVI T160V1,C'x' 0078BA 92A7 C1BE 0797E 6813+ MVI T160V1,C'x' 0078BE 92A7 C1BE 0797E 6814+ MVI T160V1,C'x' 0078C2 92A7 C1BE 0797E 6815+ MVI T160V1,C'x' 0078C6 92A7 C1BE 0797E 6816+ MVI T160V1,C'x' 0078CA 92A7 C1BE 0797E 6817+ MVI T160V1,C'x' 0078CE 92A7 C1BE 0797E 6818+ MVI T160V1,C'x' 0078D2 92A7 C1BE 0797E 6819+ MVI T160V1,C'x' 0078D6 92A7 C1BE 0797E 6820+ MVI T160V1,C'x' 0078DA 92A7 C1BE 0797E 6821+ MVI T160V1,C'x' 0078DE 92A7 C1BE 0797E 6822+ MVI T160V1,C'x' 0078E2 92A7 C1BE 0797E 6823+ MVI T160V1,C'x' 0078E6 92A7 C1BE 0797E 6824+ MVI T160V1,C'x' 0078EA 92A7 C1BE 0797E 6825+ MVI T160V1,C'x' 0078EE 92A7 C1BE 0797E 6826+ MVI T160V1,C'x' 0078F2 92A7 C1BE 0797E 6827+ MVI T160V1,C'x' 0078F6 92A7 C1BE 0797E 6828+ MVI T160V1,C'x' 0078FA 92A7 C1BE 0797E 6829+ MVI T160V1,C'x' 0078FE 92A7 C1BE 0797E 6830+ MVI T160V1,C'x' 007902 92A7 C1BE 0797E 6831+ MVI T160V1,C'x' 007906 92A7 C1BE 0797E 6832+ MVI T160V1,C'x' 00790A 92A7 C1BE 0797E 6833+ MVI T160V1,C'x' 00790E 92A7 C1BE 0797E 6834+ MVI T160V1,C'x' 007912 92A7 C1BE 0797E 6835+ MVI T160V1,C'x' 007916 92A7 C1BE 0797E 6836+ MVI T160V1,C'x' 00791A 92A7 C1BE 0797E 6837+ MVI T160V1,C'x' 00791E 92A7 C1BE 0797E 6838+ MVI T160V1,C'x' 007922 92A7 C1BE 0797E 6839+ MVI T160V1,C'x' 007926 92A7 C1BE 0797E 6840+ MVI T160V1,C'x' 00792A 92A7 C1BE 0797E 6841+ MVI T160V1,C'x' 00792E 92A7 C1BE 0797E 6842+ MVI T160V1,C'x' 007932 92A7 C1BE 0797E 6843+ MVI T160V1,C'x' 007936 92A7 C1BE 0797E 6844+ MVI T160V1,C'x' 00793A 92A7 C1BE 0797E 6845+ MVI T160V1,C'x' 00793E 92A7 C1BE 0797E 6846+ MVI T160V1,C'x' 007942 92A7 C1BE 0797E 6847+ MVI T160V1,C'x' 007946 92A7 C1BE 0797E 6848+ MVI T160V1,C'x' 00794A 92A7 C1BE 0797E 6849+ MVI T160V1,C'x' 00794E 92A7 C1BE 0797E 6850+ MVI T160V1,C'x' 007952 92A7 C1BE 0797E 6851+ MVI T160V1,C'x' 007956 92A7 C1BE 0797E 6852+ MVI T160V1,C'x' 00795A 92A7 C1BE 0797E 6853+ MVI T160V1,C'x' 00795E 92A7 C1BE 0797E 6854+ MVI T160V1,C'x' 007962 92A7 C1BE 0797E 6855+ MVI T160V1,C'x' 007966 92A7 C1BE 0797E 6856+ MVI T160V1,C'x' 00796A 92A7 C1BE 0797E 6857+ MVI T160V1,C'x' 6858+* 00796E 06FB 6859 BCTR R15,R11 PAGE 127 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 6860 TSIMRET 007970 58F0 C1C0 07980 6861+ L R15,=A(SAVETST) R15 := current save area 007974 58DF 0004 00004 6862+ L R13,4(R15) get old save area back 007978 98EC D00C 0000C 6863+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00797C 07FE 6864+ BR 14 RETURN 02000000 6865 * 00797E 40 6866 T160V1 DC C' ' 6867 TSIMEND 007980 6868+ LTORG 007980 00000458 6869 =A(SAVETST) 07984 6870+T160TEND EQU * 6871 * 6872 * Test 161 -- MVN m,m (10c) -------------------------------- 6873 * 6874 TSIMBEG T161,5000,50,1,C'MVN m,m (10c)' 6875+* 002924 6876+TDSCDAT CSECT 002928 6877+ DS 0D 6878+* 002928 00007988 6879+T161TDSC DC A(T161) // TENTRY 00292C 00000174 6880+ DC A(T161TEND-T161) // TLENGTH 002930 00001388 6881+ DC F'5000' // TLRCNT 002934 00000032 6882+ DC F'50' // TIGCNT 002938 00000001 6883+ DC F'1' // TLTYPE 0011F1 6884+TEXT CSECT 0011F1 E3F1F6F1 6885+SPTR0460 DC C'T161' 00293C 6886+TDSCDAT CSECT 00293C 6887+ DS 0F 00293C 040011F1 6888+ DC AL1(L'SPTR0460),AL3(SPTR0460) 0011F5 6889+TEXT CSECT 0011F5 D4E5D540946B9440 6890+SPTR0461 DC C'MVN m,m (10c)' 002940 6891+TDSCDAT CSECT 002940 6892+ DS 0F 002940 0D0011F5 6893+ DC AL1(L'SPTR0461),AL3(SPTR0461) 6894+* 004A50 6895+TDSCTBL CSECT 04A50 6896+T161TPTR EQU * 004A50 00002928 6897+ DC A(T161TDSC) enabled test 6898+* 007984 6899+TCODE CSECT 007988 6900+ DS 0D ensure double word alignment for test 007988 6901+T161 DS 0H 01650000 007988 90EC D00C 0000C 6902+ STM 14,12,12(13) SAVE REGISTERS 02950000 00798C 18CF 6903+ LR R12,R15 base register := entry address 07988 6904+ USING T161,R12 declare code base register 00798E 41B0 C01E 079A6 6905+ LA R11,T161L load loop target to R11 007992 58F0 C170 07AF8 6906+ L R15,=A(SAVETST) R15 := current save area 007996 50DF 0004 00004 6907+ ST R13,4(R15) set back pointer in current save area 00799A 182D 6908+ LR R2,R13 remember callers save area 00799C 18DF 6909+ LR R13,R15 setup current save area 00799E 50D2 0008 00008 6910+ ST R13,8(R2) set forw pointer in callers save area 00000 6911+ USING TDSC,R1 declare TDSC base register 0079A2 58F0 1008 00008 6912+ L R15,TLRCNT load local repeat count to R15 6913+* 6914 * PAGE 128 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 6915 T161L REPINS MVN,(T161V1,T161V2) repeat: MVN T161V1,T161V2 6916+* 6917+* build from sublist &ALIST a comma separated string &ARGS 6918+* 6919+* 6920+* 6921+* 6922+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6923+* this allows to transfer the repeat count from last TDSCGEN call 6924+* 6925+* 079A6 6926+T161L EQU * 6927+* 6928+* write a comment indicating what REPINS does (in case NOGEN in effect) 6929+* 6930+*,// REPINS: do 50 times: 6931+* 6932+* MNOTE requires that ' is doubled for expanded variables 6933+* thus build &MASTR as a copy of '&ARGS with ' doubled 6934+* 6935+* 6936+*,// MVN T161V1,T161V2 6937+* 6938+* finally generate code: &ICNT copies of &CODE &ARGS 6939+* 0079A6 D109 C15C C166 07AE4 07AEE 6940+ MVN T161V1,T161V2 0079AC D109 C15C C166 07AE4 07AEE 6941+ MVN T161V1,T161V2 0079B2 D109 C15C C166 07AE4 07AEE 6942+ MVN T161V1,T161V2 0079B8 D109 C15C C166 07AE4 07AEE 6943+ MVN T161V1,T161V2 0079BE D109 C15C C166 07AE4 07AEE 6944+ MVN T161V1,T161V2 0079C4 D109 C15C C166 07AE4 07AEE 6945+ MVN T161V1,T161V2 0079CA D109 C15C C166 07AE4 07AEE 6946+ MVN T161V1,T161V2 0079D0 D109 C15C C166 07AE4 07AEE 6947+ MVN T161V1,T161V2 0079D6 D109 C15C C166 07AE4 07AEE 6948+ MVN T161V1,T161V2 0079DC D109 C15C C166 07AE4 07AEE 6949+ MVN T161V1,T161V2 0079E2 D109 C15C C166 07AE4 07AEE 6950+ MVN T161V1,T161V2 0079E8 D109 C15C C166 07AE4 07AEE 6951+ MVN T161V1,T161V2 0079EE D109 C15C C166 07AE4 07AEE 6952+ MVN T161V1,T161V2 0079F4 D109 C15C C166 07AE4 07AEE 6953+ MVN T161V1,T161V2 0079FA D109 C15C C166 07AE4 07AEE 6954+ MVN T161V1,T161V2 007A00 D109 C15C C166 07AE4 07AEE 6955+ MVN T161V1,T161V2 007A06 D109 C15C C166 07AE4 07AEE 6956+ MVN T161V1,T161V2 007A0C D109 C15C C166 07AE4 07AEE 6957+ MVN T161V1,T161V2 007A12 D109 C15C C166 07AE4 07AEE 6958+ MVN T161V1,T161V2 007A18 D109 C15C C166 07AE4 07AEE 6959+ MVN T161V1,T161V2 007A1E D109 C15C C166 07AE4 07AEE 6960+ MVN T161V1,T161V2 007A24 D109 C15C C166 07AE4 07AEE 6961+ MVN T161V1,T161V2 007A2A D109 C15C C166 07AE4 07AEE 6962+ MVN T161V1,T161V2 007A30 D109 C15C C166 07AE4 07AEE 6963+ MVN T161V1,T161V2 007A36 D109 C15C C166 07AE4 07AEE 6964+ MVN T161V1,T161V2 007A3C D109 C15C C166 07AE4 07AEE 6965+ MVN T161V1,T161V2 007A42 D109 C15C C166 07AE4 07AEE 6966+ MVN T161V1,T161V2 007A48 D109 C15C C166 07AE4 07AEE 6967+ MVN T161V1,T161V2 007A4E D109 C15C C166 07AE4 07AEE 6968+ MVN T161V1,T161V2 007A54 D109 C15C C166 07AE4 07AEE 6969+ MVN T161V1,T161V2 PAGE 129 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 007A5A D109 C15C C166 07AE4 07AEE 6970+ MVN T161V1,T161V2 007A60 D109 C15C C166 07AE4 07AEE 6971+ MVN T161V1,T161V2 007A66 D109 C15C C166 07AE4 07AEE 6972+ MVN T161V1,T161V2 007A6C D109 C15C C166 07AE4 07AEE 6973+ MVN T161V1,T161V2 007A72 D109 C15C C166 07AE4 07AEE 6974+ MVN T161V1,T161V2 007A78 D109 C15C C166 07AE4 07AEE 6975+ MVN T161V1,T161V2 007A7E D109 C15C C166 07AE4 07AEE 6976+ MVN T161V1,T161V2 007A84 D109 C15C C166 07AE4 07AEE 6977+ MVN T161V1,T161V2 007A8A D109 C15C C166 07AE4 07AEE 6978+ MVN T161V1,T161V2 007A90 D109 C15C C166 07AE4 07AEE 6979+ MVN T161V1,T161V2 007A96 D109 C15C C166 07AE4 07AEE 6980+ MVN T161V1,T161V2 007A9C D109 C15C C166 07AE4 07AEE 6981+ MVN T161V1,T161V2 007AA2 D109 C15C C166 07AE4 07AEE 6982+ MVN T161V1,T161V2 007AA8 D109 C15C C166 07AE4 07AEE 6983+ MVN T161V1,T161V2 007AAE D109 C15C C166 07AE4 07AEE 6984+ MVN T161V1,T161V2 007AB4 D109 C15C C166 07AE4 07AEE 6985+ MVN T161V1,T161V2 007ABA D109 C15C C166 07AE4 07AEE 6986+ MVN T161V1,T161V2 007AC0 D109 C15C C166 07AE4 07AEE 6987+ MVN T161V1,T161V2 007AC6 D109 C15C C166 07AE4 07AEE 6988+ MVN T161V1,T161V2 007ACC D109 C15C C166 07AE4 07AEE 6989+ MVN T161V1,T161V2 6990+* 007AD2 06FB 6991 BCTR R15,R11 6992 TSIMRET 007AD4 58F0 C170 07AF8 6993+ L R15,=A(SAVETST) R15 := current save area 007AD8 58DF 0004 00004 6994+ L R13,4(R15) get old save area back 007ADC 98EC D00C 0000C 6995+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007AE0 07FE 6996+ BR 14 RETURN 02000000 6997 * 007AE4 6998 DS 0F 007AE4 4040404040404040 6999 T161V1 DC CL10' ' 007AEE F0F1F2F3F4F5F6F7 7000 T161V2 DC CL10'0123456789' 007AF8 7001 DS 0H 7002 TSIMEND 007AF8 7003+ LTORG 007AF8 00000458 7004 =A(SAVETST) 07AFC 7005+T161TEND EQU * 7006 * 7007 * Test 162 -- MVN m,m (30c) -------------------------------- 7008 * 7009 TSIMBEG T162,7000,20,1,C'MVN m,m (30c)' 7010+* 002944 7011+TDSCDAT CSECT 002948 7012+ DS 0D 7013+* 002948 00007B00 7014+T162TDSC DC A(T162) // TENTRY 00294C 000000EC 7015+ DC A(T162TEND-T162) // TLENGTH 002950 00001B58 7016+ DC F'7000' // TLRCNT 002954 00000014 7017+ DC F'20' // TIGCNT 002958 00000001 7018+ DC F'1' // TLTYPE 001202 7019+TEXT CSECT 001202 E3F1F6F2 7020+SPTR0472 DC C'T162' 00295C 7021+TDSCDAT CSECT 00295C 7022+ DS 0F 00295C 04001202 7023+ DC AL1(L'SPTR0472),AL3(SPTR0472) 001206 7024+TEXT CSECT PAGE 130 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 001206 D4E5D540946B9440 7025+SPTR0473 DC C'MVN m,m (30c)' 002960 7026+TDSCDAT CSECT 002960 7027+ DS 0F 002960 0D001206 7028+ DC AL1(L'SPTR0473),AL3(SPTR0473) 7029+* 004A54 7030+TDSCTBL CSECT 04A54 7031+T162TPTR EQU * 004A54 00002948 7032+ DC A(T162TDSC) enabled test 7033+* 007AFC 7034+TCODE CSECT 007B00 7035+ DS 0D ensure double word alignment for test 007B00 7036+T162 DS 0H 01650000 007B00 90EC D00C 0000C 7037+ STM 14,12,12(13) SAVE REGISTERS 02950000 007B04 18CF 7038+ LR R12,R15 base register := entry address 07B00 7039+ USING T162,R12 declare code base register 007B06 41B0 C01E 07B1E 7040+ LA R11,T162L load loop target to R11 007B0A 58F0 C0E8 07BE8 7041+ L R15,=A(SAVETST) R15 := current save area 007B0E 50DF 0004 00004 7042+ ST R13,4(R15) set back pointer in current save area 007B12 182D 7043+ LR R2,R13 remember callers save area 007B14 18DF 7044+ LR R13,R15 setup current save area 007B16 50D2 0008 00008 7045+ ST R13,8(R2) set forw pointer in callers save area 00000 7046+ USING TDSC,R1 declare TDSC base register 007B1A 58F0 1008 00008 7047+ L R15,TLRCNT load local repeat count to R15 7048+* 7049 * 7050 T162L REPINS MVN,(T162V1,T162V2) repeat: MVN T162V1,T162V2 7051+* 7052+* build from sublist &ALIST a comma separated string &ARGS 7053+* 7054+* 7055+* 7056+* 7057+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7058+* this allows to transfer the repeat count from last TDSCGEN call 7059+* 7060+* 07B1E 7061+T162L EQU * 7062+* 7063+* write a comment indicating what REPINS does (in case NOGEN in effect) 7064+* 7065+*,// REPINS: do 20 times: 7066+* 7067+* MNOTE requires that ' is doubled for expanded variables 7068+* thus build &MASTR as a copy of '&ARGS with ' doubled 7069+* 7070+* 7071+*,// MVN T162V1,T162V2 7072+* 7073+* finally generate code: &ICNT copies of &CODE &ARGS 7074+* 007B1E D11D C0A8 C0C6 07BA8 07BC6 7075+ MVN T162V1,T162V2 007B24 D11D C0A8 C0C6 07BA8 07BC6 7076+ MVN T162V1,T162V2 007B2A D11D C0A8 C0C6 07BA8 07BC6 7077+ MVN T162V1,T162V2 007B30 D11D C0A8 C0C6 07BA8 07BC6 7078+ MVN T162V1,T162V2 007B36 D11D C0A8 C0C6 07BA8 07BC6 7079+ MVN T162V1,T162V2 PAGE 131 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 007B3C D11D C0A8 C0C6 07BA8 07BC6 7080+ MVN T162V1,T162V2 007B42 D11D C0A8 C0C6 07BA8 07BC6 7081+ MVN T162V1,T162V2 007B48 D11D C0A8 C0C6 07BA8 07BC6 7082+ MVN T162V1,T162V2 007B4E D11D C0A8 C0C6 07BA8 07BC6 7083+ MVN T162V1,T162V2 007B54 D11D C0A8 C0C6 07BA8 07BC6 7084+ MVN T162V1,T162V2 007B5A D11D C0A8 C0C6 07BA8 07BC6 7085+ MVN T162V1,T162V2 007B60 D11D C0A8 C0C6 07BA8 07BC6 7086+ MVN T162V1,T162V2 007B66 D11D C0A8 C0C6 07BA8 07BC6 7087+ MVN T162V1,T162V2 007B6C D11D C0A8 C0C6 07BA8 07BC6 7088+ MVN T162V1,T162V2 007B72 D11D C0A8 C0C6 07BA8 07BC6 7089+ MVN T162V1,T162V2 007B78 D11D C0A8 C0C6 07BA8 07BC6 7090+ MVN T162V1,T162V2 007B7E D11D C0A8 C0C6 07BA8 07BC6 7091+ MVN T162V1,T162V2 007B84 D11D C0A8 C0C6 07BA8 07BC6 7092+ MVN T162V1,T162V2 007B8A D11D C0A8 C0C6 07BA8 07BC6 7093+ MVN T162V1,T162V2 007B90 D11D C0A8 C0C6 07BA8 07BC6 7094+ MVN T162V1,T162V2 7095+* 007B96 06FB 7096 BCTR R15,R11 7097 TSIMRET 007B98 58F0 C0E8 07BE8 7098+ L R15,=A(SAVETST) R15 := current save area 007B9C 58DF 0004 00004 7099+ L R13,4(R15) get old save area back 007BA0 98EC D00C 0000C 7100+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007BA4 07FE 7101+ BR 14 RETURN 02000000 7102 * 007BA8 7103 DS 0F 007BA8 4040404040404040 7104 T162V1 DC CL30' ' 007BC6 F0F1F2F3F4F5F6F7 7105 T162V2 DC CL30'012345678901234567890123456789' 007BE4 7106 DS 0H 7107 TSIMEND 007BE8 7108+ LTORG 007BE8 00000458 7109 =A(SAVETST) 07BEC 7110+T162TEND EQU * 7111 * 7112 * Test 165 -- MVZ m,m (10c) -------------------------------- 7113 * 7114 TSIMBEG T165,5000,50,1,C'MVZ m,m (10c)' 7115+* 002964 7116+TDSCDAT CSECT 002968 7117+ DS 0D 7118+* 002968 00007BF0 7119+T165TDSC DC A(T165) // TENTRY 00296C 00000174 7120+ DC A(T165TEND-T165) // TLENGTH 002970 00001388 7121+ DC F'5000' // TLRCNT 002974 00000032 7122+ DC F'50' // TIGCNT 002978 00000001 7123+ DC F'1' // TLTYPE 001213 7124+TEXT CSECT 001213 E3F1F6F5 7125+SPTR0484 DC C'T165' 00297C 7126+TDSCDAT CSECT 00297C 7127+ DS 0F 00297C 04001213 7128+ DC AL1(L'SPTR0484),AL3(SPTR0484) 001217 7129+TEXT CSECT 001217 D4E5E940946B9440 7130+SPTR0485 DC C'MVZ m,m (10c)' 002980 7131+TDSCDAT CSECT 002980 7132+ DS 0F 002980 0D001217 7133+ DC AL1(L'SPTR0485),AL3(SPTR0485) 7134+* PAGE 132 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 004A58 7135+TDSCTBL CSECT 04A58 7136+T165TPTR EQU * 004A58 00002968 7137+ DC A(T165TDSC) enabled test 7138+* 007BEC 7139+TCODE CSECT 007BF0 7140+ DS 0D ensure double word alignment for test 007BF0 7141+T165 DS 0H 01650000 007BF0 90EC D00C 0000C 7142+ STM 14,12,12(13) SAVE REGISTERS 02950000 007BF4 18CF 7143+ LR R12,R15 base register := entry address 07BF0 7144+ USING T165,R12 declare code base register 007BF6 41B0 C01E 07C0E 7145+ LA R11,T165L load loop target to R11 007BFA 58F0 C170 07D60 7146+ L R15,=A(SAVETST) R15 := current save area 007BFE 50DF 0004 00004 7147+ ST R13,4(R15) set back pointer in current save area 007C02 182D 7148+ LR R2,R13 remember callers save area 007C04 18DF 7149+ LR R13,R15 setup current save area 007C06 50D2 0008 00008 7150+ ST R13,8(R2) set forw pointer in callers save area 00000 7151+ USING TDSC,R1 declare TDSC base register 007C0A 58F0 1008 00008 7152+ L R15,TLRCNT load local repeat count to R15 7153+* 7154 * 7155 T165L REPINS MVZ,(T165V1,T165V2) repeat: MVZ T165V1,T165V2 7156+* 7157+* build from sublist &ALIST a comma separated string &ARGS 7158+* 7159+* 7160+* 7161+* 7162+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7163+* this allows to transfer the repeat count from last TDSCGEN call 7164+* 7165+* 07C0E 7166+T165L EQU * 7167+* 7168+* write a comment indicating what REPINS does (in case NOGEN in effect) 7169+* 7170+*,// REPINS: do 50 times: 7171+* 7172+* MNOTE requires that ' is doubled for expanded variables 7173+* thus build &MASTR as a copy of '&ARGS with ' doubled 7174+* 7175+* 7176+*,// MVZ T165V1,T165V2 7177+* 7178+* finally generate code: &ICNT copies of &CODE &ARGS 7179+* 007C0E D309 C15C C166 07D4C 07D56 7180+ MVZ T165V1,T165V2 007C14 D309 C15C C166 07D4C 07D56 7181+ MVZ T165V1,T165V2 007C1A D309 C15C C166 07D4C 07D56 7182+ MVZ T165V1,T165V2 007C20 D309 C15C C166 07D4C 07D56 7183+ MVZ T165V1,T165V2 007C26 D309 C15C C166 07D4C 07D56 7184+ MVZ T165V1,T165V2 007C2C D309 C15C C166 07D4C 07D56 7185+ MVZ T165V1,T165V2 007C32 D309 C15C C166 07D4C 07D56 7186+ MVZ T165V1,T165V2 007C38 D309 C15C C166 07D4C 07D56 7187+ MVZ T165V1,T165V2 007C3E D309 C15C C166 07D4C 07D56 7188+ MVZ T165V1,T165V2 007C44 D309 C15C C166 07D4C 07D56 7189+ MVZ T165V1,T165V2 PAGE 133 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 007C4A D309 C15C C166 07D4C 07D56 7190+ MVZ T165V1,T165V2 007C50 D309 C15C C166 07D4C 07D56 7191+ MVZ T165V1,T165V2 007C56 D309 C15C C166 07D4C 07D56 7192+ MVZ T165V1,T165V2 007C5C D309 C15C C166 07D4C 07D56 7193+ MVZ T165V1,T165V2 007C62 D309 C15C C166 07D4C 07D56 7194+ MVZ T165V1,T165V2 007C68 D309 C15C C166 07D4C 07D56 7195+ MVZ T165V1,T165V2 007C6E D309 C15C C166 07D4C 07D56 7196+ MVZ T165V1,T165V2 007C74 D309 C15C C166 07D4C 07D56 7197+ MVZ T165V1,T165V2 007C7A D309 C15C C166 07D4C 07D56 7198+ MVZ T165V1,T165V2 007C80 D309 C15C C166 07D4C 07D56 7199+ MVZ T165V1,T165V2 007C86 D309 C15C C166 07D4C 07D56 7200+ MVZ T165V1,T165V2 007C8C D309 C15C C166 07D4C 07D56 7201+ MVZ T165V1,T165V2 007C92 D309 C15C C166 07D4C 07D56 7202+ MVZ T165V1,T165V2 007C98 D309 C15C C166 07D4C 07D56 7203+ MVZ T165V1,T165V2 007C9E D309 C15C C166 07D4C 07D56 7204+ MVZ T165V1,T165V2 007CA4 D309 C15C C166 07D4C 07D56 7205+ MVZ T165V1,T165V2 007CAA D309 C15C C166 07D4C 07D56 7206+ MVZ T165V1,T165V2 007CB0 D309 C15C C166 07D4C 07D56 7207+ MVZ T165V1,T165V2 007CB6 D309 C15C C166 07D4C 07D56 7208+ MVZ T165V1,T165V2 007CBC D309 C15C C166 07D4C 07D56 7209+ MVZ T165V1,T165V2 007CC2 D309 C15C C166 07D4C 07D56 7210+ MVZ T165V1,T165V2 007CC8 D309 C15C C166 07D4C 07D56 7211+ MVZ T165V1,T165V2 007CCE D309 C15C C166 07D4C 07D56 7212+ MVZ T165V1,T165V2 007CD4 D309 C15C C166 07D4C 07D56 7213+ MVZ T165V1,T165V2 007CDA D309 C15C C166 07D4C 07D56 7214+ MVZ T165V1,T165V2 007CE0 D309 C15C C166 07D4C 07D56 7215+ MVZ T165V1,T165V2 007CE6 D309 C15C C166 07D4C 07D56 7216+ MVZ T165V1,T165V2 007CEC D309 C15C C166 07D4C 07D56 7217+ MVZ T165V1,T165V2 007CF2 D309 C15C C166 07D4C 07D56 7218+ MVZ T165V1,T165V2 007CF8 D309 C15C C166 07D4C 07D56 7219+ MVZ T165V1,T165V2 007CFE D309 C15C C166 07D4C 07D56 7220+ MVZ T165V1,T165V2 007D04 D309 C15C C166 07D4C 07D56 7221+ MVZ T165V1,T165V2 007D0A D309 C15C C166 07D4C 07D56 7222+ MVZ T165V1,T165V2 007D10 D309 C15C C166 07D4C 07D56 7223+ MVZ T165V1,T165V2 007D16 D309 C15C C166 07D4C 07D56 7224+ MVZ T165V1,T165V2 007D1C D309 C15C C166 07D4C 07D56 7225+ MVZ T165V1,T165V2 007D22 D309 C15C C166 07D4C 07D56 7226+ MVZ T165V1,T165V2 007D28 D309 C15C C166 07D4C 07D56 7227+ MVZ T165V1,T165V2 007D2E D309 C15C C166 07D4C 07D56 7228+ MVZ T165V1,T165V2 007D34 D309 C15C C166 07D4C 07D56 7229+ MVZ T165V1,T165V2 7230+* 007D3A 06FB 7231 BCTR R15,R11 7232 TSIMRET 007D3C 58F0 C170 07D60 7233+ L R15,=A(SAVETST) R15 := current save area 007D40 58DF 0004 00004 7234+ L R13,4(R15) get old save area back 007D44 98EC D00C 0000C 7235+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007D48 07FE 7236+ BR 14 RETURN 02000000 7237 * 007D4C 7238 DS 0F 007D4C 4040404040404040 7239 T165V1 DC CL10' ' 007D56 F0F1F2F3F4F5F6F7 7240 T165V2 DC CL10'0123456789' 007D60 7241 DS 0H 7242 TSIMEND 007D60 7243+ LTORG 007D60 00000458 7244 =A(SAVETST) PAGE 134 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 07D64 7245+T165TEND EQU * 7246 * 7247 * Test 166 -- MVZ m,m (30c) -------------------------------- 7248 * 7249 TSIMBEG T166,7000,20,1,C'MVZ m,m (30c)' 7250+* 002984 7251+TDSCDAT CSECT 002988 7252+ DS 0D 7253+* 002988 00007D68 7254+T166TDSC DC A(T166) // TENTRY 00298C 000000EC 7255+ DC A(T166TEND-T166) // TLENGTH 002990 00001B58 7256+ DC F'7000' // TLRCNT 002994 00000014 7257+ DC F'20' // TIGCNT 002998 00000001 7258+ DC F'1' // TLTYPE 001224 7259+TEXT CSECT 001224 E3F1F6F6 7260+SPTR0496 DC C'T166' 00299C 7261+TDSCDAT CSECT 00299C 7262+ DS 0F 00299C 04001224 7263+ DC AL1(L'SPTR0496),AL3(SPTR0496) 001228 7264+TEXT CSECT 001228 D4E5E940946B9440 7265+SPTR0497 DC C'MVZ m,m (30c)' 0029A0 7266+TDSCDAT CSECT 0029A0 7267+ DS 0F 0029A0 0D001228 7268+ DC AL1(L'SPTR0497),AL3(SPTR0497) 7269+* 004A5C 7270+TDSCTBL CSECT 04A5C 7271+T166TPTR EQU * 004A5C 00002988 7272+ DC A(T166TDSC) enabled test 7273+* 007D64 7274+TCODE CSECT 007D68 7275+ DS 0D ensure double word alignment for test 007D68 7276+T166 DS 0H 01650000 007D68 90EC D00C 0000C 7277+ STM 14,12,12(13) SAVE REGISTERS 02950000 007D6C 18CF 7278+ LR R12,R15 base register := entry address 07D68 7279+ USING T166,R12 declare code base register 007D6E 41B0 C01E 07D86 7280+ LA R11,T166L load loop target to R11 007D72 58F0 C0E8 07E50 7281+ L R15,=A(SAVETST) R15 := current save area 007D76 50DF 0004 00004 7282+ ST R13,4(R15) set back pointer in current save area 007D7A 182D 7283+ LR R2,R13 remember callers save area 007D7C 18DF 7284+ LR R13,R15 setup current save area 007D7E 50D2 0008 00008 7285+ ST R13,8(R2) set forw pointer in callers save area 00000 7286+ USING TDSC,R1 declare TDSC base register 007D82 58F0 1008 00008 7287+ L R15,TLRCNT load local repeat count to R15 7288+* 7289 * 7290 T166L REPINS MVZ,(T166V1,T166V2) repeat: MVZ T166V1,T166V2 7291+* 7292+* build from sublist &ALIST a comma separated string &ARGS 7293+* 7294+* 7295+* 7296+* 7297+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7298+* this allows to transfer the repeat count from last TDSCGEN call 7299+* PAGE 135 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 7300+* 07D86 7301+T166L EQU * 7302+* 7303+* write a comment indicating what REPINS does (in case NOGEN in effect) 7304+* 7305+*,// REPINS: do 20 times: 7306+* 7307+* MNOTE requires that ' is doubled for expanded variables 7308+* thus build &MASTR as a copy of '&ARGS with ' doubled 7309+* 7310+* 7311+*,// MVZ T166V1,T166V2 7312+* 7313+* finally generate code: &ICNT copies of &CODE &ARGS 7314+* 007D86 D31D C0A8 C0C6 07E10 07E2E 7315+ MVZ T166V1,T166V2 007D8C D31D C0A8 C0C6 07E10 07E2E 7316+ MVZ T166V1,T166V2 007D92 D31D C0A8 C0C6 07E10 07E2E 7317+ MVZ T166V1,T166V2 007D98 D31D C0A8 C0C6 07E10 07E2E 7318+ MVZ T166V1,T166V2 007D9E D31D C0A8 C0C6 07E10 07E2E 7319+ MVZ T166V1,T166V2 007DA4 D31D C0A8 C0C6 07E10 07E2E 7320+ MVZ T166V1,T166V2 007DAA D31D C0A8 C0C6 07E10 07E2E 7321+ MVZ T166V1,T166V2 007DB0 D31D C0A8 C0C6 07E10 07E2E 7322+ MVZ T166V1,T166V2 007DB6 D31D C0A8 C0C6 07E10 07E2E 7323+ MVZ T166V1,T166V2 007DBC D31D C0A8 C0C6 07E10 07E2E 7324+ MVZ T166V1,T166V2 007DC2 D31D C0A8 C0C6 07E10 07E2E 7325+ MVZ T166V1,T166V2 007DC8 D31D C0A8 C0C6 07E10 07E2E 7326+ MVZ T166V1,T166V2 007DCE D31D C0A8 C0C6 07E10 07E2E 7327+ MVZ T166V1,T166V2 007DD4 D31D C0A8 C0C6 07E10 07E2E 7328+ MVZ T166V1,T166V2 007DDA D31D C0A8 C0C6 07E10 07E2E 7329+ MVZ T166V1,T166V2 007DE0 D31D C0A8 C0C6 07E10 07E2E 7330+ MVZ T166V1,T166V2 007DE6 D31D C0A8 C0C6 07E10 07E2E 7331+ MVZ T166V1,T166V2 007DEC D31D C0A8 C0C6 07E10 07E2E 7332+ MVZ T166V1,T166V2 007DF2 D31D C0A8 C0C6 07E10 07E2E 7333+ MVZ T166V1,T166V2 007DF8 D31D C0A8 C0C6 07E10 07E2E 7334+ MVZ T166V1,T166V2 7335+* 007DFE 06FB 7336 BCTR R15,R11 7337 TSIMRET 007E00 58F0 C0E8 07E50 7338+ L R15,=A(SAVETST) R15 := current save area 007E04 58DF 0004 00004 7339+ L R13,4(R15) get old save area back 007E08 98EC D00C 0000C 7340+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007E0C 07FE 7341+ BR 14 RETURN 02000000 7342 * 007E10 7343 DS 0F 007E10 4040404040404040 7344 T166V1 DC CL30' ' 007E2E F0F1F2F3F4F5F6F7 7345 T166V2 DC CL30'012345678901234567890123456789' 007E4C 7346 DS 0H 7347 TSIMEND 007E50 7348+ LTORG 007E50 00000458 7349 =A(SAVETST) 07E54 7350+T166TEND EQU * 7351 * 7352 * Test 167 -- MVCIN m,m (10c) ------------------------------ 7353 * 7354 TSIMBEG T167,3500,20,1,C'MVCIN m,m (10c)' PAGE 136 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 7355+* 0029A4 7356+TDSCDAT CSECT 0029A8 7357+ DS 0D 7358+* 0029A8 00007E58 7359+T167TDSC DC A(T167) // TENTRY 0029AC 000000C4 7360+ DC A(T167TEND-T167) // TLENGTH 0029B0 00000DAC 7361+ DC F'3500' // TLRCNT 0029B4 00000014 7362+ DC F'20' // TIGCNT 0029B8 00000001 7363+ DC F'1' // TLTYPE 001235 7364+TEXT CSECT 001235 E3F1F6F7 7365+SPTR0508 DC C'T167' 0029BC 7366+TDSCDAT CSECT 0029BC 7367+ DS 0F 0029BC 04001235 7368+ DC AL1(L'SPTR0508),AL3(SPTR0508) 001239 7369+TEXT CSECT 001239 D4E5C3C9D540946B 7370+SPTR0509 DC C'MVCIN m,m (10c)' 0029C0 7371+TDSCDAT CSECT 0029C0 7372+ DS 0F 0029C0 0F001239 7373+ DC AL1(L'SPTR0509),AL3(SPTR0509) 7374+* 004A60 7375+TDSCTBL CSECT 04A60 7376+T167TPTR EQU * 004A60 000029A8 7377+ DC A(T167TDSC) enabled test 7378+* 007E54 7379+TCODE CSECT 007E58 7380+ DS 0D ensure double word alignment for test 007E58 7381+T167 DS 0H 01650000 007E58 90EC D00C 0000C 7382+ STM 14,12,12(13) SAVE REGISTERS 02950000 007E5C 18CF 7383+ LR R12,R15 base register := entry address 07E58 7384+ USING T167,R12 declare code base register 007E5E 41B0 C01E 07E76 7385+ LA R11,T167L load loop target to R11 007E62 58F0 C0C0 07F18 7386+ L R15,=A(SAVETST) R15 := current save area 007E66 50DF 0004 00004 7387+ ST R13,4(R15) set back pointer in current save area 007E6A 182D 7388+ LR R2,R13 remember callers save area 007E6C 18DF 7389+ LR R13,R15 setup current save area 007E6E 50D2 0008 00008 7390+ ST R13,8(R2) set forw pointer in callers save area 00000 7391+ USING TDSC,R1 declare TDSC base register 007E72 58F0 1008 00008 7392+ L R15,TLRCNT load local repeat count to R15 7393+* 7394 * 7395 T167L REPINS MVCIN,(T167V1,T167V2) repeat: MVCIN T167V1,T167V2 7396+* 7397+* build from sublist &ALIST a comma separated string &ARGS 7398+* 7399+* 7400+* 7401+* 7402+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7403+* this allows to transfer the repeat count from last TDSCGEN call 7404+* 7405+* 07E76 7406+T167L EQU * 7407+* 7408+* write a comment indicating what REPINS does (in case NOGEN in effect) 7409+* PAGE 137 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 7410+*,// REPINS: do 20 times: 7411+* 7412+* MNOTE requires that ' is doubled for expanded variables 7413+* thus build &MASTR as a copy of '&ARGS with ' doubled 7414+* 7415+* 7416+*,// MVCIN T167V1,T167V2 7417+* 7418+* finally generate code: &ICNT copies of &CODE &ARGS 7419+* 007E76 E809 C0A8 C0B2 07F00 07F0A 7420+ MVCIN T167V1,T167V2 007E7C E809 C0A8 C0B2 07F00 07F0A 7421+ MVCIN T167V1,T167V2 007E82 E809 C0A8 C0B2 07F00 07F0A 7422+ MVCIN T167V1,T167V2 007E88 E809 C0A8 C0B2 07F00 07F0A 7423+ MVCIN T167V1,T167V2 007E8E E809 C0A8 C0B2 07F00 07F0A 7424+ MVCIN T167V1,T167V2 007E94 E809 C0A8 C0B2 07F00 07F0A 7425+ MVCIN T167V1,T167V2 007E9A E809 C0A8 C0B2 07F00 07F0A 7426+ MVCIN T167V1,T167V2 007EA0 E809 C0A8 C0B2 07F00 07F0A 7427+ MVCIN T167V1,T167V2 007EA6 E809 C0A8 C0B2 07F00 07F0A 7428+ MVCIN T167V1,T167V2 007EAC E809 C0A8 C0B2 07F00 07F0A 7429+ MVCIN T167V1,T167V2 007EB2 E809 C0A8 C0B2 07F00 07F0A 7430+ MVCIN T167V1,T167V2 007EB8 E809 C0A8 C0B2 07F00 07F0A 7431+ MVCIN T167V1,T167V2 007EBE E809 C0A8 C0B2 07F00 07F0A 7432+ MVCIN T167V1,T167V2 007EC4 E809 C0A8 C0B2 07F00 07F0A 7433+ MVCIN T167V1,T167V2 007ECA E809 C0A8 C0B2 07F00 07F0A 7434+ MVCIN T167V1,T167V2 007ED0 E809 C0A8 C0B2 07F00 07F0A 7435+ MVCIN T167V1,T167V2 007ED6 E809 C0A8 C0B2 07F00 07F0A 7436+ MVCIN T167V1,T167V2 007EDC E809 C0A8 C0B2 07F00 07F0A 7437+ MVCIN T167V1,T167V2 007EE2 E809 C0A8 C0B2 07F00 07F0A 7438+ MVCIN T167V1,T167V2 007EE8 E809 C0A8 C0B2 07F00 07F0A 7439+ MVCIN T167V1,T167V2 7440+* 007EEE 06FB 7441 BCTR R15,R11 7442 TSIMRET 007EF0 58F0 C0C0 07F18 7443+ L R15,=A(SAVETST) R15 := current save area 007EF4 58DF 0004 00004 7444+ L R13,4(R15) get old save area back 007EF8 98EC D00C 0000C 7445+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007EFC 07FE 7446+ BR 14 RETURN 02000000 7447 * 007F00 7448 DS 0F 007F00 4040404040404040 7449 T167V1 DC CL10' ' 007F0A F0F1F2F3F4F5F6F7 7450 T167V2 DC CL10'0123456789' 007F14 7451 DS 0H 7452 TSIMEND 007F18 7453+ LTORG 007F18 00000458 7454 =A(SAVETST) 07F1C 7455+T167TEND EQU * 7456 * 7457 * Test 168 -- MVCIN m,m (30c) ------------------------------ 7458 * 7459 TSIMBEG T168,1200,20,1,C'MVCIN m,m (30c)' 7460+* 0029C4 7461+TDSCDAT CSECT 0029C8 7462+ DS 0D 7463+* 0029C8 00007F20 7464+T168TDSC DC A(T168) // TENTRY PAGE 138 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0029CC 000000EC 7465+ DC A(T168TEND-T168) // TLENGTH 0029D0 000004B0 7466+ DC F'1200' // TLRCNT 0029D4 00000014 7467+ DC F'20' // TIGCNT 0029D8 00000001 7468+ DC F'1' // TLTYPE 001248 7469+TEXT CSECT 001248 E3F1F6F8 7470+SPTR0520 DC C'T168' 0029DC 7471+TDSCDAT CSECT 0029DC 7472+ DS 0F 0029DC 04001248 7473+ DC AL1(L'SPTR0520),AL3(SPTR0520) 00124C 7474+TEXT CSECT 00124C D4E5C3C9D540946B 7475+SPTR0521 DC C'MVCIN m,m (30c)' 0029E0 7476+TDSCDAT CSECT 0029E0 7477+ DS 0F 0029E0 0F00124C 7478+ DC AL1(L'SPTR0521),AL3(SPTR0521) 7479+* 004A64 7480+TDSCTBL CSECT 04A64 7481+T168TPTR EQU * 004A64 000029C8 7482+ DC A(T168TDSC) enabled test 7483+* 007F1C 7484+TCODE CSECT 007F20 7485+ DS 0D ensure double word alignment for test 007F20 7486+T168 DS 0H 01650000 007F20 90EC D00C 0000C 7487+ STM 14,12,12(13) SAVE REGISTERS 02950000 007F24 18CF 7488+ LR R12,R15 base register := entry address 07F20 7489+ USING T168,R12 declare code base register 007F26 41B0 C01E 07F3E 7490+ LA R11,T168L load loop target to R11 007F2A 58F0 C0E8 08008 7491+ L R15,=A(SAVETST) R15 := current save area 007F2E 50DF 0004 00004 7492+ ST R13,4(R15) set back pointer in current save area 007F32 182D 7493+ LR R2,R13 remember callers save area 007F34 18DF 7494+ LR R13,R15 setup current save area 007F36 50D2 0008 00008 7495+ ST R13,8(R2) set forw pointer in callers save area 00000 7496+ USING TDSC,R1 declare TDSC base register 007F3A 58F0 1008 00008 7497+ L R15,TLRCNT load local repeat count to R15 7498+* 7499 * 7500 T168L REPINS MVCIN,(T168V1,T168V2) repeat: MVCIN T168V1,T168V2 7501+* 7502+* build from sublist &ALIST a comma separated string &ARGS 7503+* 7504+* 7505+* 7506+* 7507+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7508+* this allows to transfer the repeat count from last TDSCGEN call 7509+* 7510+* 07F3E 7511+T168L EQU * 7512+* 7513+* write a comment indicating what REPINS does (in case NOGEN in effect) 7514+* 7515+*,// REPINS: do 20 times: 7516+* 7517+* MNOTE requires that ' is doubled for expanded variables 7518+* thus build &MASTR as a copy of '&ARGS with ' doubled 7519+* PAGE 139 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 7520+* 7521+*,// MVCIN T168V1,T168V2 7522+* 7523+* finally generate code: &ICNT copies of &CODE &ARGS 7524+* 007F3E E81D C0A8 C0C6 07FC8 07FE6 7525+ MVCIN T168V1,T168V2 007F44 E81D C0A8 C0C6 07FC8 07FE6 7526+ MVCIN T168V1,T168V2 007F4A E81D C0A8 C0C6 07FC8 07FE6 7527+ MVCIN T168V1,T168V2 007F50 E81D C0A8 C0C6 07FC8 07FE6 7528+ MVCIN T168V1,T168V2 007F56 E81D C0A8 C0C6 07FC8 07FE6 7529+ MVCIN T168V1,T168V2 007F5C E81D C0A8 C0C6 07FC8 07FE6 7530+ MVCIN T168V1,T168V2 007F62 E81D C0A8 C0C6 07FC8 07FE6 7531+ MVCIN T168V1,T168V2 007F68 E81D C0A8 C0C6 07FC8 07FE6 7532+ MVCIN T168V1,T168V2 007F6E E81D C0A8 C0C6 07FC8 07FE6 7533+ MVCIN T168V1,T168V2 007F74 E81D C0A8 C0C6 07FC8 07FE6 7534+ MVCIN T168V1,T168V2 007F7A E81D C0A8 C0C6 07FC8 07FE6 7535+ MVCIN T168V1,T168V2 007F80 E81D C0A8 C0C6 07FC8 07FE6 7536+ MVCIN T168V1,T168V2 007F86 E81D C0A8 C0C6 07FC8 07FE6 7537+ MVCIN T168V1,T168V2 007F8C E81D C0A8 C0C6 07FC8 07FE6 7538+ MVCIN T168V1,T168V2 007F92 E81D C0A8 C0C6 07FC8 07FE6 7539+ MVCIN T168V1,T168V2 007F98 E81D C0A8 C0C6 07FC8 07FE6 7540+ MVCIN T168V1,T168V2 007F9E E81D C0A8 C0C6 07FC8 07FE6 7541+ MVCIN T168V1,T168V2 007FA4 E81D C0A8 C0C6 07FC8 07FE6 7542+ MVCIN T168V1,T168V2 007FAA E81D C0A8 C0C6 07FC8 07FE6 7543+ MVCIN T168V1,T168V2 007FB0 E81D C0A8 C0C6 07FC8 07FE6 7544+ MVCIN T168V1,T168V2 7545+* 007FB6 06FB 7546 BCTR R15,R11 7547 TSIMRET 007FB8 58F0 C0E8 08008 7548+ L R15,=A(SAVETST) R15 := current save area 007FBC 58DF 0004 00004 7549+ L R13,4(R15) get old save area back 007FC0 98EC D00C 0000C 7550+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007FC4 07FE 7551+ BR 14 RETURN 02000000 7552 * 007FC8 7553 DS 0F 007FC8 4040404040404040 7554 T168V1 DC CL30' ' 007FE6 F0F1F2F3F4F5F6F7 7555 T168V2 DC CL30'01234567899876543210ABCDEFGHIJ' 7556 TSIMEND 008008 7557+ LTORG 008008 00000458 7558 =A(SAVETST) 0800C 7559+T168TEND EQU * 7560 * 7561 * Test 169 -- MVCIN m,m (100c) ----------------------------- 7562 * 7563 TSIMBEG T169,350,20,1,C'MVCIN m,m (100c)' 7564+* 0029E4 7565+TDSCDAT CSECT 0029E8 7566+ DS 0D 7567+* 0029E8 00008010 7568+T169TDSC DC A(T169) // TENTRY 0029EC 00000174 7569+ DC A(T169TEND-T169) // TLENGTH 0029F0 0000015E 7570+ DC F'350' // TLRCNT 0029F4 00000014 7571+ DC F'20' // TIGCNT 0029F8 00000001 7572+ DC F'1' // TLTYPE 00125B 7573+TEXT CSECT 00125B E3F1F6F9 7574+SPTR0532 DC C'T169' PAGE 140 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0029FC 7575+TDSCDAT CSECT 0029FC 7576+ DS 0F 0029FC 0400125B 7577+ DC AL1(L'SPTR0532),AL3(SPTR0532) 00125F 7578+TEXT CSECT 00125F D4E5C3C9D540946B 7579+SPTR0533 DC C'MVCIN m,m (100c)' 002A00 7580+TDSCDAT CSECT 002A00 7581+ DS 0F 002A00 1000125F 7582+ DC AL1(L'SPTR0533),AL3(SPTR0533) 7583+* 004A68 7584+TDSCTBL CSECT 04A68 7585+T169TPTR EQU * 004A68 000029E8 7586+ DC A(T169TDSC) enabled test 7587+* 00800C 7588+TCODE CSECT 008010 7589+ DS 0D ensure double word alignment for test 008010 7590+T169 DS 0H 01650000 008010 90EC D00C 0000C 7591+ STM 14,12,12(13) SAVE REGISTERS 02950000 008014 18CF 7592+ LR R12,R15 base register := entry address 08010 7593+ USING T169,R12 declare code base register 008016 41B0 C01E 0802E 7594+ LA R11,T169L load loop target to R11 00801A 58F0 C170 08180 7595+ L R15,=A(SAVETST) R15 := current save area 00801E 50DF 0004 00004 7596+ ST R13,4(R15) set back pointer in current save area 008022 182D 7597+ LR R2,R13 remember callers save area 008024 18DF 7598+ LR R13,R15 setup current save area 008026 50D2 0008 00008 7599+ ST R13,8(R2) set forw pointer in callers save area 00000 7600+ USING TDSC,R1 declare TDSC base register 00802A 58F0 1008 00008 7601+ L R15,TLRCNT load local repeat count to R15 7602+* 7603 * 7604 T169L REPINS MVCIN,(T169V1,T169V2) repeat: MVCIN T169V1,T169V2 7605+* 7606+* build from sublist &ALIST a comma separated string &ARGS 7607+* 7608+* 7609+* 7610+* 7611+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7612+* this allows to transfer the repeat count from last TDSCGEN call 7613+* 7614+* 0802E 7615+T169L EQU * 7616+* 7617+* write a comment indicating what REPINS does (in case NOGEN in effect) 7618+* 7619+*,// REPINS: do 20 times: 7620+* 7621+* MNOTE requires that ' is doubled for expanded variables 7622+* thus build &MASTR as a copy of '&ARGS with ' doubled 7623+* 7624+* 7625+*,// MVCIN T169V1,T169V2 7626+* 7627+* finally generate code: &ICNT copies of &CODE &ARGS 7628+* 00802E E863 C0A8 C10C 080B8 0811C 7629+ MVCIN T169V1,T169V2 PAGE 141 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 008034 E863 C0A8 C10C 080B8 0811C 7630+ MVCIN T169V1,T169V2 00803A E863 C0A8 C10C 080B8 0811C 7631+ MVCIN T169V1,T169V2 008040 E863 C0A8 C10C 080B8 0811C 7632+ MVCIN T169V1,T169V2 008046 E863 C0A8 C10C 080B8 0811C 7633+ MVCIN T169V1,T169V2 00804C E863 C0A8 C10C 080B8 0811C 7634+ MVCIN T169V1,T169V2 008052 E863 C0A8 C10C 080B8 0811C 7635+ MVCIN T169V1,T169V2 008058 E863 C0A8 C10C 080B8 0811C 7636+ MVCIN T169V1,T169V2 00805E E863 C0A8 C10C 080B8 0811C 7637+ MVCIN T169V1,T169V2 008064 E863 C0A8 C10C 080B8 0811C 7638+ MVCIN T169V1,T169V2 00806A E863 C0A8 C10C 080B8 0811C 7639+ MVCIN T169V1,T169V2 008070 E863 C0A8 C10C 080B8 0811C 7640+ MVCIN T169V1,T169V2 008076 E863 C0A8 C10C 080B8 0811C 7641+ MVCIN T169V1,T169V2 00807C E863 C0A8 C10C 080B8 0811C 7642+ MVCIN T169V1,T169V2 008082 E863 C0A8 C10C 080B8 0811C 7643+ MVCIN T169V1,T169V2 008088 E863 C0A8 C10C 080B8 0811C 7644+ MVCIN T169V1,T169V2 00808E E863 C0A8 C10C 080B8 0811C 7645+ MVCIN T169V1,T169V2 008094 E863 C0A8 C10C 080B8 0811C 7646+ MVCIN T169V1,T169V2 00809A E863 C0A8 C10C 080B8 0811C 7647+ MVCIN T169V1,T169V2 0080A0 E863 C0A8 C10C 080B8 0811C 7648+ MVCIN T169V1,T169V2 7649+* 0080A6 06FB 7650 BCTR R15,R11 7651 TSIMRET 0080A8 58F0 C170 08180 7652+ L R15,=A(SAVETST) R15 := current save area 0080AC 58DF 0004 00004 7653+ L R13,4(R15) get old save area back 0080B0 98EC D00C 0000C 7654+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0080B4 07FE 7655+ BR 14 RETURN 02000000 7656 * 0080B8 7657 DS 0F 0080B8 4040404040404040 7658 T169V1 DC CL100' ' 00811C F0F1F2F3F4F5F6F7 7659 T169V2 DC CL100'0123456789' 7660 TSIMEND 008180 7661+ LTORG 008180 00000458 7662 =A(SAVETST) 08184 7663+T169TEND EQU * 7664 * 7665 * Test 17x -- MVCL ========================================= 7666 * 7667 * Test 170 -- MVCL m,m (10b,copy) -------------------------- 7668 * 7669 TSIMBEG T170,13000,10,1,C'4*Lx;MVCL (10b)' 7670+* 002A04 7671+TDSCDAT CSECT 002A08 7672+ DS 0D 7673+* 002A08 00008188 7674+T170TDSC DC A(T170) // TENTRY 002A0C 000000DC 7675+ DC A(T170TEND-T170) // TLENGTH 002A10 000032C8 7676+ DC F'13000' // TLRCNT 002A14 0000000A 7677+ DC F'10' // TIGCNT 002A18 00000001 7678+ DC F'1' // TLTYPE 00126F 7679+TEXT CSECT 00126F E3F1F7F0 7680+SPTR0544 DC C'T170' 002A1C 7681+TDSCDAT CSECT 002A1C 7682+ DS 0F 002A1C 0400126F 7683+ DC AL1(L'SPTR0544),AL3(SPTR0544) 001273 7684+TEXT CSECT PAGE 142 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 001273 F45CD3A75ED4E5C3 7685+SPTR0545 DC C'4*Lx;MVCL (10b)' 002A20 7686+TDSCDAT CSECT 002A20 7687+ DS 0F 002A20 0F001273 7688+ DC AL1(L'SPTR0545),AL3(SPTR0545) 7689+* 004A6C 7690+TDSCTBL CSECT 04A6C 7691+T170TPTR EQU * 004A6C 00002A08 7692+ DC A(T170TDSC) enabled test 7693+* 008184 7694+TCODE CSECT 008188 7695+ DS 0D ensure double word alignment for test 008188 7696+T170 DS 0H 01650000 008188 90EC D00C 0000C 7697+ STM 14,12,12(13) SAVE REGISTERS 02950000 00818C 18CF 7698+ LR R12,R15 base register := entry address 08188 7699+ USING T170,R12 declare code base register 00818E 41B0 C02E 081B6 7700+ LA R11,T170L load loop target to R11 008192 58F0 C0D0 08258 7701+ L R15,=A(SAVETST) R15 := current save area 008196 50DF 0004 00004 7702+ ST R13,4(R15) set back pointer in current save area 00819A 182D 7703+ LR R2,R13 remember callers save area 00819C 18DF 7704+ LR R13,R15 setup current save area 00819E 50D2 0008 00008 7705+ ST R13,8(R2) set forw pointer in callers save area 00000 7706+ USING TDSC,R1 declare TDSC base register 0081A2 58F0 1008 00008 7707+ L R15,TLRCNT load local repeat count to R15 7708+* 7709 * 7710 * use sequence 7711 * LR R2,R6 dest addr 7712 * LA R3,10 dest length 7713 * LR R4,R8 source addr 7714 * LA R5,10 source length 7715 * MVCL R2,R4 doit 7716 * 0081A6 5860 C0D4 0825C 7717 L R6,=A(PBUF4K1) get ptr to ptr 0081AA 5866 0000 00000 7718 L R6,0(R6) get ptr to BUF4K1 0081AE 5880 C0D8 08260 7719 L R8,=A(PBUF4K2) get ptr to ptr 0081B2 5888 0000 00000 7720 L R8,0(R8) get ptr to BUF4K2 7721 T170L REPINSN LR,(R2,R6),LA,(R3,10), X LR,(R4,R8),LA,(R5,10), X MVCL,(R2,R4) 7722+* 7723+* build from sublist &ALIST* a comma separated string &ARGS* 7724+* 7725+* 7726+* 7727+* 7728+* 7729+* 7730+* 7731+* 7732+* 7733+* 7734+* 7735+* 081B6 7736+T170L EQU * 7737+* PAGE 143 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 7738+* 7739+* write a comment indicating what REPINSN does (if NOGEN in effect) 7740+* 7741+*,// REPINSN: do 10 times: 7742+* 7743+* MNOTE requires that ' is doubled for expanded variables 7744+* thus build &MASTR as a copy of '&ARGS with ' doubled 7745+* 7746+* 7747+*,// LR R2,R6 7748+* 7749+* MNOTE requires that ' is doubled for expanded variables 7750+* thus build &MASTR as a copy of '&ARGS with ' doubled 7751+* 7752+* 7753+*,// LA R3,10 7754+* 7755+* MNOTE requires that ' is doubled for expanded variables 7756+* thus build &MASTR as a copy of '&ARGS with ' doubled 7757+* 7758+* 7759+*,// LR R4,R8 7760+* 7761+* MNOTE requires that ' is doubled for expanded variables 7762+* thus build &MASTR as a copy of '&ARGS with ' doubled 7763+* 7764+* 7765+*,// LA R5,10 7766+* 7767+* MNOTE requires that ' is doubled for expanded variables 7768+* thus build &MASTR as a copy of '&ARGS with ' doubled 7769+* 7770+* 7771+*,// MVCL R2,R4 7772+* 7773+* finally generate code: &ICNT copies of &CO1 ... 7774+* 0081B6 1826 7775+ LR R2,R6 0081B8 4130 000A 0000A 7776+ LA R3,10 0081BC 1848 7777+ LR R4,R8 0081BE 4150 000A 0000A 7778+ LA R5,10 0081C2 0E24 7779+ MVCL R2,R4 0081C4 1826 7780+ LR R2,R6 0081C6 4130 000A 0000A 7781+ LA R3,10 0081CA 1848 7782+ LR R4,R8 0081CC 4150 000A 0000A 7783+ LA R5,10 0081D0 0E24 7784+ MVCL R2,R4 0081D2 1826 7785+ LR R2,R6 0081D4 4130 000A 0000A 7786+ LA R3,10 0081D8 1848 7787+ LR R4,R8 0081DA 4150 000A 0000A 7788+ LA R5,10 0081DE 0E24 7789+ MVCL R2,R4 0081E0 1826 7790+ LR R2,R6 0081E2 4130 000A 0000A 7791+ LA R3,10 0081E6 1848 7792+ LR R4,R8 PAGE 144 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0081E8 4150 000A 0000A 7793+ LA R5,10 0081EC 0E24 7794+ MVCL R2,R4 0081EE 1826 7795+ LR R2,R6 0081F0 4130 000A 0000A 7796+ LA R3,10 0081F4 1848 7797+ LR R4,R8 0081F6 4150 000A 0000A 7798+ LA R5,10 0081FA 0E24 7799+ MVCL R2,R4 0081FC 1826 7800+ LR R2,R6 0081FE 4130 000A 0000A 7801+ LA R3,10 008202 1848 7802+ LR R4,R8 008204 4150 000A 0000A 7803+ LA R5,10 008208 0E24 7804+ MVCL R2,R4 00820A 1826 7805+ LR R2,R6 00820C 4130 000A 0000A 7806+ LA R3,10 008210 1848 7807+ LR R4,R8 008212 4150 000A 0000A 7808+ LA R5,10 008216 0E24 7809+ MVCL R2,R4 008218 1826 7810+ LR R2,R6 00821A 4130 000A 0000A 7811+ LA R3,10 00821E 1848 7812+ LR R4,R8 008220 4150 000A 0000A 7813+ LA R5,10 008224 0E24 7814+ MVCL R2,R4 008226 1826 7815+ LR R2,R6 008228 4130 000A 0000A 7816+ LA R3,10 00822C 1848 7817+ LR R4,R8 00822E 4150 000A 0000A 7818+ LA R5,10 008232 0E24 7819+ MVCL R2,R4 008234 1826 7820+ LR R2,R6 008236 4130 000A 0000A 7821+ LA R3,10 00823A 1848 7822+ LR R4,R8 00823C 4150 000A 0000A 7823+ LA R5,10 008240 0E24 7824+ MVCL R2,R4 7825+* 008242 06FB 7826 BCTR R15,R11 7827 TSIMRET 008244 58F0 C0D0 08258 7828+ L R15,=A(SAVETST) R15 := current save area 008248 58DF 0004 00004 7829+ L R13,4(R15) get old save area back 00824C 98EC D00C 0000C 7830+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008250 07FE 7831+ BR 14 RETURN 02000000 7832 TSIMEND 008258 7833+ LTORG 008258 00000458 7834 =A(SAVETST) 00825C 000004B4 7835 =A(PBUF4K1) 008260 000004B8 7836 =A(PBUF4K2) 08264 7837+T170TEND EQU * 7838 * 7839 * Test 171 -- MVCL m,m (100b,copy) ------------------------- 7840 * 7841 TSIMBEG T171,11000,10,1,C'4*Lx;MVCL (100b)' 7842+* 002A24 7843+TDSCDAT CSECT 002A28 7844+ DS 0D 7845+* 002A28 00008268 7846+T171TDSC DC A(T171) // TENTRY 002A2C 000000DC 7847+ DC A(T171TEND-T171) // TLENGTH PAGE 145 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002A30 00002AF8 7848+ DC F'11000' // TLRCNT 002A34 0000000A 7849+ DC F'10' // TIGCNT 002A38 00000001 7850+ DC F'1' // TLTYPE 001282 7851+TEXT CSECT 001282 E3F1F7F1 7852+SPTR0564 DC C'T171' 002A3C 7853+TDSCDAT CSECT 002A3C 7854+ DS 0F 002A3C 04001282 7855+ DC AL1(L'SPTR0564),AL3(SPTR0564) 001286 7856+TEXT CSECT 001286 F45CD3A75ED4E5C3 7857+SPTR0565 DC C'4*Lx;MVCL (100b)' 002A40 7858+TDSCDAT CSECT 002A40 7859+ DS 0F 002A40 10001286 7860+ DC AL1(L'SPTR0565),AL3(SPTR0565) 7861+* 004A70 7862+TDSCTBL CSECT 04A70 7863+T171TPTR EQU * 004A70 00002A28 7864+ DC A(T171TDSC) enabled test 7865+* 008264 7866+TCODE CSECT 008268 7867+ DS 0D ensure double word alignment for test 008268 7868+T171 DS 0H 01650000 008268 90EC D00C 0000C 7869+ STM 14,12,12(13) SAVE REGISTERS 02950000 00826C 18CF 7870+ LR R12,R15 base register := entry address 08268 7871+ USING T171,R12 declare code base register 00826E 41B0 C02E 08296 7872+ LA R11,T171L load loop target to R11 008272 58F0 C0D0 08338 7873+ L R15,=A(SAVETST) R15 := current save area 008276 50DF 0004 00004 7874+ ST R13,4(R15) set back pointer in current save area 00827A 182D 7875+ LR R2,R13 remember callers save area 00827C 18DF 7876+ LR R13,R15 setup current save area 00827E 50D2 0008 00008 7877+ ST R13,8(R2) set forw pointer in callers save area 00000 7878+ USING TDSC,R1 declare TDSC base register 008282 58F0 1008 00008 7879+ L R15,TLRCNT load local repeat count to R15 7880+* 7881 * 7882 * use sequence 7883 * LR R2,R6 dest addr 7884 * LA R3,100 dest length 7885 * LR R4,R8 source addr 7886 * LA R5,100 source length 7887 * MVCL R2,R4 doit 7888 * 008286 5860 C0D4 0833C 7889 L R6,=A(PBUF4K1) get ptr to ptr 00828A 5866 0000 00000 7890 L R6,0(R6) get ptr to BUF4K1 00828E 5880 C0D8 08340 7891 L R8,=A(PBUF4K2) get ptr to ptr 008292 5888 0000 00000 7892 L R8,0(R8) get ptr to BUF4K2 7893 T171L REPINSN LR,(R2,R6),LA,(R3,100), X LR,(R4,R8),LA,(R5,100), X MVCL,(R2,R4) 7894+* 7895+* build from sublist &ALIST* a comma separated string &ARGS* 7896+* 7897+* 7898+* 7899+* 7900+* PAGE 146 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 7901+* 7902+* 7903+* 7904+* 7905+* 7906+* 7907+* 08296 7908+T171L EQU * 7909+* 7910+* 7911+* write a comment indicating what REPINSN does (if NOGEN in effect) 7912+* 7913+*,// REPINSN: do 10 times: 7914+* 7915+* MNOTE requires that ' is doubled for expanded variables 7916+* thus build &MASTR as a copy of '&ARGS with ' doubled 7917+* 7918+* 7919+*,// LR R2,R6 7920+* 7921+* MNOTE requires that ' is doubled for expanded variables 7922+* thus build &MASTR as a copy of '&ARGS with ' doubled 7923+* 7924+* 7925+*,// LA R3,100 7926+* 7927+* MNOTE requires that ' is doubled for expanded variables 7928+* thus build &MASTR as a copy of '&ARGS with ' doubled 7929+* 7930+* 7931+*,// LR R4,R8 7932+* 7933+* MNOTE requires that ' is doubled for expanded variables 7934+* thus build &MASTR as a copy of '&ARGS with ' doubled 7935+* 7936+* 7937+*,// LA R5,100 7938+* 7939+* MNOTE requires that ' is doubled for expanded variables 7940+* thus build &MASTR as a copy of '&ARGS with ' doubled 7941+* 7942+* 7943+*,// MVCL R2,R4 7944+* 7945+* finally generate code: &ICNT copies of &CO1 ... 7946+* 008296 1826 7947+ LR R2,R6 008298 4130 0064 00064 7948+ LA R3,100 00829C 1848 7949+ LR R4,R8 00829E 4150 0064 00064 7950+ LA R5,100 0082A2 0E24 7951+ MVCL R2,R4 0082A4 1826 7952+ LR R2,R6 0082A6 4130 0064 00064 7953+ LA R3,100 0082AA 1848 7954+ LR R4,R8 0082AC 4150 0064 00064 7955+ LA R5,100 PAGE 147 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0082B0 0E24 7956+ MVCL R2,R4 0082B2 1826 7957+ LR R2,R6 0082B4 4130 0064 00064 7958+ LA R3,100 0082B8 1848 7959+ LR R4,R8 0082BA 4150 0064 00064 7960+ LA R5,100 0082BE 0E24 7961+ MVCL R2,R4 0082C0 1826 7962+ LR R2,R6 0082C2 4130 0064 00064 7963+ LA R3,100 0082C6 1848 7964+ LR R4,R8 0082C8 4150 0064 00064 7965+ LA R5,100 0082CC 0E24 7966+ MVCL R2,R4 0082CE 1826 7967+ LR R2,R6 0082D0 4130 0064 00064 7968+ LA R3,100 0082D4 1848 7969+ LR R4,R8 0082D6 4150 0064 00064 7970+ LA R5,100 0082DA 0E24 7971+ MVCL R2,R4 0082DC 1826 7972+ LR R2,R6 0082DE 4130 0064 00064 7973+ LA R3,100 0082E2 1848 7974+ LR R4,R8 0082E4 4150 0064 00064 7975+ LA R5,100 0082E8 0E24 7976+ MVCL R2,R4 0082EA 1826 7977+ LR R2,R6 0082EC 4130 0064 00064 7978+ LA R3,100 0082F0 1848 7979+ LR R4,R8 0082F2 4150 0064 00064 7980+ LA R5,100 0082F6 0E24 7981+ MVCL R2,R4 0082F8 1826 7982+ LR R2,R6 0082FA 4130 0064 00064 7983+ LA R3,100 0082FE 1848 7984+ LR R4,R8 008300 4150 0064 00064 7985+ LA R5,100 008304 0E24 7986+ MVCL R2,R4 008306 1826 7987+ LR R2,R6 008308 4130 0064 00064 7988+ LA R3,100 00830C 1848 7989+ LR R4,R8 00830E 4150 0064 00064 7990+ LA R5,100 008312 0E24 7991+ MVCL R2,R4 008314 1826 7992+ LR R2,R6 008316 4130 0064 00064 7993+ LA R3,100 00831A 1848 7994+ LR R4,R8 00831C 4150 0064 00064 7995+ LA R5,100 008320 0E24 7996+ MVCL R2,R4 7997+* 008322 06FB 7998 BCTR R15,R11 7999 TSIMRET 008324 58F0 C0D0 08338 8000+ L R15,=A(SAVETST) R15 := current save area 008328 58DF 0004 00004 8001+ L R13,4(R15) get old save area back 00832C 98EC D00C 0000C 8002+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008330 07FE 8003+ BR 14 RETURN 02000000 8004 TSIMEND 008338 8005+ LTORG 008338 00000458 8006 =A(SAVETST) 00833C 000004B4 8007 =A(PBUF4K1) 008340 000004B8 8008 =A(PBUF4K2) 08344 8009+T171TEND EQU * 8010 * PAGE 148 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 8011 * Test 172 -- MVCL m,m (250b,copy) ------------------------- 8012 * 8013 TSIMBEG T172,9000,10,1,C'4*Lx;MVCL (250b)' 8014+* 002A44 8015+TDSCDAT CSECT 002A48 8016+ DS 0D 8017+* 002A48 00008348 8018+T172TDSC DC A(T172) // TENTRY 002A4C 000000DC 8019+ DC A(T172TEND-T172) // TLENGTH 002A50 00002328 8020+ DC F'9000' // TLRCNT 002A54 0000000A 8021+ DC F'10' // TIGCNT 002A58 00000001 8022+ DC F'1' // TLTYPE 001296 8023+TEXT CSECT 001296 E3F1F7F2 8024+SPTR0584 DC C'T172' 002A5C 8025+TDSCDAT CSECT 002A5C 8026+ DS 0F 002A5C 04001296 8027+ DC AL1(L'SPTR0584),AL3(SPTR0584) 00129A 8028+TEXT CSECT 00129A F45CD3A75ED4E5C3 8029+SPTR0585 DC C'4*Lx;MVCL (250b)' 002A60 8030+TDSCDAT CSECT 002A60 8031+ DS 0F 002A60 1000129A 8032+ DC AL1(L'SPTR0585),AL3(SPTR0585) 8033+* 004A74 8034+TDSCTBL CSECT 04A74 8035+T172TPTR EQU * 004A74 00002A48 8036+ DC A(T172TDSC) enabled test 8037+* 008344 8038+TCODE CSECT 008348 8039+ DS 0D ensure double word alignment for test 008348 8040+T172 DS 0H 01650000 008348 90EC D00C 0000C 8041+ STM 14,12,12(13) SAVE REGISTERS 02950000 00834C 18CF 8042+ LR R12,R15 base register := entry address 08348 8043+ USING T172,R12 declare code base register 00834E 41B0 C02E 08376 8044+ LA R11,T172L load loop target to R11 008352 58F0 C0D0 08418 8045+ L R15,=A(SAVETST) R15 := current save area 008356 50DF 0004 00004 8046+ ST R13,4(R15) set back pointer in current save area 00835A 182D 8047+ LR R2,R13 remember callers save area 00835C 18DF 8048+ LR R13,R15 setup current save area 00835E 50D2 0008 00008 8049+ ST R13,8(R2) set forw pointer in callers save area 00000 8050+ USING TDSC,R1 declare TDSC base register 008362 58F0 1008 00008 8051+ L R15,TLRCNT load local repeat count to R15 8052+* 8053 * 8054 * use sequence 8055 * LR R2,R6 dest addr 8056 * LA R3,250 dest length 8057 * LR R4,R8 source addr 8058 * LA R5,250 source length 8059 * MVCL R2,R4 doit 8060 * 008366 5860 C0D4 0841C 8061 L R6,=A(PBUF4K1) get ptr to ptr 00836A 5866 0000 00000 8062 L R6,0(R6) get ptr to BUF4K1 00836E 5880 C0D8 08420 8063 L R8,=A(PBUF4K2) get ptr to ptr 008372 5888 0000 00000 8064 L R8,0(R8) get ptr to BUF4K2 8065 T172L REPINSN LR,(R2,R6),LA,(R3,250), X PAGE 149 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 LR,(R4,R8),LA,(R5,250), X MVCL,(R2,R4) 8066+* 8067+* build from sublist &ALIST* a comma separated string &ARGS* 8068+* 8069+* 8070+* 8071+* 8072+* 8073+* 8074+* 8075+* 8076+* 8077+* 8078+* 8079+* 08376 8080+T172L EQU * 8081+* 8082+* 8083+* write a comment indicating what REPINSN does (if NOGEN in effect) 8084+* 8085+*,// REPINSN: do 10 times: 8086+* 8087+* MNOTE requires that ' is doubled for expanded variables 8088+* thus build &MASTR as a copy of '&ARGS with ' doubled 8089+* 8090+* 8091+*,// LR R2,R6 8092+* 8093+* MNOTE requires that ' is doubled for expanded variables 8094+* thus build &MASTR as a copy of '&ARGS with ' doubled 8095+* 8096+* 8097+*,// LA R3,250 8098+* 8099+* MNOTE requires that ' is doubled for expanded variables 8100+* thus build &MASTR as a copy of '&ARGS with ' doubled 8101+* 8102+* 8103+*,// LR R4,R8 8104+* 8105+* MNOTE requires that ' is doubled for expanded variables 8106+* thus build &MASTR as a copy of '&ARGS with ' doubled 8107+* 8108+* 8109+*,// LA R5,250 8110+* 8111+* MNOTE requires that ' is doubled for expanded variables 8112+* thus build &MASTR as a copy of '&ARGS with ' doubled 8113+* 8114+* 8115+*,// MVCL R2,R4 8116+* 8117+* finally generate code: &ICNT copies of &CO1 ... 8118+* PAGE 150 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 008376 1826 8119+ LR R2,R6 008378 4130 00FA 000FA 8120+ LA R3,250 00837C 1848 8121+ LR R4,R8 00837E 4150 00FA 000FA 8122+ LA R5,250 008382 0E24 8123+ MVCL R2,R4 008384 1826 8124+ LR R2,R6 008386 4130 00FA 000FA 8125+ LA R3,250 00838A 1848 8126+ LR R4,R8 00838C 4150 00FA 000FA 8127+ LA R5,250 008390 0E24 8128+ MVCL R2,R4 008392 1826 8129+ LR R2,R6 008394 4130 00FA 000FA 8130+ LA R3,250 008398 1848 8131+ LR R4,R8 00839A 4150 00FA 000FA 8132+ LA R5,250 00839E 0E24 8133+ MVCL R2,R4 0083A0 1826 8134+ LR R2,R6 0083A2 4130 00FA 000FA 8135+ LA R3,250 0083A6 1848 8136+ LR R4,R8 0083A8 4150 00FA 000FA 8137+ LA R5,250 0083AC 0E24 8138+ MVCL R2,R4 0083AE 1826 8139+ LR R2,R6 0083B0 4130 00FA 000FA 8140+ LA R3,250 0083B4 1848 8141+ LR R4,R8 0083B6 4150 00FA 000FA 8142+ LA R5,250 0083BA 0E24 8143+ MVCL R2,R4 0083BC 1826 8144+ LR R2,R6 0083BE 4130 00FA 000FA 8145+ LA R3,250 0083C2 1848 8146+ LR R4,R8 0083C4 4150 00FA 000FA 8147+ LA R5,250 0083C8 0E24 8148+ MVCL R2,R4 0083CA 1826 8149+ LR R2,R6 0083CC 4130 00FA 000FA 8150+ LA R3,250 0083D0 1848 8151+ LR R4,R8 0083D2 4150 00FA 000FA 8152+ LA R5,250 0083D6 0E24 8153+ MVCL R2,R4 0083D8 1826 8154+ LR R2,R6 0083DA 4130 00FA 000FA 8155+ LA R3,250 0083DE 1848 8156+ LR R4,R8 0083E0 4150 00FA 000FA 8157+ LA R5,250 0083E4 0E24 8158+ MVCL R2,R4 0083E6 1826 8159+ LR R2,R6 0083E8 4130 00FA 000FA 8160+ LA R3,250 0083EC 1848 8161+ LR R4,R8 0083EE 4150 00FA 000FA 8162+ LA R5,250 0083F2 0E24 8163+ MVCL R2,R4 0083F4 1826 8164+ LR R2,R6 0083F6 4130 00FA 000FA 8165+ LA R3,250 0083FA 1848 8166+ LR R4,R8 0083FC 4150 00FA 000FA 8167+ LA R5,250 008400 0E24 8168+ MVCL R2,R4 8169+* 008402 06FB 8170 BCTR R15,R11 8171 TSIMRET 008404 58F0 C0D0 08418 8172+ L R15,=A(SAVETST) R15 := current save area 008408 58DF 0004 00004 8173+ L R13,4(R15) get old save area back PAGE 151 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00840C 98EC D00C 0000C 8174+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008410 07FE 8175+ BR 14 RETURN 02000000 8176 TSIMEND 008418 8177+ LTORG 008418 00000458 8178 =A(SAVETST) 00841C 000004B4 8179 =A(PBUF4K1) 008420 000004B8 8180 =A(PBUF4K2) 08424 8181+T172TEND EQU * 8182 * 8183 * Test 173 -- MVCL m,m (1kb,copy) -------------------------- 8184 * 8185 TSIMBEG T173,4500,10,1,C'4*Lx;MVCL (1kb)' 8186+* 002A64 8187+TDSCDAT CSECT 002A68 8188+ DS 0D 8189+* 002A68 00008428 8190+T173TDSC DC A(T173) // TENTRY 002A6C 000000DC 8191+ DC A(T173TEND-T173) // TLENGTH 002A70 00001194 8192+ DC F'4500' // TLRCNT 002A74 0000000A 8193+ DC F'10' // TIGCNT 002A78 00000001 8194+ DC F'1' // TLTYPE 0012AA 8195+TEXT CSECT 0012AA E3F1F7F3 8196+SPTR0604 DC C'T173' 002A7C 8197+TDSCDAT CSECT 002A7C 8198+ DS 0F 002A7C 040012AA 8199+ DC AL1(L'SPTR0604),AL3(SPTR0604) 0012AE 8200+TEXT CSECT 0012AE F45CD3A75ED4E5C3 8201+SPTR0605 DC C'4*Lx;MVCL (1kb)' 002A80 8202+TDSCDAT CSECT 002A80 8203+ DS 0F 002A80 0F0012AE 8204+ DC AL1(L'SPTR0605),AL3(SPTR0605) 8205+* 004A78 8206+TDSCTBL CSECT 04A78 8207+T173TPTR EQU * 004A78 00002A68 8208+ DC A(T173TDSC) enabled test 8209+* 008424 8210+TCODE CSECT 008428 8211+ DS 0D ensure double word alignment for test 008428 8212+T173 DS 0H 01650000 008428 90EC D00C 0000C 8213+ STM 14,12,12(13) SAVE REGISTERS 02950000 00842C 18CF 8214+ LR R12,R15 base register := entry address 08428 8215+ USING T173,R12 declare code base register 00842E 41B0 C02E 08456 8216+ LA R11,T173L load loop target to R11 008432 58F0 C0D0 084F8 8217+ L R15,=A(SAVETST) R15 := current save area 008436 50DF 0004 00004 8218+ ST R13,4(R15) set back pointer in current save area 00843A 182D 8219+ LR R2,R13 remember callers save area 00843C 18DF 8220+ LR R13,R15 setup current save area 00843E 50D2 0008 00008 8221+ ST R13,8(R2) set forw pointer in callers save area 00000 8222+ USING TDSC,R1 declare TDSC base register 008442 58F0 1008 00008 8223+ L R15,TLRCNT load local repeat count to R15 8224+* 8225 * 8226 * use sequence 8227 * LR R2,R6 dest addr 8228 * LA R3,1024 dest length PAGE 152 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 8229 * LR R4,R8 source addr 8230 * LA R5,1024 source length 8231 * MVCL R2,R4 doit 8232 * 008446 5860 C0D4 084FC 8233 L R6,=A(PBUF4K1) get ptr to ptr 00844A 5866 0000 00000 8234 L R6,0(R6) get ptr to BUF4K1 00844E 5880 C0D8 08500 8235 L R8,=A(PBUF4K2) get ptr to ptr 008452 5888 0000 00000 8236 L R8,0(R8) get ptr to BUF4K2 8237 T173L REPINSN LR,(R2,R6),LA,(R3,1024), X LR,(R4,R8),LA,(R5,1024), X MVCL,(R2,R4) 8238+* 8239+* build from sublist &ALIST* a comma separated string &ARGS* 8240+* 8241+* 8242+* 8243+* 8244+* 8245+* 8246+* 8247+* 8248+* 8249+* 8250+* 8251+* 08456 8252+T173L EQU * 8253+* 8254+* 8255+* write a comment indicating what REPINSN does (if NOGEN in effect) 8256+* 8257+*,// REPINSN: do 10 times: 8258+* 8259+* MNOTE requires that ' is doubled for expanded variables 8260+* thus build &MASTR as a copy of '&ARGS with ' doubled 8261+* 8262+* 8263+*,// LR R2,R6 8264+* 8265+* MNOTE requires that ' is doubled for expanded variables 8266+* thus build &MASTR as a copy of '&ARGS with ' doubled 8267+* 8268+* 8269+*,// LA R3,1024 8270+* 8271+* MNOTE requires that ' is doubled for expanded variables 8272+* thus build &MASTR as a copy of '&ARGS with ' doubled 8273+* 8274+* 8275+*,// LR R4,R8 8276+* 8277+* MNOTE requires that ' is doubled for expanded variables 8278+* thus build &MASTR as a copy of '&ARGS with ' doubled 8279+* 8280+* 8281+*,// LA R5,1024 PAGE 153 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 8282+* 8283+* MNOTE requires that ' is doubled for expanded variables 8284+* thus build &MASTR as a copy of '&ARGS with ' doubled 8285+* 8286+* 8287+*,// MVCL R2,R4 8288+* 8289+* finally generate code: &ICNT copies of &CO1 ... 8290+* 008456 1826 8291+ LR R2,R6 008458 4130 0400 00400 8292+ LA R3,1024 00845C 1848 8293+ LR R4,R8 00845E 4150 0400 00400 8294+ LA R5,1024 008462 0E24 8295+ MVCL R2,R4 008464 1826 8296+ LR R2,R6 008466 4130 0400 00400 8297+ LA R3,1024 00846A 1848 8298+ LR R4,R8 00846C 4150 0400 00400 8299+ LA R5,1024 008470 0E24 8300+ MVCL R2,R4 008472 1826 8301+ LR R2,R6 008474 4130 0400 00400 8302+ LA R3,1024 008478 1848 8303+ LR R4,R8 00847A 4150 0400 00400 8304+ LA R5,1024 00847E 0E24 8305+ MVCL R2,R4 008480 1826 8306+ LR R2,R6 008482 4130 0400 00400 8307+ LA R3,1024 008486 1848 8308+ LR R4,R8 008488 4150 0400 00400 8309+ LA R5,1024 00848C 0E24 8310+ MVCL R2,R4 00848E 1826 8311+ LR R2,R6 008490 4130 0400 00400 8312+ LA R3,1024 008494 1848 8313+ LR R4,R8 008496 4150 0400 00400 8314+ LA R5,1024 00849A 0E24 8315+ MVCL R2,R4 00849C 1826 8316+ LR R2,R6 00849E 4130 0400 00400 8317+ LA R3,1024 0084A2 1848 8318+ LR R4,R8 0084A4 4150 0400 00400 8319+ LA R5,1024 0084A8 0E24 8320+ MVCL R2,R4 0084AA 1826 8321+ LR R2,R6 0084AC 4130 0400 00400 8322+ LA R3,1024 0084B0 1848 8323+ LR R4,R8 0084B2 4150 0400 00400 8324+ LA R5,1024 0084B6 0E24 8325+ MVCL R2,R4 0084B8 1826 8326+ LR R2,R6 0084BA 4130 0400 00400 8327+ LA R3,1024 0084BE 1848 8328+ LR R4,R8 0084C0 4150 0400 00400 8329+ LA R5,1024 0084C4 0E24 8330+ MVCL R2,R4 0084C6 1826 8331+ LR R2,R6 0084C8 4130 0400 00400 8332+ LA R3,1024 0084CC 1848 8333+ LR R4,R8 0084CE 4150 0400 00400 8334+ LA R5,1024 0084D2 0E24 8335+ MVCL R2,R4 0084D4 1826 8336+ LR R2,R6 PAGE 154 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0084D6 4130 0400 00400 8337+ LA R3,1024 0084DA 1848 8338+ LR R4,R8 0084DC 4150 0400 00400 8339+ LA R5,1024 0084E0 0E24 8340+ MVCL R2,R4 8341+* 0084E2 06FB 8342 BCTR R15,R11 8343 TSIMRET 0084E4 58F0 C0D0 084F8 8344+ L R15,=A(SAVETST) R15 := current save area 0084E8 58DF 0004 00004 8345+ L R13,4(R15) get old save area back 0084EC 98EC D00C 0000C 8346+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0084F0 07FE 8347+ BR 14 RETURN 02000000 8348 TSIMEND 0084F8 8349+ LTORG 0084F8 00000458 8350 =A(SAVETST) 0084FC 000004B4 8351 =A(PBUF4K1) 008500 000004B8 8352 =A(PBUF4K2) 08504 8353+T173TEND EQU * 8354 * 8355 * Test 174 -- MVCL m,m (4kb,copy) -------------------------- 8356 * 8357 TSIMBEG T174,1400,10,1,C'4*LR;MVCL (4kb)' 8358+* 002A84 8359+TDSCDAT CSECT 002A88 8360+ DS 0D 8361+* 002A88 00008508 8362+T174TDSC DC A(T174) // TENTRY 002A8C 000000B8 8363+ DC A(T174TEND-T174) // TLENGTH 002A90 00000578 8364+ DC F'1400' // TLRCNT 002A94 0000000A 8365+ DC F'10' // TIGCNT 002A98 00000001 8366+ DC F'1' // TLTYPE 0012BD 8367+TEXT CSECT 0012BD E3F1F7F4 8368+SPTR0624 DC C'T174' 002A9C 8369+TDSCDAT CSECT 002A9C 8370+ DS 0F 002A9C 040012BD 8371+ DC AL1(L'SPTR0624),AL3(SPTR0624) 0012C1 8372+TEXT CSECT 0012C1 F45CD3D95ED4E5C3 8373+SPTR0625 DC C'4*LR;MVCL (4kb)' 002AA0 8374+TDSCDAT CSECT 002AA0 8375+ DS 0F 002AA0 0F0012C1 8376+ DC AL1(L'SPTR0625),AL3(SPTR0625) 8377+* 004A7C 8378+TDSCTBL CSECT 04A7C 8379+T174TPTR EQU * 004A7C 00002A88 8380+ DC A(T174TDSC) enabled test 8381+* 008504 8382+TCODE CSECT 008508 8383+ DS 0D ensure double word alignment for test 008508 8384+T174 DS 0H 01650000 008508 90EC D00C 0000C 8385+ STM 14,12,12(13) SAVE REGISTERS 02950000 00850C 18CF 8386+ LR R12,R15 base register := entry address 08508 8387+ USING T174,R12 declare code base register 00850E 41B0 C032 0853A 8388+ LA R11,T174L load loop target to R11 008512 58F0 C0A8 085B0 8389+ L R15,=A(SAVETST) R15 := current save area 008516 50DF 0004 00004 8390+ ST R13,4(R15) set back pointer in current save area 00851A 182D 8391+ LR R2,R13 remember callers save area PAGE 155 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00851C 18DF 8392+ LR R13,R15 setup current save area 00851E 50D2 0008 00008 8393+ ST R13,8(R2) set forw pointer in callers save area 00000 8394+ USING TDSC,R1 declare TDSC base register 008522 58F0 1008 00008 8395+ L R15,TLRCNT load local repeat count to R15 8396+* 8397 * 8398 * use sequence 8399 * LR R2,R6 dest addr 8400 * LR R3,R7 dest length 8401 * LR R4,R8 source addr 8402 * LR R5,R7 source length 8403 * MVCL R2,R4 doit 8404 * 008526 5860 C0AC 085B4 8405 L R6,=A(PBUF4K1) get ptr to ptr 00852A 5866 0000 00000 8406 L R6,0(R6) get ptr to BUF4K1 00852E 5880 C0B0 085B8 8407 L R8,=A(PBUF4K2) get ptr to ptr 008532 5888 0000 00000 8408 L R8,0(R8) get ptr to BUF4K2 008536 5870 C0B4 085BC 8409 L R7,=F'4096' transfer length 8410 T174L REPINSN LR,(R2,R6),LR,(R3,R7), X LR,(R4,R8),LR,(R5,R7), X MVCL,(R2,R4) 8411+* 8412+* build from sublist &ALIST* a comma separated string &ARGS* 8413+* 8414+* 8415+* 8416+* 8417+* 8418+* 8419+* 8420+* 8421+* 8422+* 8423+* 8424+* 0853A 8425+T174L EQU * 8426+* 8427+* 8428+* write a comment indicating what REPINSN does (if NOGEN in effect) 8429+* 8430+*,// REPINSN: do 10 times: 8431+* 8432+* MNOTE requires that ' is doubled for expanded variables 8433+* thus build &MASTR as a copy of '&ARGS with ' doubled 8434+* 8435+* 8436+*,// LR R2,R6 8437+* 8438+* MNOTE requires that ' is doubled for expanded variables 8439+* thus build &MASTR as a copy of '&ARGS with ' doubled 8440+* 8441+* 8442+*,// LR R3,R7 8443+* 8444+* MNOTE requires that ' is doubled for expanded variables PAGE 156 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 8445+* thus build &MASTR as a copy of '&ARGS with ' doubled 8446+* 8447+* 8448+*,// LR R4,R8 8449+* 8450+* MNOTE requires that ' is doubled for expanded variables 8451+* thus build &MASTR as a copy of '&ARGS with ' doubled 8452+* 8453+* 8454+*,// LR R5,R7 8455+* 8456+* MNOTE requires that ' is doubled for expanded variables 8457+* thus build &MASTR as a copy of '&ARGS with ' doubled 8458+* 8459+* 8460+*,// MVCL R2,R4 8461+* 8462+* finally generate code: &ICNT copies of &CO1 ... 8463+* 00853A 1826 8464+ LR R2,R6 00853C 1837 8465+ LR R3,R7 00853E 1848 8466+ LR R4,R8 008540 1857 8467+ LR R5,R7 008542 0E24 8468+ MVCL R2,R4 008544 1826 8469+ LR R2,R6 008546 1837 8470+ LR R3,R7 008548 1848 8471+ LR R4,R8 00854A 1857 8472+ LR R5,R7 00854C 0E24 8473+ MVCL R2,R4 00854E 1826 8474+ LR R2,R6 008550 1837 8475+ LR R3,R7 008552 1848 8476+ LR R4,R8 008554 1857 8477+ LR R5,R7 008556 0E24 8478+ MVCL R2,R4 008558 1826 8479+ LR R2,R6 00855A 1837 8480+ LR R3,R7 00855C 1848 8481+ LR R4,R8 00855E 1857 8482+ LR R5,R7 008560 0E24 8483+ MVCL R2,R4 008562 1826 8484+ LR R2,R6 008564 1837 8485+ LR R3,R7 008566 1848 8486+ LR R4,R8 008568 1857 8487+ LR R5,R7 00856A 0E24 8488+ MVCL R2,R4 00856C 1826 8489+ LR R2,R6 00856E 1837 8490+ LR R3,R7 008570 1848 8491+ LR R4,R8 008572 1857 8492+ LR R5,R7 008574 0E24 8493+ MVCL R2,R4 008576 1826 8494+ LR R2,R6 008578 1837 8495+ LR R3,R7 00857A 1848 8496+ LR R4,R8 00857C 1857 8497+ LR R5,R7 00857E 0E24 8498+ MVCL R2,R4 008580 1826 8499+ LR R2,R6 PAGE 157 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 008582 1837 8500+ LR R3,R7 008584 1848 8501+ LR R4,R8 008586 1857 8502+ LR R5,R7 008588 0E24 8503+ MVCL R2,R4 00858A 1826 8504+ LR R2,R6 00858C 1837 8505+ LR R3,R7 00858E 1848 8506+ LR R4,R8 008590 1857 8507+ LR R5,R7 008592 0E24 8508+ MVCL R2,R4 008594 1826 8509+ LR R2,R6 008596 1837 8510+ LR R3,R7 008598 1848 8511+ LR R4,R8 00859A 1857 8512+ LR R5,R7 00859C 0E24 8513+ MVCL R2,R4 8514+* 00859E 06FB 8515 BCTR R15,R11 8516 TSIMRET 0085A0 58F0 C0A8 085B0 8517+ L R15,=A(SAVETST) R15 := current save area 0085A4 58DF 0004 00004 8518+ L R13,4(R15) get old save area back 0085A8 98EC D00C 0000C 8519+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0085AC 07FE 8520+ BR 14 RETURN 02000000 8521 TSIMEND 0085B0 8522+ LTORG 0085B0 00000458 8523 =A(SAVETST) 0085B4 000004B4 8524 =A(PBUF4K1) 0085B8 000004B8 8525 =A(PBUF4K2) 0085BC 00001000 8526 =F'4096' 085C0 8527+T174TEND EQU * 8528 * 8529 * Test 175 -- MVCL m,m (100b,pad) -------------------------- 8530 * 8531 TSIMBEG T175,15000,10,1,C'4*Lx;MVCL (100b,pad)' 8532+* 002AA4 8533+TDSCDAT CSECT 002AA8 8534+ DS 0D 8535+* 002AA8 000085C0 8536+T175TDSC DC A(T175) // TENTRY 002AAC 000000D4 8537+ DC A(T175TEND-T175) // TLENGTH 002AB0 00003A98 8538+ DC F'15000' // TLRCNT 002AB4 0000000A 8539+ DC F'10' // TIGCNT 002AB8 00000001 8540+ DC F'1' // TLTYPE 0012D0 8541+TEXT CSECT 0012D0 E3F1F7F5 8542+SPTR0644 DC C'T175' 002ABC 8543+TDSCDAT CSECT 002ABC 8544+ DS 0F 002ABC 040012D0 8545+ DC AL1(L'SPTR0644),AL3(SPTR0644) 0012D4 8546+TEXT CSECT 0012D4 F45CD3A75ED4E5C3 8547+SPTR0645 DC C'4*Lx;MVCL (100b,pad)' 002AC0 8548+TDSCDAT CSECT 002AC0 8549+ DS 0F 002AC0 140012D4 8550+ DC AL1(L'SPTR0645),AL3(SPTR0645) 8551+* 004A80 8552+TDSCTBL CSECT 04A80 8553+T175TPTR EQU * 004A80 00002AA8 8554+ DC A(T175TDSC) enabled test PAGE 158 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 8555+* 0085C0 8556+TCODE CSECT 0085C0 8557+ DS 0D ensure double word alignment for test 0085C0 8558+T175 DS 0H 01650000 0085C0 90EC D00C 0000C 8559+ STM 14,12,12(13) SAVE REGISTERS 02950000 0085C4 18CF 8560+ LR R12,R15 base register := entry address 085C0 8561+ USING T175,R12 declare code base register 0085C6 41B0 C02A 085EA 8562+ LA R11,T175L load loop target to R11 0085CA 58F0 C0C8 08688 8563+ L R15,=A(SAVETST) R15 := current save area 0085CE 50DF 0004 00004 8564+ ST R13,4(R15) set back pointer in current save area 0085D2 182D 8565+ LR R2,R13 remember callers save area 0085D4 18DF 8566+ LR R13,R15 setup current save area 0085D6 50D2 0008 00008 8567+ ST R13,8(R2) set forw pointer in callers save area 00000 8568+ USING TDSC,R1 declare TDSC base register 0085DA 58F0 1008 00008 8569+ L R15,TLRCNT load local repeat count to R15 8570+* 8571 * 8572 * use sequence 8573 * LR R2,R6 dest addr 8574 * LA R3,100 dest length 8575 * LA R4,0 source addr == 0 ! 8576 * LR R5,R9 source length == 0; setup pad byte 8577 * MVCL R2,R4 8578 * 0085DE 5860 C0CC 0868C 8579 L R6,=A(PBUF4K1) get ptr to ptr 0085E2 5866 0000 00000 8580 L R6,0(R6) get ptr to BUF4K1 0085E6 5890 C0D0 08690 8581 L R9,=X'FF000000' 8582 T175L REPINSN LR,(R2,R6),LA,(R3,100), X LA,(R4,0),LR,(R5,R9), X MVCL,(R2,R4) 8583+* 8584+* build from sublist &ALIST* a comma separated string &ARGS* 8585+* 8586+* 8587+* 8588+* 8589+* 8590+* 8591+* 8592+* 8593+* 8594+* 8595+* 8596+* 085EA 8597+T175L EQU * 8598+* 8599+* 8600+* write a comment indicating what REPINSN does (if NOGEN in effect) 8601+* 8602+*,// REPINSN: do 10 times: 8603+* 8604+* MNOTE requires that ' is doubled for expanded variables 8605+* thus build &MASTR as a copy of '&ARGS with ' doubled 8606+* 8607+* PAGE 159 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 8608+*,// LR R2,R6 8609+* 8610+* MNOTE requires that ' is doubled for expanded variables 8611+* thus build &MASTR as a copy of '&ARGS with ' doubled 8612+* 8613+* 8614+*,// LA R3,100 8615+* 8616+* MNOTE requires that ' is doubled for expanded variables 8617+* thus build &MASTR as a copy of '&ARGS with ' doubled 8618+* 8619+* 8620+*,// LA R4,0 8621+* 8622+* MNOTE requires that ' is doubled for expanded variables 8623+* thus build &MASTR as a copy of '&ARGS with ' doubled 8624+* 8625+* 8626+*,// LR R5,R9 8627+* 8628+* MNOTE requires that ' is doubled for expanded variables 8629+* thus build &MASTR as a copy of '&ARGS with ' doubled 8630+* 8631+* 8632+*,// MVCL R2,R4 8633+* 8634+* finally generate code: &ICNT copies of &CO1 ... 8635+* 0085EA 1826 8636+ LR R2,R6 0085EC 4130 0064 00064 8637+ LA R3,100 0085F0 4140 0000 00000 8638+ LA R4,0 0085F4 1859 8639+ LR R5,R9 0085F6 0E24 8640+ MVCL R2,R4 0085F8 1826 8641+ LR R2,R6 0085FA 4130 0064 00064 8642+ LA R3,100 0085FE 4140 0000 00000 8643+ LA R4,0 008602 1859 8644+ LR R5,R9 008604 0E24 8645+ MVCL R2,R4 008606 1826 8646+ LR R2,R6 008608 4130 0064 00064 8647+ LA R3,100 00860C 4140 0000 00000 8648+ LA R4,0 008610 1859 8649+ LR R5,R9 008612 0E24 8650+ MVCL R2,R4 008614 1826 8651+ LR R2,R6 008616 4130 0064 00064 8652+ LA R3,100 00861A 4140 0000 00000 8653+ LA R4,0 00861E 1859 8654+ LR R5,R9 008620 0E24 8655+ MVCL R2,R4 008622 1826 8656+ LR R2,R6 008624 4130 0064 00064 8657+ LA R3,100 008628 4140 0000 00000 8658+ LA R4,0 00862C 1859 8659+ LR R5,R9 00862E 0E24 8660+ MVCL R2,R4 008630 1826 8661+ LR R2,R6 008632 4130 0064 00064 8662+ LA R3,100 PAGE 160 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 008636 4140 0000 00000 8663+ LA R4,0 00863A 1859 8664+ LR R5,R9 00863C 0E24 8665+ MVCL R2,R4 00863E 1826 8666+ LR R2,R6 008640 4130 0064 00064 8667+ LA R3,100 008644 4140 0000 00000 8668+ LA R4,0 008648 1859 8669+ LR R5,R9 00864A 0E24 8670+ MVCL R2,R4 00864C 1826 8671+ LR R2,R6 00864E 4130 0064 00064 8672+ LA R3,100 008652 4140 0000 00000 8673+ LA R4,0 008656 1859 8674+ LR R5,R9 008658 0E24 8675+ MVCL R2,R4 00865A 1826 8676+ LR R2,R6 00865C 4130 0064 00064 8677+ LA R3,100 008660 4140 0000 00000 8678+ LA R4,0 008664 1859 8679+ LR R5,R9 008666 0E24 8680+ MVCL R2,R4 008668 1826 8681+ LR R2,R6 00866A 4130 0064 00064 8682+ LA R3,100 00866E 4140 0000 00000 8683+ LA R4,0 008672 1859 8684+ LR R5,R9 008674 0E24 8685+ MVCL R2,R4 8686+* 008676 06FB 8687 BCTR R15,R11 8688 TSIMRET 008678 58F0 C0C8 08688 8689+ L R15,=A(SAVETST) R15 := current save area 00867C 58DF 0004 00004 8690+ L R13,4(R15) get old save area back 008680 98EC D00C 0000C 8691+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008684 07FE 8692+ BR 14 RETURN 02000000 8693 TSIMEND 008688 8694+ LTORG 008688 00000458 8695 =A(SAVETST) 00868C 000004B4 8696 =A(PBUF4K1) 008690 FF000000 8697 =X'FF000000' 08694 8698+T175TEND EQU * 8699 * 8700 * Test 176 -- MVCL m,m (1kb,pad) --------------------------- 8701 * 8702 TSIMBEG T176,10000,10,1,C'4*Lx;MVCL (1kb,pad)' 8703+* 002AC4 8704+TDSCDAT CSECT 002AC8 8705+ DS 0D 8706+* 002AC8 00008698 8707+T176TDSC DC A(T176) // TENTRY 002ACC 000000D4 8708+ DC A(T176TEND-T176) // TLENGTH 002AD0 00002710 8709+ DC F'10000' // TLRCNT 002AD4 0000000A 8710+ DC F'10' // TIGCNT 002AD8 00000001 8711+ DC F'1' // TLTYPE 0012E8 8712+TEXT CSECT 0012E8 E3F1F7F6 8713+SPTR0664 DC C'T176' 002ADC 8714+TDSCDAT CSECT 002ADC 8715+ DS 0F 002ADC 040012E8 8716+ DC AL1(L'SPTR0664),AL3(SPTR0664) 0012EC 8717+TEXT CSECT PAGE 161 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0012EC F45CD3A75ED4E5C3 8718+SPTR0665 DC C'4*Lx;MVCL (1kb,pad)' 002AE0 8719+TDSCDAT CSECT 002AE0 8720+ DS 0F 002AE0 130012EC 8721+ DC AL1(L'SPTR0665),AL3(SPTR0665) 8722+* 004A84 8723+TDSCTBL CSECT 04A84 8724+T176TPTR EQU * 004A84 00002AC8 8725+ DC A(T176TDSC) enabled test 8726+* 008694 8727+TCODE CSECT 008698 8728+ DS 0D ensure double word alignment for test 008698 8729+T176 DS 0H 01650000 008698 90EC D00C 0000C 8730+ STM 14,12,12(13) SAVE REGISTERS 02950000 00869C 18CF 8731+ LR R12,R15 base register := entry address 08698 8732+ USING T176,R12 declare code base register 00869E 41B0 C02A 086C2 8733+ LA R11,T176L load loop target to R11 0086A2 58F0 C0C8 08760 8734+ L R15,=A(SAVETST) R15 := current save area 0086A6 50DF 0004 00004 8735+ ST R13,4(R15) set back pointer in current save area 0086AA 182D 8736+ LR R2,R13 remember callers save area 0086AC 18DF 8737+ LR R13,R15 setup current save area 0086AE 50D2 0008 00008 8738+ ST R13,8(R2) set forw pointer in callers save area 00000 8739+ USING TDSC,R1 declare TDSC base register 0086B2 58F0 1008 00008 8740+ L R15,TLRCNT load local repeat count to R15 8741+* 8742 * 8743 * use sequence 8744 * LR R2,R6 dest addr 8745 * LA R3,1024 dest length 8746 * LA R4,0 source addr == 0 ! 8747 * LR R5,R9 source length == 0; setup pad byte 8748 * MVCL R2,R4 8749 * 0086B6 5860 C0CC 08764 8750 L R6,=A(PBUF4K1) get ptr to ptr 0086BA 5866 0000 00000 8751 L R6,0(R6) get ptr to BUF4K1 0086BE 5890 C0D0 08768 8752 L R9,=X'FF000000' 8753 T176L REPINSN LR,(R2,R6),LA,(R3,1024), X LA,(R4,0),LR,(R5,R9), X MVCL,(R2,R4) 8754+* 8755+* build from sublist &ALIST* a comma separated string &ARGS* 8756+* 8757+* 8758+* 8759+* 8760+* 8761+* 8762+* 8763+* 8764+* 8765+* 8766+* 8767+* 086C2 8768+T176L EQU * 8769+* 8770+* PAGE 162 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 8771+* write a comment indicating what REPINSN does (if NOGEN in effect) 8772+* 8773+*,// REPINSN: do 10 times: 8774+* 8775+* MNOTE requires that ' is doubled for expanded variables 8776+* thus build &MASTR as a copy of '&ARGS with ' doubled 8777+* 8778+* 8779+*,// LR R2,R6 8780+* 8781+* MNOTE requires that ' is doubled for expanded variables 8782+* thus build &MASTR as a copy of '&ARGS with ' doubled 8783+* 8784+* 8785+*,// LA R3,1024 8786+* 8787+* MNOTE requires that ' is doubled for expanded variables 8788+* thus build &MASTR as a copy of '&ARGS with ' doubled 8789+* 8790+* 8791+*,// LA R4,0 8792+* 8793+* MNOTE requires that ' is doubled for expanded variables 8794+* thus build &MASTR as a copy of '&ARGS with ' doubled 8795+* 8796+* 8797+*,// LR R5,R9 8798+* 8799+* MNOTE requires that ' is doubled for expanded variables 8800+* thus build &MASTR as a copy of '&ARGS with ' doubled 8801+* 8802+* 8803+*,// MVCL R2,R4 8804+* 8805+* finally generate code: &ICNT copies of &CO1 ... 8806+* 0086C2 1826 8807+ LR R2,R6 0086C4 4130 0400 00400 8808+ LA R3,1024 0086C8 4140 0000 00000 8809+ LA R4,0 0086CC 1859 8810+ LR R5,R9 0086CE 0E24 8811+ MVCL R2,R4 0086D0 1826 8812+ LR R2,R6 0086D2 4130 0400 00400 8813+ LA R3,1024 0086D6 4140 0000 00000 8814+ LA R4,0 0086DA 1859 8815+ LR R5,R9 0086DC 0E24 8816+ MVCL R2,R4 0086DE 1826 8817+ LR R2,R6 0086E0 4130 0400 00400 8818+ LA R3,1024 0086E4 4140 0000 00000 8819+ LA R4,0 0086E8 1859 8820+ LR R5,R9 0086EA 0E24 8821+ MVCL R2,R4 0086EC 1826 8822+ LR R2,R6 0086EE 4130 0400 00400 8823+ LA R3,1024 0086F2 4140 0000 00000 8824+ LA R4,0 0086F6 1859 8825+ LR R5,R9 PAGE 163 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0086F8 0E24 8826+ MVCL R2,R4 0086FA 1826 8827+ LR R2,R6 0086FC 4130 0400 00400 8828+ LA R3,1024 008700 4140 0000 00000 8829+ LA R4,0 008704 1859 8830+ LR R5,R9 008706 0E24 8831+ MVCL R2,R4 008708 1826 8832+ LR R2,R6 00870A 4130 0400 00400 8833+ LA R3,1024 00870E 4140 0000 00000 8834+ LA R4,0 008712 1859 8835+ LR R5,R9 008714 0E24 8836+ MVCL R2,R4 008716 1826 8837+ LR R2,R6 008718 4130 0400 00400 8838+ LA R3,1024 00871C 4140 0000 00000 8839+ LA R4,0 008720 1859 8840+ LR R5,R9 008722 0E24 8841+ MVCL R2,R4 008724 1826 8842+ LR R2,R6 008726 4130 0400 00400 8843+ LA R3,1024 00872A 4140 0000 00000 8844+ LA R4,0 00872E 1859 8845+ LR R5,R9 008730 0E24 8846+ MVCL R2,R4 008732 1826 8847+ LR R2,R6 008734 4130 0400 00400 8848+ LA R3,1024 008738 4140 0000 00000 8849+ LA R4,0 00873C 1859 8850+ LR R5,R9 00873E 0E24 8851+ MVCL R2,R4 008740 1826 8852+ LR R2,R6 008742 4130 0400 00400 8853+ LA R3,1024 008746 4140 0000 00000 8854+ LA R4,0 00874A 1859 8855+ LR R5,R9 00874C 0E24 8856+ MVCL R2,R4 8857+* 00874E 06FB 8858 BCTR R15,R11 8859 TSIMRET 008750 58F0 C0C8 08760 8860+ L R15,=A(SAVETST) R15 := current save area 008754 58DF 0004 00004 8861+ L R13,4(R15) get old save area back 008758 98EC D00C 0000C 8862+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00875C 07FE 8863+ BR 14 RETURN 02000000 8864 TSIMEND 008760 8865+ LTORG 008760 00000458 8866 =A(SAVETST) 008764 000004B4 8867 =A(PBUF4K1) 008768 FF000000 8868 =X'FF000000' 0876C 8869+T176TEND EQU * 8870 * 8871 * Test 177 -- MVCL m,m (4kb,pad) --------------------------- 8872 * 8873 TSIMBEG T177,4500,10,1,C'4*Lx;MVCL (4kb,pad)' 8874+* 002AE4 8875+TDSCDAT CSECT 002AE8 8876+ DS 0D 8877+* 002AE8 00008770 8878+T177TDSC DC A(T177) // TENTRY 002AEC 000000C8 8879+ DC A(T177TEND-T177) // TLENGTH 002AF0 00001194 8880+ DC F'4500' // TLRCNT PAGE 164 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002AF4 0000000A 8881+ DC F'10' // TIGCNT 002AF8 00000001 8882+ DC F'1' // TLTYPE 0012FF 8883+TEXT CSECT 0012FF E3F1F7F7 8884+SPTR0684 DC C'T177' 002AFC 8885+TDSCDAT CSECT 002AFC 8886+ DS 0F 002AFC 040012FF 8887+ DC AL1(L'SPTR0684),AL3(SPTR0684) 001303 8888+TEXT CSECT 001303 F45CD3A75ED4E5C3 8889+SPTR0685 DC C'4*Lx;MVCL (4kb,pad)' 002B00 8890+TDSCDAT CSECT 002B00 8891+ DS 0F 002B00 13001303 8892+ DC AL1(L'SPTR0685),AL3(SPTR0685) 8893+* 004A88 8894+TDSCTBL CSECT 04A88 8895+T177TPTR EQU * 004A88 00002AE8 8896+ DC A(T177TDSC) enabled test 8897+* 00876C 8898+TCODE CSECT 008770 8899+ DS 0D ensure double word alignment for test 008770 8900+T177 DS 0H 01650000 008770 90EC D00C 0000C 8901+ STM 14,12,12(13) SAVE REGISTERS 02950000 008774 18CF 8902+ LR R12,R15 base register := entry address 08770 8903+ USING T177,R12 declare code base register 008776 41B0 C02E 0879E 8904+ LA R11,T177L load loop target to R11 00877A 58F0 C0B8 08828 8905+ L R15,=A(SAVETST) R15 := current save area 00877E 50DF 0004 00004 8906+ ST R13,4(R15) set back pointer in current save area 008782 182D 8907+ LR R2,R13 remember callers save area 008784 18DF 8908+ LR R13,R15 setup current save area 008786 50D2 0008 00008 8909+ ST R13,8(R2) set forw pointer in callers save area 00000 8910+ USING TDSC,R1 declare TDSC base register 00878A 58F0 1008 00008 8911+ L R15,TLRCNT load local repeat count to R15 8912+* 8913 * 8914 * use sequence 8915 * LR R2,R6 dest addr 8916 * LR R3,R7 dest length 8917 * LA R4,0 source addr == 0 ! 8918 * LR R5,R9 source length == 0; setup pad byte 8919 * MVCL R2,R4 8920 * 00878E 5860 C0BC 0882C 8921 L R6,=A(PBUF4K1) get ptr to ptr 008792 5866 0000 00000 8922 L R6,0(R6) get ptr to BUF4K1 008796 5870 C0C0 08830 8923 L R7,=F'4096' 00879A 5890 C0C4 08834 8924 L R9,=X'FF000000' 8925 T177L REPINSN LR,(R2,R6),LR,(R3,R7), X LA,(R4,0),LR,(R5,R9), X MVCL,(R2,R4) 8926+* 8927+* build from sublist &ALIST* a comma separated string &ARGS* 8928+* 8929+* 8930+* 8931+* 8932+* 8933+* PAGE 165 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 8934+* 8935+* 8936+* 8937+* 8938+* 8939+* 0879E 8940+T177L EQU * 8941+* 8942+* 8943+* write a comment indicating what REPINSN does (if NOGEN in effect) 8944+* 8945+*,// REPINSN: do 10 times: 8946+* 8947+* MNOTE requires that ' is doubled for expanded variables 8948+* thus build &MASTR as a copy of '&ARGS with ' doubled 8949+* 8950+* 8951+*,// LR R2,R6 8952+* 8953+* MNOTE requires that ' is doubled for expanded variables 8954+* thus build &MASTR as a copy of '&ARGS with ' doubled 8955+* 8956+* 8957+*,// LR R3,R7 8958+* 8959+* MNOTE requires that ' is doubled for expanded variables 8960+* thus build &MASTR as a copy of '&ARGS with ' doubled 8961+* 8962+* 8963+*,// LA R4,0 8964+* 8965+* MNOTE requires that ' is doubled for expanded variables 8966+* thus build &MASTR as a copy of '&ARGS with ' doubled 8967+* 8968+* 8969+*,// LR R5,R9 8970+* 8971+* MNOTE requires that ' is doubled for expanded variables 8972+* thus build &MASTR as a copy of '&ARGS with ' doubled 8973+* 8974+* 8975+*,// MVCL R2,R4 8976+* 8977+* finally generate code: &ICNT copies of &CO1 ... 8978+* 00879E 1826 8979+ LR R2,R6 0087A0 1837 8980+ LR R3,R7 0087A2 4140 0000 00000 8981+ LA R4,0 0087A6 1859 8982+ LR R5,R9 0087A8 0E24 8983+ MVCL R2,R4 0087AA 1826 8984+ LR R2,R6 0087AC 1837 8985+ LR R3,R7 0087AE 4140 0000 00000 8986+ LA R4,0 0087B2 1859 8987+ LR R5,R9 0087B4 0E24 8988+ MVCL R2,R4 PAGE 166 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0087B6 1826 8989+ LR R2,R6 0087B8 1837 8990+ LR R3,R7 0087BA 4140 0000 00000 8991+ LA R4,0 0087BE 1859 8992+ LR R5,R9 0087C0 0E24 8993+ MVCL R2,R4 0087C2 1826 8994+ LR R2,R6 0087C4 1837 8995+ LR R3,R7 0087C6 4140 0000 00000 8996+ LA R4,0 0087CA 1859 8997+ LR R5,R9 0087CC 0E24 8998+ MVCL R2,R4 0087CE 1826 8999+ LR R2,R6 0087D0 1837 9000+ LR R3,R7 0087D2 4140 0000 00000 9001+ LA R4,0 0087D6 1859 9002+ LR R5,R9 0087D8 0E24 9003+ MVCL R2,R4 0087DA 1826 9004+ LR R2,R6 0087DC 1837 9005+ LR R3,R7 0087DE 4140 0000 00000 9006+ LA R4,0 0087E2 1859 9007+ LR R5,R9 0087E4 0E24 9008+ MVCL R2,R4 0087E6 1826 9009+ LR R2,R6 0087E8 1837 9010+ LR R3,R7 0087EA 4140 0000 00000 9011+ LA R4,0 0087EE 1859 9012+ LR R5,R9 0087F0 0E24 9013+ MVCL R2,R4 0087F2 1826 9014+ LR R2,R6 0087F4 1837 9015+ LR R3,R7 0087F6 4140 0000 00000 9016+ LA R4,0 0087FA 1859 9017+ LR R5,R9 0087FC 0E24 9018+ MVCL R2,R4 0087FE 1826 9019+ LR R2,R6 008800 1837 9020+ LR R3,R7 008802 4140 0000 00000 9021+ LA R4,0 008806 1859 9022+ LR R5,R9 008808 0E24 9023+ MVCL R2,R4 00880A 1826 9024+ LR R2,R6 00880C 1837 9025+ LR R3,R7 00880E 4140 0000 00000 9026+ LA R4,0 008812 1859 9027+ LR R5,R9 008814 0E24 9028+ MVCL R2,R4 9029+* 008816 06FB 9030 BCTR R15,R11 9031 TSIMRET 008818 58F0 C0B8 08828 9032+ L R15,=A(SAVETST) R15 := current save area 00881C 58DF 0004 00004 9033+ L R13,4(R15) get old save area back 008820 98EC D00C 0000C 9034+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008824 07FE 9035+ BR 14 RETURN 02000000 9036 TSIMEND 008828 9037+ LTORG 008828 00000458 9038 =A(SAVETST) 00882C 000004B4 9039 =A(PBUF4K1) 008830 00001000 9040 =F'4096' 008834 FF000000 9041 =X'FF000000' 08838 9042+T177TEND EQU * 9043 * PAGE 167 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 9044 * Test 178 -- MVCL m,m (1kb,over1) ------------------------- 9045 * test byte propagation usage of MVCL 9046 * destination offset by + 1 byte to source 9047 * 9048 TSIMBEG T178,21000,10,1,C'4*LA;MVCL (1kb,over1)' 9049+* 002B04 9050+TDSCDAT CSECT 002B08 9051+ DS 0D 9052+* 002B08 00008838 9053+T178TDSC DC A(T178) // TENTRY 002B0C 000004EC 9054+ DC A(T178TEND-T178) // TLENGTH 002B10 00005208 9055+ DC F'21000' // TLRCNT 002B14 0000000A 9056+ DC F'10' // TIGCNT 002B18 00000001 9057+ DC F'1' // TLTYPE 001316 9058+TEXT CSECT 001316 E3F1F7F8 9059+SPTR0704 DC C'T178' 002B1C 9060+TDSCDAT CSECT 002B1C 9061+ DS 0F 002B1C 04001316 9062+ DC AL1(L'SPTR0704),AL3(SPTR0704) 00131A 9063+TEXT CSECT 00131A F45CD3C15ED4E5C3 9064+SPTR0705 DC C'4*LA;MVCL (1kb,over1)' 002B20 9065+TDSCDAT CSECT 002B20 9066+ DS 0F 002B20 1500131A 9067+ DC AL1(L'SPTR0705),AL3(SPTR0705) 9068+* 004A8C 9069+TDSCTBL CSECT 04A8C 9070+T178TPTR EQU * 004A8C 00002B08 9071+ DC A(T178TDSC) enabled test 9072+* 008838 9073+TCODE CSECT 008838 9074+ DS 0D ensure double word alignment for test 008838 9075+T178 DS 0H 01650000 008838 90EC D00C 0000C 9076+ STM 14,12,12(13) SAVE REGISTERS 02950000 00883C 18CF 9077+ LR R12,R15 base register := entry address 08838 9078+ USING T178,R12 declare code base register 00883E 41B0 C01E 08856 9079+ LA R11,T178L load loop target to R11 008842 58F0 C4E8 08D20 9080+ L R15,=A(SAVETST) R15 := current save area 008846 50DF 0004 00004 9081+ ST R13,4(R15) set back pointer in current save area 00884A 182D 9082+ LR R2,R13 remember callers save area 00884C 18DF 9083+ LR R13,R15 setup current save area 00884E 50D2 0008 00008 9084+ ST R13,8(R2) set forw pointer in callers save area 00000 9085+ USING TDSC,R1 declare TDSC base register 008852 58F0 1008 00008 9086+ L R15,TLRCNT load local repeat count to R15 9087+* 9088 * 9089 * use sequence 9090 * LA R2,T178V2 dest addr 9091 * LA R3,1024 dest length 9092 * LA R4,T178V1 source addr 9093 * LA R5,1024 source length 9094 * MVCL R2,R4 9095 * 9096 T178L REPINSN LA,(R2,T178V2),LA,(R3,1024), X LA,(R4,T178V1),LA,(R5,1024), X MVCL,(R2,R4) PAGE 168 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 9097+* 9098+* build from sublist &ALIST* a comma separated string &ARGS* 9099+* 9100+* 9101+* 9102+* 9103+* 9104+* 9105+* 9106+* 9107+* 9108+* 9109+* 9110+* 08856 9111+T178L EQU * 9112+* 9113+* 9114+* write a comment indicating what REPINSN does (if NOGEN in effect) 9115+* 9116+*,// REPINSN: do 10 times: 9117+* 9118+* MNOTE requires that ' is doubled for expanded variables 9119+* thus build &MASTR as a copy of '&ARGS with ' doubled 9120+* 9121+* 9122+*,// LA R2,T178V2 9123+* 9124+* MNOTE requires that ' is doubled for expanded variables 9125+* thus build &MASTR as a copy of '&ARGS with ' doubled 9126+* 9127+* 9128+*,// LA R3,1024 9129+* 9130+* MNOTE requires that ' is doubled for expanded variables 9131+* thus build &MASTR as a copy of '&ARGS with ' doubled 9132+* 9133+* 9134+*,// LA R4,T178V1 9135+* 9136+* MNOTE requires that ' is doubled for expanded variables 9137+* thus build &MASTR as a copy of '&ARGS with ' doubled 9138+* 9139+* 9140+*,// LA R5,1024 9141+* 9142+* MNOTE requires that ' is doubled for expanded variables 9143+* thus build &MASTR as a copy of '&ARGS with ' doubled 9144+* 9145+* 9146+*,// MVCL R2,R4 9147+* 9148+* finally generate code: &ICNT copies of &CO1 ... 9149+* 008856 4120 C0E3 0891B 9150+ LA R2,T178V2 00885A 4130 0400 00400 9151+ LA R3,1024 PAGE 169 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00885E 4140 C0E2 0891A 9152+ LA R4,T178V1 008862 4150 0400 00400 9153+ LA R5,1024 008866 0E24 9154+ MVCL R2,R4 008868 4120 C0E3 0891B 9155+ LA R2,T178V2 00886C 4130 0400 00400 9156+ LA R3,1024 008870 4140 C0E2 0891A 9157+ LA R4,T178V1 008874 4150 0400 00400 9158+ LA R5,1024 008878 0E24 9159+ MVCL R2,R4 00887A 4120 C0E3 0891B 9160+ LA R2,T178V2 00887E 4130 0400 00400 9161+ LA R3,1024 008882 4140 C0E2 0891A 9162+ LA R4,T178V1 008886 4150 0400 00400 9163+ LA R5,1024 00888A 0E24 9164+ MVCL R2,R4 00888C 4120 C0E3 0891B 9165+ LA R2,T178V2 008890 4130 0400 00400 9166+ LA R3,1024 008894 4140 C0E2 0891A 9167+ LA R4,T178V1 008898 4150 0400 00400 9168+ LA R5,1024 00889C 0E24 9169+ MVCL R2,R4 00889E 4120 C0E3 0891B 9170+ LA R2,T178V2 0088A2 4130 0400 00400 9171+ LA R3,1024 0088A6 4140 C0E2 0891A 9172+ LA R4,T178V1 0088AA 4150 0400 00400 9173+ LA R5,1024 0088AE 0E24 9174+ MVCL R2,R4 0088B0 4120 C0E3 0891B 9175+ LA R2,T178V2 0088B4 4130 0400 00400 9176+ LA R3,1024 0088B8 4140 C0E2 0891A 9177+ LA R4,T178V1 0088BC 4150 0400 00400 9178+ LA R5,1024 0088C0 0E24 9179+ MVCL R2,R4 0088C2 4120 C0E3 0891B 9180+ LA R2,T178V2 0088C6 4130 0400 00400 9181+ LA R3,1024 0088CA 4140 C0E2 0891A 9182+ LA R4,T178V1 0088CE 4150 0400 00400 9183+ LA R5,1024 0088D2 0E24 9184+ MVCL R2,R4 0088D4 4120 C0E3 0891B 9185+ LA R2,T178V2 0088D8 4130 0400 00400 9186+ LA R3,1024 0088DC 4140 C0E2 0891A 9187+ LA R4,T178V1 0088E0 4150 0400 00400 9188+ LA R5,1024 0088E4 0E24 9189+ MVCL R2,R4 0088E6 4120 C0E3 0891B 9190+ LA R2,T178V2 0088EA 4130 0400 00400 9191+ LA R3,1024 0088EE 4140 C0E2 0891A 9192+ LA R4,T178V1 0088F2 4150 0400 00400 9193+ LA R5,1024 0088F6 0E24 9194+ MVCL R2,R4 0088F8 4120 C0E3 0891B 9195+ LA R2,T178V2 0088FC 4130 0400 00400 9196+ LA R3,1024 008900 4140 C0E2 0891A 9197+ LA R4,T178V1 008904 4150 0400 00400 9198+ LA R5,1024 008908 0E24 9199+ MVCL R2,R4 9200+* 00890A 06FB 9201 BCTR R15,R11 9202 TSIMRET 00890C 58F0 C4E8 08D20 9203+ L R15,=A(SAVETST) R15 := current save area 008910 58DF 0004 00004 9204+ L R13,4(R15) get old save area back 008914 98EC D00C 0000C 9205+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008918 07FE 9206+ BR 14 RETURN 02000000 PAGE 170 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 9207 * 00891A E7 9208 T178V1 DC C'X' byte to propagate 00891B 9209 T178V2 DS 1024C into this target buffer 9210 TSIMEND 008D20 9211+ LTORG 008D20 00000458 9212 =A(SAVETST) 08D24 9213+T178TEND EQU * 9214 * 9215 * Test 179 -- MVCL m,m (1kb,over2) ------------------------- 9216 * test buffer shift left usage of MVCL 9217 * destination offset by -100 byte to source 9218 * 9219 TSIMBEG T179,4000,10,1,C'4*LA;MVCL (1kb,over2)' 9220+* 002B24 9221+TDSCDAT CSECT 002B28 9222+ DS 0D 9223+* 002B28 00008D28 9224+T179TDSC DC A(T179) // TENTRY 002B2C 0000054C 9225+ DC A(T179TEND-T179) // TLENGTH 002B30 00000FA0 9226+ DC F'4000' // TLRCNT 002B34 0000000A 9227+ DC F'10' // TIGCNT 002B38 00000001 9228+ DC F'1' // TLTYPE 00132F 9229+TEXT CSECT 00132F E3F1F7F9 9230+SPTR0724 DC C'T179' 002B3C 9231+TDSCDAT CSECT 002B3C 9232+ DS 0F 002B3C 0400132F 9233+ DC AL1(L'SPTR0724),AL3(SPTR0724) 001333 9234+TEXT CSECT 001333 F45CD3C15ED4E5C3 9235+SPTR0725 DC C'4*LA;MVCL (1kb,over2)' 002B40 9236+TDSCDAT CSECT 002B40 9237+ DS 0F 002B40 15001333 9238+ DC AL1(L'SPTR0725),AL3(SPTR0725) 9239+* 004A90 9240+TDSCTBL CSECT 04A90 9241+T179TPTR EQU * 004A90 00002B28 9242+ DC A(T179TDSC) enabled test 9243+* 008D24 9244+TCODE CSECT 008D28 9245+ DS 0D ensure double word alignment for test 008D28 9246+T179 DS 0H 01650000 008D28 90EC D00C 0000C 9247+ STM 14,12,12(13) SAVE REGISTERS 02950000 008D2C 18CF 9248+ LR R12,R15 base register := entry address 08D28 9249+ USING T179,R12 declare code base register 008D2E 41B0 C01E 08D46 9250+ LA R11,T179L load loop target to R11 008D32 58F0 C548 09270 9251+ L R15,=A(SAVETST) R15 := current save area 008D36 50DF 0004 00004 9252+ ST R13,4(R15) set back pointer in current save area 008D3A 182D 9253+ LR R2,R13 remember callers save area 008D3C 18DF 9254+ LR R13,R15 setup current save area 008D3E 50D2 0008 00008 9255+ ST R13,8(R2) set forw pointer in callers save area 00000 9256+ USING TDSC,R1 declare TDSC base register 008D42 58F0 1008 00008 9257+ L R15,TLRCNT load local repeat count to R15 9258+* 9259 * 9260 * use sequence 9261 * LA R2,T179V1 dest addr PAGE 171 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 9262 * LA R3,1024 dest length 9263 * LA R4,T179V2 source addr 9264 * LA R5,1024 source length 9265 * MVCL R2,R4 9266 * 9267 T179L REPINSN LA,(R2,T179V1),LA,(R3,1024), X LA,(R4,T179V2),LA,(R5,1024), X MVCL,(R2,R4) 9268+* 9269+* build from sublist &ALIST* a comma separated string &ARGS* 9270+* 9271+* 9272+* 9273+* 9274+* 9275+* 9276+* 9277+* 9278+* 9279+* 9280+* 9281+* 08D46 9282+T179L EQU * 9283+* 9284+* 9285+* write a comment indicating what REPINSN does (if NOGEN in effect) 9286+* 9287+*,// REPINSN: do 10 times: 9288+* 9289+* MNOTE requires that ' is doubled for expanded variables 9290+* thus build &MASTR as a copy of '&ARGS with ' doubled 9291+* 9292+* 9293+*,// LA R2,T179V1 9294+* 9295+* MNOTE requires that ' is doubled for expanded variables 9296+* thus build &MASTR as a copy of '&ARGS with ' doubled 9297+* 9298+* 9299+*,// LA R3,1024 9300+* 9301+* MNOTE requires that ' is doubled for expanded variables 9302+* thus build &MASTR as a copy of '&ARGS with ' doubled 9303+* 9304+* 9305+*,// LA R4,T179V2 9306+* 9307+* MNOTE requires that ' is doubled for expanded variables 9308+* thus build &MASTR as a copy of '&ARGS with ' doubled 9309+* 9310+* 9311+*,// LA R5,1024 9312+* 9313+* MNOTE requires that ' is doubled for expanded variables 9314+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 172 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 9315+* 9316+* 9317+*,// MVCL R2,R4 9318+* 9319+* finally generate code: &ICNT copies of &CO1 ... 9320+* 008D46 4120 C0E2 08E0A 9321+ LA R2,T179V1 008D4A 4130 0400 00400 9322+ LA R3,1024 008D4E 4140 C146 08E6E 9323+ LA R4,T179V2 008D52 4150 0400 00400 9324+ LA R5,1024 008D56 0E24 9325+ MVCL R2,R4 008D58 4120 C0E2 08E0A 9326+ LA R2,T179V1 008D5C 4130 0400 00400 9327+ LA R3,1024 008D60 4140 C146 08E6E 9328+ LA R4,T179V2 008D64 4150 0400 00400 9329+ LA R5,1024 008D68 0E24 9330+ MVCL R2,R4 008D6A 4120 C0E2 08E0A 9331+ LA R2,T179V1 008D6E 4130 0400 00400 9332+ LA R3,1024 008D72 4140 C146 08E6E 9333+ LA R4,T179V2 008D76 4150 0400 00400 9334+ LA R5,1024 008D7A 0E24 9335+ MVCL R2,R4 008D7C 4120 C0E2 08E0A 9336+ LA R2,T179V1 008D80 4130 0400 00400 9337+ LA R3,1024 008D84 4140 C146 08E6E 9338+ LA R4,T179V2 008D88 4150 0400 00400 9339+ LA R5,1024 008D8C 0E24 9340+ MVCL R2,R4 008D8E 4120 C0E2 08E0A 9341+ LA R2,T179V1 008D92 4130 0400 00400 9342+ LA R3,1024 008D96 4140 C146 08E6E 9343+ LA R4,T179V2 008D9A 4150 0400 00400 9344+ LA R5,1024 008D9E 0E24 9345+ MVCL R2,R4 008DA0 4120 C0E2 08E0A 9346+ LA R2,T179V1 008DA4 4130 0400 00400 9347+ LA R3,1024 008DA8 4140 C146 08E6E 9348+ LA R4,T179V2 008DAC 4150 0400 00400 9349+ LA R5,1024 008DB0 0E24 9350+ MVCL R2,R4 008DB2 4120 C0E2 08E0A 9351+ LA R2,T179V1 008DB6 4130 0400 00400 9352+ LA R3,1024 008DBA 4140 C146 08E6E 9353+ LA R4,T179V2 008DBE 4150 0400 00400 9354+ LA R5,1024 008DC2 0E24 9355+ MVCL R2,R4 008DC4 4120 C0E2 08E0A 9356+ LA R2,T179V1 008DC8 4130 0400 00400 9357+ LA R3,1024 008DCC 4140 C146 08E6E 9358+ LA R4,T179V2 008DD0 4150 0400 00400 9359+ LA R5,1024 008DD4 0E24 9360+ MVCL R2,R4 008DD6 4120 C0E2 08E0A 9361+ LA R2,T179V1 008DDA 4130 0400 00400 9362+ LA R3,1024 008DDE 4140 C146 08E6E 9363+ LA R4,T179V2 008DE2 4150 0400 00400 9364+ LA R5,1024 008DE6 0E24 9365+ MVCL R2,R4 008DE8 4120 C0E2 08E0A 9366+ LA R2,T179V1 008DEC 4130 0400 00400 9367+ LA R3,1024 008DF0 4140 C146 08E6E 9368+ LA R4,T179V2 008DF4 4150 0400 00400 9369+ LA R5,1024 PAGE 173 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 008DF8 0E24 9370+ MVCL R2,R4 9371+* 008DFA 06FB 9372 BCTR R15,R11 9373 TSIMRET 008DFC 58F0 C548 09270 9374+ L R15,=A(SAVETST) R15 := current save area 008E00 58DF 0004 00004 9375+ L R13,4(R15) get old save area back 008E04 98EC D00C 0000C 9376+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008E08 07FE 9377+ BR 14 RETURN 02000000 9378 * 008E0A 9379 T179V1 DS 100C target 008E6E 9380 T179V2 DS 1024C source (1/10th overlap) 9381 TSIMEND 009270 9382+ LTORG 009270 00000458 9383 =A(SAVETST) 09274 9384+T179TEND EQU * 9385 * 9386 * Test 19x -- IC =========================================== 9387 * 9388 * Test 190 -- IC R,m --------------------------------------- 9389 * 9390 TSIMBEG T190,6000,100,1,C'IC R,m' 9391+* 002B44 9392+TDSCDAT CSECT 002B48 9393+ DS 0D 9394+* 002B48 00009278 9395+T190TDSC DC A(T190) // TENTRY 002B4C 000001CC 9396+ DC A(T190TEND-T190) // TLENGTH 002B50 00001770 9397+ DC F'6000' // TLRCNT 002B54 00000064 9398+ DC F'100' // TIGCNT 002B58 00000001 9399+ DC F'1' // TLTYPE 001348 9400+TEXT CSECT 001348 E3F1F9F0 9401+SPTR0744 DC C'T190' 002B5C 9402+TDSCDAT CSECT 002B5C 9403+ DS 0F 002B5C 04001348 9404+ DC AL1(L'SPTR0744),AL3(SPTR0744) 00134C 9405+TEXT CSECT 00134C C9C340D96B94 9406+SPTR0745 DC C'IC R,m' 002B60 9407+TDSCDAT CSECT 002B60 9408+ DS 0F 002B60 0600134C 9409+ DC AL1(L'SPTR0745),AL3(SPTR0745) 9410+* 004A94 9411+TDSCTBL CSECT 04A94 9412+T190TPTR EQU * 004A94 00002B48 9413+ DC A(T190TDSC) enabled test 9414+* 009274 9415+TCODE CSECT 009278 9416+ DS 0D ensure double word alignment for test 009278 9417+T190 DS 0H 01650000 009278 90EC D00C 0000C 9418+ STM 14,12,12(13) SAVE REGISTERS 02950000 00927C 18CF 9419+ LR R12,R15 base register := entry address 09278 9420+ USING T190,R12 declare code base register 00927E 41B0 C020 09298 9421+ LA R11,T190L load loop target to R11 009282 58F0 C1C8 09440 9422+ L R15,=A(SAVETST) R15 := current save area 009286 50DF 0004 00004 9423+ ST R13,4(R15) set back pointer in current save area 00928A 182D 9424+ LR R2,R13 remember callers save area PAGE 174 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00928C 18DF 9425+ LR R13,R15 setup current save area 00928E 50D2 0008 00008 9426+ ST R13,8(R2) set forw pointer in callers save area 00000 9427+ USING TDSC,R1 declare TDSC base register 009292 58F0 1008 00008 9428+ L R15,TLRCNT load local repeat count to R15 9429+* 9430 * 009296 1722 9431 XR R2,R2 9432 T190L REPINS IC,(R2,T190V1) repeat: IC R2,T190V1 9433+* 9434+* build from sublist &ALIST a comma separated string &ARGS 9435+* 9436+* 9437+* 9438+* 9439+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 9440+* this allows to transfer the repeat count from last TDSCGEN call 9441+* 9442+* 09298 9443+T190L EQU * 9444+* 9445+* write a comment indicating what REPINS does (in case NOGEN in effect) 9446+* 9447+*,// REPINS: do 100 times: 9448+* 9449+* MNOTE requires that ' is doubled for expanded variables 9450+* thus build &MASTR as a copy of '&ARGS with ' doubled 9451+* 9452+* 9453+*,// IC R2,T190V1 9454+* 9455+* finally generate code: &ICNT copies of &CODE &ARGS 9456+* 009298 4320 C1C0 09438 9457+ IC R2,T190V1 00929C 4320 C1C0 09438 9458+ IC R2,T190V1 0092A0 4320 C1C0 09438 9459+ IC R2,T190V1 0092A4 4320 C1C0 09438 9460+ IC R2,T190V1 0092A8 4320 C1C0 09438 9461+ IC R2,T190V1 0092AC 4320 C1C0 09438 9462+ IC R2,T190V1 0092B0 4320 C1C0 09438 9463+ IC R2,T190V1 0092B4 4320 C1C0 09438 9464+ IC R2,T190V1 0092B8 4320 C1C0 09438 9465+ IC R2,T190V1 0092BC 4320 C1C0 09438 9466+ IC R2,T190V1 0092C0 4320 C1C0 09438 9467+ IC R2,T190V1 0092C4 4320 C1C0 09438 9468+ IC R2,T190V1 0092C8 4320 C1C0 09438 9469+ IC R2,T190V1 0092CC 4320 C1C0 09438 9470+ IC R2,T190V1 0092D0 4320 C1C0 09438 9471+ IC R2,T190V1 0092D4 4320 C1C0 09438 9472+ IC R2,T190V1 0092D8 4320 C1C0 09438 9473+ IC R2,T190V1 0092DC 4320 C1C0 09438 9474+ IC R2,T190V1 0092E0 4320 C1C0 09438 9475+ IC R2,T190V1 0092E4 4320 C1C0 09438 9476+ IC R2,T190V1 0092E8 4320 C1C0 09438 9477+ IC R2,T190V1 0092EC 4320 C1C0 09438 9478+ IC R2,T190V1 0092F0 4320 C1C0 09438 9479+ IC R2,T190V1 PAGE 175 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0092F4 4320 C1C0 09438 9480+ IC R2,T190V1 0092F8 4320 C1C0 09438 9481+ IC R2,T190V1 0092FC 4320 C1C0 09438 9482+ IC R2,T190V1 009300 4320 C1C0 09438 9483+ IC R2,T190V1 009304 4320 C1C0 09438 9484+ IC R2,T190V1 009308 4320 C1C0 09438 9485+ IC R2,T190V1 00930C 4320 C1C0 09438 9486+ IC R2,T190V1 009310 4320 C1C0 09438 9487+ IC R2,T190V1 009314 4320 C1C0 09438 9488+ IC R2,T190V1 009318 4320 C1C0 09438 9489+ IC R2,T190V1 00931C 4320 C1C0 09438 9490+ IC R2,T190V1 009320 4320 C1C0 09438 9491+ IC R2,T190V1 009324 4320 C1C0 09438 9492+ IC R2,T190V1 009328 4320 C1C0 09438 9493+ IC R2,T190V1 00932C 4320 C1C0 09438 9494+ IC R2,T190V1 009330 4320 C1C0 09438 9495+ IC R2,T190V1 009334 4320 C1C0 09438 9496+ IC R2,T190V1 009338 4320 C1C0 09438 9497+ IC R2,T190V1 00933C 4320 C1C0 09438 9498+ IC R2,T190V1 009340 4320 C1C0 09438 9499+ IC R2,T190V1 009344 4320 C1C0 09438 9500+ IC R2,T190V1 009348 4320 C1C0 09438 9501+ IC R2,T190V1 00934C 4320 C1C0 09438 9502+ IC R2,T190V1 009350 4320 C1C0 09438 9503+ IC R2,T190V1 009354 4320 C1C0 09438 9504+ IC R2,T190V1 009358 4320 C1C0 09438 9505+ IC R2,T190V1 00935C 4320 C1C0 09438 9506+ IC R2,T190V1 009360 4320 C1C0 09438 9507+ IC R2,T190V1 009364 4320 C1C0 09438 9508+ IC R2,T190V1 009368 4320 C1C0 09438 9509+ IC R2,T190V1 00936C 4320 C1C0 09438 9510+ IC R2,T190V1 009370 4320 C1C0 09438 9511+ IC R2,T190V1 009374 4320 C1C0 09438 9512+ IC R2,T190V1 009378 4320 C1C0 09438 9513+ IC R2,T190V1 00937C 4320 C1C0 09438 9514+ IC R2,T190V1 009380 4320 C1C0 09438 9515+ IC R2,T190V1 009384 4320 C1C0 09438 9516+ IC R2,T190V1 009388 4320 C1C0 09438 9517+ IC R2,T190V1 00938C 4320 C1C0 09438 9518+ IC R2,T190V1 009390 4320 C1C0 09438 9519+ IC R2,T190V1 009394 4320 C1C0 09438 9520+ IC R2,T190V1 009398 4320 C1C0 09438 9521+ IC R2,T190V1 00939C 4320 C1C0 09438 9522+ IC R2,T190V1 0093A0 4320 C1C0 09438 9523+ IC R2,T190V1 0093A4 4320 C1C0 09438 9524+ IC R2,T190V1 0093A8 4320 C1C0 09438 9525+ IC R2,T190V1 0093AC 4320 C1C0 09438 9526+ IC R2,T190V1 0093B0 4320 C1C0 09438 9527+ IC R2,T190V1 0093B4 4320 C1C0 09438 9528+ IC R2,T190V1 0093B8 4320 C1C0 09438 9529+ IC R2,T190V1 0093BC 4320 C1C0 09438 9530+ IC R2,T190V1 0093C0 4320 C1C0 09438 9531+ IC R2,T190V1 0093C4 4320 C1C0 09438 9532+ IC R2,T190V1 0093C8 4320 C1C0 09438 9533+ IC R2,T190V1 0093CC 4320 C1C0 09438 9534+ IC R2,T190V1 PAGE 176 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0093D0 4320 C1C0 09438 9535+ IC R2,T190V1 0093D4 4320 C1C0 09438 9536+ IC R2,T190V1 0093D8 4320 C1C0 09438 9537+ IC R2,T190V1 0093DC 4320 C1C0 09438 9538+ IC R2,T190V1 0093E0 4320 C1C0 09438 9539+ IC R2,T190V1 0093E4 4320 C1C0 09438 9540+ IC R2,T190V1 0093E8 4320 C1C0 09438 9541+ IC R2,T190V1 0093EC 4320 C1C0 09438 9542+ IC R2,T190V1 0093F0 4320 C1C0 09438 9543+ IC R2,T190V1 0093F4 4320 C1C0 09438 9544+ IC R2,T190V1 0093F8 4320 C1C0 09438 9545+ IC R2,T190V1 0093FC 4320 C1C0 09438 9546+ IC R2,T190V1 009400 4320 C1C0 09438 9547+ IC R2,T190V1 009404 4320 C1C0 09438 9548+ IC R2,T190V1 009408 4320 C1C0 09438 9549+ IC R2,T190V1 00940C 4320 C1C0 09438 9550+ IC R2,T190V1 009410 4320 C1C0 09438 9551+ IC R2,T190V1 009414 4320 C1C0 09438 9552+ IC R2,T190V1 009418 4320 C1C0 09438 9553+ IC R2,T190V1 00941C 4320 C1C0 09438 9554+ IC R2,T190V1 009420 4320 C1C0 09438 9555+ IC R2,T190V1 009424 4320 C1C0 09438 9556+ IC R2,T190V1 9557+* 009428 06FB 9558 BCTR R15,R11 9559 TSIMRET 00942A 58F0 C1C8 09440 9560+ L R15,=A(SAVETST) R15 := current save area 00942E 58DF 0004 00004 9561+ L R13,4(R15) get old save area back 009432 98EC D00C 0000C 9562+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009436 07FE 9563+ BR 14 RETURN 02000000 9564 * 009438 40 9565 T190V1 DC C' ' 9566 TSIMEND 009440 9567+ LTORG 009440 00000458 9568 =A(SAVETST) 09444 9569+T190TEND EQU * 9570 * 9571 * Test 191 -- ICM R,m (1c) --------------------------------- 9572 * 9573 TSIMBEG T191,3000,100,1,C'ICM R,i,m (0010)' 9574+* 002B64 9575+TDSCDAT CSECT 002B68 9576+ DS 0D 9577+* 002B68 00009448 9578+T191TDSC DC A(T191) // TENTRY 002B6C 000001CC 9579+ DC A(T191TEND-T191) // TLENGTH 002B70 00000BB8 9580+ DC F'3000' // TLRCNT 002B74 00000064 9581+ DC F'100' // TIGCNT 002B78 00000001 9582+ DC F'1' // TLTYPE 001352 9583+TEXT CSECT 001352 E3F1F9F1 9584+SPTR0756 DC C'T191' 002B7C 9585+TDSCDAT CSECT 002B7C 9586+ DS 0F 002B7C 04001352 9587+ DC AL1(L'SPTR0756),AL3(SPTR0756) 001356 9588+TEXT CSECT 001356 C9C3D440D96B896B 9589+SPTR0757 DC C'ICM R,i,m (0010)' PAGE 177 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002B80 9590+TDSCDAT CSECT 002B80 9591+ DS 0F 002B80 10001356 9592+ DC AL1(L'SPTR0757),AL3(SPTR0757) 9593+* 004A98 9594+TDSCTBL CSECT 04A98 9595+T191TPTR EQU * 004A98 00002B68 9596+ DC A(T191TDSC) enabled test 9597+* 009444 9598+TCODE CSECT 009448 9599+ DS 0D ensure double word alignment for test 009448 9600+T191 DS 0H 01650000 009448 90EC D00C 0000C 9601+ STM 14,12,12(13) SAVE REGISTERS 02950000 00944C 18CF 9602+ LR R12,R15 base register := entry address 09448 9603+ USING T191,R12 declare code base register 00944E 41B0 C020 09468 9604+ LA R11,T191L load loop target to R11 009452 58F0 C1C8 09610 9605+ L R15,=A(SAVETST) R15 := current save area 009456 50DF 0004 00004 9606+ ST R13,4(R15) set back pointer in current save area 00945A 182D 9607+ LR R2,R13 remember callers save area 00945C 18DF 9608+ LR R13,R15 setup current save area 00945E 50D2 0008 00008 9609+ ST R13,8(R2) set forw pointer in callers save area 00000 9610+ USING TDSC,R1 declare TDSC base register 009462 58F0 1008 00008 9611+ L R15,TLRCNT load local repeat count to R15 9612+* 9613 * 009466 1722 9614 XR R2,R2 9615 T191L REPINS ICM,(R2,B'0010',T191V1) repeat: ICM R2,B'0010',T191V1 9616+* 9617+* build from sublist &ALIST a comma separated string &ARGS 9618+* 9619+* 9620+* 9621+* 9622+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 9623+* this allows to transfer the repeat count from last TDSCGEN call 9624+* 9625+* 09468 9626+T191L EQU * 9627+* 9628+* write a comment indicating what REPINS does (in case NOGEN in effect) 9629+* 9630+*,// REPINS: do 100 times: 9631+* 9632+* MNOTE requires that ' is doubled for expanded variables 9633+* thus build &MASTR as a copy of '&ARGS with ' doubled 9634+* 9635+* 9636+*,// ICM R2,B'0010',T191V1 9637+* 9638+* finally generate code: &ICNT copies of &CODE &ARGS 9639+* 009468 BF22 C1C0 09608 9640+ ICM R2,B'0010',T191V1 00946C BF22 C1C0 09608 9641+ ICM R2,B'0010',T191V1 009470 BF22 C1C0 09608 9642+ ICM R2,B'0010',T191V1 009474 BF22 C1C0 09608 9643+ ICM R2,B'0010',T191V1 009478 BF22 C1C0 09608 9644+ ICM R2,B'0010',T191V1 PAGE 178 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00947C BF22 C1C0 09608 9645+ ICM R2,B'0010',T191V1 009480 BF22 C1C0 09608 9646+ ICM R2,B'0010',T191V1 009484 BF22 C1C0 09608 9647+ ICM R2,B'0010',T191V1 009488 BF22 C1C0 09608 9648+ ICM R2,B'0010',T191V1 00948C BF22 C1C0 09608 9649+ ICM R2,B'0010',T191V1 009490 BF22 C1C0 09608 9650+ ICM R2,B'0010',T191V1 009494 BF22 C1C0 09608 9651+ ICM R2,B'0010',T191V1 009498 BF22 C1C0 09608 9652+ ICM R2,B'0010',T191V1 00949C BF22 C1C0 09608 9653+ ICM R2,B'0010',T191V1 0094A0 BF22 C1C0 09608 9654+ ICM R2,B'0010',T191V1 0094A4 BF22 C1C0 09608 9655+ ICM R2,B'0010',T191V1 0094A8 BF22 C1C0 09608 9656+ ICM R2,B'0010',T191V1 0094AC BF22 C1C0 09608 9657+ ICM R2,B'0010',T191V1 0094B0 BF22 C1C0 09608 9658+ ICM R2,B'0010',T191V1 0094B4 BF22 C1C0 09608 9659+ ICM R2,B'0010',T191V1 0094B8 BF22 C1C0 09608 9660+ ICM R2,B'0010',T191V1 0094BC BF22 C1C0 09608 9661+ ICM R2,B'0010',T191V1 0094C0 BF22 C1C0 09608 9662+ ICM R2,B'0010',T191V1 0094C4 BF22 C1C0 09608 9663+ ICM R2,B'0010',T191V1 0094C8 BF22 C1C0 09608 9664+ ICM R2,B'0010',T191V1 0094CC BF22 C1C0 09608 9665+ ICM R2,B'0010',T191V1 0094D0 BF22 C1C0 09608 9666+ ICM R2,B'0010',T191V1 0094D4 BF22 C1C0 09608 9667+ ICM R2,B'0010',T191V1 0094D8 BF22 C1C0 09608 9668+ ICM R2,B'0010',T191V1 0094DC BF22 C1C0 09608 9669+ ICM R2,B'0010',T191V1 0094E0 BF22 C1C0 09608 9670+ ICM R2,B'0010',T191V1 0094E4 BF22 C1C0 09608 9671+ ICM R2,B'0010',T191V1 0094E8 BF22 C1C0 09608 9672+ ICM R2,B'0010',T191V1 0094EC BF22 C1C0 09608 9673+ ICM R2,B'0010',T191V1 0094F0 BF22 C1C0 09608 9674+ ICM R2,B'0010',T191V1 0094F4 BF22 C1C0 09608 9675+ ICM R2,B'0010',T191V1 0094F8 BF22 C1C0 09608 9676+ ICM R2,B'0010',T191V1 0094FC BF22 C1C0 09608 9677+ ICM R2,B'0010',T191V1 009500 BF22 C1C0 09608 9678+ ICM R2,B'0010',T191V1 009504 BF22 C1C0 09608 9679+ ICM R2,B'0010',T191V1 009508 BF22 C1C0 09608 9680+ ICM R2,B'0010',T191V1 00950C BF22 C1C0 09608 9681+ ICM R2,B'0010',T191V1 009510 BF22 C1C0 09608 9682+ ICM R2,B'0010',T191V1 009514 BF22 C1C0 09608 9683+ ICM R2,B'0010',T191V1 009518 BF22 C1C0 09608 9684+ ICM R2,B'0010',T191V1 00951C BF22 C1C0 09608 9685+ ICM R2,B'0010',T191V1 009520 BF22 C1C0 09608 9686+ ICM R2,B'0010',T191V1 009524 BF22 C1C0 09608 9687+ ICM R2,B'0010',T191V1 009528 BF22 C1C0 09608 9688+ ICM R2,B'0010',T191V1 00952C BF22 C1C0 09608 9689+ ICM R2,B'0010',T191V1 009530 BF22 C1C0 09608 9690+ ICM R2,B'0010',T191V1 009534 BF22 C1C0 09608 9691+ ICM R2,B'0010',T191V1 009538 BF22 C1C0 09608 9692+ ICM R2,B'0010',T191V1 00953C BF22 C1C0 09608 9693+ ICM R2,B'0010',T191V1 009540 BF22 C1C0 09608 9694+ ICM R2,B'0010',T191V1 009544 BF22 C1C0 09608 9695+ ICM R2,B'0010',T191V1 009548 BF22 C1C0 09608 9696+ ICM R2,B'0010',T191V1 00954C BF22 C1C0 09608 9697+ ICM R2,B'0010',T191V1 009550 BF22 C1C0 09608 9698+ ICM R2,B'0010',T191V1 009554 BF22 C1C0 09608 9699+ ICM R2,B'0010',T191V1 PAGE 179 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009558 BF22 C1C0 09608 9700+ ICM R2,B'0010',T191V1 00955C BF22 C1C0 09608 9701+ ICM R2,B'0010',T191V1 009560 BF22 C1C0 09608 9702+ ICM R2,B'0010',T191V1 009564 BF22 C1C0 09608 9703+ ICM R2,B'0010',T191V1 009568 BF22 C1C0 09608 9704+ ICM R2,B'0010',T191V1 00956C BF22 C1C0 09608 9705+ ICM R2,B'0010',T191V1 009570 BF22 C1C0 09608 9706+ ICM R2,B'0010',T191V1 009574 BF22 C1C0 09608 9707+ ICM R2,B'0010',T191V1 009578 BF22 C1C0 09608 9708+ ICM R2,B'0010',T191V1 00957C BF22 C1C0 09608 9709+ ICM R2,B'0010',T191V1 009580 BF22 C1C0 09608 9710+ ICM R2,B'0010',T191V1 009584 BF22 C1C0 09608 9711+ ICM R2,B'0010',T191V1 009588 BF22 C1C0 09608 9712+ ICM R2,B'0010',T191V1 00958C BF22 C1C0 09608 9713+ ICM R2,B'0010',T191V1 009590 BF22 C1C0 09608 9714+ ICM R2,B'0010',T191V1 009594 BF22 C1C0 09608 9715+ ICM R2,B'0010',T191V1 009598 BF22 C1C0 09608 9716+ ICM R2,B'0010',T191V1 00959C BF22 C1C0 09608 9717+ ICM R2,B'0010',T191V1 0095A0 BF22 C1C0 09608 9718+ ICM R2,B'0010',T191V1 0095A4 BF22 C1C0 09608 9719+ ICM R2,B'0010',T191V1 0095A8 BF22 C1C0 09608 9720+ ICM R2,B'0010',T191V1 0095AC BF22 C1C0 09608 9721+ ICM R2,B'0010',T191V1 0095B0 BF22 C1C0 09608 9722+ ICM R2,B'0010',T191V1 0095B4 BF22 C1C0 09608 9723+ ICM R2,B'0010',T191V1 0095B8 BF22 C1C0 09608 9724+ ICM R2,B'0010',T191V1 0095BC BF22 C1C0 09608 9725+ ICM R2,B'0010',T191V1 0095C0 BF22 C1C0 09608 9726+ ICM R2,B'0010',T191V1 0095C4 BF22 C1C0 09608 9727+ ICM R2,B'0010',T191V1 0095C8 BF22 C1C0 09608 9728+ ICM R2,B'0010',T191V1 0095CC BF22 C1C0 09608 9729+ ICM R2,B'0010',T191V1 0095D0 BF22 C1C0 09608 9730+ ICM R2,B'0010',T191V1 0095D4 BF22 C1C0 09608 9731+ ICM R2,B'0010',T191V1 0095D8 BF22 C1C0 09608 9732+ ICM R2,B'0010',T191V1 0095DC BF22 C1C0 09608 9733+ ICM R2,B'0010',T191V1 0095E0 BF22 C1C0 09608 9734+ ICM R2,B'0010',T191V1 0095E4 BF22 C1C0 09608 9735+ ICM R2,B'0010',T191V1 0095E8 BF22 C1C0 09608 9736+ ICM R2,B'0010',T191V1 0095EC BF22 C1C0 09608 9737+ ICM R2,B'0010',T191V1 0095F0 BF22 C1C0 09608 9738+ ICM R2,B'0010',T191V1 0095F4 BF22 C1C0 09608 9739+ ICM R2,B'0010',T191V1 9740+* 0095F8 06FB 9741 BCTR R15,R11 9742 TSIMRET 0095FA 58F0 C1C8 09610 9743+ L R15,=A(SAVETST) R15 := current save area 0095FE 58DF 0004 00004 9744+ L R13,4(R15) get old save area back 009602 98EC D00C 0000C 9745+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009606 07FE 9746+ BR 14 RETURN 02000000 9747 * 009608 9748 DS 0F 009608 F2 9749 T191V1 DC C'2' 9750 TSIMEND 009610 9751+ LTORG 009610 00000458 9752 =A(SAVETST) 09614 9753+T191TEND EQU * 9754 * PAGE 180 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 9755 * Test 192 -- ICM R,m (2c) --------------------------------- 9756 * 9757 TSIMBEG T192,3000,100,1,C'ICM R,i,m (1100)' 9758+* 002B84 9759+TDSCDAT CSECT 002B88 9760+ DS 0D 9761+* 002B88 00009618 9762+T192TDSC DC A(T192) // TENTRY 002B8C 000001CC 9763+ DC A(T192TEND-T192) // TLENGTH 002B90 00000BB8 9764+ DC F'3000' // TLRCNT 002B94 00000064 9765+ DC F'100' // TIGCNT 002B98 00000001 9766+ DC F'1' // TLTYPE 001366 9767+TEXT CSECT 001366 E3F1F9F2 9768+SPTR0768 DC C'T192' 002B9C 9769+TDSCDAT CSECT 002B9C 9770+ DS 0F 002B9C 04001366 9771+ DC AL1(L'SPTR0768),AL3(SPTR0768) 00136A 9772+TEXT CSECT 00136A C9C3D440D96B896B 9773+SPTR0769 DC C'ICM R,i,m (1100)' 002BA0 9774+TDSCDAT CSECT 002BA0 9775+ DS 0F 002BA0 1000136A 9776+ DC AL1(L'SPTR0769),AL3(SPTR0769) 9777+* 004A9C 9778+TDSCTBL CSECT 04A9C 9779+T192TPTR EQU * 004A9C 00002B88 9780+ DC A(T192TDSC) enabled test 9781+* 009614 9782+TCODE CSECT 009618 9783+ DS 0D ensure double word alignment for test 009618 9784+T192 DS 0H 01650000 009618 90EC D00C 0000C 9785+ STM 14,12,12(13) SAVE REGISTERS 02950000 00961C 18CF 9786+ LR R12,R15 base register := entry address 09618 9787+ USING T192,R12 declare code base register 00961E 41B0 C020 09638 9788+ LA R11,T192L load loop target to R11 009622 58F0 C1C8 097E0 9789+ L R15,=A(SAVETST) R15 := current save area 009626 50DF 0004 00004 9790+ ST R13,4(R15) set back pointer in current save area 00962A 182D 9791+ LR R2,R13 remember callers save area 00962C 18DF 9792+ LR R13,R15 setup current save area 00962E 50D2 0008 00008 9793+ ST R13,8(R2) set forw pointer in callers save area 00000 9794+ USING TDSC,R1 declare TDSC base register 009632 58F0 1008 00008 9795+ L R15,TLRCNT load local repeat count to R15 9796+* 9797 * 009636 1722 9798 XR R2,R2 9799 T192L REPINS ICM,(R2,B'1100',T192V1) repeat: ICM R2,B'1100',T192V1 9800+* 9801+* build from sublist &ALIST a comma separated string &ARGS 9802+* 9803+* 9804+* 9805+* 9806+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 9807+* this allows to transfer the repeat count from last TDSCGEN call 9808+* 9809+* PAGE 181 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 09638 9810+T192L EQU * 9811+* 9812+* write a comment indicating what REPINS does (in case NOGEN in effect) 9813+* 9814+*,// REPINS: do 100 times: 9815+* 9816+* MNOTE requires that ' is doubled for expanded variables 9817+* thus build &MASTR as a copy of '&ARGS with ' doubled 9818+* 9819+* 9820+*,// ICM R2,B'1100',T192V1 9821+* 9822+* finally generate code: &ICNT copies of &CODE &ARGS 9823+* 009638 BF2C C1C0 097D8 9824+ ICM R2,B'1100',T192V1 00963C BF2C C1C0 097D8 9825+ ICM R2,B'1100',T192V1 009640 BF2C C1C0 097D8 9826+ ICM R2,B'1100',T192V1 009644 BF2C C1C0 097D8 9827+ ICM R2,B'1100',T192V1 009648 BF2C C1C0 097D8 9828+ ICM R2,B'1100',T192V1 00964C BF2C C1C0 097D8 9829+ ICM R2,B'1100',T192V1 009650 BF2C C1C0 097D8 9830+ ICM R2,B'1100',T192V1 009654 BF2C C1C0 097D8 9831+ ICM R2,B'1100',T192V1 009658 BF2C C1C0 097D8 9832+ ICM R2,B'1100',T192V1 00965C BF2C C1C0 097D8 9833+ ICM R2,B'1100',T192V1 009660 BF2C C1C0 097D8 9834+ ICM R2,B'1100',T192V1 009664 BF2C C1C0 097D8 9835+ ICM R2,B'1100',T192V1 009668 BF2C C1C0 097D8 9836+ ICM R2,B'1100',T192V1 00966C BF2C C1C0 097D8 9837+ ICM R2,B'1100',T192V1 009670 BF2C C1C0 097D8 9838+ ICM R2,B'1100',T192V1 009674 BF2C C1C0 097D8 9839+ ICM R2,B'1100',T192V1 009678 BF2C C1C0 097D8 9840+ ICM R2,B'1100',T192V1 00967C BF2C C1C0 097D8 9841+ ICM R2,B'1100',T192V1 009680 BF2C C1C0 097D8 9842+ ICM R2,B'1100',T192V1 009684 BF2C C1C0 097D8 9843+ ICM R2,B'1100',T192V1 009688 BF2C C1C0 097D8 9844+ ICM R2,B'1100',T192V1 00968C BF2C C1C0 097D8 9845+ ICM R2,B'1100',T192V1 009690 BF2C C1C0 097D8 9846+ ICM R2,B'1100',T192V1 009694 BF2C C1C0 097D8 9847+ ICM R2,B'1100',T192V1 009698 BF2C C1C0 097D8 9848+ ICM R2,B'1100',T192V1 00969C BF2C C1C0 097D8 9849+ ICM R2,B'1100',T192V1 0096A0 BF2C C1C0 097D8 9850+ ICM R2,B'1100',T192V1 0096A4 BF2C C1C0 097D8 9851+ ICM R2,B'1100',T192V1 0096A8 BF2C C1C0 097D8 9852+ ICM R2,B'1100',T192V1 0096AC BF2C C1C0 097D8 9853+ ICM R2,B'1100',T192V1 0096B0 BF2C C1C0 097D8 9854+ ICM R2,B'1100',T192V1 0096B4 BF2C C1C0 097D8 9855+ ICM R2,B'1100',T192V1 0096B8 BF2C C1C0 097D8 9856+ ICM R2,B'1100',T192V1 0096BC BF2C C1C0 097D8 9857+ ICM R2,B'1100',T192V1 0096C0 BF2C C1C0 097D8 9858+ ICM R2,B'1100',T192V1 0096C4 BF2C C1C0 097D8 9859+ ICM R2,B'1100',T192V1 0096C8 BF2C C1C0 097D8 9860+ ICM R2,B'1100',T192V1 0096CC BF2C C1C0 097D8 9861+ ICM R2,B'1100',T192V1 0096D0 BF2C C1C0 097D8 9862+ ICM R2,B'1100',T192V1 0096D4 BF2C C1C0 097D8 9863+ ICM R2,B'1100',T192V1 0096D8 BF2C C1C0 097D8 9864+ ICM R2,B'1100',T192V1 PAGE 182 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0096DC BF2C C1C0 097D8 9865+ ICM R2,B'1100',T192V1 0096E0 BF2C C1C0 097D8 9866+ ICM R2,B'1100',T192V1 0096E4 BF2C C1C0 097D8 9867+ ICM R2,B'1100',T192V1 0096E8 BF2C C1C0 097D8 9868+ ICM R2,B'1100',T192V1 0096EC BF2C C1C0 097D8 9869+ ICM R2,B'1100',T192V1 0096F0 BF2C C1C0 097D8 9870+ ICM R2,B'1100',T192V1 0096F4 BF2C C1C0 097D8 9871+ ICM R2,B'1100',T192V1 0096F8 BF2C C1C0 097D8 9872+ ICM R2,B'1100',T192V1 0096FC BF2C C1C0 097D8 9873+ ICM R2,B'1100',T192V1 009700 BF2C C1C0 097D8 9874+ ICM R2,B'1100',T192V1 009704 BF2C C1C0 097D8 9875+ ICM R2,B'1100',T192V1 009708 BF2C C1C0 097D8 9876+ ICM R2,B'1100',T192V1 00970C BF2C C1C0 097D8 9877+ ICM R2,B'1100',T192V1 009710 BF2C C1C0 097D8 9878+ ICM R2,B'1100',T192V1 009714 BF2C C1C0 097D8 9879+ ICM R2,B'1100',T192V1 009718 BF2C C1C0 097D8 9880+ ICM R2,B'1100',T192V1 00971C BF2C C1C0 097D8 9881+ ICM R2,B'1100',T192V1 009720 BF2C C1C0 097D8 9882+ ICM R2,B'1100',T192V1 009724 BF2C C1C0 097D8 9883+ ICM R2,B'1100',T192V1 009728 BF2C C1C0 097D8 9884+ ICM R2,B'1100',T192V1 00972C BF2C C1C0 097D8 9885+ ICM R2,B'1100',T192V1 009730 BF2C C1C0 097D8 9886+ ICM R2,B'1100',T192V1 009734 BF2C C1C0 097D8 9887+ ICM R2,B'1100',T192V1 009738 BF2C C1C0 097D8 9888+ ICM R2,B'1100',T192V1 00973C BF2C C1C0 097D8 9889+ ICM R2,B'1100',T192V1 009740 BF2C C1C0 097D8 9890+ ICM R2,B'1100',T192V1 009744 BF2C C1C0 097D8 9891+ ICM R2,B'1100',T192V1 009748 BF2C C1C0 097D8 9892+ ICM R2,B'1100',T192V1 00974C BF2C C1C0 097D8 9893+ ICM R2,B'1100',T192V1 009750 BF2C C1C0 097D8 9894+ ICM R2,B'1100',T192V1 009754 BF2C C1C0 097D8 9895+ ICM R2,B'1100',T192V1 009758 BF2C C1C0 097D8 9896+ ICM R2,B'1100',T192V1 00975C BF2C C1C0 097D8 9897+ ICM R2,B'1100',T192V1 009760 BF2C C1C0 097D8 9898+ ICM R2,B'1100',T192V1 009764 BF2C C1C0 097D8 9899+ ICM R2,B'1100',T192V1 009768 BF2C C1C0 097D8 9900+ ICM R2,B'1100',T192V1 00976C BF2C C1C0 097D8 9901+ ICM R2,B'1100',T192V1 009770 BF2C C1C0 097D8 9902+ ICM R2,B'1100',T192V1 009774 BF2C C1C0 097D8 9903+ ICM R2,B'1100',T192V1 009778 BF2C C1C0 097D8 9904+ ICM R2,B'1100',T192V1 00977C BF2C C1C0 097D8 9905+ ICM R2,B'1100',T192V1 009780 BF2C C1C0 097D8 9906+ ICM R2,B'1100',T192V1 009784 BF2C C1C0 097D8 9907+ ICM R2,B'1100',T192V1 009788 BF2C C1C0 097D8 9908+ ICM R2,B'1100',T192V1 00978C BF2C C1C0 097D8 9909+ ICM R2,B'1100',T192V1 009790 BF2C C1C0 097D8 9910+ ICM R2,B'1100',T192V1 009794 BF2C C1C0 097D8 9911+ ICM R2,B'1100',T192V1 009798 BF2C C1C0 097D8 9912+ ICM R2,B'1100',T192V1 00979C BF2C C1C0 097D8 9913+ ICM R2,B'1100',T192V1 0097A0 BF2C C1C0 097D8 9914+ ICM R2,B'1100',T192V1 0097A4 BF2C C1C0 097D8 9915+ ICM R2,B'1100',T192V1 0097A8 BF2C C1C0 097D8 9916+ ICM R2,B'1100',T192V1 0097AC BF2C C1C0 097D8 9917+ ICM R2,B'1100',T192V1 0097B0 BF2C C1C0 097D8 9918+ ICM R2,B'1100',T192V1 0097B4 BF2C C1C0 097D8 9919+ ICM R2,B'1100',T192V1 PAGE 183 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0097B8 BF2C C1C0 097D8 9920+ ICM R2,B'1100',T192V1 0097BC BF2C C1C0 097D8 9921+ ICM R2,B'1100',T192V1 0097C0 BF2C C1C0 097D8 9922+ ICM R2,B'1100',T192V1 0097C4 BF2C C1C0 097D8 9923+ ICM R2,B'1100',T192V1 9924+* 0097C8 06FB 9925 BCTR R15,R11 9926 TSIMRET 0097CA 58F0 C1C8 097E0 9927+ L R15,=A(SAVETST) R15 := current save area 0097CE 58DF 0004 00004 9928+ L R13,4(R15) get old save area back 0097D2 98EC D00C 0000C 9929+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0097D6 07FE 9930+ BR 14 RETURN 02000000 9931 * 0097D8 9932 DS 0F 0097D8 F0F1 9933 T192V1 DC C'01' 9934 TSIMEND 0097E0 9935+ LTORG 0097E0 00000458 9936 =A(SAVETST) 097E4 9937+T192TEND EQU * 9938 * 9939 * Test 193 -- ICM R,m (3c) --------------------------------- 9940 * 9941 TSIMBEG T193,4000,100,1,C'ICM R,i,m (0111)' 9942+* 002BA4 9943+TDSCDAT CSECT 002BA8 9944+ DS 0D 9945+* 002BA8 000097E8 9946+T193TDSC DC A(T193) // TENTRY 002BAC 000001CC 9947+ DC A(T193TEND-T193) // TLENGTH 002BB0 00000FA0 9948+ DC F'4000' // TLRCNT 002BB4 00000064 9949+ DC F'100' // TIGCNT 002BB8 00000001 9950+ DC F'1' // TLTYPE 00137A 9951+TEXT CSECT 00137A E3F1F9F3 9952+SPTR0780 DC C'T193' 002BBC 9953+TDSCDAT CSECT 002BBC 9954+ DS 0F 002BBC 0400137A 9955+ DC AL1(L'SPTR0780),AL3(SPTR0780) 00137E 9956+TEXT CSECT 00137E C9C3D440D96B896B 9957+SPTR0781 DC C'ICM R,i,m (0111)' 002BC0 9958+TDSCDAT CSECT 002BC0 9959+ DS 0F 002BC0 1000137E 9960+ DC AL1(L'SPTR0781),AL3(SPTR0781) 9961+* 004AA0 9962+TDSCTBL CSECT 04AA0 9963+T193TPTR EQU * 004AA0 00002BA8 9964+ DC A(T193TDSC) enabled test 9965+* 0097E4 9966+TCODE CSECT 0097E8 9967+ DS 0D ensure double word alignment for test 0097E8 9968+T193 DS 0H 01650000 0097E8 90EC D00C 0000C 9969+ STM 14,12,12(13) SAVE REGISTERS 02950000 0097EC 18CF 9970+ LR R12,R15 base register := entry address 097E8 9971+ USING T193,R12 declare code base register 0097EE 41B0 C020 09808 9972+ LA R11,T193L load loop target to R11 0097F2 58F0 C1C8 099B0 9973+ L R15,=A(SAVETST) R15 := current save area 0097F6 50DF 0004 00004 9974+ ST R13,4(R15) set back pointer in current save area PAGE 184 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0097FA 182D 9975+ LR R2,R13 remember callers save area 0097FC 18DF 9976+ LR R13,R15 setup current save area 0097FE 50D2 0008 00008 9977+ ST R13,8(R2) set forw pointer in callers save area 00000 9978+ USING TDSC,R1 declare TDSC base register 009802 58F0 1008 00008 9979+ L R15,TLRCNT load local repeat count to R15 9980+* 9981 * 009806 1722 9982 XR R2,R2 9983 T193L REPINS ICM,(R2,B'0111',T193V1) repeat: ICM R2,B'0111',T193V1 9984+* 9985+* build from sublist &ALIST a comma separated string &ARGS 9986+* 9987+* 9988+* 9989+* 9990+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 9991+* this allows to transfer the repeat count from last TDSCGEN call 9992+* 9993+* 09808 9994+T193L EQU * 9995+* 9996+* write a comment indicating what REPINS does (in case NOGEN in effect) 9997+* 9998+*,// REPINS: do 100 times: 9999+* 10000+* MNOTE requires that ' is doubled for expanded variables 10001+* thus build &MASTR as a copy of '&ARGS with ' doubled 10002+* 10003+* 10004+*,// ICM R2,B'0111',T193V1 10005+* 10006+* finally generate code: &ICNT copies of &CODE &ARGS 10007+* 009808 BF27 C1C0 099A8 10008+ ICM R2,B'0111',T193V1 00980C BF27 C1C0 099A8 10009+ ICM R2,B'0111',T193V1 009810 BF27 C1C0 099A8 10010+ ICM R2,B'0111',T193V1 009814 BF27 C1C0 099A8 10011+ ICM R2,B'0111',T193V1 009818 BF27 C1C0 099A8 10012+ ICM R2,B'0111',T193V1 00981C BF27 C1C0 099A8 10013+ ICM R2,B'0111',T193V1 009820 BF27 C1C0 099A8 10014+ ICM R2,B'0111',T193V1 009824 BF27 C1C0 099A8 10015+ ICM R2,B'0111',T193V1 009828 BF27 C1C0 099A8 10016+ ICM R2,B'0111',T193V1 00982C BF27 C1C0 099A8 10017+ ICM R2,B'0111',T193V1 009830 BF27 C1C0 099A8 10018+ ICM R2,B'0111',T193V1 009834 BF27 C1C0 099A8 10019+ ICM R2,B'0111',T193V1 009838 BF27 C1C0 099A8 10020+ ICM R2,B'0111',T193V1 00983C BF27 C1C0 099A8 10021+ ICM R2,B'0111',T193V1 009840 BF27 C1C0 099A8 10022+ ICM R2,B'0111',T193V1 009844 BF27 C1C0 099A8 10023+ ICM R2,B'0111',T193V1 009848 BF27 C1C0 099A8 10024+ ICM R2,B'0111',T193V1 00984C BF27 C1C0 099A8 10025+ ICM R2,B'0111',T193V1 009850 BF27 C1C0 099A8 10026+ ICM R2,B'0111',T193V1 009854 BF27 C1C0 099A8 10027+ ICM R2,B'0111',T193V1 009858 BF27 C1C0 099A8 10028+ ICM R2,B'0111',T193V1 00985C BF27 C1C0 099A8 10029+ ICM R2,B'0111',T193V1 PAGE 185 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009860 BF27 C1C0 099A8 10030+ ICM R2,B'0111',T193V1 009864 BF27 C1C0 099A8 10031+ ICM R2,B'0111',T193V1 009868 BF27 C1C0 099A8 10032+ ICM R2,B'0111',T193V1 00986C BF27 C1C0 099A8 10033+ ICM R2,B'0111',T193V1 009870 BF27 C1C0 099A8 10034+ ICM R2,B'0111',T193V1 009874 BF27 C1C0 099A8 10035+ ICM R2,B'0111',T193V1 009878 BF27 C1C0 099A8 10036+ ICM R2,B'0111',T193V1 00987C BF27 C1C0 099A8 10037+ ICM R2,B'0111',T193V1 009880 BF27 C1C0 099A8 10038+ ICM R2,B'0111',T193V1 009884 BF27 C1C0 099A8 10039+ ICM R2,B'0111',T193V1 009888 BF27 C1C0 099A8 10040+ ICM R2,B'0111',T193V1 00988C BF27 C1C0 099A8 10041+ ICM R2,B'0111',T193V1 009890 BF27 C1C0 099A8 10042+ ICM R2,B'0111',T193V1 009894 BF27 C1C0 099A8 10043+ ICM R2,B'0111',T193V1 009898 BF27 C1C0 099A8 10044+ ICM R2,B'0111',T193V1 00989C BF27 C1C0 099A8 10045+ ICM R2,B'0111',T193V1 0098A0 BF27 C1C0 099A8 10046+ ICM R2,B'0111',T193V1 0098A4 BF27 C1C0 099A8 10047+ ICM R2,B'0111',T193V1 0098A8 BF27 C1C0 099A8 10048+ ICM R2,B'0111',T193V1 0098AC BF27 C1C0 099A8 10049+ ICM R2,B'0111',T193V1 0098B0 BF27 C1C0 099A8 10050+ ICM R2,B'0111',T193V1 0098B4 BF27 C1C0 099A8 10051+ ICM R2,B'0111',T193V1 0098B8 BF27 C1C0 099A8 10052+ ICM R2,B'0111',T193V1 0098BC BF27 C1C0 099A8 10053+ ICM R2,B'0111',T193V1 0098C0 BF27 C1C0 099A8 10054+ ICM R2,B'0111',T193V1 0098C4 BF27 C1C0 099A8 10055+ ICM R2,B'0111',T193V1 0098C8 BF27 C1C0 099A8 10056+ ICM R2,B'0111',T193V1 0098CC BF27 C1C0 099A8 10057+ ICM R2,B'0111',T193V1 0098D0 BF27 C1C0 099A8 10058+ ICM R2,B'0111',T193V1 0098D4 BF27 C1C0 099A8 10059+ ICM R2,B'0111',T193V1 0098D8 BF27 C1C0 099A8 10060+ ICM R2,B'0111',T193V1 0098DC BF27 C1C0 099A8 10061+ ICM R2,B'0111',T193V1 0098E0 BF27 C1C0 099A8 10062+ ICM R2,B'0111',T193V1 0098E4 BF27 C1C0 099A8 10063+ ICM R2,B'0111',T193V1 0098E8 BF27 C1C0 099A8 10064+ ICM R2,B'0111',T193V1 0098EC BF27 C1C0 099A8 10065+ ICM R2,B'0111',T193V1 0098F0 BF27 C1C0 099A8 10066+ ICM R2,B'0111',T193V1 0098F4 BF27 C1C0 099A8 10067+ ICM R2,B'0111',T193V1 0098F8 BF27 C1C0 099A8 10068+ ICM R2,B'0111',T193V1 0098FC BF27 C1C0 099A8 10069+ ICM R2,B'0111',T193V1 009900 BF27 C1C0 099A8 10070+ ICM R2,B'0111',T193V1 009904 BF27 C1C0 099A8 10071+ ICM R2,B'0111',T193V1 009908 BF27 C1C0 099A8 10072+ ICM R2,B'0111',T193V1 00990C BF27 C1C0 099A8 10073+ ICM R2,B'0111',T193V1 009910 BF27 C1C0 099A8 10074+ ICM R2,B'0111',T193V1 009914 BF27 C1C0 099A8 10075+ ICM R2,B'0111',T193V1 009918 BF27 C1C0 099A8 10076+ ICM R2,B'0111',T193V1 00991C BF27 C1C0 099A8 10077+ ICM R2,B'0111',T193V1 009920 BF27 C1C0 099A8 10078+ ICM R2,B'0111',T193V1 009924 BF27 C1C0 099A8 10079+ ICM R2,B'0111',T193V1 009928 BF27 C1C0 099A8 10080+ ICM R2,B'0111',T193V1 00992C BF27 C1C0 099A8 10081+ ICM R2,B'0111',T193V1 009930 BF27 C1C0 099A8 10082+ ICM R2,B'0111',T193V1 009934 BF27 C1C0 099A8 10083+ ICM R2,B'0111',T193V1 009938 BF27 C1C0 099A8 10084+ ICM R2,B'0111',T193V1 PAGE 186 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00993C BF27 C1C0 099A8 10085+ ICM R2,B'0111',T193V1 009940 BF27 C1C0 099A8 10086+ ICM R2,B'0111',T193V1 009944 BF27 C1C0 099A8 10087+ ICM R2,B'0111',T193V1 009948 BF27 C1C0 099A8 10088+ ICM R2,B'0111',T193V1 00994C BF27 C1C0 099A8 10089+ ICM R2,B'0111',T193V1 009950 BF27 C1C0 099A8 10090+ ICM R2,B'0111',T193V1 009954 BF27 C1C0 099A8 10091+ ICM R2,B'0111',T193V1 009958 BF27 C1C0 099A8 10092+ ICM R2,B'0111',T193V1 00995C BF27 C1C0 099A8 10093+ ICM R2,B'0111',T193V1 009960 BF27 C1C0 099A8 10094+ ICM R2,B'0111',T193V1 009964 BF27 C1C0 099A8 10095+ ICM R2,B'0111',T193V1 009968 BF27 C1C0 099A8 10096+ ICM R2,B'0111',T193V1 00996C BF27 C1C0 099A8 10097+ ICM R2,B'0111',T193V1 009970 BF27 C1C0 099A8 10098+ ICM R2,B'0111',T193V1 009974 BF27 C1C0 099A8 10099+ ICM R2,B'0111',T193V1 009978 BF27 C1C0 099A8 10100+ ICM R2,B'0111',T193V1 00997C BF27 C1C0 099A8 10101+ ICM R2,B'0111',T193V1 009980 BF27 C1C0 099A8 10102+ ICM R2,B'0111',T193V1 009984 BF27 C1C0 099A8 10103+ ICM R2,B'0111',T193V1 009988 BF27 C1C0 099A8 10104+ ICM R2,B'0111',T193V1 00998C BF27 C1C0 099A8 10105+ ICM R2,B'0111',T193V1 009990 BF27 C1C0 099A8 10106+ ICM R2,B'0111',T193V1 009994 BF27 C1C0 099A8 10107+ ICM R2,B'0111',T193V1 10108+* 009998 06FB 10109 BCTR R15,R11 10110 TSIMRET 00999A 58F0 C1C8 099B0 10111+ L R15,=A(SAVETST) R15 := current save area 00999E 58DF 0004 00004 10112+ L R13,4(R15) get old save area back 0099A2 98EC D00C 0000C 10113+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0099A6 07FE 10114+ BR 14 RETURN 02000000 10115 * 0099A8 10116 DS 0F 0099A8 F1F2F3 10117 T193V1 DC C'123' 10118 TSIMEND 0099B0 10119+ LTORG 0099B0 00000458 10120 =A(SAVETST) 099B4 10121+T193TEND EQU * 10122 * 10123 * Test 2xx -- binary/logical ==================================== 10124 * 10125 * Test 20x -- arithmetic/logical add/sub =================== 10126 * 10127 * Test 200 -- AR R,R --------------------------------------- 10128 * 10129 TSIMBEG T200,14000,100,1,C'AR R,R' 10130+* 002BC4 10131+TDSCDAT CSECT 002BC8 10132+ DS 0D 10133+* 002BC8 000099B8 10134+T200TDSC DC A(T200) // TENTRY 002BCC 00000104 10135+ DC A(T200TEND-T200) // TLENGTH 002BD0 000036B0 10136+ DC F'14000' // TLRCNT 002BD4 00000064 10137+ DC F'100' // TIGCNT 002BD8 00000001 10138+ DC F'1' // TLTYPE 00138E 10139+TEXT CSECT PAGE 187 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00138E E3F2F0F0 10140+SPTR0792 DC C'T200' 002BDC 10141+TDSCDAT CSECT 002BDC 10142+ DS 0F 002BDC 0400138E 10143+ DC AL1(L'SPTR0792),AL3(SPTR0792) 001392 10144+TEXT CSECT 001392 C1D940D96BD9 10145+SPTR0793 DC C'AR R,R' 002BE0 10146+TDSCDAT CSECT 002BE0 10147+ DS 0F 002BE0 06001392 10148+ DC AL1(L'SPTR0793),AL3(SPTR0793) 10149+* 004AA4 10150+TDSCTBL CSECT 04AA4 10151+T200TPTR EQU * 004AA4 00002BC8 10152+ DC A(T200TDSC) enabled test 10153+* 0099B4 10154+TCODE CSECT 0099B8 10155+ DS 0D ensure double word alignment for test 0099B8 10156+T200 DS 0H 01650000 0099B8 90EC D00C 0000C 10157+ STM 14,12,12(13) SAVE REGISTERS 02950000 0099BC 18CF 10158+ LR R12,R15 base register := entry address 099B8 10159+ USING T200,R12 declare code base register 0099BE 41B0 C024 099DC 10160+ LA R11,T200L load loop target to R11 0099C2 58F0 C100 09AB8 10161+ L R15,=A(SAVETST) R15 := current save area 0099C6 50DF 0004 00004 10162+ ST R13,4(R15) set back pointer in current save area 0099CA 182D 10163+ LR R2,R13 remember callers save area 0099CC 18DF 10164+ LR R13,R15 setup current save area 0099CE 50D2 0008 00008 10165+ ST R13,8(R2) set forw pointer in callers save area 00000 10166+ USING TDSC,R1 declare TDSC base register 0099D2 58F0 1008 00008 10167+ L R15,TLRCNT load local repeat count to R15 10168+* 10169 * 0099D6 1722 10170 XR R2,R2 0099D8 4130 0001 00001 10171 LA R3,1 10172 T200L REPINS AR,(R2,R3) repeat: AR R2,R3 10173+* 10174+* build from sublist &ALIST a comma separated string &ARGS 10175+* 10176+* 10177+* 10178+* 10179+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10180+* this allows to transfer the repeat count from last TDSCGEN call 10181+* 10182+* 099DC 10183+T200L EQU * 10184+* 10185+* write a comment indicating what REPINS does (in case NOGEN in effect) 10186+* 10187+*,// REPINS: do 100 times: 10188+* 10189+* MNOTE requires that ' is doubled for expanded variables 10190+* thus build &MASTR as a copy of '&ARGS with ' doubled 10191+* 10192+* 10193+*,// AR R2,R3 10194+* PAGE 188 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 10195+* finally generate code: &ICNT copies of &CODE &ARGS 10196+* 0099DC 1A23 10197+ AR R2,R3 0099DE 1A23 10198+ AR R2,R3 0099E0 1A23 10199+ AR R2,R3 0099E2 1A23 10200+ AR R2,R3 0099E4 1A23 10201+ AR R2,R3 0099E6 1A23 10202+ AR R2,R3 0099E8 1A23 10203+ AR R2,R3 0099EA 1A23 10204+ AR R2,R3 0099EC 1A23 10205+ AR R2,R3 0099EE 1A23 10206+ AR R2,R3 0099F0 1A23 10207+ AR R2,R3 0099F2 1A23 10208+ AR R2,R3 0099F4 1A23 10209+ AR R2,R3 0099F6 1A23 10210+ AR R2,R3 0099F8 1A23 10211+ AR R2,R3 0099FA 1A23 10212+ AR R2,R3 0099FC 1A23 10213+ AR R2,R3 0099FE 1A23 10214+ AR R2,R3 009A00 1A23 10215+ AR R2,R3 009A02 1A23 10216+ AR R2,R3 009A04 1A23 10217+ AR R2,R3 009A06 1A23 10218+ AR R2,R3 009A08 1A23 10219+ AR R2,R3 009A0A 1A23 10220+ AR R2,R3 009A0C 1A23 10221+ AR R2,R3 009A0E 1A23 10222+ AR R2,R3 009A10 1A23 10223+ AR R2,R3 009A12 1A23 10224+ AR R2,R3 009A14 1A23 10225+ AR R2,R3 009A16 1A23 10226+ AR R2,R3 009A18 1A23 10227+ AR R2,R3 009A1A 1A23 10228+ AR R2,R3 009A1C 1A23 10229+ AR R2,R3 009A1E 1A23 10230+ AR R2,R3 009A20 1A23 10231+ AR R2,R3 009A22 1A23 10232+ AR R2,R3 009A24 1A23 10233+ AR R2,R3 009A26 1A23 10234+ AR R2,R3 009A28 1A23 10235+ AR R2,R3 009A2A 1A23 10236+ AR R2,R3 009A2C 1A23 10237+ AR R2,R3 009A2E 1A23 10238+ AR R2,R3 009A30 1A23 10239+ AR R2,R3 009A32 1A23 10240+ AR R2,R3 009A34 1A23 10241+ AR R2,R3 009A36 1A23 10242+ AR R2,R3 009A38 1A23 10243+ AR R2,R3 009A3A 1A23 10244+ AR R2,R3 009A3C 1A23 10245+ AR R2,R3 009A3E 1A23 10246+ AR R2,R3 009A40 1A23 10247+ AR R2,R3 009A42 1A23 10248+ AR R2,R3 009A44 1A23 10249+ AR R2,R3 PAGE 189 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009A46 1A23 10250+ AR R2,R3 009A48 1A23 10251+ AR R2,R3 009A4A 1A23 10252+ AR R2,R3 009A4C 1A23 10253+ AR R2,R3 009A4E 1A23 10254+ AR R2,R3 009A50 1A23 10255+ AR R2,R3 009A52 1A23 10256+ AR R2,R3 009A54 1A23 10257+ AR R2,R3 009A56 1A23 10258+ AR R2,R3 009A58 1A23 10259+ AR R2,R3 009A5A 1A23 10260+ AR R2,R3 009A5C 1A23 10261+ AR R2,R3 009A5E 1A23 10262+ AR R2,R3 009A60 1A23 10263+ AR R2,R3 009A62 1A23 10264+ AR R2,R3 009A64 1A23 10265+ AR R2,R3 009A66 1A23 10266+ AR R2,R3 009A68 1A23 10267+ AR R2,R3 009A6A 1A23 10268+ AR R2,R3 009A6C 1A23 10269+ AR R2,R3 009A6E 1A23 10270+ AR R2,R3 009A70 1A23 10271+ AR R2,R3 009A72 1A23 10272+ AR R2,R3 009A74 1A23 10273+ AR R2,R3 009A76 1A23 10274+ AR R2,R3 009A78 1A23 10275+ AR R2,R3 009A7A 1A23 10276+ AR R2,R3 009A7C 1A23 10277+ AR R2,R3 009A7E 1A23 10278+ AR R2,R3 009A80 1A23 10279+ AR R2,R3 009A82 1A23 10280+ AR R2,R3 009A84 1A23 10281+ AR R2,R3 009A86 1A23 10282+ AR R2,R3 009A88 1A23 10283+ AR R2,R3 009A8A 1A23 10284+ AR R2,R3 009A8C 1A23 10285+ AR R2,R3 009A8E 1A23 10286+ AR R2,R3 009A90 1A23 10287+ AR R2,R3 009A92 1A23 10288+ AR R2,R3 009A94 1A23 10289+ AR R2,R3 009A96 1A23 10290+ AR R2,R3 009A98 1A23 10291+ AR R2,R3 009A9A 1A23 10292+ AR R2,R3 009A9C 1A23 10293+ AR R2,R3 009A9E 1A23 10294+ AR R2,R3 009AA0 1A23 10295+ AR R2,R3 009AA2 1A23 10296+ AR R2,R3 10297+* 009AA4 06FB 10298 BCTR R15,R11 10299 TSIMRET 009AA6 58F0 C100 09AB8 10300+ L R15,=A(SAVETST) R15 := current save area 009AAA 58DF 0004 00004 10301+ L R13,4(R15) get old save area back 009AAE 98EC D00C 0000C 10302+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009AB2 07FE 10303+ BR 14 RETURN 02000000 10304 TSIMEND PAGE 190 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009AB8 10305+ LTORG 009AB8 00000458 10306 =A(SAVETST) 09ABC 10307+T200TEND EQU * 10308 * 10309 * Test 201 -- A R,m ---------------------------------------- 10310 * 10311 TSIMBEG T201,10000,50,1,C'A R,m' 10312+* 002BE4 10313+TDSCDAT CSECT 002BE8 10314+ DS 0D 10315+* 002BE8 00009AC0 10316+T201TDSC DC A(T201) // TENTRY 002BEC 00000100 10317+ DC A(T201TEND-T201) // TLENGTH 002BF0 00002710 10318+ DC F'10000' // TLRCNT 002BF4 00000032 10319+ DC F'50' // TIGCNT 002BF8 00000001 10320+ DC F'1' // TLTYPE 001398 10321+TEXT CSECT 001398 E3F2F0F1 10322+SPTR0804 DC C'T201' 002BFC 10323+TDSCDAT CSECT 002BFC 10324+ DS 0F 002BFC 04001398 10325+ DC AL1(L'SPTR0804),AL3(SPTR0804) 00139C 10326+TEXT CSECT 00139C C140D96B94 10327+SPTR0805 DC C'A R,m' 002C00 10328+TDSCDAT CSECT 002C00 10329+ DS 0F 002C00 0500139C 10330+ DC AL1(L'SPTR0805),AL3(SPTR0805) 10331+* 004AA8 10332+TDSCTBL CSECT 04AA8 10333+T201TPTR EQU * 004AA8 00002BE8 10334+ DC A(T201TDSC) enabled test 10335+* 009ABC 10336+TCODE CSECT 009AC0 10337+ DS 0D ensure double word alignment for test 009AC0 10338+T201 DS 0H 01650000 009AC0 90EC D00C 0000C 10339+ STM 14,12,12(13) SAVE REGISTERS 02950000 009AC4 18CF 10340+ LR R12,R15 base register := entry address 09AC0 10341+ USING T201,R12 declare code base register 009AC6 41B0 C020 09AE0 10342+ LA R11,T201L load loop target to R11 009ACA 58F0 C0F8 09BB8 10343+ L R15,=A(SAVETST) R15 := current save area 009ACE 50DF 0004 00004 10344+ ST R13,4(R15) set back pointer in current save area 009AD2 182D 10345+ LR R2,R13 remember callers save area 009AD4 18DF 10346+ LR R13,R15 setup current save area 009AD6 50D2 0008 00008 10347+ ST R13,8(R2) set forw pointer in callers save area 00000 10348+ USING TDSC,R1 declare TDSC base register 009ADA 58F0 1008 00008 10349+ L R15,TLRCNT load local repeat count to R15 10350+* 10351 * 009ADE 1722 10352 XR R2,R2 10353 T201L REPINS A,(R2,=F'1') repeat: A R2,=F'1' 10354+* 10355+* build from sublist &ALIST a comma separated string &ARGS 10356+* 10357+* 10358+* 10359+* PAGE 191 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 10360+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10361+* this allows to transfer the repeat count from last TDSCGEN call 10362+* 10363+* 09AE0 10364+T201L EQU * 10365+* 10366+* write a comment indicating what REPINS does (in case NOGEN in effect) 10367+* 10368+*,// REPINS: do 50 times: 10369+* 10370+* MNOTE requires that ' is doubled for expanded variables 10371+* thus build &MASTR as a copy of '&ARGS with ' doubled 10372+* 10373+* 10374+*,// A R2,=F'1' 10375+* 10376+* finally generate code: &ICNT copies of &CODE &ARGS 10377+* 009AE0 5A20 C0FC 09BBC 10378+ A R2,=F'1' 009AE4 5A20 C0FC 09BBC 10379+ A R2,=F'1' 009AE8 5A20 C0FC 09BBC 10380+ A R2,=F'1' 009AEC 5A20 C0FC 09BBC 10381+ A R2,=F'1' 009AF0 5A20 C0FC 09BBC 10382+ A R2,=F'1' 009AF4 5A20 C0FC 09BBC 10383+ A R2,=F'1' 009AF8 5A20 C0FC 09BBC 10384+ A R2,=F'1' 009AFC 5A20 C0FC 09BBC 10385+ A R2,=F'1' 009B00 5A20 C0FC 09BBC 10386+ A R2,=F'1' 009B04 5A20 C0FC 09BBC 10387+ A R2,=F'1' 009B08 5A20 C0FC 09BBC 10388+ A R2,=F'1' 009B0C 5A20 C0FC 09BBC 10389+ A R2,=F'1' 009B10 5A20 C0FC 09BBC 10390+ A R2,=F'1' 009B14 5A20 C0FC 09BBC 10391+ A R2,=F'1' 009B18 5A20 C0FC 09BBC 10392+ A R2,=F'1' 009B1C 5A20 C0FC 09BBC 10393+ A R2,=F'1' 009B20 5A20 C0FC 09BBC 10394+ A R2,=F'1' 009B24 5A20 C0FC 09BBC 10395+ A R2,=F'1' 009B28 5A20 C0FC 09BBC 10396+ A R2,=F'1' 009B2C 5A20 C0FC 09BBC 10397+ A R2,=F'1' 009B30 5A20 C0FC 09BBC 10398+ A R2,=F'1' 009B34 5A20 C0FC 09BBC 10399+ A R2,=F'1' 009B38 5A20 C0FC 09BBC 10400+ A R2,=F'1' 009B3C 5A20 C0FC 09BBC 10401+ A R2,=F'1' 009B40 5A20 C0FC 09BBC 10402+ A R2,=F'1' 009B44 5A20 C0FC 09BBC 10403+ A R2,=F'1' 009B48 5A20 C0FC 09BBC 10404+ A R2,=F'1' 009B4C 5A20 C0FC 09BBC 10405+ A R2,=F'1' 009B50 5A20 C0FC 09BBC 10406+ A R2,=F'1' 009B54 5A20 C0FC 09BBC 10407+ A R2,=F'1' 009B58 5A20 C0FC 09BBC 10408+ A R2,=F'1' 009B5C 5A20 C0FC 09BBC 10409+ A R2,=F'1' 009B60 5A20 C0FC 09BBC 10410+ A R2,=F'1' 009B64 5A20 C0FC 09BBC 10411+ A R2,=F'1' 009B68 5A20 C0FC 09BBC 10412+ A R2,=F'1' 009B6C 5A20 C0FC 09BBC 10413+ A R2,=F'1' 009B70 5A20 C0FC 09BBC 10414+ A R2,=F'1' PAGE 192 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009B74 5A20 C0FC 09BBC 10415+ A R2,=F'1' 009B78 5A20 C0FC 09BBC 10416+ A R2,=F'1' 009B7C 5A20 C0FC 09BBC 10417+ A R2,=F'1' 009B80 5A20 C0FC 09BBC 10418+ A R2,=F'1' 009B84 5A20 C0FC 09BBC 10419+ A R2,=F'1' 009B88 5A20 C0FC 09BBC 10420+ A R2,=F'1' 009B8C 5A20 C0FC 09BBC 10421+ A R2,=F'1' 009B90 5A20 C0FC 09BBC 10422+ A R2,=F'1' 009B94 5A20 C0FC 09BBC 10423+ A R2,=F'1' 009B98 5A20 C0FC 09BBC 10424+ A R2,=F'1' 009B9C 5A20 C0FC 09BBC 10425+ A R2,=F'1' 009BA0 5A20 C0FC 09BBC 10426+ A R2,=F'1' 009BA4 5A20 C0FC 09BBC 10427+ A R2,=F'1' 10428+* 009BA8 06FB 10429 BCTR R15,R11 10430 TSIMRET 009BAA 58F0 C0F8 09BB8 10431+ L R15,=A(SAVETST) R15 := current save area 009BAE 58DF 0004 00004 10432+ L R13,4(R15) get old save area back 009BB2 98EC D00C 0000C 10433+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009BB6 07FE 10434+ BR 14 RETURN 02000000 10435 TSIMEND 009BB8 10436+ LTORG 009BB8 00000458 10437 =A(SAVETST) 009BBC 00000001 10438 =F'1' 09BC0 10439+T201TEND EQU * 10440 * 10441 * Test 202 -- AH R,m --------------------------------------- 10442 TSIMBEG T202,10000,50,1,C'AH R,m' 10443+* 002C04 10444+TDSCDAT CSECT 002C08 10445+ DS 0D 10446+* 002C08 00009BC0 10447+T202TDSC DC A(T202) // TENTRY 002C0C 000000FE 10448+ DC A(T202TEND-T202) // TLENGTH 002C10 00002710 10449+ DC F'10000' // TLRCNT 002C14 00000032 10450+ DC F'50' // TIGCNT 002C18 00000001 10451+ DC F'1' // TLTYPE 0013A1 10452+TEXT CSECT 0013A1 E3F2F0F2 10453+SPTR0816 DC C'T202' 002C1C 10454+TDSCDAT CSECT 002C1C 10455+ DS 0F 002C1C 040013A1 10456+ DC AL1(L'SPTR0816),AL3(SPTR0816) 0013A5 10457+TEXT CSECT 0013A5 C1C840D96B94 10458+SPTR0817 DC C'AH R,m' 002C20 10459+TDSCDAT CSECT 002C20 10460+ DS 0F 002C20 060013A5 10461+ DC AL1(L'SPTR0817),AL3(SPTR0817) 10462+* 004AAC 10463+TDSCTBL CSECT 04AAC 10464+T202TPTR EQU * 004AAC 00002C08 10465+ DC A(T202TDSC) enabled test 10466+* 009BC0 10467+TCODE CSECT 009BC0 10468+ DS 0D ensure double word alignment for test 009BC0 10469+T202 DS 0H 01650000 PAGE 193 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009BC0 90EC D00C 0000C 10470+ STM 14,12,12(13) SAVE REGISTERS 02950000 009BC4 18CF 10471+ LR R12,R15 base register := entry address 09BC0 10472+ USING T202,R12 declare code base register 009BC6 41B0 C020 09BE0 10473+ LA R11,T202L load loop target to R11 009BCA 58F0 C0F8 09CB8 10474+ L R15,=A(SAVETST) R15 := current save area 009BCE 50DF 0004 00004 10475+ ST R13,4(R15) set back pointer in current save area 009BD2 182D 10476+ LR R2,R13 remember callers save area 009BD4 18DF 10477+ LR R13,R15 setup current save area 009BD6 50D2 0008 00008 10478+ ST R13,8(R2) set forw pointer in callers save area 00000 10479+ USING TDSC,R1 declare TDSC base register 009BDA 58F0 1008 00008 10480+ L R15,TLRCNT load local repeat count to R15 10481+* 10482 * 009BDE 1722 10483 XR R2,R2 10484 T202L REPINS AH,(R2,=H'1') repeat: AH R2,=H'1' 10485+* 10486+* build from sublist &ALIST a comma separated string &ARGS 10487+* 10488+* 10489+* 10490+* 10491+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10492+* this allows to transfer the repeat count from last TDSCGEN call 10493+* 10494+* 09BE0 10495+T202L EQU * 10496+* 10497+* write a comment indicating what REPINS does (in case NOGEN in effect) 10498+* 10499+*,// REPINS: do 50 times: 10500+* 10501+* MNOTE requires that ' is doubled for expanded variables 10502+* thus build &MASTR as a copy of '&ARGS with ' doubled 10503+* 10504+* 10505+*,// AH R2,=H'1' 10506+* 10507+* finally generate code: &ICNT copies of &CODE &ARGS 10508+* 009BE0 4A20 C0FC 09CBC 10509+ AH R2,=H'1' 009BE4 4A20 C0FC 09CBC 10510+ AH R2,=H'1' 009BE8 4A20 C0FC 09CBC 10511+ AH R2,=H'1' 009BEC 4A20 C0FC 09CBC 10512+ AH R2,=H'1' 009BF0 4A20 C0FC 09CBC 10513+ AH R2,=H'1' 009BF4 4A20 C0FC 09CBC 10514+ AH R2,=H'1' 009BF8 4A20 C0FC 09CBC 10515+ AH R2,=H'1' 009BFC 4A20 C0FC 09CBC 10516+ AH R2,=H'1' 009C00 4A20 C0FC 09CBC 10517+ AH R2,=H'1' 009C04 4A20 C0FC 09CBC 10518+ AH R2,=H'1' 009C08 4A20 C0FC 09CBC 10519+ AH R2,=H'1' 009C0C 4A20 C0FC 09CBC 10520+ AH R2,=H'1' 009C10 4A20 C0FC 09CBC 10521+ AH R2,=H'1' 009C14 4A20 C0FC 09CBC 10522+ AH R2,=H'1' 009C18 4A20 C0FC 09CBC 10523+ AH R2,=H'1' 009C1C 4A20 C0FC 09CBC 10524+ AH R2,=H'1' PAGE 194 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009C20 4A20 C0FC 09CBC 10525+ AH R2,=H'1' 009C24 4A20 C0FC 09CBC 10526+ AH R2,=H'1' 009C28 4A20 C0FC 09CBC 10527+ AH R2,=H'1' 009C2C 4A20 C0FC 09CBC 10528+ AH R2,=H'1' 009C30 4A20 C0FC 09CBC 10529+ AH R2,=H'1' 009C34 4A20 C0FC 09CBC 10530+ AH R2,=H'1' 009C38 4A20 C0FC 09CBC 10531+ AH R2,=H'1' 009C3C 4A20 C0FC 09CBC 10532+ AH R2,=H'1' 009C40 4A20 C0FC 09CBC 10533+ AH R2,=H'1' 009C44 4A20 C0FC 09CBC 10534+ AH R2,=H'1' 009C48 4A20 C0FC 09CBC 10535+ AH R2,=H'1' 009C4C 4A20 C0FC 09CBC 10536+ AH R2,=H'1' 009C50 4A20 C0FC 09CBC 10537+ AH R2,=H'1' 009C54 4A20 C0FC 09CBC 10538+ AH R2,=H'1' 009C58 4A20 C0FC 09CBC 10539+ AH R2,=H'1' 009C5C 4A20 C0FC 09CBC 10540+ AH R2,=H'1' 009C60 4A20 C0FC 09CBC 10541+ AH R2,=H'1' 009C64 4A20 C0FC 09CBC 10542+ AH R2,=H'1' 009C68 4A20 C0FC 09CBC 10543+ AH R2,=H'1' 009C6C 4A20 C0FC 09CBC 10544+ AH R2,=H'1' 009C70 4A20 C0FC 09CBC 10545+ AH R2,=H'1' 009C74 4A20 C0FC 09CBC 10546+ AH R2,=H'1' 009C78 4A20 C0FC 09CBC 10547+ AH R2,=H'1' 009C7C 4A20 C0FC 09CBC 10548+ AH R2,=H'1' 009C80 4A20 C0FC 09CBC 10549+ AH R2,=H'1' 009C84 4A20 C0FC 09CBC 10550+ AH R2,=H'1' 009C88 4A20 C0FC 09CBC 10551+ AH R2,=H'1' 009C8C 4A20 C0FC 09CBC 10552+ AH R2,=H'1' 009C90 4A20 C0FC 09CBC 10553+ AH R2,=H'1' 009C94 4A20 C0FC 09CBC 10554+ AH R2,=H'1' 009C98 4A20 C0FC 09CBC 10555+ AH R2,=H'1' 009C9C 4A20 C0FC 09CBC 10556+ AH R2,=H'1' 009CA0 4A20 C0FC 09CBC 10557+ AH R2,=H'1' 009CA4 4A20 C0FC 09CBC 10558+ AH R2,=H'1' 10559+* 009CA8 06FB 10560 BCTR R15,R11 10561 TSIMRET 009CAA 58F0 C0F8 09CB8 10562+ L R15,=A(SAVETST) R15 := current save area 009CAE 58DF 0004 00004 10563+ L R13,4(R15) get old save area back 009CB2 98EC D00C 0000C 10564+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009CB6 07FE 10565+ BR 14 RETURN 02000000 10566 TSIMEND 009CB8 10567+ LTORG 009CB8 00000458 10568 =A(SAVETST) 009CBC 0001 10569 =H'1' 09CBE 10570+T202TEND EQU * 10571 * 10572 * Test 203 -- ALR R,R -------------------------------------- 10573 * 10574 TSIMBEG T203,17000,100,1,C'ALR R,R' 10575+* 002C24 10576+TDSCDAT CSECT 002C28 10577+ DS 0D 10578+* 002C28 00009CC0 10579+T203TDSC DC A(T203) // TENTRY PAGE 195 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002C2C 00000104 10580+ DC A(T203TEND-T203) // TLENGTH 002C30 00004268 10581+ DC F'17000' // TLRCNT 002C34 00000064 10582+ DC F'100' // TIGCNT 002C38 00000001 10583+ DC F'1' // TLTYPE 0013AB 10584+TEXT CSECT 0013AB E3F2F0F3 10585+SPTR0828 DC C'T203' 002C3C 10586+TDSCDAT CSECT 002C3C 10587+ DS 0F 002C3C 040013AB 10588+ DC AL1(L'SPTR0828),AL3(SPTR0828) 0013AF 10589+TEXT CSECT 0013AF C1D3D940D96BD9 10590+SPTR0829 DC C'ALR R,R' 002C40 10591+TDSCDAT CSECT 002C40 10592+ DS 0F 002C40 070013AF 10593+ DC AL1(L'SPTR0829),AL3(SPTR0829) 10594+* 004AB0 10595+TDSCTBL CSECT 04AB0 10596+T203TPTR EQU * 004AB0 00002C28 10597+ DC A(T203TDSC) enabled test 10598+* 009CBE 10599+TCODE CSECT 009CC0 10600+ DS 0D ensure double word alignment for test 009CC0 10601+T203 DS 0H 01650000 009CC0 90EC D00C 0000C 10602+ STM 14,12,12(13) SAVE REGISTERS 02950000 009CC4 18CF 10603+ LR R12,R15 base register := entry address 09CC0 10604+ USING T203,R12 declare code base register 009CC6 41B0 C024 09CE4 10605+ LA R11,T203L load loop target to R11 009CCA 58F0 C100 09DC0 10606+ L R15,=A(SAVETST) R15 := current save area 009CCE 50DF 0004 00004 10607+ ST R13,4(R15) set back pointer in current save area 009CD2 182D 10608+ LR R2,R13 remember callers save area 009CD4 18DF 10609+ LR R13,R15 setup current save area 009CD6 50D2 0008 00008 10610+ ST R13,8(R2) set forw pointer in callers save area 00000 10611+ USING TDSC,R1 declare TDSC base register 009CDA 58F0 1008 00008 10612+ L R15,TLRCNT load local repeat count to R15 10613+* 10614 * 009CDE 1722 10615 XR R2,R2 009CE0 4130 0001 00001 10616 LA R3,1 10617 T203L REPINS ALR,(R2,R3) repeat: ALR R2,R3 10618+* 10619+* build from sublist &ALIST a comma separated string &ARGS 10620+* 10621+* 10622+* 10623+* 10624+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10625+* this allows to transfer the repeat count from last TDSCGEN call 10626+* 10627+* 09CE4 10628+T203L EQU * 10629+* 10630+* write a comment indicating what REPINS does (in case NOGEN in effect) 10631+* 10632+*,// REPINS: do 100 times: 10633+* 10634+* MNOTE requires that ' is doubled for expanded variables PAGE 196 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 10635+* thus build &MASTR as a copy of '&ARGS with ' doubled 10636+* 10637+* 10638+*,// ALR R2,R3 10639+* 10640+* finally generate code: &ICNT copies of &CODE &ARGS 10641+* 009CE4 1E23 10642+ ALR R2,R3 009CE6 1E23 10643+ ALR R2,R3 009CE8 1E23 10644+ ALR R2,R3 009CEA 1E23 10645+ ALR R2,R3 009CEC 1E23 10646+ ALR R2,R3 009CEE 1E23 10647+ ALR R2,R3 009CF0 1E23 10648+ ALR R2,R3 009CF2 1E23 10649+ ALR R2,R3 009CF4 1E23 10650+ ALR R2,R3 009CF6 1E23 10651+ ALR R2,R3 009CF8 1E23 10652+ ALR R2,R3 009CFA 1E23 10653+ ALR R2,R3 009CFC 1E23 10654+ ALR R2,R3 009CFE 1E23 10655+ ALR R2,R3 009D00 1E23 10656+ ALR R2,R3 009D02 1E23 10657+ ALR R2,R3 009D04 1E23 10658+ ALR R2,R3 009D06 1E23 10659+ ALR R2,R3 009D08 1E23 10660+ ALR R2,R3 009D0A 1E23 10661+ ALR R2,R3 009D0C 1E23 10662+ ALR R2,R3 009D0E 1E23 10663+ ALR R2,R3 009D10 1E23 10664+ ALR R2,R3 009D12 1E23 10665+ ALR R2,R3 009D14 1E23 10666+ ALR R2,R3 009D16 1E23 10667+ ALR R2,R3 009D18 1E23 10668+ ALR R2,R3 009D1A 1E23 10669+ ALR R2,R3 009D1C 1E23 10670+ ALR R2,R3 009D1E 1E23 10671+ ALR R2,R3 009D20 1E23 10672+ ALR R2,R3 009D22 1E23 10673+ ALR R2,R3 009D24 1E23 10674+ ALR R2,R3 009D26 1E23 10675+ ALR R2,R3 009D28 1E23 10676+ ALR R2,R3 009D2A 1E23 10677+ ALR R2,R3 009D2C 1E23 10678+ ALR R2,R3 009D2E 1E23 10679+ ALR R2,R3 009D30 1E23 10680+ ALR R2,R3 009D32 1E23 10681+ ALR R2,R3 009D34 1E23 10682+ ALR R2,R3 009D36 1E23 10683+ ALR R2,R3 009D38 1E23 10684+ ALR R2,R3 009D3A 1E23 10685+ ALR R2,R3 009D3C 1E23 10686+ ALR R2,R3 009D3E 1E23 10687+ ALR R2,R3 009D40 1E23 10688+ ALR R2,R3 009D42 1E23 10689+ ALR R2,R3 PAGE 197 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009D44 1E23 10690+ ALR R2,R3 009D46 1E23 10691+ ALR R2,R3 009D48 1E23 10692+ ALR R2,R3 009D4A 1E23 10693+ ALR R2,R3 009D4C 1E23 10694+ ALR R2,R3 009D4E 1E23 10695+ ALR R2,R3 009D50 1E23 10696+ ALR R2,R3 009D52 1E23 10697+ ALR R2,R3 009D54 1E23 10698+ ALR R2,R3 009D56 1E23 10699+ ALR R2,R3 009D58 1E23 10700+ ALR R2,R3 009D5A 1E23 10701+ ALR R2,R3 009D5C 1E23 10702+ ALR R2,R3 009D5E 1E23 10703+ ALR R2,R3 009D60 1E23 10704+ ALR R2,R3 009D62 1E23 10705+ ALR R2,R3 009D64 1E23 10706+ ALR R2,R3 009D66 1E23 10707+ ALR R2,R3 009D68 1E23 10708+ ALR R2,R3 009D6A 1E23 10709+ ALR R2,R3 009D6C 1E23 10710+ ALR R2,R3 009D6E 1E23 10711+ ALR R2,R3 009D70 1E23 10712+ ALR R2,R3 009D72 1E23 10713+ ALR R2,R3 009D74 1E23 10714+ ALR R2,R3 009D76 1E23 10715+ ALR R2,R3 009D78 1E23 10716+ ALR R2,R3 009D7A 1E23 10717+ ALR R2,R3 009D7C 1E23 10718+ ALR R2,R3 009D7E 1E23 10719+ ALR R2,R3 009D80 1E23 10720+ ALR R2,R3 009D82 1E23 10721+ ALR R2,R3 009D84 1E23 10722+ ALR R2,R3 009D86 1E23 10723+ ALR R2,R3 009D88 1E23 10724+ ALR R2,R3 009D8A 1E23 10725+ ALR R2,R3 009D8C 1E23 10726+ ALR R2,R3 009D8E 1E23 10727+ ALR R2,R3 009D90 1E23 10728+ ALR R2,R3 009D92 1E23 10729+ ALR R2,R3 009D94 1E23 10730+ ALR R2,R3 009D96 1E23 10731+ ALR R2,R3 009D98 1E23 10732+ ALR R2,R3 009D9A 1E23 10733+ ALR R2,R3 009D9C 1E23 10734+ ALR R2,R3 009D9E 1E23 10735+ ALR R2,R3 009DA0 1E23 10736+ ALR R2,R3 009DA2 1E23 10737+ ALR R2,R3 009DA4 1E23 10738+ ALR R2,R3 009DA6 1E23 10739+ ALR R2,R3 009DA8 1E23 10740+ ALR R2,R3 009DAA 1E23 10741+ ALR R2,R3 10742+* 009DAC 06FB 10743 BCTR R15,R11 10744 TSIMRET PAGE 198 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009DAE 58F0 C100 09DC0 10745+ L R15,=A(SAVETST) R15 := current save area 009DB2 58DF 0004 00004 10746+ L R13,4(R15) get old save area back 009DB6 98EC D00C 0000C 10747+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009DBA 07FE 10748+ BR 14 RETURN 02000000 10749 TSIMEND 009DC0 10750+ LTORG 009DC0 00000458 10751 =A(SAVETST) 09DC4 10752+T203TEND EQU * 10753 * 10754 * Test 204 -- AL R,m --------------------------------------- 10755 * 10756 TSIMBEG T204,10000,50,1,C'AL R,m' 10757+* 002C44 10758+TDSCDAT CSECT 002C48 10759+ DS 0D 10760+* 002C48 00009DC8 10761+T204TDSC DC A(T204) // TENTRY 002C4C 00000100 10762+ DC A(T204TEND-T204) // TLENGTH 002C50 00002710 10763+ DC F'10000' // TLRCNT 002C54 00000032 10764+ DC F'50' // TIGCNT 002C58 00000001 10765+ DC F'1' // TLTYPE 0013B6 10766+TEXT CSECT 0013B6 E3F2F0F4 10767+SPTR0840 DC C'T204' 002C5C 10768+TDSCDAT CSECT 002C5C 10769+ DS 0F 002C5C 040013B6 10770+ DC AL1(L'SPTR0840),AL3(SPTR0840) 0013BA 10771+TEXT CSECT 0013BA C1D340D96B94 10772+SPTR0841 DC C'AL R,m' 002C60 10773+TDSCDAT CSECT 002C60 10774+ DS 0F 002C60 060013BA 10775+ DC AL1(L'SPTR0841),AL3(SPTR0841) 10776+* 004AB4 10777+TDSCTBL CSECT 04AB4 10778+T204TPTR EQU * 004AB4 00002C48 10779+ DC A(T204TDSC) enabled test 10780+* 009DC4 10781+TCODE CSECT 009DC8 10782+ DS 0D ensure double word alignment for test 009DC8 10783+T204 DS 0H 01650000 009DC8 90EC D00C 0000C 10784+ STM 14,12,12(13) SAVE REGISTERS 02950000 009DCC 18CF 10785+ LR R12,R15 base register := entry address 09DC8 10786+ USING T204,R12 declare code base register 009DCE 41B0 C020 09DE8 10787+ LA R11,T204L load loop target to R11 009DD2 58F0 C0F8 09EC0 10788+ L R15,=A(SAVETST) R15 := current save area 009DD6 50DF 0004 00004 10789+ ST R13,4(R15) set back pointer in current save area 009DDA 182D 10790+ LR R2,R13 remember callers save area 009DDC 18DF 10791+ LR R13,R15 setup current save area 009DDE 50D2 0008 00008 10792+ ST R13,8(R2) set forw pointer in callers save area 00000 10793+ USING TDSC,R1 declare TDSC base register 009DE2 58F0 1008 00008 10794+ L R15,TLRCNT load local repeat count to R15 10795+* 10796 * 009DE6 1722 10797 XR R2,R2 10798 T204L REPINS AL,(R2,=F'1') repeat: AL R2,=F'1' 10799+* PAGE 199 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 10800+* build from sublist &ALIST a comma separated string &ARGS 10801+* 10802+* 10803+* 10804+* 10805+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10806+* this allows to transfer the repeat count from last TDSCGEN call 10807+* 10808+* 09DE8 10809+T204L EQU * 10810+* 10811+* write a comment indicating what REPINS does (in case NOGEN in effect) 10812+* 10813+*,// REPINS: do 50 times: 10814+* 10815+* MNOTE requires that ' is doubled for expanded variables 10816+* thus build &MASTR as a copy of '&ARGS with ' doubled 10817+* 10818+* 10819+*,// AL R2,=F'1' 10820+* 10821+* finally generate code: &ICNT copies of &CODE &ARGS 10822+* 009DE8 5E20 C0FC 09EC4 10823+ AL R2,=F'1' 009DEC 5E20 C0FC 09EC4 10824+ AL R2,=F'1' 009DF0 5E20 C0FC 09EC4 10825+ AL R2,=F'1' 009DF4 5E20 C0FC 09EC4 10826+ AL R2,=F'1' 009DF8 5E20 C0FC 09EC4 10827+ AL R2,=F'1' 009DFC 5E20 C0FC 09EC4 10828+ AL R2,=F'1' 009E00 5E20 C0FC 09EC4 10829+ AL R2,=F'1' 009E04 5E20 C0FC 09EC4 10830+ AL R2,=F'1' 009E08 5E20 C0FC 09EC4 10831+ AL R2,=F'1' 009E0C 5E20 C0FC 09EC4 10832+ AL R2,=F'1' 009E10 5E20 C0FC 09EC4 10833+ AL R2,=F'1' 009E14 5E20 C0FC 09EC4 10834+ AL R2,=F'1' 009E18 5E20 C0FC 09EC4 10835+ AL R2,=F'1' 009E1C 5E20 C0FC 09EC4 10836+ AL R2,=F'1' 009E20 5E20 C0FC 09EC4 10837+ AL R2,=F'1' 009E24 5E20 C0FC 09EC4 10838+ AL R2,=F'1' 009E28 5E20 C0FC 09EC4 10839+ AL R2,=F'1' 009E2C 5E20 C0FC 09EC4 10840+ AL R2,=F'1' 009E30 5E20 C0FC 09EC4 10841+ AL R2,=F'1' 009E34 5E20 C0FC 09EC4 10842+ AL R2,=F'1' 009E38 5E20 C0FC 09EC4 10843+ AL R2,=F'1' 009E3C 5E20 C0FC 09EC4 10844+ AL R2,=F'1' 009E40 5E20 C0FC 09EC4 10845+ AL R2,=F'1' 009E44 5E20 C0FC 09EC4 10846+ AL R2,=F'1' 009E48 5E20 C0FC 09EC4 10847+ AL R2,=F'1' 009E4C 5E20 C0FC 09EC4 10848+ AL R2,=F'1' 009E50 5E20 C0FC 09EC4 10849+ AL R2,=F'1' 009E54 5E20 C0FC 09EC4 10850+ AL R2,=F'1' 009E58 5E20 C0FC 09EC4 10851+ AL R2,=F'1' 009E5C 5E20 C0FC 09EC4 10852+ AL R2,=F'1' 009E60 5E20 C0FC 09EC4 10853+ AL R2,=F'1' 009E64 5E20 C0FC 09EC4 10854+ AL R2,=F'1' PAGE 200 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009E68 5E20 C0FC 09EC4 10855+ AL R2,=F'1' 009E6C 5E20 C0FC 09EC4 10856+ AL R2,=F'1' 009E70 5E20 C0FC 09EC4 10857+ AL R2,=F'1' 009E74 5E20 C0FC 09EC4 10858+ AL R2,=F'1' 009E78 5E20 C0FC 09EC4 10859+ AL R2,=F'1' 009E7C 5E20 C0FC 09EC4 10860+ AL R2,=F'1' 009E80 5E20 C0FC 09EC4 10861+ AL R2,=F'1' 009E84 5E20 C0FC 09EC4 10862+ AL R2,=F'1' 009E88 5E20 C0FC 09EC4 10863+ AL R2,=F'1' 009E8C 5E20 C0FC 09EC4 10864+ AL R2,=F'1' 009E90 5E20 C0FC 09EC4 10865+ AL R2,=F'1' 009E94 5E20 C0FC 09EC4 10866+ AL R2,=F'1' 009E98 5E20 C0FC 09EC4 10867+ AL R2,=F'1' 009E9C 5E20 C0FC 09EC4 10868+ AL R2,=F'1' 009EA0 5E20 C0FC 09EC4 10869+ AL R2,=F'1' 009EA4 5E20 C0FC 09EC4 10870+ AL R2,=F'1' 009EA8 5E20 C0FC 09EC4 10871+ AL R2,=F'1' 009EAC 5E20 C0FC 09EC4 10872+ AL R2,=F'1' 10873+* 009EB0 06FB 10874 BCTR R15,R11 10875 TSIMRET 009EB2 58F0 C0F8 09EC0 10876+ L R15,=A(SAVETST) R15 := current save area 009EB6 58DF 0004 00004 10877+ L R13,4(R15) get old save area back 009EBA 98EC D00C 0000C 10878+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009EBE 07FE 10879+ BR 14 RETURN 02000000 10880 TSIMEND 009EC0 10881+ LTORG 009EC0 00000458 10882 =A(SAVETST) 009EC4 00000001 10883 =F'1' 09EC8 10884+T204TEND EQU * 10885 * 10886 * Test 205 -- SR R,R --------------------------------------- 10887 * 10888 TSIMBEG T205,14000,100,1,C'SR R,R' 10889+* 002C64 10890+TDSCDAT CSECT 002C68 10891+ DS 0D 10892+* 002C68 00009EC8 10893+T205TDSC DC A(T205) // TENTRY 002C6C 00000104 10894+ DC A(T205TEND-T205) // TLENGTH 002C70 000036B0 10895+ DC F'14000' // TLRCNT 002C74 00000064 10896+ DC F'100' // TIGCNT 002C78 00000001 10897+ DC F'1' // TLTYPE 0013C0 10898+TEXT CSECT 0013C0 E3F2F0F5 10899+SPTR0852 DC C'T205' 002C7C 10900+TDSCDAT CSECT 002C7C 10901+ DS 0F 002C7C 040013C0 10902+ DC AL1(L'SPTR0852),AL3(SPTR0852) 0013C4 10903+TEXT CSECT 0013C4 E2D940D96BD9 10904+SPTR0853 DC C'SR R,R' 002C80 10905+TDSCDAT CSECT 002C80 10906+ DS 0F 002C80 060013C4 10907+ DC AL1(L'SPTR0853),AL3(SPTR0853) 10908+* 004AB8 10909+TDSCTBL CSECT PAGE 201 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 04AB8 10910+T205TPTR EQU * 004AB8 00002C68 10911+ DC A(T205TDSC) enabled test 10912+* 009EC8 10913+TCODE CSECT 009EC8 10914+ DS 0D ensure double word alignment for test 009EC8 10915+T205 DS 0H 01650000 009EC8 90EC D00C 0000C 10916+ STM 14,12,12(13) SAVE REGISTERS 02950000 009ECC 18CF 10917+ LR R12,R15 base register := entry address 09EC8 10918+ USING T205,R12 declare code base register 009ECE 41B0 C024 09EEC 10919+ LA R11,T205L load loop target to R11 009ED2 58F0 C100 09FC8 10920+ L R15,=A(SAVETST) R15 := current save area 009ED6 50DF 0004 00004 10921+ ST R13,4(R15) set back pointer in current save area 009EDA 182D 10922+ LR R2,R13 remember callers save area 009EDC 18DF 10923+ LR R13,R15 setup current save area 009EDE 50D2 0008 00008 10924+ ST R13,8(R2) set forw pointer in callers save area 00000 10925+ USING TDSC,R1 declare TDSC base register 009EE2 58F0 1008 00008 10926+ L R15,TLRCNT load local repeat count to R15 10927+* 10928 * 009EE6 1722 10929 XR R2,R2 009EE8 4130 0001 00001 10930 LA R3,1 10931 T205L REPINS SR,(R2,R3) repeat: SR R2,R3 10932+* 10933+* build from sublist &ALIST a comma separated string &ARGS 10934+* 10935+* 10936+* 10937+* 10938+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10939+* this allows to transfer the repeat count from last TDSCGEN call 10940+* 10941+* 09EEC 10942+T205L EQU * 10943+* 10944+* write a comment indicating what REPINS does (in case NOGEN in effect) 10945+* 10946+*,// REPINS: do 100 times: 10947+* 10948+* MNOTE requires that ' is doubled for expanded variables 10949+* thus build &MASTR as a copy of '&ARGS with ' doubled 10950+* 10951+* 10952+*,// SR R2,R3 10953+* 10954+* finally generate code: &ICNT copies of &CODE &ARGS 10955+* 009EEC 1B23 10956+ SR R2,R3 009EEE 1B23 10957+ SR R2,R3 009EF0 1B23 10958+ SR R2,R3 009EF2 1B23 10959+ SR R2,R3 009EF4 1B23 10960+ SR R2,R3 009EF6 1B23 10961+ SR R2,R3 009EF8 1B23 10962+ SR R2,R3 009EFA 1B23 10963+ SR R2,R3 009EFC 1B23 10964+ SR R2,R3 PAGE 202 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009EFE 1B23 10965+ SR R2,R3 009F00 1B23 10966+ SR R2,R3 009F02 1B23 10967+ SR R2,R3 009F04 1B23 10968+ SR R2,R3 009F06 1B23 10969+ SR R2,R3 009F08 1B23 10970+ SR R2,R3 009F0A 1B23 10971+ SR R2,R3 009F0C 1B23 10972+ SR R2,R3 009F0E 1B23 10973+ SR R2,R3 009F10 1B23 10974+ SR R2,R3 009F12 1B23 10975+ SR R2,R3 009F14 1B23 10976+ SR R2,R3 009F16 1B23 10977+ SR R2,R3 009F18 1B23 10978+ SR R2,R3 009F1A 1B23 10979+ SR R2,R3 009F1C 1B23 10980+ SR R2,R3 009F1E 1B23 10981+ SR R2,R3 009F20 1B23 10982+ SR R2,R3 009F22 1B23 10983+ SR R2,R3 009F24 1B23 10984+ SR R2,R3 009F26 1B23 10985+ SR R2,R3 009F28 1B23 10986+ SR R2,R3 009F2A 1B23 10987+ SR R2,R3 009F2C 1B23 10988+ SR R2,R3 009F2E 1B23 10989+ SR R2,R3 009F30 1B23 10990+ SR R2,R3 009F32 1B23 10991+ SR R2,R3 009F34 1B23 10992+ SR R2,R3 009F36 1B23 10993+ SR R2,R3 009F38 1B23 10994+ SR R2,R3 009F3A 1B23 10995+ SR R2,R3 009F3C 1B23 10996+ SR R2,R3 009F3E 1B23 10997+ SR R2,R3 009F40 1B23 10998+ SR R2,R3 009F42 1B23 10999+ SR R2,R3 009F44 1B23 11000+ SR R2,R3 009F46 1B23 11001+ SR R2,R3 009F48 1B23 11002+ SR R2,R3 009F4A 1B23 11003+ SR R2,R3 009F4C 1B23 11004+ SR R2,R3 009F4E 1B23 11005+ SR R2,R3 009F50 1B23 11006+ SR R2,R3 009F52 1B23 11007+ SR R2,R3 009F54 1B23 11008+ SR R2,R3 009F56 1B23 11009+ SR R2,R3 009F58 1B23 11010+ SR R2,R3 009F5A 1B23 11011+ SR R2,R3 009F5C 1B23 11012+ SR R2,R3 009F5E 1B23 11013+ SR R2,R3 009F60 1B23 11014+ SR R2,R3 009F62 1B23 11015+ SR R2,R3 009F64 1B23 11016+ SR R2,R3 009F66 1B23 11017+ SR R2,R3 009F68 1B23 11018+ SR R2,R3 009F6A 1B23 11019+ SR R2,R3 PAGE 203 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 009F6C 1B23 11020+ SR R2,R3 009F6E 1B23 11021+ SR R2,R3 009F70 1B23 11022+ SR R2,R3 009F72 1B23 11023+ SR R2,R3 009F74 1B23 11024+ SR R2,R3 009F76 1B23 11025+ SR R2,R3 009F78 1B23 11026+ SR R2,R3 009F7A 1B23 11027+ SR R2,R3 009F7C 1B23 11028+ SR R2,R3 009F7E 1B23 11029+ SR R2,R3 009F80 1B23 11030+ SR R2,R3 009F82 1B23 11031+ SR R2,R3 009F84 1B23 11032+ SR R2,R3 009F86 1B23 11033+ SR R2,R3 009F88 1B23 11034+ SR R2,R3 009F8A 1B23 11035+ SR R2,R3 009F8C 1B23 11036+ SR R2,R3 009F8E 1B23 11037+ SR R2,R3 009F90 1B23 11038+ SR R2,R3 009F92 1B23 11039+ SR R2,R3 009F94 1B23 11040+ SR R2,R3 009F96 1B23 11041+ SR R2,R3 009F98 1B23 11042+ SR R2,R3 009F9A 1B23 11043+ SR R2,R3 009F9C 1B23 11044+ SR R2,R3 009F9E 1B23 11045+ SR R2,R3 009FA0 1B23 11046+ SR R2,R3 009FA2 1B23 11047+ SR R2,R3 009FA4 1B23 11048+ SR R2,R3 009FA6 1B23 11049+ SR R2,R3 009FA8 1B23 11050+ SR R2,R3 009FAA 1B23 11051+ SR R2,R3 009FAC 1B23 11052+ SR R2,R3 009FAE 1B23 11053+ SR R2,R3 009FB0 1B23 11054+ SR R2,R3 009FB2 1B23 11055+ SR R2,R3 11056+* 009FB4 06FB 11057 BCTR R15,R11 11058 TSIMRET 009FB6 58F0 C100 09FC8 11059+ L R15,=A(SAVETST) R15 := current save area 009FBA 58DF 0004 00004 11060+ L R13,4(R15) get old save area back 009FBE 98EC D00C 0000C 11061+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009FC2 07FE 11062+ BR 14 RETURN 02000000 11063 TSIMEND 009FC8 11064+ LTORG 009FC8 00000458 11065 =A(SAVETST) 09FCC 11066+T205TEND EQU * 11067 * 11068 * Test 206 -- S R,m ---------------------------------------- 11069 * 11070 TSIMBEG T206,10000,50,1,C'S R,m' 11071+* 002C84 11072+TDSCDAT CSECT 002C88 11073+ DS 0D 11074+* PAGE 204 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002C88 00009FD0 11075+T206TDSC DC A(T206) // TENTRY 002C8C 00000100 11076+ DC A(T206TEND-T206) // TLENGTH 002C90 00002710 11077+ DC F'10000' // TLRCNT 002C94 00000032 11078+ DC F'50' // TIGCNT 002C98 00000001 11079+ DC F'1' // TLTYPE 0013CA 11080+TEXT CSECT 0013CA E3F2F0F6 11081+SPTR0864 DC C'T206' 002C9C 11082+TDSCDAT CSECT 002C9C 11083+ DS 0F 002C9C 040013CA 11084+ DC AL1(L'SPTR0864),AL3(SPTR0864) 0013CE 11085+TEXT CSECT 0013CE E240D96B94 11086+SPTR0865 DC C'S R,m' 002CA0 11087+TDSCDAT CSECT 002CA0 11088+ DS 0F 002CA0 050013CE 11089+ DC AL1(L'SPTR0865),AL3(SPTR0865) 11090+* 004ABC 11091+TDSCTBL CSECT 04ABC 11092+T206TPTR EQU * 004ABC 00002C88 11093+ DC A(T206TDSC) enabled test 11094+* 009FCC 11095+TCODE CSECT 009FD0 11096+ DS 0D ensure double word alignment for test 009FD0 11097+T206 DS 0H 01650000 009FD0 90EC D00C 0000C 11098+ STM 14,12,12(13) SAVE REGISTERS 02950000 009FD4 18CF 11099+ LR R12,R15 base register := entry address 09FD0 11100+ USING T206,R12 declare code base register 009FD6 41B0 C020 09FF0 11101+ LA R11,T206L load loop target to R11 009FDA 58F0 C0F8 0A0C8 11102+ L R15,=A(SAVETST) R15 := current save area 009FDE 50DF 0004 00004 11103+ ST R13,4(R15) set back pointer in current save area 009FE2 182D 11104+ LR R2,R13 remember callers save area 009FE4 18DF 11105+ LR R13,R15 setup current save area 009FE6 50D2 0008 00008 11106+ ST R13,8(R2) set forw pointer in callers save area 00000 11107+ USING TDSC,R1 declare TDSC base register 009FEA 58F0 1008 00008 11108+ L R15,TLRCNT load local repeat count to R15 11109+* 11110 * 009FEE 1722 11111 XR R2,R2 11112 T206L REPINS S,(R2,=F'1') repeat: S R2,=F'1' 11113+* 11114+* build from sublist &ALIST a comma separated string &ARGS 11115+* 11116+* 11117+* 11118+* 11119+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11120+* this allows to transfer the repeat count from last TDSCGEN call 11121+* 11122+* 09FF0 11123+T206L EQU * 11124+* 11125+* write a comment indicating what REPINS does (in case NOGEN in effect) 11126+* 11127+*,// REPINS: do 50 times: 11128+* 11129+* MNOTE requires that ' is doubled for expanded variables PAGE 205 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 11130+* thus build &MASTR as a copy of '&ARGS with ' doubled 11131+* 11132+* 11133+*,// S R2,=F'1' 11134+* 11135+* finally generate code: &ICNT copies of &CODE &ARGS 11136+* 009FF0 5B20 C0FC 0A0CC 11137+ S R2,=F'1' 009FF4 5B20 C0FC 0A0CC 11138+ S R2,=F'1' 009FF8 5B20 C0FC 0A0CC 11139+ S R2,=F'1' 009FFC 5B20 C0FC 0A0CC 11140+ S R2,=F'1' 00A000 5B20 C0FC 0A0CC 11141+ S R2,=F'1' 00A004 5B20 C0FC 0A0CC 11142+ S R2,=F'1' 00A008 5B20 C0FC 0A0CC 11143+ S R2,=F'1' 00A00C 5B20 C0FC 0A0CC 11144+ S R2,=F'1' 00A010 5B20 C0FC 0A0CC 11145+ S R2,=F'1' 00A014 5B20 C0FC 0A0CC 11146+ S R2,=F'1' 00A018 5B20 C0FC 0A0CC 11147+ S R2,=F'1' 00A01C 5B20 C0FC 0A0CC 11148+ S R2,=F'1' 00A020 5B20 C0FC 0A0CC 11149+ S R2,=F'1' 00A024 5B20 C0FC 0A0CC 11150+ S R2,=F'1' 00A028 5B20 C0FC 0A0CC 11151+ S R2,=F'1' 00A02C 5B20 C0FC 0A0CC 11152+ S R2,=F'1' 00A030 5B20 C0FC 0A0CC 11153+ S R2,=F'1' 00A034 5B20 C0FC 0A0CC 11154+ S R2,=F'1' 00A038 5B20 C0FC 0A0CC 11155+ S R2,=F'1' 00A03C 5B20 C0FC 0A0CC 11156+ S R2,=F'1' 00A040 5B20 C0FC 0A0CC 11157+ S R2,=F'1' 00A044 5B20 C0FC 0A0CC 11158+ S R2,=F'1' 00A048 5B20 C0FC 0A0CC 11159+ S R2,=F'1' 00A04C 5B20 C0FC 0A0CC 11160+ S R2,=F'1' 00A050 5B20 C0FC 0A0CC 11161+ S R2,=F'1' 00A054 5B20 C0FC 0A0CC 11162+ S R2,=F'1' 00A058 5B20 C0FC 0A0CC 11163+ S R2,=F'1' 00A05C 5B20 C0FC 0A0CC 11164+ S R2,=F'1' 00A060 5B20 C0FC 0A0CC 11165+ S R2,=F'1' 00A064 5B20 C0FC 0A0CC 11166+ S R2,=F'1' 00A068 5B20 C0FC 0A0CC 11167+ S R2,=F'1' 00A06C 5B20 C0FC 0A0CC 11168+ S R2,=F'1' 00A070 5B20 C0FC 0A0CC 11169+ S R2,=F'1' 00A074 5B20 C0FC 0A0CC 11170+ S R2,=F'1' 00A078 5B20 C0FC 0A0CC 11171+ S R2,=F'1' 00A07C 5B20 C0FC 0A0CC 11172+ S R2,=F'1' 00A080 5B20 C0FC 0A0CC 11173+ S R2,=F'1' 00A084 5B20 C0FC 0A0CC 11174+ S R2,=F'1' 00A088 5B20 C0FC 0A0CC 11175+ S R2,=F'1' 00A08C 5B20 C0FC 0A0CC 11176+ S R2,=F'1' 00A090 5B20 C0FC 0A0CC 11177+ S R2,=F'1' 00A094 5B20 C0FC 0A0CC 11178+ S R2,=F'1' 00A098 5B20 C0FC 0A0CC 11179+ S R2,=F'1' 00A09C 5B20 C0FC 0A0CC 11180+ S R2,=F'1' 00A0A0 5B20 C0FC 0A0CC 11181+ S R2,=F'1' 00A0A4 5B20 C0FC 0A0CC 11182+ S R2,=F'1' 00A0A8 5B20 C0FC 0A0CC 11183+ S R2,=F'1' 00A0AC 5B20 C0FC 0A0CC 11184+ S R2,=F'1' PAGE 206 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A0B0 5B20 C0FC 0A0CC 11185+ S R2,=F'1' 00A0B4 5B20 C0FC 0A0CC 11186+ S R2,=F'1' 11187+* 00A0B8 06FB 11188 BCTR R15,R11 11189 TSIMRET 00A0BA 58F0 C0F8 0A0C8 11190+ L R15,=A(SAVETST) R15 := current save area 00A0BE 58DF 0004 00004 11191+ L R13,4(R15) get old save area back 00A0C2 98EC D00C 0000C 11192+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A0C6 07FE 11193+ BR 14 RETURN 02000000 11194 TSIMEND 00A0C8 11195+ LTORG 00A0C8 00000458 11196 =A(SAVETST) 00A0CC 00000001 11197 =F'1' 0A0D0 11198+T206TEND EQU * 11199 * 11200 * Test 207 -- SH R,m --------------------------------------- 11201 * 11202 TSIMBEG T207,10000,50,1,C'SH R,m' 11203+* 002CA4 11204+TDSCDAT CSECT 002CA8 11205+ DS 0D 11206+* 002CA8 0000A0D0 11207+T207TDSC DC A(T207) // TENTRY 002CAC 000000FE 11208+ DC A(T207TEND-T207) // TLENGTH 002CB0 00002710 11209+ DC F'10000' // TLRCNT 002CB4 00000032 11210+ DC F'50' // TIGCNT 002CB8 00000001 11211+ DC F'1' // TLTYPE 0013D3 11212+TEXT CSECT 0013D3 E3F2F0F7 11213+SPTR0876 DC C'T207' 002CBC 11214+TDSCDAT CSECT 002CBC 11215+ DS 0F 002CBC 040013D3 11216+ DC AL1(L'SPTR0876),AL3(SPTR0876) 0013D7 11217+TEXT CSECT 0013D7 E2C840D96B94 11218+SPTR0877 DC C'SH R,m' 002CC0 11219+TDSCDAT CSECT 002CC0 11220+ DS 0F 002CC0 060013D7 11221+ DC AL1(L'SPTR0877),AL3(SPTR0877) 11222+* 004AC0 11223+TDSCTBL CSECT 04AC0 11224+T207TPTR EQU * 004AC0 00002CA8 11225+ DC A(T207TDSC) enabled test 11226+* 00A0D0 11227+TCODE CSECT 00A0D0 11228+ DS 0D ensure double word alignment for test 00A0D0 11229+T207 DS 0H 01650000 00A0D0 90EC D00C 0000C 11230+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A0D4 18CF 11231+ LR R12,R15 base register := entry address 0A0D0 11232+ USING T207,R12 declare code base register 00A0D6 41B0 C020 0A0F0 11233+ LA R11,T207L load loop target to R11 00A0DA 58F0 C0F8 0A1C8 11234+ L R15,=A(SAVETST) R15 := current save area 00A0DE 50DF 0004 00004 11235+ ST R13,4(R15) set back pointer in current save area 00A0E2 182D 11236+ LR R2,R13 remember callers save area 00A0E4 18DF 11237+ LR R13,R15 setup current save area 00A0E6 50D2 0008 00008 11238+ ST R13,8(R2) set forw pointer in callers save area 00000 11239+ USING TDSC,R1 declare TDSC base register PAGE 207 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A0EA 58F0 1008 00008 11240+ L R15,TLRCNT load local repeat count to R15 11241+* 11242 * 00A0EE 1722 11243 XR R2,R2 11244 T207L REPINS SH,(R2,=H'1') repeat: SH R2,=H'1' 11245+* 11246+* build from sublist &ALIST a comma separated string &ARGS 11247+* 11248+* 11249+* 11250+* 11251+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11252+* this allows to transfer the repeat count from last TDSCGEN call 11253+* 11254+* 0A0F0 11255+T207L EQU * 11256+* 11257+* write a comment indicating what REPINS does (in case NOGEN in effect) 11258+* 11259+*,// REPINS: do 50 times: 11260+* 11261+* MNOTE requires that ' is doubled for expanded variables 11262+* thus build &MASTR as a copy of '&ARGS with ' doubled 11263+* 11264+* 11265+*,// SH R2,=H'1' 11266+* 11267+* finally generate code: &ICNT copies of &CODE &ARGS 11268+* 00A0F0 4B20 C0FC 0A1CC 11269+ SH R2,=H'1' 00A0F4 4B20 C0FC 0A1CC 11270+ SH R2,=H'1' 00A0F8 4B20 C0FC 0A1CC 11271+ SH R2,=H'1' 00A0FC 4B20 C0FC 0A1CC 11272+ SH R2,=H'1' 00A100 4B20 C0FC 0A1CC 11273+ SH R2,=H'1' 00A104 4B20 C0FC 0A1CC 11274+ SH R2,=H'1' 00A108 4B20 C0FC 0A1CC 11275+ SH R2,=H'1' 00A10C 4B20 C0FC 0A1CC 11276+ SH R2,=H'1' 00A110 4B20 C0FC 0A1CC 11277+ SH R2,=H'1' 00A114 4B20 C0FC 0A1CC 11278+ SH R2,=H'1' 00A118 4B20 C0FC 0A1CC 11279+ SH R2,=H'1' 00A11C 4B20 C0FC 0A1CC 11280+ SH R2,=H'1' 00A120 4B20 C0FC 0A1CC 11281+ SH R2,=H'1' 00A124 4B20 C0FC 0A1CC 11282+ SH R2,=H'1' 00A128 4B20 C0FC 0A1CC 11283+ SH R2,=H'1' 00A12C 4B20 C0FC 0A1CC 11284+ SH R2,=H'1' 00A130 4B20 C0FC 0A1CC 11285+ SH R2,=H'1' 00A134 4B20 C0FC 0A1CC 11286+ SH R2,=H'1' 00A138 4B20 C0FC 0A1CC 11287+ SH R2,=H'1' 00A13C 4B20 C0FC 0A1CC 11288+ SH R2,=H'1' 00A140 4B20 C0FC 0A1CC 11289+ SH R2,=H'1' 00A144 4B20 C0FC 0A1CC 11290+ SH R2,=H'1' 00A148 4B20 C0FC 0A1CC 11291+ SH R2,=H'1' 00A14C 4B20 C0FC 0A1CC 11292+ SH R2,=H'1' 00A150 4B20 C0FC 0A1CC 11293+ SH R2,=H'1' 00A154 4B20 C0FC 0A1CC 11294+ SH R2,=H'1' PAGE 208 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A158 4B20 C0FC 0A1CC 11295+ SH R2,=H'1' 00A15C 4B20 C0FC 0A1CC 11296+ SH R2,=H'1' 00A160 4B20 C0FC 0A1CC 11297+ SH R2,=H'1' 00A164 4B20 C0FC 0A1CC 11298+ SH R2,=H'1' 00A168 4B20 C0FC 0A1CC 11299+ SH R2,=H'1' 00A16C 4B20 C0FC 0A1CC 11300+ SH R2,=H'1' 00A170 4B20 C0FC 0A1CC 11301+ SH R2,=H'1' 00A174 4B20 C0FC 0A1CC 11302+ SH R2,=H'1' 00A178 4B20 C0FC 0A1CC 11303+ SH R2,=H'1' 00A17C 4B20 C0FC 0A1CC 11304+ SH R2,=H'1' 00A180 4B20 C0FC 0A1CC 11305+ SH R2,=H'1' 00A184 4B20 C0FC 0A1CC 11306+ SH R2,=H'1' 00A188 4B20 C0FC 0A1CC 11307+ SH R2,=H'1' 00A18C 4B20 C0FC 0A1CC 11308+ SH R2,=H'1' 00A190 4B20 C0FC 0A1CC 11309+ SH R2,=H'1' 00A194 4B20 C0FC 0A1CC 11310+ SH R2,=H'1' 00A198 4B20 C0FC 0A1CC 11311+ SH R2,=H'1' 00A19C 4B20 C0FC 0A1CC 11312+ SH R2,=H'1' 00A1A0 4B20 C0FC 0A1CC 11313+ SH R2,=H'1' 00A1A4 4B20 C0FC 0A1CC 11314+ SH R2,=H'1' 00A1A8 4B20 C0FC 0A1CC 11315+ SH R2,=H'1' 00A1AC 4B20 C0FC 0A1CC 11316+ SH R2,=H'1' 00A1B0 4B20 C0FC 0A1CC 11317+ SH R2,=H'1' 00A1B4 4B20 C0FC 0A1CC 11318+ SH R2,=H'1' 11319+* 00A1B8 06FB 11320 BCTR R15,R11 11321 TSIMRET 00A1BA 58F0 C0F8 0A1C8 11322+ L R15,=A(SAVETST) R15 := current save area 00A1BE 58DF 0004 00004 11323+ L R13,4(R15) get old save area back 00A1C2 98EC D00C 0000C 11324+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A1C6 07FE 11325+ BR 14 RETURN 02000000 11326 TSIMEND 00A1C8 11327+ LTORG 00A1C8 00000458 11328 =A(SAVETST) 00A1CC 0001 11329 =H'1' 0A1CE 11330+T207TEND EQU * 11331 * 11332 * Test 208 -- SLR R,R -------------------------------------- 11333 * 11334 TSIMBEG T208,17000,100,1,C'SLR R,R' 11335+* 002CC4 11336+TDSCDAT CSECT 002CC8 11337+ DS 0D 11338+* 002CC8 0000A1D0 11339+T208TDSC DC A(T208) // TENTRY 002CCC 00000104 11340+ DC A(T208TEND-T208) // TLENGTH 002CD0 00004268 11341+ DC F'17000' // TLRCNT 002CD4 00000064 11342+ DC F'100' // TIGCNT 002CD8 00000001 11343+ DC F'1' // TLTYPE 0013DD 11344+TEXT CSECT 0013DD E3F2F0F8 11345+SPTR0888 DC C'T208' 002CDC 11346+TDSCDAT CSECT 002CDC 11347+ DS 0F 002CDC 040013DD 11348+ DC AL1(L'SPTR0888),AL3(SPTR0888) 0013E1 11349+TEXT CSECT PAGE 209 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0013E1 E2D3D940D96BD9 11350+SPTR0889 DC C'SLR R,R' 002CE0 11351+TDSCDAT CSECT 002CE0 11352+ DS 0F 002CE0 070013E1 11353+ DC AL1(L'SPTR0889),AL3(SPTR0889) 11354+* 004AC4 11355+TDSCTBL CSECT 04AC4 11356+T208TPTR EQU * 004AC4 00002CC8 11357+ DC A(T208TDSC) enabled test 11358+* 00A1CE 11359+TCODE CSECT 00A1D0 11360+ DS 0D ensure double word alignment for test 00A1D0 11361+T208 DS 0H 01650000 00A1D0 90EC D00C 0000C 11362+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A1D4 18CF 11363+ LR R12,R15 base register := entry address 0A1D0 11364+ USING T208,R12 declare code base register 00A1D6 41B0 C024 0A1F4 11365+ LA R11,T208L load loop target to R11 00A1DA 58F0 C100 0A2D0 11366+ L R15,=A(SAVETST) R15 := current save area 00A1DE 50DF 0004 00004 11367+ ST R13,4(R15) set back pointer in current save area 00A1E2 182D 11368+ LR R2,R13 remember callers save area 00A1E4 18DF 11369+ LR R13,R15 setup current save area 00A1E6 50D2 0008 00008 11370+ ST R13,8(R2) set forw pointer in callers save area 00000 11371+ USING TDSC,R1 declare TDSC base register 00A1EA 58F0 1008 00008 11372+ L R15,TLRCNT load local repeat count to R15 11373+* 11374 * 00A1EE 1722 11375 XR R2,R2 00A1F0 4130 0001 00001 11376 LA R3,1 11377 T208L REPINS SLR,(R2,R3) repeat: SLR R2,R3 11378+* 11379+* build from sublist &ALIST a comma separated string &ARGS 11380+* 11381+* 11382+* 11383+* 11384+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11385+* this allows to transfer the repeat count from last TDSCGEN call 11386+* 11387+* 0A1F4 11388+T208L EQU * 11389+* 11390+* write a comment indicating what REPINS does (in case NOGEN in effect) 11391+* 11392+*,// REPINS: do 100 times: 11393+* 11394+* MNOTE requires that ' is doubled for expanded variables 11395+* thus build &MASTR as a copy of '&ARGS with ' doubled 11396+* 11397+* 11398+*,// SLR R2,R3 11399+* 11400+* finally generate code: &ICNT copies of &CODE &ARGS 11401+* 00A1F4 1F23 11402+ SLR R2,R3 00A1F6 1F23 11403+ SLR R2,R3 00A1F8 1F23 11404+ SLR R2,R3 PAGE 210 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A1FA 1F23 11405+ SLR R2,R3 00A1FC 1F23 11406+ SLR R2,R3 00A1FE 1F23 11407+ SLR R2,R3 00A200 1F23 11408+ SLR R2,R3 00A202 1F23 11409+ SLR R2,R3 00A204 1F23 11410+ SLR R2,R3 00A206 1F23 11411+ SLR R2,R3 00A208 1F23 11412+ SLR R2,R3 00A20A 1F23 11413+ SLR R2,R3 00A20C 1F23 11414+ SLR R2,R3 00A20E 1F23 11415+ SLR R2,R3 00A210 1F23 11416+ SLR R2,R3 00A212 1F23 11417+ SLR R2,R3 00A214 1F23 11418+ SLR R2,R3 00A216 1F23 11419+ SLR R2,R3 00A218 1F23 11420+ SLR R2,R3 00A21A 1F23 11421+ SLR R2,R3 00A21C 1F23 11422+ SLR R2,R3 00A21E 1F23 11423+ SLR R2,R3 00A220 1F23 11424+ SLR R2,R3 00A222 1F23 11425+ SLR R2,R3 00A224 1F23 11426+ SLR R2,R3 00A226 1F23 11427+ SLR R2,R3 00A228 1F23 11428+ SLR R2,R3 00A22A 1F23 11429+ SLR R2,R3 00A22C 1F23 11430+ SLR R2,R3 00A22E 1F23 11431+ SLR R2,R3 00A230 1F23 11432+ SLR R2,R3 00A232 1F23 11433+ SLR R2,R3 00A234 1F23 11434+ SLR R2,R3 00A236 1F23 11435+ SLR R2,R3 00A238 1F23 11436+ SLR R2,R3 00A23A 1F23 11437+ SLR R2,R3 00A23C 1F23 11438+ SLR R2,R3 00A23E 1F23 11439+ SLR R2,R3 00A240 1F23 11440+ SLR R2,R3 00A242 1F23 11441+ SLR R2,R3 00A244 1F23 11442+ SLR R2,R3 00A246 1F23 11443+ SLR R2,R3 00A248 1F23 11444+ SLR R2,R3 00A24A 1F23 11445+ SLR R2,R3 00A24C 1F23 11446+ SLR R2,R3 00A24E 1F23 11447+ SLR R2,R3 00A250 1F23 11448+ SLR R2,R3 00A252 1F23 11449+ SLR R2,R3 00A254 1F23 11450+ SLR R2,R3 00A256 1F23 11451+ SLR R2,R3 00A258 1F23 11452+ SLR R2,R3 00A25A 1F23 11453+ SLR R2,R3 00A25C 1F23 11454+ SLR R2,R3 00A25E 1F23 11455+ SLR R2,R3 00A260 1F23 11456+ SLR R2,R3 00A262 1F23 11457+ SLR R2,R3 00A264 1F23 11458+ SLR R2,R3 00A266 1F23 11459+ SLR R2,R3 PAGE 211 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A268 1F23 11460+ SLR R2,R3 00A26A 1F23 11461+ SLR R2,R3 00A26C 1F23 11462+ SLR R2,R3 00A26E 1F23 11463+ SLR R2,R3 00A270 1F23 11464+ SLR R2,R3 00A272 1F23 11465+ SLR R2,R3 00A274 1F23 11466+ SLR R2,R3 00A276 1F23 11467+ SLR R2,R3 00A278 1F23 11468+ SLR R2,R3 00A27A 1F23 11469+ SLR R2,R3 00A27C 1F23 11470+ SLR R2,R3 00A27E 1F23 11471+ SLR R2,R3 00A280 1F23 11472+ SLR R2,R3 00A282 1F23 11473+ SLR R2,R3 00A284 1F23 11474+ SLR R2,R3 00A286 1F23 11475+ SLR R2,R3 00A288 1F23 11476+ SLR R2,R3 00A28A 1F23 11477+ SLR R2,R3 00A28C 1F23 11478+ SLR R2,R3 00A28E 1F23 11479+ SLR R2,R3 00A290 1F23 11480+ SLR R2,R3 00A292 1F23 11481+ SLR R2,R3 00A294 1F23 11482+ SLR R2,R3 00A296 1F23 11483+ SLR R2,R3 00A298 1F23 11484+ SLR R2,R3 00A29A 1F23 11485+ SLR R2,R3 00A29C 1F23 11486+ SLR R2,R3 00A29E 1F23 11487+ SLR R2,R3 00A2A0 1F23 11488+ SLR R2,R3 00A2A2 1F23 11489+ SLR R2,R3 00A2A4 1F23 11490+ SLR R2,R3 00A2A6 1F23 11491+ SLR R2,R3 00A2A8 1F23 11492+ SLR R2,R3 00A2AA 1F23 11493+ SLR R2,R3 00A2AC 1F23 11494+ SLR R2,R3 00A2AE 1F23 11495+ SLR R2,R3 00A2B0 1F23 11496+ SLR R2,R3 00A2B2 1F23 11497+ SLR R2,R3 00A2B4 1F23 11498+ SLR R2,R3 00A2B6 1F23 11499+ SLR R2,R3 00A2B8 1F23 11500+ SLR R2,R3 00A2BA 1F23 11501+ SLR R2,R3 11502+* 00A2BC 06FB 11503 BCTR R15,R11 11504 TSIMRET 00A2BE 58F0 C100 0A2D0 11505+ L R15,=A(SAVETST) R15 := current save area 00A2C2 58DF 0004 00004 11506+ L R13,4(R15) get old save area back 00A2C6 98EC D00C 0000C 11507+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A2CA 07FE 11508+ BR 14 RETURN 02000000 11509 TSIMEND 00A2D0 11510+ LTORG 00A2D0 00000458 11511 =A(SAVETST) 0A2D4 11512+T208TEND EQU * 11513 * 11514 * Test 209 -- SL R,m --------------------------------------- PAGE 212 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 11515 * 11516 TSIMBEG T209,10000,50,1,C'SL R,m' 11517+* 002CE4 11518+TDSCDAT CSECT 002CE8 11519+ DS 0D 11520+* 002CE8 0000A2D8 11521+T209TDSC DC A(T209) // TENTRY 002CEC 00000100 11522+ DC A(T209TEND-T209) // TLENGTH 002CF0 00002710 11523+ DC F'10000' // TLRCNT 002CF4 00000032 11524+ DC F'50' // TIGCNT 002CF8 00000001 11525+ DC F'1' // TLTYPE 0013E8 11526+TEXT CSECT 0013E8 E3F2F0F9 11527+SPTR0900 DC C'T209' 002CFC 11528+TDSCDAT CSECT 002CFC 11529+ DS 0F 002CFC 040013E8 11530+ DC AL1(L'SPTR0900),AL3(SPTR0900) 0013EC 11531+TEXT CSECT 0013EC E2D340D96B94 11532+SPTR0901 DC C'SL R,m' 002D00 11533+TDSCDAT CSECT 002D00 11534+ DS 0F 002D00 060013EC 11535+ DC AL1(L'SPTR0901),AL3(SPTR0901) 11536+* 004AC8 11537+TDSCTBL CSECT 04AC8 11538+T209TPTR EQU * 004AC8 00002CE8 11539+ DC A(T209TDSC) enabled test 11540+* 00A2D4 11541+TCODE CSECT 00A2D8 11542+ DS 0D ensure double word alignment for test 00A2D8 11543+T209 DS 0H 01650000 00A2D8 90EC D00C 0000C 11544+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A2DC 18CF 11545+ LR R12,R15 base register := entry address 0A2D8 11546+ USING T209,R12 declare code base register 00A2DE 41B0 C020 0A2F8 11547+ LA R11,T209L load loop target to R11 00A2E2 58F0 C0F8 0A3D0 11548+ L R15,=A(SAVETST) R15 := current save area 00A2E6 50DF 0004 00004 11549+ ST R13,4(R15) set back pointer in current save area 00A2EA 182D 11550+ LR R2,R13 remember callers save area 00A2EC 18DF 11551+ LR R13,R15 setup current save area 00A2EE 50D2 0008 00008 11552+ ST R13,8(R2) set forw pointer in callers save area 00000 11553+ USING TDSC,R1 declare TDSC base register 00A2F2 58F0 1008 00008 11554+ L R15,TLRCNT load local repeat count to R15 11555+* 11556 * 00A2F6 1722 11557 XR R2,R2 11558 T209L REPINS SL,(R2,=F'1') repeat: SL R2,=F'1' 11559+* 11560+* build from sublist &ALIST a comma separated string &ARGS 11561+* 11562+* 11563+* 11564+* 11565+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11566+* this allows to transfer the repeat count from last TDSCGEN call 11567+* 11568+* 0A2F8 11569+T209L EQU * PAGE 213 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 11570+* 11571+* write a comment indicating what REPINS does (in case NOGEN in effect) 11572+* 11573+*,// REPINS: do 50 times: 11574+* 11575+* MNOTE requires that ' is doubled for expanded variables 11576+* thus build &MASTR as a copy of '&ARGS with ' doubled 11577+* 11578+* 11579+*,// SL R2,=F'1' 11580+* 11581+* finally generate code: &ICNT copies of &CODE &ARGS 11582+* 00A2F8 5F20 C0FC 0A3D4 11583+ SL R2,=F'1' 00A2FC 5F20 C0FC 0A3D4 11584+ SL R2,=F'1' 00A300 5F20 C0FC 0A3D4 11585+ SL R2,=F'1' 00A304 5F20 C0FC 0A3D4 11586+ SL R2,=F'1' 00A308 5F20 C0FC 0A3D4 11587+ SL R2,=F'1' 00A30C 5F20 C0FC 0A3D4 11588+ SL R2,=F'1' 00A310 5F20 C0FC 0A3D4 11589+ SL R2,=F'1' 00A314 5F20 C0FC 0A3D4 11590+ SL R2,=F'1' 00A318 5F20 C0FC 0A3D4 11591+ SL R2,=F'1' 00A31C 5F20 C0FC 0A3D4 11592+ SL R2,=F'1' 00A320 5F20 C0FC 0A3D4 11593+ SL R2,=F'1' 00A324 5F20 C0FC 0A3D4 11594+ SL R2,=F'1' 00A328 5F20 C0FC 0A3D4 11595+ SL R2,=F'1' 00A32C 5F20 C0FC 0A3D4 11596+ SL R2,=F'1' 00A330 5F20 C0FC 0A3D4 11597+ SL R2,=F'1' 00A334 5F20 C0FC 0A3D4 11598+ SL R2,=F'1' 00A338 5F20 C0FC 0A3D4 11599+ SL R2,=F'1' 00A33C 5F20 C0FC 0A3D4 11600+ SL R2,=F'1' 00A340 5F20 C0FC 0A3D4 11601+ SL R2,=F'1' 00A344 5F20 C0FC 0A3D4 11602+ SL R2,=F'1' 00A348 5F20 C0FC 0A3D4 11603+ SL R2,=F'1' 00A34C 5F20 C0FC 0A3D4 11604+ SL R2,=F'1' 00A350 5F20 C0FC 0A3D4 11605+ SL R2,=F'1' 00A354 5F20 C0FC 0A3D4 11606+ SL R2,=F'1' 00A358 5F20 C0FC 0A3D4 11607+ SL R2,=F'1' 00A35C 5F20 C0FC 0A3D4 11608+ SL R2,=F'1' 00A360 5F20 C0FC 0A3D4 11609+ SL R2,=F'1' 00A364 5F20 C0FC 0A3D4 11610+ SL R2,=F'1' 00A368 5F20 C0FC 0A3D4 11611+ SL R2,=F'1' 00A36C 5F20 C0FC 0A3D4 11612+ SL R2,=F'1' 00A370 5F20 C0FC 0A3D4 11613+ SL R2,=F'1' 00A374 5F20 C0FC 0A3D4 11614+ SL R2,=F'1' 00A378 5F20 C0FC 0A3D4 11615+ SL R2,=F'1' 00A37C 5F20 C0FC 0A3D4 11616+ SL R2,=F'1' 00A380 5F20 C0FC 0A3D4 11617+ SL R2,=F'1' 00A384 5F20 C0FC 0A3D4 11618+ SL R2,=F'1' 00A388 5F20 C0FC 0A3D4 11619+ SL R2,=F'1' 00A38C 5F20 C0FC 0A3D4 11620+ SL R2,=F'1' 00A390 5F20 C0FC 0A3D4 11621+ SL R2,=F'1' 00A394 5F20 C0FC 0A3D4 11622+ SL R2,=F'1' 00A398 5F20 C0FC 0A3D4 11623+ SL R2,=F'1' 00A39C 5F20 C0FC 0A3D4 11624+ SL R2,=F'1' PAGE 214 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A3A0 5F20 C0FC 0A3D4 11625+ SL R2,=F'1' 00A3A4 5F20 C0FC 0A3D4 11626+ SL R2,=F'1' 00A3A8 5F20 C0FC 0A3D4 11627+ SL R2,=F'1' 00A3AC 5F20 C0FC 0A3D4 11628+ SL R2,=F'1' 00A3B0 5F20 C0FC 0A3D4 11629+ SL R2,=F'1' 00A3B4 5F20 C0FC 0A3D4 11630+ SL R2,=F'1' 00A3B8 5F20 C0FC 0A3D4 11631+ SL R2,=F'1' 00A3BC 5F20 C0FC 0A3D4 11632+ SL R2,=F'1' 11633+* 00A3C0 06FB 11634 BCTR R15,R11 11635 TSIMRET 00A3C2 58F0 C0F8 0A3D0 11636+ L R15,=A(SAVETST) R15 := current save area 00A3C6 58DF 0004 00004 11637+ L R13,4(R15) get old save area back 00A3CA 98EC D00C 0000C 11638+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A3CE 07FE 11639+ BR 14 RETURN 02000000 11640 TSIMEND 00A3D0 11641+ LTORG 00A3D0 00000458 11642 =A(SAVETST) 00A3D4 00000001 11643 =F'1' 0A3D8 11644+T209TEND EQU * 11645 * 11646 * Test 21x -- arithmetic mul/div =========================== 11647 * 11648 * Test 210 -- MR R,R --------------------------------------- 11649 * 11650 TSIMBEG T210,30000,30,4,C'MR R,R' 11651+* 002D04 11652+TDSCDAT CSECT 002D08 11653+ DS 0D 11654+* 002D08 0000A3D8 11655+T210TDSC DC A(T210) // TENTRY 002D0C 0000007C 11656+ DC A(T210TEND-T210) // TLENGTH 002D10 00007530 11657+ DC F'30000' // TLRCNT 002D14 0000001E 11658+ DC F'30' // TIGCNT 002D18 00000004 11659+ DC F'4' // TLTYPE 0013F2 11660+TEXT CSECT 0013F2 E3F2F1F0 11661+SPTR0912 DC C'T210' 002D1C 11662+TDSCDAT CSECT 002D1C 11663+ DS 0F 002D1C 040013F2 11664+ DC AL1(L'SPTR0912),AL3(SPTR0912) 0013F6 11665+TEXT CSECT 0013F6 D4D940D96BD9 11666+SPTR0913 DC C'MR R,R' 002D20 11667+TDSCDAT CSECT 002D20 11668+ DS 0F 002D20 060013F6 11669+ DC AL1(L'SPTR0913),AL3(SPTR0913) 11670+* 004ACC 11671+TDSCTBL CSECT 04ACC 11672+T210TPTR EQU * 004ACC 00002D08 11673+ DC A(T210TDSC) enabled test 11674+* 00A3D8 11675+TCODE CSECT 00A3D8 11676+ DS 0D ensure double word alignment for test 00A3D8 11677+T210 DS 0H 01650000 00A3D8 90EC D00C 0000C 11678+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A3DC 18CF 11679+ LR R12,R15 base register := entry address PAGE 215 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0A3D8 11680+ USING T210,R12 declare code base register 00A3DE 41B0 C022 0A3FA 11681+ LA R11,T210L load loop target to R11 00A3E2 58F0 C078 0A450 11682+ L R15,=A(SAVETST) R15 := current save area 00A3E6 50DF 0004 00004 11683+ ST R13,4(R15) set back pointer in current save area 00A3EA 182D 11684+ LR R2,R13 remember callers save area 00A3EC 18DF 11685+ LR R13,R15 setup current save area 00A3EE 50D2 0008 00008 11686+ ST R13,8(R2) set forw pointer in callers save area 00000 11687+ USING TDSC,R1 declare TDSC base register 00A3F2 58F0 1008 00008 11688+ L R15,TLRCNT load local repeat count to R15 11689+* 11690 * inner loop logic: 11691 * load R3 with 1 11692 * multiply 30 times by 2 11693 * 00A3F6 4140 0002 00002 11694 LA R4,2 00A3FA 4130 0001 00001 11695 T210L LA R3,1 11696 REPINS MR,(R2,R4) repeat: MR R2,R4 11697+* 11698+* build from sublist &ALIST a comma separated string &ARGS 11699+* 11700+* 11701+* 11702+* 11703+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11704+* this allows to transfer the repeat count from last TDSCGEN call 11705+* 11706+* 11707+* 11708+* write a comment indicating what REPINS does (in case NOGEN in effect) 11709+* 11710+*,// REPINS: do 30 times: 11711+* 11712+* MNOTE requires that ' is doubled for expanded variables 11713+* thus build &MASTR as a copy of '&ARGS with ' doubled 11714+* 11715+* 11716+*,// MR R2,R4 11717+* 11718+* finally generate code: &ICNT copies of &CODE &ARGS 11719+* 00A3FE 1C24 11720+ MR R2,R4 00A400 1C24 11721+ MR R2,R4 00A402 1C24 11722+ MR R2,R4 00A404 1C24 11723+ MR R2,R4 00A406 1C24 11724+ MR R2,R4 00A408 1C24 11725+ MR R2,R4 00A40A 1C24 11726+ MR R2,R4 00A40C 1C24 11727+ MR R2,R4 00A40E 1C24 11728+ MR R2,R4 00A410 1C24 11729+ MR R2,R4 00A412 1C24 11730+ MR R2,R4 00A414 1C24 11731+ MR R2,R4 00A416 1C24 11732+ MR R2,R4 00A418 1C24 11733+ MR R2,R4 00A41A 1C24 11734+ MR R2,R4 PAGE 216 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A41C 1C24 11735+ MR R2,R4 00A41E 1C24 11736+ MR R2,R4 00A420 1C24 11737+ MR R2,R4 00A422 1C24 11738+ MR R2,R4 00A424 1C24 11739+ MR R2,R4 00A426 1C24 11740+ MR R2,R4 00A428 1C24 11741+ MR R2,R4 00A42A 1C24 11742+ MR R2,R4 00A42C 1C24 11743+ MR R2,R4 00A42E 1C24 11744+ MR R2,R4 00A430 1C24 11745+ MR R2,R4 00A432 1C24 11746+ MR R2,R4 00A434 1C24 11747+ MR R2,R4 00A436 1C24 11748+ MR R2,R4 00A438 1C24 11749+ MR R2,R4 11750+* 00A43A 06FB 11751 BCTR R15,R11 11752 TSIMRET 00A43C 58F0 C078 0A450 11753+ L R15,=A(SAVETST) R15 := current save area 00A440 58DF 0004 00004 11754+ L R13,4(R15) get old save area back 00A444 98EC D00C 0000C 11755+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A448 07FE 11756+ BR 14 RETURN 02000000 11757 TSIMEND 00A450 11758+ LTORG 00A450 00000458 11759 =A(SAVETST) 0A454 11760+T210TEND EQU * 11761 * 11762 * Test 211 -- M R,m ---------------------------------------- 11763 * 11764 TSIMBEG T211,15000,30,4,C'M R,m' 11765+* 002D24 11766+TDSCDAT CSECT 002D28 11767+ DS 0D 11768+* 002D28 0000A458 11769+T211TDSC DC A(T211) // TENTRY 002D2C 000000B8 11770+ DC A(T211TEND-T211) // TLENGTH 002D30 00003A98 11771+ DC F'15000' // TLRCNT 002D34 0000001E 11772+ DC F'30' // TIGCNT 002D38 00000004 11773+ DC F'4' // TLTYPE 0013FC 11774+TEXT CSECT 0013FC E3F2F1F1 11775+SPTR0924 DC C'T211' 002D3C 11776+TDSCDAT CSECT 002D3C 11777+ DS 0F 002D3C 040013FC 11778+ DC AL1(L'SPTR0924),AL3(SPTR0924) 001400 11779+TEXT CSECT 001400 D440D96B94 11780+SPTR0925 DC C'M R,m' 002D40 11781+TDSCDAT CSECT 002D40 11782+ DS 0F 002D40 05001400 11783+ DC AL1(L'SPTR0925),AL3(SPTR0925) 11784+* 004AD0 11785+TDSCTBL CSECT 04AD0 11786+T211TPTR EQU * 004AD0 00002D28 11787+ DC A(T211TDSC) enabled test 11788+* 00A454 11789+TCODE CSECT PAGE 217 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A458 11790+ DS 0D ensure double word alignment for test 00A458 11791+T211 DS 0H 01650000 00A458 90EC D00C 0000C 11792+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A45C 18CF 11793+ LR R12,R15 base register := entry address 0A458 11794+ USING T211,R12 declare code base register 00A45E 41B0 C01E 0A476 11795+ LA R11,T211L load loop target to R11 00A462 58F0 C0B0 0A508 11796+ L R15,=A(SAVETST) R15 := current save area 00A466 50DF 0004 00004 11797+ ST R13,4(R15) set back pointer in current save area 00A46A 182D 11798+ LR R2,R13 remember callers save area 00A46C 18DF 11799+ LR R13,R15 setup current save area 00A46E 50D2 0008 00008 11800+ ST R13,8(R2) set forw pointer in callers save area 00000 11801+ USING TDSC,R1 declare TDSC base register 00A472 58F0 1008 00008 11802+ L R15,TLRCNT load local repeat count to R15 11803+* 11804 * inner loop logic: 11805 * load R3 with 1 11806 * multiply 30 times by 2 11807 * 00A476 4130 0001 00001 11808 T211L LA R3,1 11809 REPINS M,(R2,=F'2') repeat: M R2,=F'2' 11810+* 11811+* build from sublist &ALIST a comma separated string &ARGS 11812+* 11813+* 11814+* 11815+* 11816+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11817+* this allows to transfer the repeat count from last TDSCGEN call 11818+* 11819+* 11820+* 11821+* write a comment indicating what REPINS does (in case NOGEN in effect) 11822+* 11823+*,// REPINS: do 30 times: 11824+* 11825+* MNOTE requires that ' is doubled for expanded variables 11826+* thus build &MASTR as a copy of '&ARGS with ' doubled 11827+* 11828+* 11829+*,// M R2,=F'2' 11830+* 11831+* finally generate code: &ICNT copies of &CODE &ARGS 11832+* 00A47A 5C20 C0B4 0A50C 11833+ M R2,=F'2' 00A47E 5C20 C0B4 0A50C 11834+ M R2,=F'2' 00A482 5C20 C0B4 0A50C 11835+ M R2,=F'2' 00A486 5C20 C0B4 0A50C 11836+ M R2,=F'2' 00A48A 5C20 C0B4 0A50C 11837+ M R2,=F'2' 00A48E 5C20 C0B4 0A50C 11838+ M R2,=F'2' 00A492 5C20 C0B4 0A50C 11839+ M R2,=F'2' 00A496 5C20 C0B4 0A50C 11840+ M R2,=F'2' 00A49A 5C20 C0B4 0A50C 11841+ M R2,=F'2' 00A49E 5C20 C0B4 0A50C 11842+ M R2,=F'2' 00A4A2 5C20 C0B4 0A50C 11843+ M R2,=F'2' 00A4A6 5C20 C0B4 0A50C 11844+ M R2,=F'2' PAGE 218 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A4AA 5C20 C0B4 0A50C 11845+ M R2,=F'2' 00A4AE 5C20 C0B4 0A50C 11846+ M R2,=F'2' 00A4B2 5C20 C0B4 0A50C 11847+ M R2,=F'2' 00A4B6 5C20 C0B4 0A50C 11848+ M R2,=F'2' 00A4BA 5C20 C0B4 0A50C 11849+ M R2,=F'2' 00A4BE 5C20 C0B4 0A50C 11850+ M R2,=F'2' 00A4C2 5C20 C0B4 0A50C 11851+ M R2,=F'2' 00A4C6 5C20 C0B4 0A50C 11852+ M R2,=F'2' 00A4CA 5C20 C0B4 0A50C 11853+ M R2,=F'2' 00A4CE 5C20 C0B4 0A50C 11854+ M R2,=F'2' 00A4D2 5C20 C0B4 0A50C 11855+ M R2,=F'2' 00A4D6 5C20 C0B4 0A50C 11856+ M R2,=F'2' 00A4DA 5C20 C0B4 0A50C 11857+ M R2,=F'2' 00A4DE 5C20 C0B4 0A50C 11858+ M R2,=F'2' 00A4E2 5C20 C0B4 0A50C 11859+ M R2,=F'2' 00A4E6 5C20 C0B4 0A50C 11860+ M R2,=F'2' 00A4EA 5C20 C0B4 0A50C 11861+ M R2,=F'2' 00A4EE 5C20 C0B4 0A50C 11862+ M R2,=F'2' 11863+* 00A4F2 06FB 11864 BCTR R15,R11 11865 TSIMRET 00A4F4 58F0 C0B0 0A508 11866+ L R15,=A(SAVETST) R15 := current save area 00A4F8 58DF 0004 00004 11867+ L R13,4(R15) get old save area back 00A4FC 98EC D00C 0000C 11868+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A500 07FE 11869+ BR 14 RETURN 02000000 11870 TSIMEND 00A508 11871+ LTORG 00A508 00000458 11872 =A(SAVETST) 00A50C 00000002 11873 =F'2' 0A510 11874+T211TEND EQU * 11875 * 11876 * Test 212 -- MH R,m --------------------------------------- 11877 * 11878 TSIMBEG T212,15000,30,4,C'MH R,m' 11879+* 002D44 11880+TDSCDAT CSECT 002D48 11881+ DS 0D 11882+* 002D48 0000A510 11883+T212TDSC DC A(T212) // TENTRY 002D4C 000000B6 11884+ DC A(T212TEND-T212) // TLENGTH 002D50 00003A98 11885+ DC F'15000' // TLRCNT 002D54 0000001E 11886+ DC F'30' // TIGCNT 002D58 00000004 11887+ DC F'4' // TLTYPE 001405 11888+TEXT CSECT 001405 E3F2F1F2 11889+SPTR0936 DC C'T212' 002D5C 11890+TDSCDAT CSECT 002D5C 11891+ DS 0F 002D5C 04001405 11892+ DC AL1(L'SPTR0936),AL3(SPTR0936) 001409 11893+TEXT CSECT 001409 D4C840D96B94 11894+SPTR0937 DC C'MH R,m' 002D60 11895+TDSCDAT CSECT 002D60 11896+ DS 0F 002D60 06001409 11897+ DC AL1(L'SPTR0937),AL3(SPTR0937) 11898+* 004AD4 11899+TDSCTBL CSECT PAGE 219 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 04AD4 11900+T212TPTR EQU * 004AD4 00002D48 11901+ DC A(T212TDSC) enabled test 11902+* 00A510 11903+TCODE CSECT 00A510 11904+ DS 0D ensure double word alignment for test 00A510 11905+T212 DS 0H 01650000 00A510 90EC D00C 0000C 11906+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A514 18CF 11907+ LR R12,R15 base register := entry address 0A510 11908+ USING T212,R12 declare code base register 00A516 41B0 C01E 0A52E 11909+ LA R11,T212L load loop target to R11 00A51A 58F0 C0B0 0A5C0 11910+ L R15,=A(SAVETST) R15 := current save area 00A51E 50DF 0004 00004 11911+ ST R13,4(R15) set back pointer in current save area 00A522 182D 11912+ LR R2,R13 remember callers save area 00A524 18DF 11913+ LR R13,R15 setup current save area 00A526 50D2 0008 00008 11914+ ST R13,8(R2) set forw pointer in callers save area 00000 11915+ USING TDSC,R1 declare TDSC base register 00A52A 58F0 1008 00008 11916+ L R15,TLRCNT load local repeat count to R15 11917+* 11918 * inner loop logic: 11919 * load R3 with 1 11920 * multiply 30 times by 2 11921 * 00A52E 4130 0001 00001 11922 T212L LA R3,1 11923 REPINS MH,(R3,=H'2') repeat: MH R3,=H'2' 11924+* 11925+* build from sublist &ALIST a comma separated string &ARGS 11926+* 11927+* 11928+* 11929+* 11930+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11931+* this allows to transfer the repeat count from last TDSCGEN call 11932+* 11933+* 11934+* 11935+* write a comment indicating what REPINS does (in case NOGEN in effect) 11936+* 11937+*,// REPINS: do 30 times: 11938+* 11939+* MNOTE requires that ' is doubled for expanded variables 11940+* thus build &MASTR as a copy of '&ARGS with ' doubled 11941+* 11942+* 11943+*,// MH R3,=H'2' 11944+* 11945+* finally generate code: &ICNT copies of &CODE &ARGS 11946+* 00A532 4C30 C0B4 0A5C4 11947+ MH R3,=H'2' 00A536 4C30 C0B4 0A5C4 11948+ MH R3,=H'2' 00A53A 4C30 C0B4 0A5C4 11949+ MH R3,=H'2' 00A53E 4C30 C0B4 0A5C4 11950+ MH R3,=H'2' 00A542 4C30 C0B4 0A5C4 11951+ MH R3,=H'2' 00A546 4C30 C0B4 0A5C4 11952+ MH R3,=H'2' 00A54A 4C30 C0B4 0A5C4 11953+ MH R3,=H'2' 00A54E 4C30 C0B4 0A5C4 11954+ MH R3,=H'2' PAGE 220 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A552 4C30 C0B4 0A5C4 11955+ MH R3,=H'2' 00A556 4C30 C0B4 0A5C4 11956+ MH R3,=H'2' 00A55A 4C30 C0B4 0A5C4 11957+ MH R3,=H'2' 00A55E 4C30 C0B4 0A5C4 11958+ MH R3,=H'2' 00A562 4C30 C0B4 0A5C4 11959+ MH R3,=H'2' 00A566 4C30 C0B4 0A5C4 11960+ MH R3,=H'2' 00A56A 4C30 C0B4 0A5C4 11961+ MH R3,=H'2' 00A56E 4C30 C0B4 0A5C4 11962+ MH R3,=H'2' 00A572 4C30 C0B4 0A5C4 11963+ MH R3,=H'2' 00A576 4C30 C0B4 0A5C4 11964+ MH R3,=H'2' 00A57A 4C30 C0B4 0A5C4 11965+ MH R3,=H'2' 00A57E 4C30 C0B4 0A5C4 11966+ MH R3,=H'2' 00A582 4C30 C0B4 0A5C4 11967+ MH R3,=H'2' 00A586 4C30 C0B4 0A5C4 11968+ MH R3,=H'2' 00A58A 4C30 C0B4 0A5C4 11969+ MH R3,=H'2' 00A58E 4C30 C0B4 0A5C4 11970+ MH R3,=H'2' 00A592 4C30 C0B4 0A5C4 11971+ MH R3,=H'2' 00A596 4C30 C0B4 0A5C4 11972+ MH R3,=H'2' 00A59A 4C30 C0B4 0A5C4 11973+ MH R3,=H'2' 00A59E 4C30 C0B4 0A5C4 11974+ MH R3,=H'2' 00A5A2 4C30 C0B4 0A5C4 11975+ MH R3,=H'2' 00A5A6 4C30 C0B4 0A5C4 11976+ MH R3,=H'2' 11977+* 00A5AA 06FB 11978 BCTR R15,R11 11979 TSIMRET 00A5AC 58F0 C0B0 0A5C0 11980+ L R15,=A(SAVETST) R15 := current save area 00A5B0 58DF 0004 00004 11981+ L R13,4(R15) get old save area back 00A5B4 98EC D00C 0000C 11982+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A5B8 07FE 11983+ BR 14 RETURN 02000000 11984 TSIMEND 00A5C0 11985+ LTORG 00A5C0 00000458 11986 =A(SAVETST) 00A5C4 0002 11987 =H'2' 0A5C6 11988+T212TEND EQU * 11989 * 11990 * Test 215 -- DR R,R --------------------------------------- 11991 * 11992 TSIMBEG T215,14000,20,3,C'XR R,R; DR R,R' 11993+* 002D64 11994+TDSCDAT CSECT 002D68 11995+ DS 0D 11996+* 002D68 0000A5C8 11997+T215TDSC DC A(T215) // TENTRY 002D6C 00000090 11998+ DC A(T215TEND-T215) // TLENGTH 002D70 000036B0 11999+ DC F'14000' // TLRCNT 002D74 00000014 12000+ DC F'20' // TIGCNT 002D78 00000003 12001+ DC F'3' // TLTYPE 00140F 12002+TEXT CSECT 00140F E3F2F1F5 12003+SPTR0948 DC C'T215' 002D7C 12004+TDSCDAT CSECT 002D7C 12005+ DS 0F 002D7C 0400140F 12006+ DC AL1(L'SPTR0948),AL3(SPTR0948) 001413 12007+TEXT CSECT 001413 E7D940D96BD95E40 12008+SPTR0949 DC C'XR R,R; DR R,R' 002D80 12009+TDSCDAT CSECT PAGE 221 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002D80 12010+ DS 0F 002D80 0E001413 12011+ DC AL1(L'SPTR0949),AL3(SPTR0949) 12012+* 004AD8 12013+TDSCTBL CSECT 04AD8 12014+T215TPTR EQU * 004AD8 00002D68 12015+ DC A(T215TDSC) enabled test 12016+* 00A5C6 12017+TCODE CSECT 00A5C8 12018+ DS 0D ensure double word alignment for test 00A5C8 12019+T215 DS 0H 01650000 00A5C8 90EC D00C 0000C 12020+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A5CC 18CF 12021+ LR R12,R15 base register := entry address 0A5C8 12022+ USING T215,R12 declare code base register 00A5CE 41B0 C026 0A5EE 12023+ LA R11,T215L load loop target to R11 00A5D2 58F0 C088 0A650 12024+ L R15,=A(SAVETST) R15 := current save area 00A5D6 50DF 0004 00004 12025+ ST R13,4(R15) set back pointer in current save area 00A5DA 182D 12026+ LR R2,R13 remember callers save area 00A5DC 18DF 12027+ LR R13,R15 setup current save area 00A5DE 50D2 0008 00008 12028+ ST R13,8(R2) set forw pointer in callers save area 00000 12029+ USING TDSC,R1 declare TDSC base register 00A5E2 58F0 1008 00008 12030+ L R15,TLRCNT load local repeat count to R15 12031+* 12032 * inner loop logic: 12033 * load R3 with 123456789 12034 * divide 20 times by 2 12035 * 12036 * use sequence 12037 * XR R2,R2 drop high order part 12038 * DR R2,R4 and divide 12039 * 00A5E6 4140 0002 00002 12040 LA R4,2 00A5EA 5860 C08C 0A654 12041 L R6,=F'123456789' 00A5EE 1836 12042 T215L LR R3,R6 setup initial divident 12043 REPINSN XR,(R2,R2),DR,(R2,R4) 12044+* 12045+* build from sublist &ALIST* a comma separated string &ARGS* 12046+* 12047+* 12048+* 12049+* 12050+* 12051+* 12052+* 12053+* 12054+* write a comment indicating what REPINSN does (if NOGEN in effect) 12055+* 12056+*,// REPINSN: do 20 times: 12057+* 12058+* MNOTE requires that ' is doubled for expanded variables 12059+* thus build &MASTR as a copy of '&ARGS with ' doubled 12060+* 12061+* 12062+*,// XR R2,R2 12063+* 12064+* MNOTE requires that ' is doubled for expanded variables PAGE 222 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 12065+* thus build &MASTR as a copy of '&ARGS with ' doubled 12066+* 12067+* 12068+*,// DR R2,R4 12069+* 12070+* finally generate code: &ICNT copies of &CO1 ... 12071+* 00A5F0 1722 12072+ XR R2,R2 00A5F2 1D24 12073+ DR R2,R4 00A5F4 1722 12074+ XR R2,R2 00A5F6 1D24 12075+ DR R2,R4 00A5F8 1722 12076+ XR R2,R2 00A5FA 1D24 12077+ DR R2,R4 00A5FC 1722 12078+ XR R2,R2 00A5FE 1D24 12079+ DR R2,R4 00A600 1722 12080+ XR R2,R2 00A602 1D24 12081+ DR R2,R4 00A604 1722 12082+ XR R2,R2 00A606 1D24 12083+ DR R2,R4 00A608 1722 12084+ XR R2,R2 00A60A 1D24 12085+ DR R2,R4 00A60C 1722 12086+ XR R2,R2 00A60E 1D24 12087+ DR R2,R4 00A610 1722 12088+ XR R2,R2 00A612 1D24 12089+ DR R2,R4 00A614 1722 12090+ XR R2,R2 00A616 1D24 12091+ DR R2,R4 00A618 1722 12092+ XR R2,R2 00A61A 1D24 12093+ DR R2,R4 00A61C 1722 12094+ XR R2,R2 00A61E 1D24 12095+ DR R2,R4 00A620 1722 12096+ XR R2,R2 00A622 1D24 12097+ DR R2,R4 00A624 1722 12098+ XR R2,R2 00A626 1D24 12099+ DR R2,R4 00A628 1722 12100+ XR R2,R2 00A62A 1D24 12101+ DR R2,R4 00A62C 1722 12102+ XR R2,R2 00A62E 1D24 12103+ DR R2,R4 00A630 1722 12104+ XR R2,R2 00A632 1D24 12105+ DR R2,R4 00A634 1722 12106+ XR R2,R2 00A636 1D24 12107+ DR R2,R4 00A638 1722 12108+ XR R2,R2 00A63A 1D24 12109+ DR R2,R4 00A63C 1722 12110+ XR R2,R2 00A63E 1D24 12111+ DR R2,R4 12112+* 00A640 06FB 12113 BCTR R15,R11 12114 TSIMRET 00A642 58F0 C088 0A650 12115+ L R15,=A(SAVETST) R15 := current save area 00A646 58DF 0004 00004 12116+ L R13,4(R15) get old save area back 00A64A 98EC D00C 0000C 12117+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A64E 07FE 12118+ BR 14 RETURN 02000000 12119 TSIMEND PAGE 223 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A650 12120+ LTORG 00A650 00000458 12121 =A(SAVETST) 00A654 075BCD15 12122 =F'123456789' 0A658 12123+T215TEND EQU * 12124 * 12125 * Test 216 -- D R,m ---------------------------------------- 12126 * 12127 TSIMBEG T216,11000,20,3,C'XR R,R; D R,m' 12128+* 002D84 12129+TDSCDAT CSECT 002D88 12130+ DS 0D 12131+* 002D88 0000A658 12132+T216TDSC DC A(T216) // TENTRY 002D8C 000000BC 12133+ DC A(T216TEND-T216) // TLENGTH 002D90 00002AF8 12134+ DC F'11000' // TLRCNT 002D94 00000014 12135+ DC F'20' // TIGCNT 002D98 00000003 12136+ DC F'3' // TLTYPE 001421 12137+TEXT CSECT 001421 E3F2F1F6 12138+SPTR0962 DC C'T216' 002D9C 12139+TDSCDAT CSECT 002D9C 12140+ DS 0F 002D9C 04001421 12141+ DC AL1(L'SPTR0962),AL3(SPTR0962) 001425 12142+TEXT CSECT 001425 E7D940D96BD95E40 12143+SPTR0963 DC C'XR R,R; D R,m' 002DA0 12144+TDSCDAT CSECT 002DA0 12145+ DS 0F 002DA0 0D001425 12146+ DC AL1(L'SPTR0963),AL3(SPTR0963) 12147+* 004ADC 12148+TDSCTBL CSECT 04ADC 12149+T216TPTR EQU * 004ADC 00002D88 12150+ DC A(T216TDSC) enabled test 12151+* 00A658 12152+TCODE CSECT 00A658 12153+ DS 0D ensure double word alignment for test 00A658 12154+T216 DS 0H 01650000 00A658 90EC D00C 0000C 12155+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A65C 18CF 12156+ LR R12,R15 base register := entry address 0A658 12157+ USING T216,R12 declare code base register 00A65E 41B0 C026 0A67E 12158+ LA R11,T216L load loop target to R11 00A662 58F0 C0B0 0A708 12159+ L R15,=A(SAVETST) R15 := current save area 00A666 50DF 0004 00004 12160+ ST R13,4(R15) set back pointer in current save area 00A66A 182D 12161+ LR R2,R13 remember callers save area 00A66C 18DF 12162+ LR R13,R15 setup current save area 00A66E 50D2 0008 00008 12163+ ST R13,8(R2) set forw pointer in callers save area 00000 12164+ USING TDSC,R1 declare TDSC base register 00A672 58F0 1008 00008 12165+ L R15,TLRCNT load local repeat count to R15 12166+* 12167 * inner loop logic: 12168 * load R3 with 123456789 12169 * divide 20 times by 2 12170 * 12171 * use sequence 12172 * XR R2,R2 drop high order part 12173 * D R2,=F'2' and divide 12174 * PAGE 224 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A676 4140 0002 00002 12175 LA R4,2 00A67A 5860 C0B4 0A70C 12176 L R6,=F'123456789' 00A67E 1836 12177 T216L LR R3,R6 setup initial divident 12178 REPINSN XR,(R2,R2),D,(R2,=F'2') 12179+* 12180+* build from sublist &ALIST* a comma separated string &ARGS* 12181+* 12182+* 12183+* 12184+* 12185+* 12186+* 12187+* 12188+* 12189+* write a comment indicating what REPINSN does (if NOGEN in effect) 12190+* 12191+*,// REPINSN: do 20 times: 12192+* 12193+* MNOTE requires that ' is doubled for expanded variables 12194+* thus build &MASTR as a copy of '&ARGS with ' doubled 12195+* 12196+* 12197+*,// XR R2,R2 12198+* 12199+* MNOTE requires that ' is doubled for expanded variables 12200+* thus build &MASTR as a copy of '&ARGS with ' doubled 12201+* 12202+* 12203+*,// D R2,=F'2' 12204+* 12205+* finally generate code: &ICNT copies of &CO1 ... 12206+* 00A680 1722 12207+ XR R2,R2 00A682 5D20 C0B8 0A710 12208+ D R2,=F'2' 00A686 1722 12209+ XR R2,R2 00A688 5D20 C0B8 0A710 12210+ D R2,=F'2' 00A68C 1722 12211+ XR R2,R2 00A68E 5D20 C0B8 0A710 12212+ D R2,=F'2' 00A692 1722 12213+ XR R2,R2 00A694 5D20 C0B8 0A710 12214+ D R2,=F'2' 00A698 1722 12215+ XR R2,R2 00A69A 5D20 C0B8 0A710 12216+ D R2,=F'2' 00A69E 1722 12217+ XR R2,R2 00A6A0 5D20 C0B8 0A710 12218+ D R2,=F'2' 00A6A4 1722 12219+ XR R2,R2 00A6A6 5D20 C0B8 0A710 12220+ D R2,=F'2' 00A6AA 1722 12221+ XR R2,R2 00A6AC 5D20 C0B8 0A710 12222+ D R2,=F'2' 00A6B0 1722 12223+ XR R2,R2 00A6B2 5D20 C0B8 0A710 12224+ D R2,=F'2' 00A6B6 1722 12225+ XR R2,R2 00A6B8 5D20 C0B8 0A710 12226+ D R2,=F'2' 00A6BC 1722 12227+ XR R2,R2 00A6BE 5D20 C0B8 0A710 12228+ D R2,=F'2' 00A6C2 1722 12229+ XR R2,R2 PAGE 225 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A6C4 5D20 C0B8 0A710 12230+ D R2,=F'2' 00A6C8 1722 12231+ XR R2,R2 00A6CA 5D20 C0B8 0A710 12232+ D R2,=F'2' 00A6CE 1722 12233+ XR R2,R2 00A6D0 5D20 C0B8 0A710 12234+ D R2,=F'2' 00A6D4 1722 12235+ XR R2,R2 00A6D6 5D20 C0B8 0A710 12236+ D R2,=F'2' 00A6DA 1722 12237+ XR R2,R2 00A6DC 5D20 C0B8 0A710 12238+ D R2,=F'2' 00A6E0 1722 12239+ XR R2,R2 00A6E2 5D20 C0B8 0A710 12240+ D R2,=F'2' 00A6E6 1722 12241+ XR R2,R2 00A6E8 5D20 C0B8 0A710 12242+ D R2,=F'2' 00A6EC 1722 12243+ XR R2,R2 00A6EE 5D20 C0B8 0A710 12244+ D R2,=F'2' 00A6F2 1722 12245+ XR R2,R2 00A6F4 5D20 C0B8 0A710 12246+ D R2,=F'2' 12247+* 00A6F8 06FB 12248 BCTR R15,R11 12249 TSIMRET 00A6FA 58F0 C0B0 0A708 12250+ L R15,=A(SAVETST) R15 := current save area 00A6FE 58DF 0004 00004 12251+ L R13,4(R15) get old save area back 00A702 98EC D00C 0000C 12252+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A706 07FE 12253+ BR 14 RETURN 02000000 12254 TSIMEND 00A708 12255+ LTORG 00A708 00000458 12256 =A(SAVETST) 00A70C 075BCD15 12257 =F'123456789' 00A710 00000002 12258 =F'2' 0A714 12259+T216TEND EQU * 12260 * 12261 * Test 22x -- arithmetic shifts ============================ 12262 * 12263 * Test 220 -- SLA R,1 -------------------------------------- 12264 * 12265 TSIMBEG T220,24000,30,4,C'SLA R,1' 12266+* 002DA4 12267+TDSCDAT CSECT 002DA8 12268+ DS 0D 12269+* 002DA8 0000A718 12270+T220TDSC DC A(T220) // TENTRY 002DAC 000000B4 12271+ DC A(T220TEND-T220) // TLENGTH 002DB0 00005DC0 12272+ DC F'24000' // TLRCNT 002DB4 0000001E 12273+ DC F'30' // TIGCNT 002DB8 00000004 12274+ DC F'4' // TLTYPE 001432 12275+TEXT CSECT 001432 E3F2F2F0 12276+SPTR0976 DC C'T220' 002DBC 12277+TDSCDAT CSECT 002DBC 12278+ DS 0F 002DBC 04001432 12279+ DC AL1(L'SPTR0976),AL3(SPTR0976) 001436 12280+TEXT CSECT 001436 E2D3C140D96BF1 12281+SPTR0977 DC C'SLA R,1' 002DC0 12282+TDSCDAT CSECT 002DC0 12283+ DS 0F 002DC0 07001436 12284+ DC AL1(L'SPTR0977),AL3(SPTR0977) PAGE 226 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 12285+* 004AE0 12286+TDSCTBL CSECT 04AE0 12287+T220TPTR EQU * 004AE0 00002DA8 12288+ DC A(T220TDSC) enabled test 12289+* 00A714 12290+TCODE CSECT 00A718 12291+ DS 0D ensure double word alignment for test 00A718 12292+T220 DS 0H 01650000 00A718 90EC D00C 0000C 12293+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A71C 18CF 12294+ LR R12,R15 base register := entry address 0A718 12295+ USING T220,R12 declare code base register 00A71E 41B0 C01E 0A736 12296+ LA R11,T220L load loop target to R11 00A722 58F0 C0B0 0A7C8 12297+ L R15,=A(SAVETST) R15 := current save area 00A726 50DF 0004 00004 12298+ ST R13,4(R15) set back pointer in current save area 00A72A 182D 12299+ LR R2,R13 remember callers save area 00A72C 18DF 12300+ LR R13,R15 setup current save area 00A72E 50D2 0008 00008 12301+ ST R13,8(R2) set forw pointer in callers save area 00000 12302+ USING TDSC,R1 declare TDSC base register 00A732 58F0 1008 00008 12303+ L R15,TLRCNT load local repeat count to R15 12304+* 12305 * 00A736 4120 0001 00001 12306 T220L LA R2,1 12307 REPINS SLA,(R2,1) repeat: SLA R2,1 12308+* 12309+* build from sublist &ALIST a comma separated string &ARGS 12310+* 12311+* 12312+* 12313+* 12314+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12315+* this allows to transfer the repeat count from last TDSCGEN call 12316+* 12317+* 12318+* 12319+* write a comment indicating what REPINS does (in case NOGEN in effect) 12320+* 12321+*,// REPINS: do 30 times: 12322+* 12323+* MNOTE requires that ' is doubled for expanded variables 12324+* thus build &MASTR as a copy of '&ARGS with ' doubled 12325+* 12326+* 12327+*,// SLA R2,1 12328+* 12329+* finally generate code: &ICNT copies of &CODE &ARGS 12330+* 00A73A 8B20 0001 00001 12331+ SLA R2,1 00A73E 8B20 0001 00001 12332+ SLA R2,1 00A742 8B20 0001 00001 12333+ SLA R2,1 00A746 8B20 0001 00001 12334+ SLA R2,1 00A74A 8B20 0001 00001 12335+ SLA R2,1 00A74E 8B20 0001 00001 12336+ SLA R2,1 00A752 8B20 0001 00001 12337+ SLA R2,1 00A756 8B20 0001 00001 12338+ SLA R2,1 00A75A 8B20 0001 00001 12339+ SLA R2,1 PAGE 227 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A75E 8B20 0001 00001 12340+ SLA R2,1 00A762 8B20 0001 00001 12341+ SLA R2,1 00A766 8B20 0001 00001 12342+ SLA R2,1 00A76A 8B20 0001 00001 12343+ SLA R2,1 00A76E 8B20 0001 00001 12344+ SLA R2,1 00A772 8B20 0001 00001 12345+ SLA R2,1 00A776 8B20 0001 00001 12346+ SLA R2,1 00A77A 8B20 0001 00001 12347+ SLA R2,1 00A77E 8B20 0001 00001 12348+ SLA R2,1 00A782 8B20 0001 00001 12349+ SLA R2,1 00A786 8B20 0001 00001 12350+ SLA R2,1 00A78A 8B20 0001 00001 12351+ SLA R2,1 00A78E 8B20 0001 00001 12352+ SLA R2,1 00A792 8B20 0001 00001 12353+ SLA R2,1 00A796 8B20 0001 00001 12354+ SLA R2,1 00A79A 8B20 0001 00001 12355+ SLA R2,1 00A79E 8B20 0001 00001 12356+ SLA R2,1 00A7A2 8B20 0001 00001 12357+ SLA R2,1 00A7A6 8B20 0001 00001 12358+ SLA R2,1 00A7AA 8B20 0001 00001 12359+ SLA R2,1 00A7AE 8B20 0001 00001 12360+ SLA R2,1 12361+* 00A7B2 06FB 12362 BCTR R15,R11 12363 TSIMRET 00A7B4 58F0 C0B0 0A7C8 12364+ L R15,=A(SAVETST) R15 := current save area 00A7B8 58DF 0004 00004 12365+ L R13,4(R15) get old save area back 00A7BC 98EC D00C 0000C 12366+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A7C0 07FE 12367+ BR 14 RETURN 02000000 12368 TSIMEND 00A7C8 12369+ LTORG 00A7C8 00000458 12370 =A(SAVETST) 0A7CC 12371+T220TEND EQU * 12372 * 12373 * Test 221 -- SLDA R,1 ------------------------------------- 12374 * 12375 TSIMBEG T221,12000,60,5,C'SLDA R,1' 12376+* 002DC4 12377+TDSCDAT CSECT 002DC8 12378+ DS 0D 12379+* 002DC8 0000A7D0 12380+T221TDSC DC A(T221) // TENTRY 002DCC 0000012C 12381+ DC A(T221TEND-T221) // TLENGTH 002DD0 00002EE0 12382+ DC F'12000' // TLRCNT 002DD4 0000003C 12383+ DC F'60' // TIGCNT 002DD8 00000005 12384+ DC F'5' // TLTYPE 00143D 12385+TEXT CSECT 00143D E3F2F2F1 12386+SPTR0988 DC C'T221' 002DDC 12387+TDSCDAT CSECT 002DDC 12388+ DS 0F 002DDC 0400143D 12389+ DC AL1(L'SPTR0988),AL3(SPTR0988) 001441 12390+TEXT CSECT 001441 E2D3C4C140D96BF1 12391+SPTR0989 DC C'SLDA R,1' 002DE0 12392+TDSCDAT CSECT 002DE0 12393+ DS 0F 002DE0 08001441 12394+ DC AL1(L'SPTR0989),AL3(SPTR0989) PAGE 228 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 12395+* 004AE4 12396+TDSCTBL CSECT 04AE4 12397+T221TPTR EQU * 004AE4 00002DC8 12398+ DC A(T221TDSC) enabled test 12399+* 00A7CC 12400+TCODE CSECT 00A7D0 12401+ DS 0D ensure double word alignment for test 00A7D0 12402+T221 DS 0H 01650000 00A7D0 90EC D00C 0000C 12403+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A7D4 18CF 12404+ LR R12,R15 base register := entry address 0A7D0 12405+ USING T221,R12 declare code base register 00A7D6 41B0 C01E 0A7EE 12406+ LA R11,T221L load loop target to R11 00A7DA 58F0 C128 0A8F8 12407+ L R15,=A(SAVETST) R15 := current save area 00A7DE 50DF 0004 00004 12408+ ST R13,4(R15) set back pointer in current save area 00A7E2 182D 12409+ LR R2,R13 remember callers save area 00A7E4 18DF 12410+ LR R13,R15 setup current save area 00A7E6 50D2 0008 00008 12411+ ST R13,8(R2) set forw pointer in callers save area 00000 12412+ USING TDSC,R1 declare TDSC base register 00A7EA 58F0 1008 00008 12413+ L R15,TLRCNT load local repeat count to R15 12414+* 12415 * 00A7EE 1722 12416 T221L XR R2,R2 00A7F0 4130 0001 00001 12417 LA R3,1 12418 REPINS SLDA,(R2,1) repeat: SLDA R2,1 12419+* 12420+* build from sublist &ALIST a comma separated string &ARGS 12421+* 12422+* 12423+* 12424+* 12425+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12426+* this allows to transfer the repeat count from last TDSCGEN call 12427+* 12428+* 12429+* 12430+* write a comment indicating what REPINS does (in case NOGEN in effect) 12431+* 12432+*,// REPINS: do 60 times: 12433+* 12434+* MNOTE requires that ' is doubled for expanded variables 12435+* thus build &MASTR as a copy of '&ARGS with ' doubled 12436+* 12437+* 12438+*,// SLDA R2,1 12439+* 12440+* finally generate code: &ICNT copies of &CODE &ARGS 12441+* 00A7F4 8F20 0001 00001 12442+ SLDA R2,1 00A7F8 8F20 0001 00001 12443+ SLDA R2,1 00A7FC 8F20 0001 00001 12444+ SLDA R2,1 00A800 8F20 0001 00001 12445+ SLDA R2,1 00A804 8F20 0001 00001 12446+ SLDA R2,1 00A808 8F20 0001 00001 12447+ SLDA R2,1 00A80C 8F20 0001 00001 12448+ SLDA R2,1 00A810 8F20 0001 00001 12449+ SLDA R2,1 PAGE 229 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A814 8F20 0001 00001 12450+ SLDA R2,1 00A818 8F20 0001 00001 12451+ SLDA R2,1 00A81C 8F20 0001 00001 12452+ SLDA R2,1 00A820 8F20 0001 00001 12453+ SLDA R2,1 00A824 8F20 0001 00001 12454+ SLDA R2,1 00A828 8F20 0001 00001 12455+ SLDA R2,1 00A82C 8F20 0001 00001 12456+ SLDA R2,1 00A830 8F20 0001 00001 12457+ SLDA R2,1 00A834 8F20 0001 00001 12458+ SLDA R2,1 00A838 8F20 0001 00001 12459+ SLDA R2,1 00A83C 8F20 0001 00001 12460+ SLDA R2,1 00A840 8F20 0001 00001 12461+ SLDA R2,1 00A844 8F20 0001 00001 12462+ SLDA R2,1 00A848 8F20 0001 00001 12463+ SLDA R2,1 00A84C 8F20 0001 00001 12464+ SLDA R2,1 00A850 8F20 0001 00001 12465+ SLDA R2,1 00A854 8F20 0001 00001 12466+ SLDA R2,1 00A858 8F20 0001 00001 12467+ SLDA R2,1 00A85C 8F20 0001 00001 12468+ SLDA R2,1 00A860 8F20 0001 00001 12469+ SLDA R2,1 00A864 8F20 0001 00001 12470+ SLDA R2,1 00A868 8F20 0001 00001 12471+ SLDA R2,1 00A86C 8F20 0001 00001 12472+ SLDA R2,1 00A870 8F20 0001 00001 12473+ SLDA R2,1 00A874 8F20 0001 00001 12474+ SLDA R2,1 00A878 8F20 0001 00001 12475+ SLDA R2,1 00A87C 8F20 0001 00001 12476+ SLDA R2,1 00A880 8F20 0001 00001 12477+ SLDA R2,1 00A884 8F20 0001 00001 12478+ SLDA R2,1 00A888 8F20 0001 00001 12479+ SLDA R2,1 00A88C 8F20 0001 00001 12480+ SLDA R2,1 00A890 8F20 0001 00001 12481+ SLDA R2,1 00A894 8F20 0001 00001 12482+ SLDA R2,1 00A898 8F20 0001 00001 12483+ SLDA R2,1 00A89C 8F20 0001 00001 12484+ SLDA R2,1 00A8A0 8F20 0001 00001 12485+ SLDA R2,1 00A8A4 8F20 0001 00001 12486+ SLDA R2,1 00A8A8 8F20 0001 00001 12487+ SLDA R2,1 00A8AC 8F20 0001 00001 12488+ SLDA R2,1 00A8B0 8F20 0001 00001 12489+ SLDA R2,1 00A8B4 8F20 0001 00001 12490+ SLDA R2,1 00A8B8 8F20 0001 00001 12491+ SLDA R2,1 00A8BC 8F20 0001 00001 12492+ SLDA R2,1 00A8C0 8F20 0001 00001 12493+ SLDA R2,1 00A8C4 8F20 0001 00001 12494+ SLDA R2,1 00A8C8 8F20 0001 00001 12495+ SLDA R2,1 00A8CC 8F20 0001 00001 12496+ SLDA R2,1 00A8D0 8F20 0001 00001 12497+ SLDA R2,1 00A8D4 8F20 0001 00001 12498+ SLDA R2,1 00A8D8 8F20 0001 00001 12499+ SLDA R2,1 00A8DC 8F20 0001 00001 12500+ SLDA R2,1 00A8E0 8F20 0001 00001 12501+ SLDA R2,1 12502+* 00A8E4 06FB 12503 BCTR R15,R11 12504 TSIMRET PAGE 230 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A8E6 58F0 C128 0A8F8 12505+ L R15,=A(SAVETST) R15 := current save area 00A8EA 58DF 0004 00004 12506+ L R13,4(R15) get old save area back 00A8EE 98EC D00C 0000C 12507+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A8F2 07FE 12508+ BR 14 RETURN 02000000 12509 TSIMEND 00A8F8 12510+ LTORG 00A8F8 00000458 12511 =A(SAVETST) 0A8FC 12512+T221TEND EQU * 12513 * 12514 * Test 222 -- SRA R,1 -------------------------------------- 12515 * 12516 TSIMBEG T222,30000,30,4,C'SRA R,1' 12517+* 002DE4 12518+TDSCDAT CSECT 002DE8 12519+ DS 0D 12520+* 002DE8 0000A900 12521+T222TDSC DC A(T222) // TENTRY 002DEC 000000B4 12522+ DC A(T222TEND-T222) // TLENGTH 002DF0 00007530 12523+ DC F'30000' // TLRCNT 002DF4 0000001E 12524+ DC F'30' // TIGCNT 002DF8 00000004 12525+ DC F'4' // TLTYPE 001449 12526+TEXT CSECT 001449 E3F2F2F2 12527+SPTR1000 DC C'T222' 002DFC 12528+TDSCDAT CSECT 002DFC 12529+ DS 0F 002DFC 04001449 12530+ DC AL1(L'SPTR1000),AL3(SPTR1000) 00144D 12531+TEXT CSECT 00144D E2D9C140D96BF1 12532+SPTR1001 DC C'SRA R,1' 002E00 12533+TDSCDAT CSECT 002E00 12534+ DS 0F 002E00 0700144D 12535+ DC AL1(L'SPTR1001),AL3(SPTR1001) 12536+* 004AE8 12537+TDSCTBL CSECT 04AE8 12538+T222TPTR EQU * 004AE8 00002DE8 12539+ DC A(T222TDSC) enabled test 12540+* 00A8FC 12541+TCODE CSECT 00A900 12542+ DS 0D ensure double word alignment for test 00A900 12543+T222 DS 0H 01650000 00A900 90EC D00C 0000C 12544+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A904 18CF 12545+ LR R12,R15 base register := entry address 0A900 12546+ USING T222,R12 declare code base register 00A906 41B0 C01E 0A91E 12547+ LA R11,T222L load loop target to R11 00A90A 58F0 C0B0 0A9B0 12548+ L R15,=A(SAVETST) R15 := current save area 00A90E 50DF 0004 00004 12549+ ST R13,4(R15) set back pointer in current save area 00A912 182D 12550+ LR R2,R13 remember callers save area 00A914 18DF 12551+ LR R13,R15 setup current save area 00A916 50D2 0008 00008 12552+ ST R13,8(R2) set forw pointer in callers save area 00000 12553+ USING TDSC,R1 declare TDSC base register 00A91A 58F0 1008 00008 12554+ L R15,TLRCNT load local repeat count to R15 12555+* 12556 * 00A91E 4120 0001 00001 12557 T222L LA R2,1 12558 REPINS SRA,(R2,1) repeat: SRA R2,1 12559+* PAGE 231 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 12560+* build from sublist &ALIST a comma separated string &ARGS 12561+* 12562+* 12563+* 12564+* 12565+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12566+* this allows to transfer the repeat count from last TDSCGEN call 12567+* 12568+* 12569+* 12570+* write a comment indicating what REPINS does (in case NOGEN in effect) 12571+* 12572+*,// REPINS: do 30 times: 12573+* 12574+* MNOTE requires that ' is doubled for expanded variables 12575+* thus build &MASTR as a copy of '&ARGS with ' doubled 12576+* 12577+* 12578+*,// SRA R2,1 12579+* 12580+* finally generate code: &ICNT copies of &CODE &ARGS 12581+* 00A922 8A20 0001 00001 12582+ SRA R2,1 00A926 8A20 0001 00001 12583+ SRA R2,1 00A92A 8A20 0001 00001 12584+ SRA R2,1 00A92E 8A20 0001 00001 12585+ SRA R2,1 00A932 8A20 0001 00001 12586+ SRA R2,1 00A936 8A20 0001 00001 12587+ SRA R2,1 00A93A 8A20 0001 00001 12588+ SRA R2,1 00A93E 8A20 0001 00001 12589+ SRA R2,1 00A942 8A20 0001 00001 12590+ SRA R2,1 00A946 8A20 0001 00001 12591+ SRA R2,1 00A94A 8A20 0001 00001 12592+ SRA R2,1 00A94E 8A20 0001 00001 12593+ SRA R2,1 00A952 8A20 0001 00001 12594+ SRA R2,1 00A956 8A20 0001 00001 12595+ SRA R2,1 00A95A 8A20 0001 00001 12596+ SRA R2,1 00A95E 8A20 0001 00001 12597+ SRA R2,1 00A962 8A20 0001 00001 12598+ SRA R2,1 00A966 8A20 0001 00001 12599+ SRA R2,1 00A96A 8A20 0001 00001 12600+ SRA R2,1 00A96E 8A20 0001 00001 12601+ SRA R2,1 00A972 8A20 0001 00001 12602+ SRA R2,1 00A976 8A20 0001 00001 12603+ SRA R2,1 00A97A 8A20 0001 00001 12604+ SRA R2,1 00A97E 8A20 0001 00001 12605+ SRA R2,1 00A982 8A20 0001 00001 12606+ SRA R2,1 00A986 8A20 0001 00001 12607+ SRA R2,1 00A98A 8A20 0001 00001 12608+ SRA R2,1 00A98E 8A20 0001 00001 12609+ SRA R2,1 00A992 8A20 0001 00001 12610+ SRA R2,1 00A996 8A20 0001 00001 12611+ SRA R2,1 12612+* 00A99A 06FB 12613 BCTR R15,R11 12614 TSIMRET PAGE 232 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00A99C 58F0 C0B0 0A9B0 12615+ L R15,=A(SAVETST) R15 := current save area 00A9A0 58DF 0004 00004 12616+ L R13,4(R15) get old save area back 00A9A4 98EC D00C 0000C 12617+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A9A8 07FE 12618+ BR 14 RETURN 02000000 12619 TSIMEND 00A9B0 12620+ LTORG 00A9B0 00000458 12621 =A(SAVETST) 0A9B4 12622+T222TEND EQU * 12623 * 12624 * Test 223 -- SRDA R,1 ------------------------------------- 12625 * 12626 TSIMBEG T223,12000,60,5,C'SRDA R,1' 12627+* 002E04 12628+TDSCDAT CSECT 002E08 12629+ DS 0D 12630+* 002E08 0000A9B8 12631+T223TDSC DC A(T223) // TENTRY 002E0C 0000012C 12632+ DC A(T223TEND-T223) // TLENGTH 002E10 00002EE0 12633+ DC F'12000' // TLRCNT 002E14 0000003C 12634+ DC F'60' // TIGCNT 002E18 00000005 12635+ DC F'5' // TLTYPE 001454 12636+TEXT CSECT 001454 E3F2F2F3 12637+SPTR1012 DC C'T223' 002E1C 12638+TDSCDAT CSECT 002E1C 12639+ DS 0F 002E1C 04001454 12640+ DC AL1(L'SPTR1012),AL3(SPTR1012) 001458 12641+TEXT CSECT 001458 E2D9C4C140D96BF1 12642+SPTR1013 DC C'SRDA R,1' 002E20 12643+TDSCDAT CSECT 002E20 12644+ DS 0F 002E20 08001458 12645+ DC AL1(L'SPTR1013),AL3(SPTR1013) 12646+* 004AEC 12647+TDSCTBL CSECT 04AEC 12648+T223TPTR EQU * 004AEC 00002E08 12649+ DC A(T223TDSC) enabled test 12650+* 00A9B4 12651+TCODE CSECT 00A9B8 12652+ DS 0D ensure double word alignment for test 00A9B8 12653+T223 DS 0H 01650000 00A9B8 90EC D00C 0000C 12654+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A9BC 18CF 12655+ LR R12,R15 base register := entry address 0A9B8 12656+ USING T223,R12 declare code base register 00A9BE 41B0 C01E 0A9D6 12657+ LA R11,T223L load loop target to R11 00A9C2 58F0 C128 0AAE0 12658+ L R15,=A(SAVETST) R15 := current save area 00A9C6 50DF 0004 00004 12659+ ST R13,4(R15) set back pointer in current save area 00A9CA 182D 12660+ LR R2,R13 remember callers save area 00A9CC 18DF 12661+ LR R13,R15 setup current save area 00A9CE 50D2 0008 00008 12662+ ST R13,8(R2) set forw pointer in callers save area 00000 12663+ USING TDSC,R1 declare TDSC base register 00A9D2 58F0 1008 00008 12664+ L R15,TLRCNT load local repeat count to R15 12665+* 12666 * 00A9D6 1722 12667 T223L XR R2,R2 00A9D8 4130 0001 00001 12668 LA R3,1 12669 REPINS SRDA,(R2,1) repeat: SRDA R2,1 PAGE 233 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 12670+* 12671+* build from sublist &ALIST a comma separated string &ARGS 12672+* 12673+* 12674+* 12675+* 12676+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12677+* this allows to transfer the repeat count from last TDSCGEN call 12678+* 12679+* 12680+* 12681+* write a comment indicating what REPINS does (in case NOGEN in effect) 12682+* 12683+*,// REPINS: do 60 times: 12684+* 12685+* MNOTE requires that ' is doubled for expanded variables 12686+* thus build &MASTR as a copy of '&ARGS with ' doubled 12687+* 12688+* 12689+*,// SRDA R2,1 12690+* 12691+* finally generate code: &ICNT copies of &CODE &ARGS 12692+* 00A9DC 8E20 0001 00001 12693+ SRDA R2,1 00A9E0 8E20 0001 00001 12694+ SRDA R2,1 00A9E4 8E20 0001 00001 12695+ SRDA R2,1 00A9E8 8E20 0001 00001 12696+ SRDA R2,1 00A9EC 8E20 0001 00001 12697+ SRDA R2,1 00A9F0 8E20 0001 00001 12698+ SRDA R2,1 00A9F4 8E20 0001 00001 12699+ SRDA R2,1 00A9F8 8E20 0001 00001 12700+ SRDA R2,1 00A9FC 8E20 0001 00001 12701+ SRDA R2,1 00AA00 8E20 0001 00001 12702+ SRDA R2,1 00AA04 8E20 0001 00001 12703+ SRDA R2,1 00AA08 8E20 0001 00001 12704+ SRDA R2,1 00AA0C 8E20 0001 00001 12705+ SRDA R2,1 00AA10 8E20 0001 00001 12706+ SRDA R2,1 00AA14 8E20 0001 00001 12707+ SRDA R2,1 00AA18 8E20 0001 00001 12708+ SRDA R2,1 00AA1C 8E20 0001 00001 12709+ SRDA R2,1 00AA20 8E20 0001 00001 12710+ SRDA R2,1 00AA24 8E20 0001 00001 12711+ SRDA R2,1 00AA28 8E20 0001 00001 12712+ SRDA R2,1 00AA2C 8E20 0001 00001 12713+ SRDA R2,1 00AA30 8E20 0001 00001 12714+ SRDA R2,1 00AA34 8E20 0001 00001 12715+ SRDA R2,1 00AA38 8E20 0001 00001 12716+ SRDA R2,1 00AA3C 8E20 0001 00001 12717+ SRDA R2,1 00AA40 8E20 0001 00001 12718+ SRDA R2,1 00AA44 8E20 0001 00001 12719+ SRDA R2,1 00AA48 8E20 0001 00001 12720+ SRDA R2,1 00AA4C 8E20 0001 00001 12721+ SRDA R2,1 00AA50 8E20 0001 00001 12722+ SRDA R2,1 00AA54 8E20 0001 00001 12723+ SRDA R2,1 00AA58 8E20 0001 00001 12724+ SRDA R2,1 PAGE 234 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00AA5C 8E20 0001 00001 12725+ SRDA R2,1 00AA60 8E20 0001 00001 12726+ SRDA R2,1 00AA64 8E20 0001 00001 12727+ SRDA R2,1 00AA68 8E20 0001 00001 12728+ SRDA R2,1 00AA6C 8E20 0001 00001 12729+ SRDA R2,1 00AA70 8E20 0001 00001 12730+ SRDA R2,1 00AA74 8E20 0001 00001 12731+ SRDA R2,1 00AA78 8E20 0001 00001 12732+ SRDA R2,1 00AA7C 8E20 0001 00001 12733+ SRDA R2,1 00AA80 8E20 0001 00001 12734+ SRDA R2,1 00AA84 8E20 0001 00001 12735+ SRDA R2,1 00AA88 8E20 0001 00001 12736+ SRDA R2,1 00AA8C 8E20 0001 00001 12737+ SRDA R2,1 00AA90 8E20 0001 00001 12738+ SRDA R2,1 00AA94 8E20 0001 00001 12739+ SRDA R2,1 00AA98 8E20 0001 00001 12740+ SRDA R2,1 00AA9C 8E20 0001 00001 12741+ SRDA R2,1 00AAA0 8E20 0001 00001 12742+ SRDA R2,1 00AAA4 8E20 0001 00001 12743+ SRDA R2,1 00AAA8 8E20 0001 00001 12744+ SRDA R2,1 00AAAC 8E20 0001 00001 12745+ SRDA R2,1 00AAB0 8E20 0001 00001 12746+ SRDA R2,1 00AAB4 8E20 0001 00001 12747+ SRDA R2,1 00AAB8 8E20 0001 00001 12748+ SRDA R2,1 00AABC 8E20 0001 00001 12749+ SRDA R2,1 00AAC0 8E20 0001 00001 12750+ SRDA R2,1 00AAC4 8E20 0001 00001 12751+ SRDA R2,1 00AAC8 8E20 0001 00001 12752+ SRDA R2,1 12753+* 00AACC 06FB 12754 BCTR R15,R11 12755 TSIMRET 00AACE 58F0 C128 0AAE0 12756+ L R15,=A(SAVETST) R15 := current save area 00AAD2 58DF 0004 00004 12757+ L R13,4(R15) get old save area back 00AAD6 98EC D00C 0000C 12758+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00AADA 07FE 12759+ BR 14 RETURN 02000000 12760 TSIMEND 00AAE0 12761+ LTORG 00AAE0 00000458 12762 =A(SAVETST) 0AAE4 12763+T223TEND EQU * 12764 * 12765 * Test 224 -- SRA R,30 ------------------------------------- 12766 * 12767 TSIMBEG T224,30000,30,4,C'SRA R,30' 12768+* 002E24 12769+TDSCDAT CSECT 002E28 12770+ DS 0D 12771+* 002E28 0000AAE8 12772+T224TDSC DC A(T224) // TENTRY 002E2C 000000B4 12773+ DC A(T224TEND-T224) // TLENGTH 002E30 00007530 12774+ DC F'30000' // TLRCNT 002E34 0000001E 12775+ DC F'30' // TIGCNT 002E38 00000004 12776+ DC F'4' // TLTYPE 001460 12777+TEXT CSECT 001460 E3F2F2F4 12778+SPTR1024 DC C'T224' 002E3C 12779+TDSCDAT CSECT PAGE 235 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002E3C 12780+ DS 0F 002E3C 04001460 12781+ DC AL1(L'SPTR1024),AL3(SPTR1024) 001464 12782+TEXT CSECT 001464 E2D9C140D96BF3F0 12783+SPTR1025 DC C'SRA R,30' 002E40 12784+TDSCDAT CSECT 002E40 12785+ DS 0F 002E40 08001464 12786+ DC AL1(L'SPTR1025),AL3(SPTR1025) 12787+* 004AF0 12788+TDSCTBL CSECT 04AF0 12789+T224TPTR EQU * 004AF0 00002E28 12790+ DC A(T224TDSC) enabled test 12791+* 00AAE4 12792+TCODE CSECT 00AAE8 12793+ DS 0D ensure double word alignment for test 00AAE8 12794+T224 DS 0H 01650000 00AAE8 90EC D00C 0000C 12795+ STM 14,12,12(13) SAVE REGISTERS 02950000 00AAEC 18CF 12796+ LR R12,R15 base register := entry address 0AAE8 12797+ USING T224,R12 declare code base register 00AAEE 41B0 C01E 0AB06 12798+ LA R11,T224L load loop target to R11 00AAF2 58F0 C0B0 0AB98 12799+ L R15,=A(SAVETST) R15 := current save area 00AAF6 50DF 0004 00004 12800+ ST R13,4(R15) set back pointer in current save area 00AAFA 182D 12801+ LR R2,R13 remember callers save area 00AAFC 18DF 12802+ LR R13,R15 setup current save area 00AAFE 50D2 0008 00008 12803+ ST R13,8(R2) set forw pointer in callers save area 00000 12804+ USING TDSC,R1 declare TDSC base register 00AB02 58F0 1008 00008 12805+ L R15,TLRCNT load local repeat count to R15 12806+* 12807 * 00AB06 4120 0001 00001 12808 T224L LA R2,1 12809 REPINS SRA,(R2,30) repeat: SRA R2,30 12810+* 12811+* build from sublist &ALIST a comma separated string &ARGS 12812+* 12813+* 12814+* 12815+* 12816+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12817+* this allows to transfer the repeat count from last TDSCGEN call 12818+* 12819+* 12820+* 12821+* write a comment indicating what REPINS does (in case NOGEN in effect) 12822+* 12823+*,// REPINS: do 30 times: 12824+* 12825+* MNOTE requires that ' is doubled for expanded variables 12826+* thus build &MASTR as a copy of '&ARGS with ' doubled 12827+* 12828+* 12829+*,// SRA R2,30 12830+* 12831+* finally generate code: &ICNT copies of &CODE &ARGS 12832+* 00AB0A 8A20 001E 0001E 12833+ SRA R2,30 00AB0E 8A20 001E 0001E 12834+ SRA R2,30 PAGE 236 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00AB12 8A20 001E 0001E 12835+ SRA R2,30 00AB16 8A20 001E 0001E 12836+ SRA R2,30 00AB1A 8A20 001E 0001E 12837+ SRA R2,30 00AB1E 8A20 001E 0001E 12838+ SRA R2,30 00AB22 8A20 001E 0001E 12839+ SRA R2,30 00AB26 8A20 001E 0001E 12840+ SRA R2,30 00AB2A 8A20 001E 0001E 12841+ SRA R2,30 00AB2E 8A20 001E 0001E 12842+ SRA R2,30 00AB32 8A20 001E 0001E 12843+ SRA R2,30 00AB36 8A20 001E 0001E 12844+ SRA R2,30 00AB3A 8A20 001E 0001E 12845+ SRA R2,30 00AB3E 8A20 001E 0001E 12846+ SRA R2,30 00AB42 8A20 001E 0001E 12847+ SRA R2,30 00AB46 8A20 001E 0001E 12848+ SRA R2,30 00AB4A 8A20 001E 0001E 12849+ SRA R2,30 00AB4E 8A20 001E 0001E 12850+ SRA R2,30 00AB52 8A20 001E 0001E 12851+ SRA R2,30 00AB56 8A20 001E 0001E 12852+ SRA R2,30 00AB5A 8A20 001E 0001E 12853+ SRA R2,30 00AB5E 8A20 001E 0001E 12854+ SRA R2,30 00AB62 8A20 001E 0001E 12855+ SRA R2,30 00AB66 8A20 001E 0001E 12856+ SRA R2,30 00AB6A 8A20 001E 0001E 12857+ SRA R2,30 00AB6E 8A20 001E 0001E 12858+ SRA R2,30 00AB72 8A20 001E 0001E 12859+ SRA R2,30 00AB76 8A20 001E 0001E 12860+ SRA R2,30 00AB7A 8A20 001E 0001E 12861+ SRA R2,30 00AB7E 8A20 001E 0001E 12862+ SRA R2,30 12863+* 00AB82 06FB 12864 BCTR R15,R11 12865 TSIMRET 00AB84 58F0 C0B0 0AB98 12866+ L R15,=A(SAVETST) R15 := current save area 00AB88 58DF 0004 00004 12867+ L R13,4(R15) get old save area back 00AB8C 98EC D00C 0000C 12868+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00AB90 07FE 12869+ BR 14 RETURN 02000000 12870 TSIMEND 00AB98 12871+ LTORG 00AB98 00000458 12872 =A(SAVETST) 0AB9C 12873+T224TEND EQU * 12874 * 12875 * Test 225 -- SRDA R,60 ------------------------------------ 12876 * 12877 TSIMBEG T225,12000,60,5,C'SRDA R,60' 12878+* 002E44 12879+TDSCDAT CSECT 002E48 12880+ DS 0D 12881+* 002E48 0000ABA0 12882+T225TDSC DC A(T225) // TENTRY 002E4C 0000012C 12883+ DC A(T225TEND-T225) // TLENGTH 002E50 00002EE0 12884+ DC F'12000' // TLRCNT 002E54 0000003C 12885+ DC F'60' // TIGCNT 002E58 00000005 12886+ DC F'5' // TLTYPE 00146C 12887+TEXT CSECT 00146C E3F2F2F5 12888+SPTR1036 DC C'T225' 002E5C 12889+TDSCDAT CSECT PAGE 237 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002E5C 12890+ DS 0F 002E5C 0400146C 12891+ DC AL1(L'SPTR1036),AL3(SPTR1036) 001470 12892+TEXT CSECT 001470 E2D9C4C140D96BF6 12893+SPTR1037 DC C'SRDA R,60' 002E60 12894+TDSCDAT CSECT 002E60 12895+ DS 0F 002E60 09001470 12896+ DC AL1(L'SPTR1037),AL3(SPTR1037) 12897+* 004AF4 12898+TDSCTBL CSECT 04AF4 12899+T225TPTR EQU * 004AF4 00002E48 12900+ DC A(T225TDSC) enabled test 12901+* 00AB9C 12902+TCODE CSECT 00ABA0 12903+ DS 0D ensure double word alignment for test 00ABA0 12904+T225 DS 0H 01650000 00ABA0 90EC D00C 0000C 12905+ STM 14,12,12(13) SAVE REGISTERS 02950000 00ABA4 18CF 12906+ LR R12,R15 base register := entry address 0ABA0 12907+ USING T225,R12 declare code base register 00ABA6 41B0 C01E 0ABBE 12908+ LA R11,T225L load loop target to R11 00ABAA 58F0 C128 0ACC8 12909+ L R15,=A(SAVETST) R15 := current save area 00ABAE 50DF 0004 00004 12910+ ST R13,4(R15) set back pointer in current save area 00ABB2 182D 12911+ LR R2,R13 remember callers save area 00ABB4 18DF 12912+ LR R13,R15 setup current save area 00ABB6 50D2 0008 00008 12913+ ST R13,8(R2) set forw pointer in callers save area 00000 12914+ USING TDSC,R1 declare TDSC base register 00ABBA 58F0 1008 00008 12915+ L R15,TLRCNT load local repeat count to R15 12916+* 12917 * 00ABBE 1722 12918 T225L XR R2,R2 00ABC0 4130 0001 00001 12919 LA R3,1 12920 REPINS SRDA,(R2,60) repeat: SRDA R2,60 12921+* 12922+* build from sublist &ALIST a comma separated string &ARGS 12923+* 12924+* 12925+* 12926+* 12927+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12928+* this allows to transfer the repeat count from last TDSCGEN call 12929+* 12930+* 12931+* 12932+* write a comment indicating what REPINS does (in case NOGEN in effect) 12933+* 12934+*,// REPINS: do 60 times: 12935+* 12936+* MNOTE requires that ' is doubled for expanded variables 12937+* thus build &MASTR as a copy of '&ARGS with ' doubled 12938+* 12939+* 12940+*,// SRDA R2,60 12941+* 12942+* finally generate code: &ICNT copies of &CODE &ARGS 12943+* 00ABC4 8E20 003C 0003C 12944+ SRDA R2,60 PAGE 238 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00ABC8 8E20 003C 0003C 12945+ SRDA R2,60 00ABCC 8E20 003C 0003C 12946+ SRDA R2,60 00ABD0 8E20 003C 0003C 12947+ SRDA R2,60 00ABD4 8E20 003C 0003C 12948+ SRDA R2,60 00ABD8 8E20 003C 0003C 12949+ SRDA R2,60 00ABDC 8E20 003C 0003C 12950+ SRDA R2,60 00ABE0 8E20 003C 0003C 12951+ SRDA R2,60 00ABE4 8E20 003C 0003C 12952+ SRDA R2,60 00ABE8 8E20 003C 0003C 12953+ SRDA R2,60 00ABEC 8E20 003C 0003C 12954+ SRDA R2,60 00ABF0 8E20 003C 0003C 12955+ SRDA R2,60 00ABF4 8E20 003C 0003C 12956+ SRDA R2,60 00ABF8 8E20 003C 0003C 12957+ SRDA R2,60 00ABFC 8E20 003C 0003C 12958+ SRDA R2,60 00AC00 8E20 003C 0003C 12959+ SRDA R2,60 00AC04 8E20 003C 0003C 12960+ SRDA R2,60 00AC08 8E20 003C 0003C 12961+ SRDA R2,60 00AC0C 8E20 003C 0003C 12962+ SRDA R2,60 00AC10 8E20 003C 0003C 12963+ SRDA R2,60 00AC14 8E20 003C 0003C 12964+ SRDA R2,60 00AC18 8E20 003C 0003C 12965+ SRDA R2,60 00AC1C 8E20 003C 0003C 12966+ SRDA R2,60 00AC20 8E20 003C 0003C 12967+ SRDA R2,60 00AC24 8E20 003C 0003C 12968+ SRDA R2,60 00AC28 8E20 003C 0003C 12969+ SRDA R2,60 00AC2C 8E20 003C 0003C 12970+ SRDA R2,60 00AC30 8E20 003C 0003C 12971+ SRDA R2,60 00AC34 8E20 003C 0003C 12972+ SRDA R2,60 00AC38 8E20 003C 0003C 12973+ SRDA R2,60 00AC3C 8E20 003C 0003C 12974+ SRDA R2,60 00AC40 8E20 003C 0003C 12975+ SRDA R2,60 00AC44 8E20 003C 0003C 12976+ SRDA R2,60 00AC48 8E20 003C 0003C 12977+ SRDA R2,60 00AC4C 8E20 003C 0003C 12978+ SRDA R2,60 00AC50 8E20 003C 0003C 12979+ SRDA R2,60 00AC54 8E20 003C 0003C 12980+ SRDA R2,60 00AC58 8E20 003C 0003C 12981+ SRDA R2,60 00AC5C 8E20 003C 0003C 12982+ SRDA R2,60 00AC60 8E20 003C 0003C 12983+ SRDA R2,60 00AC64 8E20 003C 0003C 12984+ SRDA R2,60 00AC68 8E20 003C 0003C 12985+ SRDA R2,60 00AC6C 8E20 003C 0003C 12986+ SRDA R2,60 00AC70 8E20 003C 0003C 12987+ SRDA R2,60 00AC74 8E20 003C 0003C 12988+ SRDA R2,60 00AC78 8E20 003C 0003C 12989+ SRDA R2,60 00AC7C 8E20 003C 0003C 12990+ SRDA R2,60 00AC80 8E20 003C 0003C 12991+ SRDA R2,60 00AC84 8E20 003C 0003C 12992+ SRDA R2,60 00AC88 8E20 003C 0003C 12993+ SRDA R2,60 00AC8C 8E20 003C 0003C 12994+ SRDA R2,60 00AC90 8E20 003C 0003C 12995+ SRDA R2,60 00AC94 8E20 003C 0003C 12996+ SRDA R2,60 00AC98 8E20 003C 0003C 12997+ SRDA R2,60 00AC9C 8E20 003C 0003C 12998+ SRDA R2,60 00ACA0 8E20 003C 0003C 12999+ SRDA R2,60 PAGE 239 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00ACA4 8E20 003C 0003C 13000+ SRDA R2,60 00ACA8 8E20 003C 0003C 13001+ SRDA R2,60 00ACAC 8E20 003C 0003C 13002+ SRDA R2,60 00ACB0 8E20 003C 0003C 13003+ SRDA R2,60 13004+* 00ACB4 06FB 13005 BCTR R15,R11 13006 TSIMRET 00ACB6 58F0 C128 0ACC8 13007+ L R15,=A(SAVETST) R15 := current save area 00ACBA 58DF 0004 00004 13008+ L R13,4(R15) get old save area back 00ACBE 98EC D00C 0000C 13009+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00ACC2 07FE 13010+ BR 14 RETURN 02000000 13011 TSIMEND 00ACC8 13012+ LTORG 00ACC8 00000458 13013 =A(SAVETST) 0ACCC 13014+T225TEND EQU * 13015 * 13016 * Test 23x -- logical and/or/xor =========================== 13017 * 13018 * Test 230 -- XR R,R --------------------------------------- 13019 * 13020 TSIMBEG T230,15000,100,1,C'XR R,R' 13021+* 002E64 13022+TDSCDAT CSECT 002E68 13023+ DS 0D 13024+* 002E68 0000ACD0 13025+T230TDSC DC A(T230) // TENTRY 002E6C 00000104 13026+ DC A(T230TEND-T230) // TLENGTH 002E70 00003A98 13027+ DC F'15000' // TLRCNT 002E74 00000064 13028+ DC F'100' // TIGCNT 002E78 00000001 13029+ DC F'1' // TLTYPE 001479 13030+TEXT CSECT 001479 E3F2F3F0 13031+SPTR1048 DC C'T230' 002E7C 13032+TDSCDAT CSECT 002E7C 13033+ DS 0F 002E7C 04001479 13034+ DC AL1(L'SPTR1048),AL3(SPTR1048) 00147D 13035+TEXT CSECT 00147D E7D940D96BD9 13036+SPTR1049 DC C'XR R,R' 002E80 13037+TDSCDAT CSECT 002E80 13038+ DS 0F 002E80 0600147D 13039+ DC AL1(L'SPTR1049),AL3(SPTR1049) 13040+* 004AF8 13041+TDSCTBL CSECT 04AF8 13042+T230TPTR EQU * 004AF8 00002E68 13043+ DC A(T230TDSC) enabled test 13044+* 00ACCC 13045+TCODE CSECT 00ACD0 13046+ DS 0D ensure double word alignment for test 00ACD0 13047+T230 DS 0H 01650000 00ACD0 90EC D00C 0000C 13048+ STM 14,12,12(13) SAVE REGISTERS 02950000 00ACD4 18CF 13049+ LR R12,R15 base register := entry address 0ACD0 13050+ USING T230,R12 declare code base register 00ACD6 41B0 C024 0ACF4 13051+ LA R11,T230L load loop target to R11 00ACDA 58F0 C100 0ADD0 13052+ L R15,=A(SAVETST) R15 := current save area 00ACDE 50DF 0004 00004 13053+ ST R13,4(R15) set back pointer in current save area 00ACE2 182D 13054+ LR R2,R13 remember callers save area PAGE 240 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00ACE4 18DF 13055+ LR R13,R15 setup current save area 00ACE6 50D2 0008 00008 13056+ ST R13,8(R2) set forw pointer in callers save area 00000 13057+ USING TDSC,R1 declare TDSC base register 00ACEA 58F0 1008 00008 13058+ L R15,TLRCNT load local repeat count to R15 13059+* 13060 * 00ACEE 1722 13061 XR R2,R2 00ACF0 4130 0001 00001 13062 LA R3,1 13063 T230L REPINS XR,(R2,R3) repeat: XR R2,R3 13064+* 13065+* build from sublist &ALIST a comma separated string &ARGS 13066+* 13067+* 13068+* 13069+* 13070+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13071+* this allows to transfer the repeat count from last TDSCGEN call 13072+* 13073+* 0ACF4 13074+T230L EQU * 13075+* 13076+* write a comment indicating what REPINS does (in case NOGEN in effect) 13077+* 13078+*,// REPINS: do 100 times: 13079+* 13080+* MNOTE requires that ' is doubled for expanded variables 13081+* thus build &MASTR as a copy of '&ARGS with ' doubled 13082+* 13083+* 13084+*,// XR R2,R3 13085+* 13086+* finally generate code: &ICNT copies of &CODE &ARGS 13087+* 00ACF4 1723 13088+ XR R2,R3 00ACF6 1723 13089+ XR R2,R3 00ACF8 1723 13090+ XR R2,R3 00ACFA 1723 13091+ XR R2,R3 00ACFC 1723 13092+ XR R2,R3 00ACFE 1723 13093+ XR R2,R3 00AD00 1723 13094+ XR R2,R3 00AD02 1723 13095+ XR R2,R3 00AD04 1723 13096+ XR R2,R3 00AD06 1723 13097+ XR R2,R3 00AD08 1723 13098+ XR R2,R3 00AD0A 1723 13099+ XR R2,R3 00AD0C 1723 13100+ XR R2,R3 00AD0E 1723 13101+ XR R2,R3 00AD10 1723 13102+ XR R2,R3 00AD12 1723 13103+ XR R2,R3 00AD14 1723 13104+ XR R2,R3 00AD16 1723 13105+ XR R2,R3 00AD18 1723 13106+ XR R2,R3 00AD1A 1723 13107+ XR R2,R3 00AD1C 1723 13108+ XR R2,R3 00AD1E 1723 13109+ XR R2,R3 PAGE 241 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00AD20 1723 13110+ XR R2,R3 00AD22 1723 13111+ XR R2,R3 00AD24 1723 13112+ XR R2,R3 00AD26 1723 13113+ XR R2,R3 00AD28 1723 13114+ XR R2,R3 00AD2A 1723 13115+ XR R2,R3 00AD2C 1723 13116+ XR R2,R3 00AD2E 1723 13117+ XR R2,R3 00AD30 1723 13118+ XR R2,R3 00AD32 1723 13119+ XR R2,R3 00AD34 1723 13120+ XR R2,R3 00AD36 1723 13121+ XR R2,R3 00AD38 1723 13122+ XR R2,R3 00AD3A 1723 13123+ XR R2,R3 00AD3C 1723 13124+ XR R2,R3 00AD3E 1723 13125+ XR R2,R3 00AD40 1723 13126+ XR R2,R3 00AD42 1723 13127+ XR R2,R3 00AD44 1723 13128+ XR R2,R3 00AD46 1723 13129+ XR R2,R3 00AD48 1723 13130+ XR R2,R3 00AD4A 1723 13131+ XR R2,R3 00AD4C 1723 13132+ XR R2,R3 00AD4E 1723 13133+ XR R2,R3 00AD50 1723 13134+ XR R2,R3 00AD52 1723 13135+ XR R2,R3 00AD54 1723 13136+ XR R2,R3 00AD56 1723 13137+ XR R2,R3 00AD58 1723 13138+ XR R2,R3 00AD5A 1723 13139+ XR R2,R3 00AD5C 1723 13140+ XR R2,R3 00AD5E 1723 13141+ XR R2,R3 00AD60 1723 13142+ XR R2,R3 00AD62 1723 13143+ XR R2,R3 00AD64 1723 13144+ XR R2,R3 00AD66 1723 13145+ XR R2,R3 00AD68 1723 13146+ XR R2,R3 00AD6A 1723 13147+ XR R2,R3 00AD6C 1723 13148+ XR R2,R3 00AD6E 1723 13149+ XR R2,R3 00AD70 1723 13150+ XR R2,R3 00AD72 1723 13151+ XR R2,R3 00AD74 1723 13152+ XR R2,R3 00AD76 1723 13153+ XR R2,R3 00AD78 1723 13154+ XR R2,R3 00AD7A 1723 13155+ XR R2,R3 00AD7C 1723 13156+ XR R2,R3 00AD7E 1723 13157+ XR R2,R3 00AD80 1723 13158+ XR R2,R3 00AD82 1723 13159+ XR R2,R3 00AD84 1723 13160+ XR R2,R3 00AD86 1723 13161+ XR R2,R3 00AD88 1723 13162+ XR R2,R3 00AD8A 1723 13163+ XR R2,R3 00AD8C 1723 13164+ XR R2,R3 PAGE 242 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00AD8E 1723 13165+ XR R2,R3 00AD90 1723 13166+ XR R2,R3 00AD92 1723 13167+ XR R2,R3 00AD94 1723 13168+ XR R2,R3 00AD96 1723 13169+ XR R2,R3 00AD98 1723 13170+ XR R2,R3 00AD9A 1723 13171+ XR R2,R3 00AD9C 1723 13172+ XR R2,R3 00AD9E 1723 13173+ XR R2,R3 00ADA0 1723 13174+ XR R2,R3 00ADA2 1723 13175+ XR R2,R3 00ADA4 1723 13176+ XR R2,R3 00ADA6 1723 13177+ XR R2,R3 00ADA8 1723 13178+ XR R2,R3 00ADAA 1723 13179+ XR R2,R3 00ADAC 1723 13180+ XR R2,R3 00ADAE 1723 13181+ XR R2,R3 00ADB0 1723 13182+ XR R2,R3 00ADB2 1723 13183+ XR R2,R3 00ADB4 1723 13184+ XR R2,R3 00ADB6 1723 13185+ XR R2,R3 00ADB8 1723 13186+ XR R2,R3 00ADBA 1723 13187+ XR R2,R3 13188+* 00ADBC 06FB 13189 BCTR R15,R11 13190 TSIMRET 00ADBE 58F0 C100 0ADD0 13191+ L R15,=A(SAVETST) R15 := current save area 00ADC2 58DF 0004 00004 13192+ L R13,4(R15) get old save area back 00ADC6 98EC D00C 0000C 13193+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00ADCA 07FE 13194+ BR 14 RETURN 02000000 13195 TSIMEND 00ADD0 13196+ LTORG 00ADD0 00000458 13197 =A(SAVETST) 0ADD4 13198+T230TEND EQU * 13199 * 13200 * Test 231 -- X R,m ---------------------------------------- 13201 * 13202 TSIMBEG T231,10000,50,1,C'X R,m' 13203+* 002E84 13204+TDSCDAT CSECT 002E88 13205+ DS 0D 13206+* 002E88 0000ADD8 13207+T231TDSC DC A(T231) // TENTRY 002E8C 00000100 13208+ DC A(T231TEND-T231) // TLENGTH 002E90 00002710 13209+ DC F'10000' // TLRCNT 002E94 00000032 13210+ DC F'50' // TIGCNT 002E98 00000001 13211+ DC F'1' // TLTYPE 001483 13212+TEXT CSECT 001483 E3F2F3F1 13213+SPTR1060 DC C'T231' 002E9C 13214+TDSCDAT CSECT 002E9C 13215+ DS 0F 002E9C 04001483 13216+ DC AL1(L'SPTR1060),AL3(SPTR1060) 001487 13217+TEXT CSECT 001487 E740D96B94 13218+SPTR1061 DC C'X R,m' 002EA0 13219+TDSCDAT CSECT PAGE 243 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002EA0 13220+ DS 0F 002EA0 05001487 13221+ DC AL1(L'SPTR1061),AL3(SPTR1061) 13222+* 004AFC 13223+TDSCTBL CSECT 04AFC 13224+T231TPTR EQU * 004AFC 00002E88 13225+ DC A(T231TDSC) enabled test 13226+* 00ADD4 13227+TCODE CSECT 00ADD8 13228+ DS 0D ensure double word alignment for test 00ADD8 13229+T231 DS 0H 01650000 00ADD8 90EC D00C 0000C 13230+ STM 14,12,12(13) SAVE REGISTERS 02950000 00ADDC 18CF 13231+ LR R12,R15 base register := entry address 0ADD8 13232+ USING T231,R12 declare code base register 00ADDE 41B0 C020 0ADF8 13233+ LA R11,T231L load loop target to R11 00ADE2 58F0 C0F8 0AED0 13234+ L R15,=A(SAVETST) R15 := current save area 00ADE6 50DF 0004 00004 13235+ ST R13,4(R15) set back pointer in current save area 00ADEA 182D 13236+ LR R2,R13 remember callers save area 00ADEC 18DF 13237+ LR R13,R15 setup current save area 00ADEE 50D2 0008 00008 13238+ ST R13,8(R2) set forw pointer in callers save area 00000 13239+ USING TDSC,R1 declare TDSC base register 00ADF2 58F0 1008 00008 13240+ L R15,TLRCNT load local repeat count to R15 13241+* 13242 * 00ADF6 1722 13243 XR R2,R2 13244 T231L REPINS X,(R2,=F'1') repeat: X R2,=F'1' 13245+* 13246+* build from sublist &ALIST a comma separated string &ARGS 13247+* 13248+* 13249+* 13250+* 13251+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13252+* this allows to transfer the repeat count from last TDSCGEN call 13253+* 13254+* 0ADF8 13255+T231L EQU * 13256+* 13257+* write a comment indicating what REPINS does (in case NOGEN in effect) 13258+* 13259+*,// REPINS: do 50 times: 13260+* 13261+* MNOTE requires that ' is doubled for expanded variables 13262+* thus build &MASTR as a copy of '&ARGS with ' doubled 13263+* 13264+* 13265+*,// X R2,=F'1' 13266+* 13267+* finally generate code: &ICNT copies of &CODE &ARGS 13268+* 00ADF8 5720 C0FC 0AED4 13269+ X R2,=F'1' 00ADFC 5720 C0FC 0AED4 13270+ X R2,=F'1' 00AE00 5720 C0FC 0AED4 13271+ X R2,=F'1' 00AE04 5720 C0FC 0AED4 13272+ X R2,=F'1' 00AE08 5720 C0FC 0AED4 13273+ X R2,=F'1' 00AE0C 5720 C0FC 0AED4 13274+ X R2,=F'1' PAGE 244 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00AE10 5720 C0FC 0AED4 13275+ X R2,=F'1' 00AE14 5720 C0FC 0AED4 13276+ X R2,=F'1' 00AE18 5720 C0FC 0AED4 13277+ X R2,=F'1' 00AE1C 5720 C0FC 0AED4 13278+ X R2,=F'1' 00AE20 5720 C0FC 0AED4 13279+ X R2,=F'1' 00AE24 5720 C0FC 0AED4 13280+ X R2,=F'1' 00AE28 5720 C0FC 0AED4 13281+ X R2,=F'1' 00AE2C 5720 C0FC 0AED4 13282+ X R2,=F'1' 00AE30 5720 C0FC 0AED4 13283+ X R2,=F'1' 00AE34 5720 C0FC 0AED4 13284+ X R2,=F'1' 00AE38 5720 C0FC 0AED4 13285+ X R2,=F'1' 00AE3C 5720 C0FC 0AED4 13286+ X R2,=F'1' 00AE40 5720 C0FC 0AED4 13287+ X R2,=F'1' 00AE44 5720 C0FC 0AED4 13288+ X R2,=F'1' 00AE48 5720 C0FC 0AED4 13289+ X R2,=F'1' 00AE4C 5720 C0FC 0AED4 13290+ X R2,=F'1' 00AE50 5720 C0FC 0AED4 13291+ X R2,=F'1' 00AE54 5720 C0FC 0AED4 13292+ X R2,=F'1' 00AE58 5720 C0FC 0AED4 13293+ X R2,=F'1' 00AE5C 5720 C0FC 0AED4 13294+ X R2,=F'1' 00AE60 5720 C0FC 0AED4 13295+ X R2,=F'1' 00AE64 5720 C0FC 0AED4 13296+ X R2,=F'1' 00AE68 5720 C0FC 0AED4 13297+ X R2,=F'1' 00AE6C 5720 C0FC 0AED4 13298+ X R2,=F'1' 00AE70 5720 C0FC 0AED4 13299+ X R2,=F'1' 00AE74 5720 C0FC 0AED4 13300+ X R2,=F'1' 00AE78 5720 C0FC 0AED4 13301+ X R2,=F'1' 00AE7C 5720 C0FC 0AED4 13302+ X R2,=F'1' 00AE80 5720 C0FC 0AED4 13303+ X R2,=F'1' 00AE84 5720 C0FC 0AED4 13304+ X R2,=F'1' 00AE88 5720 C0FC 0AED4 13305+ X R2,=F'1' 00AE8C 5720 C0FC 0AED4 13306+ X R2,=F'1' 00AE90 5720 C0FC 0AED4 13307+ X R2,=F'1' 00AE94 5720 C0FC 0AED4 13308+ X R2,=F'1' 00AE98 5720 C0FC 0AED4 13309+ X R2,=F'1' 00AE9C 5720 C0FC 0AED4 13310+ X R2,=F'1' 00AEA0 5720 C0FC 0AED4 13311+ X R2,=F'1' 00AEA4 5720 C0FC 0AED4 13312+ X R2,=F'1' 00AEA8 5720 C0FC 0AED4 13313+ X R2,=F'1' 00AEAC 5720 C0FC 0AED4 13314+ X R2,=F'1' 00AEB0 5720 C0FC 0AED4 13315+ X R2,=F'1' 00AEB4 5720 C0FC 0AED4 13316+ X R2,=F'1' 00AEB8 5720 C0FC 0AED4 13317+ X R2,=F'1' 00AEBC 5720 C0FC 0AED4 13318+ X R2,=F'1' 13319+* 00AEC0 06FB 13320 BCTR R15,R11 13321 TSIMRET 00AEC2 58F0 C0F8 0AED0 13322+ L R15,=A(SAVETST) R15 := current save area 00AEC6 58DF 0004 00004 13323+ L R13,4(R15) get old save area back 00AECA 98EC D00C 0000C 13324+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00AECE 07FE 13325+ BR 14 RETURN 02000000 13326 TSIMEND 00AED0 13327+ LTORG 00AED0 00000458 13328 =A(SAVETST) 00AED4 00000001 13329 =F'1' PAGE 245 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 0AED8 13330+T231TEND EQU * 13331 * 13332 * Test 232 -- XI R,i --------------------------------------- 13333 * 13334 TSIMBEG T232,10000,50,1,C'XI m,i' 13335+* 002EA4 13336+TDSCDAT CSECT 002EA8 13337+ DS 0D 13338+* 002EA8 0000AED8 13339+T232TDSC DC A(T232) // TENTRY 002EAC 000000FC 13340+ DC A(T232TEND-T232) // TLENGTH 002EB0 00002710 13341+ DC F'10000' // TLRCNT 002EB4 00000032 13342+ DC F'50' // TIGCNT 002EB8 00000001 13343+ DC F'1' // TLTYPE 00148C 13344+TEXT CSECT 00148C E3F2F3F2 13345+SPTR1072 DC C'T232' 002EBC 13346+TDSCDAT CSECT 002EBC 13347+ DS 0F 002EBC 0400148C 13348+ DC AL1(L'SPTR1072),AL3(SPTR1072) 001490 13349+TEXT CSECT 001490 E7C940946B89 13350+SPTR1073 DC C'XI m,i' 002EC0 13351+TDSCDAT CSECT 002EC0 13352+ DS 0F 002EC0 06001490 13353+ DC AL1(L'SPTR1073),AL3(SPTR1073) 13354+* 004B00 13355+TDSCTBL CSECT 04B00 13356+T232TPTR EQU * 004B00 00002EA8 13357+ DC A(T232TDSC) enabled test 13358+* 00AED8 13359+TCODE CSECT 00AED8 13360+ DS 0D ensure double word alignment for test 00AED8 13361+T232 DS 0H 01650000 00AED8 90EC D00C 0000C 13362+ STM 14,12,12(13) SAVE REGISTERS 02950000 00AEDC 18CF 13363+ LR R12,R15 base register := entry address 0AED8 13364+ USING T232,R12 declare code base register 00AEDE 41B0 C01E 0AEF6 13365+ LA R11,T232L load loop target to R11 00AEE2 58F0 C0F8 0AFD0 13366+ L R15,=A(SAVETST) R15 := current save area 00AEE6 50DF 0004 00004 13367+ ST R13,4(R15) set back pointer in current save area 00AEEA 182D 13368+ LR R2,R13 remember callers save area 00AEEC 18DF 13369+ LR R13,R15 setup current save area 00AEEE 50D2 0008 00008 13370+ ST R13,8(R2) set forw pointer in callers save area 00000 13371+ USING TDSC,R1 declare TDSC base register 00AEF2 58F0 1008 00008 13372+ L R15,TLRCNT load local repeat count to R15 13373+* 13374 * 13375 T232L REPINS XI,(T232V,X'FF') repeat: XI T232V,X'FF' 13376+* 13377+* build from sublist &ALIST a comma separated string &ARGS 13378+* 13379+* 13380+* 13381+* 13382+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13383+* this allows to transfer the repeat count from last TDSCGEN call 13384+* PAGE 246 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 13385+* 0AEF6 13386+T232L EQU * 13387+* 13388+* write a comment indicating what REPINS does (in case NOGEN in effect) 13389+* 13390+*,// REPINS: do 50 times: 13391+* 13392+* MNOTE requires that ' is doubled for expanded variables 13393+* thus build &MASTR as a copy of '&ARGS with ' doubled 13394+* 13395+* 13396+*,// XI T232V,X'FF' 13397+* 13398+* finally generate code: &ICNT copies of &CODE &ARGS 13399+* 00AEF6 97FF C0F6 0AFCE 13400+ XI T232V,X'FF' 00AEFA 97FF C0F6 0AFCE 13401+ XI T232V,X'FF' 00AEFE 97FF C0F6 0AFCE 13402+ XI T232V,X'FF' 00AF02 97FF C0F6 0AFCE 13403+ XI T232V,X'FF' 00AF06 97FF C0F6 0AFCE 13404+ XI T232V,X'FF' 00AF0A 97FF C0F6 0AFCE 13405+ XI T232V,X'FF' 00AF0E 97FF C0F6 0AFCE 13406+ XI T232V,X'FF' 00AF12 97FF C0F6 0AFCE 13407+ XI T232V,X'FF' 00AF16 97FF C0F6 0AFCE 13408+ XI T232V,X'FF' 00AF1A 97FF C0F6 0AFCE 13409+ XI T232V,X'FF' 00AF1E 97FF C0F6 0AFCE 13410+ XI T232V,X'FF' 00AF22 97FF C0F6 0AFCE 13411+ XI T232V,X'FF' 00AF26 97FF C0F6 0AFCE 13412+ XI T232V,X'FF' 00AF2A 97FF C0F6 0AFCE 13413+ XI T232V,X'FF' 00AF2E 97FF C0F6 0AFCE 13414+ XI T232V,X'FF' 00AF32 97FF C0F6 0AFCE 13415+ XI T232V,X'FF' 00AF36 97FF C0F6 0AFCE 13416+ XI T232V,X'FF' 00AF3A 97FF C0F6 0AFCE 13417+ XI T232V,X'FF' 00AF3E 97FF C0F6 0AFCE 13418+ XI T232V,X'FF' 00AF42 97FF C0F6 0AFCE 13419+ XI T232V,X'FF' 00AF46 97FF C0F6 0AFCE 13420+ XI T232V,X'FF' 00AF4A 97FF C0F6 0AFCE 13421+ XI T232V,X'FF' 00AF4E 97FF C0F6 0AFCE 13422+ XI T232V,X'FF' 00AF52 97FF C0F6 0AFCE 13423+ XI T232V,X'FF' 00AF56 97FF C0F6 0AFCE 13424+ XI T232V,X'FF' 00AF5A 97FF C0F6 0AFCE 13425+ XI T232V,X'FF' 00AF5E 97FF C0F6 0AFCE 13426+ XI T232V,X'FF' 00AF62 97FF C0F6 0AFCE 13427+ XI T232V,X'FF' 00AF66 97FF C0F6 0AFCE 13428+ XI T232V,X'FF' 00AF6A 97FF C0F6 0AFCE 13429+ XI T232V,X'FF' 00AF6E 97FF C0F6 0AFCE 13430+ XI T232V,X'FF' 00AF72 97FF C0F6 0AFCE 13431+ XI T232V,X'FF' 00AF76 97FF C0F6 0AFCE 13432+ XI T232V,X'FF' 00AF7A 97FF C0F6 0AFCE 13433+ XI T232V,X'FF' 00AF7E 97FF C0F6 0AFCE 13434+ XI T232V,X'FF' 00AF82 97FF C0F6 0AFCE 13435+ XI T232V,X'FF' 00AF86 97FF C0F6 0AFCE 13436+ XI T232V,X'FF' 00AF8A 97FF C0F6 0AFCE 13437+ XI T232V,X'FF' 00AF8E 97FF C0F6 0AFCE 13438+ XI T232V,X'FF' 00AF92 97FF C0F6 0AFCE 13439+ XI T232V,X'FF' PAGE 247 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00AF96 97FF C0F6 0AFCE 13440+ XI T232V,X'FF' 00AF9A 97FF C0F6 0AFCE 13441+ XI T232V,X'FF' 00AF9E 97FF C0F6 0AFCE 13442+ XI T232V,X'FF' 00AFA2 97FF C0F6 0AFCE 13443+ XI T232V,X'FF' 00AFA6 97FF C0F6 0AFCE 13444+ XI T232V,X'FF' 00AFAA 97FF C0F6 0AFCE 13445+ XI T232V,X'FF' 00AFAE 97FF C0F6 0AFCE 13446+ XI T232V,X'FF' 00AFB2 97FF C0F6 0AFCE 13447+ XI T232V,X'FF' 00AFB6 97FF C0F6 0AFCE 13448+ XI T232V,X'FF' 00AFBA 97FF C0F6 0AFCE 13449+ XI T232V,X'FF' 13450+* 00AFBE 06FB 13451 BCTR R15,R11 13452 TSIMRET 00AFC0 58F0 C0F8 0AFD0 13453+ L R15,=A(SAVETST) R15 := current save area 00AFC4 58DF 0004 00004 13454+ L R13,4(R15) get old save area back 00AFC8 98EC D00C 0000C 13455+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00AFCC 07FE 13456+ BR 14 RETURN 02000000 13457 * 00AFCE 11 13458 T232V DC X'11' 13459 TSIMEND 00AFD0 13460+ LTORG 00AFD0 00000458 13461 =A(SAVETST) 0AFD4 13462+T232TEND EQU * 13463 * 13464 * Test 235 -- XC m,m (10c) --------------------------------- 13465 * 13466 TSIMBEG T235,4500,50,1,C'XC m,m (10c)' 13467+* 002EC4 13468+TDSCDAT CSECT 002EC8 13469+ DS 0D 13470+* 002EC8 0000AFD8 13471+T235TDSC DC A(T235) // TENTRY 002ECC 0000017C 13472+ DC A(T235TEND-T235) // TLENGTH 002ED0 00001194 13473+ DC F'4500' // TLRCNT 002ED4 00000032 13474+ DC F'50' // TIGCNT 002ED8 00000001 13475+ DC F'1' // TLTYPE 001496 13476+TEXT CSECT 001496 E3F2F3F5 13477+SPTR1084 DC C'T235' 002EDC 13478+TDSCDAT CSECT 002EDC 13479+ DS 0F 002EDC 04001496 13480+ DC AL1(L'SPTR1084),AL3(SPTR1084) 00149A 13481+TEXT CSECT 00149A E7C340946B94404D 13482+SPTR1085 DC C'XC m,m (10c)' 002EE0 13483+TDSCDAT CSECT 002EE0 13484+ DS 0F 002EE0 0C00149A 13485+ DC AL1(L'SPTR1085),AL3(SPTR1085) 13486+* 004B04 13487+TDSCTBL CSECT 04B04 13488+T235TPTR EQU * 004B04 00002EC8 13489+ DC A(T235TDSC) enabled test 13490+* 00AFD4 13491+TCODE CSECT 00AFD8 13492+ DS 0D ensure double word alignment for test 00AFD8 13493+T235 DS 0H 01650000 00AFD8 90EC D00C 0000C 13494+ STM 14,12,12(13) SAVE REGISTERS 02950000 PAGE 248 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00AFDC 18CF 13495+ LR R12,R15 base register := entry address 0AFD8 13496+ USING T235,R12 declare code base register 00AFDE 41B0 C026 0AFFE 13497+ LA R11,T235L load loop target to R11 00AFE2 58F0 C178 0B150 13498+ L R15,=A(SAVETST) R15 := current save area 00AFE6 50DF 0004 00004 13499+ ST R13,4(R15) set back pointer in current save area 00AFEA 182D 13500+ LR R2,R13 remember callers save area 00AFEC 18DF 13501+ LR R13,R15 setup current save area 00AFEE 50D2 0008 00008 13502+ ST R13,8(R2) set forw pointer in callers save area 00000 13503+ USING TDSC,R1 declare TDSC base register 00AFF2 58F0 1008 00008 13504+ L R15,TLRCNT load local repeat count to R15 13505+* 13506 * 00AFF6 4120 C162 0B13A 13507 LA R2,T235V1 00AFFA 4130 C16C 0B144 13508 LA R3,T235V2 13509 T235L REPINS XC,(0(10,R2),0(R3)) repeat: XC 0(10,R2),0(R3) 13510+* 13511+* build from sublist &ALIST a comma separated string &ARGS 13512+* 13513+* 13514+* 13515+* 13516+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13517+* this allows to transfer the repeat count from last TDSCGEN call 13518+* 13519+* 0AFFE 13520+T235L EQU * 13521+* 13522+* write a comment indicating what REPINS does (in case NOGEN in effect) 13523+* 13524+*,// REPINS: do 50 times: 13525+* 13526+* MNOTE requires that ' is doubled for expanded variables 13527+* thus build &MASTR as a copy of '&ARGS with ' doubled 13528+* 13529+* 13530+*,// XC 0(10,R2),0(R3) 13531+* 13532+* finally generate code: &ICNT copies of &CODE &ARGS 13533+* 00AFFE D709 2000 3000 00000 00000 13534+ XC 0(10,R2),0(R3) 00B004 D709 2000 3000 00000 00000 13535+ XC 0(10,R2),0(R3) 00B00A D709 2000 3000 00000 00000 13536+ XC 0(10,R2),0(R3) 00B010 D709 2000 3000 00000 00000 13537+ XC 0(10,R2),0(R3) 00B016 D709 2000 3000 00000 00000 13538+ XC 0(10,R2),0(R3) 00B01C D709 2000 3000 00000 00000 13539+ XC 0(10,R2),0(R3) 00B022 D709 2000 3000 00000 00000 13540+ XC 0(10,R2),0(R3) 00B028 D709 2000 3000 00000 00000 13541+ XC 0(10,R2),0(R3) 00B02E D709 2000 3000 00000 00000 13542+ XC 0(10,R2),0(R3) 00B034 D709 2000 3000 00000 00000 13543+ XC 0(10,R2),0(R3) 00B03A D709 2000 3000 00000 00000 13544+ XC 0(10,R2),0(R3) 00B040 D709 2000 3000 00000 00000 13545+ XC 0(10,R2),0(R3) 00B046 D709 2000 3000 00000 00000 13546+ XC 0(10,R2),0(R3) 00B04C D709 2000 3000 00000 00000 13547+ XC 0(10,R2),0(R3) 00B052 D709 2000 3000 00000 00000 13548+ XC 0(10,R2),0(R3) 00B058 D709 2000 3000 00000 00000 13549+ XC 0(10,R2),0(R3) PAGE 249 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 00B05E D709 2000 3000 00000 00000 13550+ XC 0(10,R2),0(R3) 00B064 D709 2000 3000 00000 00000 13551+ XC 0(10,R2),0(R3) 00B06A D709 2000 3000 00000 00000 13552+ XC 0(10,R2),0(R3) 00B070 D709 2000 3000 00000 00000 13553+ XC 0(10,R2),0(R3) 00B076 D709 2000 3000 00000 00000 13554+ XC 0(10,R2),0(R3) 00B07C D709 2000 3000 00000 00000 13555+ XC 0(10,R2),0(R3) 00B082 D709 2000 3000 00000 00000 13556+ XC 0(10,R2),0(R3) 00B088 D709 2000 3000 00000 00000 13557+ XC 0(10,R2),0(R3) 00B08E D709 2000 3000 00000 00000 13558+ XC 0(10,R2),0(R3) 00B094 D709 2000 3000 00000 00000 13559+ XC 0(10,R2),0(R3) 00B09A D709 2000 3000 00000 00000 13560+ XC 0(10,R2),0(R3) 00B0A0 D709 2000 3000 00000 00000 13561+ XC 0(10,R2),0(R3) 00B0A6 D709 2000 3000 00000 00000 13562+ XC 0(10,R2),0(R3) 00B0AC D709 2000 3000 00000 00000 13563+ XC 0(10,R2),0(R3) 00B0B2 D709 2000 3000 00000 00000 13564+ XC 0(10,R2),0(R3) 00B0B8 D709 2000 3000 00000 00000 13565+ XC 0(10,R2),0(R3) 00B0BE D709 2000 3000 00000 00000 13566+ XC 0(10,R2),0(R3) 00B0C4 D709 2000 3000 00000 00000 13567+ XC 0(10,R2),0(R3) 00B0CA D709 2000 3000 00000 00000 13568+ XC 0(10,R2),0(R3) 00B0D0 D709 2000 3000 00000 00000 13569+ XC 0(10,R2),0(R3) 00B0D6 D709 2000 3000 00000 00000 13570+ XC 0(10,R2),0(R3) 00B0DC D709 2000 3000 00000 00000 13571+ XC 0(10,R2),0(R3) 00B0E2 D709 2000 3000 00000 00000 13572+ XC 0(10,R2),0(R3) 00B0E8 D709 2000 3000 00000 00000 13573+ XC 0(10,R2),0(R3) 00B0EE D709 2000 3000 00000 00000 13574+ XC 0(10,R2),0(R3) 00B0F4 D709 2000 3000 00000 00000 13575+ XC 0(10,R2),0(R3) 00B0FA D709 2000 3000 00000 00000 13576+ XC 0(10,R2),0(R3) 00B100 D709 2000 3000 00000 00000 13577+ XC 0(10,R2),0(R3) 00B106 D709 2000 3000 00000 00000 13578+ XC 0(10,R2),0(R3) 00B10C D709 2000 3000 00000 00000 13579+ XC 0(10,R2),0(R3) 00B112 D709 2000 3000 00000 00000 13580+ XC 0(10,R2),0(R3) 00B118 D709 2000 3000 00000 00000 13581+ XC 0(10,R2),0(R3) 00B11E D709 2000 3000 00000 00000 13582+ XC 0(10,R2),0(R3) 00B124 D709 2000 3000 00000 00000 13583+ XC 0(10,R2),0(R3) 13584+* 00B12A 06FB 13585 BCTR R15,R11 13586 TSIMRET 00B12C 58F0 C178 0B150 13587+ L R15,=A(SAVETST) R15 := current save area 00B130 58DF 0004 00004 13588+ L R13,4(R15) get old save area back 00B134 98EC D00C 0000C 13589+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00B138 07FE 13590+ BR 14 RETURN 02000000 13591 * 00B13A 1111111111111111 13592 T235V1 DC 10X'11' 00B144 FFFFFFFFFFFFFFFF 13593 T235V2 DC 10X'FF' 13594 TSIMEND 00B150 13595+ LTORG 00B150 00000458 13596 =A(SAVETST) 0B154 13597+T235TEND EQU * 13598 * 13599 * Test 236 -- XC m,m (100c) -------------------------------- 13600 * 13601 TSIMBEG T236,2500,20,1,C'XC m,m (100c)' 13602+* 002EE4 13603+TDSCDAT CSECT 002EE8 13604+ DS 0D PAGE 250 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 13605+* 002EE8 0000B158 13606+T236TDSC DC A(T236) // TENTRY 002EEC 0000017C 13607+ DC A(T236TEND-T236) // TLENGTH 002EF0 000009C4 13608+ DC F'2500' // TLRCNT 002EF4 00000014 13609+ DC F'20' // TIGCNT 002EF8 00000001 13610+ DC F'1' // TLTYPE 0014A6 13611+TEXT CSECT 0014A6 E3F2F3F6 13612+SPTR1096 DC C'T236' 002EFC 13613+TDSCDAT CSECT 002EFC 13614+ DS 0F 002EFC 040014A6 13615+ DC AL1(L'SPTR1096),AL3(SPTR1096) 0014AA 13616+TEXT CSECT 0014AA E7C340946B94404D 13617+SPTR1097 DC C'XC m,m (100c)' 002F00 13618+TDSCDAT CSECT 002F00 13619+ DS 0F 002F00 0D0014AA 13620+ DC AL1(L'SPTR1097),AL3(SPTR1097) 13621+* 004B08 13622+TDSCTBL CSECT 04B08 13623+T236TPTR EQU * 004B08 00002EE8 13624+ DC A(T236TDSC) enabled test 13625+* 00B154 13626+TCODE CSECT 00B158 13627+ DS 0D ensure double word alignment for test 00B158 13628+T236 DS 0H 01650000 00B158 90EC D00C 0000C 13629+ STM 14,12,12(13) SAVE REGISTERS 02950000 00B15C 18CF 13630+ LR R12,R15 base register := entry address 0B158 13631+ USING T236,R12 declare code base register 00B15E 41B0 C026 0B17E 13632+ LA R11,T236L load loop target to R11 00B162 58F0 C178 0B2D0 13633+ L R15,=A(SAVETST) R15 := current save area 00B166 50DF 0004 00004 13634+ ST R13,4(R15) set back pointer in current save area 00B16A 182D 13635+ LR R2,R13 remember callers save area 00B16C 18DF 13636+ LR R13,R15 setup current save area 00B16E 50D2 0008 00008 13637+ ST R13,8(R2) set forw pointer in callers save area 00000 13638+ USING TDSC,R1 declare TDSC base register 00B172 58F0 1008 00008 13639+ L R15,TLRCNT load local repeat count to R15 13640+* 13641 * 00B176 4120 C0AE 0B206 13642 LA R2,T236V1 00B17A 4130 C112 0B26A 13643 LA R3,T236V2 13644 T236L REPINS XC,(0(100,R2),0(R3)) repeat: XC 0(100,R2),0(R3) 13645+* 13646+* build from sublist &ALIST a comma separated string &ARGS 13647+* 13648+* 13649+* 13650+* 13651+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13652+* this allows to transfer the repeat count from last TDSCGEN call 13653+* 13654+* 0B17E 13655+T236L EQU * 13656+* 13657+* write a comment indicating what REPINS does (in case NOGEN in effect) 13658+* 13659+*,// REPINS: do 20 times: PAGE 251 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 13660+* 13661+* MNOTE requires that ' is doubled for expanded variables 13662+* thus build &MASTR as a copy of '&ARGS with ' doubled 13663+* 13664+* 13665+*,// XC 0(100,R2),0(R3) 13666+* 13667+* finally generate code: &ICNT copies of &CODE &ARGS 13668+* 00B17E D763 2000 3000 00000 00000 13669+ XC 0(100,R2),0(R3) 00B184 D763 2000 3000 00000 00000 13670+ XC 0(100,R2),0(R3) 00B18A D763 2000 3000 00000 00000 13671+ XC 0(100,R2),0(R3) 00B190 D763 2000 3000 00000 00000 13672+ XC 0(100,R2),0(R3) 00B196 D763 2000 3000 00000 00000 13673+ XC 0(100,R2),0(R3) 00B19C D763 2000 3000 00000 00000 13674+ XC 0(100,R2),0(R3) 00B1A2 D763 2000 3000 00000 00000 13675+ XC 0(100,R2),0(R3) 00B1A8 D763 2000 3000 00000 00000 13676+ XC 0(100,R2),0(R3) 00B1AE D763 2000 3000 00000 00000 13677+ XC 0(100,R2),0(R3) 00B1B4 D763 2000 3000 00000 00000 13678+ XC 0(100,R2),0(R3) 00B1BA D763 2000 3000 00000 00000 13679+ XC 0(100,R2),0(R3) 00B1C0 D763 2000 3000 00000 00000 13680+ XC 0(100,R2),0(R3) 00B1C6 D763 2000 3000 00000 00000 13681+ XC 0(100,R2),0(R3) 00B1CC D763 2000 3000 00000 00000 13682+ XC 0(100,R2),0(R3) 00B1D2 D763 2000 3000 00000 00000 13683+ XC 0(100,R2),0(R3) 00B1D8 D763 2000 3000 00000 00000 13684+ XC 0(100,R2),0(R3) 00B1DE D763 2000 3000 00000 00000 13685+ XC 0(100,R2),0(R3) 00B1E4 D763 2000 3000 00000 00000 13686+ XC 0(100,R2),0(R3) 00B1EA D763 2000 3000 00000 00000 13687+ XC 0(100,R2),0(R3) 00B1F0 D763 2000 3000 00000 00000 13688+ XC 0(100,R2),0(R3) 13689+* 00B1F6 06FB 13690 BCTR R15,R11 13691 TSIMRET 00B1F8 58F0 C178 0B2D0 13692+ L R15,=A(SAVETST) R15 := current save area 00B1FC 58DF 0004 00004 13693+ L R13,4(R15) get old save area back 00B200 98EC D00C 0000C 13694+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00B204 07FE 13695+ BR 14 RETURN 02000000 13696 * 00B206 1111111111111111 13697 T236V1 DC 100X'11' 00B26A FFFFFFFFFFFFFFFF 13698 T236V2 DC 100X'FF' 13699 TSIMEND 00B2D0 13700+ LTORG 00B2D0 00000458 13701 =A(SAVETST) 0B2D4 13702+T236TEND EQU * 13703 * 13704 * Test 237 -- XC m,m (250c) -------------------------------- 13705 * 13706 TSIMBEG T237,1000,20,1,C'XC m,m (250c)' 13707+* 002F04 13708+TDSCDAT CSECT 002F08 13709+ DS 0D 13710+* 002F08 0000B2D8 13711+T237TDSC DC A(T237) // TENTRY 002F0C 000002AC 13712+ DC A(T237TEND-T237) // TLENGTH 002F10 000003E8 13713+ DC F'1000' // TLRCNT 002F14 00000014 13714+ DC F'20' // TIGCNT PAGE 252 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19 002F18 00000001 13715+ DC F'1' // TLTYPE 0014B7 13716+TEXT CSECT 0014B7 E3F2F3F7 13717+SPTR1108 DC C'T237' 002F1C 13718+TDSCDAT CSECT 002F1C 13719+ DS 0F 002F1C 040014B7 13720+ DC AL1(L'SPTR1108),AL3(SPTR1108) 0014BB 13721+TEXT CSECT 0014BB E7C340946B94404D 13722+SPTR1109 DC C'XC m,m (250c)' 002F20 13723+TDSCDAT CSECT 002F20 13724+ DS 0F 002F20 0D0014BB 13725+ DC AL1(L'SPTR1109),AL3(SPTR1109) 13726+* 004B0C 13727+TDSCTBL CSECT 04B0C 13728+T237TPTR EQU * 004B0C 00002F08 13729+ DC A(T237TDSC) enabled test 13730+* 00B2D4 13731+TCODE CSECT 00B2D8 13732+ DS 0D ensure double word alignment for test 00B2D8 13733+T237 DS 0H 01650000 00B2D8 90EC D00C 0000C 13734+ STM 14,12,12(13) SAVE REGISTERS 02950000 00B2DC 18CF 13735+ LR R12,R15 base register := entry address 0B2D8 13736+ USING T237,R12 declare code base register 00B2DE 41B0 C026 0B2FE 13737+ LA R11,T237L load loop target to R11 00B2E2 58F0 C2A8 0B580 13738+ L R15,=A(SAVETST) R15 := current save area 00B2E6 50DF 0004 00004 13739+ ST R13,4(R15) set back pointer in current save area 00B2EA 182D 13740+ LR R2,R13 remember callers save area 00B2EC 18DF 13741+ LR R13,R15 setup current save area 00B2EE 50D2 0008 00008 13742+ ST R13,8(R2) set forw pointer in callers save area 00000 13743+ USING TDSC,R1 declare TDSC base register 00B2F2 58F0 1008 00008 13744+ L R15,TLRCNT load local repeat count to R15 13745+* 13746 * 00B2F6 4120 C0AE 0B386 13747 LA R2,T237V1 00B2FA 4130 C1A8 0B480 13748 LA R3,T237V2 13749 T237L REPINS XC,(0(250,R2),0(R3)) repeat: XC 0(250,R2),0(R3) 13750+* 13751+* build from sublist &ALIST a comma separated stri