J E S 2 J O B L O G
10.11.32 JOB 4 IEF677I WARNING MESSAGE(S) FOR JOB PERF#ASM ISSUED
10.11.32 JOB 4 $HASP373 PERF#ASM STARTED - INIT 6 - CLASS C - SYS TK4-
10.11.32 JOB 4 IEF403I PERF#ASM - STARTED - TIME=10.11.32
10.11.36 JOB 4 IEFACTRT - Stepname Procstep Program Retcode
10.11.36 JOB 4 PERF#ASM CLG ASM IFOX00 RC= 0000
10.11.36 JOB 4 PERF#ASM CLG LKED IEWL RC= 0000
10.11.38 JOB 4 PERF#ASM CLG GO PGM=*.DD RC= 0000
10.11.38 JOB 4 IEF404I PERF#ASM - ENDED - TIME=10.11.38
10.11.38 JOB 4 $HASP395 PERF#ASM ENDED
------ JES2 JOB STATISTICS ------
05 JAN 19 JOB EXECUTION DATE
6,837 CARDS READ
41,146 SYSOUT PRINT RECORDS
0 SYSOUT PUNCH RECORDS
0.09 MINUTES EXECUTION TIME
1 //PERF#ASM JOB 'S322-0C4','WFJM', JOB 4
// CLASS=C,MSGCLASS=A,MSGLEVEL=(1,1),
// REGION=2500K,TIME=(2,0),PRTY=8
2 //CLG EXEC ASMFCLG,
// MAC1='SYS2.MACLIB',
// MAC2='SYS1.AMODGEN',
// MAC3='SYS1.MACLIB',
// PARM.ASM='NOXREF,NORLD,NODECK,LOAD,BUFSIZE(MAX)',
// PARM.LKED='MAP,LIST,LET,NCAL,SIZE=(512000,122880)',
// COND.LKED=(8,LE,ASM),
// PARM.GO='/G001/OPTT',
// COND.GO=((8,LE,ASM),(4,LT,LKED))
3 XXASMFCLG PROC MAC='SYS1.MACLIB',MAC1='SYS1.MACLIB', 00000100
XX MAC2='SYS1.MACLIB',MAC3='SYS1.MACLIB',SOUT='*' 00000200
4 XXASM EXEC PGM=IFOX00,PARM=OBJ,REGION=128K 00000300
5 XXSYSLIB DD DSN=&MAC,DISP=SHR 00000400
6 XX DD DSN=&MAC1,DISP=SHR 00000500
7 XX DD DSN=&MAC2,DISP=SHR 00000600
8 XX DD DSN=&MAC3,DISP=SHR 00000700
9 //ASM.SYSUT1 DD DSN=&&SYSUT1,UNIT=SYSDA,SPACE=(1700,(600,100))
X/SYSUT1 DD DSN=&&SYSUT1,UNIT=SYSSQ,SPACE=(1700,(600,100)), 00000800
XX SEP=(SYSLIB) 00000900
10 //ASM.SYSUT2 DD DSN=&&SYSUT2,UNIT=SYSDA,SPACE=(1700,(900,200))
X/SYSUT2 DD DSN=&&SYSUT2,UNIT=SYSSQ,SPACE=(1700,(300,50)), 00001000
XX SEP=(SYSLIB,SYSUT1) 00001100
11 //ASM.SYSUT3 DD DSN=&&SYSUT3,UNIT=SYSDA,SPACE=(1700,(900,200))
X/SYSUT3 DD DSN=&&SYSUT3,UNIT=SYSSQ,SPACE=(1700,(300,50)) 00001200
12 XXSYSPRINT DD SYSOUT=&SOUT,DCB=BLKSIZE=1089 00001300
13 XXSYSPUNCH DD SYSOUT=B 00001400
14 //ASM.SYSGO DD DSN=&&OBJSET,UNIT=SYSDA,SPACE=(80,(2000,500))
X/SYSGO DD DSN=&&OBJSET,UNIT=SYSSQ,SPACE=(80,(200,50)), 00001500
XX DISP=(MOD,PASS) 00001600
15 //ASM.SYSIN DD *
16 XXLKED EXEC PGM=IEWL,PARM=(XREF,LET,LIST,NCAL),REGION=128K, 00001700
XX COND=(8,LT,ASM) 00001800
17 XXSYSLIN DD DSN=&&OBJSET,DISP=(OLD,DELETE) 00001900
18 XX DD DDNAME=SYSIN 00002000
19 XXSYSLMOD DD DSN=&&GOSET(GO),UNIT=SYSDA,SPACE=(1024,(50,20,1)), 00002100
XX DISP=(MOD,PASS) 00002200
20 XXSYSUT1 DD DSN=&&SYSUT1,UNIT=(SYSDA,SEP=(SYSLIN,SYSLMOD)), 00002300
XX SPACE=(1024,(50,20)) 00002400
21 XXSYSPRINT DD SYSOUT=&SOUT 00002500
22 XXGO EXEC PGM=*.LKED.SYSLMOD,COND=((8,LT,ASM),(4,LT,LKED)) 00002600
23 //GO.SYSUDUMP DD SYSOUT=*,OUTLIM=2000
24 //GO.SYSPRINT DD SYSOUT=*,OUTLIM=5000
25 //GO.SYSIN DD *
//
STMT NO. MESSAGE
-
5 IEF653I SUBSTITUTION JCL - DSN=SYS1.MACLIB,DISP=SHR
6 IEF653I SUBSTITUTION JCL - DSN=SYS2.MACLIB,DISP=SHR
7 IEF653I SUBSTITUTION JCL - DSN=SYS1.AMODGEN,DISP=SHR
8 IEF653I SUBSTITUTION JCL - DSN=SYS1.MACLIB,DISP=SHR
12 IEF653I SUBSTITUTION JCL - SYSOUT=*,DCB=BLKSIZE=1089
21 IEF653I SUBSTITUTION JCL - SYSOUT=*
22 IEF686I DDNAME REFERRED TO ON DDNAME KEYWORD IN PRIOR STEP WAS NOT RESOLVED
IEF236I ALLOC. FOR PERF#ASM ASM CLG
IEF237I 148 ALLOCATED TO SYSLIB
IEF237I 148 ALLOCATED TO
IEF237I 248 ALLOCATED TO
IEF237I 148 ALLOCATED TO
IEF237I 190 ALLOCATED TO SYSUT1
IEF237I 170 ALLOCATED TO SYSUT2
IEF237I 180 ALLOCATED TO SYSUT3
IEF237I JES2 ALLOCATED TO SYSPRINT
IEF237I JES2 ALLOCATED TO SYSPUNCH
IEF237I 140 ALLOCATED TO SYSGO
IEF237I JES2 ALLOCATED TO SYSIN
IEF142I PERF#ASM ASM CLG - STEP WAS EXECUTED - COND CODE 0000
IEF285I SYS1.MACLIB KEPT *-------44
IEF285I VOL SER NOS= MVSRES.
IEF285I SYS2.MACLIB KEPT *--------0
IEF285I VOL SER NOS= MVSRES.
IEF285I SYS1.AMODGEN KEPT *--------0
IEF285I VOL SER NOS= MVSDLB.
IEF285I SYS1.MACLIB KEPT *--------0
IEF285I VOL SER NOS= MVSRES.
IEF285I SYS19005.T101132.RA000.PERF#ASM.SYSUT1 DELETED *----3,890
IEF285I VOL SER NOS= WORK03.
IEF285I SYS19005.T101132.RA000.PERF#ASM.SYSUT2 DELETED *------135
IEF285I VOL SER NOS= WORK01.
IEF285I SYS19005.T101132.RA000.PERF#ASM.SYSUT3 DELETED *------198
IEF285I VOL SER NOS= WORK02.
IEF285I JES2.JOB00004.SO0103 SYSOUT
IEF285I JES2.JOB00004.SO0104 SYSOUT
IEF285I SYS19005.T101132.RA000.PERF#ASM.OBJSET PASSED *----3,580
IEF285I VOL SER NOS= WORK00.
IEF285I JES2.JOB00004.SI0101 SYSIN
IEF373I STEP /ASM / START 19005.1011
IEF374I STEP /ASM / STOP 19005.1011 CPU 0MIN 02.64SEC SRB 0MIN 00.37SEC VIRT 2108K SYS 216K
************************************************************************************************************************************
* 1. Jobstep of job: PERF#ASM Stepname: ASM Program name: IFOX00 Executed on 05.01.19 from 10.11.32 to 10.11.36 *
* elapsed time 00:00:03,59 CPU-Identifier: TK4- Page-in: 0 *
* CPU time 00:00:03,01 Virtual Storage used: 2108K Page-out: 0 *
* corr. CPU: 00:00:03,01 CPU time has been corrected by 1 / 1,0 multiplier *
* *
* I/O Operation *
* Number of records read via DD * or DD DATA: 6814 *
* 148......44 148.......0 248.......0 148.......0 190....3890 170.....135 180.....198 DMY.......0 DMY.......0 140....3580 *
* DMY.......0 *
* *
* Charge for step (w/o SYSOUT): 5,01 *
************************************************************************************************************************************
IEF236I ALLOC. FOR PERF#ASM LKED CLG
IEF237I 140 ALLOCATED TO SYSLIN
IEF237I DMY ALLOCATED TO
IEF237I 180 ALLOCATED TO SYSLMOD
IEF237I 190 ALLOCATED TO SYSUT1
IEF237I JES2 ALLOCATED TO SYSPRINT
IEF142I PERF#ASM LKED CLG - STEP WAS EXECUTED - COND CODE 0000
IEF285I SYS19005.T101132.RA000.PERF#ASM.OBJSET DELETED *----3,581
IEF285I VOL SER NOS= WORK00.
IEF285I SYS19005.T101132.RA000.PERF#ASM.GOSET PASSED *-------50
IEF285I VOL SER NOS= WORK02.
IEF285I SYS19005.T101132.RA000.PERF#ASM.SYSUT1 DELETED *----1,640
IEF285I VOL SER NOS= WORK03.
IEF285I JES2.JOB00004.SO0105 SYSOUT
IEF373I STEP /LKED / START 19005.1011
IEF374I STEP /LKED / STOP 19005.1011 CPU 0MIN 00.46SEC SRB 0MIN 00.17SEC VIRT 504K SYS 212K
************************************************************************************************************************************
* 2. Jobstep of job: PERF#ASM Stepname: LKED Program name: IEWL Executed on 05.01.19 from 10.11.36 to 10.11.36 *
* elapsed time 00:00:00,76 CPU-Identifier: TK4- Page-in: 0 *
* CPU time 00:00:00,63 Virtual Storage used: 504K Page-out: 0 *
* corr. CPU: 00:00:00,63 CPU time has been corrected by 1 / 1,0 multiplier *
* *
* I/O Operation *
* Number of records read via DD * or DD DATA: 0 *
* 140....3581 DMY.......0 180......50 190....1640 DMY.......0 *
* *
* Charge for step (w/o SYSOUT): 1,05 *
************************************************************************************************************************************
IEF236I ALLOC. FOR PERF#ASM GO CLG
IEF237I 180 ALLOCATED TO PGM=*.DD
IEF237I JES2 ALLOCATED TO SYSUDUMP
IEF237I JES2 ALLOCATED TO SYSPRINT
IEF237I JES2 ALLOCATED TO SYSIN
IEF142I PERF#ASM GO CLG - STEP WAS EXECUTED - COND CODE 0000
IEF285I SYS19005.T101132.RA000.PERF#ASM.GOSET KEPT *--------0
IEF285I VOL SER NOS= WORK02.
IEF285I JES2.JOB00004.SO0106 SYSOUT
IEF285I JES2.JOB00004.SO0107 SYSOUT
IEF285I JES2.JOB00004.SI0102 SYSIN
IEF373I STEP /GO / START 19005.1011
IEF374I STEP /GO / STOP 19005.1011 CPU 0MIN 01.18SEC SRB 0MIN 00.00SEC VIRT 120K SYS 212K
************************************************************************************************************************************
* 3. Jobstep of job: PERF#ASM Stepname: GO Program name: PGM=*.DD Executed on 05.01.19 from 10.11.36 to 10.11.38 *
* elapsed time 00:00:01,19 CPU-Identifier: TK4- Page-in: 0 *
* CPU time 00:00:01,18 Virtual Storage used: 120K Page-out: 0 *
* corr. CPU: 00:00:01,18 CPU time has been corrected by 1 / 1,0 multiplier *
* *
* I/O Operation *
* Number of records read via DD * or DD DATA: 0 *
* 180.......0 DMY.......0 DMY.......0 DMY.......0 *
* *
* Charge for step (w/o SYSOUT): 1,96 *
************************************************************************************************************************************
IEF237I 180 ALLOCATED TO SYS00001
IEF285I SYS19005.T101138.RA000.PERF#ASM.R0000001 KEPT *--------0
IEF285I VOL SER NOS= WORK02.
IEF285I SYS19005.T101132.RA000.PERF#ASM.GOSET DELETED
IEF285I VOL SER NOS= WORK02.
IEF375I JOB /PERF#ASM/ START 19005.1011
IEF376I JOB /PERF#ASM/ STOP 19005.1011 CPU 0MIN 04.28SEC SRB 0MIN 00.54SEC
EXTERNAL SYMBOL DICTIONARY PAGE 1
SYMBOL TYPE ID ADDR LENGTH LDID ASM 0201 10.11 01/05/19
MAIN SD 0001 000000 000DEE
TEXT SD 0002 000DF0 0013DB
SIOSDATA SD 0003 0021D0 000198
DATA SD 0004 002368 000180
TDSCDAT SD 0005 0024E8 0024DC
TDSCTBL SD 0006 0049C8 00049C
TCODE SD 0007 004E68 0131DC
T330CS SD 0008 018048 000068
T702CS SD 0009 0180B0 000040
PAGE 2
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
1 * 1 2 3 4 5 6 71
2 *23456789*12345*789012345678901234*678901234567890123456789012345678901
3 * $Id: s370_perf.asm 1034 2018-07-15 16:15:10Z mueller $
4 *
5 * Copyright 2017-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
6 *
7 * This program is free software; you may redistribute and/or modify
8 * it under the terms of the GNU General Public License version 3.
9 * See Licence.txt in distribition directory for further details.
10 *
11 * Revision History: (!! update MSGVERS when adding here !!)
12 * Date Rev Version Comment
13 * 2018-05-27 1026 0.9.8 DISBAS substitutable via var SET_DISBAS
14 * 2018-03-30 1003 0.9.7 add and use more ltype codes; add /TCOR
15 * tune T510-T513,T540-T543,T560;fix T551,T553
16 * 2018-03-24 1001 0.9.6 use REPINSN instead of REPINS5 and REPINS2
17 * renames, add T150,T152,T153,T205-T209
18 * add T304,T305,T422,T423,T426,T427
19 * add T512,T513,T542,T543
20 * 2018-03-04 998 0.9.5 add T9**,T703; fix T232 text
21 * 2018-03-03 997 0.9.4 reorganize PARM decode; add /OPCF
22 * 2018-02-25 995 0.9.3 use R11,R12 as base to allow 8k main code
23 * add SETB DISBAS to disable BAS/BASR tests
24 * add /Cxxx, sets GMUL test; /T*** wildcards
25 * add config file handling; use sios path
26 * 2018-02-10 993 0.9.2 add STCK time to PERF003/PERF004 messages
27 * add PERF000 vers info; add warmup T102 run
28 * 2018-01-06 986 0.9.1 rename to s370_perf
29 * 2017-12-16 970 0.9 add /Dxxx and /Exxx params; 8k code support
30 * use 4k buffer for MVCL,CLCL; test renames
31 * add T284-T285,T303,T701,T702,T211,T212,T216
32 * add T116-T117,T191-T192,T156-T158,T161-T162
33 * add T165-T166,T450-T451,T507,T527
34 * 2017-12-10 969 0.8 add ltype flag in TDSC; new output format
35 * use BCTR loop closure; code test D aligned
36 * add REPINS2,REPINS5,REPINSPI,REPINSAL
37 * add T252-T254,T255-T259,T274-T277,T280-T283
38 * add T290-292,T324-T325,T415,T440-T443
39 * add T445-T446,T504-506,T524-526,T295-297
40 * add T620-T621
41 * 2017-12-03 968 0.71 renames, add T310,321,323,238,239,700
42 * 2017-12-02 967 0.7 use relocation by default, add /ORIP
43 * add /OPTT, page aligned 16k bufs
44 * 2017-11-26 966 0.6 add /OTGA /GAUT and T114,T601
45 * 2017-11-12 961 0.5 Initial version
46 * 2017-10-15 956 0.1 First draft
47 *
48 * Description:
49 * Code to determine instruction timing of S/370 non-priviledged
50 * instructions in 24 bit mode.
51 *
52 * Usage:
53 * s370_perf uses the PARM interface to determine job behaviour. The
54 * PARM string is a list of 4 letter options, each starting with a /.
55 * Valid options are:
PAGE 3
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
56 * /OWTO enable step by step MVS console messages
57 * /ODBG enable debug trace output for test steps
58 * /OTGA enable debug trace output for /GAUT processing
59 * /OPCF print config file
60 * /OPTT print test table
61 * /ORIP run tests in place (default is relocate)
62 * /GAUT automatic determination of GMUL, aim is 1 sec per test
63 * /Gnnn set GMUL to nnn
64 * /GnnK set GMUL to nn * 1000
65 * /Cnnn use test Tnnn for GMUL calibration (default is C102)
66 * /Ennn enable test Tnnn (n can be digit or '*' wildcard)
67 * /Dnnn disable test Tnnn (dito)
68 * /Tnnn select test Tnnn (dito)
69 * /TCOR select all tests required for loop overhead correction
70 *
71 * Notes on option usage:
72 * 1. GMUL default and start value is 1
73 * 2. if multiple /Gnnn or /GnnK are given the last one is taken
74 * 3. /GAUT will overwrite any previous /Gnnn, but use prior /Gnnn as
75 * start value in the search for GMUL leading to 1 sec test time
76 * 4. if no /Tnnn option is seen all pre-enabled tests are executed
77 * 5. several /Tnnn options can be specified, in this case only these
78 * tests are run
79 * 6. /Dnnn allows to disable an enabled test
80 * 7. /Ennn allows to enable a disabled test
81 *
82 * Configuration file:
83 * read from SYSIN, is optional. Line starting with '#' are ignored
84 * all other lines must have the format
85 * Tnnn e lrcnt
86 * with
87 * Tnnn test name
88 * e enable flag, 0 or 1 (with 4 spaces in front)
89 * lrcnt new LRCNT, 10 digit field, ignored if zero
90 * Main usage of the config file is to redefine the LRCNT of test
91 * when s370_perf is run on systems other than a Hercules emulator.
92 * The config file is processed before the /Tnnn,/Ennn,/Dnnn PARMs.
93 *
94 * Code configuration options via hercjis variable substitutions
95 * SET_DISBAS 0 BAS/BASR tests enabled (default)
96 * 1 BAS/BASR tests disabled
97 *
98 * Return codes:
99 * RC = 0 ok
100 * RC = 4 open SYSPRINT failed
101 * RC = 8 open SYSIN failed
102 * RC = 12 unexpected SYSIN EOF (should never happen)
103 * RC = 16 bad PARMs
104 * RC = 20 execution error, see message on SYSPRINT
105 *
106 * User Abend codes:
107 * 10 test too large (> CBUFSIZE)
108 * 50 unexpected branch taken in test
109 * 60 internal consistency check in test
110 * 255 SOS buffer overflow
PAGE 4
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
111 *
112 * Used CSECTS:
113 * MAIN main program code and local data
114 * TEXT text from otxtdsc
115 * SIOSDATA SOS data
116 * TDSCDAT task descriptor list
117 * TDSCTBL task table
118 * TCODE task code
119 * T330CS code for T330
120 * DATA other data
121 *
122 *** PRINT NOGEN don't show macro expansions
123 *
124 * local macros --------------------------------------------------------
125 *
126 * OTXTDSC - setup text descriptor for simple output system -
127 *
128 MACRO
129 &LABEL OTXTDSC &TEXT
130 TEXT CSECT
131 SPTR&SYSNDX DC &TEXT
132 &SYSECT CSECT
133 DS 0F
134 &LABEL DC AL1(L'SPTR&SYSNDX),AL3(SPTR&SYSNDX)
135 MEND
136 *
137 * used global symbols
138 * type name set by used by comment
139 * GBLA TDIGCNT TDSCGEN REPINS*
140 * GBLC TTAG TSIMBEG TSIMEND
141 *
142 * TDSCGEN - setup test descriptor --------------------------
143 *
144 MACRO
145 &LABEL TDSCGEN &TAG,&LRCNT,&IGCNT,<YPE,&TEXT
146 GBLA &TDIGCNT
147 &TDIGCNT SETA &IGCNT
148 *
149 &LABEL DC A(&TAG) // TENTRY
150 DC A(&TAG.TEND-&TAG) // TLENGTH
151 DC F'&LRCNT' // TLRCNT
152 DC F'&IGCNT' // TIGCNT
153 DC F'<YPE' // TLTYPE
154 OTXTDSC C'&TAG' // TTAGDSC
155 OTXTDSC &TEXT // TTXTDSC
156 MEND
157 *
158 * TSIMPRE - preamble code for simple test ------------------
159 * Note: The preamble code starts at a double word boundary. This
160 * ensures that even after relocation the test code has the
161 * same alignments, especially that 'D' type allocations
162 * will stay on double word boundaries.
163 *
164 MACRO
165 &LABEL TSIMPRE &NBASE=1
PAGE 5
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
166 DS 0D ensure double word alignment for test
167 &LABEL SAVE (14,12)
168 AIF (&NBASE GT 1).NBASE2
169 LR R12,R15 base register := entry address
170 USING &LABEL,R12 declare code base register
171 LA R11,&LABEL.L load loop target to R11
172 AGO .NBASEOK
173 .NBASE2 ANOP
174 LR R11,R15 base register 1 := entry address
175 LA R12,2048(R11)
176 LA R12,2048(R12) base register 1 := entry address+4k
177 USING &LABEL,R11,R12 declare code base registers
178 LA R10,&LABEL.L load loop target to R10
179 .NBASEOK ANOP
180 L R15,=A(SAVETST) R15 := current save area
181 ST R13,4(R15) set back pointer in current save area
182 LR R2,R13 remember callers save area
183 LR R13,R15 setup current save area
184 ST R13,8(R2) set forw pointer in callers save area
185 USING TDSC,R1 declare TDSC base register
186 L R15,TLRCNT load local repeat count to R15
187 MEND
188 *
189 * TSIMRET - return code for simple test --------------------
190 *
191 MACRO
192 &LABEL TSIMRET
193 L R15,=A(SAVETST) R15 := current save area
194 L R13,4(R15) get old save area back
195 RETURN (14,12)
196 MEND
197 *
198 * TSIMBEG - complete startup for simple test ---------------
199 *
200 MACRO
201 TSIMBEG &TAG,&LRCNT,&IGCNT,<YPE,&TEXT,&NBASE=1,&DIS=0
202 GBLC &TTAG
203 &TTAG SETC '&TAG'
204 *
205 TDSCDAT CSECT
206 DS 0D
207 &TAG.TDSC TDSCGEN &TAG,&LRCNT,&IGCNT,<YPE,&TEXT
208 *
209 TDSCTBL CSECT
210 &TAG.TPTR EQU *
211 AIF (&DIS GT 0).TDSCDIS
212 DC A(&TAG.TDSC) enabled test
213 AGO .TDSCOK
214 .TDSCDIS ANOP
215 DC X'01',AL3(&TAG.TDSC) disabled test
216 .TDSCOK ANOP
217 *
218 TCODE CSECT
219 &TAG TSIMPRE NBASE=&NBASE
220 *
PAGE 6
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
221 MEND
222 *
223 * TSIMEND - end for simple test ----------------------------
224 *
225 MACRO
226 TSIMEND
227 GBLC &TTAG
228 LTORG
229 &TTAG.TEND EQU *
230 MEND
231 *
232 * REPINS - repeat instruction -----------------------------
233 *
234 MACRO
235 &LABEL REPINS &CODE,&ALIST,&IGCNT=0
236 GBLA &TDIGCNT
237 GBLC &MACRETC
238 LCLA &ICNT
239 LCLC &ARGS
240 *
241 * build from sublist &ALIST a comma separated string &ARGS
242 *
243 REPINSAL &ALIST
244 &ARGS SETC '&MACRETC'
245 *
246 * determine repeat count, &IGCNT if given, otherwise &TDIGCNT
247 * this allows to transfer the repeat count from last TDSCGEN call
248 *
249 &ICNT SETA &IGCNT
250 AIF (&ICNT GT 0).ICNTOK
251 &ICNT SETA &TDIGCNT
252 AIF (&ICNT GT 0).ICNTOK
253 MNOTE 8,'//REPINS: IGCNT and TDIGCNT equal 0; abort'
254 MEXIT
255 .ICNTOK ANOP
256 *
257 AIF ('&LABEL' EQ '').NOLBL
258 &LABEL EQU *
259 .NOLBL ANOP
260 *
261 * write a comment indicating what REPINS does (in case NOGEN in effect)
262 *
263 MNOTE *,'// REPINS: do &ICNT times:'
264 REPINSPI &CODE,&ARGS
265 *
266 * finally generate code: &ICNT copies of &CODE &ARGS
267 *
268 .ILOOP &CODE &ARGS
269 &ICNT SETA &ICNT-1
270 AIF (&ICNT GT 0).ILOOP
271 *
272 MEND
273 *
274 * REPINSN - repeat 5 instructions --------------------------
275 *
PAGE 7
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
276 MACRO
277 &LABEL REPINSN &CO1,&AL1,&CO2,&AL2,&CO3,&AL3,&CO4,&AL4,&CO5,&AL5
278 GBLA &TDIGCNT
279 GBLC &MACRETC
280 LCLA &ICNT
281 LCLC &ARGS1,&ARGS2,&ARGS3,&ARGS4,&ARGS5
282 *
283 * build from sublist &ALIST* a comma separated string &ARGS*
284 *
285 REPINSAL &AL1
286 &ARGS1 SETC '&MACRETC'
287 REPINSAL &AL2
288 &ARGS2 SETC '&MACRETC'
289 AIF ('&CO3' EQ '').ARGDONE
290 REPINSAL &AL3
291 &ARGS3 SETC '&MACRETC'
292 AIF ('&CO4' EQ '').ARGDONE
293 REPINSAL &AL4
294 &ARGS4 SETC '&MACRETC'
295 AIF ('&CO5' EQ '').ARGDONE
296 REPINSAL &AL5
297 &ARGS5 SETC '&MACRETC'
298 .ARGDONE ANOP
299 *
300 AIF ('&LABEL' EQ '').NOLBL
301 &LABEL EQU *
302 .NOLBL ANOP
303 *
304 &ICNT SETA &TDIGCNT
305 *
306 * write a comment indicating what REPINSN does (if NOGEN in effect)
307 *
308 MNOTE *,'// REPINSN: do &ICNT times:'
309 REPINSPI &CO1,&ARGS1
310 REPINSPI &CO2,&ARGS2
311 AIF ('&CO3' EQ '').PRTDONE
312 REPINSPI &CO3,&ARGS3
313 AIF ('&CO4' EQ '').PRTDONE
314 REPINSPI &CO4,&ARGS4
315 AIF ('&CO5' EQ '').PRTDONE
316 REPINSPI &CO5,&ARGS5
317 .PRTDONE ANOP
318 *
319 * finally generate code: &ICNT copies of &CO1 ...
320 *
321 .ILOOP &CO1 &ARGS1
322 &CO2 &ARGS2
323 AIF ('&CO3' EQ '').GENDONE
324 &CO3 &ARGS3
325 AIF ('&CO4' EQ '').GENDONE
326 &CO4 &ARGS4
327 AIF ('&CO5' EQ '').GENDONE
328 &CO5 &ARGS5
329 .GENDONE ANOP
330 &ICNT SETA &ICNT-1
PAGE 8
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
331 AIF (&ICNT GT 0).ILOOP
332 *
333 MEND
334 *
335 * REPINSAL - build from sublist a comma separated string ---
336 *
337 MACRO
338 REPINSAL &ALIST
339 GBLC &MACRETC
340 LCLA &AIND
341 *
342 &AIND SETA 2
343 &MACRETC SETC '&ALIST(1)'
344 *
345 .ALOOP AIF (&AIND GT N'&ALIST).AEND
346 &MACRETC SETC '&MACRETC'.','.'&ALIST(&AIND)'
347 &AIND SETA &AIND+1
348 AGO .ALOOP
349 .AEND ANOP
350 MEND
351 *
352 * REPINSPI - issue MNOTE with one instruction --------------
353 *
354 MACRO
355 REPINSPI &CODE,&ARGS
356 LCLA &MAIND
357 LCLC &MASTR
358 *
359 * MNOTE requires that ' is doubled for expanded variables
360 * thus build &MASTR as a copy of '&ARGS with ' doubled
361 *
362 &MAIND SETA 1
363 &MASTR SETC ''
364 *
365 .MALOOP ANOP
366 &MASTR SETC '&MASTR'.'&ARGS'(&MAIND,1)
367 AIF ('&ARGS'(&MAIND,1) NE '''').MANEXT
368 &MASTR SETC '&MASTR'.''''
369 .MANEXT ANOP
370 &MAIND SETA &MAIND+1
371 AIF (&MAIND LE K'&ARGS).MALOOP
372 MNOTE *,'// &CODE &MASTR'
373 MEND
374 *
375 * global definitions --------------------------------------------------
376 *
377 GBLB &DISBAS
378 &DISBAS SETB 0 set 1 to disable BAS/BASR tests
379 *
380 * main preamble -------------------------------------------------------
381 *
000000 382 MAIN START 0 start main code csect at base 0
383 SAVE (14,12) Save input registers
000000 384+ DS 0H 01650000
000000 90EC D00C 0000C 385+ STM 14,12,12(13) SAVE REGISTERS 02950000
PAGE 9
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000004 18BF 386 LR R11,R15 base register 1 := entry address
000006 41CB 0800 00800 387 LA R12,2048(R11)
00000A 41CC 0800 00800 388 LA R12,2048(R12) base register 2 := entry address+4k
00000 389 USING MAIN,R11,R12 declare 2 base register for 8k code
00000E 50D0 B414 00414 390 ST R13,SAVE+4 set back pointer in current save area
000012 182D 391 LR R2,R13 remember callers save area
000014 41D0 B410 00410 392 LA R13,SAVE setup current save area
000018 50D2 0008 00008 393 ST R13,8(R2) set forw pointer in callers save area
394 *
395 * general constant definitions-----------------------------------------
396 *
02000 397 CBUFSIZE EQU 8192
398 *
399 * some preparations --------------------------------------------------
400 *
00001C 5010 B4A4 004A4 401 ST R1,ARGPTR save argument list pointer for later
000020 5830 BD90 00D90 402 L R3,=A(TDSCTBLE-4) pointer to last entry of TDSCTBL
000024 9680 3000 00000 403 OI 0(R3),X'80' mark last entry of TDSCTBL
404 *
405 * open datasets --------------------------------------------
406 *
407 OPEN (SYSPRINT,OUTPUT) open SYSPRINT
000028 408+ CNOP 0,4 ALIGN LIST TO FULLWORD 01740001
000028 4510 B030 00030 409+ BAL 1,*+8 LOAD REG1 W/LIST ADDR. 01780000
00002C 8F 410+ DC AL1(143) OPTION BYTE 01900000
00002D 0021D0 411+ DC AL3(SYSPRINT) DCB ADDRESS 01920000
000030 0A13 412+ SVC 19 ISSUE OPEN SVC 04000000
000032 12FF 413 LTR R15,R15 test return code
000034 4780 B040 00040 414 BE OOPENOK
000038 9204 B4A3 004A3 415 MVI RC+3,X'04'
00003C 47F0 B3F4 003F4 416 B EXIT quit with RC=4
00040 417 OOPENOK EQU *
418 *
419 * allocate buffers -----------------------------------------
420 *
421 GETMAIN RU,LV=CBUFSIZE,BNDRY=PAGE
422+* OS/VS2 RELEASE 4 VERSION -- 10/21/75 00004804
000040 423+ CNOP 0,4 00691802
000040 47F0 B04C 0004C 424+ B *+12-4*0-2*0 BRANCH AROUND DATA 00691902
000044 00002000 425+ DC A(CBUFSIZE) LENGTH 00701802
000048 00 426+IHB0003F DC AL1(0) RESERVED 00704502
000049 00 427+ DC AL1(0) RESERVED 00711902
00004A 00 428+ DC AL1(0) SUBPOOL 00727802
00004B 06 429+ DC BL1'00000110' MODE BYTE 00730402
00004C 5800 B044 00044 430+ L 0,*-8+2*0 LOAD LENGTH 00733002
000050 58F0 B048 00048 431+ L 15,IHB0003F LOAD GETMAIN PARMS 00788502
000054 1B11 432+ SR 1,1 ZERO RESERVED REG 1 00814402
000056 0A78 433+ SVC 120 ISSUE GETMAIN SVC 00820002
000058 5010 B4B0 004B0 434 ST R1,PCBUF code area pointer
435 GETMAIN RU,LV=4096,BNDRY=PAGE
436+* OS/VS2 RELEASE 4 VERSION -- 10/21/75 00004804
00005C 437+ CNOP 0,4 00691802
00005C 47F0 B068 00068 438+ B *+12-4*0-2*0 BRANCH AROUND DATA 00691902
000060 00001000 439+ DC A(4096) LENGTH 00701802
000064 00 440+IHB0004F DC AL1(0) RESERVED 00704502
PAGE 10
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000065 00 441+ DC AL1(0) RESERVED 00711902
000066 00 442+ DC AL1(0) SUBPOOL 00727802
000067 06 443+ DC BL1'00000110' MODE BYTE 00730402
000068 5800 B060 00060 444+ L 0,*-8+2*0 LOAD LENGTH 00733002
00006C 58F0 B064 00064 445+ L 15,IHB0004F LOAD GETMAIN PARMS 00788502
000070 1B11 446+ SR 1,1 ZERO RESERVED REG 1 00814402
000072 0A78 447+ SVC 120 ISSUE GETMAIN SVC 00820002
000074 5010 B4B4 004B4 448 ST R1,PBUF4K1 1st 4k data buffer pointer
449 GETMAIN RU,LV=4096,BNDRY=PAGE
450+* OS/VS2 RELEASE 4 VERSION -- 10/21/75 00004804
000078 451+ CNOP 0,4 00691802
000078 47F0 B084 00084 452+ B *+12-4*0-2*0 BRANCH AROUND DATA 00691902
00007C 00001000 453+ DC A(4096) LENGTH 00701802
000080 00 454+IHB0005F DC AL1(0) RESERVED 00704502
000081 00 455+ DC AL1(0) RESERVED 00711902
000082 00 456+ DC AL1(0) SUBPOOL 00727802
000083 06 457+ DC BL1'00000110' MODE BYTE 00730402
000084 5800 B07C 0007C 458+ L 0,*-8+2*0 LOAD LENGTH 00733002
000088 58F0 B080 00080 459+ L 15,IHB0005F LOAD GETMAIN PARMS 00788502
00008C 1B11 460+ SR 1,1 ZERO RESERVED REG 1 00814402
00008E 0A78 461+ SVC 120 ISSUE GETMAIN SVC 00820002
000090 5010 B4B8 004B8 462 ST R1,PBUF4K2 2nd 4k data buffer pointer
463 *
464 * main body -----------------------------------------------------------
465 *
000000 466 TDSC DSECT
000000 467 TENTRY DS F entry address
000004 468 TLENGTH DS F code/data length of test
000008 469 TLRCNT DS F local repeat count
00000C 470 TIGCNT DS F local instruction group count
000010 471 TLTYPE DS F loop type
000014 472 TTAGDSC DS F tag text descriptor
000018 473 TTXTDSC DS F description text descriptor
474 *
000094 475 MAIN CSECT
476 *
477 * write header -------------------------------------------------------
478 *
000094 5810 B574 00574 479 L R1,MSGVHDR
000098 45E0 BAB2 00AB2 480 BAL R14,OTEXT print VERS message prefix
00009C 5810 B570 00570 481 L R1,MSGVERS
0000A0 45E0 BAB2 00AB2 482 BAL R14,OTEXT print version
0000A4 45E0 BAE0 00AE0 483 BAL R14,OPUTLINE write line
484 *
485 * handle PARMs and config file----------------------------------------
486 *
0000A8 45E0 B5DA 005DA 487 BAL R14,PARMPH1 handle PARM, phase 1
0000AC 45E0 B826 00826 488 BAL R14,CNFRD handle config file
0000B0 45E0 B748 00748 489 BAL R14,PARMPH2 handle PARM, phase 2
490 *
491 * handle /TCOR, add tests required for loop overhead correction
492 * R1 current ltype (as index or byte offset)
493 * R2 pointer into TDSCTBL
494 * R3 pointer to current TDSC
495 * R4 pointer to TCORTBL (0 based)
PAGE 11
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
496 * R5 pointer into case list (starting at LTTBLxx)
497 * R6 pointer to TDSCTBL entry
498 *
0000B4 9500 B54F 0054F 499 CLI FLGTCOR,X'00' /TCOR seen ?
0000B8 4780 B132 00132 500 BE TCORE if = not, skip handling
0000BC 5820 BD94 00D94 501 L R2,=A(TDSCTBL) get head of TDSCTBL
502 *
0000C0 5832 0000 00000 503 TCORLO L R3,0(R2) get next TDSC
00000 504 USING TDSC,R3 declare TDSC base register
0000C4 9101 2000 00000 505 TM 0(R2),X'01' test disable flag
0000C8 4710 B118 00118 506 BO TCORNO if seen, continue with next
507 *
0000CC 5810 3010 00010 508 L R1,TLTYPE get lt
0000D0 1211 509 LTR R1,R1 test lt
0000D2 47D0 B118 00118 510 BNH TCORNO ignore tests with lt <= 0
0000D6 5910 BD98 00D98 511 C R1,=A(LTMAX) compare with TCORTBL size
0000DA 47D0 B0FA 000FA 512 BNH TCOROK if <= max ok
513 *
0000DE 5810 B5A0 005A0 514 L R1,MSGLTBD otherwise complain and abort
0000E2 45E0 BAB2 00AB2 515 BAL R14,OTEXT print error message
0000E6 5810 3014 00014 516 L R1,TTAGDSC
0000EA 45E0 BAB2 00AB2 517 BAL R14,OTEXT print tag
0000EE 45E0 BAE0 00AE0 518 BAL R14,OPUTLINE write line
0000F2 9214 B4A3 004A3 519 MVI RC+3,X'14'
0000F6 47F0 B3F4 003F4 520 B EXIT quit with RC=20
521 *
0000FA 5840 BD9C 00D9C 522 TCOROK L R4,=A(TCORTBL-4) get TCORTBL ptr (0 based!)
0000FE 8910 0002 00002 523 SLL R1,2 lt index to byte offset
000102 5851 4000 00000 524 L R5,0(R1,R4) get ptr to lt case list
000106 5865 0000 00000 525 TCORLI L R6,0(R5) get case (is ptr into TDSCTBL)
00010A 94FE 6000 00000 526 NI 0(R6),X'FE' clear disable flag bit
00010E 4155 0004 00004 527 LA R5,4(R5) push ptr to next case
000112 1266 528 LTR R6,R6 end tag X'80000000' seen ?
000114 47B0 B106 00106 529 BNL TCORLI if >= not, keep going
530 *
00118 531 TCORNO EQU *
532 DROP R3
000118 4122 0004 00004 533 LA R2,4(R2) push pointer to next TDSC
00011C 1233 534 LTR R3,R3 end tag X'80000000' seen ?
00011E 47B0 B0C0 000C0 535 BNL TCORLO if >= not, keep going
536 *
000122 5860 BDA0 00DA0 537 L R6,=A(T100TPTR) ptr to T100 (LR test for nrr)
000126 94FE 6000 00000 538 NI 0(R6),X'FE' clear disable flag bit
00012A 5860 BDA4 00DA4 539 L R6,=A(T102TPTR) ptr to T102 (L test for nrx)
00012E 94FE 6000 00000 540 NI 0(R6),X'FE' clear disable flag bit
541 *
00132 542 TCORE EQU *
543 *
544 * print test table if requested with /OPTT
545 *
000132 9500 B54C 0054C 546 CLI FLGOPTT,X'00' /OPTT seen ?
000136 4780 B1AE 001AE 547 BE OPTPTTE if = not
00013A 5810 B5A8 005A8 548 L R1,MSGOPTT
00013E 45E0 BAB2 00AB2 549 BAL R14,OTEXT print GMUL message prefix
000142 45E0 BAE0 00AE0 550 BAL R14,OPUTLINE write line
PAGE 12
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000146 5820 BD94 00D94 551 L R2,=A(TDSCTBL) get head of TDSCTBL
552 *
00014A 5832 0000 00000 553 OPTPTTL L R3,0(R2) get next TDSC
00000 554 USING TDSC,R3 declare TDSC base register
00014E 1812 555 LR R1,R2
000150 5B10 BD94 00D94 556 S R1,=A(TDSCTBL)
000154 8810 0002 00002 557 SRL R1,2 R1 now index into TDSCTBL
000158 45E0 BBA8 00BA8 558 BAL R14,OINT04 print index
00015C 5810 B5B8 005B8 559 L R1,MSGTDIS
000160 9101 2000 00000 560 TM 0(R2),X'01' test disable flag
000164 4710 B16C 0016C 561 BO OPTPTTD if seen, prefix with " -"
000168 5810 B5B4 005B4 562 L R1,MSGTENA otherwise with " "
00016C 45E0 BAB2 00AB2 563 OPTPTTD BAL R14,OTEXT print enable/disable prefix
000170 5810 3014 00014 564 L R1,TTAGDSC
000174 45E0 BAB2 00AB2 565 BAL R14,OTEXT print tag
000178 5810 3008 00008 566 L R1,TLRCNT
00017C 45E0 BB70 00B70 567 BAL R14,OINT10 print LRCNT
000180 5810 300C 0000C 568 L R1,TIGCNT
000184 45E0 BBA8 00BA8 569 BAL R14,OINT04 print IGCNT
000188 5810 3010 00010 570 L R1,TLTYPE
00018C 45E0 BBA8 00BA8 571 BAL R14,OINT04 print LTYPE
000190 5810 3000 00000 572 L R1,TENTRY
000194 45E0 BBDC 00BDC 573 BAL R14,OHEX10 print code address
000198 5810 3004 00004 574 L R1,TLENGTH
00019C 45E0 BB70 00B70 575 BAL R14,OINT10 print code length
0001A0 45E0 BAE0 00AE0 576 BAL R14,OPUTLINE write line
577 *
578 DROP R3
0001A4 4122 0004 00004 579 LA R2,4(R2) push pointer to next TDSC
0001A8 1233 580 LTR R3,R3 end tag X'80000000' seen ?
0001AA 47B0 B14A 0014A 581 BNL OPTPTTL if >= not, keep going
582 *
001AE 583 OPTPTTE EQU *
584 *
585 * some final preparations --------------------------------------------
586 *
587 * as warmup run test used for GMUL (with or without /GAUT !)
588 *
0001AE 5830 B4AC 004AC 589 L R3,GMULTDSC get GMUL test descriptor
0001B2 45A0 B900 00900 590 BAL R10,DOTEST run test with current GMUL
591 *
592 * handle /GAUT -----------------------
593 *
0001B6 9500 B54E 0054E 594 CLI FLGGAUT,X'00' /GAUT active ?
0001BA 4780 B274 00274 595 BE OPTGAUTE if = not, skip handling
596 *
0001BE 5830 B4AC 004AC 597 L R3,GMULTDSC get GMUL test descriptor
0001C2 45A0 B900 00900 598 OPTGAUTL BAL R10,DOTEST run test with current GMUL
0001C6 9845 B4C8 004C8 599 LM R4,R5,TCKBEG get start time
0001CA 8C40 000C 0000C 600 SRDL R4,12 get it in usec
0001CE 9867 B4D0 004D0 601 LM R6,R7,TCKEND get end time
0001D2 8C60 000C 0000C 602 SRDL R6,12 get it in usec
0001D6 1F75 603 SLR R7,R5 R7 := end-start in usec (LSB)
604 *
0001D8 9500 B54A 0054A 605 CLI FLGOTGA,X'00' /OTGA active ?
PAGE 13
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0001DC 4780 B222 00222 606 BE NOTRCTGA if = not, skip printing
0001E0 5810 B5D4 005D4 607 L R1,MSGTGA
0001E4 45E0 BAB2 00AB2 608 BAL R14,OTEXT print /OTGA message prefix
0001E8 5810 B4A8 004A8 609 L R1,GMUL
0001EC 45E0 BB70 00B70 610 BAL R14,OINT10 print GMUL
0001F0 5810 B5BC 005BC 611 L R1,MSGCSEP
0001F4 45E0 BAB2 00AB2 612 BAL R14,OTEXT print ' : '
0001F8 4110 B4C8 004C8 613 LA R1,TCKBEG
0001FC 45E0 BC20 00C20 614 BAL R14,OHEX210 print TCKBEG (as hex)
000200 5810 B5BC 005BC 615 L R1,MSGCSEP
000204 45E0 BAB2 00AB2 616 BAL R14,OTEXT print ' : '
000208 4110 B4D0 004D0 617 LA R1,TCKEND
00020C 45E0 BC20 00C20 618 BAL R14,OHEX210 print TCKEND (as hex)
000210 5810 B5BC 005BC 619 L R1,MSGCSEP
000214 45E0 BAB2 00AB2 620 BAL R14,OTEXT print ' : '
000218 1817 621 LR R1,R7
00021A 45E0 BB70 00B70 622 BAL R14,OINT10 print dt (as int)
00021E 45E0 BAE0 00AE0 623 BAL R14,OPUTLINE write line
00222 624 NOTRCTGA EQU *
625 *
000222 5970 BDA8 00DA8 626 C R7,=F'200000' compare with 0.2 sec
000226 4720 B246 00246 627 BH OPTGAUTC
00022A 5840 B4A8 004A8 628 L R4,GMUL load GMUL
00022E 5940 BDAC 00DAC 629 C R4,=F'30000' already at limit ?
000232 4720 B274 00274 630 BH OPTGAUTE if > yes, quit increasing it
000236 8940 0001 00001 631 SLL R4,1 2*GMUL
00023A 5A40 B4A8 004A8 632 A R4,GMUL 3*GMUL
00023E 5040 B4A8 004A8 633 ST R4,GMUL now GMUL tripled
000242 47F0 B1C2 001C2 634 B OPTGAUTL and re-try with new GMUL
635 *
00246 636 OPTGAUTC EQU * calculate final GMUL
000246 1744 637 XR R4,R4 clear R4
000248 5850 BDB0 00DB0 638 L R5,=F'1024000000' (R4,R5) := 1024 * 1000000
00024C 1D47 639 DR R4,R7 R5 := (1024*1000000)/dt
00024E 5870 B4A8 004A8 640 L R7,GMUL
000252 1C65 641 MR R6,R5 R7 := GMUL * (1024*1000000)/dt
000254 8870 000A 0000A 642 SRL R7,10 R7 := GMUL * 1000000/dt
000258 4160 0001 00001 643 LA R6,1
00025C 1976 644 CR R7,R6 GMUL < 1
00025E 4720 B264 00264 645 BH OPTGAUTB if > not
000262 1876 646 LR R7,R6 limit to 1
000264 5860 BDB4 00DB4 647 OPTGAUTB L R6,=F'99999'
000268 1976 648 CR R7,R6 GMUL > 99999
00026A 4740 B270 00270 649 BL OPTGAUTT
00026E 1876 650 LR R7,R6 limit to 99999
000270 5070 B4A8 004A8 651 OPTGAUTT ST R7,GMUL
652 *
00274 653 OPTGAUTE EQU *
654 *
655 * print headings -----------------------
656 *
000274 5810 B57C 0057C 657 L R1,MSGGMUL
000278 45E0 BAB2 00AB2 658 BAL R14,OTEXT print GMUL message prefix
00027C 5810 B4A8 004A8 659 L R1,GMUL
000280 45E0 BB70 00B70 660 BAL R14,OINT10 print GMUL
PAGE 14
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000284 45E0 BAE0 00AE0 661 BAL R14,OPUTLINE write line
662 *
000288 5810 B580 00580 663 L R1,MSGSTRT
00028C 45E0 BAB2 00AB2 664 BAL R14,OTEXT print 'start tests' message
000290 B205 B4C0 004C0 665 STCK TPRBEG get program start time
000294 4110 B4C0 004C0 666 LA R1,TPRBEG
000298 45E0 BC20 00C20 667 BAL R14,OHEX210 print TPRBEG (as hex)
00029C 45E0 BAE0 00AE0 668 BAL R14,OPUTLINE write line
669 *
0002A0 5810 B5AC 005AC 670 L R1,MSGTHD1
0002A4 45E0 BAB2 00AB2 671 BAL R14,OTEXT print heading part 1
0002A8 4110 001E 0001E 672 LA R1,30
0002AC 45E0 BA8A 00A8A 673 BAL R14,OTAB goto tab stop
0002B0 5810 B5B0 005B0 674 L R1,MSGTHD2
0002B4 45E0 BAB2 00AB2 675 BAL R14,OTEXT print heading part 1
0002B8 45E0 BAE0 00AE0 676 BAL R14,OPUTLINE write line
677 *
678 * finally execute tests ----------------------------------------------
679 * R2 pointer into TDSCTBL
680 * R3 pointer to current TDSC
681 *
682 * outer loop over tests
683 *
0002BC 5820 BD94 00D94 684 L R2,=A(TDSCTBL) get head of TDSCTBL
0002C0 5832 0000 00000 685 TLOOP L R3,0(R2) get next TDSC
0002C4 9101 2000 00000 686 TM 0(R2),X'01' test disable flag
0002C8 4710 B3AC 003AC 687 BO TLOOPN if seen, skip test
00000 688 USING TDSC,R3 declare TDSC base register
689 *
0002CC 9500 B548 00548 690 CLI FLGODBG,X'00' /ODGB active ?
0002D0 4780 B2D8 002D8 691 BE NOTRCSTP if = not, skip tracing
0002D4 45E0 B984 00984 692 BAL R14,TRCSTP
002D8 693 NOTRCSTP EQU *
694 *
0002D8 45A0 B900 00900 695 BAL R10,DOTEST execute test with inner GMUL loop
696 *
697 * calculate result
698 *
0002DC 4110 B4C8 004C8 699 LA R1,TCKBEG
0002E0 45E0 B942 00942 700 BAL R14,CNVCK2D
0002E4 6000 B4D8 004D8 701 STD FR0,TBEG TBEG now in 1/16 of usec
702 *
0002E8 4110 B4D0 004D0 703 LA R1,TCKEND
0002EC 45E0 B942 00942 704 BAL R14,CNVCK2D
0002F0 6000 B4E0 004E0 705 STD FR0,TEND TEND now in 1/16 of usec
706 *
0002F4 6800 B4E0 004E0 707 LD FR0,TEND
0002F8 6B00 B4D8 004D8 708 SD FR0,TBEG
0002FC 6D00 BD68 00D68 709 DD FR0,=D'16.E6' from 1/16 of usec to sec
000300 6000 B4E8 004E8 710 STD FR0,TDIF TDIF in sec
711 *
000304 5810 3008 00008 712 L R1,TLRCNT
000308 45E0 B970 00970 713 BAL R14,CNVF2D
00030C 2820 714 LDR FR2,FR0 FR2 := float(TLRCNT)
00030E 5810 300C 0000C 715 L R1,TIGCNT
PAGE 15
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000312 45E0 B970 00970 716 BAL R14,CNVF2D FR0 := float(TIGCNT)
000316 2C20 717 MDR FR2,FR0 FR2 := TLRCNT*TIGCNT
000318 5810 B4A8 004A8 718 L R1,GMUL
00031C 45E0 B970 00970 719 BAL R14,CNVF2D FR0 := float(GMUL)
000320 2C20 720 MDR FR2,FR0 FR2 := TLRCNT*TIGCNT*GMUL
000322 6800 B4E8 004E8 721 LD FR0,TDIF FR0 := dt
000326 2D02 722 DDR FR0,FR2 FR0 := dt /(TLRCNT*TIGCNT*GMUL)
000328 6C00 BD70 00D70 723 MD FR0,=D'1.E6' FR0 := 1.e6 *dt/(TLRCNT*TIGCNT*GMUL)
00032C 6000 B4F0 004F0 724 STD FR0,TINS TINS now in usec
725 *
726 * print /ODBG trace output
727 *
000330 9500 B548 00548 728 CLI FLGODBG,X'00' /ODBG active ?
000334 4780 B33C 0033C 729 BE NOTRCRES if = not, skip tracing
000338 45E0 B9DC 009DC 730 BAL R14,TRCRES
0033C 731 NOTRCRES EQU *
732 *
733 * print result
734 *
00033C 5810 3014 00014 735 L R1,TTAGDSC
000340 45E0 BAB2 00AB2 736 BAL R14,OTEXT print tag
000344 45E0 BA7C 00A7C 737 BAL R14,OSKIP02 add space
000348 5810 3018 00018 738 L R1,TTXTDSC
00034C 45E0 BAB2 00AB2 739 BAL R14,OTEXT print description
000350 4110 001E 0001E 740 LA R1,30
000354 45E0 BA8A 00A8A 741 BAL R14,OTAB goto tab stop
000358 5810 B5BC 005BC 742 L R1,MSGCSEP
00035C 45E0 BAB2 00AB2 743 BAL R14,OTEXT print " : "
000360 6800 B4E8 004E8 744 LD FR0,TDIF
000364 45E0 BC5C 00C5C 745 BAL R14,OFIX1306 print run time
746 *
000368 5810 3008 00008 747 L R1,TLRCNT
00036C 45E0 BB70 00B70 748 BAL R14,OINT10 print LRCNT
000370 5810 300C 0000C 749 L R1,TIGCNT
000374 45E0 BBA8 00BA8 750 BAL R14,OINT04 print IGCNT
000378 5810 3010 00010 751 L R1,TLTYPE
00037C 45E0 BBA8 00BA8 752 BAL R14,OINT04 print LTYPE
753 *
000380 5810 B5BC 005BC 754 L R1,MSGCSEP
000384 45E0 BAB2 00AB2 755 BAL R14,OTEXT print " : "
000388 6800 B4F0 004F0 756 LD FR0,TINS
00038C 45E0 BC5C 00C5C 757 BAL R14,OFIX1306 print time per test
000390 45E0 BAE0 00AE0 758 BAL R14,OPUTLINE write line
759 *
000394 9500 B549 00549 760 CLI FLGOWTO,X'00' /OWTO active ?
000398 4780 B3AC 003AC 761 BE NOWTO if = not, skip oper messages
00039C 5810 3014 00014 762 L R1,TTAGDSC
0003A0 D203 B568 1000 00568 00000 763 MVC WTOMSG2,0(R1) insert current tag
764 WTO MF=(E,WTOPLIST) and issue operator message
0003A6 4110 B554 00554 765+ LA 1,WTOPLIST LOAD PARAMETER REG 1 01900002
0003AA 0A23 766+ SVC 35 ISSUE SVC 01500002
003AC 767 NOWTO EQU *
768 *
769 DROP R3
0003AC 4122 0004 00004 770 TLOOPN LA R2,4(R2) push pointer to next TDSC
PAGE 16
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0003B0 1233 771 LTR R3,R3 end tag X'80000000' seen ?
0003B2 47B0 B2C0 002C0 772 BNL TLOOP if >= not, keep going
773 *
0003B6 5810 B584 00584 774 L R1,MSGDONE
0003BA 45E0 BAB2 00AB2 775 BAL R14,OTEXT print 'done tests' message
0003BE B205 B4D0 004D0 776 STCK TCKEND get program end time
0003C2 4110 B4D0 004D0 777 LA R1,TCKEND
0003C6 45E0 BC20 00C20 778 BAL R14,OHEX210 print TCKEND (as hex)
779 *
0003CA 4110 B4C0 004C0 780 LA R1,TPRBEG
0003CE 45E0 B942 00942 781 BAL R14,CNVCK2D convert program start time
0003D2 2860 782 LDR FR6,FR0 keep in FR6
783 *
0003D4 4110 B4D0 004D0 784 LA R1,TCKEND
0003D8 45E0 B942 00942 785 BAL R14,CNVCK2D convert program end time
0003DC 2B06 786 SDR FR0,FR6 dt = end - beg
0003DE 6D00 BD68 00D68 787 DD FR0,=D'16.E6' from 1/16 of usec to sec
788 *
0003E2 5810 B5A4 005A4 789 L R1,MSGDT
0003E6 45E0 BAB2 00AB2 790 BAL R14,OTEXT print 'done tests' message
0003EA 45E0 BC5C 00C5C 791 BAL R14,OFIX1306 print run time
0003EE 45E0 BAE0 00AE0 793 BAL R14,OPUTLINE write line
794 *
795 * close datasets and return to OS -------------------------------------
796 *
797 EXIT CLOSE SYSPRINT close SYSPRINT
0003F2 0700 798+ CNOP 0,4 ALIGN LIST TO FULLWORD 02420002
0003F4 4510 B3FC 003FC 799+EXIT BAL 1,*+8 LOAD REG1 W/LIST ADDR 02460002
0003F8 80 800+ DC AL1(128) OPTION BYTE 02580000
0003F9 0021D0 801+ DC AL3(SYSPRINT) DCB ADDRESS 02600000
0003FC 0A14 802+ SVC 20 ISSUE CLOSE SVC 01640000
0003FE 58D0 B414 00414 803 L R13,SAVE+4 get old save area back
000402 5800 B4A0 004A0 804 L R0,RC get return code
000406 500D 0010 00010 805 ST R0,16(R13) store in old save R15
806 RETURN (14,12) return to OS (will setup RC)
00040A 98EC D00C 0000C 807+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00040E 07FE 808+ BR 14 RETURN 02000000
809 *
810 * data for MAIN program ----------------------------------------------
811 *
000410 812 SAVE DS 18F save area (for main)
000458 813 SAVETST DS 18F save area (shared by Txxx)
0004A0 00000000 814 RC DC F'0' return code
0004A4 00000000 815 ARGPTR DC F'0' argument list pointer
816 *
0004A8 00000001 817 GMUL DC F'1' general multiplier
0004AC 00002528 818 GMULTDSC DC A(T102TDSC) test used for GMUL
819 *
0004B0 820 PCBUF DS F ptr to code area buffer
0004B4 821 PBUF4K1 DS F ptr 1st 4k data buffer
0004B8 822 PBUF4K2 DS F ptr 2nd 4k data buffer
823 *
0004C0 824 TPRBEG DS D STCK value at program begin
0004C8 825 TCKBEG DS D STCK value at test begin
PAGE 17
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0004D0 826 TCKEND DS D STCK value at test end
0004D8 827 TBEG DS D TCKBEG as double in 1/16 usec
0004E0 828 TEND DS D TCKEND as double in 1/16 usec
0004E8 829 TDIF DS D test time in sec
0004F0 830 TINS DS D instruction time in usec
831 *
0004F8 832 GMULPACK DS D
000500 F0F0F0F0F0F0 833 GMULZONE DC C'000000'
834 *
000508 835 DS 0F
000508 00000548D6C4C2C7 836 FLGTBL DC X'00',AL3(FLGODBG),C'ODBG'
000510 00000549D6E3E6D6 837 DC X'00',AL3(FLGOWTO),C'OTWO'
000518 0000054AD6E3C7C1 838 DC X'00',AL3(FLGOTGA),C'OTGA'
000520 0000054BD6D7C3C6 839 DC X'00',AL3(FLGOPCF),C'OPCF'
000528 0000054CD6D7E3E3 840 DC X'00',AL3(FLGOPTT),C'OPTT'
000530 0000054DD6D9C9D7 841 DC X'00',AL3(FLGORIP),C'ORIP'
000538 0000054EC7C1E4E3 842 DC X'00',AL3(FLGGAUT),C'GAUT'
000540 8000054FE3C3D6D9 843 FTBLTCOR DC X'80',AL3(FLGTCOR),C'TCOR'
844 *
000548 00 845 FLGODBG DC X'00' /ODBG active
000549 00 846 FLGOWTO DC X'00' /OWTO active
00054A 00 847 FLGOTGA DC X'00' /OTGA active
00054B 00 848 FLGOPCF DC X'00' /OPCF active
00054C 00 849 FLGOPTT DC X'00' /OPTT active
00054D 00 850 FLGORIP DC X'00' /ORIP active
00054E 00 851 FLGGAUT DC X'00' /GAUT active
00054F 00 852 FLGTCOR DC X'00' /TCOR active
000550 00 853 TDSCDIS DC X'00' TDSC disable done after 1st /Tnnn
000551 E3 854 CHART DC C'T' just letter 'T'
000552 5C 855 CHARWC DC C'*' just letter '*'
856 *
000554 857 DS 0F
000554 0018 858 WTOPLIST DC AL2(4+L'WTOMSG1+L'WTOMSG2) text length + 4
000556 8000 859 DC B'1000000000000000' msg flags
000558 A2F3F7F06D978599 860 WTOMSG1 DC C's370_perf: done '
000568 E3A7A7A7 861 WTOMSG2 DC C'Txxx'
00056C 0400 862 DC B'0000010000000000' descriptor codes (6=job status)
00056E 4000 863 DC B'0100000000000000' routing codes (2=console info)
864 *
000570 865 DS 0F
866 MSGVERS OTXTDSC C's370_perf V0.9.8 rev 1026 2018-05-27'
000DF0 867+TEXT CSECT
000DF0 A2F3F7F06D978599 868+SPTR0010 DC C's370_perf V0.9.8 rev 1026 2018-05-27'
000570 869+MAIN CSECT
000570 870+ DS 0F
000570 26000DF0 871+MSGVERS DC AL1(L'SPTR0010),AL3(SPTR0010)
872 MSGVHDR OTXTDSC C'PERF000I VERS: '
000E16 873+TEXT CSECT
000E16 D7C5D9C6F0F0F0C9 874+SPTR0011 DC C'PERF000I VERS: '
000574 875+MAIN CSECT
000574 876+ DS 0F
000574 0F000E16 877+MSGVHDR DC AL1(L'SPTR0011),AL3(SPTR0011)
878 MSGPARM OTXTDSC C'PERF001I PARM: '
000E25 879+TEXT CSECT
000E25 D7C5D9C6F0F0F1C9 880+SPTR0012 DC C'PERF001I PARM: '
PAGE 18
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000578 881+MAIN CSECT
000578 882+ DS 0F
000578 0F000E25 883+MSGPARM DC AL1(L'SPTR0012),AL3(SPTR0012)
884 MSGGMUL OTXTDSC C'PERF002I run with GMUL= '
000E34 885+TEXT CSECT
000E34 D7C5D9C6F0F0F2C9 886+SPTR0013 DC C'PERF002I run with GMUL= '
00057C 887+MAIN CSECT
00057C 888+ DS 0F
00057C 18000E34 889+MSGGMUL DC AL1(L'SPTR0013),AL3(SPTR0013)
890 MSGSTRT OTXTDSC C'PERF003I start with tests at'
000E4C 891+TEXT CSECT
000E4C D7C5D9C6F0F0F3C9 892+SPTR0014 DC C'PERF003I start with tests at'
000580 893+MAIN CSECT
000580 894+ DS 0F
000580 1C000E4C 895+MSGSTRT DC AL1(L'SPTR0014),AL3(SPTR0014)
896 MSGDONE OTXTDSC C'PERF004I done with tests at'
000E68 897+TEXT CSECT
000E68 D7C5D9C6F0F0F4C9 898+SPTR0015 DC C'PERF004I done with tests at'
000584 899+MAIN CSECT
000584 900+ DS 0F
000584 1C000E68 901+MSGDONE DC AL1(L'SPTR0015),AL3(SPTR0015)
902 MSGPBAD OTXTDSC C'PERF005E bad option: '
000E84 903+TEXT CSECT
000E84 D7C5D9C6F0F0F5C5 904+SPTR0016 DC C'PERF005E bad option: '
000588 905+MAIN CSECT
000588 906+ DS 0F
000588 15000E84 907+MSGPBAD DC AL1(L'SPTR0016),AL3(SPTR0016)
908 MSGPDIG OTXTDSC C'PERF006E bad digit: '
000E99 909+TEXT CSECT
000E99 D7C5D9C6F0F0F6C5 910+SPTR0017 DC C'PERF006E bad digit: '
00058C 911+MAIN CSECT
00058C 912+ DS 0F
00058C 14000E99 913+MSGPDIG DC AL1(L'SPTR0017),AL3(SPTR0017)
914 MSGPTST OTXTDSC C'PERF007E bad test: '
000EAD 915+TEXT CSECT
000EAD D7C5D9C6F0F0F7C5 916+SPTR0018 DC C'PERF007E bad test: '
000590 917+MAIN CSECT
000590 918+ DS 0F
000590 13000EAD 919+MSGPTST DC AL1(L'SPTR0018),AL3(SPTR0018)
920 MSGPGM0 OTXTDSC C'PERF008E GMUL is zero: '
000EC0 921+TEXT CSECT
000EC0 D7C5D9C6F0F0F8C5 922+SPTR0019 DC C'PERF008E GMUL is zero: '
000594 923+MAIN CSECT
000594 924+ DS 0F
000594 17000EC0 925+MSGPGM0 DC AL1(L'SPTR0019),AL3(SPTR0019)
926 MSGCBAD OTXTDSC C'PERF009E bad config item: '
000ED7 927+TEXT CSECT
000ED7 D7C5D9C6F0F0F9C5 928+SPTR0020 DC C'PERF009E bad config item: '
000598 929+MAIN CSECT
000598 930+ DS 0F
000598 1A000ED7 931+MSGCBAD DC AL1(L'SPTR0020),AL3(SPTR0020)
932 MSGCLNE OTXTDSC C'PERF010I config: '
000EF1 933+TEXT CSECT
000EF1 D7C5D9C6F0F1F0C9 934+SPTR0021 DC C'PERF010I config: '
00059C 935+MAIN CSECT
PAGE 19
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00059C 936+ DS 0F
00059C 11000EF1 937+MSGCLNE DC AL1(L'SPTR0021),AL3(SPTR0021)
938 MSGLTBD OTXTDSC C'PERF011E bad loop type for: '
000F02 939+TEXT CSECT
000F02 D7C5D9C6F0F1F1C5 940+SPTR0022 DC C'PERF011E bad loop type for: '
0005A0 941+MAIN CSECT
0005A0 942+ DS 0F
0005A0 1C000F02 943+MSGLTBD DC AL1(L'SPTR0022),AL3(SPTR0022)
944 MSGDT OTXTDSC C' dt='
000F1E 945+TEXT CSECT
000F1E 404084A37E 946+SPTR0023 DC C' dt='
0005A4 947+MAIN CSECT
0005A4 948+ DS 0F
0005A4 05000F1E 949+MSGDT DC AL1(L'SPTR0023),AL3(SPTR0023)
950 MSGOPTT OTXTDSC C' ind tag lr ig lt addr length'
000F23 951+TEXT CSECT
000F23 40899584404040A3 952+SPTR0024 DC C' ind tag lr ig lt addr length'
0005A8 953+MAIN CSECT
0005A8 954+ DS 0F
0005A8 30000F23 955+MSGOPTT DC AL1(L'SPTR0024),AL3(SPTR0024)
956 MSGTHD1 OTXTDSC C' tag description'
000F53 957+TEXT CSECT
000F53 40A3818740408485 958+SPTR0025 DC C' tag description'
0005AC 959+MAIN CSECT
0005AC 960+ DS 0F
0005AC 11000F53 961+MSGTHD1 DC AL1(L'SPTR0025),AL3(SPTR0025)
962 MSGTHD2 OTXTDSC C' : test(s) lr ig lt : inst(usec)'
000F64 963+TEXT CSECT
000F64 407A404040404040 964+SPTR0026 DC C' : test(s) lr ig lt : inst(usec)'
0005B0 965+MAIN CSECT
0005B0 966+ DS 0F
0005B0 32000F64 967+MSGTHD2 DC AL1(L'SPTR0026),AL3(SPTR0026)
968 MSGTENA OTXTDSC C' '
000F96 969+TEXT CSECT
000F96 4040 970+SPTR0027 DC C' '
0005B4 971+MAIN CSECT
0005B4 972+ DS 0F
0005B4 02000F96 973+MSGTENA DC AL1(L'SPTR0027),AL3(SPTR0027)
974 MSGTDIS OTXTDSC C' -'
000F98 975+TEXT CSECT
000F98 4060 976+SPTR0028 DC C' -'
0005B8 977+MAIN CSECT
0005B8 978+ DS 0F
0005B8 02000F98 979+MSGTDIS DC AL1(L'SPTR0028),AL3(SPTR0028)
980 MSGCSEP OTXTDSC C' : '
000F9A 981+TEXT CSECT
000F9A 407A40 982+SPTR0029 DC C' : '
0005BC 983+MAIN CSECT
0005BC 984+ DS 0F
0005BC 03000F9A 985+MSGCSEP DC AL1(L'SPTR0029),AL3(SPTR0029)
986 MSGDBG OTXTDSC C'-- '
000F9D 987+TEXT CSECT
000F9D 60604040 988+SPTR0030 DC C'-- '
0005C0 989+MAIN CSECT
0005C0 990+ DS 0F
PAGE 20
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0005C0 04000F9D 991+MSGDBG DC AL1(L'SPTR0030),AL3(SPTR0030)
992 MSGBEG OTXTDSC C'-- TCKBEG:'
000FA1 993+TEXT CSECT
000FA1 60604040E3C3D2C2 994+SPTR0031 DC C'-- TCKBEG:'
0005C4 995+MAIN CSECT
0005C4 996+ DS 0F
0005C4 0B000FA1 997+MSGBEG DC AL1(L'SPTR0031),AL3(SPTR0031)
998 MSGEND OTXTDSC C'-- TCKEND:'
000FAC 999+TEXT CSECT
000FAC 60604040E3C3D2C5 1000+SPTR0032 DC C'-- TCKEND:'
0005C8 1001+MAIN CSECT
0005C8 1002+ DS 0F
0005C8 0B000FAC 1003+MSGEND DC AL1(L'SPTR0032),AL3(SPTR0032)
1004 MSGDIF OTXTDSC C'-- DIFF:'
000FB7 1005+TEXT CSECT
000FB7 606040404040C4C9 1006+SPTR0033 DC C'-- DIFF:'
0005CC 1007+MAIN CSECT
0005CC 1008+ DS 0F
0005CC 0B000FB7 1009+MSGDIF DC AL1(L'SPTR0033),AL3(SPTR0033)
1010 MSGINS OTXTDSC C'-- INS:'
000FC2 1011+TEXT CSECT
000FC2 60604040404040C9 1012+SPTR0034 DC C'-- INS:'
0005D0 1013+MAIN CSECT
0005D0 1014+ DS 0F
0005D0 0B000FC2 1015+MSGINS DC AL1(L'SPTR0034),AL3(SPTR0034)
1016 MSGTGA OTXTDSC C'-- GAUT:'
000FCD 1017+TEXT CSECT
000FCD 60604040C7C1E4E3 1018+SPTR0035 DC C'-- GAUT:'
0005D4 1019+MAIN CSECT
0005D4 1020+ DS 0F
0005D4 09000FCD 1021+MSGTGA DC AL1(L'SPTR0035),AL3(SPTR0035)
1022 *
0005D8 1023 DS 0H
1024 *
1025 * helper routines ----------------------------------------------------
1026 *
1027 * --------------------------------------------------------------------
1028 * BR14FAR: helper used in 'far call' BAL/BALR tests ==================
1029 *
0005D8 07FE 1030 BR14FAR BR R14
1031 *
1032 * --------------------------------------------------------------------
1033 * PARMPH1: handle PARMs, phase 1, all except /Tnnn /Dnnn /Ennn =======
1034 * R2 PARM address
1035 * R3 PARM length
1036 *
0005DA 50E0 B744 00744 1037 PARMPH1 ST R14,PARMPHXL
1038 *
0005DE 5820 B4A4 004A4 1039 L R2,ARGPTR get argument list pointer
0005E2 5822 0000 00000 1040 L R2,0(R2) load PARM base address
0005E6 4832 0000 00000 1041 LH R3,0(R2) load PARM length
0005EA 1233 1042 LTR R3,R3 test length
0005EC 4780 B70C 0070C 1043 BZ PARMPH1E if =0 no PARM specified
1044 *
0005F0 4122 0002 00002 1045 LA R2,2(R2) R2 points to 1st PARM char
PAGE 21
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
1046 *
1047 * print PARM if given ------------------
1048 *
0005F4 5810 B578 00578 1049 L R1,MSGPARM
0005F8 45E0 BAB2 00AB2 1050 BAL R14,OTEXT print PARM message prefix
0005FC 5420 BDB8 00DB8 1051 N R2,=X'00FFFFFF' force upper bit to zero
000600 1813 1052 LR R1,R3 get length
000602 8910 0018 00018 1053 SLL R1,24 put length into bits 0-7
000606 1612 1054 OR R1,R2 and address into bits 8-31
000608 45E0 BAB2 00AB2 1055 BAL R14,OTEXT print PARM as passed
00060C 45E0 BAE0 00AE0 1056 BAL R14,OPUTLINE write line
1057 *
1058 * loop over options ----------------------------------------
1059 *
000610 9561 2000 00000 1060 PARMPH1L CLI 0(R2),C'/' does option start with / ?
000614 4770 B722 00722 1061 BNE PARMABO if != not
000618 5930 BDBC 00DBC 1062 C R3,=F'5' at least 5 chars left ?
00061C 4740 B722 00722 1063 BL PARMABO if < not
000620 4780 B62C 0062C 1064 BE OPTLOK if = exactly 5 char left
000624 9561 2005 00005 1065 CLI 5(R2),C'/' does option end with / ?
000628 4770 B722 00722 1066 BNE PARMABO if != not
1067 *
1068 * handle flags: /Oxxx,/GAUT,/TCOR -----
1069 * R4 current option
1070 * R5 current FLGTBL entry
1071 * R6 ptr to flag
1072 *
00062C 5842 0001 00001 1073 OPTLOK L R4,1(R2) load all 4 option bytes
000630 4150 B508 00508 1074 LA R5,FLGTBL load ptr to FLGTBL
000634 5865 0000 00000 1075 FLGLOOP L R6,0(R5) load ptr to flag
000638 5945 0004 00004 1076 C R4,4(R5) does table entry match ?
00063C 4770 B648 00648 1077 BNE FLGNEXT if != not, try next table entry
000640 9201 6000 00000 1078 MVI 0(R6),X'01' otherwise set flag
000644 47F0 B700 00700 1079 B PARMPH1N and try next option
000648 4155 0008 00008 1080 FLGNEXT LA R5,8(R5) push ptr to next entry
00064C 1266 1081 LTR R6,R6 end tag X'80000000' seen ?
00064E 47B0 B634 00634 1082 BNL FLGLOOP if >= not, keep going
1083 *
1084 * check for /T /D /E, accept and ignore them in phase 1
1085 *
000652 95E3 2001 00001 1086 CLI 1(R2),C'T' is it /T ?
000656 4780 B700 00700 1087 BE PARMPH1N if = yes, accept and next option
00065A 95C4 2001 00001 1088 CLI 1(R2),C'D' is it /D ?
00065E 4780 B700 00700 1089 BE PARMPH1N if = yes, accept and next option
000662 95C5 2001 00001 1090 CLI 1(R2),C'E' is it /E ?
000666 4780 B700 00700 1091 BE PARMPH1N if = yes, accept and next option
1092 *
1093 * handle /Cnnn -------------------------
1094 * R4 ptr to current TDSCTBL entry
1095 * R5 current TDSC
1096 * R6 current tag text descriptor
1097 * R7 current option (as Tnnn)
1098 *
00066A 95C3 2001 00001 1099 CLI 1(R2),C'C' is it /C ?
00066E 4770 B6A4 006A4 1100 BNE OPTCDONE if != try next
PAGE 22
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000672 5872 0001 00001 1101 L R7,1(R2) load all 4 option bytes
000676 BF78 B551 00551 1102 ICM R7,B'1000',CHART force leading byte to 'T'
1103 *
00067A 5840 BD94 00D94 1104 L R4,=A(TDSCTBL) get head of TDSCTBL
00067E 5854 0000 00000 1105 OPTCLOOP L R5,0(R4) get next TDSC
00000 1106 USING TDSC,R5 declare TDSC base register
000682 5860 5014 00014 1107 L R6,TTAGDSC get tag text descriptor
000686 5976 0000 00000 1108 C R7,0(R6) does Tnnn option match tag ?
00068A 4770 B696 00696 1109 BNE OPTCNEXT if != not, try next
1110 *
00068E 5050 B4AC 004AC 1111 ST R5,GMULTDSC setup GMUL TDSC pointer
000692 47F0 B700 00700 1112 B PARMPH1N and consider option handled
1113 *
1114 DROP R5
1115 *
000696 4144 0004 00004 1116 OPTCNEXT LA R4,4(R4) push pointer to next TDSC
00069A 1255 1117 LTR R5,R5 end tag X'80000000' seen ?
00069C 47B0 B67E 0067E 1118 BNL OPTCLOOP if >= not, keep going
0006A0 47F0 B71A 0071A 1119 B PARMABOT if here no test found, complain
1120 *
1121 * handle /Gxxx -------------------------
1122 *
0006A4 95C7 2001 00001 1123 OPTCDONE CLI 1(R2),C'G' is it /G ?
0006A8 4770 B722 00722 1124 BNE PARMABO if != is unknown option
1125 *
0006AC 95D2 2004 00004 1126 OPTGNNN CLI 4(R2),C'K' is it /GnnK form ?
0006B0 4780 B6BE 006BE 1127 BE OPTGNNK
0006B4 D202 B503 2002 00503 00002 1128 MVC GMULZONE+3(3),2(R2) get 3 digit, place 000nnn
0006BA 47F0 B6C4 006C4 1129 B OPTGCNV
0006BE D201 B501 2002 00501 00002 1130 OPTGNNK MVC GMULZONE+1(2),2(R2) get 2 digit, place 0nn000
1131 *
0006C4 4150 B501 00501 1132 OPTGCNV LA R5,GMULZONE+1 setup digit check, data pointer
0006C8 4160 0001 00001 1133 LA R6,1 increment
0006CC 4170 B505 00505 1134 LA R7,GMULZONE+5 end pointer
0006D0 95F0 5000 00000 1135 OPTGLOOP CLI 0(R5),C'0' is char >= '0'
0006D4 4740 B712 00712 1136 BL PARMABOD if < not
0006D8 95F9 5000 00000 1137 CLI 0(R5),C'9' is char <= '9'
0006DC 4720 B712 00712 1138 BH PARMABOD if > not
0006E0 8756 B6D0 006D0 1139 BXLE R5,R6,OPTGLOOP and loop till end
1140 *
0006E4 F275 B4F8 B500 004F8 00500 1141 PACK GMULPACK(8),GMULZONE zoned to packed
0006EA 4F00 B4F8 004F8 1142 CVB R0,GMULPACK and packed to binary
0006EE 1200 1143 LTR R0,R0 test result
0006F0 4770 B6FC 006FC 1144 BNE OPTGOK if =0 complain
0006F4 5810 B594 00594 1145 L R1,MSGPGM0
0006F8 47F0 B726 00726 1146 B PARMABO1
0006FC 5000 B4A8 004A8 1147 OPTGOK ST R0,GMUL store GMUL
1148 *
1149 * now handle next option ---------------
1150 *
000700 4122 0005 00005 1151 PARMPH1N LA R2,5(R2) push to next option
000704 5B30 BDBC 00DBC 1152 S R3,=F'5' decrement rest length
000708 4720 B610 00610 1153 BH PARMPH1L if >0 check next option
1154 *
00070C 58E0 B744 00744 1155 PARMPH1E L R14,PARMPHXL
PAGE 23
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000710 07FE 1156 BR R14
1157 *
1158 * bad PARM abort handling
1159 *
000712 5810 B58C 0058C 1160 PARMABOD L R1,MSGPDIG
000716 47F0 B726 00726 1161 B PARMABO1
00071A 5810 B590 00590 1162 PARMABOT L R1,MSGPTST
00071E 47F0 B726 00726 1163 B PARMABO1
1164 *
000722 5810 B588 00588 1165 PARMABO L R1,MSGPBAD
000726 45E0 BAB2 00AB2 1166 PARMABO1 BAL R14,OTEXT print error message
00072A 1813 1167 LR R1,R3 get rest length
00072C 8910 0018 00018 1168 SLL R1,24 put length into bits 0-7
000730 1612 1169 OR R1,R2 and rest address into bits 8-31
000732 45E0 BAB2 00AB2 1170 BAL R14,OTEXT print rest of PARM
000736 45E0 BAE0 00AE0 1171 BAL R14,OPUTLINE write line
00073A 9210 B4A3 004A3 1172 MVI RC+3,X'10'
00073E 47F0 B3F4 003F4 1173 B EXIT quit with RC=16
1174 *
000744 1175 PARMPHXL DS 1F R14 save area (for PARMPH*,CNFRD)
1176 *
1177 * --------------------------------------------------------------------
1178 * PARMPH2: handle PARMs, phase 2, handle /Tnnn /Dnnn /Ennn ===========
1179 * R2 PARM address
1180 * R3 PARM length
1181 *
000748 50E0 B744 00744 1182 PARMPH2 ST R14,PARMPHXL
1183 *
00074C 5820 B4A4 004A4 1184 L R2,ARGPTR get argument list pointer
000750 5822 0000 00000 1185 L R2,0(R2) load PARM base address
000754 4832 0000 00000 1186 LH R3,0(R2) load PARM length
000758 1233 1187 LTR R3,R3 test length
00075A 4780 B820 00820 1188 BZ PARMPH2E if =0 no PARM specified
1189 *
00075E 4122 0002 00002 1190 LA R2,2(R2) R2 points to 1st PARM char
1191 *
1192 * loop over options ----------------------------------------
1193 *
00762 1194 PARMPH2L EQU * no checks, all done in PARMPH1
1195 *
1196 * handle /Tnnn, /Dnnn, /Ennn -----------
1197 * R4 ptr to current TDSCTBL entry
1198 * R5 current TDSC
1199 * R6 current tag text descriptor
1200 * R7 current option (as Tnnn)
1201 * R8 disable flag (0 if /Dnnn, 1 if /Ennn or /Tnnn)
1202 * R9 current tag text (with wildcards injected)
1203 * R10 count of matched tags
1204 *
000762 5872 0001 00001 1205 L R7,1(R2) load all 4 option bytes
000766 5970 B544 00544 1206 C R7,FTBLTCOR+4 is it a /TCOR
00076A 4780 B814 00814 1207 BE PARMPH2N if = yes, skip
1208 *
00076E 4180 0001 00001 1209 LA R8,1 set disable flag
000772 95C4 2001 00001 1210 CLI 1(R2),C'D' is it /D ?
PAGE 24
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000776 4780 B7AE 007AE 1211 BE OPTTDISE if = yes, proceed
00077A 1788 1212 XR R8,R8 clear disable flag
00077C 95C5 2001 00001 1213 CLI 1(R2),C'E' is it /E ?
000780 4780 B7AE 007AE 1214 BE OPTTDISE if = yes, proceed
1215 *
000784 95E3 2001 00001 1216 CLI 1(R2),C'T' is it /T ?
000788 4770 B814 00814 1217 BNE PARMPH2N if != try next
00078C 9500 B550 00550 1218 CLI TDSCDIS,X'00' TDSC disable already done ?
000790 4770 B7AE 007AE 1219 BNE OPTTDISE if != yes, skip over disable loop
1220 *
000794 9201 B550 00550 1221 MVI TDSCDIS,X'01' set disable done flag
000798 5840 BD94 00D94 1222 L R4,=A(TDSCTBL) get head of TDSCTBL
00079C 5854 0000 00000 1223 OPTTDISL L R5,0(R4) get next TDSC
0007A0 9601 4000 00000 1224 OI 0(R4),X'01' set disable flag bit
0007A4 4144 0004 00004 1225 LA R4,4(R4) push pointer to next TDSC
0007A8 1255 1226 LTR R5,R5 end tag X'80000000' seen ?
0007AA 47B0 B79C 0079C 1227 BNL OPTTDISL if >= not, keep going
1228 *
0007AE BF78 B551 00551 1229 OPTTDISE ICM R7,B'1000',CHART force leading byte to 'T'
1230 *
0007B2 17AA 1231 XR R10,R10 clear match count
0007B4 5840 BD94 00D94 1232 L R4,=A(TDSCTBL) get head of TDSCTBL
0007B8 5854 0000 00000 1233 OPTTENAL L R5,0(R4) get next TDSC
00000 1234 USING TDSC,R5 declare TDSC base register
0007BC 5860 5014 00014 1235 L R6,TTAGDSC get tag text descriptor
0007C0 5896 0000 00000 1236 L R9,0(R6) load tag text
1237 *
0007C4 955C 2002 00002 1238 CLI 2(R2),C'*' /T*nn wildcard
0007C8 4770 B7D0 007D0 1239 BNE OPTTNOW3 if != not
0007CC BF94 B552 00552 1240 ICM R9,B'0100',CHARWC otherwise inject wildcard
0007D0 955C 2003 00003 1241 OPTTNOW3 CLI 3(R2),C'*' /Tn*n wildcard
0007D4 4770 B7DC 007DC 1242 BNE OPTTNOW2 if != not
0007D8 BF92 B552 00552 1243 ICM R9,B'0010',CHARWC otherwise inject wildcard
0007DC 955C 2004 00004 1244 OPTTNOW2 CLI 4(R2),C'*' /Tnn* wildcard
0007E0 4770 B7E8 007E8 1245 BNE OPTTNOW1 if != not
0007E4 BF91 B552 00552 1246 ICM R9,B'0001',CHARWC otherwise inject wildcard
1247 *
0007E8 1979 1248 OPTTNOW1 CR R7,R9 does Tnnn option match tag ?
0007EA 4770 B804 00804 1249 BNE OPTTENAN if != not, try next
1250 *
0007EE 41AA 0001 00001 1251 LA R10,1(R10) increment match count
0007F2 1288 1252 LTR R8,R8 test disable flag
0007F4 4770 B800 00800 1253 BNE OPTTDIS if != yes, do disable
0007F8 94FE 4000 00000 1254 NI 0(R4),X'FE' clear disable flag bit
0007FC 47F0 B804 00804 1255 B OPTTENAN and go for next tag
000800 9601 4000 00000 1256 OPTTDIS OI 0(R4),X'01' set disable flag bit
1257 *
1258 DROP R5
1259 *
000804 4144 0004 00004 1260 OPTTENAN LA R4,4(R4) push pointer to next TDSC
000808 1255 1261 LTR R5,R5 end tag X'80000000' seen ?
00080A 47B0 B7B8 007B8 1262 BNL OPTTENAL if >= not, keep going
00080E 12AA 1263 LTR R10,R10 end of table, check match count
000810 4780 B71A 0071A 1264 BE PARMABOT if =, no test found, complain
1265 *
PAGE 25
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
1266 * now handle next option ---------------
1267 *
000814 4122 0005 00005 1268 PARMPH2N LA R2,5(R2) push to next option
000818 5B30 BDBC 00DBC 1269 S R3,=F'5' decrement rest length
00081C 4720 B762 00762 1270 BH PARMPH2L if >0 check next option
1271 *
000820 58E0 B744 00744 1272 PARMPH2E L R14,PARMPHXL
000824 07FE 1273 BR R14
1274 *
1275 * --------------------------------------------------------------------
1276 * CNFRD: handle config file read =====================================
1277 * R2 new ENA state
1278 * R3 new LRCNT
1279 * R4 ptr to current TDSCTBL entry
1280 * R5 current TDSC
1281 * R6 current tag text descriptor
1282 * R7 test name
1283 * R8 address of text name
1284 *
000826 50E0 B8FC 008FC 1285 CNFRD ST R14,CNFRDL
1286 OPEN (SYSIN,INPUT) open SYSIN
00082A 0700 1287+ CNOP 0,4 ALIGN LIST TO FULLWORD 01740001
00082C 4510 B834 00834 1288+ BAL 1,*+8 LOAD REG1 W/LIST ADDR. 01780000
000830 80 1289+ DC AL1(128) OPTION BYTE 01900000
000831 0022B8 1290+ DC AL3(SYSIN) DCB ADDRESS 01920000
000834 0A13 1291+ SVC 19 ISSUE OPEN SVC 04000000
000836 12FF 1292 LTR R15,R15 test return code
000838 4770 B8F4 008F4 1293 BNE CNFRDBAD if != failed, quit
1294 *
00083C 41F0 B8E4 008E4 1295 LA R15,CNFRDE end handling address
000840 50F0 BD28 00D28 1296 ST R15,IEOFEXIT use it exit if EOF seen
000844 45E0 BCE2 00CE2 1297 CNFRDNL BAL R14,IGETLINE read input line
000848 5880 BD20 00D20 1298 L R8,ILPTR get input pointer
1299 *
00084C 957B 8000 00000 1300 CLI 0(R8),C'#' is it comnment line ?
000850 4780 B844 00844 1301 BE CNFRDNL if =, skip and try next line
1302 *
000854 9500 B54B 0054B 1303 CLI FLGOPCF,X'00' /OPCF seen ?
000858 4780 B872 00872 1304 BE OPTPCFE if = not
00085C 5810 B59C 0059C 1305 L R1,MSGCLNE
000860 45E0 BAB2 00AB2 1306 BAL R14,OTEXT print prefix
000864 1818 1307 LR R1,R8
000866 5A10 BDC0 00DC0 1308 A R1,=X'50000000' build text descriptor length=80
00086A 45E0 BAB2 00AB2 1309 BAL R14,OTEXT print input line
00086E 45E0 BAE0 00AE0 1310 BAL R14,OPUTLINE write line
1311 *
000872 5878 0000 00000 1312 OPTPCFE L R7,0(R8) get text name
000876 41F8 0004 00004 1313 LA R15,4(R8) push pointer by 4 char
00087A 50F0 BD20 00D20 1314 ST R15,ILPTR and update
00087E 45E0 BD38 00D38 1315 BAL R14,IINT05 get ENA
000882 1821 1316 LR R2,R1 R2 = ENA flag
000884 45E0 BD50 00D50 1317 BAL R14,IINT10 get LRCNT
000888 1831 1318 LR R3,R1 R3 = LRCNT
1319 *
00088A 5840 BD94 00D94 1320 L R4,=A(TDSCTBL) get head of TDSCTBL
PAGE 26
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00088E 5854 0000 00000 1321 CNFRDLOP L R5,0(R4) get next TDSC
00000 1322 USING TDSC,R5 declare TDSC base register
000892 5860 5014 00014 1323 L R6,TTAGDSC get tag text descriptor
000896 5976 0000 00000 1324 C R7,0(R6) does Tnnn option match tag ?
00089A 4770 B8BA 008BA 1325 BNE CNFRDNXT if != not, try next
1326 *
00089E 94FE 4000 00000 1327 NI 0(R4),X'FE' clear disable flag bit
0008A2 1222 1328 LTR R2,R2 test enable flag
0008A4 4770 B8AC 008AC 1329 BNE CNFRDENA if !=, keep enabled
0008A8 9601 4000 00000 1330 OI 0(R4),X'01' otherwise set disable flag bit
1331 *
0008AC 1233 1332 CNFRDENA LTR R3,R3 test new LRCNT
0008AE 4780 B844 00844 1333 BE CNFRDNL if =, don't update
0008B2 5030 5008 00008 1334 ST R3,TLRCNT update LRCNT
0008B6 47F0 B844 00844 1335 B CNFRDNL line done, go for next line
1336 DROP R5
1337 *
0008BA 4144 0004 00004 1338 CNFRDNXT LA R4,4(R4) push pointer to next TDSC
0008BE 1255 1339 LTR R5,R5 end tag X'80000000' seen ?
0008C0 47B0 B88E 0088E 1340 BNL CNFRDLOP if >= not, keep going
1341 *
0008C4 5810 B598 00598 1342 L R1,MSGCBAD
0008C8 45E0 BAB2 00AB2 1343 BAL R14,OTEXT print error message
0008CC 1818 1344 LR R1,R8 get test name address
0008CE 5A10 BDC4 00DC4 1345 A R1,=X'04000000' build text descriptor length=4
0008D2 45E0 BAB2 00AB2 1346 BAL R14,OTEXT print test name
0008D6 45E0 BAE0 00AE0 1347 BAL R14,OPUTLINE write line
0008DA 9214 B4A3 004A3 1348 MVI RC+3,X'14'
0008DE 47F0 B3F4 003F4 1349 B EXIT quit with RC=20
1350 *
1351 CNFRDE CLOSE SYSIN close SYSIN
0008E2 0700 1352+ CNOP 0,4 ALIGN LIST TO FULLWORD 02420002
0008E4 4510 B8EC 008EC 1353+CNFRDE BAL 1,*+8 LOAD REG1 W/LIST ADDR 02460002
0008E8 80 1354+ DC AL1(128) OPTION BYTE 02580000
0008E9 0022B8 1355+ DC AL3(SYSIN) DCB ADDRESS 02600000
0008EC 0A14 1356+ SVC 20 ISSUE CLOSE SVC 01640000
0008EE 58E0 B8FC 008FC 1357 L R14,CNFRDL
0008F2 07FE 1358 BR R14
1359 *
0008F4 9208 B4A3 004A3 1360 CNFRDBAD MVI RC+3,X'08' handle OPEN error
0008F8 47F0 B3F4 003F4 1361 B EXIT quit with RC=8
1362 *
0008FC 1363 CNFRDL DS 1F save area for R14 (return linkage)
1364 *
1365 * --------------------------------------------------------------------
1366 * DOTEST: helper to execute test inner loop with timing ==============
1367 * R3 holds pointer to TDSC
1368 * called with BAL R10,DOTEST
1369 *
00900 1370 DOTEST EQU *
00000 1371 USING TDSC,R3 declare TDSC base register
000900 5860 B4B0 004B0 1372 L R6,PCBUF copy destination is code buffer
000904 5870 3004 00004 1373 L R7,TLENGTH copy length
000908 5880 3000 00000 1374 L R8,TENTRY copy source is code
00090C 1897 1375 LR R9,R7 copy length
PAGE 27
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
1376 *
00090E 5570 BDC8 00DC8 1377 CL R7,=A(CBUFSIZE) does code fit in buffer ?
000912 47D0 B91C 0091C 1378 BNH DOTESTOK if <= ok, doit
1379 ABEND 10 otherwise abend
000916 1380+ DS 0H 00400002
000916 4110 000A 0000A 1381+ LA 1,10 LOAD PARAMETER REG 1 01900002
00091A 0A0D 1382+ SVC 13 LINK TO ABEND ROUTINE 02050002
0091C 1383 DOTESTOK EQU *
1384 *
00091C 1856 1385 LR R5,R6 entry point (default is relocated)
00091E 9500 B54D 0054D 1386 CLI FLGORIP,X'00' /ORIP seen ?
000922 4780 B928 00928 1387 BE NOOPTRIP if = not
000926 1858 1388 LR R5,R8 use non-relocated code
00928 1389 NOOPTRIP EQU *
1390 *
000928 0E68 1391 MVCL R6,R8 relocate code
00092A B205 B4C8 004C8 1392 STCK TCKBEG get start time
1393 *
00092E 5840 B4A8 004A8 1394 L R4,GMUL inner GMUL loop
00932 1395 ILOOP EQU *
000932 1813 1396 LR R1,R3 load R1 := current TDSC
000934 18F5 1397 LR R15,R5 load entry point
000936 05EF 1398 BALR R14,R15 and execute
000938 4640 B932 00932 1399 BCT R4,ILOOP
1400 *
00093C B205 B4D0 004D0 1401 STCK TCKEND get end time
1402 DROP R3
1403 *
000940 07FA 1404 BR R10
1405 *
1406 * --------------------------------------------------------------------
1407 * CNVCK2D: convert clock to double ===================================
1408 * input: R1 is pointer to STCK value
1409 * output: FR0 is STCK value as double in 1/16 of usec
1410 *
000942 5801 0000 00000 1411 CNVCK2D L R0,0(R1)
000946 5811 0004 00004 1412 L R1,4(R1)
00094A 8C00 0008 00008 1413 SRDL R0,8 get space for exponent
00094E 5400 BDB8 00DB8 1414 N R0,=X'00FFFFFF'
000952 5600 BDCC 00DCC 1415 O R0,=X'4E000000' now proper double
000956 9001 B968 00968 1416 STM R0,R1,CNVTMP
00095A 2B00 1417 SDR FR0,FR0 clear FR0
00095C 6A00 B968 00968 1418 AD FR0,CNVTMP get a normalized number
000960 07FE 1419 BR R14
1420 *
000968 1421 CNVTMP DS D
1422 *
1423 * --------------------------------------------------------------------
1424 * CNVF2D: convert fullword to double =================================
1425 * input: R1 value to be converted
1426 * output: FR0 value or R1 as double
1427 *
000970 5010 B96C 0096C 1428 CNVF2D ST R1,CNVTMP+4 store integer in lsb part
000974 5800 BB60 00B60 1429 L R0,ODNZERO
000978 5000 B968 00968 1430 ST R0,CNVTMP store de-normal zero in msb part
PAGE 28
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00097C 2B00 1431 SDR FR0,FR0 clear register
00097E 6A00 B968 00968 1432 AD FR0,CNVTMP this re-normalizes
000982 07FE 1433 BR R14
1434 *
1435 * --------------------------------------------------------------------
1436 * TRCSTP: trace test startup =========================================
1437 *
1438 *
000984 50E0 B9D8 009D8 1439 TRCSTP ST R14,TRCSTPL
00000 1440 USING TDSC,R3 declare TDSC base register
1441 *
000988 5810 B5C0 005C0 1442 L R1,MSGDBG
00098C 45E0 BAB2 00AB2 1443 BAL R14,OTEXT print debug prefix
000990 5810 3014 00014 1444 L R1,TTAGDSC
000994 45E0 BAB2 00AB2 1445 BAL R14,OTEXT print tag
000998 45E0 BA7C 00A7C 1446 BAL R14,OSKIP02 add space
00099C 5810 3018 00018 1447 L R1,TTXTDSC
0009A0 45E0 BAB2 00AB2 1448 BAL R14,OTEXT print description
0009A4 4110 0022 00022 1449 LA R1,34
0009A8 45E0 BA8A 00A8A 1450 BAL R14,OTAB goto tab stop
0009AC 5810 3000 00000 1451 L R1,TENTRY
0009B0 45E0 BBDC 00BDC 1452 BAL R14,OHEX10 print entry address
0009B4 5810 3008 00008 1453 L R1,TLRCNT
0009B8 45E0 BB70 00B70 1454 BAL R14,OINT10 print LRCNT
0009BC 5810 300C 0000C 1455 L R1,TIGCNT
0009C0 45E0 BBA8 00BA8 1456 BAL R14,OINT04 print IGCNT
0009C4 5810 3010 00010 1457 L R1,TLTYPE
0009C8 45E0 BBA8 00BA8 1458 BAL R14,OINT04 print LTYPE
0009CC 45E0 BAE0 00AE0 1459 BAL R14,OPUTLINE write line
1460 *
1461 DROP R3
0009D0 58E0 B9D8 009D8 1462 L R14,TRCSTPL
0009D4 07FE 1463 BR R14
1464 *
0009D8 1465 TRCSTPL DS 1F save area for R14 (return linkage)
1466 *
1467 * --------------------------------------------------------------------
1468 * TRCRES: trace test step results ====================================
1469 *
0009DC 50E0 BA78 00A78 1470 TRCRES ST R14,TRCRESL
1471 *
0009E0 5810 B5C4 005C4 1472 L R1,MSGBEG
0009E4 45E0 BAB2 00AB2 1473 BAL R14,OTEXT print debug prefix
0009E8 4110 B4C8 004C8 1474 LA R1,TCKBEG
0009EC 45E0 BC20 00C20 1475 BAL R14,OHEX210 print start time raw in hex
0009F0 5810 B5BC 005BC 1476 L R1,MSGCSEP
0009F4 45E0 BAB2 00AB2 1477 BAL R14,OTEXT print " : "
0009F8 4110 B4D8 004D8 1478 LA R1,TBEG
0009FC 45E0 BC20 00C20 1479 BAL R14,OHEX210 print start time double in hex
000A00 45E0 BAE0 00AE0 1480 BAL R14,OPUTLINE write line
1481 *
000A04 5810 B5C8 005C8 1482 L R1,MSGEND
000A08 45E0 BAB2 00AB2 1483 BAL R14,OTEXT print debug prefix
000A0C 4110 B4D0 004D0 1484 LA R1,TCKEND
000A10 45E0 BC20 00C20 1485 BAL R14,OHEX210 print end time raw in hex
PAGE 29
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000A14 5810 B5BC 005BC 1486 L R1,MSGCSEP
000A18 45E0 BAB2 00AB2 1487 BAL R14,OTEXT print " : "
000A1C 4110 B4E0 004E0 1488 LA R1,TEND
000A20 45E0 BC20 00C20 1489 BAL R14,OHEX210 print end time double in hex
000A24 45E0 BAE0 00AE0 1490 BAL R14,OPUTLINE write line
1491 *
000A28 5810 B5CC 005CC 1492 L R1,MSGDIF
000A2C 45E0 BAB2 00AB2 1493 BAL R14,OTEXT print debug prefix
000A30 4110 B4E8 004E8 1494 LA R1,TDIF
000A34 45E0 BC20 00C20 1495 BAL R14,OHEX210 print test time double in hex
000A38 5810 B5BC 005BC 1496 L R1,MSGCSEP
000A3C 45E0 BAB2 00AB2 1497 BAL R14,OTEXT print " : "
000A40 6800 B4E8 004E8 1498 LD FR0,TDIF
000A44 45E0 BC5C 00C5C 1499 BAL R14,OFIX1306 print test time
000A48 45E0 BAE0 00AE0 1500 BAL R14,OPUTLINE write line
1501 *
000A4C 5810 B5D0 005D0 1502 L R1,MSGINS
000A50 45E0 BAB2 00AB2 1503 BAL R14,OTEXT print debug prefix
000A54 4110 B4F0 004F0 1504 LA R1,TINS
000A58 45E0 BC20 00C20 1505 BAL R14,OHEX210 print instruction time double in hex
000A5C 5810 B5BC 005BC 1506 L R1,MSGCSEP
000A60 45E0 BAB2 00AB2 1507 BAL R14,OTEXT print " : "
000A64 6800 B4F0 004F0 1508 LD FR0,TINS
000A68 45E0 BC5C 00C5C 1509 BAL R14,OFIX1306 print instruction time
000A6C 45E0 BAE0 00AE0 1510 BAL R14,OPUTLINE write line
1511 *
000A70 58E0 BA78 00A78 1512 L R14,TRCRESL
000A74 07FE 1513 BR R14
1514 *
000A78 1515 TRCRESL DS 1F save area for R14 (return linkage)
1516 *
1517 * ---------------------------------------------------------------------
1518 * include simple output system ----------------------------------------
1519 *
1520 * simple output system procedures -------------------------------------
1521 * calling and register convention:
1522 * R1 holds value (or descriptor pointer)
1523 * R0,R1 may be modified
1524 * R14,R15 may be modified
1525 * R2-R11 are not changed
1526 *
1527 * in short
1528 * R1 holds input or output value (or pointer)
1529 * call with BAL R14,<routine>
1530 *
1531 * OSKIP02 --------------------------------------------------
1532 * add 2 blanks
1533 *
000A7C 4110 0002 00002 1534 OSKIP02 LA R1,2
1535 *
1536 * OSKIP ----------------------------------------------------
1537 * add blanks, count in R1
1538 *
000A80 5A10 BB44 00B44 1539 OSKIP A R1,OLPTR new edit position
000A84 5010 BB44 00B44 1540 ST R1,OLPTR store pointer
PAGE 30
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000A88 07FE 1541 BR R14
1542 *
1543 * OTAB ----------------------------------------------------
1544 * set output column, position in R1
1545 *
000A8A 5A10 BDD0 00DD0 1546 OTAB A R1,=A(OLBUF+1) new edit position
000A8E 5010 BB44 00B44 1547 ST R1,OLPTR store pointer
000A92 07FE 1548 BR R14
1549 *
1550 * OSFILL ---------------------------------------------------
1551 * add " ***" pattern, total length in R1
1552 *
000A94 58F0 BB44 00B44 1553 OSFILL L R15,OLPTR R15 points to edit position
000A98 9240 F000 00000 1554 MVI 0(R15),C' ' initial blank
000A9C 47F0 BAA4 00AA4 1555 B OSFILLN
000AA0 925C F000 00000 1556 OSFILLL MVI 0(R15),C'*' further '*'
000AA4 41FF 0001 00001 1557 OSFILLN LA R15,1(R15)
000AA8 4610 BAA0 00AA0 1558 BCT R1,OSFILLL
000AAC 50F0 BB44 00B44 1559 ST R15,OLPTR store pointer
000AB0 07FE 1560 BR R14
1561 *
1562 * OTEXT ----------------------------------------------------
1563 * print text, R1 hold descriptor address
1564 * descriptor format
1565 * DC AL1(<length of string>)
1566 * DC AL2(<address of string>)
1567 *
000AB2 50E0 BADC 00ADC 1568 OTEXT ST R14,OTEXTL save R14
000AB6 18E1 1569 LR R14,R1
000AB8 88E0 0018 00018 1570 SRL R14,24 R14 now string length
000ABC 58F0 BB44 00B44 1571 L R15,OLPTR R15 points to edit position
000AC0 180F 1572 LR R0,R15 R0 too
000AC2 1A0E 1573 AR R0,R14 push pointer, add length
000AC4 5000 BB44 00B44 1574 ST R0,OLPTR store pointer
000AC8 06E0 1575 BCTR R14,0 decrement length for EX
000ACA 44E0 BAD4 00AD4 1576 EX R14,OTEXTMVC copy string via EX:MVC
000ACE 58E0 BADC 00ADC 1577 L R14,OTEXTL restore R14 linkage
000AD2 07FE 1578 BR R14
1579 *
000AD4 D200 F000 1000 00000 00000 1580 OTEXTMVC MVC 0(1,R15),0(R1) length via EX, dst R15, src R1
000ADC 1581 OTEXTL DS F save area for R14 (return linkage)
1582 *
1583 * OPUTLINE -------------------------------------------------
1584 * write line to SYSPRINT
1585 *
000AE0 50E0 BB40 00B40 1586 OPUTLINE ST R14,OPUTLNEL save R14
000AE4 58F0 BDD4 00DD4 1587 L R15,=A(OLBUF)
000AE8 9500 F085 00085 1588 CLI 133(R15),X'00' check fence byte
000AEC 4770 BB3A 00B3A 1589 BNE OPUTLNEA crash if fence blown
000AF0 5810 BDD8 00DD8 1590 L R1,=A(SYSPRINT) R1 point to DCB
000AF4 180F 1591 LR R0,R15 R1 point to buffer
1592 PUT (1),(0) write line
000AF6 58F0 1030 00030 1593+ L 15,48(0,1) LOAD PUT ROUTINE ADDR 00550000
000AFA 05EF 1594+ BALR 14,15 LINK TO PUT ROUTINE 00600000
000AFC 58F0 BDD4 00DD4 1595 L R15,=A(OLBUF) point to CC of OLBUF
PAGE 31
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000B00 9240 F000 00000 1596 MVI 0(R15),C' ' blank OLBUF(0)
000B04 D283 F001 F000 00001 00000 1597 MVC 1(L'OLBUF-1,R15),0(R15) propagate blank
000B0A 41FF 0001 00001 1598 LA R15,1(R15) point to 1st print char in OLBUF
000B0E 50F0 BB44 00B44 1599 ST R15,OLPTR reset current position pointer
000B12 41F0 0001 00001 1600 LA R15,1
000B16 4AF0 BB48 00B48 1601 AH R15,OLCNT increment line counter
000B1A 40F0 BB48 00B48 1602 STH R15,OLCNT
000B1E 4BF0 BB4A 00B4A 1603 SH R15,OLMAX R15 := OLCNT-OLMAX
000B22 4740 BB34 00B34 1604 BL OPUTLNES if < no new page
000B26 17FF 1605 XR R15,R15 R15 := 0
000B28 40F0 BB48 00B48 1606 STH R15,OLCNT clear line counter
000B2C 58F0 BDD4 00DD4 1607 L R15,=A(OLBUF) point to CC of OLBUF
000B30 92F1 F000 00000 1608 MVI 0(R15),C'1' set new page CC in OLBUF
000B34 58E0 BB40 00B40 1609 OPUTLNES L R14,OPUTLNEL restore R14 linkage
000B38 07FE 1610 BR R14
1611 *
1612 OPUTLNEA ABEND 255 abend in case of errors
000B3A 1613+OPUTLNEA DS 0H 00400002
000B3A 4110 00FF 000FF 1614+ LA 1,255 LOAD PARAMETER REG 1 01900002
000B3E 0A0D 1615+ SVC 13 LINK TO ABEND ROUTINE 02050002
1616 *
000B40 1617 OPUTLNEL DS F save area for R14 (return linkage)
1618 *
1619 * Work area for simple output system ------------------------
1620 *
000B44 00002231 1621 OLPTR DC A(OLBUF+1) current output line position
000B48 0000 1622 OLCNT DC H'0' line counter
000B4A 003C 1623 OLMAX DC H'60' lines per page
000B50 1624 OCVD DS D buffer for CVD (8 byte, DW aligned)
1625 *
000B58 1626 ODTEMP DS D double buffer for conversions
000B60 4E00000000000000 1627 ODNZERO DC X'4E000000',X'00000000' denormalized double zero
000B68 4E00000000000001 1628 ODNONE DC X'4E000000',X'00000001' denormalized double one
1629 *
1630 * DCB and OLBUF in separate CSECT
1631 *
0021D0 1632 SIOSDATA CSECT
0021D0 1633 DS 0F
1634 SYSPRINT DCB DSORG=PS,MACRF=PM,DDNAME=SYSPRINT, X
RECFM=FBA,LRECL=133,BLKSIZE=0
1636+* DATA CONTROL BLOCK 22770000
1637+* 22860000
0021D0 1638+SYSPRINT DC 0F'0' ORIGIN ON WORD BOUNDARY 22914000
1640+* DIRECT ACCESS DEVICE INTERFACE 27360000
0021D0 0000000000000000 1642+ DC BL16'0' FDAD,DVTBL 27540000
0021E0 00000000 1643+ DC A(0) KEYLE,DEVT,TRBAL 27720000
1645+* COMMON ACCESS METHOD INTERFACE 48690000
0021E4 00 1647+ DC AL1(0) BUFNO 49050000
0021E5 000001 1648+ DC AL3(1) BUFCB 54720000
PAGE 32
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0021E8 0000 1649+ DC AL2(0) BUFL 55170000
0021EA 4000 1650+ DC BL2'0100000000000000' *55800000
+ DSORG 55890000
0021EC 00000001 1651+ DC A(1) IOBAD 56340000
1653+* FOUNDATION EXTENSION 56610000
0021F0 00 1655+ DC BL1'00000000' BFTEK,BFLN,HIARCHY 59850000
0021F1 000001 1656+ DC AL3(1) EODAD 65970000
0021F4 94 1657+ DC BL1'10010100' *66150000
+ RECFM 66240000
0021F5 000000 1658+ DC AL3(0) EXLST 66330000
1660+* FOUNDATION BLOCK 66690000
0021F8 E2E8E2D7D9C9D5E3 1662+ DC CL8'SYSPRINT' DDNAME 66870000
002200 02 1663+ DC BL1'00000010' OFLGS 68220000
002201 00 1664+ DC BL1'00000000' IFLG 68310000
002202 0050 1665+ DC BL2'0000000001010000' *68400000
+ *68490000
+ MACR 68580000
1667+* BSAM-BPAM-QSAM INTERFACE 74430000
002204 00 1669+ DC BL1'00000000' *74610000
+ RER1 74700000
002205 000001 1670+ DC AL3(1) CHECK, GERR, PERR 74790000
002208 00000001 1671+ DC A(1) SYNAD 74880000
00220C 0000 1672+ DC H'0' CIND1, CIND2 74970000
00220E 0000 1673+ DC AL2(0) BLKSIZE 75240000
002210 00000000 1674+ DC F'0' WCPO, WCPL, OFFSR, OFFSW 75870000
002214 00000001 1675+ DC A(1) IOBA 75960000
002218 00 1676+ DC AL1(0) NCP 76050000
002219 000001 1677+ DC AL3(1) EOBR, EOBAD 76140000
1679+* QSAM INTERFACE 81450000
00221C 00000001 1681+ DC A(1) RECAD 81630000
002220 0000 1682+ DC H'0' QSWS 81810000
002222 0085 1683+ DC AL2(133) LRECL 80730000
002224 00 1684+ DC BL1'00000000' EROPT 82530000
002225 000001 1685+ DC AL3(1) CNTRL 82620000
002228 00000000 1686+ DC F'0' PRECL 82710000
00222C 00000001 1687+ DC A(1) EOB 82800000
002230 4040404040404040 1688 OLBUF DC CL133' ',X'00' output line buffer and fence byte
1689 *
000B70 1690 MAIN CSECT
1691 *
1692 * OINT10 ---------------------------------------------------
1693 * print integer, like PL/I F(10) or C %10d format
1694 * very fast, for non-negative numbers only !
1695 *
000B70 5510 BDDC 00DDC 1696 OINT10 CL R1,=F'999999999' too large ?
000B74 4720 BB96 00B96 1697 BH OINT10F if > yes, do OSFILL
000B78 4E10 BB50 00B50 1698 CVD R1,OCVD convert
PAGE 33
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000B7C 58F0 BB44 00B44 1699 L R15,OLPTR R15 points to edit position
000B80 D209 F000 BB9E 00000 00B9E 1700 MVC 0(OEI10L,R15),OEI10 setup pattern
000B86 DE09 F000 BB53 00000 00B53 1701 ED 0(OEI10L,R15),OCVD+3 and edit
000B8C 41FF 000A 0000A 1702 LA R15,OEI10L(R15) push pointer
000B90 50F0 BB44 00B44 1703 ST R15,OLPTR store pointer
000B94 07FE 1704 BR R14
1705 *
000B96 4110 000A 0000A 1706 OINT10F LA R1,10
000B9A 47F0 BA94 00A94 1707 B OSFILL
1708 *
000B9E 4020202020202020 1709 OEI10 DC C' ',7X'20',X'21',X'20' pat: bddddddd(d
0000A 1710 OEI10L EQU *-OEI10
1711 *
1712 * OINT04 ---------------------------------------------------
1713 * print integer, like PL/I F(4) or C %4d format
1714 * very fast, for non-negative numbers only !
1715 *
000BA8 41F0 03E7 003E7 1716 OINT04 LA R15,999
000BAC 151F 1717 CLR R1,R15 too large ?
000BAE 4720 BBD0 00BD0 1718 BH OINT04F if > yes, do OSFILL
000BB2 4E10 BB50 00B50 1719 CVD R1,OCVD convert
000BB6 58F0 BB44 00B44 1720 L R15,OLPTR R15 points to edit position
000BBA D203 F000 BBD8 00000 00BD8 1721 MVC 0(OEI04L,R15),OEI04 setup pattern
000BC0 DE03 F000 BB56 00000 00B56 1722 ED 0(OEI04L,R15),OCVD+6 and edit
000BC6 41FF 0004 00004 1723 LA R15,OEI04L(R15) push pointer
000BCA 50F0 BB44 00B44 1724 ST R15,OLPTR store pointer
000BCE 07FE 1725 BR R14
1726 *
000BD0 4110 0004 00004 1727 OINT04F LA R1,4
000BD4 47F0 BA94 00A94 1728 B OSFILL
1729 *
000BD8 40202120 1730 OEI04 DC C' ',X'20',X'21',X'20' ED pattern: bd(d
00004 1731 OEI04L EQU *-OEI04
1732 *
1733 * OHEX10 ---------------------------------------------------
1734 * print integer, like C " %8.8x" format
1735 *
000BDC 50E0 BC1C 00C1C 1736 OHEX10 ST R14,OHEX10L save R14
000BE0 58F0 BB44 00B44 1737 L R15,OLPTR R15 points to edit position
000BE4 41FF 0002 00002 1738 LA R15,2(R15) add two blanks
000BE8 41EF 0008 00008 1739 LA R14,8(R15) end of buffer
1740 *
000BEC 1700 1741 OHEX10NL XR R0,R0 R0 := 0
000BEE 8F00 0004 00004 1742 SLDA R0,4 get next 4 bits into R0
000BF2 4A00 BDE8 00DE8 1743 AH R0,=X'00F0' add '0'
000BF6 4900 BDEA 00DEA 1744 CH R0,=X'00F9' above 9 ?
000BFA 47D0 BC02 00C02 1745 BNH OHEX10OK if <= no, skip A-F correction
000BFE 4B00 BDEC 00DEC 1746 SH R0,=X'0039' sub (0xF0('0')+10)-0xC1('A')=0x39
000C02 420F 0000 00000 1747 OHEX10OK STC R0,0(R15) store hex digit
000C06 41FF 0001 00001 1748 LA R15,1(R15) push pointer
000C0A 19FE 1749 CR R15,R14 beyond end ?
000C0C 4740 BBEC 00BEC 1750 BL OHEX10NL if < not, do next nibble
1751 *
000C10 50F0 BB44 00B44 1752 ST R15,OLPTR store pointer
000C14 58E0 BC1C 00C1C 1753 L R14,OHEX10L restore R14 linkage
PAGE 34
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000C18 07FE 1754 BR R14
1755 *
000C1C 1756 OHEX10L DS F save area for R14 (return linkage)
1757 *
1758 * OHEX210 --------------------------------------------------
1759 * print 64 field as two 32 bit hex numbers
1760 * R1 points to memory location of 64 bit value
1761 * rendered as " %8.8x %8.8x"
1762 *
000C20 50E0 BC44 00C44 1763 OHEX210 ST R14,OHEX210L save R14
000C24 5010 BC48 00C48 1764 ST R1,OHEX210V save R1
000C28 5811 0000 00000 1765 L R1,0(R1) get high part
000C2C 45E0 BBDC 00BDC 1766 BAL R14,OHEX10 convert
000C30 5810 BC48 00C48 1767 L R1,OHEX210V
000C34 5811 0004 00004 1768 L R1,4(R1) get low part
000C38 45E0 BBDC 00BDC 1769 BAL R14,OHEX10 convert
000C3C 58E0 BC44 00C44 1770 L R14,OHEX210L restore R14 linkage
000C40 07FE 1771 BR R14 and return
1772 *
000C44 1773 OHEX210L DS F save area for R14 (return linkage)
000C48 1774 OHEX210V DS F save area for R1 (value ptr)
1775 *
1776 * OFIX1308, OFIX1306 - -------------------------------------
1777 * print double, like
1778 * OFIX1308: PL/I F(13,8) or C %13.8f format
1779 * OFIX1306: PL/I F(13,6) or C %13.6f format
1780 * input value in floating reg FR0
1781 * handles signed numbers
1782 *
000C4C 6C00 BD78 00D78 1783 OFIX1308 MD FR0,=D'1.E8' 'shift' 8 digits left
000C50 4110 BCD5 00CD5 1784 LA R1,OEF1308 pointer to edit pattern
000C54 4100 0003 00003 1785 LA R0,3 offset to one behind X'21' position
000C58 47F0 BC68 00C68 1786 B OFIX13XX
1787 *
000C5C 6C00 BD70 00D70 1788 OFIX1306 MD FR0,=D'1.E6' 'shift' 6 digits left
000C60 4110 BCC8 00CC8 1789 LA R1,OEF1306 pointer to edit pattern
000C64 4100 0005 00005 1790 LA R0,5 offset to one behind X'21' position
1791 *
000C68 2020 1792 OFIX13XX LPDR FR2,FR0 get abbs() value
000C6A 6920 BD80 00D80 1793 CD FR2,=D'2.E9' too large ?
000C6E 47B0 BCC0 00CC0 1794 BNL OFX13XXF if >= yes, do OSFILL
1795 *
000C72 2842 1796 LDR FR4,FR2
000C74 6E40 BB60 00B60 1797 AW FR4,ODNZERO FR4 := de-normalized FR2
000C78 2B66 1798 SDR FR6,FR6 FR6 := 0.
000C7A 2A64 1799 ADR FR6,FR4 get integer part
000C7C 2B24 1800 SDR FR2,FR4 get fractional part
000C7E 6920 BD88 00D88 1801 CD FR2,=D'0.5' check if >= 0.5
000C82 4740 BC8A 00C8A 1802 BL OFX13XXR if < no need to round up
000C86 6E40 BB68 00B68 1803 AW FR4,ODNONE otherwise add LSB DENORM
000C8A 6040 BB58 00B58 1804 OFX13XXR STD FR4,ODTEMP roll-out to memory
000C8E 58F0 BB5C 00B5C 1805 L R15,ODTEMP+4 get integer part
000C92 4EF0 BB50 00B50 1806 CVD R15,OCVD convert
000C96 58F0 BB44 00B44 1807 L R15,OLPTR R15 points to edit position
000C9A D20C F000 1000 00000 00000 1808 MVC 0(OEF13XXL,R15),0(R1) setup pattern
PAGE 35
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000CA0 181F 1809 LR R1,R15 setup R1 in case of miss
000CA2 1A10 1810 AR R1,R0 to one behind X'21' position
000CA4 DF0C F000 BB52 00000 00B52 1811 EDMK 0(OEF13XXL,R15),OCVD+2 and edit (and set R1)
000CAA 2200 1812 LTDR FR0,FR0 negative number ?
000CAC 47B0 BCB6 00CB6 1813 BNM OFX13XXP if >= not
000CB0 0610 1814 BCTR R1,0 decrement pointer
000CB2 9260 1000 00000 1815 MVI 0(R1),C'-' write '-' sign
000CB6 41FF 000D 0000D 1816 OFX13XXP LA R15,OEF13XXL(R15) push pointer
000CBA 50F0 BB44 00B44 1817 ST R15,OLPTR store pointer
000CBE 07FE 1818 BR R14
1819 *
000CC0 4110 000D 0000D 1820 OFX13XXF LA R1,OEF13XXL
000CC4 47F0 BA94 00A94 1821 B OSFILL
1822 *
000CC8 4020202021204B20 1823 OEF1306 DC C' ',3X'20',X'21',X'20',C'.',6X'20' pat: bddd(d.dddddd
000CD5 402021204B202020 1824 OEF1308 DC C' ',1X'20',X'21',X'20',C'.',8X'20' pat: bd(d.dddddddd
0000D 1825 OEF13XXL EQU *-OEF1308
1827 * include simple input system -----------------------------------------
1828 *
1829 * simple input system procedures --------------------------------------
1830 * calling and register convention:
1831 * R1 holds value (or descriptor pointer)
1832 * R0,R1 may be modified
1833 * R14,R15 may be modified
1834 * R2-R11 are not changed
1835 *
1836 * in short
1837 * R1 holds input or output value (or pointer)
1838 * call with BAL R14,<routine>
1839 *
1840 * IGETLINE -------------------------------------------------
1841 * read line from SYSIN
1842 * EOF handling:
1843 * - IEOFOK holds the 'EOF OK' flag
1844 * - if EOF seen and IEOFOK = X'00', program ends with RC=8
1845 * - if EOF seen and IEOFOK != X'00', program ends with RC=0
1846 *
000CE2 50E0 BD04 00D04 1847 IGETLINE ST R14,IGETLNEL save R14
000CE6 5810 BDE0 00DE0 1848 L R1,=A(SYSIN)
000CEA 5800 BDE4 00DE4 1849 L R0,=A(ILBUF)
1850 GET (1),(0) read line
000CEE 58F0 1030 00030 1851+ L 15,48(0,1) LOAD GET ROUTINE ADDR 00600000
000CF2 05EF 1852+ BALR 14,15 LINK TO GET ROUTINE 00625000
000CF4 5800 BDE4 00DE4 1853 L R0,=A(ILBUF)
000CF8 5000 BD20 00D20 1854 ST R0,ILPTR set input ptr to begin of line
000CFC 58E0 BD04 00D04 1855 L R14,IGETLNEL restore R14 linkage
000D00 07FE 1856 BR R14
1857 *
000D04 1858 IGETLNEL DS F save area for R14 (return linkage)
1859 *
1860 * IEOFHDL --------------------------------------------------
1861 * EODAD call-back routine. R2-R13 are preserved. R0,R1,R14,R15 are,
1862 * modified, with R14 holding address of calling macro. So code
1863 * executes in the same environment as prior to the GET call,
PAGE 36
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
1864 * especially base registers are kept.
1865 *
000D08 58F0 BD28 00D28 1866 IEOFHDL L R15,IEOFEXIT load user exit address
000D0C 12FF 1867 LTR R15,R15 test address
000D0E 077F 1868 BNER R15 if !=, use user exit
000D10 41E0 B3F4 003F4 1869 LA R14,EXIT
000D14 9500 BD24 00D24 1870 CLI IEOFOK,X'00' is EOF ok ?
000D18 077E 1871 BNER R14 if != yes, jump to EXIT
000D1A 9208 B4A3 004A3 1872 MVI RC+3,X'08' otherwise set RC=8
000D1E 07FE 1873 BR R14 and jump to EXIT
1874 *
1875 * Work area for simple output system ------------------------
1876 *
000D20 00002318 1877 ILPTR DC A(ILBUF) current input line position
000D24 1878 IEOFOK DS X'00' EOF ok flag
000D28 1879 IEOFEXIT DS F'0' user exit address (if != 0)
000D30 1880 ICVB DS D buffer for CVB (8 byte, DW aligned)
1881 *
1882 * DCB and OLBUF in separate CSECT
1883 *
0022B6 1884 SIOSDATA CSECT
0022B8 1885 DS 0F
1886 SYSIN DCB DSORG=PS,MACRF=GM,DDNAME=SYSIN,EODAD=IEOFHDL X
RECFM=FB,LRECL=80,BLKSIZE=0
1888+* DATA CONTROL BLOCK 22770000
1889+* 22860000
0022B8 1890+SYSIN DC 0F'0' ORIGIN ON WORD BOUNDARY 22914000
1892+* DIRECT ACCESS DEVICE INTERFACE 27360000
0022B8 0000000000000000 1894+ DC BL16'0' FDAD,DVTBL 27540000
0022C8 00000000 1895+ DC A(0) KEYLE,DEVT,TRBAL 27720000
1897+* COMMON ACCESS METHOD INTERFACE 48690000
0022CC 00 1899+ DC AL1(0) BUFNO 49050000
0022CD 000001 1900+ DC AL3(1) BUFCB 54720000
0022D0 0000 1901+ DC AL2(0) BUFL 55170000
0022D2 4000 1902+ DC BL2'0100000000000000' *55800000
+ DSORG 55890000
0022D4 00000001 1903+ DC A(1) IOBAD 56340000
1905+* FOUNDATION EXTENSION 56610000
0022D8 00 1907+ DC BL1'00000000' BFTEK,BFLN,HIARCHY 59850000
0022D9 000D08 1908+ DC AL3(IEOFHDL) EODAD 65970000
0022DC 00 1909+ DC BL1'00000000' *66150000
+ RECFM 66240000
0022DD 000000 1910+ DC AL3(0) EXLST 66330000
1912+* FOUNDATION BLOCK 66690000
0022E0 E2E8E2C9D5404040 1914+ DC CL8'SYSIN' DDNAME 66870000
PAGE 37
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0022E8 02 1915+ DC BL1'00000010' OFLGS 68220000
0022E9 00 1916+ DC BL1'00000000' IFLG 68310000
0022EA 5000 1917+ DC BL2'0101000000000000' *68400000
+ *68490000
+ MACR 68580000
1919+* BSAM-BPAM-QSAM INTERFACE 74430000
0022EC 00 1921+ DC BL1'00000000' *74610000
+ RER1 74700000
0022ED 000001 1922+ DC AL3(1) CHECK, GERR, PERR 74790000
0022F0 00000001 1923+ DC A(1) SYNAD 74880000
0022F4 0000 1924+ DC H'0' CIND1, CIND2 74970000
0022F6 0000 1925+ DC AL2(0) BLKSIZE 75240000
0022F8 00000000 1926+ DC F'0' WCPO, WCPL, OFFSR, OFFSW 75870000
0022FC 00000001 1927+ DC A(1) IOBA 75960000
002300 00 1928+ DC AL1(0) NCP 76050000
002301 000001 1929+ DC AL3(1) EOBR, EOBAD 76140000
1931+* QSAM INTERFACE 81450000
002304 00000001 1933+ DC A(1) RECAD 81630000
002308 0000 1934+ DC H'0' QSWS 81810000
00230A 0000 1935+ DC AL2(0) LRECL 80730000
00230C 00 1936+ DC BL1'00000000' EROPT 82530000
00230D 000001 1937+ DC AL3(1) CNTRL 82620000
002310 00000000 1938+ DC F'0' PRECL 82710000
002314 00000001 1939+ DC A(1) EOB 82800000
002318 4040404040404040 1940 ILBUF DC CL80' ' input line buffer
000D38 1941 MAIN CSECT
1942 *
1943 * IINT05 ---------------------------------------------------
1944 * read integer, like PL/I F(5) or C %5d format
1945 *
000D38 58F0 BD20 00D20 1946 IINT05 L R15,ILPTR get input pointer
000D3C F274 BD30 F000 00D30 00000 1947 PACK ICVB(8),0(5,R15) pack next 5 char
000D42 4F10 BD30 00D30 1948 CVB R1,ICVB and convert
000D46 41FF 0005 00005 1949 LA R15,5(R15) push pointer by 5 char
000D4A 50F0 BD20 00D20 1950 ST R15,ILPTR and update
000D4E 07FE 1951 BR R14
1952 *
1953 * IINT10 ---------------------------------------------------
1954 * read integer, like PL/I F(10) or C %10d format
1955 *
000D50 58F0 BD20 00D20 1956 IINT10 L R15,ILPTR get input pointer
000D54 F279 BD30 F000 00D30 00000 1957 PACK ICVB(8),0(10,R15) pack next 10 char
000D5A 4F10 BD30 00D30 1958 CVB R1,ICVB and convert
000D5E 41FF 000A 0000A 1959 LA R15,10(R15) push pointer by 10 char
000D62 50F0 BD20 00D20 1960 ST R15,ILPTR and update
000D66 07FE 1961 BR R14
1962 *
1963 * spill literal pool for MAIN
1964 *
000D68 1965 LTORG
000D68 46F4240000000000 1966 =D'16.E6'
PAGE 38
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000D70 45F4240000000000 1967 =D'1.E6'
000D78 475F5E1000000000 1968 =D'1.E8'
000D80 4877359400000000 1969 =D'2.E9'
000D88 4080000000000000 1970 =D'0.5'
000D90 00004E60 1971 =A(TDSCTBLE-4)
000D94 000049C8 1972 =A(TDSCTBL)
000D98 0000000B 1973 =A(LTMAX)
000D9C 00002364 1974 =A(TCORTBL-4)
000DA0 000049C8 1975 =A(T100TPTR)
000DA4 000049D0 1976 =A(T102TPTR)
000DA8 00030D40 1977 =F'200000'
000DAC 00007530 1978 =F'30000'
000DB0 3D090000 1979 =F'1024000000'
000DB4 0001869F 1980 =F'99999'
000DB8 00FFFFFF 1981 =X'00FFFFFF'
000DBC 00000005 1982 =F'5'
000DC0 50000000 1983 =X'50000000'
000DC4 04000000 1984 =X'04000000'
000DC8 00002000 1985 =A(CBUFSIZE)
000DCC 4E000000 1986 =X'4E000000'
000DD0 00002231 1987 =A(OLBUF+1)
000DD4 00002230 1988 =A(OLBUF)
000DD8 000021D0 1989 =A(SYSPRINT)
000DDC 3B9AC9FF 1990 =F'999999999'
000DE0 000022B8 1991 =A(SYSIN)
000DE4 00002318 1992 =A(ILBUF)
000DE8 00F0 1993 =X'00F0'
000DEA 00F9 1994 =X'00F9'
000DEC 0039 1995 =X'0039'
1996 *
1997 * table used bt /TCOR ------------------------------------------------
1998 *
002368 1999 DATA CSECT
002368 2000 DS 0F
2001 *
2002 * table with pointers to the lt case lists
2003 *
02368 2004 TCORTBL EQU *
002368 00002394 2005 DC A(LTTBL01)
00236C 00002398 2006 DC A(LTTBL02)
002370 0000239C 2007 DC A(LTTBL03)
002374 000023A4 2008 DC A(LTTBL04)
002378 000023AC 2009 DC A(LTTBL05)
00237C 000023B8 2010 DC A(LTTBL06)
002380 000023C0 2011 DC A(LTTBL07)
002384 000023C8 2012 DC A(LTTBL08)
002388 000023D0 2013 DC A(LTTBL09)
00238C 000023D8 2014 DC A(LTTBL10)
002390 000023E0 2015 DC A(LTTBL11)
0000B 2016 LTMAX EQU (*-TCORTBL)/4
2017 *
2018 * lt case lists, contain pointers into TDSCTBL
2019 *
02394 2020 LTTBL01 EQU * lt=1 --------------
002394 80004BDC 2021 DC X'80',AL3(T311TPTR) T311 BCTR
PAGE 39
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
02398 2022 LTTBL02 EQU * lt=2 -------------
002398 80004BE0 2023 DC X'80',AL3(T312TPTR) T312 BCT
0239C 2024 LTTBL03 EQU * lt=3 -------------
00239C 000049C8 2025 DC X'00',AL3(T100TPTR) T100 LR
0023A0 80004BDC 2026 DC X'80',AL3(T311TPTR) T311 BCTR
023A4 2027 LTTBL04 EQU * lt=4 -------------
0023A4 000049CC 2028 DC X'00',AL3(T101TPTR) T101 LA
0023A8 80004BDC 2029 DC X'80',AL3(T311TPTR) T311 BCTR
023AC 2030 LTTBL05 EQU * lt=5 -------------
0023AC 000049CC 2031 DC X'00',AL3(T101TPTR) T101 LA
0023B0 00004AF8 2032 DC X'00',AL3(T230TPTR) T230 XR
0023B4 80004BDC 2033 DC X'80',AL3(T311TPTR) T311 BCTR
023B8 2034 LTTBL06 EQU * lt=6 -------------
0023B8 000049CC 2035 DC X'00',AL3(T101TPTR) T101 LA (3 times)
0023BC 80004BDC 2036 DC X'80',AL3(T311TPTR) T311 BCTR
023C0 2037 LTTBL07 EQU * lt=7 -------------
0023C0 00004A2C 2038 DC X'00',AL3(T150TPTR) T150 MVC (5c)
0023C4 80004BDC 2039 DC X'80',AL3(T311TPTR) T311 BCTR
023C8 2040 LTTBL08 EQU * lt=8 -------------
0023C8 00004A34 2041 DC X'00',AL3(T152TPTR) T152 MVC (15c)
0023CC 80004BDC 2042 DC X'80',AL3(T311TPTR) T311 BCTR
023D0 2043 LTTBL09 EQU * lt=9 -------------
0023D0 00004C74 2044 DC X'00',AL3(T501TPTR) T501 LE
0023D4 80004BDC 2045 DC X'80',AL3(T311TPTR) T311 BCTR
023D8 2046 LTTBL10 EQU * lt=10 -------------
0023D8 00004CCC 2047 DC X'00',AL3(T531TPTR) T531 LD
0023DC 80004BDC 2048 DC X'80',AL3(T311TPTR) T311 BCTR
023E0 2049 LTTBL11 EQU * lt=11 -------------
0023E0 00004CCC 2050 DC X'00',AL3(T531TPTR) T531 LD (2 times)
0023E4 80004BDC 2051 DC X'80',AL3(T311TPTR) T311 BCTR
2052 *
2053 * data in DATA CSECT -------------------------------------------------
2054 *
0023E8 2055 DATA CSECT
0023E8 2056 DS 0D
023E8 2057 TRTBLINV EQU *
0023E8 FFFEFDFCFBFAF9F8 2058 DC X'FFFEFDFCFBFAF9F8F7F6F5F4F3F2F1F0'
0023F8 EFEEEDECEBEAE9E8 2059 DC X'EFEEEDECEBEAE9E8E7E6E5E4E3E2E1E0'
002408 DFDEDDDCDBDAD9D8 2060 DC X'DFDEDDDCDBDAD9D8D7D6D5D4D3D2D1D0'
002418 CFCECDCCCBCAC9C8 2061 DC X'CFCECDCCCBCAC9C8C7C6C5C4C3C2C1C0'
002428 BFBEBDBCBBBAB9B8 2062 DC X'BFBEBDBCBBBAB9B8B7B6B5B4B3B2B1B0'
002438 AFAEADACABAAA9A8 2063 DC X'AFAEADACABAAA9A8A7A6A5A4A3A2A1A0'
002448 9F9E9D9C9B9A9998 2064 DC X'9F9E9D9C9B9A99989796959493929190'
002458 8F8E8D8C8B8A8988 2065 DC X'8F8E8D8C8B8A89888786858483828180'
002468 7F7E7D7C7B7A7978 2066 DC X'7F7E7D7C7B7A79787776757473727170'
002478 6F6E6D6C6B6A6968 2067 DC X'6F6E6D6C6B6A69686766656463626160'
002488 5F5E5D5C5B5A5958 2068 DC X'5F5E5D5C5B5A59585756555453525150'
002498 4F4E4D4C4B4A4948 2069 DC X'4F4E4D4C4B4A49484746454443424140'
0024A8 3F3E3D3C3B3A3938 2070 DC X'3F3E3D3C3B3A39383736353433323130'
0024B8 2F2E2D2C2B2A2928 2071 DC X'2F2E2D2C2B2A29282726252423222120'
0024C8 1F1E1D1C1B1A1918 2072 DC X'1F1E1D1C1B1A19181716151413121110'
0024D8 0F0E0D0C0B0A0908 2073 DC X'0F0E0D0C0B0A09080706050403020100'
2074 *
2075 * Tests ==============================================================
2076 * sections 1xx load/store/move
PAGE 40
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
2077 * 2xx binary/logical
2078 * 3xx flow control
2079 * 4xx packed/decimal
2080 * 5xx floating point
2081 * 6xx miscellaneous
2082 * 7xx mix sequences
2083 * 9xx auxiliary tests
2084 *
2085 * Test 1xx -- load/store/move ===================================
2086 *
2087 * Test 10x -- load =========================================
2088 *
2089 * Test 100 -- LR R,R ---------------------------------------
2090 *
2091 TSIMBEG T100,22000,100,1,C'LR R,R'
2092+*
0024E8 2093+TDSCDAT CSECT
0024E8 2094+ DS 0D
2095+*
0024E8 00004E68 2096+T100TDSC DC A(T100) // TENTRY
0024EC 000000FC 2097+ DC A(T100TEND-T100) // TLENGTH
0024F0 000055F0 2098+ DC F'22000' // TLRCNT
0024F4 00000064 2099+ DC F'100' // TIGCNT
0024F8 00000001 2100+ DC F'1' // TLTYPE
000FD6 2101+TEXT CSECT
000FD6 E3F1F0F0 2102+SPTR0052 DC C'T100'
0024FC 2103+TDSCDAT CSECT
0024FC 2104+ DS 0F
0024FC 04000FD6 2105+ DC AL1(L'SPTR0052),AL3(SPTR0052)
000FDA 2106+TEXT CSECT
000FDA D3D940D96BD9 2107+SPTR0053 DC C'LR R,R'
002500 2108+TDSCDAT CSECT
002500 2109+ DS 0F
002500 06000FDA 2110+ DC AL1(L'SPTR0053),AL3(SPTR0053)
2111+*
0049C8 2112+TDSCTBL CSECT
049C8 2113+T100TPTR EQU *
0049C8 000024E8 2114+ DC A(T100TDSC) enabled test
2115+*
004E68 2116+TCODE CSECT
004E68 2117+ DS 0D ensure double word alignment for test
004E68 2118+T100 DS 0H 01650000
004E68 90EC D00C 0000C 2119+ STM 14,12,12(13) SAVE REGISTERS 02950000
004E6C 18CF 2120+ LR R12,R15 base register := entry address
04E68 2121+ USING T100,R12 declare code base register
004E6E 41B0 C01E 04E86 2122+ LA R11,T100L load loop target to R11
004E72 58F0 C0F8 04F60 2123+ L R15,=A(SAVETST) R15 := current save area
004E76 50DF 0004 00004 2124+ ST R13,4(R15) set back pointer in current save area
004E7A 182D 2125+ LR R2,R13 remember callers save area
004E7C 18DF 2126+ LR R13,R15 setup current save area
004E7E 50D2 0008 00008 2127+ ST R13,8(R2) set forw pointer in callers save area
00000 2128+ USING TDSC,R1 declare TDSC base register
004E82 58F0 1008 00008 2129+ L R15,TLRCNT load local repeat count to R15
2130+*
2131 *
PAGE 41
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
2132 T100L REPINS LR,(R2,R1) repeat: LR R2,R1
2133+*
2134+* build from sublist &ALIST a comma separated string &ARGS
2135+*
2136+*
2137+*
2138+*
2139+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
2140+* this allows to transfer the repeat count from last TDSCGEN call
2141+*
2142+*
04E86 2143+T100L EQU *
2144+*
2145+* write a comment indicating what REPINS does (in case NOGEN in effect)
2146+*
2147+*,// REPINS: do 100 times:
2148+*
2149+* MNOTE requires that ' is doubled for expanded variables
2150+* thus build &MASTR as a copy of '&ARGS with ' doubled
2151+*
2152+*
2153+*,// LR R2,R1
2154+*
2155+* finally generate code: &ICNT copies of &CODE &ARGS
2156+*
004E86 1821 2157+ LR R2,R1
004E88 1821 2158+ LR R2,R1
004E8A 1821 2159+ LR R2,R1
004E8C 1821 2160+ LR R2,R1
004E8E 1821 2161+ LR R2,R1
004E90 1821 2162+ LR R2,R1
004E92 1821 2163+ LR R2,R1
004E94 1821 2164+ LR R2,R1
004E96 1821 2165+ LR R2,R1
004E98 1821 2166+ LR R2,R1
004E9A 1821 2167+ LR R2,R1
004E9C 1821 2168+ LR R2,R1
004E9E 1821 2169+ LR R2,R1
004EA0 1821 2170+ LR R2,R1
004EA2 1821 2171+ LR R2,R1
004EA4 1821 2172+ LR R2,R1
004EA6 1821 2173+ LR R2,R1
004EA8 1821 2174+ LR R2,R1
004EAA 1821 2175+ LR R2,R1
004EAC 1821 2176+ LR R2,R1
004EAE 1821 2177+ LR R2,R1
004EB0 1821 2178+ LR R2,R1
004EB2 1821 2179+ LR R2,R1
004EB4 1821 2180+ LR R2,R1
004EB6 1821 2181+ LR R2,R1
004EB8 1821 2182+ LR R2,R1
004EBA 1821 2183+ LR R2,R1
004EBC 1821 2184+ LR R2,R1
004EBE 1821 2185+ LR R2,R1
004EC0 1821 2186+ LR R2,R1
PAGE 42
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004EC2 1821 2187+ LR R2,R1
004EC4 1821 2188+ LR R2,R1
004EC6 1821 2189+ LR R2,R1
004EC8 1821 2190+ LR R2,R1
004ECA 1821 2191+ LR R2,R1
004ECC 1821 2192+ LR R2,R1
004ECE 1821 2193+ LR R2,R1
004ED0 1821 2194+ LR R2,R1
004ED2 1821 2195+ LR R2,R1
004ED4 1821 2196+ LR R2,R1
004ED6 1821 2197+ LR R2,R1
004ED8 1821 2198+ LR R2,R1
004EDA 1821 2199+ LR R2,R1
004EDC 1821 2200+ LR R2,R1
004EDE 1821 2201+ LR R2,R1
004EE0 1821 2202+ LR R2,R1
004EE2 1821 2203+ LR R2,R1
004EE4 1821 2204+ LR R2,R1
004EE6 1821 2205+ LR R2,R1
004EE8 1821 2206+ LR R2,R1
004EEA 1821 2207+ LR R2,R1
004EEC 1821 2208+ LR R2,R1
004EEE 1821 2209+ LR R2,R1
004EF0 1821 2210+ LR R2,R1
004EF2 1821 2211+ LR R2,R1
004EF4 1821 2212+ LR R2,R1
004EF6 1821 2213+ LR R2,R1
004EF8 1821 2214+ LR R2,R1
004EFA 1821 2215+ LR R2,R1
004EFC 1821 2216+ LR R2,R1
004EFE 1821 2217+ LR R2,R1
004F00 1821 2218+ LR R2,R1
004F02 1821 2219+ LR R2,R1
004F04 1821 2220+ LR R2,R1
004F06 1821 2221+ LR R2,R1
004F08 1821 2222+ LR R2,R1
004F0A 1821 2223+ LR R2,R1
004F0C 1821 2224+ LR R2,R1
004F0E 1821 2225+ LR R2,R1
004F10 1821 2226+ LR R2,R1
004F12 1821 2227+ LR R2,R1
004F14 1821 2228+ LR R2,R1
004F16 1821 2229+ LR R2,R1
004F18 1821 2230+ LR R2,R1
004F1A 1821 2231+ LR R2,R1
004F1C 1821 2232+ LR R2,R1
004F1E 1821 2233+ LR R2,R1
004F20 1821 2234+ LR R2,R1
004F22 1821 2235+ LR R2,R1
004F24 1821 2236+ LR R2,R1
004F26 1821 2237+ LR R2,R1
004F28 1821 2238+ LR R2,R1
004F2A 1821 2239+ LR R2,R1
004F2C 1821 2240+ LR R2,R1
004F2E 1821 2241+ LR R2,R1
PAGE 43
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004F30 1821 2242+ LR R2,R1
004F32 1821 2243+ LR R2,R1
004F34 1821 2244+ LR R2,R1
004F36 1821 2245+ LR R2,R1
004F38 1821 2246+ LR R2,R1
004F3A 1821 2247+ LR R2,R1
004F3C 1821 2248+ LR R2,R1
004F3E 1821 2249+ LR R2,R1
004F40 1821 2250+ LR R2,R1
004F42 1821 2251+ LR R2,R1
004F44 1821 2252+ LR R2,R1
004F46 1821 2253+ LR R2,R1
004F48 1821 2254+ LR R2,R1
004F4A 1821 2255+ LR R2,R1
004F4C 1821 2256+ LR R2,R1
2257+*
004F4E 06FB 2258 BCTR R15,R11
2259 TSIMRET
004F50 58F0 C0F8 04F60 2260+ L R15,=A(SAVETST) R15 := current save area
004F54 58DF 0004 00004 2261+ L R13,4(R15) get old save area back
004F58 98EC D00C 0000C 2262+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
004F5C 07FE 2263+ BR 14 RETURN 02000000
2264 TSIMEND
004F60 2265+ LTORG
004F60 00000458 2266 =A(SAVETST)
04F64 2267+T100TEND EQU *
2268 *
2269 * Test 101 -- LA R,n ---------------------------------------
2270 *
2271 TSIMBEG T101,17000,100,1,C'LA R,n'
2272+*
002504 2273+TDSCDAT CSECT
002508 2274+ DS 0D
2275+*
002508 00004F68 2276+T101TDSC DC A(T101) // TENTRY
00250C 000001C4 2277+ DC A(T101TEND-T101) // TLENGTH
002510 00004268 2278+ DC F'17000' // TLRCNT
002514 00000064 2279+ DC F'100' // TIGCNT
002518 00000001 2280+ DC F'1' // TLTYPE
000FE0 2281+TEXT CSECT
000FE0 E3F1F0F1 2282+SPTR0064 DC C'T101'
00251C 2283+TDSCDAT CSECT
00251C 2284+ DS 0F
00251C 04000FE0 2285+ DC AL1(L'SPTR0064),AL3(SPTR0064)
000FE4 2286+TEXT CSECT
000FE4 D3C140D96B95 2287+SPTR0065 DC C'LA R,n'
002520 2288+TDSCDAT CSECT
002520 2289+ DS 0F
002520 06000FE4 2290+ DC AL1(L'SPTR0065),AL3(SPTR0065)
2291+*
0049CC 2292+TDSCTBL CSECT
049CC 2293+T101TPTR EQU *
0049CC 00002508 2294+ DC A(T101TDSC) enabled test
2295+*
004F64 2296+TCODE CSECT
PAGE 44
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004F68 2297+ DS 0D ensure double word alignment for test
004F68 2298+T101 DS 0H 01650000
004F68 90EC D00C 0000C 2299+ STM 14,12,12(13) SAVE REGISTERS 02950000
004F6C 18CF 2300+ LR R12,R15 base register := entry address
04F68 2301+ USING T101,R12 declare code base register
004F6E 41B0 C01E 04F86 2302+ LA R11,T101L load loop target to R11
004F72 58F0 C1C0 05128 2303+ L R15,=A(SAVETST) R15 := current save area
004F76 50DF 0004 00004 2304+ ST R13,4(R15) set back pointer in current save area
004F7A 182D 2305+ LR R2,R13 remember callers save area
004F7C 18DF 2306+ LR R13,R15 setup current save area
004F7E 50D2 0008 00008 2307+ ST R13,8(R2) set forw pointer in callers save area
00000 2308+ USING TDSC,R1 declare TDSC base register
004F82 58F0 1008 00008 2309+ L R15,TLRCNT load local repeat count to R15
2310+*
2311 *
2312 T101L REPINS LA,(R2,X'123') repeat: LA R2,X'123
2313+*
2314+* build from sublist &ALIST a comma separated string &ARGS
2315+*
2316+*
2317+*
2318+*
2319+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
2320+* this allows to transfer the repeat count from last TDSCGEN call
2321+*
2322+*
04F86 2323+T101L EQU *
2324+*
2325+* write a comment indicating what REPINS does (in case NOGEN in effect)
2326+*
2327+*,// REPINS: do 100 times:
2328+*
2329+* MNOTE requires that ' is doubled for expanded variables
2330+* thus build &MASTR as a copy of '&ARGS with ' doubled
2331+*
2332+*
2333+*,// LA R2,X'123'
2334+*
2335+* finally generate code: &ICNT copies of &CODE &ARGS
2336+*
004F86 4120 0123 00123 2337+ LA R2,X'123'
004F8A 4120 0123 00123 2338+ LA R2,X'123'
004F8E 4120 0123 00123 2339+ LA R2,X'123'
004F92 4120 0123 00123 2340+ LA R2,X'123'
004F96 4120 0123 00123 2341+ LA R2,X'123'
004F9A 4120 0123 00123 2342+ LA R2,X'123'
004F9E 4120 0123 00123 2343+ LA R2,X'123'
004FA2 4120 0123 00123 2344+ LA R2,X'123'
004FA6 4120 0123 00123 2345+ LA R2,X'123'
004FAA 4120 0123 00123 2346+ LA R2,X'123'
004FAE 4120 0123 00123 2347+ LA R2,X'123'
004FB2 4120 0123 00123 2348+ LA R2,X'123'
004FB6 4120 0123 00123 2349+ LA R2,X'123'
004FBA 4120 0123 00123 2350+ LA R2,X'123'
004FBE 4120 0123 00123 2351+ LA R2,X'123'
PAGE 45
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004FC2 4120 0123 00123 2352+ LA R2,X'123'
004FC6 4120 0123 00123 2353+ LA R2,X'123'
004FCA 4120 0123 00123 2354+ LA R2,X'123'
004FCE 4120 0123 00123 2355+ LA R2,X'123'
004FD2 4120 0123 00123 2356+ LA R2,X'123'
004FD6 4120 0123 00123 2357+ LA R2,X'123'
004FDA 4120 0123 00123 2358+ LA R2,X'123'
004FDE 4120 0123 00123 2359+ LA R2,X'123'
004FE2 4120 0123 00123 2360+ LA R2,X'123'
004FE6 4120 0123 00123 2361+ LA R2,X'123'
004FEA 4120 0123 00123 2362+ LA R2,X'123'
004FEE 4120 0123 00123 2363+ LA R2,X'123'
004FF2 4120 0123 00123 2364+ LA R2,X'123'
004FF6 4120 0123 00123 2365+ LA R2,X'123'
004FFA 4120 0123 00123 2366+ LA R2,X'123'
004FFE 4120 0123 00123 2367+ LA R2,X'123'
005002 4120 0123 00123 2368+ LA R2,X'123'
005006 4120 0123 00123 2369+ LA R2,X'123'
00500A 4120 0123 00123 2370+ LA R2,X'123'
00500E 4120 0123 00123 2371+ LA R2,X'123'
005012 4120 0123 00123 2372+ LA R2,X'123'
005016 4120 0123 00123 2373+ LA R2,X'123'
00501A 4120 0123 00123 2374+ LA R2,X'123'
00501E 4120 0123 00123 2375+ LA R2,X'123'
005022 4120 0123 00123 2376+ LA R2,X'123'
005026 4120 0123 00123 2377+ LA R2,X'123'
00502A 4120 0123 00123 2378+ LA R2,X'123'
00502E 4120 0123 00123 2379+ LA R2,X'123'
005032 4120 0123 00123 2380+ LA R2,X'123'
005036 4120 0123 00123 2381+ LA R2,X'123'
00503A 4120 0123 00123 2382+ LA R2,X'123'
00503E 4120 0123 00123 2383+ LA R2,X'123'
005042 4120 0123 00123 2384+ LA R2,X'123'
005046 4120 0123 00123 2385+ LA R2,X'123'
00504A 4120 0123 00123 2386+ LA R2,X'123'
00504E 4120 0123 00123 2387+ LA R2,X'123'
005052 4120 0123 00123 2388+ LA R2,X'123'
005056 4120 0123 00123 2389+ LA R2,X'123'
00505A 4120 0123 00123 2390+ LA R2,X'123'
00505E 4120 0123 00123 2391+ LA R2,X'123'
005062 4120 0123 00123 2392+ LA R2,X'123'
005066 4120 0123 00123 2393+ LA R2,X'123'
00506A 4120 0123 00123 2394+ LA R2,X'123'
00506E 4120 0123 00123 2395+ LA R2,X'123'
005072 4120 0123 00123 2396+ LA R2,X'123'
005076 4120 0123 00123 2397+ LA R2,X'123'
00507A 4120 0123 00123 2398+ LA R2,X'123'
00507E 4120 0123 00123 2399+ LA R2,X'123'
005082 4120 0123 00123 2400+ LA R2,X'123'
005086 4120 0123 00123 2401+ LA R2,X'123'
00508A 4120 0123 00123 2402+ LA R2,X'123'
00508E 4120 0123 00123 2403+ LA R2,X'123'
005092 4120 0123 00123 2404+ LA R2,X'123'
005096 4120 0123 00123 2405+ LA R2,X'123'
00509A 4120 0123 00123 2406+ LA R2,X'123'
PAGE 46
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00509E 4120 0123 00123 2407+ LA R2,X'123'
0050A2 4120 0123 00123 2408+ LA R2,X'123'
0050A6 4120 0123 00123 2409+ LA R2,X'123'
0050AA 4120 0123 00123 2410+ LA R2,X'123'
0050AE 4120 0123 00123 2411+ LA R2,X'123'
0050B2 4120 0123 00123 2412+ LA R2,X'123'
0050B6 4120 0123 00123 2413+ LA R2,X'123'
0050BA 4120 0123 00123 2414+ LA R2,X'123'
0050BE 4120 0123 00123 2415+ LA R2,X'123'
0050C2 4120 0123 00123 2416+ LA R2,X'123'
0050C6 4120 0123 00123 2417+ LA R2,X'123'
0050CA 4120 0123 00123 2418+ LA R2,X'123'
0050CE 4120 0123 00123 2419+ LA R2,X'123'
0050D2 4120 0123 00123 2420+ LA R2,X'123'
0050D6 4120 0123 00123 2421+ LA R2,X'123'
0050DA 4120 0123 00123 2422+ LA R2,X'123'
0050DE 4120 0123 00123 2423+ LA R2,X'123'
0050E2 4120 0123 00123 2424+ LA R2,X'123'
0050E6 4120 0123 00123 2425+ LA R2,X'123'
0050EA 4120 0123 00123 2426+ LA R2,X'123'
0050EE 4120 0123 00123 2427+ LA R2,X'123'
0050F2 4120 0123 00123 2428+ LA R2,X'123'
0050F6 4120 0123 00123 2429+ LA R2,X'123'
0050FA 4120 0123 00123 2430+ LA R2,X'123'
0050FE 4120 0123 00123 2431+ LA R2,X'123'
005102 4120 0123 00123 2432+ LA R2,X'123'
005106 4120 0123 00123 2433+ LA R2,X'123'
00510A 4120 0123 00123 2434+ LA R2,X'123'
00510E 4120 0123 00123 2435+ LA R2,X'123'
005112 4120 0123 00123 2436+ LA R2,X'123'
2437+*
005116 06FB 2438 BCTR R15,R11
2439 TSIMRET
005118 58F0 C1C0 05128 2440+ L R15,=A(SAVETST) R15 := current save area
00511C 58DF 0004 00004 2441+ L R13,4(R15) get old save area back
005120 98EC D00C 0000C 2442+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005124 07FE 2443+ BR 14 RETURN 02000000
2444 TSIMEND
005128 2445+ LTORG
005128 00000458 2446 =A(SAVETST)
0512C 2447+T101TEND EQU *
2448 *
2449 * Test 102 -- L R,m ----------------------------------------
2450 *
2451 TSIMBEG T102,13000,50,1,C'L R,m'
2452+*
002524 2453+TDSCDAT CSECT
002528 2454+ DS 0D
2455+*
002528 00005130 2456+T102TDSC DC A(T102) // TENTRY
00252C 00000100 2457+ DC A(T102TEND-T102) // TLENGTH
002530 000032C8 2458+ DC F'13000' // TLRCNT
002534 00000032 2459+ DC F'50' // TIGCNT
002538 00000001 2460+ DC F'1' // TLTYPE
000FEA 2461+TEXT CSECT
PAGE 47
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
000FEA E3F1F0F2 2462+SPTR0076 DC C'T102'
00253C 2463+TDSCDAT CSECT
00253C 2464+ DS 0F
00253C 04000FEA 2465+ DC AL1(L'SPTR0076),AL3(SPTR0076)
000FEE 2466+TEXT CSECT
000FEE D340D96B94 2467+SPTR0077 DC C'L R,m'
002540 2468+TDSCDAT CSECT
002540 2469+ DS 0F
002540 05000FEE 2470+ DC AL1(L'SPTR0077),AL3(SPTR0077)
2471+*
0049D0 2472+TDSCTBL CSECT
049D0 2473+T102TPTR EQU *
0049D0 00002528 2474+ DC A(T102TDSC) enabled test
2475+*
00512C 2476+TCODE CSECT
005130 2477+ DS 0D ensure double word alignment for test
005130 2478+T102 DS 0H 01650000
005130 90EC D00C 0000C 2479+ STM 14,12,12(13) SAVE REGISTERS 02950000
005134 18CF 2480+ LR R12,R15 base register := entry address
05130 2481+ USING T102,R12 declare code base register
005136 41B0 C01E 0514E 2482+ LA R11,T102L load loop target to R11
00513A 58F0 C0F8 05228 2483+ L R15,=A(SAVETST) R15 := current save area
00513E 50DF 0004 00004 2484+ ST R13,4(R15) set back pointer in current save area
005142 182D 2485+ LR R2,R13 remember callers save area
005144 18DF 2486+ LR R13,R15 setup current save area
005146 50D2 0008 00008 2487+ ST R13,8(R2) set forw pointer in callers save area
00000 2488+ USING TDSC,R1 declare TDSC base register
00514A 58F0 1008 00008 2489+ L R15,TLRCNT load local repeat count to R15
2490+*
2491 *
2492 T102L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
2493+*
2494+* build from sublist &ALIST a comma separated string &ARGS
2495+*
2496+*
2497+*
2498+*
2499+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
2500+* this allows to transfer the repeat count from last TDSCGEN call
2501+*
2502+*
0514E 2503+T102L EQU *
2504+*
2505+* write a comment indicating what REPINS does (in case NOGEN in effect)
2506+*
2507+*,// REPINS: do 50 times:
2508+*
2509+* MNOTE requires that ' is doubled for expanded variables
2510+* thus build &MASTR as a copy of '&ARGS with ' doubled
2511+*
2512+*
2513+*,// L R2,=F'123'
2514+*
2515+* finally generate code: &ICNT copies of &CODE &ARGS
2516+*
PAGE 48
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00514E 5820 C0FC 0522C 2517+ L R2,=F'123'
005152 5820 C0FC 0522C 2518+ L R2,=F'123'
005156 5820 C0FC 0522C 2519+ L R2,=F'123'
00515A 5820 C0FC 0522C 2520+ L R2,=F'123'
00515E 5820 C0FC 0522C 2521+ L R2,=F'123'
005162 5820 C0FC 0522C 2522+ L R2,=F'123'
005166 5820 C0FC 0522C 2523+ L R2,=F'123'
00516A 5820 C0FC 0522C 2524+ L R2,=F'123'
00516E 5820 C0FC 0522C 2525+ L R2,=F'123'
005172 5820 C0FC 0522C 2526+ L R2,=F'123'
005176 5820 C0FC 0522C 2527+ L R2,=F'123'
00517A 5820 C0FC 0522C 2528+ L R2,=F'123'
00517E 5820 C0FC 0522C 2529+ L R2,=F'123'
005182 5820 C0FC 0522C 2530+ L R2,=F'123'
005186 5820 C0FC 0522C 2531+ L R2,=F'123'
00518A 5820 C0FC 0522C 2532+ L R2,=F'123'
00518E 5820 C0FC 0522C 2533+ L R2,=F'123'
005192 5820 C0FC 0522C 2534+ L R2,=F'123'
005196 5820 C0FC 0522C 2535+ L R2,=F'123'
00519A 5820 C0FC 0522C 2536+ L R2,=F'123'
00519E 5820 C0FC 0522C 2537+ L R2,=F'123'
0051A2 5820 C0FC 0522C 2538+ L R2,=F'123'
0051A6 5820 C0FC 0522C 2539+ L R2,=F'123'
0051AA 5820 C0FC 0522C 2540+ L R2,=F'123'
0051AE 5820 C0FC 0522C 2541+ L R2,=F'123'
0051B2 5820 C0FC 0522C 2542+ L R2,=F'123'
0051B6 5820 C0FC 0522C 2543+ L R2,=F'123'
0051BA 5820 C0FC 0522C 2544+ L R2,=F'123'
0051BE 5820 C0FC 0522C 2545+ L R2,=F'123'
0051C2 5820 C0FC 0522C 2546+ L R2,=F'123'
0051C6 5820 C0FC 0522C 2547+ L R2,=F'123'
0051CA 5820 C0FC 0522C 2548+ L R2,=F'123'
0051CE 5820 C0FC 0522C 2549+ L R2,=F'123'
0051D2 5820 C0FC 0522C 2550+ L R2,=F'123'
0051D6 5820 C0FC 0522C 2551+ L R2,=F'123'
0051DA 5820 C0FC 0522C 2552+ L R2,=F'123'
0051DE 5820 C0FC 0522C 2553+ L R2,=F'123'
0051E2 5820 C0FC 0522C 2554+ L R2,=F'123'
0051E6 5820 C0FC 0522C 2555+ L R2,=F'123'
0051EA 5820 C0FC 0522C 2556+ L R2,=F'123'
0051EE 5820 C0FC 0522C 2557+ L R2,=F'123'
0051F2 5820 C0FC 0522C 2558+ L R2,=F'123'
0051F6 5820 C0FC 0522C 2559+ L R2,=F'123'
0051FA 5820 C0FC 0522C 2560+ L R2,=F'123'
0051FE 5820 C0FC 0522C 2561+ L R2,=F'123'
005202 5820 C0FC 0522C 2562+ L R2,=F'123'
005206 5820 C0FC 0522C 2563+ L R2,=F'123'
00520A 5820 C0FC 0522C 2564+ L R2,=F'123'
00520E 5820 C0FC 0522C 2565+ L R2,=F'123'
005212 5820 C0FC 0522C 2566+ L R2,=F'123'
2567+*
005216 06FB 2568 BCTR R15,R11
2569 TSIMRET
005218 58F0 C0F8 05228 2570+ L R15,=A(SAVETST) R15 := current save area
00521C 58DF 0004 00004 2571+ L R13,4(R15) get old save area back
PAGE 49
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005220 98EC D00C 0000C 2572+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005224 07FE 2573+ BR 14 RETURN 02000000
2574 TSIMEND
005228 2575+ LTORG
005228 00000458 2576 =A(SAVETST)
00522C 0000007B 2577 =F'123'
05230 2578+T102TEND EQU *
2579 *
2580 * Test 103 -- L R,m (unal) ---------------------------------
2581 *
2582 TSIMBEG T103,12000,50,1,C'L R,m (unal)'
2583+*
002544 2584+TDSCDAT CSECT
002548 2585+ DS 0D
2586+*
002548 00005230 2587+T103TDSC DC A(T103) // TENTRY
00254C 0000010C 2588+ DC A(T103TEND-T103) // TLENGTH
002550 00002EE0 2589+ DC F'12000' // TLRCNT
002554 00000032 2590+ DC F'50' // TIGCNT
002558 00000001 2591+ DC F'1' // TLTYPE
000FF3 2592+TEXT CSECT
000FF3 E3F1F0F3 2593+SPTR0088 DC C'T103'
00255C 2594+TDSCDAT CSECT
00255C 2595+ DS 0F
00255C 04000FF3 2596+ DC AL1(L'SPTR0088),AL3(SPTR0088)
000FF7 2597+TEXT CSECT
000FF7 D340D96B94404DA4 2598+SPTR0089 DC C'L R,m (unal)'
002560 2599+TDSCDAT CSECT
002560 2600+ DS 0F
002560 0C000FF7 2601+ DC AL1(L'SPTR0089),AL3(SPTR0089)
2602+*
0049D4 2603+TDSCTBL CSECT
049D4 2604+T103TPTR EQU *
0049D4 00002548 2605+ DC A(T103TDSC) enabled test
2606+*
005230 2607+TCODE CSECT
005230 2608+ DS 0D ensure double word alignment for test
005230 2609+T103 DS 0H 01650000
005230 90EC D00C 0000C 2610+ STM 14,12,12(13) SAVE REGISTERS 02950000
005234 18CF 2611+ LR R12,R15 base register := entry address
05230 2612+ USING T103,R12 declare code base register
005236 41B0 C022 05252 2613+ LA R11,T103L load loop target to R11
00523A 58F0 C108 05338 2614+ L R15,=A(SAVETST) R15 := current save area
00523E 50DF 0004 00004 2615+ ST R13,4(R15) set back pointer in current save area
005242 182D 2616+ LR R2,R13 remember callers save area
005244 18DF 2617+ LR R13,R15 setup current save area
005246 50D2 0008 00008 2618+ ST R13,8(R2) set forw pointer in callers save area
00000 2619+ USING TDSC,R1 declare TDSC base register
00524A 58F0 1008 00008 2620+ L R15,TLRCNT load local repeat count to R15
2621+*
2622 *
00524E 4130 C0FC 0532C 2623 LA R3,T103V
2624 T103L REPINS L,(R2,1(R3)) repeat: L R2,1(R3)
2625+*
2626+* build from sublist &ALIST a comma separated string &ARGS
PAGE 50
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
2627+*
2628+*
2629+*
2630+*
2631+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
2632+* this allows to transfer the repeat count from last TDSCGEN call
2633+*
2634+*
05252 2635+T103L EQU *
2636+*
2637+* write a comment indicating what REPINS does (in case NOGEN in effect)
2638+*
2639+*,// REPINS: do 50 times:
2640+*
2641+* MNOTE requires that ' is doubled for expanded variables
2642+* thus build &MASTR as a copy of '&ARGS with ' doubled
2643+*
2644+*
2645+*,// L R2,1(R3)
2646+*
2647+* finally generate code: &ICNT copies of &CODE &ARGS
2648+*
005252 5823 0001 00001 2649+ L R2,1(R3)
005256 5823 0001 00001 2650+ L R2,1(R3)
00525A 5823 0001 00001 2651+ L R2,1(R3)
00525E 5823 0001 00001 2652+ L R2,1(R3)
005262 5823 0001 00001 2653+ L R2,1(R3)
005266 5823 0001 00001 2654+ L R2,1(R3)
00526A 5823 0001 00001 2655+ L R2,1(R3)
00526E 5823 0001 00001 2656+ L R2,1(R3)
005272 5823 0001 00001 2657+ L R2,1(R3)
005276 5823 0001 00001 2658+ L R2,1(R3)
00527A 5823 0001 00001 2659+ L R2,1(R3)
00527E 5823 0001 00001 2660+ L R2,1(R3)
005282 5823 0001 00001 2661+ L R2,1(R3)
005286 5823 0001 00001 2662+ L R2,1(R3)
00528A 5823 0001 00001 2663+ L R2,1(R3)
00528E 5823 0001 00001 2664+ L R2,1(R3)
005292 5823 0001 00001 2665+ L R2,1(R3)
005296 5823 0001 00001 2666+ L R2,1(R3)
00529A 5823 0001 00001 2667+ L R2,1(R3)
00529E 5823 0001 00001 2668+ L R2,1(R3)
0052A2 5823 0001 00001 2669+ L R2,1(R3)
0052A6 5823 0001 00001 2670+ L R2,1(R3)
0052AA 5823 0001 00001 2671+ L R2,1(R3)
0052AE 5823 0001 00001 2672+ L R2,1(R3)
0052B2 5823 0001 00001 2673+ L R2,1(R3)
0052B6 5823 0001 00001 2674+ L R2,1(R3)
0052BA 5823 0001 00001 2675+ L R2,1(R3)
0052BE 5823 0001 00001 2676+ L R2,1(R3)
0052C2 5823 0001 00001 2677+ L R2,1(R3)
0052C6 5823 0001 00001 2678+ L R2,1(R3)
0052CA 5823 0001 00001 2679+ L R2,1(R3)
0052CE 5823 0001 00001 2680+ L R2,1(R3)
0052D2 5823 0001 00001 2681+ L R2,1(R3)
PAGE 51
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0052D6 5823 0001 00001 2682+ L R2,1(R3)
0052DA 5823 0001 00001 2683+ L R2,1(R3)
0052DE 5823 0001 00001 2684+ L R2,1(R3)
0052E2 5823 0001 00001 2685+ L R2,1(R3)
0052E6 5823 0001 00001 2686+ L R2,1(R3)
0052EA 5823 0001 00001 2687+ L R2,1(R3)
0052EE 5823 0001 00001 2688+ L R2,1(R3)
0052F2 5823 0001 00001 2689+ L R2,1(R3)
0052F6 5823 0001 00001 2690+ L R2,1(R3)
0052FA 5823 0001 00001 2691+ L R2,1(R3)
0052FE 5823 0001 00001 2692+ L R2,1(R3)
005302 5823 0001 00001 2693+ L R2,1(R3)
005306 5823 0001 00001 2694+ L R2,1(R3)
00530A 5823 0001 00001 2695+ L R2,1(R3)
00530E 5823 0001 00001 2696+ L R2,1(R3)
005312 5823 0001 00001 2697+ L R2,1(R3)
005316 5823 0001 00001 2698+ L R2,1(R3)
2699+*
00531A 06FB 2700 BCTR R15,R11
2701 TSIMRET
00531C 58F0 C108 05338 2702+ L R15,=A(SAVETST) R15 := current save area
005320 58DF 0004 00004 2703+ L R13,4(R15) get old save area back
005324 98EC D00C 0000C 2704+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005328 07FE 2705+ BR 14 RETURN 02000000
2706 *
00532C 2707 DS 0F
00532C 0123456701234567 2708 T103V DC X'01234567',X'01234567' target for unaligned load
2709 TSIMEND
005338 2710+ LTORG
005338 00000458 2711 =A(SAVETST)
0533C 2712+T103TEND EQU *
2713 *
2714 * Test 104 -- LH R,m ---------------------------------------
2715 *
2716 TSIMBEG T104,10000,50,1,C'LH R,m'
2717+*
002564 2718+TDSCDAT CSECT
002568 2719+ DS 0D
2720+*
002568 00005340 2721+T104TDSC DC A(T104) // TENTRY
00256C 000000FE 2722+ DC A(T104TEND-T104) // TLENGTH
002570 00002710 2723+ DC F'10000' // TLRCNT
002574 00000032 2724+ DC F'50' // TIGCNT
002578 00000001 2725+ DC F'1' // TLTYPE
001003 2726+TEXT CSECT
001003 E3F1F0F4 2727+SPTR0100 DC C'T104'
00257C 2728+TDSCDAT CSECT
00257C 2729+ DS 0F
00257C 04001003 2730+ DC AL1(L'SPTR0100),AL3(SPTR0100)
001007 2731+TEXT CSECT
001007 D3C840D96B94 2732+SPTR0101 DC C'LH R,m'
002580 2733+TDSCDAT CSECT
002580 2734+ DS 0F
002580 06001007 2735+ DC AL1(L'SPTR0101),AL3(SPTR0101)
2736+*
PAGE 52
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0049D8 2737+TDSCTBL CSECT
049D8 2738+T104TPTR EQU *
0049D8 00002568 2739+ DC A(T104TDSC) enabled test
2740+*
00533C 2741+TCODE CSECT
005340 2742+ DS 0D ensure double word alignment for test
005340 2743+T104 DS 0H 01650000
005340 90EC D00C 0000C 2744+ STM 14,12,12(13) SAVE REGISTERS 02950000
005344 18CF 2745+ LR R12,R15 base register := entry address
05340 2746+ USING T104,R12 declare code base register
005346 41B0 C01E 0535E 2747+ LA R11,T104L load loop target to R11
00534A 58F0 C0F8 05438 2748+ L R15,=A(SAVETST) R15 := current save area
00534E 50DF 0004 00004 2749+ ST R13,4(R15) set back pointer in current save area
005352 182D 2750+ LR R2,R13 remember callers save area
005354 18DF 2751+ LR R13,R15 setup current save area
005356 50D2 0008 00008 2752+ ST R13,8(R2) set forw pointer in callers save area
00000 2753+ USING TDSC,R1 declare TDSC base register
00535A 58F0 1008 00008 2754+ L R15,TLRCNT load local repeat count to R15
2755+*
2756 *
2757 T104L REPINS LH,(R2,=H'123') repeat: LH R2,=H'123'
2758+*
2759+* build from sublist &ALIST a comma separated string &ARGS
2760+*
2761+*
2762+*
2763+*
2764+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
2765+* this allows to transfer the repeat count from last TDSCGEN call
2766+*
2767+*
0535E 2768+T104L EQU *
2769+*
2770+* write a comment indicating what REPINS does (in case NOGEN in effect)
2771+*
2772+*,// REPINS: do 50 times:
2773+*
2774+* MNOTE requires that ' is doubled for expanded variables
2775+* thus build &MASTR as a copy of '&ARGS with ' doubled
2776+*
2777+*
2778+*,// LH R2,=H'123'
2779+*
2780+* finally generate code: &ICNT copies of &CODE &ARGS
2781+*
00535E 4820 C0FC 0543C 2782+ LH R2,=H'123'
005362 4820 C0FC 0543C 2783+ LH R2,=H'123'
005366 4820 C0FC 0543C 2784+ LH R2,=H'123'
00536A 4820 C0FC 0543C 2785+ LH R2,=H'123'
00536E 4820 C0FC 0543C 2786+ LH R2,=H'123'
005372 4820 C0FC 0543C 2787+ LH R2,=H'123'
005376 4820 C0FC 0543C 2788+ LH R2,=H'123'
00537A 4820 C0FC 0543C 2789+ LH R2,=H'123'
00537E 4820 C0FC 0543C 2790+ LH R2,=H'123'
005382 4820 C0FC 0543C 2791+ LH R2,=H'123'
PAGE 53
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005386 4820 C0FC 0543C 2792+ LH R2,=H'123'
00538A 4820 C0FC 0543C 2793+ LH R2,=H'123'
00538E 4820 C0FC 0543C 2794+ LH R2,=H'123'
005392 4820 C0FC 0543C 2795+ LH R2,=H'123'
005396 4820 C0FC 0543C 2796+ LH R2,=H'123'
00539A 4820 C0FC 0543C 2797+ LH R2,=H'123'
00539E 4820 C0FC 0543C 2798+ LH R2,=H'123'
0053A2 4820 C0FC 0543C 2799+ LH R2,=H'123'
0053A6 4820 C0FC 0543C 2800+ LH R2,=H'123'
0053AA 4820 C0FC 0543C 2801+ LH R2,=H'123'
0053AE 4820 C0FC 0543C 2802+ LH R2,=H'123'
0053B2 4820 C0FC 0543C 2803+ LH R2,=H'123'
0053B6 4820 C0FC 0543C 2804+ LH R2,=H'123'
0053BA 4820 C0FC 0543C 2805+ LH R2,=H'123'
0053BE 4820 C0FC 0543C 2806+ LH R2,=H'123'
0053C2 4820 C0FC 0543C 2807+ LH R2,=H'123'
0053C6 4820 C0FC 0543C 2808+ LH R2,=H'123'
0053CA 4820 C0FC 0543C 2809+ LH R2,=H'123'
0053CE 4820 C0FC 0543C 2810+ LH R2,=H'123'
0053D2 4820 C0FC 0543C 2811+ LH R2,=H'123'
0053D6 4820 C0FC 0543C 2812+ LH R2,=H'123'
0053DA 4820 C0FC 0543C 2813+ LH R2,=H'123'
0053DE 4820 C0FC 0543C 2814+ LH R2,=H'123'
0053E2 4820 C0FC 0543C 2815+ LH R2,=H'123'
0053E6 4820 C0FC 0543C 2816+ LH R2,=H'123'
0053EA 4820 C0FC 0543C 2817+ LH R2,=H'123'
0053EE 4820 C0FC 0543C 2818+ LH R2,=H'123'
0053F2 4820 C0FC 0543C 2819+ LH R2,=H'123'
0053F6 4820 C0FC 0543C 2820+ LH R2,=H'123'
0053FA 4820 C0FC 0543C 2821+ LH R2,=H'123'
0053FE 4820 C0FC 0543C 2822+ LH R2,=H'123'
005402 4820 C0FC 0543C 2823+ LH R2,=H'123'
005406 4820 C0FC 0543C 2824+ LH R2,=H'123'
00540A 4820 C0FC 0543C 2825+ LH R2,=H'123'
00540E 4820 C0FC 0543C 2826+ LH R2,=H'123'
005412 4820 C0FC 0543C 2827+ LH R2,=H'123'
005416 4820 C0FC 0543C 2828+ LH R2,=H'123'
00541A 4820 C0FC 0543C 2829+ LH R2,=H'123'
00541E 4820 C0FC 0543C 2830+ LH R2,=H'123'
005422 4820 C0FC 0543C 2831+ LH R2,=H'123'
2832+*
005426 06FB 2833 BCTR R15,R11
2834 TSIMRET
005428 58F0 C0F8 05438 2835+ L R15,=A(SAVETST) R15 := current save area
00542C 58DF 0004 00004 2836+ L R13,4(R15) get old save area back
005430 98EC D00C 0000C 2837+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005434 07FE 2838+ BR 14 RETURN 02000000
2839 TSIMEND
005438 2840+ LTORG
005438 00000458 2841 =A(SAVETST)
00543C 007B 2842 =H'123'
0543E 2843+T104TEND EQU *
2844 *
2845 * Test 105 -- LH R,m (unal3) -------------------------------
2846 *
PAGE 54
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
2847 TSIMBEG T105,10000,50,1,C'LH R,m (unal3)'
2848+*
002584 2849+TDSCDAT CSECT
002588 2850+ DS 0D
2851+*
002588 00005440 2852+T105TDSC DC A(T105) // TENTRY
00258C 0000010C 2853+ DC A(T105TEND-T105) // TLENGTH
002590 00002710 2854+ DC F'10000' // TLRCNT
002594 00000032 2855+ DC F'50' // TIGCNT
002598 00000001 2856+ DC F'1' // TLTYPE
00100D 2857+TEXT CSECT
00100D E3F1F0F5 2858+SPTR0112 DC C'T105'
00259C 2859+TDSCDAT CSECT
00259C 2860+ DS 0F
00259C 0400100D 2861+ DC AL1(L'SPTR0112),AL3(SPTR0112)
001011 2862+TEXT CSECT
001011 D3C840D96B94404D 2863+SPTR0113 DC C'LH R,m (unal3)'
0025A0 2864+TDSCDAT CSECT
0025A0 2865+ DS 0F
0025A0 0E001011 2866+ DC AL1(L'SPTR0113),AL3(SPTR0113)
2867+*
0049DC 2868+TDSCTBL CSECT
049DC 2869+T105TPTR EQU *
0049DC 00002588 2870+ DC A(T105TDSC) enabled test
2871+*
00543E 2872+TCODE CSECT
005440 2873+ DS 0D ensure double word alignment for test
005440 2874+T105 DS 0H 01650000
005440 90EC D00C 0000C 2875+ STM 14,12,12(13) SAVE REGISTERS 02950000
005444 18CF 2876+ LR R12,R15 base register := entry address
05440 2877+ USING T105,R12 declare code base register
005446 41B0 C022 05462 2878+ LA R11,T105L load loop target to R11
00544A 58F0 C108 05548 2879+ L R15,=A(SAVETST) R15 := current save area
00544E 50DF 0004 00004 2880+ ST R13,4(R15) set back pointer in current save area
005452 182D 2881+ LR R2,R13 remember callers save area
005454 18DF 2882+ LR R13,R15 setup current save area
005456 50D2 0008 00008 2883+ ST R13,8(R2) set forw pointer in callers save area
00000 2884+ USING TDSC,R1 declare TDSC base register
00545A 58F0 1008 00008 2885+ L R15,TLRCNT load local repeat count to R15
2886+*
2887 *
00545E 4130 C0FC 0553C 2888 LA R3,T105V
2889 T105L REPINS LH,(R2,3(R3)) repeat: LH R2,3(R3)
2890+*
2891+* build from sublist &ALIST a comma separated string &ARGS
2892+*
2893+*
2894+*
2895+*
2896+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
2897+* this allows to transfer the repeat count from last TDSCGEN call
2898+*
2899+*
05462 2900+T105L EQU *
2901+*
PAGE 55
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
2902+* write a comment indicating what REPINS does (in case NOGEN in effect)
2903+*
2904+*,// REPINS: do 50 times:
2905+*
2906+* MNOTE requires that ' is doubled for expanded variables
2907+* thus build &MASTR as a copy of '&ARGS with ' doubled
2908+*
2909+*
2910+*,// LH R2,3(R3)
2911+*
2912+* finally generate code: &ICNT copies of &CODE &ARGS
2913+*
005462 4823 0003 00003 2914+ LH R2,3(R3)
005466 4823 0003 00003 2915+ LH R2,3(R3)
00546A 4823 0003 00003 2916+ LH R2,3(R3)
00546E 4823 0003 00003 2917+ LH R2,3(R3)
005472 4823 0003 00003 2918+ LH R2,3(R3)
005476 4823 0003 00003 2919+ LH R2,3(R3)
00547A 4823 0003 00003 2920+ LH R2,3(R3)
00547E 4823 0003 00003 2921+ LH R2,3(R3)
005482 4823 0003 00003 2922+ LH R2,3(R3)
005486 4823 0003 00003 2923+ LH R2,3(R3)
00548A 4823 0003 00003 2924+ LH R2,3(R3)
00548E 4823 0003 00003 2925+ LH R2,3(R3)
005492 4823 0003 00003 2926+ LH R2,3(R3)
005496 4823 0003 00003 2927+ LH R2,3(R3)
00549A 4823 0003 00003 2928+ LH R2,3(R3)
00549E 4823 0003 00003 2929+ LH R2,3(R3)
0054A2 4823 0003 00003 2930+ LH R2,3(R3)
0054A6 4823 0003 00003 2931+ LH R2,3(R3)
0054AA 4823 0003 00003 2932+ LH R2,3(R3)
0054AE 4823 0003 00003 2933+ LH R2,3(R3)
0054B2 4823 0003 00003 2934+ LH R2,3(R3)
0054B6 4823 0003 00003 2935+ LH R2,3(R3)
0054BA 4823 0003 00003 2936+ LH R2,3(R3)
0054BE 4823 0003 00003 2937+ LH R2,3(R3)
0054C2 4823 0003 00003 2938+ LH R2,3(R3)
0054C6 4823 0003 00003 2939+ LH R2,3(R3)
0054CA 4823 0003 00003 2940+ LH R2,3(R3)
0054CE 4823 0003 00003 2941+ LH R2,3(R3)
0054D2 4823 0003 00003 2942+ LH R2,3(R3)
0054D6 4823 0003 00003 2943+ LH R2,3(R3)
0054DA 4823 0003 00003 2944+ LH R2,3(R3)
0054DE 4823 0003 00003 2945+ LH R2,3(R3)
0054E2 4823 0003 00003 2946+ LH R2,3(R3)
0054E6 4823 0003 00003 2947+ LH R2,3(R3)
0054EA 4823 0003 00003 2948+ LH R2,3(R3)
0054EE 4823 0003 00003 2949+ LH R2,3(R3)
0054F2 4823 0003 00003 2950+ LH R2,3(R3)
0054F6 4823 0003 00003 2951+ LH R2,3(R3)
0054FA 4823 0003 00003 2952+ LH R2,3(R3)
0054FE 4823 0003 00003 2953+ LH R2,3(R3)
005502 4823 0003 00003 2954+ LH R2,3(R3)
005506 4823 0003 00003 2955+ LH R2,3(R3)
00550A 4823 0003 00003 2956+ LH R2,3(R3)
PAGE 56
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00550E 4823 0003 00003 2957+ LH R2,3(R3)
005512 4823 0003 00003 2958+ LH R2,3(R3)
005516 4823 0003 00003 2959+ LH R2,3(R3)
00551A 4823 0003 00003 2960+ LH R2,3(R3)
00551E 4823 0003 00003 2961+ LH R2,3(R3)
005522 4823 0003 00003 2962+ LH R2,3(R3)
005526 4823 0003 00003 2963+ LH R2,3(R3)
2964+*
00552A 06FB 2965 BCTR R15,R11
2966 TSIMRET
00552C 58F0 C108 05548 2967+ L R15,=A(SAVETST) R15 := current save area
005530 58DF 0004 00004 2968+ L R13,4(R15) get old save area back
005534 98EC D00C 0000C 2969+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005538 07FE 2970+ BR 14 RETURN 02000000
2971 *
00553C 2972 DS 0F
00553C 012301230123 2973 T105V DC X'0123',X'0123',X'0123' across word border
2974 TSIMEND
005548 2975+ LTORG
005548 00000458 2976 =A(SAVETST)
0554C 2977+T105TEND EQU *
2978 *
2979 * Test 106 -- LTR R,R --------------------------------------
2980 *
2981 TSIMBEG T106,15000,100,1,C'LTR R,R'
2982+*
0025A4 2983+TDSCDAT CSECT
0025A8 2984+ DS 0D
2985+*
0025A8 00005550 2986+T106TDSC DC A(T106) // TENTRY
0025AC 000000FC 2987+ DC A(T106TEND-T106) // TLENGTH
0025B0 00003A98 2988+ DC F'15000' // TLRCNT
0025B4 00000064 2989+ DC F'100' // TIGCNT
0025B8 00000001 2990+ DC F'1' // TLTYPE
00101F 2991+TEXT CSECT
00101F E3F1F0F6 2992+SPTR0124 DC C'T106'
0025BC 2993+TDSCDAT CSECT
0025BC 2994+ DS 0F
0025BC 0400101F 2995+ DC AL1(L'SPTR0124),AL3(SPTR0124)
001023 2996+TEXT CSECT
001023 D3E3D940D96BD9 2997+SPTR0125 DC C'LTR R,R'
0025C0 2998+TDSCDAT CSECT
0025C0 2999+ DS 0F
0025C0 07001023 3000+ DC AL1(L'SPTR0125),AL3(SPTR0125)
3001+*
0049E0 3002+TDSCTBL CSECT
049E0 3003+T106TPTR EQU *
0049E0 000025A8 3004+ DC A(T106TDSC) enabled test
3005+*
00554C 3006+TCODE CSECT
005550 3007+ DS 0D ensure double word alignment for test
005550 3008+T106 DS 0H 01650000
005550 90EC D00C 0000C 3009+ STM 14,12,12(13) SAVE REGISTERS 02950000
005554 18CF 3010+ LR R12,R15 base register := entry address
05550 3011+ USING T106,R12 declare code base register
PAGE 57
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005556 41B0 C01E 0556E 3012+ LA R11,T106L load loop target to R11
00555A 58F0 C0F8 05648 3013+ L R15,=A(SAVETST) R15 := current save area
00555E 50DF 0004 00004 3014+ ST R13,4(R15) set back pointer in current save area
005562 182D 3015+ LR R2,R13 remember callers save area
005564 18DF 3016+ LR R13,R15 setup current save area
005566 50D2 0008 00008 3017+ ST R13,8(R2) set forw pointer in callers save area
00000 3018+ USING TDSC,R1 declare TDSC base register
00556A 58F0 1008 00008 3019+ L R15,TLRCNT load local repeat count to R15
3020+*
3021 *
3022 T106L REPINS LTR,(R2,R1) repeat: LTR R2,R1
3023+*
3024+* build from sublist &ALIST a comma separated string &ARGS
3025+*
3026+*
3027+*
3028+*
3029+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
3030+* this allows to transfer the repeat count from last TDSCGEN call
3031+*
3032+*
0556E 3033+T106L EQU *
3034+*
3035+* write a comment indicating what REPINS does (in case NOGEN in effect)
3036+*
3037+*,// REPINS: do 100 times:
3038+*
3039+* MNOTE requires that ' is doubled for expanded variables
3040+* thus build &MASTR as a copy of '&ARGS with ' doubled
3041+*
3042+*
3043+*,// LTR R2,R1
3044+*
3045+* finally generate code: &ICNT copies of &CODE &ARGS
3046+*
00556E 1221 3047+ LTR R2,R1
005570 1221 3048+ LTR R2,R1
005572 1221 3049+ LTR R2,R1
005574 1221 3050+ LTR R2,R1
005576 1221 3051+ LTR R2,R1
005578 1221 3052+ LTR R2,R1
00557A 1221 3053+ LTR R2,R1
00557C 1221 3054+ LTR R2,R1
00557E 1221 3055+ LTR R2,R1
005580 1221 3056+ LTR R2,R1
005582 1221 3057+ LTR R2,R1
005584 1221 3058+ LTR R2,R1
005586 1221 3059+ LTR R2,R1
005588 1221 3060+ LTR R2,R1
00558A 1221 3061+ LTR R2,R1
00558C 1221 3062+ LTR R2,R1
00558E 1221 3063+ LTR R2,R1
005590 1221 3064+ LTR R2,R1
005592 1221 3065+ LTR R2,R1
005594 1221 3066+ LTR R2,R1
PAGE 58
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005596 1221 3067+ LTR R2,R1
005598 1221 3068+ LTR R2,R1
00559A 1221 3069+ LTR R2,R1
00559C 1221 3070+ LTR R2,R1
00559E 1221 3071+ LTR R2,R1
0055A0 1221 3072+ LTR R2,R1
0055A2 1221 3073+ LTR R2,R1
0055A4 1221 3074+ LTR R2,R1
0055A6 1221 3075+ LTR R2,R1
0055A8 1221 3076+ LTR R2,R1
0055AA 1221 3077+ LTR R2,R1
0055AC 1221 3078+ LTR R2,R1
0055AE 1221 3079+ LTR R2,R1
0055B0 1221 3080+ LTR R2,R1
0055B2 1221 3081+ LTR R2,R1
0055B4 1221 3082+ LTR R2,R1
0055B6 1221 3083+ LTR R2,R1
0055B8 1221 3084+ LTR R2,R1
0055BA 1221 3085+ LTR R2,R1
0055BC 1221 3086+ LTR R2,R1
0055BE 1221 3087+ LTR R2,R1
0055C0 1221 3088+ LTR R2,R1
0055C2 1221 3089+ LTR R2,R1
0055C4 1221 3090+ LTR R2,R1
0055C6 1221 3091+ LTR R2,R1
0055C8 1221 3092+ LTR R2,R1
0055CA 1221 3093+ LTR R2,R1
0055CC 1221 3094+ LTR R2,R1
0055CE 1221 3095+ LTR R2,R1
0055D0 1221 3096+ LTR R2,R1
0055D2 1221 3097+ LTR R2,R1
0055D4 1221 3098+ LTR R2,R1
0055D6 1221 3099+ LTR R2,R1
0055D8 1221 3100+ LTR R2,R1
0055DA 1221 3101+ LTR R2,R1
0055DC 1221 3102+ LTR R2,R1
0055DE 1221 3103+ LTR R2,R1
0055E0 1221 3104+ LTR R2,R1
0055E2 1221 3105+ LTR R2,R1
0055E4 1221 3106+ LTR R2,R1
0055E6 1221 3107+ LTR R2,R1
0055E8 1221 3108+ LTR R2,R1
0055EA 1221 3109+ LTR R2,R1
0055EC 1221 3110+ LTR R2,R1
0055EE 1221 3111+ LTR R2,R1
0055F0 1221 3112+ LTR R2,R1
0055F2 1221 3113+ LTR R2,R1
0055F4 1221 3114+ LTR R2,R1
0055F6 1221 3115+ LTR R2,R1
0055F8 1221 3116+ LTR R2,R1
0055FA 1221 3117+ LTR R2,R1
0055FC 1221 3118+ LTR R2,R1
0055FE 1221 3119+ LTR R2,R1
005600 1221 3120+ LTR R2,R1
005602 1221 3121+ LTR R2,R1
PAGE 59
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005604 1221 3122+ LTR R2,R1
005606 1221 3123+ LTR R2,R1
005608 1221 3124+ LTR R2,R1
00560A 1221 3125+ LTR R2,R1
00560C 1221 3126+ LTR R2,R1
00560E 1221 3127+ LTR R2,R1
005610 1221 3128+ LTR R2,R1
005612 1221 3129+ LTR R2,R1
005614 1221 3130+ LTR R2,R1
005616 1221 3131+ LTR R2,R1
005618 1221 3132+ LTR R2,R1
00561A 1221 3133+ LTR R2,R1
00561C 1221 3134+ LTR R2,R1
00561E 1221 3135+ LTR R2,R1
005620 1221 3136+ LTR R2,R1
005622 1221 3137+ LTR R2,R1
005624 1221 3138+ LTR R2,R1
005626 1221 3139+ LTR R2,R1
005628 1221 3140+ LTR R2,R1
00562A 1221 3141+ LTR R2,R1
00562C 1221 3142+ LTR R2,R1
00562E 1221 3143+ LTR R2,R1
005630 1221 3144+ LTR R2,R1
005632 1221 3145+ LTR R2,R1
005634 1221 3146+ LTR R2,R1
3147+*
005636 06FB 3148 BCTR R15,R11
3149 TSIMRET
005638 58F0 C0F8 05648 3150+ L R15,=A(SAVETST) R15 := current save area
00563C 58DF 0004 00004 3151+ L R13,4(R15) get old save area back
005640 98EC D00C 0000C 3152+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005644 07FE 3153+ BR 14 RETURN 02000000
3154 TSIMEND
005648 3155+ LTORG
005648 00000458 3156 =A(SAVETST)
0564C 3157+T106TEND EQU *
3158 *
3159 * Test 107 -- LCR R,R --------------------------------------
3160 *
3161 TSIMBEG T107,13000,100,1,C'LCR R,R'
3162+*
0025C4 3163+TDSCDAT CSECT
0025C8 3164+ DS 0D
3165+*
0025C8 00005650 3166+T107TDSC DC A(T107) // TENTRY
0025CC 00000108 3167+ DC A(T107TEND-T107) // TLENGTH
0025D0 000032C8 3168+ DC F'13000' // TLRCNT
0025D4 00000064 3169+ DC F'100' // TIGCNT
0025D8 00000001 3170+ DC F'1' // TLTYPE
00102A 3171+TEXT CSECT
00102A E3F1F0F7 3172+SPTR0136 DC C'T107'
0025DC 3173+TDSCDAT CSECT
0025DC 3174+ DS 0F
0025DC 0400102A 3175+ DC AL1(L'SPTR0136),AL3(SPTR0136)
00102E 3176+TEXT CSECT
PAGE 60
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00102E D3C3D940D96BD9 3177+SPTR0137 DC C'LCR R,R'
0025E0 3178+TDSCDAT CSECT
0025E0 3179+ DS 0F
0025E0 0700102E 3180+ DC AL1(L'SPTR0137),AL3(SPTR0137)
3181+*
0049E4 3182+TDSCTBL CSECT
049E4 3183+T107TPTR EQU *
0049E4 000025C8 3184+ DC A(T107TDSC) enabled test
3185+*
00564C 3186+TCODE CSECT
005650 3187+ DS 0D ensure double word alignment for test
005650 3188+T107 DS 0H 01650000
005650 90EC D00C 0000C 3189+ STM 14,12,12(13) SAVE REGISTERS 02950000
005654 18CF 3190+ LR R12,R15 base register := entry address
05650 3191+ USING T107,R12 declare code base register
005656 41B0 C022 05672 3192+ LA R11,T107L load loop target to R11
00565A 58F0 C100 05750 3193+ L R15,=A(SAVETST) R15 := current save area
00565E 50DF 0004 00004 3194+ ST R13,4(R15) set back pointer in current save area
005662 182D 3195+ LR R2,R13 remember callers save area
005664 18DF 3196+ LR R13,R15 setup current save area
005666 50D2 0008 00008 3197+ ST R13,8(R2) set forw pointer in callers save area
00000 3198+ USING TDSC,R1 declare TDSC base register
00566A 58F0 1008 00008 3199+ L R15,TLRCNT load local repeat count to R15
3200+*
3201 *
00566E 4120 C104 05754 3202 LA R2,=F'1234'
3203 T107L REPINS LCR,(R2,R2) repeat: LCR R2,R2
3204+*
3205+* build from sublist &ALIST a comma separated string &ARGS
3206+*
3207+*
3208+*
3209+*
3210+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
3211+* this allows to transfer the repeat count from last TDSCGEN call
3212+*
3213+*
05672 3214+T107L EQU *
3215+*
3216+* write a comment indicating what REPINS does (in case NOGEN in effect)
3217+*
3218+*,// REPINS: do 100 times:
3219+*
3220+* MNOTE requires that ' is doubled for expanded variables
3221+* thus build &MASTR as a copy of '&ARGS with ' doubled
3222+*
3223+*
3224+*,// LCR R2,R2
3225+*
3226+* finally generate code: &ICNT copies of &CODE &ARGS
3227+*
005672 1322 3228+ LCR R2,R2
005674 1322 3229+ LCR R2,R2
005676 1322 3230+ LCR R2,R2
005678 1322 3231+ LCR R2,R2
PAGE 61
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00567A 1322 3232+ LCR R2,R2
00567C 1322 3233+ LCR R2,R2
00567E 1322 3234+ LCR R2,R2
005680 1322 3235+ LCR R2,R2
005682 1322 3236+ LCR R2,R2
005684 1322 3237+ LCR R2,R2
005686 1322 3238+ LCR R2,R2
005688 1322 3239+ LCR R2,R2
00568A 1322 3240+ LCR R2,R2
00568C 1322 3241+ LCR R2,R2
00568E 1322 3242+ LCR R2,R2
005690 1322 3243+ LCR R2,R2
005692 1322 3244+ LCR R2,R2
005694 1322 3245+ LCR R2,R2
005696 1322 3246+ LCR R2,R2
005698 1322 3247+ LCR R2,R2
00569A 1322 3248+ LCR R2,R2
00569C 1322 3249+ LCR R2,R2
00569E 1322 3250+ LCR R2,R2
0056A0 1322 3251+ LCR R2,R2
0056A2 1322 3252+ LCR R2,R2
0056A4 1322 3253+ LCR R2,R2
0056A6 1322 3254+ LCR R2,R2
0056A8 1322 3255+ LCR R2,R2
0056AA 1322 3256+ LCR R2,R2
0056AC 1322 3257+ LCR R2,R2
0056AE 1322 3258+ LCR R2,R2
0056B0 1322 3259+ LCR R2,R2
0056B2 1322 3260+ LCR R2,R2
0056B4 1322 3261+ LCR R2,R2
0056B6 1322 3262+ LCR R2,R2
0056B8 1322 3263+ LCR R2,R2
0056BA 1322 3264+ LCR R2,R2
0056BC 1322 3265+ LCR R2,R2
0056BE 1322 3266+ LCR R2,R2
0056C0 1322 3267+ LCR R2,R2
0056C2 1322 3268+ LCR R2,R2
0056C4 1322 3269+ LCR R2,R2
0056C6 1322 3270+ LCR R2,R2
0056C8 1322 3271+ LCR R2,R2
0056CA 1322 3272+ LCR R2,R2
0056CC 1322 3273+ LCR R2,R2
0056CE 1322 3274+ LCR R2,R2
0056D0 1322 3275+ LCR R2,R2
0056D2 1322 3276+ LCR R2,R2
0056D4 1322 3277+ LCR R2,R2
0056D6 1322 3278+ LCR R2,R2
0056D8 1322 3279+ LCR R2,R2
0056DA 1322 3280+ LCR R2,R2
0056DC 1322 3281+ LCR R2,R2
0056DE 1322 3282+ LCR R2,R2
0056E0 1322 3283+ LCR R2,R2
0056E2 1322 3284+ LCR R2,R2
0056E4 1322 3285+ LCR R2,R2
0056E6 1322 3286+ LCR R2,R2
PAGE 62
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0056E8 1322 3287+ LCR R2,R2
0056EA 1322 3288+ LCR R2,R2
0056EC 1322 3289+ LCR R2,R2
0056EE 1322 3290+ LCR R2,R2
0056F0 1322 3291+ LCR R2,R2
0056F2 1322 3292+ LCR R2,R2
0056F4 1322 3293+ LCR R2,R2
0056F6 1322 3294+ LCR R2,R2
0056F8 1322 3295+ LCR R2,R2
0056FA 1322 3296+ LCR R2,R2
0056FC 1322 3297+ LCR R2,R2
0056FE 1322 3298+ LCR R2,R2
005700 1322 3299+ LCR R2,R2
005702 1322 3300+ LCR R2,R2
005704 1322 3301+ LCR R2,R2
005706 1322 3302+ LCR R2,R2
005708 1322 3303+ LCR R2,R2
00570A 1322 3304+ LCR R2,R2
00570C 1322 3305+ LCR R2,R2
00570E 1322 3306+ LCR R2,R2
005710 1322 3307+ LCR R2,R2
005712 1322 3308+ LCR R2,R2
005714 1322 3309+ LCR R2,R2
005716 1322 3310+ LCR R2,R2
005718 1322 3311+ LCR R2,R2
00571A 1322 3312+ LCR R2,R2
00571C 1322 3313+ LCR R2,R2
00571E 1322 3314+ LCR R2,R2
005720 1322 3315+ LCR R2,R2
005722 1322 3316+ LCR R2,R2
005724 1322 3317+ LCR R2,R2
005726 1322 3318+ LCR R2,R2
005728 1322 3319+ LCR R2,R2
00572A 1322 3320+ LCR R2,R2
00572C 1322 3321+ LCR R2,R2
00572E 1322 3322+ LCR R2,R2
005730 1322 3323+ LCR R2,R2
005732 1322 3324+ LCR R2,R2
005734 1322 3325+ LCR R2,R2
005736 1322 3326+ LCR R2,R2
005738 1322 3327+ LCR R2,R2
3328+*
00573A 06FB 3329 BCTR R15,R11
3330 TSIMRET
00573C 58F0 C100 05750 3331+ L R15,=A(SAVETST) R15 := current save area
005740 58DF 0004 00004 3332+ L R13,4(R15) get old save area back
005744 98EC D00C 0000C 3333+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005748 07FE 3334+ BR 14 RETURN 02000000
3335 TSIMEND
005750 3336+ LTORG
005750 00000458 3337 =A(SAVETST)
005754 000004D2 3338 =F'1234'
05758 3339+T107TEND EQU *
3340 *
3341 * Test 108 -- LNR R,R --------------------------------------
PAGE 63
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
3342 *
3343 TSIMBEG T108,13000,100,1,C'LNR R,R'
3344+*
0025E4 3345+TDSCDAT CSECT
0025E8 3346+ DS 0D
3347+*
0025E8 00005758 3348+T108TDSC DC A(T108) // TENTRY
0025EC 00000108 3349+ DC A(T108TEND-T108) // TLENGTH
0025F0 000032C8 3350+ DC F'13000' // TLRCNT
0025F4 00000064 3351+ DC F'100' // TIGCNT
0025F8 00000001 3352+ DC F'1' // TLTYPE
001035 3353+TEXT CSECT
001035 E3F1F0F8 3354+SPTR0148 DC C'T108'
0025FC 3355+TDSCDAT CSECT
0025FC 3356+ DS 0F
0025FC 04001035 3357+ DC AL1(L'SPTR0148),AL3(SPTR0148)
001039 3358+TEXT CSECT
001039 D3D5D940D96BD9 3359+SPTR0149 DC C'LNR R,R'
002600 3360+TDSCDAT CSECT
002600 3361+ DS 0F
002600 07001039 3362+ DC AL1(L'SPTR0149),AL3(SPTR0149)
3363+*
0049E8 3364+TDSCTBL CSECT
049E8 3365+T108TPTR EQU *
0049E8 000025E8 3366+ DC A(T108TDSC) enabled test
3367+*
005758 3368+TCODE CSECT
005758 3369+ DS 0D ensure double word alignment for test
005758 3370+T108 DS 0H 01650000
005758 90EC D00C 0000C 3371+ STM 14,12,12(13) SAVE REGISTERS 02950000
00575C 18CF 3372+ LR R12,R15 base register := entry address
05758 3373+ USING T108,R12 declare code base register
00575E 41B0 C022 0577A 3374+ LA R11,T108L load loop target to R11
005762 58F0 C100 05858 3375+ L R15,=A(SAVETST) R15 := current save area
005766 50DF 0004 00004 3376+ ST R13,4(R15) set back pointer in current save area
00576A 182D 3377+ LR R2,R13 remember callers save area
00576C 18DF 3378+ LR R13,R15 setup current save area
00576E 50D2 0008 00008 3379+ ST R13,8(R2) set forw pointer in callers save area
00000 3380+ USING TDSC,R1 declare TDSC base register
005772 58F0 1008 00008 3381+ L R15,TLRCNT load local repeat count to R15
3382+*
3383 *
005776 4110 C104 0585C 3384 LA R1,=F'1234'
3385 T108L REPINS LNR,(R2,R1) repeat: LNR R2,R1
3386+*
3387+* build from sublist &ALIST a comma separated string &ARGS
3388+*
3389+*
3390+*
3391+*
3392+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
3393+* this allows to transfer the repeat count from last TDSCGEN call
3394+*
3395+*
0577A 3396+T108L EQU *
PAGE 64
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
3397+*
3398+* write a comment indicating what REPINS does (in case NOGEN in effect)
3399+*
3400+*,// REPINS: do 100 times:
3401+*
3402+* MNOTE requires that ' is doubled for expanded variables
3403+* thus build &MASTR as a copy of '&ARGS with ' doubled
3404+*
3405+*
3406+*,// LNR R2,R1
3407+*
3408+* finally generate code: &ICNT copies of &CODE &ARGS
3409+*
00577A 1121 3410+ LNR R2,R1
00577C 1121 3411+ LNR R2,R1
00577E 1121 3412+ LNR R2,R1
005780 1121 3413+ LNR R2,R1
005782 1121 3414+ LNR R2,R1
005784 1121 3415+ LNR R2,R1
005786 1121 3416+ LNR R2,R1
005788 1121 3417+ LNR R2,R1
00578A 1121 3418+ LNR R2,R1
00578C 1121 3419+ LNR R2,R1
00578E 1121 3420+ LNR R2,R1
005790 1121 3421+ LNR R2,R1
005792 1121 3422+ LNR R2,R1
005794 1121 3423+ LNR R2,R1
005796 1121 3424+ LNR R2,R1
005798 1121 3425+ LNR R2,R1
00579A 1121 3426+ LNR R2,R1
00579C 1121 3427+ LNR R2,R1
00579E 1121 3428+ LNR R2,R1
0057A0 1121 3429+ LNR R2,R1
0057A2 1121 3430+ LNR R2,R1
0057A4 1121 3431+ LNR R2,R1
0057A6 1121 3432+ LNR R2,R1
0057A8 1121 3433+ LNR R2,R1
0057AA 1121 3434+ LNR R2,R1
0057AC 1121 3435+ LNR R2,R1
0057AE 1121 3436+ LNR R2,R1
0057B0 1121 3437+ LNR R2,R1
0057B2 1121 3438+ LNR R2,R1
0057B4 1121 3439+ LNR R2,R1
0057B6 1121 3440+ LNR R2,R1
0057B8 1121 3441+ LNR R2,R1
0057BA 1121 3442+ LNR R2,R1
0057BC 1121 3443+ LNR R2,R1
0057BE 1121 3444+ LNR R2,R1
0057C0 1121 3445+ LNR R2,R1
0057C2 1121 3446+ LNR R2,R1
0057C4 1121 3447+ LNR R2,R1
0057C6 1121 3448+ LNR R2,R1
0057C8 1121 3449+ LNR R2,R1
0057CA 1121 3450+ LNR R2,R1
0057CC 1121 3451+ LNR R2,R1
PAGE 65
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0057CE 1121 3452+ LNR R2,R1
0057D0 1121 3453+ LNR R2,R1
0057D2 1121 3454+ LNR R2,R1
0057D4 1121 3455+ LNR R2,R1
0057D6 1121 3456+ LNR R2,R1
0057D8 1121 3457+ LNR R2,R1
0057DA 1121 3458+ LNR R2,R1
0057DC 1121 3459+ LNR R2,R1
0057DE 1121 3460+ LNR R2,R1
0057E0 1121 3461+ LNR R2,R1
0057E2 1121 3462+ LNR R2,R1
0057E4 1121 3463+ LNR R2,R1
0057E6 1121 3464+ LNR R2,R1
0057E8 1121 3465+ LNR R2,R1
0057EA 1121 3466+ LNR R2,R1
0057EC 1121 3467+ LNR R2,R1
0057EE 1121 3468+ LNR R2,R1
0057F0 1121 3469+ LNR R2,R1
0057F2 1121 3470+ LNR R2,R1
0057F4 1121 3471+ LNR R2,R1
0057F6 1121 3472+ LNR R2,R1
0057F8 1121 3473+ LNR R2,R1
0057FA 1121 3474+ LNR R2,R1
0057FC 1121 3475+ LNR R2,R1
0057FE 1121 3476+ LNR R2,R1
005800 1121 3477+ LNR R2,R1
005802 1121 3478+ LNR R2,R1
005804 1121 3479+ LNR R2,R1
005806 1121 3480+ LNR R2,R1
005808 1121 3481+ LNR R2,R1
00580A 1121 3482+ LNR R2,R1
00580C 1121 3483+ LNR R2,R1
00580E 1121 3484+ LNR R2,R1
005810 1121 3485+ LNR R2,R1
005812 1121 3486+ LNR R2,R1
005814 1121 3487+ LNR R2,R1
005816 1121 3488+ LNR R2,R1
005818 1121 3489+ LNR R2,R1
00581A 1121 3490+ LNR R2,R1
00581C 1121 3491+ LNR R2,R1
00581E 1121 3492+ LNR R2,R1
005820 1121 3493+ LNR R2,R1
005822 1121 3494+ LNR R2,R1
005824 1121 3495+ LNR R2,R1
005826 1121 3496+ LNR R2,R1
005828 1121 3497+ LNR R2,R1
00582A 1121 3498+ LNR R2,R1
00582C 1121 3499+ LNR R2,R1
00582E 1121 3500+ LNR R2,R1
005830 1121 3501+ LNR R2,R1
005832 1121 3502+ LNR R2,R1
005834 1121 3503+ LNR R2,R1
005836 1121 3504+ LNR R2,R1
005838 1121 3505+ LNR R2,R1
00583A 1121 3506+ LNR R2,R1
PAGE 66
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00583C 1121 3507+ LNR R2,R1
00583E 1121 3508+ LNR R2,R1
005840 1121 3509+ LNR R2,R1
3510+*
005842 06FB 3511 BCTR R15,R11
3512 TSIMRET
005844 58F0 C100 05858 3513+ L R15,=A(SAVETST) R15 := current save area
005848 58DF 0004 00004 3514+ L R13,4(R15) get old save area back
00584C 98EC D00C 0000C 3515+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005850 07FE 3516+ BR 14 RETURN 02000000
3517 TSIMEND
005858 3518+ LTORG
005858 00000458 3519 =A(SAVETST)
00585C 000004D2 3520 =F'1234'
05860 3521+T108TEND EQU *
3522 *
3523 * Test 109 -- LPR R,R --------------------------------------
3524 *
3525 TSIMBEG T109,13000,100,1,C'LPR R,R'
3526+*
002604 3527+TDSCDAT CSECT
002608 3528+ DS 0D
3529+*
002608 00005860 3530+T109TDSC DC A(T109) // TENTRY
00260C 00000108 3531+ DC A(T109TEND-T109) // TLENGTH
002610 000032C8 3532+ DC F'13000' // TLRCNT
002614 00000064 3533+ DC F'100' // TIGCNT
002618 00000001 3534+ DC F'1' // TLTYPE
001040 3535+TEXT CSECT
001040 E3F1F0F9 3536+SPTR0160 DC C'T109'
00261C 3537+TDSCDAT CSECT
00261C 3538+ DS 0F
00261C 04001040 3539+ DC AL1(L'SPTR0160),AL3(SPTR0160)
001044 3540+TEXT CSECT
001044 D3D7D940D96BD9 3541+SPTR0161 DC C'LPR R,R'
002620 3542+TDSCDAT CSECT
002620 3543+ DS 0F
002620 07001044 3544+ DC AL1(L'SPTR0161),AL3(SPTR0161)
3545+*
0049EC 3546+TDSCTBL CSECT
049EC 3547+T109TPTR EQU *
0049EC 00002608 3548+ DC A(T109TDSC) enabled test
3549+*
005860 3550+TCODE CSECT
005860 3551+ DS 0D ensure double word alignment for test
005860 3552+T109 DS 0H 01650000
005860 90EC D00C 0000C 3553+ STM 14,12,12(13) SAVE REGISTERS 02950000
005864 18CF 3554+ LR R12,R15 base register := entry address
05860 3555+ USING T109,R12 declare code base register
005866 41B0 C022 05882 3556+ LA R11,T109L load loop target to R11
00586A 58F0 C100 05960 3557+ L R15,=A(SAVETST) R15 := current save area
00586E 50DF 0004 00004 3558+ ST R13,4(R15) set back pointer in current save area
005872 182D 3559+ LR R2,R13 remember callers save area
005874 18DF 3560+ LR R13,R15 setup current save area
005876 50D2 0008 00008 3561+ ST R13,8(R2) set forw pointer in callers save area
PAGE 67
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00000 3562+ USING TDSC,R1 declare TDSC base register
00587A 58F0 1008 00008 3563+ L R15,TLRCNT load local repeat count to R15
3564+*
3565 *
00587E 4110 C104 05964 3566 LA R1,=F'-1234'
3567 T109L REPINS LPR,(R2,R1) repeat: LPR R2,R1
3568+*
3569+* build from sublist &ALIST a comma separated string &ARGS
3570+*
3571+*
3572+*
3573+*
3574+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
3575+* this allows to transfer the repeat count from last TDSCGEN call
3576+*
3577+*
05882 3578+T109L EQU *
3579+*
3580+* write a comment indicating what REPINS does (in case NOGEN in effect)
3581+*
3582+*,// REPINS: do 100 times:
3583+*
3584+* MNOTE requires that ' is doubled for expanded variables
3585+* thus build &MASTR as a copy of '&ARGS with ' doubled
3586+*
3587+*
3588+*,// LPR R2,R1
3589+*
3590+* finally generate code: &ICNT copies of &CODE &ARGS
3591+*
005882 1021 3592+ LPR R2,R1
005884 1021 3593+ LPR R2,R1
005886 1021 3594+ LPR R2,R1
005888 1021 3595+ LPR R2,R1
00588A 1021 3596+ LPR R2,R1
00588C 1021 3597+ LPR R2,R1
00588E 1021 3598+ LPR R2,R1
005890 1021 3599+ LPR R2,R1
005892 1021 3600+ LPR R2,R1
005894 1021 3601+ LPR R2,R1
005896 1021 3602+ LPR R2,R1
005898 1021 3603+ LPR R2,R1
00589A 1021 3604+ LPR R2,R1
00589C 1021 3605+ LPR R2,R1
00589E 1021 3606+ LPR R2,R1
0058A0 1021 3607+ LPR R2,R1
0058A2 1021 3608+ LPR R2,R1
0058A4 1021 3609+ LPR R2,R1
0058A6 1021 3610+ LPR R2,R1
0058A8 1021 3611+ LPR R2,R1
0058AA 1021 3612+ LPR R2,R1
0058AC 1021 3613+ LPR R2,R1
0058AE 1021 3614+ LPR R2,R1
0058B0 1021 3615+ LPR R2,R1
0058B2 1021 3616+ LPR R2,R1
PAGE 68
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0058B4 1021 3617+ LPR R2,R1
0058B6 1021 3618+ LPR R2,R1
0058B8 1021 3619+ LPR R2,R1
0058BA 1021 3620+ LPR R2,R1
0058BC 1021 3621+ LPR R2,R1
0058BE 1021 3622+ LPR R2,R1
0058C0 1021 3623+ LPR R2,R1
0058C2 1021 3624+ LPR R2,R1
0058C4 1021 3625+ LPR R2,R1
0058C6 1021 3626+ LPR R2,R1
0058C8 1021 3627+ LPR R2,R1
0058CA 1021 3628+ LPR R2,R1
0058CC 1021 3629+ LPR R2,R1
0058CE 1021 3630+ LPR R2,R1
0058D0 1021 3631+ LPR R2,R1
0058D2 1021 3632+ LPR R2,R1
0058D4 1021 3633+ LPR R2,R1
0058D6 1021 3634+ LPR R2,R1
0058D8 1021 3635+ LPR R2,R1
0058DA 1021 3636+ LPR R2,R1
0058DC 1021 3637+ LPR R2,R1
0058DE 1021 3638+ LPR R2,R1
0058E0 1021 3639+ LPR R2,R1
0058E2 1021 3640+ LPR R2,R1
0058E4 1021 3641+ LPR R2,R1
0058E6 1021 3642+ LPR R2,R1
0058E8 1021 3643+ LPR R2,R1
0058EA 1021 3644+ LPR R2,R1
0058EC 1021 3645+ LPR R2,R1
0058EE 1021 3646+ LPR R2,R1
0058F0 1021 3647+ LPR R2,R1
0058F2 1021 3648+ LPR R2,R1
0058F4 1021 3649+ LPR R2,R1
0058F6 1021 3650+ LPR R2,R1
0058F8 1021 3651+ LPR R2,R1
0058FA 1021 3652+ LPR R2,R1
0058FC 1021 3653+ LPR R2,R1
0058FE 1021 3654+ LPR R2,R1
005900 1021 3655+ LPR R2,R1
005902 1021 3656+ LPR R2,R1
005904 1021 3657+ LPR R2,R1
005906 1021 3658+ LPR R2,R1
005908 1021 3659+ LPR R2,R1
00590A 1021 3660+ LPR R2,R1
00590C 1021 3661+ LPR R2,R1
00590E 1021 3662+ LPR R2,R1
005910 1021 3663+ LPR R2,R1
005912 1021 3664+ LPR R2,R1
005914 1021 3665+ LPR R2,R1
005916 1021 3666+ LPR R2,R1
005918 1021 3667+ LPR R2,R1
00591A 1021 3668+ LPR R2,R1
00591C 1021 3669+ LPR R2,R1
00591E 1021 3670+ LPR R2,R1
005920 1021 3671+ LPR R2,R1
PAGE 69
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005922 1021 3672+ LPR R2,R1
005924 1021 3673+ LPR R2,R1
005926 1021 3674+ LPR R2,R1
005928 1021 3675+ LPR R2,R1
00592A 1021 3676+ LPR R2,R1
00592C 1021 3677+ LPR R2,R1
00592E 1021 3678+ LPR R2,R1
005930 1021 3679+ LPR R2,R1
005932 1021 3680+ LPR R2,R1
005934 1021 3681+ LPR R2,R1
005936 1021 3682+ LPR R2,R1
005938 1021 3683+ LPR R2,R1
00593A 1021 3684+ LPR R2,R1
00593C 1021 3685+ LPR R2,R1
00593E 1021 3686+ LPR R2,R1
005940 1021 3687+ LPR R2,R1
005942 1021 3688+ LPR R2,R1
005944 1021 3689+ LPR R2,R1
005946 1021 3690+ LPR R2,R1
005948 1021 3691+ LPR R2,R1
3692+*
00594A 06FB 3693 BCTR R15,R11
3694 TSIMRET
00594C 58F0 C100 05960 3695+ L R15,=A(SAVETST) R15 := current save area
005950 58DF 0004 00004 3696+ L R13,4(R15) get old save area back
005954 98EC D00C 0000C 3697+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005958 07FE 3698+ BR 14 RETURN 02000000
3699 TSIMEND
005960 3700+ LTORG
005960 00000458 3701 =A(SAVETST)
005964 FFFFFB2E 3702 =F'-1234'
05968 3703+T109TEND EQU *
3704 *
3705 * Test 11x -- store ========================================
3706 *
3707 * Test 110 -- ST R,m ---------------------------------------
3708 *
3709 TSIMBEG T110,13000,50,1,C'ST R,m'
3710+*
002624 3711+TDSCDAT CSECT
002628 3712+ DS 0D
3713+*
002628 00005968 3714+T110TDSC DC A(T110) // TENTRY
00262C 00000104 3715+ DC A(T110TEND-T110) // TLENGTH
002630 000032C8 3716+ DC F'13000' // TLRCNT
002634 00000032 3717+ DC F'50' // TIGCNT
002638 00000001 3718+ DC F'1' // TLTYPE
00104B 3719+TEXT CSECT
00104B E3F1F1F0 3720+SPTR0172 DC C'T110'
00263C 3721+TDSCDAT CSECT
00263C 3722+ DS 0F
00263C 0400104B 3723+ DC AL1(L'SPTR0172),AL3(SPTR0172)
00104F 3724+TEXT CSECT
00104F E2E340D96B94 3725+SPTR0173 DC C'ST R,m'
002640 3726+TDSCDAT CSECT
PAGE 70
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002640 3727+ DS 0F
002640 0600104F 3728+ DC AL1(L'SPTR0173),AL3(SPTR0173)
3729+*
0049F0 3730+TDSCTBL CSECT
049F0 3731+T110TPTR EQU *
0049F0 00002628 3732+ DC A(T110TDSC) enabled test
3733+*
005968 3734+TCODE CSECT
005968 3735+ DS 0D ensure double word alignment for test
005968 3736+T110 DS 0H 01650000
005968 90EC D00C 0000C 3737+ STM 14,12,12(13) SAVE REGISTERS 02950000
00596C 18CF 3738+ LR R12,R15 base register := entry address
05968 3739+ USING T110,R12 declare code base register
00596E 41B0 C01E 05986 3740+ LA R11,T110L load loop target to R11
005972 58F0 C100 05A68 3741+ L R15,=A(SAVETST) R15 := current save area
005976 50DF 0004 00004 3742+ ST R13,4(R15) set back pointer in current save area
00597A 182D 3743+ LR R2,R13 remember callers save area
00597C 18DF 3744+ LR R13,R15 setup current save area
00597E 50D2 0008 00008 3745+ ST R13,8(R2) set forw pointer in callers save area
00000 3746+ USING TDSC,R1 declare TDSC base register
005982 58F0 1008 00008 3747+ L R15,TLRCNT load local repeat count to R15
3748+*
3749 *
3750 T110L REPINS ST,(R2,T110V) repeat: ST R2,T110V
3751+*
3752+* build from sublist &ALIST a comma separated string &ARGS
3753+*
3754+*
3755+*
3756+*
3757+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
3758+* this allows to transfer the repeat count from last TDSCGEN call
3759+*
3760+*
05986 3761+T110L EQU *
3762+*
3763+* write a comment indicating what REPINS does (in case NOGEN in effect)
3764+*
3765+*,// REPINS: do 50 times:
3766+*
3767+* MNOTE requires that ' is doubled for expanded variables
3768+* thus build &MASTR as a copy of '&ARGS with ' doubled
3769+*
3770+*
3771+*,// ST R2,T110V
3772+*
3773+* finally generate code: &ICNT copies of &CODE &ARGS
3774+*
005986 5020 C0F8 05A60 3775+ ST R2,T110V
00598A 5020 C0F8 05A60 3776+ ST R2,T110V
00598E 5020 C0F8 05A60 3777+ ST R2,T110V
005992 5020 C0F8 05A60 3778+ ST R2,T110V
005996 5020 C0F8 05A60 3779+ ST R2,T110V
00599A 5020 C0F8 05A60 3780+ ST R2,T110V
00599E 5020 C0F8 05A60 3781+ ST R2,T110V
PAGE 71
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0059A2 5020 C0F8 05A60 3782+ ST R2,T110V
0059A6 5020 C0F8 05A60 3783+ ST R2,T110V
0059AA 5020 C0F8 05A60 3784+ ST R2,T110V
0059AE 5020 C0F8 05A60 3785+ ST R2,T110V
0059B2 5020 C0F8 05A60 3786+ ST R2,T110V
0059B6 5020 C0F8 05A60 3787+ ST R2,T110V
0059BA 5020 C0F8 05A60 3788+ ST R2,T110V
0059BE 5020 C0F8 05A60 3789+ ST R2,T110V
0059C2 5020 C0F8 05A60 3790+ ST R2,T110V
0059C6 5020 C0F8 05A60 3791+ ST R2,T110V
0059CA 5020 C0F8 05A60 3792+ ST R2,T110V
0059CE 5020 C0F8 05A60 3793+ ST R2,T110V
0059D2 5020 C0F8 05A60 3794+ ST R2,T110V
0059D6 5020 C0F8 05A60 3795+ ST R2,T110V
0059DA 5020 C0F8 05A60 3796+ ST R2,T110V
0059DE 5020 C0F8 05A60 3797+ ST R2,T110V
0059E2 5020 C0F8 05A60 3798+ ST R2,T110V
0059E6 5020 C0F8 05A60 3799+ ST R2,T110V
0059EA 5020 C0F8 05A60 3800+ ST R2,T110V
0059EE 5020 C0F8 05A60 3801+ ST R2,T110V
0059F2 5020 C0F8 05A60 3802+ ST R2,T110V
0059F6 5020 C0F8 05A60 3803+ ST R2,T110V
0059FA 5020 C0F8 05A60 3804+ ST R2,T110V
0059FE 5020 C0F8 05A60 3805+ ST R2,T110V
005A02 5020 C0F8 05A60 3806+ ST R2,T110V
005A06 5020 C0F8 05A60 3807+ ST R2,T110V
005A0A 5020 C0F8 05A60 3808+ ST R2,T110V
005A0E 5020 C0F8 05A60 3809+ ST R2,T110V
005A12 5020 C0F8 05A60 3810+ ST R2,T110V
005A16 5020 C0F8 05A60 3811+ ST R2,T110V
005A1A 5020 C0F8 05A60 3812+ ST R2,T110V
005A1E 5020 C0F8 05A60 3813+ ST R2,T110V
005A22 5020 C0F8 05A60 3814+ ST R2,T110V
005A26 5020 C0F8 05A60 3815+ ST R2,T110V
005A2A 5020 C0F8 05A60 3816+ ST R2,T110V
005A2E 5020 C0F8 05A60 3817+ ST R2,T110V
005A32 5020 C0F8 05A60 3818+ ST R2,T110V
005A36 5020 C0F8 05A60 3819+ ST R2,T110V
005A3A 5020 C0F8 05A60 3820+ ST R2,T110V
005A3E 5020 C0F8 05A60 3821+ ST R2,T110V
005A42 5020 C0F8 05A60 3822+ ST R2,T110V
005A46 5020 C0F8 05A60 3823+ ST R2,T110V
005A4A 5020 C0F8 05A60 3824+ ST R2,T110V
3825+*
005A4E 06FB 3826 BCTR R15,R11
3827 TSIMRET
005A50 58F0 C100 05A68 3828+ L R15,=A(SAVETST) R15 := current save area
005A54 58DF 0004 00004 3829+ L R13,4(R15) get old save area back
005A58 98EC D00C 0000C 3830+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005A5C 07FE 3831+ BR 14 RETURN 02000000
3832 *
005A60 3833 T110V DS 1F
3834 TSIMEND
005A68 3835+ LTORG
005A68 00000458 3836 =A(SAVETST)
PAGE 72
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
05A6C 3837+T110TEND EQU *
3838 *
3839 * Test 111 -- ST R,m (unal) --------------------------------
3840 *
3841 TSIMBEG T111,12000,50,1,C'ST R,m (unal)'
3842+*
002644 3843+TDSCDAT CSECT
002648 3844+ DS 0D
3845+*
002648 00005A70 3846+T111TDSC DC A(T111) // TENTRY
00264C 0000010C 3847+ DC A(T111TEND-T111) // TLENGTH
002650 00002EE0 3848+ DC F'12000' // TLRCNT
002654 00000032 3849+ DC F'50' // TIGCNT
002658 00000001 3850+ DC F'1' // TLTYPE
001055 3851+TEXT CSECT
001055 E3F1F1F1 3852+SPTR0184 DC C'T111'
00265C 3853+TDSCDAT CSECT
00265C 3854+ DS 0F
00265C 04001055 3855+ DC AL1(L'SPTR0184),AL3(SPTR0184)
001059 3856+TEXT CSECT
001059 E2E340D96B94404D 3857+SPTR0185 DC C'ST R,m (unal)'
002660 3858+TDSCDAT CSECT
002660 3859+ DS 0F
002660 0D001059 3860+ DC AL1(L'SPTR0185),AL3(SPTR0185)
3861+*
0049F4 3862+TDSCTBL CSECT
049F4 3863+T111TPTR EQU *
0049F4 00002648 3864+ DC A(T111TDSC) enabled test
3865+*
005A6C 3866+TCODE CSECT
005A70 3867+ DS 0D ensure double word alignment for test
005A70 3868+T111 DS 0H 01650000
005A70 90EC D00C 0000C 3869+ STM 14,12,12(13) SAVE REGISTERS 02950000
005A74 18CF 3870+ LR R12,R15 base register := entry address
05A70 3871+ USING T111,R12 declare code base register
005A76 41B0 C022 05A92 3872+ LA R11,T111L load loop target to R11
005A7A 58F0 C108 05B78 3873+ L R15,=A(SAVETST) R15 := current save area
005A7E 50DF 0004 00004 3874+ ST R13,4(R15) set back pointer in current save area
005A82 182D 3875+ LR R2,R13 remember callers save area
005A84 18DF 3876+ LR R13,R15 setup current save area
005A86 50D2 0008 00008 3877+ ST R13,8(R2) set forw pointer in callers save area
00000 3878+ USING TDSC,R1 declare TDSC base register
005A8A 58F0 1008 00008 3879+ L R15,TLRCNT load local repeat count to R15
3880+*
3881 *
005A8E 4130 C0FC 05B6C 3882 LA R3,T111V
3883 T111L REPINS ST,(R2,1(R3)) repeat: ST R2,1(R3)
3884+*
3885+* build from sublist &ALIST a comma separated string &ARGS
3886+*
3887+*
3888+*
3889+*
3890+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
3891+* this allows to transfer the repeat count from last TDSCGEN call
PAGE 73
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
3892+*
3893+*
05A92 3894+T111L EQU *
3895+*
3896+* write a comment indicating what REPINS does (in case NOGEN in effect)
3897+*
3898+*,// REPINS: do 50 times:
3899+*
3900+* MNOTE requires that ' is doubled for expanded variables
3901+* thus build &MASTR as a copy of '&ARGS with ' doubled
3902+*
3903+*
3904+*,// ST R2,1(R3)
3905+*
3906+* finally generate code: &ICNT copies of &CODE &ARGS
3907+*
005A92 5023 0001 00001 3908+ ST R2,1(R3)
005A96 5023 0001 00001 3909+ ST R2,1(R3)
005A9A 5023 0001 00001 3910+ ST R2,1(R3)
005A9E 5023 0001 00001 3911+ ST R2,1(R3)
005AA2 5023 0001 00001 3912+ ST R2,1(R3)
005AA6 5023 0001 00001 3913+ ST R2,1(R3)
005AAA 5023 0001 00001 3914+ ST R2,1(R3)
005AAE 5023 0001 00001 3915+ ST R2,1(R3)
005AB2 5023 0001 00001 3916+ ST R2,1(R3)
005AB6 5023 0001 00001 3917+ ST R2,1(R3)
005ABA 5023 0001 00001 3918+ ST R2,1(R3)
005ABE 5023 0001 00001 3919+ ST R2,1(R3)
005AC2 5023 0001 00001 3920+ ST R2,1(R3)
005AC6 5023 0001 00001 3921+ ST R2,1(R3)
005ACA 5023 0001 00001 3922+ ST R2,1(R3)
005ACE 5023 0001 00001 3923+ ST R2,1(R3)
005AD2 5023 0001 00001 3924+ ST R2,1(R3)
005AD6 5023 0001 00001 3925+ ST R2,1(R3)
005ADA 5023 0001 00001 3926+ ST R2,1(R3)
005ADE 5023 0001 00001 3927+ ST R2,1(R3)
005AE2 5023 0001 00001 3928+ ST R2,1(R3)
005AE6 5023 0001 00001 3929+ ST R2,1(R3)
005AEA 5023 0001 00001 3930+ ST R2,1(R3)
005AEE 5023 0001 00001 3931+ ST R2,1(R3)
005AF2 5023 0001 00001 3932+ ST R2,1(R3)
005AF6 5023 0001 00001 3933+ ST R2,1(R3)
005AFA 5023 0001 00001 3934+ ST R2,1(R3)
005AFE 5023 0001 00001 3935+ ST R2,1(R3)
005B02 5023 0001 00001 3936+ ST R2,1(R3)
005B06 5023 0001 00001 3937+ ST R2,1(R3)
005B0A 5023 0001 00001 3938+ ST R2,1(R3)
005B0E 5023 0001 00001 3939+ ST R2,1(R3)
005B12 5023 0001 00001 3940+ ST R2,1(R3)
005B16 5023 0001 00001 3941+ ST R2,1(R3)
005B1A 5023 0001 00001 3942+ ST R2,1(R3)
005B1E 5023 0001 00001 3943+ ST R2,1(R3)
005B22 5023 0001 00001 3944+ ST R2,1(R3)
005B26 5023 0001 00001 3945+ ST R2,1(R3)
005B2A 5023 0001 00001 3946+ ST R2,1(R3)
PAGE 74
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005B2E 5023 0001 00001 3947+ ST R2,1(R3)
005B32 5023 0001 00001 3948+ ST R2,1(R3)
005B36 5023 0001 00001 3949+ ST R2,1(R3)
005B3A 5023 0001 00001 3950+ ST R2,1(R3)
005B3E 5023 0001 00001 3951+ ST R2,1(R3)
005B42 5023 0001 00001 3952+ ST R2,1(R3)
005B46 5023 0001 00001 3953+ ST R2,1(R3)
005B4A 5023 0001 00001 3954+ ST R2,1(R3)
005B4E 5023 0001 00001 3955+ ST R2,1(R3)
005B52 5023 0001 00001 3956+ ST R2,1(R3)
005B56 5023 0001 00001 3957+ ST R2,1(R3)
3958+*
005B5A 06FB 3959 BCTR R15,R11
3960 TSIMRET
005B5C 58F0 C108 05B78 3961+ L R15,=A(SAVETST) R15 := current save area
005B60 58DF 0004 00004 3962+ L R13,4(R15) get old save area back
005B64 98EC D00C 0000C 3963+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005B68 07FE 3964+ BR 14 RETURN 02000000
3965 *
005B6C 3966 T111V DS 2F
3967 TSIMEND
005B78 3968+ LTORG
005B78 00000458 3969 =A(SAVETST)
05B7C 3970+T111TEND EQU *
3971 *
3972 * Test 112 -- STH R,m --------------------------------------
3973 *
3974 TSIMBEG T112,10000,50,1,C'STH R,m'
3975+*
002664 3976+TDSCDAT CSECT
002668 3977+ DS 0D
3978+*
002668 00005B80 3979+T112TDSC DC A(T112) // TENTRY
00266C 000000FC 3980+ DC A(T112TEND-T112) // TLENGTH
002670 00002710 3981+ DC F'10000' // TLRCNT
002674 00000032 3982+ DC F'50' // TIGCNT
002678 00000001 3983+ DC F'1' // TLTYPE
001066 3984+TEXT CSECT
001066 E3F1F1F2 3985+SPTR0196 DC C'T112'
00267C 3986+TDSCDAT CSECT
00267C 3987+ DS 0F
00267C 04001066 3988+ DC AL1(L'SPTR0196),AL3(SPTR0196)
00106A 3989+TEXT CSECT
00106A E2E3C840D96B94 3990+SPTR0197 DC C'STH R,m'
002680 3991+TDSCDAT CSECT
002680 3992+ DS 0F
002680 0700106A 3993+ DC AL1(L'SPTR0197),AL3(SPTR0197)
3994+*
0049F8 3995+TDSCTBL CSECT
049F8 3996+T112TPTR EQU *
0049F8 00002668 3997+ DC A(T112TDSC) enabled test
3998+*
005B7C 3999+TCODE CSECT
005B80 4000+ DS 0D ensure double word alignment for test
005B80 4001+T112 DS 0H 01650000
PAGE 75
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005B80 90EC D00C 0000C 4002+ STM 14,12,12(13) SAVE REGISTERS 02950000
005B84 18CF 4003+ LR R12,R15 base register := entry address
05B80 4004+ USING T112,R12 declare code base register
005B86 41B0 C01E 05B9E 4005+ LA R11,T112L load loop target to R11
005B8A 58F0 C0F8 05C78 4006+ L R15,=A(SAVETST) R15 := current save area
005B8E 50DF 0004 00004 4007+ ST R13,4(R15) set back pointer in current save area
005B92 182D 4008+ LR R2,R13 remember callers save area
005B94 18DF 4009+ LR R13,R15 setup current save area
005B96 50D2 0008 00008 4010+ ST R13,8(R2) set forw pointer in callers save area
00000 4011+ USING TDSC,R1 declare TDSC base register
005B9A 58F0 1008 00008 4012+ L R15,TLRCNT load local repeat count to R15
4013+*
4014 *
4015 T112L REPINS STH,(R2,T112V) repeat: STH R2,T112V
4016+*
4017+* build from sublist &ALIST a comma separated string &ARGS
4018+*
4019+*
4020+*
4021+*
4022+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
4023+* this allows to transfer the repeat count from last TDSCGEN call
4024+*
4025+*
05B9E 4026+T112L EQU *
4027+*
4028+* write a comment indicating what REPINS does (in case NOGEN in effect)
4029+*
4030+*,// REPINS: do 50 times:
4031+*
4032+* MNOTE requires that ' is doubled for expanded variables
4033+* thus build &MASTR as a copy of '&ARGS with ' doubled
4034+*
4035+*
4036+*,// STH R2,T112V
4037+*
4038+* finally generate code: &ICNT copies of &CODE &ARGS
4039+*
005B9E 4020 C0F6 05C76 4040+ STH R2,T112V
005BA2 4020 C0F6 05C76 4041+ STH R2,T112V
005BA6 4020 C0F6 05C76 4042+ STH R2,T112V
005BAA 4020 C0F6 05C76 4043+ STH R2,T112V
005BAE 4020 C0F6 05C76 4044+ STH R2,T112V
005BB2 4020 C0F6 05C76 4045+ STH R2,T112V
005BB6 4020 C0F6 05C76 4046+ STH R2,T112V
005BBA 4020 C0F6 05C76 4047+ STH R2,T112V
005BBE 4020 C0F6 05C76 4048+ STH R2,T112V
005BC2 4020 C0F6 05C76 4049+ STH R2,T112V
005BC6 4020 C0F6 05C76 4050+ STH R2,T112V
005BCA 4020 C0F6 05C76 4051+ STH R2,T112V
005BCE 4020 C0F6 05C76 4052+ STH R2,T112V
005BD2 4020 C0F6 05C76 4053+ STH R2,T112V
005BD6 4020 C0F6 05C76 4054+ STH R2,T112V
005BDA 4020 C0F6 05C76 4055+ STH R2,T112V
005BDE 4020 C0F6 05C76 4056+ STH R2,T112V
PAGE 76
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005BE2 4020 C0F6 05C76 4057+ STH R2,T112V
005BE6 4020 C0F6 05C76 4058+ STH R2,T112V
005BEA 4020 C0F6 05C76 4059+ STH R2,T112V
005BEE 4020 C0F6 05C76 4060+ STH R2,T112V
005BF2 4020 C0F6 05C76 4061+ STH R2,T112V
005BF6 4020 C0F6 05C76 4062+ STH R2,T112V
005BFA 4020 C0F6 05C76 4063+ STH R2,T112V
005BFE 4020 C0F6 05C76 4064+ STH R2,T112V
005C02 4020 C0F6 05C76 4065+ STH R2,T112V
005C06 4020 C0F6 05C76 4066+ STH R2,T112V
005C0A 4020 C0F6 05C76 4067+ STH R2,T112V
005C0E 4020 C0F6 05C76 4068+ STH R2,T112V
005C12 4020 C0F6 05C76 4069+ STH R2,T112V
005C16 4020 C0F6 05C76 4070+ STH R2,T112V
005C1A 4020 C0F6 05C76 4071+ STH R2,T112V
005C1E 4020 C0F6 05C76 4072+ STH R2,T112V
005C22 4020 C0F6 05C76 4073+ STH R2,T112V
005C26 4020 C0F6 05C76 4074+ STH R2,T112V
005C2A 4020 C0F6 05C76 4075+ STH R2,T112V
005C2E 4020 C0F6 05C76 4076+ STH R2,T112V
005C32 4020 C0F6 05C76 4077+ STH R2,T112V
005C36 4020 C0F6 05C76 4078+ STH R2,T112V
005C3A 4020 C0F6 05C76 4079+ STH R2,T112V
005C3E 4020 C0F6 05C76 4080+ STH R2,T112V
005C42 4020 C0F6 05C76 4081+ STH R2,T112V
005C46 4020 C0F6 05C76 4082+ STH R2,T112V
005C4A 4020 C0F6 05C76 4083+ STH R2,T112V
005C4E 4020 C0F6 05C76 4084+ STH R2,T112V
005C52 4020 C0F6 05C76 4085+ STH R2,T112V
005C56 4020 C0F6 05C76 4086+ STH R2,T112V
005C5A 4020 C0F6 05C76 4087+ STH R2,T112V
005C5E 4020 C0F6 05C76 4088+ STH R2,T112V
005C62 4020 C0F6 05C76 4089+ STH R2,T112V
4090+*
005C66 06FB 4091 BCTR R15,R11
4092 TSIMRET
005C68 58F0 C0F8 05C78 4093+ L R15,=A(SAVETST) R15 := current save area
005C6C 58DF 0004 00004 4094+ L R13,4(R15) get old save area back
005C70 98EC D00C 0000C 4095+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005C74 07FE 4096+ BR 14 RETURN 02000000
4097 *
005C76 4098 T112V DS 1H
4099 TSIMEND
005C78 4100+ LTORG
005C78 00000458 4101 =A(SAVETST)
05C7C 4102+T112TEND EQU *
4103 *
4104 * Test 113 -- STH R,m (unal1) ------------------------------
4105 *
4106 TSIMBEG T113,10000,50,1,C'STH R,m (unal1)'
4107+*
002684 4108+TDSCDAT CSECT
002688 4109+ DS 0D
4110+*
002688 00005C80 4111+T113TDSC DC A(T113) // TENTRY
PAGE 77
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00268C 00000104 4112+ DC A(T113TEND-T113) // TLENGTH
002690 00002710 4113+ DC F'10000' // TLRCNT
002694 00000032 4114+ DC F'50' // TIGCNT
002698 00000001 4115+ DC F'1' // TLTYPE
001071 4116+TEXT CSECT
001071 E3F1F1F3 4117+SPTR0208 DC C'T113'
00269C 4118+TDSCDAT CSECT
00269C 4119+ DS 0F
00269C 04001071 4120+ DC AL1(L'SPTR0208),AL3(SPTR0208)
001075 4121+TEXT CSECT
001075 E2E3C840D96B9440 4122+SPTR0209 DC C'STH R,m (unal1)'
0026A0 4123+TDSCDAT CSECT
0026A0 4124+ DS 0F
0026A0 0F001075 4125+ DC AL1(L'SPTR0209),AL3(SPTR0209)
4126+*
0049FC 4127+TDSCTBL CSECT
049FC 4128+T113TPTR EQU *
0049FC 00002688 4129+ DC A(T113TDSC) enabled test
4130+*
005C7C 4131+TCODE CSECT
005C80 4132+ DS 0D ensure double word alignment for test
005C80 4133+T113 DS 0H 01650000
005C80 90EC D00C 0000C 4134+ STM 14,12,12(13) SAVE REGISTERS 02950000
005C84 18CF 4135+ LR R12,R15 base register := entry address
05C80 4136+ USING T113,R12 declare code base register
005C86 41B0 C022 05CA2 4137+ LA R11,T113L load loop target to R11
005C8A 58F0 C100 05D80 4138+ L R15,=A(SAVETST) R15 := current save area
005C8E 50DF 0004 00004 4139+ ST R13,4(R15) set back pointer in current save area
005C92 182D 4140+ LR R2,R13 remember callers save area
005C94 18DF 4141+ LR R13,R15 setup current save area
005C96 50D2 0008 00008 4142+ ST R13,8(R2) set forw pointer in callers save area
00000 4143+ USING TDSC,R1 declare TDSC base register
005C9A 58F0 1008 00008 4144+ L R15,TLRCNT load local repeat count to R15
4145+*
4146 *
005C9E 4130 C0FC 05D7C 4147 LA R3,T113V
4148 T113L REPINS STH,(R2,1(R3)) repeat: STH R2,1(R3)
4149+*
4150+* build from sublist &ALIST a comma separated string &ARGS
4151+*
4152+*
4153+*
4154+*
4155+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
4156+* this allows to transfer the repeat count from last TDSCGEN call
4157+*
4158+*
05CA2 4159+T113L EQU *
4160+*
4161+* write a comment indicating what REPINS does (in case NOGEN in effect)
4162+*
4163+*,// REPINS: do 50 times:
4164+*
4165+* MNOTE requires that ' is doubled for expanded variables
4166+* thus build &MASTR as a copy of '&ARGS with ' doubled
PAGE 78
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
4167+*
4168+*
4169+*,// STH R2,1(R3)
4170+*
4171+* finally generate code: &ICNT copies of &CODE &ARGS
4172+*
005CA2 4023 0001 00001 4173+ STH R2,1(R3)
005CA6 4023 0001 00001 4174+ STH R2,1(R3)
005CAA 4023 0001 00001 4175+ STH R2,1(R3)
005CAE 4023 0001 00001 4176+ STH R2,1(R3)
005CB2 4023 0001 00001 4177+ STH R2,1(R3)
005CB6 4023 0001 00001 4178+ STH R2,1(R3)
005CBA 4023 0001 00001 4179+ STH R2,1(R3)
005CBE 4023 0001 00001 4180+ STH R2,1(R3)
005CC2 4023 0001 00001 4181+ STH R2,1(R3)
005CC6 4023 0001 00001 4182+ STH R2,1(R3)
005CCA 4023 0001 00001 4183+ STH R2,1(R3)
005CCE 4023 0001 00001 4184+ STH R2,1(R3)
005CD2 4023 0001 00001 4185+ STH R2,1(R3)
005CD6 4023 0001 00001 4186+ STH R2,1(R3)
005CDA 4023 0001 00001 4187+ STH R2,1(R3)
005CDE 4023 0001 00001 4188+ STH R2,1(R3)
005CE2 4023 0001 00001 4189+ STH R2,1(R3)
005CE6 4023 0001 00001 4190+ STH R2,1(R3)
005CEA 4023 0001 00001 4191+ STH R2,1(R3)
005CEE 4023 0001 00001 4192+ STH R2,1(R3)
005CF2 4023 0001 00001 4193+ STH R2,1(R3)
005CF6 4023 0001 00001 4194+ STH R2,1(R3)
005CFA 4023 0001 00001 4195+ STH R2,1(R3)
005CFE 4023 0001 00001 4196+ STH R2,1(R3)
005D02 4023 0001 00001 4197+ STH R2,1(R3)
005D06 4023 0001 00001 4198+ STH R2,1(R3)
005D0A 4023 0001 00001 4199+ STH R2,1(R3)
005D0E 4023 0001 00001 4200+ STH R2,1(R3)
005D12 4023 0001 00001 4201+ STH R2,1(R3)
005D16 4023 0001 00001 4202+ STH R2,1(R3)
005D1A 4023 0001 00001 4203+ STH R2,1(R3)
005D1E 4023 0001 00001 4204+ STH R2,1(R3)
005D22 4023 0001 00001 4205+ STH R2,1(R3)
005D26 4023 0001 00001 4206+ STH R2,1(R3)
005D2A 4023 0001 00001 4207+ STH R2,1(R3)
005D2E 4023 0001 00001 4208+ STH R2,1(R3)
005D32 4023 0001 00001 4209+ STH R2,1(R3)
005D36 4023 0001 00001 4210+ STH R2,1(R3)
005D3A 4023 0001 00001 4211+ STH R2,1(R3)
005D3E 4023 0001 00001 4212+ STH R2,1(R3)
005D42 4023 0001 00001 4213+ STH R2,1(R3)
005D46 4023 0001 00001 4214+ STH R2,1(R3)
005D4A 4023 0001 00001 4215+ STH R2,1(R3)
005D4E 4023 0001 00001 4216+ STH R2,1(R3)
005D52 4023 0001 00001 4217+ STH R2,1(R3)
005D56 4023 0001 00001 4218+ STH R2,1(R3)
005D5A 4023 0001 00001 4219+ STH R2,1(R3)
005D5E 4023 0001 00001 4220+ STH R2,1(R3)
005D62 4023 0001 00001 4221+ STH R2,1(R3)
PAGE 79
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005D66 4023 0001 00001 4222+ STH R2,1(R3)
4223+*
005D6A 06FB 4224 BCTR R15,R11
4225 TSIMRET
005D6C 58F0 C100 05D80 4226+ L R15,=A(SAVETST) R15 := current save area
005D70 58DF 0004 00004 4227+ L R13,4(R15) get old save area back
005D74 98EC D00C 0000C 4228+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005D78 07FE 4229+ BR 14 RETURN 02000000
4230 *
005D7C 4231 DS 0F
005D7C 4232 T113V DS 2H across halfword border
4233 TSIMEND
005D80 4234+ LTORG
005D80 00000458 4235 =A(SAVETST)
05D84 4236+T113TEND EQU *
4237 *
4238 * Test 114 -- STH R,m (unal3) ------------------------------
4239 *
4240 TSIMBEG T114,10000,50,1,C'STH R,m (unal3)'
4241+*
0026A4 4242+TDSCDAT CSECT
0026A8 4243+ DS 0D
4244+*
0026A8 00005D88 4245+T114TDSC DC A(T114) // TENTRY
0026AC 0000010C 4246+ DC A(T114TEND-T114) // TLENGTH
0026B0 00002710 4247+ DC F'10000' // TLRCNT
0026B4 00000032 4248+ DC F'50' // TIGCNT
0026B8 00000001 4249+ DC F'1' // TLTYPE
001084 4250+TEXT CSECT
001084 E3F1F1F4 4251+SPTR0220 DC C'T114'
0026BC 4252+TDSCDAT CSECT
0026BC 4253+ DS 0F
0026BC 04001084 4254+ DC AL1(L'SPTR0220),AL3(SPTR0220)
001088 4255+TEXT CSECT
001088 E2E3C840D96B9440 4256+SPTR0221 DC C'STH R,m (unal3)'
0026C0 4257+TDSCDAT CSECT
0026C0 4258+ DS 0F
0026C0 0F001088 4259+ DC AL1(L'SPTR0221),AL3(SPTR0221)
4260+*
004A00 4261+TDSCTBL CSECT
04A00 4262+T114TPTR EQU *
004A00 000026A8 4263+ DC A(T114TDSC) enabled test
4264+*
005D84 4265+TCODE CSECT
005D88 4266+ DS 0D ensure double word alignment for test
005D88 4267+T114 DS 0H 01650000
005D88 90EC D00C 0000C 4268+ STM 14,12,12(13) SAVE REGISTERS 02950000
005D8C 18CF 4269+ LR R12,R15 base register := entry address
05D88 4270+ USING T114,R12 declare code base register
005D8E 41B0 C022 05DAA 4271+ LA R11,T114L load loop target to R11
005D92 58F0 C108 05E90 4272+ L R15,=A(SAVETST) R15 := current save area
005D96 50DF 0004 00004 4273+ ST R13,4(R15) set back pointer in current save area
005D9A 182D 4274+ LR R2,R13 remember callers save area
005D9C 18DF 4275+ LR R13,R15 setup current save area
005D9E 50D2 0008 00008 4276+ ST R13,8(R2) set forw pointer in callers save area
PAGE 80
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00000 4277+ USING TDSC,R1 declare TDSC base register
005DA2 58F0 1008 00008 4278+ L R15,TLRCNT load local repeat count to R15
4279+*
4280 *
005DA6 4130 C0FC 05E84 4281 LA R3,T114V
4282 T114L REPINS STH,(R2,3(R3)) repeat: STH R2,3(R3)
4283+*
4284+* build from sublist &ALIST a comma separated string &ARGS
4285+*
4286+*
4287+*
4288+*
4289+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
4290+* this allows to transfer the repeat count from last TDSCGEN call
4291+*
4292+*
05DAA 4293+T114L EQU *
4294+*
4295+* write a comment indicating what REPINS does (in case NOGEN in effect)
4296+*
4297+*,// REPINS: do 50 times:
4298+*
4299+* MNOTE requires that ' is doubled for expanded variables
4300+* thus build &MASTR as a copy of '&ARGS with ' doubled
4301+*
4302+*
4303+*,// STH R2,3(R3)
4304+*
4305+* finally generate code: &ICNT copies of &CODE &ARGS
4306+*
005DAA 4023 0003 00003 4307+ STH R2,3(R3)
005DAE 4023 0003 00003 4308+ STH R2,3(R3)
005DB2 4023 0003 00003 4309+ STH R2,3(R3)
005DB6 4023 0003 00003 4310+ STH R2,3(R3)
005DBA 4023 0003 00003 4311+ STH R2,3(R3)
005DBE 4023 0003 00003 4312+ STH R2,3(R3)
005DC2 4023 0003 00003 4313+ STH R2,3(R3)
005DC6 4023 0003 00003 4314+ STH R2,3(R3)
005DCA 4023 0003 00003 4315+ STH R2,3(R3)
005DCE 4023 0003 00003 4316+ STH R2,3(R3)
005DD2 4023 0003 00003 4317+ STH R2,3(R3)
005DD6 4023 0003 00003 4318+ STH R2,3(R3)
005DDA 4023 0003 00003 4319+ STH R2,3(R3)
005DDE 4023 0003 00003 4320+ STH R2,3(R3)
005DE2 4023 0003 00003 4321+ STH R2,3(R3)
005DE6 4023 0003 00003 4322+ STH R2,3(R3)
005DEA 4023 0003 00003 4323+ STH R2,3(R3)
005DEE 4023 0003 00003 4324+ STH R2,3(R3)
005DF2 4023 0003 00003 4325+ STH R2,3(R3)
005DF6 4023 0003 00003 4326+ STH R2,3(R3)
005DFA 4023 0003 00003 4327+ STH R2,3(R3)
005DFE 4023 0003 00003 4328+ STH R2,3(R3)
005E02 4023 0003 00003 4329+ STH R2,3(R3)
005E06 4023 0003 00003 4330+ STH R2,3(R3)
005E0A 4023 0003 00003 4331+ STH R2,3(R3)
PAGE 81
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005E0E 4023 0003 00003 4332+ STH R2,3(R3)
005E12 4023 0003 00003 4333+ STH R2,3(R3)
005E16 4023 0003 00003 4334+ STH R2,3(R3)
005E1A 4023 0003 00003 4335+ STH R2,3(R3)
005E1E 4023 0003 00003 4336+ STH R2,3(R3)
005E22 4023 0003 00003 4337+ STH R2,3(R3)
005E26 4023 0003 00003 4338+ STH R2,3(R3)
005E2A 4023 0003 00003 4339+ STH R2,3(R3)
005E2E 4023 0003 00003 4340+ STH R2,3(R3)
005E32 4023 0003 00003 4341+ STH R2,3(R3)
005E36 4023 0003 00003 4342+ STH R2,3(R3)
005E3A 4023 0003 00003 4343+ STH R2,3(R3)
005E3E 4023 0003 00003 4344+ STH R2,3(R3)
005E42 4023 0003 00003 4345+ STH R2,3(R3)
005E46 4023 0003 00003 4346+ STH R2,3(R3)
005E4A 4023 0003 00003 4347+ STH R2,3(R3)
005E4E 4023 0003 00003 4348+ STH R2,3(R3)
005E52 4023 0003 00003 4349+ STH R2,3(R3)
005E56 4023 0003 00003 4350+ STH R2,3(R3)
005E5A 4023 0003 00003 4351+ STH R2,3(R3)
005E5E 4023 0003 00003 4352+ STH R2,3(R3)
005E62 4023 0003 00003 4353+ STH R2,3(R3)
005E66 4023 0003 00003 4354+ STH R2,3(R3)
005E6A 4023 0003 00003 4355+ STH R2,3(R3)
005E6E 4023 0003 00003 4356+ STH R2,3(R3)
4357+*
005E72 06FB 4358 BCTR R15,R11
4359 TSIMRET
005E74 58F0 C108 05E90 4360+ L R15,=A(SAVETST) R15 := current save area
005E78 58DF 0004 00004 4361+ L R13,4(R15) get old save area back
005E7C 98EC D00C 0000C 4362+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005E80 07FE 4363+ BR 14 RETURN 02000000
4364 *
005E84 4365 DS 0F
005E84 4366 T114V DS 3H across word border
4367 TSIMEND
005E90 4368+ LTORG
005E90 00000458 4369 =A(SAVETST)
05E94 4370+T114TEND EQU *
4371 *
4372 * Test 115 -- STC R,m --------------------------------------
4373 *
4374 TSIMBEG T115,11000,50,1,C'STC R,m'
4375+*
0026C4 4376+TDSCDAT CSECT
0026C8 4377+ DS 0D
4378+*
0026C8 00005E98 4379+T115TDSC DC A(T115) // TENTRY
0026CC 000000FC 4380+ DC A(T115TEND-T115) // TLENGTH
0026D0 00002AF8 4381+ DC F'11000' // TLRCNT
0026D4 00000032 4382+ DC F'50' // TIGCNT
0026D8 00000001 4383+ DC F'1' // TLTYPE
001097 4384+TEXT CSECT
001097 E3F1F1F5 4385+SPTR0232 DC C'T115'
0026DC 4386+TDSCDAT CSECT
PAGE 82
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0026DC 4387+ DS 0F
0026DC 04001097 4388+ DC AL1(L'SPTR0232),AL3(SPTR0232)
00109B 4389+TEXT CSECT
00109B E2E3C340D96B94 4390+SPTR0233 DC C'STC R,m'
0026E0 4391+TDSCDAT CSECT
0026E0 4392+ DS 0F
0026E0 0700109B 4393+ DC AL1(L'SPTR0233),AL3(SPTR0233)
4394+*
004A04 4395+TDSCTBL CSECT
04A04 4396+T115TPTR EQU *
004A04 000026C8 4397+ DC A(T115TDSC) enabled test
4398+*
005E94 4399+TCODE CSECT
005E98 4400+ DS 0D ensure double word alignment for test
005E98 4401+T115 DS 0H 01650000
005E98 90EC D00C 0000C 4402+ STM 14,12,12(13) SAVE REGISTERS 02950000
005E9C 18CF 4403+ LR R12,R15 base register := entry address
05E98 4404+ USING T115,R12 declare code base register
005E9E 41B0 C01E 05EB6 4405+ LA R11,T115L load loop target to R11
005EA2 58F0 C0F8 05F90 4406+ L R15,=A(SAVETST) R15 := current save area
005EA6 50DF 0004 00004 4407+ ST R13,4(R15) set back pointer in current save area
005EAA 182D 4408+ LR R2,R13 remember callers save area
005EAC 18DF 4409+ LR R13,R15 setup current save area
005EAE 50D2 0008 00008 4410+ ST R13,8(R2) set forw pointer in callers save area
00000 4411+ USING TDSC,R1 declare TDSC base register
005EB2 58F0 1008 00008 4412+ L R15,TLRCNT load local repeat count to R15
4413+*
4414 *
4415 T115L REPINS STC,(R2,T115V) repeat: STC R2,T115V
4416+*
4417+* build from sublist &ALIST a comma separated string &ARGS
4418+*
4419+*
4420+*
4421+*
4422+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
4423+* this allows to transfer the repeat count from last TDSCGEN call
4424+*
4425+*
05EB6 4426+T115L EQU *
4427+*
4428+* write a comment indicating what REPINS does (in case NOGEN in effect)
4429+*
4430+*,// REPINS: do 50 times:
4431+*
4432+* MNOTE requires that ' is doubled for expanded variables
4433+* thus build &MASTR as a copy of '&ARGS with ' doubled
4434+*
4435+*
4436+*,// STC R2,T115V
4437+*
4438+* finally generate code: &ICNT copies of &CODE &ARGS
4439+*
005EB6 4220 C0F6 05F8E 4440+ STC R2,T115V
005EBA 4220 C0F6 05F8E 4441+ STC R2,T115V
PAGE 83
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
005EBE 4220 C0F6 05F8E 4442+ STC R2,T115V
005EC2 4220 C0F6 05F8E 4443+ STC R2,T115V
005EC6 4220 C0F6 05F8E 4444+ STC R2,T115V
005ECA 4220 C0F6 05F8E 4445+ STC R2,T115V
005ECE 4220 C0F6 05F8E 4446+ STC R2,T115V
005ED2 4220 C0F6 05F8E 4447+ STC R2,T115V
005ED6 4220 C0F6 05F8E 4448+ STC R2,T115V
005EDA 4220 C0F6 05F8E 4449+ STC R2,T115V
005EDE 4220 C0F6 05F8E 4450+ STC R2,T115V
005EE2 4220 C0F6 05F8E 4451+ STC R2,T115V
005EE6 4220 C0F6 05F8E 4452+ STC R2,T115V
005EEA 4220 C0F6 05F8E 4453+ STC R2,T115V
005EEE 4220 C0F6 05F8E 4454+ STC R2,T115V
005EF2 4220 C0F6 05F8E 4455+ STC R2,T115V
005EF6 4220 C0F6 05F8E 4456+ STC R2,T115V
005EFA 4220 C0F6 05F8E 4457+ STC R2,T115V
005EFE 4220 C0F6 05F8E 4458+ STC R2,T115V
005F02 4220 C0F6 05F8E 4459+ STC R2,T115V
005F06 4220 C0F6 05F8E 4460+ STC R2,T115V
005F0A 4220 C0F6 05F8E 4461+ STC R2,T115V
005F0E 4220 C0F6 05F8E 4462+ STC R2,T115V
005F12 4220 C0F6 05F8E 4463+ STC R2,T115V
005F16 4220 C0F6 05F8E 4464+ STC R2,T115V
005F1A 4220 C0F6 05F8E 4465+ STC R2,T115V
005F1E 4220 C0F6 05F8E 4466+ STC R2,T115V
005F22 4220 C0F6 05F8E 4467+ STC R2,T115V
005F26 4220 C0F6 05F8E 4468+ STC R2,T115V
005F2A 4220 C0F6 05F8E 4469+ STC R2,T115V
005F2E 4220 C0F6 05F8E 4470+ STC R2,T115V
005F32 4220 C0F6 05F8E 4471+ STC R2,T115V
005F36 4220 C0F6 05F8E 4472+ STC R2,T115V
005F3A 4220 C0F6 05F8E 4473+ STC R2,T115V
005F3E 4220 C0F6 05F8E 4474+ STC R2,T115V
005F42 4220 C0F6 05F8E 4475+ STC R2,T115V
005F46 4220 C0F6 05F8E 4476+ STC R2,T115V
005F4A 4220 C0F6 05F8E 4477+ STC R2,T115V
005F4E 4220 C0F6 05F8E 4478+ STC R2,T115V
005F52 4220 C0F6 05F8E 4479+ STC R2,T115V
005F56 4220 C0F6 05F8E 4480+ STC R2,T115V
005F5A 4220 C0F6 05F8E 4481+ STC R2,T115V
005F5E 4220 C0F6 05F8E 4482+ STC R2,T115V
005F62 4220 C0F6 05F8E 4483+ STC R2,T115V
005F66 4220 C0F6 05F8E 4484+ STC R2,T115V
005F6A 4220 C0F6 05F8E 4485+ STC R2,T115V
005F6E 4220 C0F6 05F8E 4486+ STC R2,T115V
005F72 4220 C0F6 05F8E 4487+ STC R2,T115V
005F76 4220 C0F6 05F8E 4488+ STC R2,T115V
005F7A 4220 C0F6 05F8E 4489+ STC R2,T115V
4490+*
005F7E 06FB 4491 BCTR R15,R11
4492 TSIMRET
005F80 58F0 C0F8 05F90 4493+ L R15,=A(SAVETST) R15 := current save area
005F84 58DF 0004 00004 4494+ L R13,4(R15) get old save area back
005F88 98EC D00C 0000C 4495+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
005F8C 07FE 4496+ BR 14 RETURN 02000000
PAGE 84
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
4497 *
005F8E 4498 T115V DS 1H
4499 TSIMEND
005F90 4500+ LTORG
005F90 00000458 4501 =A(SAVETST)
05F94 4502+T115TEND EQU *
4503 *
4504 * Test 116 -- STCM R,i,m (1c) ------------------------------
4505 *
4506 TSIMBEG T116,8000,50,1,C'STCM R,i,m (0010)'
4507+*
0026E4 4508+TDSCDAT CSECT
0026E8 4509+ DS 0D
4510+*
0026E8 00005F98 4511+T116TDSC DC A(T116) // TENTRY
0026EC 00000104 4512+ DC A(T116TEND-T116) // TLENGTH
0026F0 00001F40 4513+ DC F'8000' // TLRCNT
0026F4 00000032 4514+ DC F'50' // TIGCNT
0026F8 00000001 4515+ DC F'1' // TLTYPE
0010A2 4516+TEXT CSECT
0010A2 E3F1F1F6 4517+SPTR0244 DC C'T116'
0026FC 4518+TDSCDAT CSECT
0026FC 4519+ DS 0F
0026FC 040010A2 4520+ DC AL1(L'SPTR0244),AL3(SPTR0244)
0010A6 4521+TEXT CSECT
0010A6 E2E3C3D440D96B89 4522+SPTR0245 DC C'STCM R,i,m (0010)'
002700 4523+TDSCDAT CSECT
002700 4524+ DS 0F
002700 110010A6 4525+ DC AL1(L'SPTR0245),AL3(SPTR0245)
4526+*
004A08 4527+TDSCTBL CSECT
04A08 4528+T116TPTR EQU *
004A08 000026E8 4529+ DC A(T116TDSC) enabled test
4530+*
005F94 4531+TCODE CSECT
005F98 4532+ DS 0D ensure double word alignment for test
005F98 4533+T116 DS 0H 01650000
005F98 90EC D00C 0000C 4534+ STM 14,12,12(13) SAVE REGISTERS 02950000
005F9C 18CF 4535+ LR R12,R15 base register := entry address
05F98 4536+ USING T116,R12 declare code base register
005F9E 41B0 C01E 05FB6 4537+ LA R11,T116L load loop target to R11
005FA2 58F0 C100 06098 4538+ L R15,=A(SAVETST) R15 := current save area
005FA6 50DF 0004 00004 4539+ ST R13,4(R15) set back pointer in current save area
005FAA 182D 4540+ LR R2,R13 remember callers save area
005FAC 18DF 4541+ LR R13,R15 setup current save area
005FAE 50D2 0008 00008 4542+ ST R13,8(R2) set forw pointer in callers save area
00000 4543+ USING TDSC,R1 declare TDSC base register
005FB2 58F0 1008 00008 4544+ L R15,TLRCNT load local repeat count to R15
4545+*
4546 *
4547 T116L REPINS STCM,(R2,B'0010',T116V) repeat: STCM R2,B'0010',T116V
4548+*
4549+* build from sublist &ALIST a comma separated string &ARGS
4550+*
4551+*
PAGE 85
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
4552+*
4553+*
4554+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
4555+* this allows to transfer the repeat count from last TDSCGEN call
4556+*
4557+*
05FB6 4558+T116L EQU *
4559+*
4560+* write a comment indicating what REPINS does (in case NOGEN in effect)
4561+*
4562+*,// REPINS: do 50 times:
4563+*
4564+* MNOTE requires that ' is doubled for expanded variables
4565+* thus build &MASTR as a copy of '&ARGS with ' doubled
4566+*
4567+*
4568+*,// STCM R2,B'0010',T116V
4569+*
4570+* finally generate code: &ICNT copies of &CODE &ARGS
4571+*
005FB6 BE22 C0F8 06090 4572+ STCM R2,B'0010',T116V
005FBA BE22 C0F8 06090 4573+ STCM R2,B'0010',T116V
005FBE BE22 C0F8 06090 4574+ STCM R2,B'0010',T116V
005FC2 BE22 C0F8 06090 4575+ STCM R2,B'0010',T116V
005FC6 BE22 C0F8 06090 4576+ STCM R2,B'0010',T116V
005FCA BE22 C0F8 06090 4577+ STCM R2,B'0010',T116V
005FCE BE22 C0F8 06090 4578+ STCM R2,B'0010',T116V
005FD2 BE22 C0F8 06090 4579+ STCM R2,B'0010',T116V
005FD6 BE22 C0F8 06090 4580+ STCM R2,B'0010',T116V
005FDA BE22 C0F8 06090 4581+ STCM R2,B'0010',T116V
005FDE BE22 C0F8 06090 4582+ STCM R2,B'0010',T116V
005FE2 BE22 C0F8 06090 4583+ STCM R2,B'0010',T116V
005FE6 BE22 C0F8 06090 4584+ STCM R2,B'0010',T116V
005FEA BE22 C0F8 06090 4585+ STCM R2,B'0010',T116V
005FEE BE22 C0F8 06090 4586+ STCM R2,B'0010',T116V
005FF2 BE22 C0F8 06090 4587+ STCM R2,B'0010',T116V
005FF6 BE22 C0F8 06090 4588+ STCM R2,B'0010',T116V
005FFA BE22 C0F8 06090 4589+ STCM R2,B'0010',T116V
005FFE BE22 C0F8 06090 4590+ STCM R2,B'0010',T116V
006002 BE22 C0F8 06090 4591+ STCM R2,B'0010',T116V
006006 BE22 C0F8 06090 4592+ STCM R2,B'0010',T116V
00600A BE22 C0F8 06090 4593+ STCM R2,B'0010',T116V
00600E BE22 C0F8 06090 4594+ STCM R2,B'0010',T116V
006012 BE22 C0F8 06090 4595+ STCM R2,B'0010',T116V
006016 BE22 C0F8 06090 4596+ STCM R2,B'0010',T116V
00601A BE22 C0F8 06090 4597+ STCM R2,B'0010',T116V
00601E BE22 C0F8 06090 4598+ STCM R2,B'0010',T116V
006022 BE22 C0F8 06090 4599+ STCM R2,B'0010',T116V
006026 BE22 C0F8 06090 4600+ STCM R2,B'0010',T116V
00602A BE22 C0F8 06090 4601+ STCM R2,B'0010',T116V
00602E BE22 C0F8 06090 4602+ STCM R2,B'0010',T116V
006032 BE22 C0F8 06090 4603+ STCM R2,B'0010',T116V
006036 BE22 C0F8 06090 4604+ STCM R2,B'0010',T116V
00603A BE22 C0F8 06090 4605+ STCM R2,B'0010',T116V
00603E BE22 C0F8 06090 4606+ STCM R2,B'0010',T116V
PAGE 86
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
006042 BE22 C0F8 06090 4607+ STCM R2,B'0010',T116V
006046 BE22 C0F8 06090 4608+ STCM R2,B'0010',T116V
00604A BE22 C0F8 06090 4609+ STCM R2,B'0010',T116V
00604E BE22 C0F8 06090 4610+ STCM R2,B'0010',T116V
006052 BE22 C0F8 06090 4611+ STCM R2,B'0010',T116V
006056 BE22 C0F8 06090 4612+ STCM R2,B'0010',T116V
00605A BE22 C0F8 06090 4613+ STCM R2,B'0010',T116V
00605E BE22 C0F8 06090 4614+ STCM R2,B'0010',T116V
006062 BE22 C0F8 06090 4615+ STCM R2,B'0010',T116V
006066 BE22 C0F8 06090 4616+ STCM R2,B'0010',T116V
00606A BE22 C0F8 06090 4617+ STCM R2,B'0010',T116V
00606E BE22 C0F8 06090 4618+ STCM R2,B'0010',T116V
006072 BE22 C0F8 06090 4619+ STCM R2,B'0010',T116V
006076 BE22 C0F8 06090 4620+ STCM R2,B'0010',T116V
00607A BE22 C0F8 06090 4621+ STCM R2,B'0010',T116V
4622+*
00607E 06FB 4623 BCTR R15,R11
4624 TSIMRET
006080 58F0 C100 06098 4625+ L R15,=A(SAVETST) R15 := current save area
006084 58DF 0004 00004 4626+ L R13,4(R15) get old save area back
006088 98EC D00C 0000C 4627+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00608C 07FE 4628+ BR 14 RETURN 02000000
4629 *
006090 4630 T116V DS 1F
4631 TSIMEND
006098 4632+ LTORG
006098 00000458 4633 =A(SAVETST)
0609C 4634+T116TEND EQU *
4635 *
4636 * Test 117 -- STCM R,i,m (2c) ------------------------------
4637 *
4638 TSIMBEG T117,7000,50,1,C'STCM R,i,m (1100)'
4639+*
002704 4640+TDSCDAT CSECT
002708 4641+ DS 0D
4642+*
002708 000060A0 4643+T117TDSC DC A(T117) // TENTRY
00270C 00000104 4644+ DC A(T117TEND-T117) // TLENGTH
002710 00001B58 4645+ DC F'7000' // TLRCNT
002714 00000032 4646+ DC F'50' // TIGCNT
002718 00000001 4647+ DC F'1' // TLTYPE
0010B7 4648+TEXT CSECT
0010B7 E3F1F1F7 4649+SPTR0256 DC C'T117'
00271C 4650+TDSCDAT CSECT
00271C 4651+ DS 0F
00271C 040010B7 4652+ DC AL1(L'SPTR0256),AL3(SPTR0256)
0010BB 4653+TEXT CSECT
0010BB E2E3C3D440D96B89 4654+SPTR0257 DC C'STCM R,i,m (1100)'
002720 4655+TDSCDAT CSECT
002720 4656+ DS 0F
002720 110010BB 4657+ DC AL1(L'SPTR0257),AL3(SPTR0257)
4658+*
004A0C 4659+TDSCTBL CSECT
04A0C 4660+T117TPTR EQU *
004A0C 00002708 4661+ DC A(T117TDSC) enabled test
PAGE 87
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
4662+*
00609C 4663+TCODE CSECT
0060A0 4664+ DS 0D ensure double word alignment for test
0060A0 4665+T117 DS 0H 01650000
0060A0 90EC D00C 0000C 4666+ STM 14,12,12(13) SAVE REGISTERS 02950000
0060A4 18CF 4667+ LR R12,R15 base register := entry address
060A0 4668+ USING T117,R12 declare code base register
0060A6 41B0 C01E 060BE 4669+ LA R11,T117L load loop target to R11
0060AA 58F0 C100 061A0 4670+ L R15,=A(SAVETST) R15 := current save area
0060AE 50DF 0004 00004 4671+ ST R13,4(R15) set back pointer in current save area
0060B2 182D 4672+ LR R2,R13 remember callers save area
0060B4 18DF 4673+ LR R13,R15 setup current save area
0060B6 50D2 0008 00008 4674+ ST R13,8(R2) set forw pointer in callers save area
00000 4675+ USING TDSC,R1 declare TDSC base register
0060BA 58F0 1008 00008 4676+ L R15,TLRCNT load local repeat count to R15
4677+*
4678 *
4679 T117L REPINS STCM,(R2,B'1100',T117V) repeat: STCM R2,B'1100',T117V
4680+*
4681+* build from sublist &ALIST a comma separated string &ARGS
4682+*
4683+*
4684+*
4685+*
4686+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
4687+* this allows to transfer the repeat count from last TDSCGEN call
4688+*
4689+*
060BE 4690+T117L EQU *
4691+*
4692+* write a comment indicating what REPINS does (in case NOGEN in effect)
4693+*
4694+*,// REPINS: do 50 times:
4695+*
4696+* MNOTE requires that ' is doubled for expanded variables
4697+* thus build &MASTR as a copy of '&ARGS with ' doubled
4698+*
4699+*
4700+*,// STCM R2,B'1100',T117V
4701+*
4702+* finally generate code: &ICNT copies of &CODE &ARGS
4703+*
0060BE BE2C C0F8 06198 4704+ STCM R2,B'1100',T117V
0060C2 BE2C C0F8 06198 4705+ STCM R2,B'1100',T117V
0060C6 BE2C C0F8 06198 4706+ STCM R2,B'1100',T117V
0060CA BE2C C0F8 06198 4707+ STCM R2,B'1100',T117V
0060CE BE2C C0F8 06198 4708+ STCM R2,B'1100',T117V
0060D2 BE2C C0F8 06198 4709+ STCM R2,B'1100',T117V
0060D6 BE2C C0F8 06198 4710+ STCM R2,B'1100',T117V
0060DA BE2C C0F8 06198 4711+ STCM R2,B'1100',T117V
0060DE BE2C C0F8 06198 4712+ STCM R2,B'1100',T117V
0060E2 BE2C C0F8 06198 4713+ STCM R2,B'1100',T117V
0060E6 BE2C C0F8 06198 4714+ STCM R2,B'1100',T117V
0060EA BE2C C0F8 06198 4715+ STCM R2,B'1100',T117V
0060EE BE2C C0F8 06198 4716+ STCM R2,B'1100',T117V
PAGE 88
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0060F2 BE2C C0F8 06198 4717+ STCM R2,B'1100',T117V
0060F6 BE2C C0F8 06198 4718+ STCM R2,B'1100',T117V
0060FA BE2C C0F8 06198 4719+ STCM R2,B'1100',T117V
0060FE BE2C C0F8 06198 4720+ STCM R2,B'1100',T117V
006102 BE2C C0F8 06198 4721+ STCM R2,B'1100',T117V
006106 BE2C C0F8 06198 4722+ STCM R2,B'1100',T117V
00610A BE2C C0F8 06198 4723+ STCM R2,B'1100',T117V
00610E BE2C C0F8 06198 4724+ STCM R2,B'1100',T117V
006112 BE2C C0F8 06198 4725+ STCM R2,B'1100',T117V
006116 BE2C C0F8 06198 4726+ STCM R2,B'1100',T117V
00611A BE2C C0F8 06198 4727+ STCM R2,B'1100',T117V
00611E BE2C C0F8 06198 4728+ STCM R2,B'1100',T117V
006122 BE2C C0F8 06198 4729+ STCM R2,B'1100',T117V
006126 BE2C C0F8 06198 4730+ STCM R2,B'1100',T117V
00612A BE2C C0F8 06198 4731+ STCM R2,B'1100',T117V
00612E BE2C C0F8 06198 4732+ STCM R2,B'1100',T117V
006132 BE2C C0F8 06198 4733+ STCM R2,B'1100',T117V
006136 BE2C C0F8 06198 4734+ STCM R2,B'1100',T117V
00613A BE2C C0F8 06198 4735+ STCM R2,B'1100',T117V
00613E BE2C C0F8 06198 4736+ STCM R2,B'1100',T117V
006142 BE2C C0F8 06198 4737+ STCM R2,B'1100',T117V
006146 BE2C C0F8 06198 4738+ STCM R2,B'1100',T117V
00614A BE2C C0F8 06198 4739+ STCM R2,B'1100',T117V
00614E BE2C C0F8 06198 4740+ STCM R2,B'1100',T117V
006152 BE2C C0F8 06198 4741+ STCM R2,B'1100',T117V
006156 BE2C C0F8 06198 4742+ STCM R2,B'1100',T117V
00615A BE2C C0F8 06198 4743+ STCM R2,B'1100',T117V
00615E BE2C C0F8 06198 4744+ STCM R2,B'1100',T117V
006162 BE2C C0F8 06198 4745+ STCM R2,B'1100',T117V
006166 BE2C C0F8 06198 4746+ STCM R2,B'1100',T117V
00616A BE2C C0F8 06198 4747+ STCM R2,B'1100',T117V
00616E BE2C C0F8 06198 4748+ STCM R2,B'1100',T117V
006172 BE2C C0F8 06198 4749+ STCM R2,B'1100',T117V
006176 BE2C C0F8 06198 4750+ STCM R2,B'1100',T117V
00617A BE2C C0F8 06198 4751+ STCM R2,B'1100',T117V
00617E BE2C C0F8 06198 4752+ STCM R2,B'1100',T117V
006182 BE2C C0F8 06198 4753+ STCM R2,B'1100',T117V
4754+*
006186 06FB 4755 BCTR R15,R11
4756 TSIMRET
006188 58F0 C100 061A0 4757+ L R15,=A(SAVETST) R15 := current save area
00618C 58DF 0004 00004 4758+ L R13,4(R15) get old save area back
006190 98EC D00C 0000C 4759+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
006194 07FE 4760+ BR 14 RETURN 02000000
4761 *
006198 4762 T117V DS 1F
4763 TSIMEND
0061A0 4764+ LTORG
0061A0 00000458 4765 =A(SAVETST)
061A4 4766+T117TEND EQU *
4767 *
4768 * Test 118 -- STCM R,i,m (3c) ------------------------------
4769 *
4770 TSIMBEG T118,10000,50,1,C'STCM R,i,m (0111)'
4771+*
PAGE 89
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002724 4772+TDSCDAT CSECT
002728 4773+ DS 0D
4774+*
002728 000061A8 4775+T118TDSC DC A(T118) // TENTRY
00272C 00000104 4776+ DC A(T118TEND-T118) // TLENGTH
002730 00002710 4777+ DC F'10000' // TLRCNT
002734 00000032 4778+ DC F'50' // TIGCNT
002738 00000001 4779+ DC F'1' // TLTYPE
0010CC 4780+TEXT CSECT
0010CC E3F1F1F8 4781+SPTR0268 DC C'T118'
00273C 4782+TDSCDAT CSECT
00273C 4783+ DS 0F
00273C 040010CC 4784+ DC AL1(L'SPTR0268),AL3(SPTR0268)
0010D0 4785+TEXT CSECT
0010D0 E2E3C3D440D96B89 4786+SPTR0269 DC C'STCM R,i,m (0111)'
002740 4787+TDSCDAT CSECT
002740 4788+ DS 0F
002740 110010D0 4789+ DC AL1(L'SPTR0269),AL3(SPTR0269)
4790+*
004A10 4791+TDSCTBL CSECT
04A10 4792+T118TPTR EQU *
004A10 00002728 4793+ DC A(T118TDSC) enabled test
4794+*
0061A4 4795+TCODE CSECT
0061A8 4796+ DS 0D ensure double word alignment for test
0061A8 4797+T118 DS 0H 01650000
0061A8 90EC D00C 0000C 4798+ STM 14,12,12(13) SAVE REGISTERS 02950000
0061AC 18CF 4799+ LR R12,R15 base register := entry address
061A8 4800+ USING T118,R12 declare code base register
0061AE 41B0 C01E 061C6 4801+ LA R11,T118L load loop target to R11
0061B2 58F0 C100 062A8 4802+ L R15,=A(SAVETST) R15 := current save area
0061B6 50DF 0004 00004 4803+ ST R13,4(R15) set back pointer in current save area
0061BA 182D 4804+ LR R2,R13 remember callers save area
0061BC 18DF 4805+ LR R13,R15 setup current save area
0061BE 50D2 0008 00008 4806+ ST R13,8(R2) set forw pointer in callers save area
00000 4807+ USING TDSC,R1 declare TDSC base register
0061C2 58F0 1008 00008 4808+ L R15,TLRCNT load local repeat count to R15
4809+*
4810 *
4811 T118L REPINS STCM,(R2,B'0111',T118V) repeat: STCM R2,B'0111',T118V
4812+*
4813+* build from sublist &ALIST a comma separated string &ARGS
4814+*
4815+*
4816+*
4817+*
4818+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
4819+* this allows to transfer the repeat count from last TDSCGEN call
4820+*
4821+*
061C6 4822+T118L EQU *
4823+*
4824+* write a comment indicating what REPINS does (in case NOGEN in effect)
4825+*
4826+*,// REPINS: do 50 times:
PAGE 90
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
4827+*
4828+* MNOTE requires that ' is doubled for expanded variables
4829+* thus build &MASTR as a copy of '&ARGS with ' doubled
4830+*
4831+*
4832+*,// STCM R2,B'0111',T118V
4833+*
4834+* finally generate code: &ICNT copies of &CODE &ARGS
4835+*
0061C6 BE27 C0F8 062A0 4836+ STCM R2,B'0111',T118V
0061CA BE27 C0F8 062A0 4837+ STCM R2,B'0111',T118V
0061CE BE27 C0F8 062A0 4838+ STCM R2,B'0111',T118V
0061D2 BE27 C0F8 062A0 4839+ STCM R2,B'0111',T118V
0061D6 BE27 C0F8 062A0 4840+ STCM R2,B'0111',T118V
0061DA BE27 C0F8 062A0 4841+ STCM R2,B'0111',T118V
0061DE BE27 C0F8 062A0 4842+ STCM R2,B'0111',T118V
0061E2 BE27 C0F8 062A0 4843+ STCM R2,B'0111',T118V
0061E6 BE27 C0F8 062A0 4844+ STCM R2,B'0111',T118V
0061EA BE27 C0F8 062A0 4845+ STCM R2,B'0111',T118V
0061EE BE27 C0F8 062A0 4846+ STCM R2,B'0111',T118V
0061F2 BE27 C0F8 062A0 4847+ STCM R2,B'0111',T118V
0061F6 BE27 C0F8 062A0 4848+ STCM R2,B'0111',T118V
0061FA BE27 C0F8 062A0 4849+ STCM R2,B'0111',T118V
0061FE BE27 C0F8 062A0 4850+ STCM R2,B'0111',T118V
006202 BE27 C0F8 062A0 4851+ STCM R2,B'0111',T118V
006206 BE27 C0F8 062A0 4852+ STCM R2,B'0111',T118V
00620A BE27 C0F8 062A0 4853+ STCM R2,B'0111',T118V
00620E BE27 C0F8 062A0 4854+ STCM R2,B'0111',T118V
006212 BE27 C0F8 062A0 4855+ STCM R2,B'0111',T118V
006216 BE27 C0F8 062A0 4856+ STCM R2,B'0111',T118V
00621A BE27 C0F8 062A0 4857+ STCM R2,B'0111',T118V
00621E BE27 C0F8 062A0 4858+ STCM R2,B'0111',T118V
006222 BE27 C0F8 062A0 4859+ STCM R2,B'0111',T118V
006226 BE27 C0F8 062A0 4860+ STCM R2,B'0111',T118V
00622A BE27 C0F8 062A0 4861+ STCM R2,B'0111',T118V
00622E BE27 C0F8 062A0 4862+ STCM R2,B'0111',T118V
006232 BE27 C0F8 062A0 4863+ STCM R2,B'0111',T118V
006236 BE27 C0F8 062A0 4864+ STCM R2,B'0111',T118V
00623A BE27 C0F8 062A0 4865+ STCM R2,B'0111',T118V
00623E BE27 C0F8 062A0 4866+ STCM R2,B'0111',T118V
006242 BE27 C0F8 062A0 4867+ STCM R2,B'0111',T118V
006246 BE27 C0F8 062A0 4868+ STCM R2,B'0111',T118V
00624A BE27 C0F8 062A0 4869+ STCM R2,B'0111',T118V
00624E BE27 C0F8 062A0 4870+ STCM R2,B'0111',T118V
006252 BE27 C0F8 062A0 4871+ STCM R2,B'0111',T118V
006256 BE27 C0F8 062A0 4872+ STCM R2,B'0111',T118V
00625A BE27 C0F8 062A0 4873+ STCM R2,B'0111',T118V
00625E BE27 C0F8 062A0 4874+ STCM R2,B'0111',T118V
006262 BE27 C0F8 062A0 4875+ STCM R2,B'0111',T118V
006266 BE27 C0F8 062A0 4876+ STCM R2,B'0111',T118V
00626A BE27 C0F8 062A0 4877+ STCM R2,B'0111',T118V
00626E BE27 C0F8 062A0 4878+ STCM R2,B'0111',T118V
006272 BE27 C0F8 062A0 4879+ STCM R2,B'0111',T118V
006276 BE27 C0F8 062A0 4880+ STCM R2,B'0111',T118V
00627A BE27 C0F8 062A0 4881+ STCM R2,B'0111',T118V
PAGE 91
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00627E BE27 C0F8 062A0 4882+ STCM R2,B'0111',T118V
006282 BE27 C0F8 062A0 4883+ STCM R2,B'0111',T118V
006286 BE27 C0F8 062A0 4884+ STCM R2,B'0111',T118V
00628A BE27 C0F8 062A0 4885+ STCM R2,B'0111',T118V
4886+*
00628E 06FB 4887 BCTR R15,R11
4888 TSIMRET
006290 58F0 C100 062A8 4889+ L R15,=A(SAVETST) R15 := current save area
006294 58DF 0004 00004 4890+ L R13,4(R15) get old save area back
006298 98EC D00C 0000C 4891+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00629C 07FE 4892+ BR 14 RETURN 02000000
4893 *
0062A0 4894 T118V DS 1F
4895 TSIMEND
0062A8 4896+ LTORG
0062A8 00000458 4897 =A(SAVETST)
062AC 4898+T118TEND EQU *
4899 *
4900 * Test 12x -- load/store multiple ==========================
4901 *
4902 * Test 120 -- STM 2,3,m ------------------------------------
4903 *
4904 TSIMBEG T120,9000,50,1,C'STM 2,3,m (2r)'
4905+*
002744 4906+TDSCDAT CSECT
002748 4907+ DS 0D
4908+*
002748 000062B0 4909+T120TDSC DC A(T120) // TENTRY
00274C 00000104 4910+ DC A(T120TEND-T120) // TLENGTH
002750 00002328 4911+ DC F'9000' // TLRCNT
002754 00000032 4912+ DC F'50' // TIGCNT
002758 00000001 4913+ DC F'1' // TLTYPE
0010E1 4914+TEXT CSECT
0010E1 E3F1F2F0 4915+SPTR0280 DC C'T120'
00275C 4916+TDSCDAT CSECT
00275C 4917+ DS 0F
00275C 040010E1 4918+ DC AL1(L'SPTR0280),AL3(SPTR0280)
0010E5 4919+TEXT CSECT
0010E5 E2E3D440F26BF36B 4920+SPTR0281 DC C'STM 2,3,m (2r)'
002760 4921+TDSCDAT CSECT
002760 4922+ DS 0F
002760 0E0010E5 4923+ DC AL1(L'SPTR0281),AL3(SPTR0281)
4924+*
004A14 4925+TDSCTBL CSECT
04A14 4926+T120TPTR EQU *
004A14 00002748 4927+ DC A(T120TDSC) enabled test
4928+*
0062AC 4929+TCODE CSECT
0062B0 4930+ DS 0D ensure double word alignment for test
0062B0 4931+T120 DS 0H 01650000
0062B0 90EC D00C 0000C 4932+ STM 14,12,12(13) SAVE REGISTERS 02950000
0062B4 18CF 4933+ LR R12,R15 base register := entry address
062B0 4934+ USING T120,R12 declare code base register
0062B6 41B0 C01E 062CE 4935+ LA R11,T120L load loop target to R11
0062BA 58F0 C100 063B0 4936+ L R15,=A(SAVETST) R15 := current save area
PAGE 92
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0062BE 50DF 0004 00004 4937+ ST R13,4(R15) set back pointer in current save area
0062C2 182D 4938+ LR R2,R13 remember callers save area
0062C4 18DF 4939+ LR R13,R15 setup current save area
0062C6 50D2 0008 00008 4940+ ST R13,8(R2) set forw pointer in callers save area
00000 4941+ USING TDSC,R1 declare TDSC base register
0062CA 58F0 1008 00008 4942+ L R15,TLRCNT load local repeat count to R15
4943+*
4944 *
4945 T120L REPINS STM,(2,3,T120V) repeat: STM 2,3,T120V
4946+*
4947+* build from sublist &ALIST a comma separated string &ARGS
4948+*
4949+*
4950+*
4951+*
4952+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
4953+* this allows to transfer the repeat count from last TDSCGEN call
4954+*
4955+*
062CE 4956+T120L EQU *
4957+*
4958+* write a comment indicating what REPINS does (in case NOGEN in effect)
4959+*
4960+*,// REPINS: do 50 times:
4961+*
4962+* MNOTE requires that ' is doubled for expanded variables
4963+* thus build &MASTR as a copy of '&ARGS with ' doubled
4964+*
4965+*
4966+*,// STM 2,3,T120V
4967+*
4968+* finally generate code: &ICNT copies of &CODE &ARGS
4969+*
0062CE 9023 C0F8 063A8 4970+ STM 2,3,T120V
0062D2 9023 C0F8 063A8 4971+ STM 2,3,T120V
0062D6 9023 C0F8 063A8 4972+ STM 2,3,T120V
0062DA 9023 C0F8 063A8 4973+ STM 2,3,T120V
0062DE 9023 C0F8 063A8 4974+ STM 2,3,T120V
0062E2 9023 C0F8 063A8 4975+ STM 2,3,T120V
0062E6 9023 C0F8 063A8 4976+ STM 2,3,T120V
0062EA 9023 C0F8 063A8 4977+ STM 2,3,T120V
0062EE 9023 C0F8 063A8 4978+ STM 2,3,T120V
0062F2 9023 C0F8 063A8 4979+ STM 2,3,T120V
0062F6 9023 C0F8 063A8 4980+ STM 2,3,T120V
0062FA 9023 C0F8 063A8 4981+ STM 2,3,T120V
0062FE 9023 C0F8 063A8 4982+ STM 2,3,T120V
006302 9023 C0F8 063A8 4983+ STM 2,3,T120V
006306 9023 C0F8 063A8 4984+ STM 2,3,T120V
00630A 9023 C0F8 063A8 4985+ STM 2,3,T120V
00630E 9023 C0F8 063A8 4986+ STM 2,3,T120V
006312 9023 C0F8 063A8 4987+ STM 2,3,T120V
006316 9023 C0F8 063A8 4988+ STM 2,3,T120V
00631A 9023 C0F8 063A8 4989+ STM 2,3,T120V
00631E 9023 C0F8 063A8 4990+ STM 2,3,T120V
006322 9023 C0F8 063A8 4991+ STM 2,3,T120V
PAGE 93
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
006326 9023 C0F8 063A8 4992+ STM 2,3,T120V
00632A 9023 C0F8 063A8 4993+ STM 2,3,T120V
00632E 9023 C0F8 063A8 4994+ STM 2,3,T120V
006332 9023 C0F8 063A8 4995+ STM 2,3,T120V
006336 9023 C0F8 063A8 4996+ STM 2,3,T120V
00633A 9023 C0F8 063A8 4997+ STM 2,3,T120V
00633E 9023 C0F8 063A8 4998+ STM 2,3,T120V
006342 9023 C0F8 063A8 4999+ STM 2,3,T120V
006346 9023 C0F8 063A8 5000+ STM 2,3,T120V
00634A 9023 C0F8 063A8 5001+ STM 2,3,T120V
00634E 9023 C0F8 063A8 5002+ STM 2,3,T120V
006352 9023 C0F8 063A8 5003+ STM 2,3,T120V
006356 9023 C0F8 063A8 5004+ STM 2,3,T120V
00635A 9023 C0F8 063A8 5005+ STM 2,3,T120V
00635E 9023 C0F8 063A8 5006+ STM 2,3,T120V
006362 9023 C0F8 063A8 5007+ STM 2,3,T120V
006366 9023 C0F8 063A8 5008+ STM 2,3,T120V
00636A 9023 C0F8 063A8 5009+ STM 2,3,T120V
00636E 9023 C0F8 063A8 5010+ STM 2,3,T120V
006372 9023 C0F8 063A8 5011+ STM 2,3,T120V
006376 9023 C0F8 063A8 5012+ STM 2,3,T120V
00637A 9023 C0F8 063A8 5013+ STM 2,3,T120V
00637E 9023 C0F8 063A8 5014+ STM 2,3,T120V
006382 9023 C0F8 063A8 5015+ STM 2,3,T120V
006386 9023 C0F8 063A8 5016+ STM 2,3,T120V
00638A 9023 C0F8 063A8 5017+ STM 2,3,T120V
00638E 9023 C0F8 063A8 5018+ STM 2,3,T120V
006392 9023 C0F8 063A8 5019+ STM 2,3,T120V
5020+*
006396 06FB 5021 BCTR R15,R11
5022 TSIMRET
006398 58F0 C100 063B0 5023+ L R15,=A(SAVETST) R15 := current save area
00639C 58DF 0004 00004 5024+ L R13,4(R15) get old save area back
0063A0 98EC D00C 0000C 5025+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0063A4 07FE 5026+ BR 14 RETURN 02000000
5027 *
0063A8 5028 T120V DS 2F
5029 TSIMEND
0063B0 5030+ LTORG
0063B0 00000458 5031 =A(SAVETST)
063B4 5032+T120TEND EQU *
5033 *
5034 * Test 121 -- STM 2,7,m ------------------------------------
5035 *
5036 TSIMBEG T121,6500,50,1,C'STM 2,7,m (6r)'
5037+*
002764 5038+TDSCDAT CSECT
002768 5039+ DS 0D
5040+*
002768 000063B8 5041+T121TDSC DC A(T121) // TENTRY
00276C 00000114 5042+ DC A(T121TEND-T121) // TLENGTH
002770 00001964 5043+ DC F'6500' // TLRCNT
002774 00000032 5044+ DC F'50' // TIGCNT
002778 00000001 5045+ DC F'1' // TLTYPE
0010F3 5046+TEXT CSECT
PAGE 94
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0010F3 E3F1F2F1 5047+SPTR0292 DC C'T121'
00277C 5048+TDSCDAT CSECT
00277C 5049+ DS 0F
00277C 040010F3 5050+ DC AL1(L'SPTR0292),AL3(SPTR0292)
0010F7 5051+TEXT CSECT
0010F7 E2E3D440F26BF76B 5052+SPTR0293 DC C'STM 2,7,m (6r)'
002780 5053+TDSCDAT CSECT
002780 5054+ DS 0F
002780 0E0010F7 5055+ DC AL1(L'SPTR0293),AL3(SPTR0293)
5056+*
004A18 5057+TDSCTBL CSECT
04A18 5058+T121TPTR EQU *
004A18 00002768 5059+ DC A(T121TDSC) enabled test
5060+*
0063B4 5061+TCODE CSECT
0063B8 5062+ DS 0D ensure double word alignment for test
0063B8 5063+T121 DS 0H 01650000
0063B8 90EC D00C 0000C 5064+ STM 14,12,12(13) SAVE REGISTERS 02950000
0063BC 18CF 5065+ LR R12,R15 base register := entry address
063B8 5066+ USING T121,R12 declare code base register
0063BE 41B0 C01E 063D6 5067+ LA R11,T121L load loop target to R11
0063C2 58F0 C110 064C8 5068+ L R15,=A(SAVETST) R15 := current save area
0063C6 50DF 0004 00004 5069+ ST R13,4(R15) set back pointer in current save area
0063CA 182D 5070+ LR R2,R13 remember callers save area
0063CC 18DF 5071+ LR R13,R15 setup current save area
0063CE 50D2 0008 00008 5072+ ST R13,8(R2) set forw pointer in callers save area
00000 5073+ USING TDSC,R1 declare TDSC base register
0063D2 58F0 1008 00008 5074+ L R15,TLRCNT load local repeat count to R15
5075+*
5076 *
5077 T121L REPINS STM,(2,7,T121V) repeat: STM 2,7,T121V
5078+*
5079+* build from sublist &ALIST a comma separated string &ARGS
5080+*
5081+*
5082+*
5083+*
5084+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
5085+* this allows to transfer the repeat count from last TDSCGEN call
5086+*
5087+*
063D6 5088+T121L EQU *
5089+*
5090+* write a comment indicating what REPINS does (in case NOGEN in effect)
5091+*
5092+*,// REPINS: do 50 times:
5093+*
5094+* MNOTE requires that ' is doubled for expanded variables
5095+* thus build &MASTR as a copy of '&ARGS with ' doubled
5096+*
5097+*
5098+*,// STM 2,7,T121V
5099+*
5100+* finally generate code: &ICNT copies of &CODE &ARGS
5101+*
PAGE 95
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0063D6 9027 C0F8 064B0 5102+ STM 2,7,T121V
0063DA 9027 C0F8 064B0 5103+ STM 2,7,T121V
0063DE 9027 C0F8 064B0 5104+ STM 2,7,T121V
0063E2 9027 C0F8 064B0 5105+ STM 2,7,T121V
0063E6 9027 C0F8 064B0 5106+ STM 2,7,T121V
0063EA 9027 C0F8 064B0 5107+ STM 2,7,T121V
0063EE 9027 C0F8 064B0 5108+ STM 2,7,T121V
0063F2 9027 C0F8 064B0 5109+ STM 2,7,T121V
0063F6 9027 C0F8 064B0 5110+ STM 2,7,T121V
0063FA 9027 C0F8 064B0 5111+ STM 2,7,T121V
0063FE 9027 C0F8 064B0 5112+ STM 2,7,T121V
006402 9027 C0F8 064B0 5113+ STM 2,7,T121V
006406 9027 C0F8 064B0 5114+ STM 2,7,T121V
00640A 9027 C0F8 064B0 5115+ STM 2,7,T121V
00640E 9027 C0F8 064B0 5116+ STM 2,7,T121V
006412 9027 C0F8 064B0 5117+ STM 2,7,T121V
006416 9027 C0F8 064B0 5118+ STM 2,7,T121V
00641A 9027 C0F8 064B0 5119+ STM 2,7,T121V
00641E 9027 C0F8 064B0 5120+ STM 2,7,T121V
006422 9027 C0F8 064B0 5121+ STM 2,7,T121V
006426 9027 C0F8 064B0 5122+ STM 2,7,T121V
00642A 9027 C0F8 064B0 5123+ STM 2,7,T121V
00642E 9027 C0F8 064B0 5124+ STM 2,7,T121V
006432 9027 C0F8 064B0 5125+ STM 2,7,T121V
006436 9027 C0F8 064B0 5126+ STM 2,7,T121V
00643A 9027 C0F8 064B0 5127+ STM 2,7,T121V
00643E 9027 C0F8 064B0 5128+ STM 2,7,T121V
006442 9027 C0F8 064B0 5129+ STM 2,7,T121V
006446 9027 C0F8 064B0 5130+ STM 2,7,T121V
00644A 9027 C0F8 064B0 5131+ STM 2,7,T121V
00644E 9027 C0F8 064B0 5132+ STM 2,7,T121V
006452 9027 C0F8 064B0 5133+ STM 2,7,T121V
006456 9027 C0F8 064B0 5134+ STM 2,7,T121V
00645A 9027 C0F8 064B0 5135+ STM 2,7,T121V
00645E 9027 C0F8 064B0 5136+ STM 2,7,T121V
006462 9027 C0F8 064B0 5137+ STM 2,7,T121V
006466 9027 C0F8 064B0 5138+ STM 2,7,T121V
00646A 9027 C0F8 064B0 5139+ STM 2,7,T121V
00646E 9027 C0F8 064B0 5140+ STM 2,7,T121V
006472 9027 C0F8 064B0 5141+ STM 2,7,T121V
006476 9027 C0F8 064B0 5142+ STM 2,7,T121V
00647A 9027 C0F8 064B0 5143+ STM 2,7,T121V
00647E 9027 C0F8 064B0 5144+ STM 2,7,T121V
006482 9027 C0F8 064B0 5145+ STM 2,7,T121V
006486 9027 C0F8 064B0 5146+ STM 2,7,T121V
00648A 9027 C0F8 064B0 5147+ STM 2,7,T121V
00648E 9027 C0F8 064B0 5148+ STM 2,7,T121V
006492 9027 C0F8 064B0 5149+ STM 2,7,T121V
006496 9027 C0F8 064B0 5150+ STM 2,7,T121V
00649A 9027 C0F8 064B0 5151+ STM 2,7,T121V
5152+*
00649E 06FB 5153 BCTR R15,R11
5154 TSIMRET
0064A0 58F0 C110 064C8 5155+ L R15,=A(SAVETST) R15 := current save area
0064A4 58DF 0004 00004 5156+ L R13,4(R15) get old save area back
PAGE 96
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0064A8 98EC D00C 0000C 5157+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0064AC 07FE 5158+ BR 14 RETURN 02000000
5159 *
0064B0 5160 T121V DS 6F
5161 TSIMEND
0064C8 5162+ LTORG
0064C8 00000458 5163 =A(SAVETST)
064CC 5164+T121TEND EQU *
5165 *
5166 * Test 122 -- STM (14,12),m --------------------------------
5167 *
5168 TSIMBEG T122,5000,50,1,C'STM 14,12,m (15r)'
5169+*
002784 5170+TDSCDAT CSECT
002788 5171+ DS 0D
5172+*
002788 000064D0 5173+T122TDSC DC A(T122) // TENTRY
00278C 0000013C 5174+ DC A(T122TEND-T122) // TLENGTH
002790 00001388 5175+ DC F'5000' // TLRCNT
002794 00000032 5176+ DC F'50' // TIGCNT
002798 00000001 5177+ DC F'1' // TLTYPE
001105 5178+TEXT CSECT
001105 E3F1F2F2 5179+SPTR0304 DC C'T122'
00279C 5180+TDSCDAT CSECT
00279C 5181+ DS 0F
00279C 04001105 5182+ DC AL1(L'SPTR0304),AL3(SPTR0304)
001109 5183+TEXT CSECT
001109 E2E3D440F1F46BF1 5184+SPTR0305 DC C'STM 14,12,m (15r)'
0027A0 5185+TDSCDAT CSECT
0027A0 5186+ DS 0F
0027A0 11001109 5187+ DC AL1(L'SPTR0305),AL3(SPTR0305)
5188+*
004A1C 5189+TDSCTBL CSECT
04A1C 5190+T122TPTR EQU *
004A1C 00002788 5191+ DC A(T122TDSC) enabled test
5192+*
0064CC 5193+TCODE CSECT
0064D0 5194+ DS 0D ensure double word alignment for test
0064D0 5195+T122 DS 0H 01650000
0064D0 90EC D00C 0000C 5196+ STM 14,12,12(13) SAVE REGISTERS 02950000
0064D4 18CF 5197+ LR R12,R15 base register := entry address
064D0 5198+ USING T122,R12 declare code base register
0064D6 41B0 C01E 064EE 5199+ LA R11,T122L load loop target to R11
0064DA 58F0 C138 06608 5200+ L R15,=A(SAVETST) R15 := current save area
0064DE 50DF 0004 00004 5201+ ST R13,4(R15) set back pointer in current save area
0064E2 182D 5202+ LR R2,R13 remember callers save area
0064E4 18DF 5203+ LR R13,R15 setup current save area
0064E6 50D2 0008 00008 5204+ ST R13,8(R2) set forw pointer in callers save area
00000 5205+ USING TDSC,R1 declare TDSC base register
0064EA 58F0 1008 00008 5206+ L R15,TLRCNT load local repeat count to R15
5207+*
5208 *
5209 T122L REPINS STM,(14,12,T122V) repeat: STM 14,12,T122V
5210+*
5211+* build from sublist &ALIST a comma separated string &ARGS
PAGE 97
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
5212+*
5213+*
5214+*
5215+*
5216+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
5217+* this allows to transfer the repeat count from last TDSCGEN call
5218+*
5219+*
064EE 5220+T122L EQU *
5221+*
5222+* write a comment indicating what REPINS does (in case NOGEN in effect)
5223+*
5224+*,// REPINS: do 50 times:
5225+*
5226+* MNOTE requires that ' is doubled for expanded variables
5227+* thus build &MASTR as a copy of '&ARGS with ' doubled
5228+*
5229+*
5230+*,// STM 14,12,T122V
5231+*
5232+* finally generate code: &ICNT copies of &CODE &ARGS
5233+*
0064EE 90EC C0F8 065C8 5234+ STM 14,12,T122V
0064F2 90EC C0F8 065C8 5235+ STM 14,12,T122V
0064F6 90EC C0F8 065C8 5236+ STM 14,12,T122V
0064FA 90EC C0F8 065C8 5237+ STM 14,12,T122V
0064FE 90EC C0F8 065C8 5238+ STM 14,12,T122V
006502 90EC C0F8 065C8 5239+ STM 14,12,T122V
006506 90EC C0F8 065C8 5240+ STM 14,12,T122V
00650A 90EC C0F8 065C8 5241+ STM 14,12,T122V
00650E 90EC C0F8 065C8 5242+ STM 14,12,T122V
006512 90EC C0F8 065C8 5243+ STM 14,12,T122V
006516 90EC C0F8 065C8 5244+ STM 14,12,T122V
00651A 90EC C0F8 065C8 5245+ STM 14,12,T122V
00651E 90EC C0F8 065C8 5246+ STM 14,12,T122V
006522 90EC C0F8 065C8 5247+ STM 14,12,T122V
006526 90EC C0F8 065C8 5248+ STM 14,12,T122V
00652A 90EC C0F8 065C8 5249+ STM 14,12,T122V
00652E 90EC C0F8 065C8 5250+ STM 14,12,T122V
006532 90EC C0F8 065C8 5251+ STM 14,12,T122V
006536 90EC C0F8 065C8 5252+ STM 14,12,T122V
00653A 90EC C0F8 065C8 5253+ STM 14,12,T122V
00653E 90EC C0F8 065C8 5254+ STM 14,12,T122V
006542 90EC C0F8 065C8 5255+ STM 14,12,T122V
006546 90EC C0F8 065C8 5256+ STM 14,12,T122V
00654A 90EC C0F8 065C8 5257+ STM 14,12,T122V
00654E 90EC C0F8 065C8 5258+ STM 14,12,T122V
006552 90EC C0F8 065C8 5259+ STM 14,12,T122V
006556 90EC C0F8 065C8 5260+ STM 14,12,T122V
00655A 90EC C0F8 065C8 5261+ STM 14,12,T122V
00655E 90EC C0F8 065C8 5262+ STM 14,12,T122V
006562 90EC C0F8 065C8 5263+ STM 14,12,T122V
006566 90EC C0F8 065C8 5264+ STM 14,12,T122V
00656A 90EC C0F8 065C8 5265+ STM 14,12,T122V
00656E 90EC C0F8 065C8 5266+ STM 14,12,T122V
PAGE 98
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
006572 90EC C0F8 065C8 5267+ STM 14,12,T122V
006576 90EC C0F8 065C8 5268+ STM 14,12,T122V
00657A 90EC C0F8 065C8 5269+ STM 14,12,T122V
00657E 90EC C0F8 065C8 5270+ STM 14,12,T122V
006582 90EC C0F8 065C8 5271+ STM 14,12,T122V
006586 90EC C0F8 065C8 5272+ STM 14,12,T122V
00658A 90EC C0F8 065C8 5273+ STM 14,12,T122V
00658E 90EC C0F8 065C8 5274+ STM 14,12,T122V
006592 90EC C0F8 065C8 5275+ STM 14,12,T122V
006596 90EC C0F8 065C8 5276+ STM 14,12,T122V
00659A 90EC C0F8 065C8 5277+ STM 14,12,T122V
00659E 90EC C0F8 065C8 5278+ STM 14,12,T122V
0065A2 90EC C0F8 065C8 5279+ STM 14,12,T122V
0065A6 90EC C0F8 065C8 5280+ STM 14,12,T122V
0065AA 90EC C0F8 065C8 5281+ STM 14,12,T122V
0065AE 90EC C0F8 065C8 5282+ STM 14,12,T122V
0065B2 90EC C0F8 065C8 5283+ STM 14,12,T122V
5284+*
0065B6 06FB 5285 BCTR R15,R11
5286 TSIMRET
0065B8 58F0 C138 06608 5287+ L R15,=A(SAVETST) R15 := current save area
0065BC 58DF 0004 00004 5288+ L R13,4(R15) get old save area back
0065C0 98EC D00C 0000C 5289+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0065C4 07FE 5290+ BR 14 RETURN 02000000
5291 *
0065C8 5292 T122V DS 15F
5293 TSIMEND
006608 5294+ LTORG
006608 00000458 5295 =A(SAVETST)
0660C 5296+T122TEND EQU *
5297 *
5298 * Test 123 -- LM 2,3,m -------------------------------------
5299 *
5300 TSIMBEG T123,9000,50,1,C'LM 2,3,m (2r)'
5301+*
0027A4 5302+TDSCDAT CSECT
0027A8 5303+ DS 0D
5304+*
0027A8 00006610 5305+T123TDSC DC A(T123) // TENTRY
0027AC 00000104 5306+ DC A(T123TEND-T123) // TLENGTH
0027B0 00002328 5307+ DC F'9000' // TLRCNT
0027B4 00000032 5308+ DC F'50' // TIGCNT
0027B8 00000001 5309+ DC F'1' // TLTYPE
00111A 5310+TEXT CSECT
00111A E3F1F2F3 5311+SPTR0316 DC C'T123'
0027BC 5312+TDSCDAT CSECT
0027BC 5313+ DS 0F
0027BC 0400111A 5314+ DC AL1(L'SPTR0316),AL3(SPTR0316)
00111E 5315+TEXT CSECT
00111E D3D440F26BF36B94 5316+SPTR0317 DC C'LM 2,3,m (2r)'
0027C0 5317+TDSCDAT CSECT
0027C0 5318+ DS 0F
0027C0 0D00111E 5319+ DC AL1(L'SPTR0317),AL3(SPTR0317)
5320+*
004A20 5321+TDSCTBL CSECT
PAGE 99
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
04A20 5322+T123TPTR EQU *
004A20 000027A8 5323+ DC A(T123TDSC) enabled test
5324+*
00660C 5325+TCODE CSECT
006610 5326+ DS 0D ensure double word alignment for test
006610 5327+T123 DS 0H 01650000
006610 90EC D00C 0000C 5328+ STM 14,12,12(13) SAVE REGISTERS 02950000
006614 18CF 5329+ LR R12,R15 base register := entry address
06610 5330+ USING T123,R12 declare code base register
006616 41B0 C01E 0662E 5331+ LA R11,T123L load loop target to R11
00661A 58F0 C100 06710 5332+ L R15,=A(SAVETST) R15 := current save area
00661E 50DF 0004 00004 5333+ ST R13,4(R15) set back pointer in current save area
006622 182D 5334+ LR R2,R13 remember callers save area
006624 18DF 5335+ LR R13,R15 setup current save area
006626 50D2 0008 00008 5336+ ST R13,8(R2) set forw pointer in callers save area
00000 5337+ USING TDSC,R1 declare TDSC base register
00662A 58F0 1008 00008 5338+ L R15,TLRCNT load local repeat count to R15
5339+*
5340 *
5341 T123L REPINS LM,(2,3,T123V) repeat: LM 2,3,T123V
5342+*
5343+* build from sublist &ALIST a comma separated string &ARGS
5344+*
5345+*
5346+*
5347+*
5348+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
5349+* this allows to transfer the repeat count from last TDSCGEN call
5350+*
5351+*
0662E 5352+T123L EQU *
5353+*
5354+* write a comment indicating what REPINS does (in case NOGEN in effect)
5355+*
5356+*,// REPINS: do 50 times:
5357+*
5358+* MNOTE requires that ' is doubled for expanded variables
5359+* thus build &MASTR as a copy of '&ARGS with ' doubled
5360+*
5361+*
5362+*,// LM 2,3,T123V
5363+*
5364+* finally generate code: &ICNT copies of &CODE &ARGS
5365+*
00662E 9823 C0F8 06708 5366+ LM 2,3,T123V
006632 9823 C0F8 06708 5367+ LM 2,3,T123V
006636 9823 C0F8 06708 5368+ LM 2,3,T123V
00663A 9823 C0F8 06708 5369+ LM 2,3,T123V
00663E 9823 C0F8 06708 5370+ LM 2,3,T123V
006642 9823 C0F8 06708 5371+ LM 2,3,T123V
006646 9823 C0F8 06708 5372+ LM 2,3,T123V
00664A 9823 C0F8 06708 5373+ LM 2,3,T123V
00664E 9823 C0F8 06708 5374+ LM 2,3,T123V
006652 9823 C0F8 06708 5375+ LM 2,3,T123V
006656 9823 C0F8 06708 5376+ LM 2,3,T123V
PAGE 100
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00665A 9823 C0F8 06708 5377+ LM 2,3,T123V
00665E 9823 C0F8 06708 5378+ LM 2,3,T123V
006662 9823 C0F8 06708 5379+ LM 2,3,T123V
006666 9823 C0F8 06708 5380+ LM 2,3,T123V
00666A 9823 C0F8 06708 5381+ LM 2,3,T123V
00666E 9823 C0F8 06708 5382+ LM 2,3,T123V
006672 9823 C0F8 06708 5383+ LM 2,3,T123V
006676 9823 C0F8 06708 5384+ LM 2,3,T123V
00667A 9823 C0F8 06708 5385+ LM 2,3,T123V
00667E 9823 C0F8 06708 5386+ LM 2,3,T123V
006682 9823 C0F8 06708 5387+ LM 2,3,T123V
006686 9823 C0F8 06708 5388+ LM 2,3,T123V
00668A 9823 C0F8 06708 5389+ LM 2,3,T123V
00668E 9823 C0F8 06708 5390+ LM 2,3,T123V
006692 9823 C0F8 06708 5391+ LM 2,3,T123V
006696 9823 C0F8 06708 5392+ LM 2,3,T123V
00669A 9823 C0F8 06708 5393+ LM 2,3,T123V
00669E 9823 C0F8 06708 5394+ LM 2,3,T123V
0066A2 9823 C0F8 06708 5395+ LM 2,3,T123V
0066A6 9823 C0F8 06708 5396+ LM 2,3,T123V
0066AA 9823 C0F8 06708 5397+ LM 2,3,T123V
0066AE 9823 C0F8 06708 5398+ LM 2,3,T123V
0066B2 9823 C0F8 06708 5399+ LM 2,3,T123V
0066B6 9823 C0F8 06708 5400+ LM 2,3,T123V
0066BA 9823 C0F8 06708 5401+ LM 2,3,T123V
0066BE 9823 C0F8 06708 5402+ LM 2,3,T123V
0066C2 9823 C0F8 06708 5403+ LM 2,3,T123V
0066C6 9823 C0F8 06708 5404+ LM 2,3,T123V
0066CA 9823 C0F8 06708 5405+ LM 2,3,T123V
0066CE 9823 C0F8 06708 5406+ LM 2,3,T123V
0066D2 9823 C0F8 06708 5407+ LM 2,3,T123V
0066D6 9823 C0F8 06708 5408+ LM 2,3,T123V
0066DA 9823 C0F8 06708 5409+ LM 2,3,T123V
0066DE 9823 C0F8 06708 5410+ LM 2,3,T123V
0066E2 9823 C0F8 06708 5411+ LM 2,3,T123V
0066E6 9823 C0F8 06708 5412+ LM 2,3,T123V
0066EA 9823 C0F8 06708 5413+ LM 2,3,T123V
0066EE 9823 C0F8 06708 5414+ LM 2,3,T123V
0066F2 9823 C0F8 06708 5415+ LM 2,3,T123V
5416+*
0066F6 06FB 5417 BCTR R15,R11
5418 TSIMRET
0066F8 58F0 C100 06710 5419+ L R15,=A(SAVETST) R15 := current save area
0066FC 58DF 0004 00004 5420+ L R13,4(R15) get old save area back
006700 98EC D00C 0000C 5421+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
006704 07FE 5422+ BR 14 RETURN 02000000
5423 *
006706 0000
006708 0000000300000003 5424 T123V DC F'3',F'3'
5425 TSIMEND
006710 5426+ LTORG
006710 00000458 5427 =A(SAVETST)
06714 5428+T123TEND EQU *
5429 *
5430 * Test 124 -- LM 2,7,m -------------------------------------
PAGE 101
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
5431 *
5432 TSIMBEG T124,6000,50,1,C'LM 2,7,m (6r)'
5433+*
0027C4 5434+TDSCDAT CSECT
0027C8 5435+ DS 0D
5436+*
0027C8 00006718 5437+T124TDSC DC A(T124) // TENTRY
0027CC 00000114 5438+ DC A(T124TEND-T124) // TLENGTH
0027D0 00001770 5439+ DC F'6000' // TLRCNT
0027D4 00000032 5440+ DC F'50' // TIGCNT
0027D8 00000001 5441+ DC F'1' // TLTYPE
00112B 5442+TEXT CSECT
00112B E3F1F2F4 5443+SPTR0328 DC C'T124'
0027DC 5444+TDSCDAT CSECT
0027DC 5445+ DS 0F
0027DC 0400112B 5446+ DC AL1(L'SPTR0328),AL3(SPTR0328)
00112F 5447+TEXT CSECT
00112F D3D440F26BF76B94 5448+SPTR0329 DC C'LM 2,7,m (6r)'
0027E0 5449+TDSCDAT CSECT
0027E0 5450+ DS 0F
0027E0 0D00112F 5451+ DC AL1(L'SPTR0329),AL3(SPTR0329)
5452+*
004A24 5453+TDSCTBL CSECT
04A24 5454+T124TPTR EQU *
004A24 000027C8 5455+ DC A(T124TDSC) enabled test
5456+*
006714 5457+TCODE CSECT
006718 5458+ DS 0D ensure double word alignment for test
006718 5459+T124 DS 0H 01650000
006718 90EC D00C 0000C 5460+ STM 14,12,12(13) SAVE REGISTERS 02950000
00671C 18CF 5461+ LR R12,R15 base register := entry address
06718 5462+ USING T124,R12 declare code base register
00671E 41B0 C01E 06736 5463+ LA R11,T124L load loop target to R11
006722 58F0 C110 06828 5464+ L R15,=A(SAVETST) R15 := current save area
006726 50DF 0004 00004 5465+ ST R13,4(R15) set back pointer in current save area
00672A 182D 5466+ LR R2,R13 remember callers save area
00672C 18DF 5467+ LR R13,R15 setup current save area
00672E 50D2 0008 00008 5468+ ST R13,8(R2) set forw pointer in callers save area
00000 5469+ USING TDSC,R1 declare TDSC base register
006732 58F0 1008 00008 5470+ L R15,TLRCNT load local repeat count to R15
5471+*
5472 *
5473 T124L REPINS LM,(2,7,T124V) repeat: LM 2,7,T124V
5474+*
5475+* build from sublist &ALIST a comma separated string &ARGS
5476+*
5477+*
5478+*
5479+*
5480+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
5481+* this allows to transfer the repeat count from last TDSCGEN call
5482+*
5483+*
06736 5484+T124L EQU *
5485+*
PAGE 102
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
5486+* write a comment indicating what REPINS does (in case NOGEN in effect)
5487+*
5488+*,// REPINS: do 50 times:
5489+*
5490+* MNOTE requires that ' is doubled for expanded variables
5491+* thus build &MASTR as a copy of '&ARGS with ' doubled
5492+*
5493+*
5494+*,// LM 2,7,T124V
5495+*
5496+* finally generate code: &ICNT copies of &CODE &ARGS
5497+*
006736 9827 C0F8 06810 5498+ LM 2,7,T124V
00673A 9827 C0F8 06810 5499+ LM 2,7,T124V
00673E 9827 C0F8 06810 5500+ LM 2,7,T124V
006742 9827 C0F8 06810 5501+ LM 2,7,T124V
006746 9827 C0F8 06810 5502+ LM 2,7,T124V
00674A 9827 C0F8 06810 5503+ LM 2,7,T124V
00674E 9827 C0F8 06810 5504+ LM 2,7,T124V
006752 9827 C0F8 06810 5505+ LM 2,7,T124V
006756 9827 C0F8 06810 5506+ LM 2,7,T124V
00675A 9827 C0F8 06810 5507+ LM 2,7,T124V
00675E 9827 C0F8 06810 5508+ LM 2,7,T124V
006762 9827 C0F8 06810 5509+ LM 2,7,T124V
006766 9827 C0F8 06810 5510+ LM 2,7,T124V
00676A 9827 C0F8 06810 5511+ LM 2,7,T124V
00676E 9827 C0F8 06810 5512+ LM 2,7,T124V
006772 9827 C0F8 06810 5513+ LM 2,7,T124V
006776 9827 C0F8 06810 5514+ LM 2,7,T124V
00677A 9827 C0F8 06810 5515+ LM 2,7,T124V
00677E 9827 C0F8 06810 5516+ LM 2,7,T124V
006782 9827 C0F8 06810 5517+ LM 2,7,T124V
006786 9827 C0F8 06810 5518+ LM 2,7,T124V
00678A 9827 C0F8 06810 5519+ LM 2,7,T124V
00678E 9827 C0F8 06810 5520+ LM 2,7,T124V
006792 9827 C0F8 06810 5521+ LM 2,7,T124V
006796 9827 C0F8 06810 5522+ LM 2,7,T124V
00679A 9827 C0F8 06810 5523+ LM 2,7,T124V
00679E 9827 C0F8 06810 5524+ LM 2,7,T124V
0067A2 9827 C0F8 06810 5525+ LM 2,7,T124V
0067A6 9827 C0F8 06810 5526+ LM 2,7,T124V
0067AA 9827 C0F8 06810 5527+ LM 2,7,T124V
0067AE 9827 C0F8 06810 5528+ LM 2,7,T124V
0067B2 9827 C0F8 06810 5529+ LM 2,7,T124V
0067B6 9827 C0F8 06810 5530+ LM 2,7,T124V
0067BA 9827 C0F8 06810 5531+ LM 2,7,T124V
0067BE 9827 C0F8 06810 5532+ LM 2,7,T124V
0067C2 9827 C0F8 06810 5533+ LM 2,7,T124V
0067C6 9827 C0F8 06810 5534+ LM 2,7,T124V
0067CA 9827 C0F8 06810 5535+ LM 2,7,T124V
0067CE 9827 C0F8 06810 5536+ LM 2,7,T124V
0067D2 9827 C0F8 06810 5537+ LM 2,7,T124V
0067D6 9827 C0F8 06810 5538+ LM 2,7,T124V
0067DA 9827 C0F8 06810 5539+ LM 2,7,T124V
0067DE 9827 C0F8 06810 5540+ LM 2,7,T124V
PAGE 103
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0067E2 9827 C0F8 06810 5541+ LM 2,7,T124V
0067E6 9827 C0F8 06810 5542+ LM 2,7,T124V
0067EA 9827 C0F8 06810 5543+ LM 2,7,T124V
0067EE 9827 C0F8 06810 5544+ LM 2,7,T124V
0067F2 9827 C0F8 06810 5545+ LM 2,7,T124V
0067F6 9827 C0F8 06810 5546+ LM 2,7,T124V
0067FA 9827 C0F8 06810 5547+ LM 2,7,T124V
5548+*
0067FE 06FB 5549 BCTR R15,R11
5550 TSIMRET
006800 58F0 C110 06828 5551+ L R15,=A(SAVETST) R15 := current save area
006804 58DF 0004 00004 5552+ L R13,4(R15) get old save area back
006808 98EC D00C 0000C 5553+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00680C 07FE 5554+ BR 14 RETURN 02000000
5555 *
00680E 0000
006810 0000000200000003 5556 T124V DC F'2',F'3',F'4',F'5',F'6',F'7'
5557 TSIMEND
006828 5558+ LTORG
006828 00000458 5559 =A(SAVETST)
0682C 5560+T124TEND EQU *
5561 *
5562 * Test 125 -- LM 0,11,m ------------------------------------
5563 *
5564 TSIMBEG T125,5000,50,2,C'LM 0,11,m (12r)'
5565+*
0027E4 5566+TDSCDAT CSECT
0027E8 5567+ DS 0D
5568+*
0027E8 00006830 5569+T125TDSC DC A(T125) // TENTRY
0027EC 0000012C 5570+ DC A(T125TEND-T125) // TLENGTH
0027F0 00001388 5571+ DC F'5000' // TLRCNT
0027F4 00000032 5572+ DC F'50' // TIGCNT
0027F8 00000002 5573+ DC F'2' // TLTYPE
00113C 5574+TEXT CSECT
00113C E3F1F2F5 5575+SPTR0340 DC C'T125'
0027FC 5576+TDSCDAT CSECT
0027FC 5577+ DS 0F
0027FC 0400113C 5578+ DC AL1(L'SPTR0340),AL3(SPTR0340)
001140 5579+TEXT CSECT
001140 D3D440F06BF1F16B 5580+SPTR0341 DC C'LM 0,11,m (12r)'
002800 5581+TDSCDAT CSECT
002800 5582+ DS 0F
002800 0F001140 5583+ DC AL1(L'SPTR0341),AL3(SPTR0341)
5584+*
004A28 5585+TDSCTBL CSECT
04A28 5586+T125TPTR EQU *
004A28 000027E8 5587+ DC A(T125TDSC) enabled test
5588+*
00682C 5589+TCODE CSECT
006830 5590+ DS 0D ensure double word alignment for test
006830 5591+T125 DS 0H 01650000
006830 90EC D00C 0000C 5592+ STM 14,12,12(13) SAVE REGISTERS 02950000
006834 18CF 5593+ LR R12,R15 base register := entry address
06830 5594+ USING T125,R12 declare code base register
PAGE 104
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
006836 41B0 C01E 0684E 5595+ LA R11,T125L load loop target to R11
00683A 58F0 C128 06958 5596+ L R15,=A(SAVETST) R15 := current save area
00683E 50DF 0004 00004 5597+ ST R13,4(R15) set back pointer in current save area
006842 182D 5598+ LR R2,R13 remember callers save area
006844 18DF 5599+ LR R13,R15 setup current save area
006846 50D2 0008 00008 5600+ ST R13,8(R2) set forw pointer in callers save area
00000 5601+ USING TDSC,R1 declare TDSC base register
00684A 58F0 1008 00008 5602+ L R15,TLRCNT load local repeat count to R15
5603+*
5604 *
5605 T125L REPINS LM,(0,11,T125V) repeat: LM 0,11,T125V
5606+*
5607+* build from sublist &ALIST a comma separated string &ARGS
5608+*
5609+*
5610+*
5611+*
5612+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
5613+* this allows to transfer the repeat count from last TDSCGEN call
5614+*
5615+*
0684E 5616+T125L EQU *
5617+*
5618+* write a comment indicating what REPINS does (in case NOGEN in effect)
5619+*
5620+*,// REPINS: do 50 times:
5621+*
5622+* MNOTE requires that ' is doubled for expanded variables
5623+* thus build &MASTR as a copy of '&ARGS with ' doubled
5624+*
5625+*
5626+*,// LM 0,11,T125V
5627+*
5628+* finally generate code: &ICNT copies of &CODE &ARGS
5629+*
00684E 980B C0F8 06928 5630+ LM 0,11,T125V
006852 980B C0F8 06928 5631+ LM 0,11,T125V
006856 980B C0F8 06928 5632+ LM 0,11,T125V
00685A 980B C0F8 06928 5633+ LM 0,11,T125V
00685E 980B C0F8 06928 5634+ LM 0,11,T125V
006862 980B C0F8 06928 5635+ LM 0,11,T125V
006866 980B C0F8 06928 5636+ LM 0,11,T125V
00686A 980B C0F8 06928 5637+ LM 0,11,T125V
00686E 980B C0F8 06928 5638+ LM 0,11,T125V
006872 980B C0F8 06928 5639+ LM 0,11,T125V
006876 980B C0F8 06928 5640+ LM 0,11,T125V
00687A 980B C0F8 06928 5641+ LM 0,11,T125V
00687E 980B C0F8 06928 5642+ LM 0,11,T125V
006882 980B C0F8 06928 5643+ LM 0,11,T125V
006886 980B C0F8 06928 5644+ LM 0,11,T125V
00688A 980B C0F8 06928 5645+ LM 0,11,T125V
00688E 980B C0F8 06928 5646+ LM 0,11,T125V
006892 980B C0F8 06928 5647+ LM 0,11,T125V
006896 980B C0F8 06928 5648+ LM 0,11,T125V
00689A 980B C0F8 06928 5649+ LM 0,11,T125V
PAGE 105
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00689E 980B C0F8 06928 5650+ LM 0,11,T125V
0068A2 980B C0F8 06928 5651+ LM 0,11,T125V
0068A6 980B C0F8 06928 5652+ LM 0,11,T125V
0068AA 980B C0F8 06928 5653+ LM 0,11,T125V
0068AE 980B C0F8 06928 5654+ LM 0,11,T125V
0068B2 980B C0F8 06928 5655+ LM 0,11,T125V
0068B6 980B C0F8 06928 5656+ LM 0,11,T125V
0068BA 980B C0F8 06928 5657+ LM 0,11,T125V
0068BE 980B C0F8 06928 5658+ LM 0,11,T125V
0068C2 980B C0F8 06928 5659+ LM 0,11,T125V
0068C6 980B C0F8 06928 5660+ LM 0,11,T125V
0068CA 980B C0F8 06928 5661+ LM 0,11,T125V
0068CE 980B C0F8 06928 5662+ LM 0,11,T125V
0068D2 980B C0F8 06928 5663+ LM 0,11,T125V
0068D6 980B C0F8 06928 5664+ LM 0,11,T125V
0068DA 980B C0F8 06928 5665+ LM 0,11,T125V
0068DE 980B C0F8 06928 5666+ LM 0,11,T125V
0068E2 980B C0F8 06928 5667+ LM 0,11,T125V
0068E6 980B C0F8 06928 5668+ LM 0,11,T125V
0068EA 980B C0F8 06928 5669+ LM 0,11,T125V
0068EE 980B C0F8 06928 5670+ LM 0,11,T125V
0068F2 980B C0F8 06928 5671+ LM 0,11,T125V
0068F6 980B C0F8 06928 5672+ LM 0,11,T125V
0068FA 980B C0F8 06928 5673+ LM 0,11,T125V
0068FE 980B C0F8 06928 5674+ LM 0,11,T125V
006902 980B C0F8 06928 5675+ LM 0,11,T125V
006906 980B C0F8 06928 5676+ LM 0,11,T125V
00690A 980B C0F8 06928 5677+ LM 0,11,T125V
00690E 980B C0F8 06928 5678+ LM 0,11,T125V
006912 980B C0F8 06928 5679+ LM 0,11,T125V
5680+*
006916 46F0 C01E 0684E 5681 BCT R15,T125L
5682 TSIMRET
00691A 58F0 C128 06958 5683+ L R15,=A(SAVETST) R15 := current save area
00691E 58DF 0004 00004 5684+ L R13,4(R15) get old save area back
006922 98EC D00C 0000C 5685+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
006926 07FE 5686+ BR 14 RETURN 02000000
5687 *
006928 0000000000000001 5688 T125V DC F'0',F'1',F'2',F'3',F'4',F'5'
006940 0000000600000007 5689 DC F'6',F'7',F'8',F'9',F'10',F'11'
5690 TSIMEND
006958 5691+ LTORG
006958 00000458 5692 =A(SAVETST)
0695C 5693+T125TEND EQU *
5694 *
5695 * Test 15x -- MVC ==========================================
5696 *
5697 * Test 150 -- MVC m,m (5c) ---------------------------------
5698 *
5699 TSIMBEG T150,5000,50,1,C'MVC m,m (5c)'
5700+*
002804 5701+TDSCDAT CSECT
002808 5702+ DS 0D
5703+*
002808 00006960 5704+T150TDSC DC A(T150) // TENTRY
PAGE 106
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00280C 0000016C 5705+ DC A(T150TEND-T150) // TLENGTH
002810 00001388 5706+ DC F'5000' // TLRCNT
002814 00000032 5707+ DC F'50' // TIGCNT
002818 00000001 5708+ DC F'1' // TLTYPE
00114F 5709+TEXT CSECT
00114F E3F1F5F0 5710+SPTR0352 DC C'T150'
00281C 5711+TDSCDAT CSECT
00281C 5712+ DS 0F
00281C 0400114F 5713+ DC AL1(L'SPTR0352),AL3(SPTR0352)
001153 5714+TEXT CSECT
001153 D4E5C340946B9440 5715+SPTR0353 DC C'MVC m,m (5c)'
002820 5716+TDSCDAT CSECT
002820 5717+ DS 0F
002820 0C001153 5718+ DC AL1(L'SPTR0353),AL3(SPTR0353)
5719+*
004A2C 5720+TDSCTBL CSECT
04A2C 5721+T150TPTR EQU *
004A2C 00002808 5722+ DC A(T150TDSC) enabled test
5723+*
00695C 5724+TCODE CSECT
006960 5725+ DS 0D ensure double word alignment for test
006960 5726+T150 DS 0H 01650000
006960 90EC D00C 0000C 5727+ STM 14,12,12(13) SAVE REGISTERS 02950000
006964 18CF 5728+ LR R12,R15 base register := entry address
06960 5729+ USING T150,R12 declare code base register
006966 41B0 C01E 0697E 5730+ LA R11,T150L load loop target to R11
00696A 58F0 C168 06AC8 5731+ L R15,=A(SAVETST) R15 := current save area
00696E 50DF 0004 00004 5732+ ST R13,4(R15) set back pointer in current save area
006972 182D 5733+ LR R2,R13 remember callers save area
006974 18DF 5734+ LR R13,R15 setup current save area
006976 50D2 0008 00008 5735+ ST R13,8(R2) set forw pointer in callers save area
00000 5736+ USING TDSC,R1 declare TDSC base register
00697A 58F0 1008 00008 5737+ L R15,TLRCNT load local repeat count to R15
5738+*
5739 *
5740 T150L REPINS MVC,(T150V1,T150V2) repeat: MVC T150V1,T150V2
5741+*
5742+* build from sublist &ALIST a comma separated string &ARGS
5743+*
5744+*
5745+*
5746+*
5747+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
5748+* this allows to transfer the repeat count from last TDSCGEN call
5749+*
5750+*
0697E 5751+T150L EQU *
5752+*
5753+* write a comment indicating what REPINS does (in case NOGEN in effect)
5754+*
5755+*,// REPINS: do 50 times:
5756+*
5757+* MNOTE requires that ' is doubled for expanded variables
5758+* thus build &MASTR as a copy of '&ARGS with ' doubled
5759+*
PAGE 107
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
5760+*
5761+*,// MVC T150V1,T150V2
5762+*
5763+* finally generate code: &ICNT copies of &CODE &ARGS
5764+*
00697E D204 C15C C161 06ABC 06AC1 5765+ MVC T150V1,T150V2
006984 D204 C15C C161 06ABC 06AC1 5766+ MVC T150V1,T150V2
00698A D204 C15C C161 06ABC 06AC1 5767+ MVC T150V1,T150V2
006990 D204 C15C C161 06ABC 06AC1 5768+ MVC T150V1,T150V2
006996 D204 C15C C161 06ABC 06AC1 5769+ MVC T150V1,T150V2
00699C D204 C15C C161 06ABC 06AC1 5770+ MVC T150V1,T150V2
0069A2 D204 C15C C161 06ABC 06AC1 5771+ MVC T150V1,T150V2
0069A8 D204 C15C C161 06ABC 06AC1 5772+ MVC T150V1,T150V2
0069AE D204 C15C C161 06ABC 06AC1 5773+ MVC T150V1,T150V2
0069B4 D204 C15C C161 06ABC 06AC1 5774+ MVC T150V1,T150V2
0069BA D204 C15C C161 06ABC 06AC1 5775+ MVC T150V1,T150V2
0069C0 D204 C15C C161 06ABC 06AC1 5776+ MVC T150V1,T150V2
0069C6 D204 C15C C161 06ABC 06AC1 5777+ MVC T150V1,T150V2
0069CC D204 C15C C161 06ABC 06AC1 5778+ MVC T150V1,T150V2
0069D2 D204 C15C C161 06ABC 06AC1 5779+ MVC T150V1,T150V2
0069D8 D204 C15C C161 06ABC 06AC1 5780+ MVC T150V1,T150V2
0069DE D204 C15C C161 06ABC 06AC1 5781+ MVC T150V1,T150V2
0069E4 D204 C15C C161 06ABC 06AC1 5782+ MVC T150V1,T150V2
0069EA D204 C15C C161 06ABC 06AC1 5783+ MVC T150V1,T150V2
0069F0 D204 C15C C161 06ABC 06AC1 5784+ MVC T150V1,T150V2
0069F6 D204 C15C C161 06ABC 06AC1 5785+ MVC T150V1,T150V2
0069FC D204 C15C C161 06ABC 06AC1 5786+ MVC T150V1,T150V2
006A02 D204 C15C C161 06ABC 06AC1 5787+ MVC T150V1,T150V2
006A08 D204 C15C C161 06ABC 06AC1 5788+ MVC T150V1,T150V2
006A0E D204 C15C C161 06ABC 06AC1 5789+ MVC T150V1,T150V2
006A14 D204 C15C C161 06ABC 06AC1 5790+ MVC T150V1,T150V2
006A1A D204 C15C C161 06ABC 06AC1 5791+ MVC T150V1,T150V2
006A20 D204 C15C C161 06ABC 06AC1 5792+ MVC T150V1,T150V2
006A26 D204 C15C C161 06ABC 06AC1 5793+ MVC T150V1,T150V2
006A2C D204 C15C C161 06ABC 06AC1 5794+ MVC T150V1,T150V2
006A32 D204 C15C C161 06ABC 06AC1 5795+ MVC T150V1,T150V2
006A38 D204 C15C C161 06ABC 06AC1 5796+ MVC T150V1,T150V2
006A3E D204 C15C C161 06ABC 06AC1 5797+ MVC T150V1,T150V2
006A44 D204 C15C C161 06ABC 06AC1 5798+ MVC T150V1,T150V2
006A4A D204 C15C C161 06ABC 06AC1 5799+ MVC T150V1,T150V2
006A50 D204 C15C C161 06ABC 06AC1 5800+ MVC T150V1,T150V2
006A56 D204 C15C C161 06ABC 06AC1 5801+ MVC T150V1,T150V2
006A5C D204 C15C C161 06ABC 06AC1 5802+ MVC T150V1,T150V2
006A62 D204 C15C C161 06ABC 06AC1 5803+ MVC T150V1,T150V2
006A68 D204 C15C C161 06ABC 06AC1 5804+ MVC T150V1,T150V2
006A6E D204 C15C C161 06ABC 06AC1 5805+ MVC T150V1,T150V2
006A74 D204 C15C C161 06ABC 06AC1 5806+ MVC T150V1,T150V2
006A7A D204 C15C C161 06ABC 06AC1 5807+ MVC T150V1,T150V2
006A80 D204 C15C C161 06ABC 06AC1 5808+ MVC T150V1,T150V2
006A86 D204 C15C C161 06ABC 06AC1 5809+ MVC T150V1,T150V2
006A8C D204 C15C C161 06ABC 06AC1 5810+ MVC T150V1,T150V2
006A92 D204 C15C C161 06ABC 06AC1 5811+ MVC T150V1,T150V2
006A98 D204 C15C C161 06ABC 06AC1 5812+ MVC T150V1,T150V2
006A9E D204 C15C C161 06ABC 06AC1 5813+ MVC T150V1,T150V2
006AA4 D204 C15C C161 06ABC 06AC1 5814+ MVC T150V1,T150V2
PAGE 108
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
5815+*
006AAA 06FB 5816 BCTR R15,R11
5817 TSIMRET
006AAC 58F0 C168 06AC8 5818+ L R15,=A(SAVETST) R15 := current save area
006AB0 58DF 0004 00004 5819+ L R13,4(R15) get old save area back
006AB4 98EC D00C 0000C 5820+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
006AB8 07FE 5821+ BR 14 RETURN 02000000
5822 *
006ABC 5823 DS 0F
006ABC 4040404040 5824 T150V1 DC CL5' '
006AC1 F0F1F2F3F4 5825 T150V2 DC CL5'01234'
006AC6 5826 DS 0H
5827 TSIMEND
006AC8 5828+ LTORG
006AC8 00000458 5829 =A(SAVETST)
06ACC 5830+T150TEND EQU *
5831 *
5832 * Test 151 -- MVC m,m (10c) --------------------------------
5833 *
5834 TSIMBEG T151,5000,50,1,C'MVC m,m (10c)'
5835+*
002824 5836+TDSCDAT CSECT
002828 5837+ DS 0D
5838+*
002828 00006AD0 5839+T151TDSC DC A(T151) // TENTRY
00282C 00000174 5840+ DC A(T151TEND-T151) // TLENGTH
002830 00001388 5841+ DC F'5000' // TLRCNT
002834 00000032 5842+ DC F'50' // TIGCNT
002838 00000001 5843+ DC F'1' // TLTYPE
00115F 5844+TEXT CSECT
00115F E3F1F5F1 5845+SPTR0364 DC C'T151'
00283C 5846+TDSCDAT CSECT
00283C 5847+ DS 0F
00283C 0400115F 5848+ DC AL1(L'SPTR0364),AL3(SPTR0364)
001163 5849+TEXT CSECT
001163 D4E5C340946B9440 5850+SPTR0365 DC C'MVC m,m (10c)'
002840 5851+TDSCDAT CSECT
002840 5852+ DS 0F
002840 0D001163 5853+ DC AL1(L'SPTR0365),AL3(SPTR0365)
5854+*
004A30 5855+TDSCTBL CSECT
04A30 5856+T151TPTR EQU *
004A30 00002828 5857+ DC A(T151TDSC) enabled test
5858+*
006ACC 5859+TCODE CSECT
006AD0 5860+ DS 0D ensure double word alignment for test
006AD0 5861+T151 DS 0H 01650000
006AD0 90EC D00C 0000C 5862+ STM 14,12,12(13) SAVE REGISTERS 02950000
006AD4 18CF 5863+ LR R12,R15 base register := entry address
06AD0 5864+ USING T151,R12 declare code base register
006AD6 41B0 C01E 06AEE 5865+ LA R11,T151L load loop target to R11
006ADA 58F0 C170 06C40 5866+ L R15,=A(SAVETST) R15 := current save area
006ADE 50DF 0004 00004 5867+ ST R13,4(R15) set back pointer in current save area
006AE2 182D 5868+ LR R2,R13 remember callers save area
006AE4 18DF 5869+ LR R13,R15 setup current save area
PAGE 109
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
006AE6 50D2 0008 00008 5870+ ST R13,8(R2) set forw pointer in callers save area
00000 5871+ USING TDSC,R1 declare TDSC base register
006AEA 58F0 1008 00008 5872+ L R15,TLRCNT load local repeat count to R15
5873+*
5874 *
5875 T151L REPINS MVC,(T151V1,T151V2) repeat: MVC T151V1,T151V2
5876+*
5877+* build from sublist &ALIST a comma separated string &ARGS
5878+*
5879+*
5880+*
5881+*
5882+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
5883+* this allows to transfer the repeat count from last TDSCGEN call
5884+*
5885+*
06AEE 5886+T151L EQU *
5887+*
5888+* write a comment indicating what REPINS does (in case NOGEN in effect)
5889+*
5890+*,// REPINS: do 50 times:
5891+*
5892+* MNOTE requires that ' is doubled for expanded variables
5893+* thus build &MASTR as a copy of '&ARGS with ' doubled
5894+*
5895+*
5896+*,// MVC T151V1,T151V2
5897+*
5898+* finally generate code: &ICNT copies of &CODE &ARGS
5899+*
006AEE D209 C15C C166 06C2C 06C36 5900+ MVC T151V1,T151V2
006AF4 D209 C15C C166 06C2C 06C36 5901+ MVC T151V1,T151V2
006AFA D209 C15C C166 06C2C 06C36 5902+ MVC T151V1,T151V2
006B00 D209 C15C C166 06C2C 06C36 5903+ MVC T151V1,T151V2
006B06 D209 C15C C166 06C2C 06C36 5904+ MVC T151V1,T151V2
006B0C D209 C15C C166 06C2C 06C36 5905+ MVC T151V1,T151V2
006B12 D209 C15C C166 06C2C 06C36 5906+ MVC T151V1,T151V2
006B18 D209 C15C C166 06C2C 06C36 5907+ MVC T151V1,T151V2
006B1E D209 C15C C166 06C2C 06C36 5908+ MVC T151V1,T151V2
006B24 D209 C15C C166 06C2C 06C36 5909+ MVC T151V1,T151V2
006B2A D209 C15C C166 06C2C 06C36 5910+ MVC T151V1,T151V2
006B30 D209 C15C C166 06C2C 06C36 5911+ MVC T151V1,T151V2
006B36 D209 C15C C166 06C2C 06C36 5912+ MVC T151V1,T151V2
006B3C D209 C15C C166 06C2C 06C36 5913+ MVC T151V1,T151V2
006B42 D209 C15C C166 06C2C 06C36 5914+ MVC T151V1,T151V2
006B48 D209 C15C C166 06C2C 06C36 5915+ MVC T151V1,T151V2
006B4E D209 C15C C166 06C2C 06C36 5916+ MVC T151V1,T151V2
006B54 D209 C15C C166 06C2C 06C36 5917+ MVC T151V1,T151V2
006B5A D209 C15C C166 06C2C 06C36 5918+ MVC T151V1,T151V2
006B60 D209 C15C C166 06C2C 06C36 5919+ MVC T151V1,T151V2
006B66 D209 C15C C166 06C2C 06C36 5920+ MVC T151V1,T151V2
006B6C D209 C15C C166 06C2C 06C36 5921+ MVC T151V1,T151V2
006B72 D209 C15C C166 06C2C 06C36 5922+ MVC T151V1,T151V2
006B78 D209 C15C C166 06C2C 06C36 5923+ MVC T151V1,T151V2
006B7E D209 C15C C166 06C2C 06C36 5924+ MVC T151V1,T151V2
PAGE 110
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
006B84 D209 C15C C166 06C2C 06C36 5925+ MVC T151V1,T151V2
006B8A D209 C15C C166 06C2C 06C36 5926+ MVC T151V1,T151V2
006B90 D209 C15C C166 06C2C 06C36 5927+ MVC T151V1,T151V2
006B96 D209 C15C C166 06C2C 06C36 5928+ MVC T151V1,T151V2
006B9C D209 C15C C166 06C2C 06C36 5929+ MVC T151V1,T151V2
006BA2 D209 C15C C166 06C2C 06C36 5930+ MVC T151V1,T151V2
006BA8 D209 C15C C166 06C2C 06C36 5931+ MVC T151V1,T151V2
006BAE D209 C15C C166 06C2C 06C36 5932+ MVC T151V1,T151V2
006BB4 D209 C15C C166 06C2C 06C36 5933+ MVC T151V1,T151V2
006BBA D209 C15C C166 06C2C 06C36 5934+ MVC T151V1,T151V2
006BC0 D209 C15C C166 06C2C 06C36 5935+ MVC T151V1,T151V2
006BC6 D209 C15C C166 06C2C 06C36 5936+ MVC T151V1,T151V2
006BCC D209 C15C C166 06C2C 06C36 5937+ MVC T151V1,T151V2
006BD2 D209 C15C C166 06C2C 06C36 5938+ MVC T151V1,T151V2
006BD8 D209 C15C C166 06C2C 06C36 5939+ MVC T151V1,T151V2
006BDE D209 C15C C166 06C2C 06C36 5940+ MVC T151V1,T151V2
006BE4 D209 C15C C166 06C2C 06C36 5941+ MVC T151V1,T151V2
006BEA D209 C15C C166 06C2C 06C36 5942+ MVC T151V1,T151V2
006BF0 D209 C15C C166 06C2C 06C36 5943+ MVC T151V1,T151V2
006BF6 D209 C15C C166 06C2C 06C36 5944+ MVC T151V1,T151V2
006BFC D209 C15C C166 06C2C 06C36 5945+ MVC T151V1,T151V2
006C02 D209 C15C C166 06C2C 06C36 5946+ MVC T151V1,T151V2
006C08 D209 C15C C166 06C2C 06C36 5947+ MVC T151V1,T151V2
006C0E D209 C15C C166 06C2C 06C36 5948+ MVC T151V1,T151V2
006C14 D209 C15C C166 06C2C 06C36 5949+ MVC T151V1,T151V2
5950+*
006C1A 06FB 5951 BCTR R15,R11
5952 TSIMRET
006C1C 58F0 C170 06C40 5953+ L R15,=A(SAVETST) R15 := current save area
006C20 58DF 0004 00004 5954+ L R13,4(R15) get old save area back
006C24 98EC D00C 0000C 5955+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
006C28 07FE 5956+ BR 14 RETURN 02000000
5957 *
006C2C 5958 DS 0F
006C2C 4040404040404040 5959 T151V1 DC CL10' '
006C36 F0F1F2F3F4F5F6F7 5960 T151V2 DC CL10'0123456789'
006C40 5961 DS 0H
5962 TSIMEND
006C40 5963+ LTORG
006C40 00000458 5964 =A(SAVETST)
06C44 5965+T151TEND EQU *
5966 *
5967 * Test 152 -- MVC m,m (15c) --------------------------------
5968 *
5969 TSIMBEG T152,5000,50,1,C'MVC m,m (15c)'
5970+*
002844 5971+TDSCDAT CSECT
002848 5972+ DS 0D
5973+*
002848 00006C48 5974+T152TDSC DC A(T152) // TENTRY
00284C 00000184 5975+ DC A(T152TEND-T152) // TLENGTH
002850 00001388 5976+ DC F'5000' // TLRCNT
002854 00000032 5977+ DC F'50' // TIGCNT
002858 00000001 5978+ DC F'1' // TLTYPE
001170 5979+TEXT CSECT
PAGE 111
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001170 E3F1F5F2 5980+SPTR0376 DC C'T152'
00285C 5981+TDSCDAT CSECT
00285C 5982+ DS 0F
00285C 04001170 5983+ DC AL1(L'SPTR0376),AL3(SPTR0376)
001174 5984+TEXT CSECT
001174 D4E5C340946B9440 5985+SPTR0377 DC C'MVC m,m (15c)'
002860 5986+TDSCDAT CSECT
002860 5987+ DS 0F
002860 0D001174 5988+ DC AL1(L'SPTR0377),AL3(SPTR0377)
5989+*
004A34 5990+TDSCTBL CSECT
04A34 5991+T152TPTR EQU *
004A34 00002848 5992+ DC A(T152TDSC) enabled test
5993+*
006C44 5994+TCODE CSECT
006C48 5995+ DS 0D ensure double word alignment for test
006C48 5996+T152 DS 0H 01650000
006C48 90EC D00C 0000C 5997+ STM 14,12,12(13) SAVE REGISTERS 02950000
006C4C 18CF 5998+ LR R12,R15 base register := entry address
06C48 5999+ USING T152,R12 declare code base register
006C4E 41B0 C01E 06C66 6000+ LA R11,T152L load loop target to R11
006C52 58F0 C180 06DC8 6001+ L R15,=A(SAVETST) R15 := current save area
006C56 50DF 0004 00004 6002+ ST R13,4(R15) set back pointer in current save area
006C5A 182D 6003+ LR R2,R13 remember callers save area
006C5C 18DF 6004+ LR R13,R15 setup current save area
006C5E 50D2 0008 00008 6005+ ST R13,8(R2) set forw pointer in callers save area
00000 6006+ USING TDSC,R1 declare TDSC base register
006C62 58F0 1008 00008 6007+ L R15,TLRCNT load local repeat count to R15
6008+*
6009 *
6010 T152L REPINS MVC,(T152V1,T152V2) repeat: MVC T152V1,T152V2
6011+*
6012+* build from sublist &ALIST a comma separated string &ARGS
6013+*
6014+*
6015+*
6016+*
6017+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
6018+* this allows to transfer the repeat count from last TDSCGEN call
6019+*
6020+*
06C66 6021+T152L EQU *
6022+*
6023+* write a comment indicating what REPINS does (in case NOGEN in effect)
6024+*
6025+*,// REPINS: do 50 times:
6026+*
6027+* MNOTE requires that ' is doubled for expanded variables
6028+* thus build &MASTR as a copy of '&ARGS with ' doubled
6029+*
6030+*
6031+*,// MVC T152V1,T152V2
6032+*
6033+* finally generate code: &ICNT copies of &CODE &ARGS
6034+*
PAGE 112
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
006C66 D20E C15C C16B 06DA4 06DB3 6035+ MVC T152V1,T152V2
006C6C D20E C15C C16B 06DA4 06DB3 6036+ MVC T152V1,T152V2
006C72 D20E C15C C16B 06DA4 06DB3 6037+ MVC T152V1,T152V2
006C78 D20E C15C C16B 06DA4 06DB3 6038+ MVC T152V1,T152V2
006C7E D20E C15C C16B 06DA4 06DB3 6039+ MVC T152V1,T152V2
006C84 D20E C15C C16B 06DA4 06DB3 6040+ MVC T152V1,T152V2
006C8A D20E C15C C16B 06DA4 06DB3 6041+ MVC T152V1,T152V2
006C90 D20E C15C C16B 06DA4 06DB3 6042+ MVC T152V1,T152V2
006C96 D20E C15C C16B 06DA4 06DB3 6043+ MVC T152V1,T152V2
006C9C D20E C15C C16B 06DA4 06DB3 6044+ MVC T152V1,T152V2
006CA2 D20E C15C C16B 06DA4 06DB3 6045+ MVC T152V1,T152V2
006CA8 D20E C15C C16B 06DA4 06DB3 6046+ MVC T152V1,T152V2
006CAE D20E C15C C16B 06DA4 06DB3 6047+ MVC T152V1,T152V2
006CB4 D20E C15C C16B 06DA4 06DB3 6048+ MVC T152V1,T152V2
006CBA D20E C15C C16B 06DA4 06DB3 6049+ MVC T152V1,T152V2
006CC0 D20E C15C C16B 06DA4 06DB3 6050+ MVC T152V1,T152V2
006CC6 D20E C15C C16B 06DA4 06DB3 6051+ MVC T152V1,T152V2
006CCC D20E C15C C16B 06DA4 06DB3 6052+ MVC T152V1,T152V2
006CD2 D20E C15C C16B 06DA4 06DB3 6053+ MVC T152V1,T152V2
006CD8 D20E C15C C16B 06DA4 06DB3 6054+ MVC T152V1,T152V2
006CDE D20E C15C C16B 06DA4 06DB3 6055+ MVC T152V1,T152V2
006CE4 D20E C15C C16B 06DA4 06DB3 6056+ MVC T152V1,T152V2
006CEA D20E C15C C16B 06DA4 06DB3 6057+ MVC T152V1,T152V2
006CF0 D20E C15C C16B 06DA4 06DB3 6058+ MVC T152V1,T152V2
006CF6 D20E C15C C16B 06DA4 06DB3 6059+ MVC T152V1,T152V2
006CFC D20E C15C C16B 06DA4 06DB3 6060+ MVC T152V1,T152V2
006D02 D20E C15C C16B 06DA4 06DB3 6061+ MVC T152V1,T152V2
006D08 D20E C15C C16B 06DA4 06DB3 6062+ MVC T152V1,T152V2
006D0E D20E C15C C16B 06DA4 06DB3 6063+ MVC T152V1,T152V2
006D14 D20E C15C C16B 06DA4 06DB3 6064+ MVC T152V1,T152V2
006D1A D20E C15C C16B 06DA4 06DB3 6065+ MVC T152V1,T152V2
006D20 D20E C15C C16B 06DA4 06DB3 6066+ MVC T152V1,T152V2
006D26 D20E C15C C16B 06DA4 06DB3 6067+ MVC T152V1,T152V2
006D2C D20E C15C C16B 06DA4 06DB3 6068+ MVC T152V1,T152V2
006D32 D20E C15C C16B 06DA4 06DB3 6069+ MVC T152V1,T152V2
006D38 D20E C15C C16B 06DA4 06DB3 6070+ MVC T152V1,T152V2
006D3E D20E C15C C16B 06DA4 06DB3 6071+ MVC T152V1,T152V2
006D44 D20E C15C C16B 06DA4 06DB3 6072+ MVC T152V1,T152V2
006D4A D20E C15C C16B 06DA4 06DB3 6073+ MVC T152V1,T152V2
006D50 D20E C15C C16B 06DA4 06DB3 6074+ MVC T152V1,T152V2
006D56 D20E C15C C16B 06DA4 06DB3 6075+ MVC T152V1,T152V2
006D5C D20E C15C C16B 06DA4 06DB3 6076+ MVC T152V1,T152V2
006D62 D20E C15C C16B 06DA4 06DB3 6077+ MVC T152V1,T152V2
006D68 D20E C15C C16B 06DA4 06DB3 6078+ MVC T152V1,T152V2
006D6E D20E C15C C16B 06DA4 06DB3 6079+ MVC T152V1,T152V2
006D74 D20E C15C C16B 06DA4 06DB3 6080+ MVC T152V1,T152V2
006D7A D20E C15C C16B 06DA4 06DB3 6081+ MVC T152V1,T152V2
006D80 D20E C15C C16B 06DA4 06DB3 6082+ MVC T152V1,T152V2
006D86 D20E C15C C16B 06DA4 06DB3 6083+ MVC T152V1,T152V2
006D8C D20E C15C C16B 06DA4 06DB3 6084+ MVC T152V1,T152V2
6085+*
006D92 06FB 6086 BCTR R15,R11
6087 TSIMRET
006D94 58F0 C180 06DC8 6088+ L R15,=A(SAVETST) R15 := current save area
006D98 58DF 0004 00004 6089+ L R13,4(R15) get old save area back
PAGE 113
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
006D9C 98EC D00C 0000C 6090+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
006DA0 07FE 6091+ BR 14 RETURN 02000000
6092 *
006DA4 6093 DS 0F
006DA4 4040404040404040 6094 T152V1 DC CL15' '
006DB3 F0F1F2F3F4F5F6F7 6095 T152V2 DC CL15'012345678901234'
006DC2 6096 DS 0H
6097 TSIMEND
006DC8 6098+ LTORG
006DC8 00000458 6099 =A(SAVETST)
06DCC 6100+T152TEND EQU *
6101 *
6102 * Test 153 -- MVC m,m (30c) --------------------------------
6103 *
6104 TSIMBEG T153,5000,50,1,C'MVC m,m (30c)'
6105+*
002864 6106+TDSCDAT CSECT
002868 6107+ DS 0D
6108+*
002868 00006DD0 6109+T153TDSC DC A(T153) // TENTRY
00286C 0000019C 6110+ DC A(T153TEND-T153) // TLENGTH
002870 00001388 6111+ DC F'5000' // TLRCNT
002874 00000032 6112+ DC F'50' // TIGCNT
002878 00000001 6113+ DC F'1' // TLTYPE
001181 6114+TEXT CSECT
001181 E3F1F5F3 6115+SPTR0388 DC C'T153'
00287C 6116+TDSCDAT CSECT
00287C 6117+ DS 0F
00287C 04001181 6118+ DC AL1(L'SPTR0388),AL3(SPTR0388)
001185 6119+TEXT CSECT
001185 D4E5C340946B9440 6120+SPTR0389 DC C'MVC m,m (30c)'
002880 6121+TDSCDAT CSECT
002880 6122+ DS 0F
002880 0D001185 6123+ DC AL1(L'SPTR0389),AL3(SPTR0389)
6124+*
004A38 6125+TDSCTBL CSECT
04A38 6126+T153TPTR EQU *
004A38 00002868 6127+ DC A(T153TDSC) enabled test
6128+*
006DCC 6129+TCODE CSECT
006DD0 6130+ DS 0D ensure double word alignment for test
006DD0 6131+T153 DS 0H 01650000
006DD0 90EC D00C 0000C 6132+ STM 14,12,12(13) SAVE REGISTERS 02950000
006DD4 18CF 6133+ LR R12,R15 base register := entry address
06DD0 6134+ USING T153,R12 declare code base register
006DD6 41B0 C01E 06DEE 6135+ LA R11,T153L load loop target to R11
006DDA 58F0 C198 06F68 6136+ L R15,=A(SAVETST) R15 := current save area
006DDE 50DF 0004 00004 6137+ ST R13,4(R15) set back pointer in current save area
006DE2 182D 6138+ LR R2,R13 remember callers save area
006DE4 18DF 6139+ LR R13,R15 setup current save area
006DE6 50D2 0008 00008 6140+ ST R13,8(R2) set forw pointer in callers save area
00000 6141+ USING TDSC,R1 declare TDSC base register
006DEA 58F0 1008 00008 6142+ L R15,TLRCNT load local repeat count to R15
6143+*
6144 *
PAGE 114
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
6145 T153L REPINS MVC,(T153V1,T153V2) repeat: MVC T153V1,T153V2
6146+*
6147+* build from sublist &ALIST a comma separated string &ARGS
6148+*
6149+*
6150+*
6151+*
6152+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
6153+* this allows to transfer the repeat count from last TDSCGEN call
6154+*
6155+*
06DEE 6156+T153L EQU *
6157+*
6158+* write a comment indicating what REPINS does (in case NOGEN in effect)
6159+*
6160+*,// REPINS: do 50 times:
6161+*
6162+* MNOTE requires that ' is doubled for expanded variables
6163+* thus build &MASTR as a copy of '&ARGS with ' doubled
6164+*
6165+*
6166+*,// MVC T153V1,T153V2
6167+*
6168+* finally generate code: &ICNT copies of &CODE &ARGS
6169+*
006DEE D21D C15C C17A 06F2C 06F4A 6170+ MVC T153V1,T153V2
006DF4 D21D C15C C17A 06F2C 06F4A 6171+ MVC T153V1,T153V2
006DFA D21D C15C C17A 06F2C 06F4A 6172+ MVC T153V1,T153V2
006E00 D21D C15C C17A 06F2C 06F4A 6173+ MVC T153V1,T153V2
006E06 D21D C15C C17A 06F2C 06F4A 6174+ MVC T153V1,T153V2
006E0C D21D C15C C17A 06F2C 06F4A 6175+ MVC T153V1,T153V2
006E12 D21D C15C C17A 06F2C 06F4A 6176+ MVC T153V1,T153V2
006E18 D21D C15C C17A 06F2C 06F4A 6177+ MVC T153V1,T153V2
006E1E D21D C15C C17A 06F2C 06F4A 6178+ MVC T153V1,T153V2
006E24 D21D C15C C17A 06F2C 06F4A 6179+ MVC T153V1,T153V2
006E2A D21D C15C C17A 06F2C 06F4A 6180+ MVC T153V1,T153V2
006E30 D21D C15C C17A 06F2C 06F4A 6181+ MVC T153V1,T153V2
006E36 D21D C15C C17A 06F2C 06F4A 6182+ MVC T153V1,T153V2
006E3C D21D C15C C17A 06F2C 06F4A 6183+ MVC T153V1,T153V2
006E42 D21D C15C C17A 06F2C 06F4A 6184+ MVC T153V1,T153V2
006E48 D21D C15C C17A 06F2C 06F4A 6185+ MVC T153V1,T153V2
006E4E D21D C15C C17A 06F2C 06F4A 6186+ MVC T153V1,T153V2
006E54 D21D C15C C17A 06F2C 06F4A 6187+ MVC T153V1,T153V2
006E5A D21D C15C C17A 06F2C 06F4A 6188+ MVC T153V1,T153V2
006E60 D21D C15C C17A 06F2C 06F4A 6189+ MVC T153V1,T153V2
006E66 D21D C15C C17A 06F2C 06F4A 6190+ MVC T153V1,T153V2
006E6C D21D C15C C17A 06F2C 06F4A 6191+ MVC T153V1,T153V2
006E72 D21D C15C C17A 06F2C 06F4A 6192+ MVC T153V1,T153V2
006E78 D21D C15C C17A 06F2C 06F4A 6193+ MVC T153V1,T153V2
006E7E D21D C15C C17A 06F2C 06F4A 6194+ MVC T153V1,T153V2
006E84 D21D C15C C17A 06F2C 06F4A 6195+ MVC T153V1,T153V2
006E8A D21D C15C C17A 06F2C 06F4A 6196+ MVC T153V1,T153V2
006E90 D21D C15C C17A 06F2C 06F4A 6197+ MVC T153V1,T153V2
006E96 D21D C15C C17A 06F2C 06F4A 6198+ MVC T153V1,T153V2
006E9C D21D C15C C17A 06F2C 06F4A 6199+ MVC T153V1,T153V2
PAGE 115
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
006EA2 D21D C15C C17A 06F2C 06F4A 6200+ MVC T153V1,T153V2
006EA8 D21D C15C C17A 06F2C 06F4A 6201+ MVC T153V1,T153V2
006EAE D21D C15C C17A 06F2C 06F4A 6202+ MVC T153V1,T153V2
006EB4 D21D C15C C17A 06F2C 06F4A 6203+ MVC T153V1,T153V2
006EBA D21D C15C C17A 06F2C 06F4A 6204+ MVC T153V1,T153V2
006EC0 D21D C15C C17A 06F2C 06F4A 6205+ MVC T153V1,T153V2
006EC6 D21D C15C C17A 06F2C 06F4A 6206+ MVC T153V1,T153V2
006ECC D21D C15C C17A 06F2C 06F4A 6207+ MVC T153V1,T153V2
006ED2 D21D C15C C17A 06F2C 06F4A 6208+ MVC T153V1,T153V2
006ED8 D21D C15C C17A 06F2C 06F4A 6209+ MVC T153V1,T153V2
006EDE D21D C15C C17A 06F2C 06F4A 6210+ MVC T153V1,T153V2
006EE4 D21D C15C C17A 06F2C 06F4A 6211+ MVC T153V1,T153V2
006EEA D21D C15C C17A 06F2C 06F4A 6212+ MVC T153V1,T153V2
006EF0 D21D C15C C17A 06F2C 06F4A 6213+ MVC T153V1,T153V2
006EF6 D21D C15C C17A 06F2C 06F4A 6214+ MVC T153V1,T153V2
006EFC D21D C15C C17A 06F2C 06F4A 6215+ MVC T153V1,T153V2
006F02 D21D C15C C17A 06F2C 06F4A 6216+ MVC T153V1,T153V2
006F08 D21D C15C C17A 06F2C 06F4A 6217+ MVC T153V1,T153V2
006F0E D21D C15C C17A 06F2C 06F4A 6218+ MVC T153V1,T153V2
006F14 D21D C15C C17A 06F2C 06F4A 6219+ MVC T153V1,T153V2
6220+*
006F1A 06FB 6221 BCTR R15,R11
6222 TSIMRET
006F1C 58F0 C198 06F68 6223+ L R15,=A(SAVETST) R15 := current save area
006F20 58DF 0004 00004 6224+ L R13,4(R15) get old save area back
006F24 98EC D00C 0000C 6225+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
006F28 07FE 6226+ BR 14 RETURN 02000000
6227 *
006F2C 6228 DS 0F
006F2C 4040404040404040 6229 T153V1 DC CL30' '
006F4A F0F1F2F3F4F5F6F7 6230 T153V2 DC CL30'012345678901234567890123456789'
006F68 6231 DS 0H
6232 TSIMEND
006F68 6233+ LTORG
006F68 00000458 6234 =A(SAVETST)
06F6C 6235+T153TEND EQU *
6236 *
6237 * Test 154 -- MVC m,m (100c) -------------------------------
6238 *
6239 TSIMBEG T154,4000,50,1,C'MVC m,m (100c)'
6240+*
002884 6241+TDSCDAT CSECT
002888 6242+ DS 0D
6243+*
002888 00006F70 6244+T154TDSC DC A(T154) // TENTRY
00288C 0000022C 6245+ DC A(T154TEND-T154) // TLENGTH
002890 00000FA0 6246+ DC F'4000' // TLRCNT
002894 00000032 6247+ DC F'50' // TIGCNT
002898 00000001 6248+ DC F'1' // TLTYPE
001192 6249+TEXT CSECT
001192 E3F1F5F4 6250+SPTR0400 DC C'T154'
00289C 6251+TDSCDAT CSECT
00289C 6252+ DS 0F
00289C 04001192 6253+ DC AL1(L'SPTR0400),AL3(SPTR0400)
001196 6254+TEXT CSECT
PAGE 116
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001196 D4E5C340946B9440 6255+SPTR0401 DC C'MVC m,m (100c)'
0028A0 6256+TDSCDAT CSECT
0028A0 6257+ DS 0F
0028A0 0E001196 6258+ DC AL1(L'SPTR0401),AL3(SPTR0401)
6259+*
004A3C 6260+TDSCTBL CSECT
04A3C 6261+T154TPTR EQU *
004A3C 00002888 6262+ DC A(T154TDSC) enabled test
6263+*
006F6C 6264+TCODE CSECT
006F70 6265+ DS 0D ensure double word alignment for test
006F70 6266+T154 DS 0H 01650000
006F70 90EC D00C 0000C 6267+ STM 14,12,12(13) SAVE REGISTERS 02950000
006F74 18CF 6268+ LR R12,R15 base register := entry address
06F70 6269+ USING T154,R12 declare code base register
006F76 41B0 C01E 06F8E 6270+ LA R11,T154L load loop target to R11
006F7A 58F0 C228 07198 6271+ L R15,=A(SAVETST) R15 := current save area
006F7E 50DF 0004 00004 6272+ ST R13,4(R15) set back pointer in current save area
006F82 182D 6273+ LR R2,R13 remember callers save area
006F84 18DF 6274+ LR R13,R15 setup current save area
006F86 50D2 0008 00008 6275+ ST R13,8(R2) set forw pointer in callers save area
00000 6276+ USING TDSC,R1 declare TDSC base register
006F8A 58F0 1008 00008 6277+ L R15,TLRCNT load local repeat count to R15
6278+*
6279 *
6280 T154L REPINS MVC,(T154V1,T154V2) repeat: MVC T154V1,T154V2
6281+*
6282+* build from sublist &ALIST a comma separated string &ARGS
6283+*
6284+*
6285+*
6286+*
6287+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
6288+* this allows to transfer the repeat count from last TDSCGEN call
6289+*
6290+*
06F8E 6291+T154L EQU *
6292+*
6293+* write a comment indicating what REPINS does (in case NOGEN in effect)
6294+*
6295+*,// REPINS: do 50 times:
6296+*
6297+* MNOTE requires that ' is doubled for expanded variables
6298+* thus build &MASTR as a copy of '&ARGS with ' doubled
6299+*
6300+*
6301+*,// MVC T154V1,T154V2
6302+*
6303+* finally generate code: &ICNT copies of &CODE &ARGS
6304+*
006F8E D263 C15C C1C0 070CC 07130 6305+ MVC T154V1,T154V2
006F94 D263 C15C C1C0 070CC 07130 6306+ MVC T154V1,T154V2
006F9A D263 C15C C1C0 070CC 07130 6307+ MVC T154V1,T154V2
006FA0 D263 C15C C1C0 070CC 07130 6308+ MVC T154V1,T154V2
006FA6 D263 C15C C1C0 070CC 07130 6309+ MVC T154V1,T154V2
PAGE 117
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
006FAC D263 C15C C1C0 070CC 07130 6310+ MVC T154V1,T154V2
006FB2 D263 C15C C1C0 070CC 07130 6311+ MVC T154V1,T154V2
006FB8 D263 C15C C1C0 070CC 07130 6312+ MVC T154V1,T154V2
006FBE D263 C15C C1C0 070CC 07130 6313+ MVC T154V1,T154V2
006FC4 D263 C15C C1C0 070CC 07130 6314+ MVC T154V1,T154V2
006FCA D263 C15C C1C0 070CC 07130 6315+ MVC T154V1,T154V2
006FD0 D263 C15C C1C0 070CC 07130 6316+ MVC T154V1,T154V2
006FD6 D263 C15C C1C0 070CC 07130 6317+ MVC T154V1,T154V2
006FDC D263 C15C C1C0 070CC 07130 6318+ MVC T154V1,T154V2
006FE2 D263 C15C C1C0 070CC 07130 6319+ MVC T154V1,T154V2
006FE8 D263 C15C C1C0 070CC 07130 6320+ MVC T154V1,T154V2
006FEE D263 C15C C1C0 070CC 07130 6321+ MVC T154V1,T154V2
006FF4 D263 C15C C1C0 070CC 07130 6322+ MVC T154V1,T154V2
006FFA D263 C15C C1C0 070CC 07130 6323+ MVC T154V1,T154V2
007000 D263 C15C C1C0 070CC 07130 6324+ MVC T154V1,T154V2
007006 D263 C15C C1C0 070CC 07130 6325+ MVC T154V1,T154V2
00700C D263 C15C C1C0 070CC 07130 6326+ MVC T154V1,T154V2
007012 D263 C15C C1C0 070CC 07130 6327+ MVC T154V1,T154V2
007018 D263 C15C C1C0 070CC 07130 6328+ MVC T154V1,T154V2
00701E D263 C15C C1C0 070CC 07130 6329+ MVC T154V1,T154V2
007024 D263 C15C C1C0 070CC 07130 6330+ MVC T154V1,T154V2
00702A D263 C15C C1C0 070CC 07130 6331+ MVC T154V1,T154V2
007030 D263 C15C C1C0 070CC 07130 6332+ MVC T154V1,T154V2
007036 D263 C15C C1C0 070CC 07130 6333+ MVC T154V1,T154V2
00703C D263 C15C C1C0 070CC 07130 6334+ MVC T154V1,T154V2
007042 D263 C15C C1C0 070CC 07130 6335+ MVC T154V1,T154V2
007048 D263 C15C C1C0 070CC 07130 6336+ MVC T154V1,T154V2
00704E D263 C15C C1C0 070CC 07130 6337+ MVC T154V1,T154V2
007054 D263 C15C C1C0 070CC 07130 6338+ MVC T154V1,T154V2
00705A D263 C15C C1C0 070CC 07130 6339+ MVC T154V1,T154V2
007060 D263 C15C C1C0 070CC 07130 6340+ MVC T154V1,T154V2
007066 D263 C15C C1C0 070CC 07130 6341+ MVC T154V1,T154V2
00706C D263 C15C C1C0 070CC 07130 6342+ MVC T154V1,T154V2
007072 D263 C15C C1C0 070CC 07130 6343+ MVC T154V1,T154V2
007078 D263 C15C C1C0 070CC 07130 6344+ MVC T154V1,T154V2
00707E D263 C15C C1C0 070CC 07130 6345+ MVC T154V1,T154V2
007084 D263 C15C C1C0 070CC 07130 6346+ MVC T154V1,T154V2
00708A D263 C15C C1C0 070CC 07130 6347+ MVC T154V1,T154V2
007090 D263 C15C C1C0 070CC 07130 6348+ MVC T154V1,T154V2
007096 D263 C15C C1C0 070CC 07130 6349+ MVC T154V1,T154V2
00709C D263 C15C C1C0 070CC 07130 6350+ MVC T154V1,T154V2
0070A2 D263 C15C C1C0 070CC 07130 6351+ MVC T154V1,T154V2
0070A8 D263 C15C C1C0 070CC 07130 6352+ MVC T154V1,T154V2
0070AE D263 C15C C1C0 070CC 07130 6353+ MVC T154V1,T154V2
0070B4 D263 C15C C1C0 070CC 07130 6354+ MVC T154V1,T154V2
6355+*
0070BA 06FB 6356 BCTR R15,R11
6357 TSIMRET
0070BC 58F0 C228 07198 6358+ L R15,=A(SAVETST) R15 := current save area
0070C0 58DF 0004 00004 6359+ L R13,4(R15) get old save area back
0070C4 98EC D00C 0000C 6360+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0070C8 07FE 6361+ BR 14 RETURN 02000000
6362 *
0070CC 6363 DS 0F
0070CC 4040404040404040 6364 T154V1 DC CL100' '
PAGE 118
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
007130 F0F1F2F3F4F5F6F7 6365 T154V2 DC CL100'0123456789'
6366 TSIMEND
007198 6367+ LTORG
007198 00000458 6368 =A(SAVETST)
0719C 6369+T154TEND EQU *
6370 *
6371 * Test 155 -- MVC m,m (250c) -------------------------------
6372 *
6373 TSIMBEG T155,7500,20,1,C'MVC m,m (250c)'
6374+*
0028A4 6375+TDSCDAT CSECT
0028A8 6376+ DS 0D
6377+*
0028A8 000071A0 6378+T155TDSC DC A(T155) // TENTRY
0028AC 000002A4 6379+ DC A(T155TEND-T155) // TLENGTH
0028B0 00001D4C 6380+ DC F'7500' // TLRCNT
0028B4 00000014 6381+ DC F'20' // TIGCNT
0028B8 00000001 6382+ DC F'1' // TLTYPE
0011A4 6383+TEXT CSECT
0011A4 E3F1F5F5 6384+SPTR0412 DC C'T155'
0028BC 6385+TDSCDAT CSECT
0028BC 6386+ DS 0F
0028BC 040011A4 6387+ DC AL1(L'SPTR0412),AL3(SPTR0412)
0011A8 6388+TEXT CSECT
0011A8 D4E5C340946B9440 6389+SPTR0413 DC C'MVC m,m (250c)'
0028C0 6390+TDSCDAT CSECT
0028C0 6391+ DS 0F
0028C0 0E0011A8 6392+ DC AL1(L'SPTR0413),AL3(SPTR0413)
6393+*
004A40 6394+TDSCTBL CSECT
04A40 6395+T155TPTR EQU *
004A40 000028A8 6396+ DC A(T155TDSC) enabled test
6397+*
00719C 6398+TCODE CSECT
0071A0 6399+ DS 0D ensure double word alignment for test
0071A0 6400+T155 DS 0H 01650000
0071A0 90EC D00C 0000C 6401+ STM 14,12,12(13) SAVE REGISTERS 02950000
0071A4 18CF 6402+ LR R12,R15 base register := entry address
071A0 6403+ USING T155,R12 declare code base register
0071A6 41B0 C01E 071BE 6404+ LA R11,T155L load loop target to R11
0071AA 58F0 C2A0 07440 6405+ L R15,=A(SAVETST) R15 := current save area
0071AE 50DF 0004 00004 6406+ ST R13,4(R15) set back pointer in current save area
0071B2 182D 6407+ LR R2,R13 remember callers save area
0071B4 18DF 6408+ LR R13,R15 setup current save area
0071B6 50D2 0008 00008 6409+ ST R13,8(R2) set forw pointer in callers save area
00000 6410+ USING TDSC,R1 declare TDSC base register
0071BA 58F0 1008 00008 6411+ L R15,TLRCNT load local repeat count to R15
6412+*
6413 *
6414 T155L REPINS MVC,(T155V1,T155V2) repeat: MVC T155V1,T155V2
6415+*
6416+* build from sublist &ALIST a comma separated string &ARGS
6417+*
6418+*
6419+*
PAGE 119
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
6420+*
6421+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
6422+* this allows to transfer the repeat count from last TDSCGEN call
6423+*
6424+*
071BE 6425+T155L EQU *
6426+*
6427+* write a comment indicating what REPINS does (in case NOGEN in effect)
6428+*
6429+*,// REPINS: do 20 times:
6430+*
6431+* MNOTE requires that ' is doubled for expanded variables
6432+* thus build &MASTR as a copy of '&ARGS with ' doubled
6433+*
6434+*
6435+*,// MVC T155V1,T155V2
6436+*
6437+* finally generate code: &ICNT copies of &CODE &ARGS
6438+*
0071BE D2F9 C0A8 C1A2 07248 07342 6439+ MVC T155V1,T155V2
0071C4 D2F9 C0A8 C1A2 07248 07342 6440+ MVC T155V1,T155V2
0071CA D2F9 C0A8 C1A2 07248 07342 6441+ MVC T155V1,T155V2
0071D0 D2F9 C0A8 C1A2 07248 07342 6442+ MVC T155V1,T155V2
0071D6 D2F9 C0A8 C1A2 07248 07342 6443+ MVC T155V1,T155V2
0071DC D2F9 C0A8 C1A2 07248 07342 6444+ MVC T155V1,T155V2
0071E2 D2F9 C0A8 C1A2 07248 07342 6445+ MVC T155V1,T155V2
0071E8 D2F9 C0A8 C1A2 07248 07342 6446+ MVC T155V1,T155V2
0071EE D2F9 C0A8 C1A2 07248 07342 6447+ MVC T155V1,T155V2
0071F4 D2F9 C0A8 C1A2 07248 07342 6448+ MVC T155V1,T155V2
0071FA D2F9 C0A8 C1A2 07248 07342 6449+ MVC T155V1,T155V2
007200 D2F9 C0A8 C1A2 07248 07342 6450+ MVC T155V1,T155V2
007206 D2F9 C0A8 C1A2 07248 07342 6451+ MVC T155V1,T155V2
00720C D2F9 C0A8 C1A2 07248 07342 6452+ MVC T155V1,T155V2
007212 D2F9 C0A8 C1A2 07248 07342 6453+ MVC T155V1,T155V2
007218 D2F9 C0A8 C1A2 07248 07342 6454+ MVC T155V1,T155V2
00721E D2F9 C0A8 C1A2 07248 07342 6455+ MVC T155V1,T155V2
007224 D2F9 C0A8 C1A2 07248 07342 6456+ MVC T155V1,T155V2
00722A D2F9 C0A8 C1A2 07248 07342 6457+ MVC T155V1,T155V2
007230 D2F9 C0A8 C1A2 07248 07342 6458+ MVC T155V1,T155V2
6459+*
007236 06FB 6460 BCTR R15,R11
6461 TSIMRET
007238 58F0 C2A0 07440 6462+ L R15,=A(SAVETST) R15 := current save area
00723C 58DF 0004 00004 6463+ L R13,4(R15) get old save area back
007240 98EC D00C 0000C 6464+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
007244 07FE 6465+ BR 14 RETURN 02000000
6466 *
007248 6467 DS 0F
007248 4040404040404040 6468 T155V1 DC CL250' '
007342 F0F1F2F3F4F5F6F7 6469 T155V2 DC CL250'0123456789'
6470 TSIMEND
007440 6471+ LTORG
007440 00000458 6472 =A(SAVETST)
07444 6473+T155TEND EQU *
6474 *
PAGE 120
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
6475 * Test 156 -- MVC m,m (250c,over1) -------------------------
6476 * test byte propagation usage of MVC
6477 * destination offset by + 1 byte to source
6478 * 250 bytes touched, MVC length determined by destination
6479 *
6480 TSIMBEG T156,700,20,1,C'MVC m,m (250c,over1)'
6481+*
0028C4 6482+TDSCDAT CSECT
0028C8 6483+ DS 0D
6484+*
0028C8 00007448 6485+T156TDSC DC A(T156) // TENTRY
0028CC 000001AC 6486+ DC A(T156TEND-T156) // TLENGTH
0028D0 000002BC 6487+ DC F'700' // TLRCNT
0028D4 00000014 6488+ DC F'20' // TIGCNT
0028D8 00000001 6489+ DC F'1' // TLTYPE
0011B6 6490+TEXT CSECT
0011B6 E3F1F5F6 6491+SPTR0424 DC C'T156'
0028DC 6492+TDSCDAT CSECT
0028DC 6493+ DS 0F
0028DC 040011B6 6494+ DC AL1(L'SPTR0424),AL3(SPTR0424)
0011BA 6495+TEXT CSECT
0011BA D4E5C340946B9440 6496+SPTR0425 DC C'MVC m,m (250c,over1)'
0028E0 6497+TDSCDAT CSECT
0028E0 6498+ DS 0F
0028E0 140011BA 6499+ DC AL1(L'SPTR0425),AL3(SPTR0425)
6500+*
004A44 6501+TDSCTBL CSECT
04A44 6502+T156TPTR EQU *
004A44 000028C8 6503+ DC A(T156TDSC) enabled test
6504+*
007444 6505+TCODE CSECT
007448 6506+ DS 0D ensure double word alignment for test
007448 6507+T156 DS 0H 01650000
007448 90EC D00C 0000C 6508+ STM 14,12,12(13) SAVE REGISTERS 02950000
00744C 18CF 6509+ LR R12,R15 base register := entry address
07448 6510+ USING T156,R12 declare code base register
00744E 41B0 C01E 07466 6511+ LA R11,T156L load loop target to R11
007452 58F0 C1A8 075F0 6512+ L R15,=A(SAVETST) R15 := current save area
007456 50DF 0004 00004 6513+ ST R13,4(R15) set back pointer in current save area
00745A 182D 6514+ LR R2,R13 remember callers save area
00745C 18DF 6515+ LR R13,R15 setup current save area
00745E 50D2 0008 00008 6516+ ST R13,8(R2) set forw pointer in callers save area
00000 6517+ USING TDSC,R1 declare TDSC base register
007462 58F0 1008 00008 6518+ L R15,TLRCNT load local repeat count to R15
6519+*
6520 *
6521 T156L REPINS MVC,(T156V2,T156V1) repeat: MVC T156V2,T156V1
6522+*
6523+* build from sublist &ALIST a comma separated string &ARGS
6524+*
6525+*
6526+*
6527+*
6528+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
6529+* this allows to transfer the repeat count from last TDSCGEN call
PAGE 121
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
6530+*
6531+*
07466 6532+T156L EQU *
6533+*
6534+* write a comment indicating what REPINS does (in case NOGEN in effect)
6535+*
6536+*,// REPINS: do 20 times:
6537+*
6538+* MNOTE requires that ' is doubled for expanded variables
6539+* thus build &MASTR as a copy of '&ARGS with ' doubled
6540+*
6541+*
6542+*,// MVC T156V2,T156V1
6543+*
6544+* finally generate code: &ICNT copies of &CODE &ARGS
6545+*
007466 D2F9 C0A9 C0A8 074F1 074F0 6546+ MVC T156V2,T156V1
00746C D2F9 C0A9 C0A8 074F1 074F0 6547+ MVC T156V2,T156V1
007472 D2F9 C0A9 C0A8 074F1 074F0 6548+ MVC T156V2,T156V1
007478 D2F9 C0A9 C0A8 074F1 074F0 6549+ MVC T156V2,T156V1
00747E D2F9 C0A9 C0A8 074F1 074F0 6550+ MVC T156V2,T156V1
007484 D2F9 C0A9 C0A8 074F1 074F0 6551+ MVC T156V2,T156V1
00748A D2F9 C0A9 C0A8 074F1 074F0 6552+ MVC T156V2,T156V1
007490 D2F9 C0A9 C0A8 074F1 074F0 6553+ MVC T156V2,T156V1
007496 D2F9 C0A9 C0A8 074F1 074F0 6554+ MVC T156V2,T156V1
00749C D2F9 C0A9 C0A8 074F1 074F0 6555+ MVC T156V2,T156V1
0074A2 D2F9 C0A9 C0A8 074F1 074F0 6556+ MVC T156V2,T156V1
0074A8 D2F9 C0A9 C0A8 074F1 074F0 6557+ MVC T156V2,T156V1
0074AE D2F9 C0A9 C0A8 074F1 074F0 6558+ MVC T156V2,T156V1
0074B4 D2F9 C0A9 C0A8 074F1 074F0 6559+ MVC T156V2,T156V1
0074BA D2F9 C0A9 C0A8 074F1 074F0 6560+ MVC T156V2,T156V1
0074C0 D2F9 C0A9 C0A8 074F1 074F0 6561+ MVC T156V2,T156V1
0074C6 D2F9 C0A9 C0A8 074F1 074F0 6562+ MVC T156V2,T156V1
0074CC D2F9 C0A9 C0A8 074F1 074F0 6563+ MVC T156V2,T156V1
0074D2 D2F9 C0A9 C0A8 074F1 074F0 6564+ MVC T156V2,T156V1
0074D8 D2F9 C0A9 C0A8 074F1 074F0 6565+ MVC T156V2,T156V1
6566+*
0074DE 06FB 6567 BCTR R15,R11
6568 TSIMRET
0074E0 58F0 C1A8 075F0 6569+ L R15,=A(SAVETST) R15 := current save area
0074E4 58DF 0004 00004 6570+ L R13,4(R15) get old save area back
0074E8 98EC D00C 0000C 6571+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0074EC 07FE 6572+ BR 14 RETURN 02000000
6573 *
0074F0 6574 DS 0F
0074F0 40 6575 T156V1 DC C' ' byte to propagate
0074F1 F0F1F2F3F4F5F6F7 6576 T156V2 DC CL250'0123456789' into this target buffer
6577 TSIMEND
0075F0 6578+ LTORG
0075F0 00000458 6579 =A(SAVETST)
075F4 6580+T156TEND EQU *
6581 *
6582 * Test 157 -- MVC m,m (250c,over2) -------------------------
6583 * test buffer shift left usage of MVC
6584 * destination offset by -24 byte to source
PAGE 122
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
6585 *
6586 TSIMBEG T157,7500,20,1,C'MVC m,m (250c,over2)'
6587+*
0028E4 6588+TDSCDAT CSECT
0028E8 6589+ DS 0D
6590+*
0028E8 000075F8 6591+T157TDSC DC A(T157) // TENTRY
0028EC 000001C4 6592+ DC A(T157TEND-T157) // TLENGTH
0028F0 00001D4C 6593+ DC F'7500' // TLRCNT
0028F4 00000014 6594+ DC F'20' // TIGCNT
0028F8 00000001 6595+ DC F'1' // TLTYPE
0011CE 6596+TEXT CSECT
0011CE E3F1F5F7 6597+SPTR0436 DC C'T157'
0028FC 6598+TDSCDAT CSECT
0028FC 6599+ DS 0F
0028FC 040011CE 6600+ DC AL1(L'SPTR0436),AL3(SPTR0436)
0011D2 6601+TEXT CSECT
0011D2 D4E5C340946B9440 6602+SPTR0437 DC C'MVC m,m (250c,over2)'
002900 6603+TDSCDAT CSECT
002900 6604+ DS 0F
002900 140011D2 6605+ DC AL1(L'SPTR0437),AL3(SPTR0437)
6606+*
004A48 6607+TDSCTBL CSECT
04A48 6608+T157TPTR EQU *
004A48 000028E8 6609+ DC A(T157TDSC) enabled test
6610+*
0075F4 6611+TCODE CSECT
0075F8 6612+ DS 0D ensure double word alignment for test
0075F8 6613+T157 DS 0H 01650000
0075F8 90EC D00C 0000C 6614+ STM 14,12,12(13) SAVE REGISTERS 02950000
0075FC 18CF 6615+ LR R12,R15 base register := entry address
075F8 6616+ USING T157,R12 declare code base register
0075FE 41B0 C01E 07616 6617+ LA R11,T157L load loop target to R11
007602 58F0 C1C0 077B8 6618+ L R15,=A(SAVETST) R15 := current save area
007606 50DF 0004 00004 6619+ ST R13,4(R15) set back pointer in current save area
00760A 182D 6620+ LR R2,R13 remember callers save area
00760C 18DF 6621+ LR R13,R15 setup current save area
00760E 50D2 0008 00008 6622+ ST R13,8(R2) set forw pointer in callers save area
00000 6623+ USING TDSC,R1 declare TDSC base register
007612 58F0 1008 00008 6624+ L R15,TLRCNT load local repeat count to R15
6625+*
6626 *
6627 T157L REPINS MVC,(T157V1(250),T157V2)
6628+*
6629+* build from sublist &ALIST a comma separated string &ARGS
6630+*
6631+*
6632+*
6633+*
6634+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
6635+* this allows to transfer the repeat count from last TDSCGEN call
6636+*
6637+*
07616 6638+T157L EQU *
6639+*
PAGE 123
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
6640+* write a comment indicating what REPINS does (in case NOGEN in effect)
6641+*
6642+*,// REPINS: do 20 times:
6643+*
6644+* MNOTE requires that ' is doubled for expanded variables
6645+* thus build &MASTR as a copy of '&ARGS with ' doubled
6646+*
6647+*
6648+*,// MVC T157V1(250),T157V2
6649+*
6650+* finally generate code: &ICNT copies of &CODE &ARGS
6651+*
007616 D2F9 C0A8 C0C0 076A0 076B8 6652+ MVC T157V1(250),T157V2
00761C D2F9 C0A8 C0C0 076A0 076B8 6653+ MVC T157V1(250),T157V2
007622 D2F9 C0A8 C0C0 076A0 076B8 6654+ MVC T157V1(250),T157V2
007628 D2F9 C0A8 C0C0 076A0 076B8 6655+ MVC T157V1(250),T157V2
00762E D2F9 C0A8 C0C0 076A0 076B8 6656+ MVC T157V1(250),T157V2
007634 D2F9 C0A8 C0C0 076A0 076B8 6657+ MVC T157V1(250),T157V2
00763A D2F9 C0A8 C0C0 076A0 076B8 6658+ MVC T157V1(250),T157V2
007640 D2F9 C0A8 C0C0 076A0 076B8 6659+ MVC T157V1(250),T157V2
007646 D2F9 C0A8 C0C0 076A0 076B8 6660+ MVC T157V1(250),T157V2
00764C D2F9 C0A8 C0C0 076A0 076B8 6661+ MVC T157V1(250),T157V2
007652 D2F9 C0A8 C0C0 076A0 076B8 6662+ MVC T157V1(250),T157V2
007658 D2F9 C0A8 C0C0 076A0 076B8 6663+ MVC T157V1(250),T157V2
00765E D2F9 C0A8 C0C0 076A0 076B8 6664+ MVC T157V1(250),T157V2
007664 D2F9 C0A8 C0C0 076A0 076B8 6665+ MVC T157V1(250),T157V2
00766A D2F9 C0A8 C0C0 076A0 076B8 6666+ MVC T157V1(250),T157V2
007670 D2F9 C0A8 C0C0 076A0 076B8 6667+ MVC T157V1(250),T157V2
007676 D2F9 C0A8 C0C0 076A0 076B8 6668+ MVC T157V1(250),T157V2
00767C D2F9 C0A8 C0C0 076A0 076B8 6669+ MVC T157V1(250),T157V2
007682 D2F9 C0A8 C0C0 076A0 076B8 6670+ MVC T157V1(250),T157V2
007688 D2F9 C0A8 C0C0 076A0 076B8 6671+ MVC T157V1(250),T157V2
6672+*
00768E 06FB 6673 BCTR R15,R11
6674 TSIMRET
007690 58F0 C1C0 077B8 6675+ L R15,=A(SAVETST) R15 := current save area
007694 58DF 0004 00004 6676+ L R13,4(R15) get old save area back
007698 98EC D00C 0000C 6677+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00769C 07FE 6678+ BR 14 RETURN 02000000
6679 *
0076A0 6680 DS 0F
0076A0 6681 T157V1 DS 24C target
0076B8 F0F1F3F3F4F5F6F7 6682 T157V2 DC CL250'0133456789' source (1/10th overlap)
6683 TSIMEND
0077B8 6684+ LTORG
0077B8 00000458 6685 =A(SAVETST)
077BC 6686+T157TEND EQU *
6687 *
6688 * Test 16x -- MVI,MVN,MVZ,MVCIN ============================
6689 *
6690 * Test 160 -- MVI m,i --------------------------------------
6691 *
6692 TSIMBEG T160,6000,100,1,C'MVI m,i'
6693+*
002904 6694+TDSCDAT CSECT
PAGE 124
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002908 6695+ DS 0D
6696+*
002908 000077C0 6697+T160TDSC DC A(T160) // TENTRY
00290C 000001C4 6698+ DC A(T160TEND-T160) // TLENGTH
002910 00001770 6699+ DC F'6000' // TLRCNT
002914 00000064 6700+ DC F'100' // TIGCNT
002918 00000001 6701+ DC F'1' // TLTYPE
0011E6 6702+TEXT CSECT
0011E6 E3F1F6F0 6703+SPTR0448 DC C'T160'
00291C 6704+TDSCDAT CSECT
00291C 6705+ DS 0F
00291C 040011E6 6706+ DC AL1(L'SPTR0448),AL3(SPTR0448)
0011EA 6707+TEXT CSECT
0011EA D4E5C940946B89 6708+SPTR0449 DC C'MVI m,i'
002920 6709+TDSCDAT CSECT
002920 6710+ DS 0F
002920 070011EA 6711+ DC AL1(L'SPTR0449),AL3(SPTR0449)
6712+*
004A4C 6713+TDSCTBL CSECT
04A4C 6714+T160TPTR EQU *
004A4C 00002908 6715+ DC A(T160TDSC) enabled test
6716+*
0077BC 6717+TCODE CSECT
0077C0 6718+ DS 0D ensure double word alignment for test
0077C0 6719+T160 DS 0H 01650000
0077C0 90EC D00C 0000C 6720+ STM 14,12,12(13) SAVE REGISTERS 02950000
0077C4 18CF 6721+ LR R12,R15 base register := entry address
077C0 6722+ USING T160,R12 declare code base register
0077C6 41B0 C01E 077DE 6723+ LA R11,T160L load loop target to R11
0077CA 58F0 C1C0 07980 6724+ L R15,=A(SAVETST) R15 := current save area
0077CE 50DF 0004 00004 6725+ ST R13,4(R15) set back pointer in current save area
0077D2 182D 6726+ LR R2,R13 remember callers save area
0077D4 18DF 6727+ LR R13,R15 setup current save area
0077D6 50D2 0008 00008 6728+ ST R13,8(R2) set forw pointer in callers save area
00000 6729+ USING TDSC,R1 declare TDSC base register
0077DA 58F0 1008 00008 6730+ L R15,TLRCNT load local repeat count to R15
6731+*
6732 *
6733 T160L REPINS MVI,(T160V1,C'x') repeat: MVI T160V1,C'x'
6734+*
6735+* build from sublist &ALIST a comma separated string &ARGS
6736+*
6737+*
6738+*
6739+*
6740+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
6741+* this allows to transfer the repeat count from last TDSCGEN call
6742+*
6743+*
077DE 6744+T160L EQU *
6745+*
6746+* write a comment indicating what REPINS does (in case NOGEN in effect)
6747+*
6748+*,// REPINS: do 100 times:
6749+*
PAGE 125
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
6750+* MNOTE requires that ' is doubled for expanded variables
6751+* thus build &MASTR as a copy of '&ARGS with ' doubled
6752+*
6753+*
6754+*,// MVI T160V1,C'x'
6755+*
6756+* finally generate code: &ICNT copies of &CODE &ARGS
6757+*
0077DE 92A7 C1BE 0797E 6758+ MVI T160V1,C'x'
0077E2 92A7 C1BE 0797E 6759+ MVI T160V1,C'x'
0077E6 92A7 C1BE 0797E 6760+ MVI T160V1,C'x'
0077EA 92A7 C1BE 0797E 6761+ MVI T160V1,C'x'
0077EE 92A7 C1BE 0797E 6762+ MVI T160V1,C'x'
0077F2 92A7 C1BE 0797E 6763+ MVI T160V1,C'x'
0077F6 92A7 C1BE 0797E 6764+ MVI T160V1,C'x'
0077FA 92A7 C1BE 0797E 6765+ MVI T160V1,C'x'
0077FE 92A7 C1BE 0797E 6766+ MVI T160V1,C'x'
007802 92A7 C1BE 0797E 6767+ MVI T160V1,C'x'
007806 92A7 C1BE 0797E 6768+ MVI T160V1,C'x'
00780A 92A7 C1BE 0797E 6769+ MVI T160V1,C'x'
00780E 92A7 C1BE 0797E 6770+ MVI T160V1,C'x'
007812 92A7 C1BE 0797E 6771+ MVI T160V1,C'x'
007816 92A7 C1BE 0797E 6772+ MVI T160V1,C'x'
00781A 92A7 C1BE 0797E 6773+ MVI T160V1,C'x'
00781E 92A7 C1BE 0797E 6774+ MVI T160V1,C'x'
007822 92A7 C1BE 0797E 6775+ MVI T160V1,C'x'
007826 92A7 C1BE 0797E 6776+ MVI T160V1,C'x'
00782A 92A7 C1BE 0797E 6777+ MVI T160V1,C'x'
00782E 92A7 C1BE 0797E 6778+ MVI T160V1,C'x'
007832 92A7 C1BE 0797E 6779+ MVI T160V1,C'x'
007836 92A7 C1BE 0797E 6780+ MVI T160V1,C'x'
00783A 92A7 C1BE 0797E 6781+ MVI T160V1,C'x'
00783E 92A7 C1BE 0797E 6782+ MVI T160V1,C'x'
007842 92A7 C1BE 0797E 6783+ MVI T160V1,C'x'
007846 92A7 C1BE 0797E 6784+ MVI T160V1,C'x'
00784A 92A7 C1BE 0797E 6785+ MVI T160V1,C'x'
00784E 92A7 C1BE 0797E 6786+ MVI T160V1,C'x'
007852 92A7 C1BE 0797E 6787+ MVI T160V1,C'x'
007856 92A7 C1BE 0797E 6788+ MVI T160V1,C'x'
00785A 92A7 C1BE 0797E 6789+ MVI T160V1,C'x'
00785E 92A7 C1BE 0797E 6790+ MVI T160V1,C'x'
007862 92A7 C1BE 0797E 6791+ MVI T160V1,C'x'
007866 92A7 C1BE 0797E 6792+ MVI T160V1,C'x'
00786A 92A7 C1BE 0797E 6793+ MVI T160V1,C'x'
00786E 92A7 C1BE 0797E 6794+ MVI T160V1,C'x'
007872 92A7 C1BE 0797E 6795+ MVI T160V1,C'x'
007876 92A7 C1BE 0797E 6796+ MVI T160V1,C'x'
00787A 92A7 C1BE 0797E 6797+ MVI T160V1,C'x'
00787E 92A7 C1BE 0797E 6798+ MVI T160V1,C'x'
007882 92A7 C1BE 0797E 6799+ MVI T160V1,C'x'
007886 92A7 C1BE 0797E 6800+ MVI T160V1,C'x'
00788A 92A7 C1BE 0797E 6801+ MVI T160V1,C'x'
00788E 92A7 C1BE 0797E 6802+ MVI T160V1,C'x'
007892 92A7 C1BE 0797E 6803+ MVI T160V1,C'x'
007896 92A7 C1BE 0797E 6804+ MVI T160V1,C'x'
PAGE 126
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00789A 92A7 C1BE 0797E 6805+ MVI T160V1,C'x'
00789E 92A7 C1BE 0797E 6806+ MVI T160V1,C'x'
0078A2 92A7 C1BE 0797E 6807+ MVI T160V1,C'x'
0078A6 92A7 C1BE 0797E 6808+ MVI T160V1,C'x'
0078AA 92A7 C1BE 0797E 6809+ MVI T160V1,C'x'
0078AE 92A7 C1BE 0797E 6810+ MVI T160V1,C'x'
0078B2 92A7 C1BE 0797E 6811+ MVI T160V1,C'x'
0078B6 92A7 C1BE 0797E 6812+ MVI T160V1,C'x'
0078BA 92A7 C1BE 0797E 6813+ MVI T160V1,C'x'
0078BE 92A7 C1BE 0797E 6814+ MVI T160V1,C'x'
0078C2 92A7 C1BE 0797E 6815+ MVI T160V1,C'x'
0078C6 92A7 C1BE 0797E 6816+ MVI T160V1,C'x'
0078CA 92A7 C1BE 0797E 6817+ MVI T160V1,C'x'
0078CE 92A7 C1BE 0797E 6818+ MVI T160V1,C'x'
0078D2 92A7 C1BE 0797E 6819+ MVI T160V1,C'x'
0078D6 92A7 C1BE 0797E 6820+ MVI T160V1,C'x'
0078DA 92A7 C1BE 0797E 6821+ MVI T160V1,C'x'
0078DE 92A7 C1BE 0797E 6822+ MVI T160V1,C'x'
0078E2 92A7 C1BE 0797E 6823+ MVI T160V1,C'x'
0078E6 92A7 C1BE 0797E 6824+ MVI T160V1,C'x'
0078EA 92A7 C1BE 0797E 6825+ MVI T160V1,C'x'
0078EE 92A7 C1BE 0797E 6826+ MVI T160V1,C'x'
0078F2 92A7 C1BE 0797E 6827+ MVI T160V1,C'x'
0078F6 92A7 C1BE 0797E 6828+ MVI T160V1,C'x'
0078FA 92A7 C1BE 0797E 6829+ MVI T160V1,C'x'
0078FE 92A7 C1BE 0797E 6830+ MVI T160V1,C'x'
007902 92A7 C1BE 0797E 6831+ MVI T160V1,C'x'
007906 92A7 C1BE 0797E 6832+ MVI T160V1,C'x'
00790A 92A7 C1BE 0797E 6833+ MVI T160V1,C'x'
00790E 92A7 C1BE 0797E 6834+ MVI T160V1,C'x'
007912 92A7 C1BE 0797E 6835+ MVI T160V1,C'x'
007916 92A7 C1BE 0797E 6836+ MVI T160V1,C'x'
00791A 92A7 C1BE 0797E 6837+ MVI T160V1,C'x'
00791E 92A7 C1BE 0797E 6838+ MVI T160V1,C'x'
007922 92A7 C1BE 0797E 6839+ MVI T160V1,C'x'
007926 92A7 C1BE 0797E 6840+ MVI T160V1,C'x'
00792A 92A7 C1BE 0797E 6841+ MVI T160V1,C'x'
00792E 92A7 C1BE 0797E 6842+ MVI T160V1,C'x'
007932 92A7 C1BE 0797E 6843+ MVI T160V1,C'x'
007936 92A7 C1BE 0797E 6844+ MVI T160V1,C'x'
00793A 92A7 C1BE 0797E 6845+ MVI T160V1,C'x'
00793E 92A7 C1BE 0797E 6846+ MVI T160V1,C'x'
007942 92A7 C1BE 0797E 6847+ MVI T160V1,C'x'
007946 92A7 C1BE 0797E 6848+ MVI T160V1,C'x'
00794A 92A7 C1BE 0797E 6849+ MVI T160V1,C'x'
00794E 92A7 C1BE 0797E 6850+ MVI T160V1,C'x'
007952 92A7 C1BE 0797E 6851+ MVI T160V1,C'x'
007956 92A7 C1BE 0797E 6852+ MVI T160V1,C'x'
00795A 92A7 C1BE 0797E 6853+ MVI T160V1,C'x'
00795E 92A7 C1BE 0797E 6854+ MVI T160V1,C'x'
007962 92A7 C1BE 0797E 6855+ MVI T160V1,C'x'
007966 92A7 C1BE 0797E 6856+ MVI T160V1,C'x'
00796A 92A7 C1BE 0797E 6857+ MVI T160V1,C'x'
6858+*
00796E 06FB 6859 BCTR R15,R11
PAGE 127
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
6860 TSIMRET
007970 58F0 C1C0 07980 6861+ L R15,=A(SAVETST) R15 := current save area
007974 58DF 0004 00004 6862+ L R13,4(R15) get old save area back
007978 98EC D00C 0000C 6863+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00797C 07FE 6864+ BR 14 RETURN 02000000
6865 *
00797E 40 6866 T160V1 DC C' '
6867 TSIMEND
007980 6868+ LTORG
007980 00000458 6869 =A(SAVETST)
07984 6870+T160TEND EQU *
6871 *
6872 * Test 161 -- MVN m,m (10c) --------------------------------
6873 *
6874 TSIMBEG T161,5000,50,1,C'MVN m,m (10c)'
6875+*
002924 6876+TDSCDAT CSECT
002928 6877+ DS 0D
6878+*
002928 00007988 6879+T161TDSC DC A(T161) // TENTRY
00292C 00000174 6880+ DC A(T161TEND-T161) // TLENGTH
002930 00001388 6881+ DC F'5000' // TLRCNT
002934 00000032 6882+ DC F'50' // TIGCNT
002938 00000001 6883+ DC F'1' // TLTYPE
0011F1 6884+TEXT CSECT
0011F1 E3F1F6F1 6885+SPTR0460 DC C'T161'
00293C 6886+TDSCDAT CSECT
00293C 6887+ DS 0F
00293C 040011F1 6888+ DC AL1(L'SPTR0460),AL3(SPTR0460)
0011F5 6889+TEXT CSECT
0011F5 D4E5D540946B9440 6890+SPTR0461 DC C'MVN m,m (10c)'
002940 6891+TDSCDAT CSECT
002940 6892+ DS 0F
002940 0D0011F5 6893+ DC AL1(L'SPTR0461),AL3(SPTR0461)
6894+*
004A50 6895+TDSCTBL CSECT
04A50 6896+T161TPTR EQU *
004A50 00002928 6897+ DC A(T161TDSC) enabled test
6898+*
007984 6899+TCODE CSECT
007988 6900+ DS 0D ensure double word alignment for test
007988 6901+T161 DS 0H 01650000
007988 90EC D00C 0000C 6902+ STM 14,12,12(13) SAVE REGISTERS 02950000
00798C 18CF 6903+ LR R12,R15 base register := entry address
07988 6904+ USING T161,R12 declare code base register
00798E 41B0 C01E 079A6 6905+ LA R11,T161L load loop target to R11
007992 58F0 C170 07AF8 6906+ L R15,=A(SAVETST) R15 := current save area
007996 50DF 0004 00004 6907+ ST R13,4(R15) set back pointer in current save area
00799A 182D 6908+ LR R2,R13 remember callers save area
00799C 18DF 6909+ LR R13,R15 setup current save area
00799E 50D2 0008 00008 6910+ ST R13,8(R2) set forw pointer in callers save area
00000 6911+ USING TDSC,R1 declare TDSC base register
0079A2 58F0 1008 00008 6912+ L R15,TLRCNT load local repeat count to R15
6913+*
6914 *
PAGE 128
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
6915 T161L REPINS MVN,(T161V1,T161V2) repeat: MVN T161V1,T161V2
6916+*
6917+* build from sublist &ALIST a comma separated string &ARGS
6918+*
6919+*
6920+*
6921+*
6922+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
6923+* this allows to transfer the repeat count from last TDSCGEN call
6924+*
6925+*
079A6 6926+T161L EQU *
6927+*
6928+* write a comment indicating what REPINS does (in case NOGEN in effect)
6929+*
6930+*,// REPINS: do 50 times:
6931+*
6932+* MNOTE requires that ' is doubled for expanded variables
6933+* thus build &MASTR as a copy of '&ARGS with ' doubled
6934+*
6935+*
6936+*,// MVN T161V1,T161V2
6937+*
6938+* finally generate code: &ICNT copies of &CODE &ARGS
6939+*
0079A6 D109 C15C C166 07AE4 07AEE 6940+ MVN T161V1,T161V2
0079AC D109 C15C C166 07AE4 07AEE 6941+ MVN T161V1,T161V2
0079B2 D109 C15C C166 07AE4 07AEE 6942+ MVN T161V1,T161V2
0079B8 D109 C15C C166 07AE4 07AEE 6943+ MVN T161V1,T161V2
0079BE D109 C15C C166 07AE4 07AEE 6944+ MVN T161V1,T161V2
0079C4 D109 C15C C166 07AE4 07AEE 6945+ MVN T161V1,T161V2
0079CA D109 C15C C166 07AE4 07AEE 6946+ MVN T161V1,T161V2
0079D0 D109 C15C C166 07AE4 07AEE 6947+ MVN T161V1,T161V2
0079D6 D109 C15C C166 07AE4 07AEE 6948+ MVN T161V1,T161V2
0079DC D109 C15C C166 07AE4 07AEE 6949+ MVN T161V1,T161V2
0079E2 D109 C15C C166 07AE4 07AEE 6950+ MVN T161V1,T161V2
0079E8 D109 C15C C166 07AE4 07AEE 6951+ MVN T161V1,T161V2
0079EE D109 C15C C166 07AE4 07AEE 6952+ MVN T161V1,T161V2
0079F4 D109 C15C C166 07AE4 07AEE 6953+ MVN T161V1,T161V2
0079FA D109 C15C C166 07AE4 07AEE 6954+ MVN T161V1,T161V2
007A00 D109 C15C C166 07AE4 07AEE 6955+ MVN T161V1,T161V2
007A06 D109 C15C C166 07AE4 07AEE 6956+ MVN T161V1,T161V2
007A0C D109 C15C C166 07AE4 07AEE 6957+ MVN T161V1,T161V2
007A12 D109 C15C C166 07AE4 07AEE 6958+ MVN T161V1,T161V2
007A18 D109 C15C C166 07AE4 07AEE 6959+ MVN T161V1,T161V2
007A1E D109 C15C C166 07AE4 07AEE 6960+ MVN T161V1,T161V2
007A24 D109 C15C C166 07AE4 07AEE 6961+ MVN T161V1,T161V2
007A2A D109 C15C C166 07AE4 07AEE 6962+ MVN T161V1,T161V2
007A30 D109 C15C C166 07AE4 07AEE 6963+ MVN T161V1,T161V2
007A36 D109 C15C C166 07AE4 07AEE 6964+ MVN T161V1,T161V2
007A3C D109 C15C C166 07AE4 07AEE 6965+ MVN T161V1,T161V2
007A42 D109 C15C C166 07AE4 07AEE 6966+ MVN T161V1,T161V2
007A48 D109 C15C C166 07AE4 07AEE 6967+ MVN T161V1,T161V2
007A4E D109 C15C C166 07AE4 07AEE 6968+ MVN T161V1,T161V2
007A54 D109 C15C C166 07AE4 07AEE 6969+ MVN T161V1,T161V2
PAGE 129
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
007A5A D109 C15C C166 07AE4 07AEE 6970+ MVN T161V1,T161V2
007A60 D109 C15C C166 07AE4 07AEE 6971+ MVN T161V1,T161V2
007A66 D109 C15C C166 07AE4 07AEE 6972+ MVN T161V1,T161V2
007A6C D109 C15C C166 07AE4 07AEE 6973+ MVN T161V1,T161V2
007A72 D109 C15C C166 07AE4 07AEE 6974+ MVN T161V1,T161V2
007A78 D109 C15C C166 07AE4 07AEE 6975+ MVN T161V1,T161V2
007A7E D109 C15C C166 07AE4 07AEE 6976+ MVN T161V1,T161V2
007A84 D109 C15C C166 07AE4 07AEE 6977+ MVN T161V1,T161V2
007A8A D109 C15C C166 07AE4 07AEE 6978+ MVN T161V1,T161V2
007A90 D109 C15C C166 07AE4 07AEE 6979+ MVN T161V1,T161V2
007A96 D109 C15C C166 07AE4 07AEE 6980+ MVN T161V1,T161V2
007A9C D109 C15C C166 07AE4 07AEE 6981+ MVN T161V1,T161V2
007AA2 D109 C15C C166 07AE4 07AEE 6982+ MVN T161V1,T161V2
007AA8 D109 C15C C166 07AE4 07AEE 6983+ MVN T161V1,T161V2
007AAE D109 C15C C166 07AE4 07AEE 6984+ MVN T161V1,T161V2
007AB4 D109 C15C C166 07AE4 07AEE 6985+ MVN T161V1,T161V2
007ABA D109 C15C C166 07AE4 07AEE 6986+ MVN T161V1,T161V2
007AC0 D109 C15C C166 07AE4 07AEE 6987+ MVN T161V1,T161V2
007AC6 D109 C15C C166 07AE4 07AEE 6988+ MVN T161V1,T161V2
007ACC D109 C15C C166 07AE4 07AEE 6989+ MVN T161V1,T161V2
6990+*
007AD2 06FB 6991 BCTR R15,R11
6992 TSIMRET
007AD4 58F0 C170 07AF8 6993+ L R15,=A(SAVETST) R15 := current save area
007AD8 58DF 0004 00004 6994+ L R13,4(R15) get old save area back
007ADC 98EC D00C 0000C 6995+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
007AE0 07FE 6996+ BR 14 RETURN 02000000
6997 *
007AE4 6998 DS 0F
007AE4 4040404040404040 6999 T161V1 DC CL10' '
007AEE F0F1F2F3F4F5F6F7 7000 T161V2 DC CL10'0123456789'
007AF8 7001 DS 0H
7002 TSIMEND
007AF8 7003+ LTORG
007AF8 00000458 7004 =A(SAVETST)
07AFC 7005+T161TEND EQU *
7006 *
7007 * Test 162 -- MVN m,m (30c) --------------------------------
7008 *
7009 TSIMBEG T162,7000,20,1,C'MVN m,m (30c)'
7010+*
002944 7011+TDSCDAT CSECT
002948 7012+ DS 0D
7013+*
002948 00007B00 7014+T162TDSC DC A(T162) // TENTRY
00294C 000000EC 7015+ DC A(T162TEND-T162) // TLENGTH
002950 00001B58 7016+ DC F'7000' // TLRCNT
002954 00000014 7017+ DC F'20' // TIGCNT
002958 00000001 7018+ DC F'1' // TLTYPE
001202 7019+TEXT CSECT
001202 E3F1F6F2 7020+SPTR0472 DC C'T162'
00295C 7021+TDSCDAT CSECT
00295C 7022+ DS 0F
00295C 04001202 7023+ DC AL1(L'SPTR0472),AL3(SPTR0472)
001206 7024+TEXT CSECT
PAGE 130
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001206 D4E5D540946B9440 7025+SPTR0473 DC C'MVN m,m (30c)'
002960 7026+TDSCDAT CSECT
002960 7027+ DS 0F
002960 0D001206 7028+ DC AL1(L'SPTR0473),AL3(SPTR0473)
7029+*
004A54 7030+TDSCTBL CSECT
04A54 7031+T162TPTR EQU *
004A54 00002948 7032+ DC A(T162TDSC) enabled test
7033+*
007AFC 7034+TCODE CSECT
007B00 7035+ DS 0D ensure double word alignment for test
007B00 7036+T162 DS 0H 01650000
007B00 90EC D00C 0000C 7037+ STM 14,12,12(13) SAVE REGISTERS 02950000
007B04 18CF 7038+ LR R12,R15 base register := entry address
07B00 7039+ USING T162,R12 declare code base register
007B06 41B0 C01E 07B1E 7040+ LA R11,T162L load loop target to R11
007B0A 58F0 C0E8 07BE8 7041+ L R15,=A(SAVETST) R15 := current save area
007B0E 50DF 0004 00004 7042+ ST R13,4(R15) set back pointer in current save area
007B12 182D 7043+ LR R2,R13 remember callers save area
007B14 18DF 7044+ LR R13,R15 setup current save area
007B16 50D2 0008 00008 7045+ ST R13,8(R2) set forw pointer in callers save area
00000 7046+ USING TDSC,R1 declare TDSC base register
007B1A 58F0 1008 00008 7047+ L R15,TLRCNT load local repeat count to R15
7048+*
7049 *
7050 T162L REPINS MVN,(T162V1,T162V2) repeat: MVN T162V1,T162V2
7051+*
7052+* build from sublist &ALIST a comma separated string &ARGS
7053+*
7054+*
7055+*
7056+*
7057+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
7058+* this allows to transfer the repeat count from last TDSCGEN call
7059+*
7060+*
07B1E 7061+T162L EQU *
7062+*
7063+* write a comment indicating what REPINS does (in case NOGEN in effect)
7064+*
7065+*,// REPINS: do 20 times:
7066+*
7067+* MNOTE requires that ' is doubled for expanded variables
7068+* thus build &MASTR as a copy of '&ARGS with ' doubled
7069+*
7070+*
7071+*,// MVN T162V1,T162V2
7072+*
7073+* finally generate code: &ICNT copies of &CODE &ARGS
7074+*
007B1E D11D C0A8 C0C6 07BA8 07BC6 7075+ MVN T162V1,T162V2
007B24 D11D C0A8 C0C6 07BA8 07BC6 7076+ MVN T162V1,T162V2
007B2A D11D C0A8 C0C6 07BA8 07BC6 7077+ MVN T162V1,T162V2
007B30 D11D C0A8 C0C6 07BA8 07BC6 7078+ MVN T162V1,T162V2
007B36 D11D C0A8 C0C6 07BA8 07BC6 7079+ MVN T162V1,T162V2
PAGE 131
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
007B3C D11D C0A8 C0C6 07BA8 07BC6 7080+ MVN T162V1,T162V2
007B42 D11D C0A8 C0C6 07BA8 07BC6 7081+ MVN T162V1,T162V2
007B48 D11D C0A8 C0C6 07BA8 07BC6 7082+ MVN T162V1,T162V2
007B4E D11D C0A8 C0C6 07BA8 07BC6 7083+ MVN T162V1,T162V2
007B54 D11D C0A8 C0C6 07BA8 07BC6 7084+ MVN T162V1,T162V2
007B5A D11D C0A8 C0C6 07BA8 07BC6 7085+ MVN T162V1,T162V2
007B60 D11D C0A8 C0C6 07BA8 07BC6 7086+ MVN T162V1,T162V2
007B66 D11D C0A8 C0C6 07BA8 07BC6 7087+ MVN T162V1,T162V2
007B6C D11D C0A8 C0C6 07BA8 07BC6 7088+ MVN T162V1,T162V2
007B72 D11D C0A8 C0C6 07BA8 07BC6 7089+ MVN T162V1,T162V2
007B78 D11D C0A8 C0C6 07BA8 07BC6 7090+ MVN T162V1,T162V2
007B7E D11D C0A8 C0C6 07BA8 07BC6 7091+ MVN T162V1,T162V2
007B84 D11D C0A8 C0C6 07BA8 07BC6 7092+ MVN T162V1,T162V2
007B8A D11D C0A8 C0C6 07BA8 07BC6 7093+ MVN T162V1,T162V2
007B90 D11D C0A8 C0C6 07BA8 07BC6 7094+ MVN T162V1,T162V2
7095+*
007B96 06FB 7096 BCTR R15,R11
7097 TSIMRET
007B98 58F0 C0E8 07BE8 7098+ L R15,=A(SAVETST) R15 := current save area
007B9C 58DF 0004 00004 7099+ L R13,4(R15) get old save area back
007BA0 98EC D00C 0000C 7100+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
007BA4 07FE 7101+ BR 14 RETURN 02000000
7102 *
007BA8 7103 DS 0F
007BA8 4040404040404040 7104 T162V1 DC CL30' '
007BC6 F0F1F2F3F4F5F6F7 7105 T162V2 DC CL30'012345678901234567890123456789'
007BE4 7106 DS 0H
7107 TSIMEND
007BE8 7108+ LTORG
007BE8 00000458 7109 =A(SAVETST)
07BEC 7110+T162TEND EQU *
7111 *
7112 * Test 165 -- MVZ m,m (10c) --------------------------------
7113 *
7114 TSIMBEG T165,5000,50,1,C'MVZ m,m (10c)'
7115+*
002964 7116+TDSCDAT CSECT
002968 7117+ DS 0D
7118+*
002968 00007BF0 7119+T165TDSC DC A(T165) // TENTRY
00296C 00000174 7120+ DC A(T165TEND-T165) // TLENGTH
002970 00001388 7121+ DC F'5000' // TLRCNT
002974 00000032 7122+ DC F'50' // TIGCNT
002978 00000001 7123+ DC F'1' // TLTYPE
001213 7124+TEXT CSECT
001213 E3F1F6F5 7125+SPTR0484 DC C'T165'
00297C 7126+TDSCDAT CSECT
00297C 7127+ DS 0F
00297C 04001213 7128+ DC AL1(L'SPTR0484),AL3(SPTR0484)
001217 7129+TEXT CSECT
001217 D4E5E940946B9440 7130+SPTR0485 DC C'MVZ m,m (10c)'
002980 7131+TDSCDAT CSECT
002980 7132+ DS 0F
002980 0D001217 7133+ DC AL1(L'SPTR0485),AL3(SPTR0485)
7134+*
PAGE 132
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004A58 7135+TDSCTBL CSECT
04A58 7136+T165TPTR EQU *
004A58 00002968 7137+ DC A(T165TDSC) enabled test
7138+*
007BEC 7139+TCODE CSECT
007BF0 7140+ DS 0D ensure double word alignment for test
007BF0 7141+T165 DS 0H 01650000
007BF0 90EC D00C 0000C 7142+ STM 14,12,12(13) SAVE REGISTERS 02950000
007BF4 18CF 7143+ LR R12,R15 base register := entry address
07BF0 7144+ USING T165,R12 declare code base register
007BF6 41B0 C01E 07C0E 7145+ LA R11,T165L load loop target to R11
007BFA 58F0 C170 07D60 7146+ L R15,=A(SAVETST) R15 := current save area
007BFE 50DF 0004 00004 7147+ ST R13,4(R15) set back pointer in current save area
007C02 182D 7148+ LR R2,R13 remember callers save area
007C04 18DF 7149+ LR R13,R15 setup current save area
007C06 50D2 0008 00008 7150+ ST R13,8(R2) set forw pointer in callers save area
00000 7151+ USING TDSC,R1 declare TDSC base register
007C0A 58F0 1008 00008 7152+ L R15,TLRCNT load local repeat count to R15
7153+*
7154 *
7155 T165L REPINS MVZ,(T165V1,T165V2) repeat: MVZ T165V1,T165V2
7156+*
7157+* build from sublist &ALIST a comma separated string &ARGS
7158+*
7159+*
7160+*
7161+*
7162+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
7163+* this allows to transfer the repeat count from last TDSCGEN call
7164+*
7165+*
07C0E 7166+T165L EQU *
7167+*
7168+* write a comment indicating what REPINS does (in case NOGEN in effect)
7169+*
7170+*,// REPINS: do 50 times:
7171+*
7172+* MNOTE requires that ' is doubled for expanded variables
7173+* thus build &MASTR as a copy of '&ARGS with ' doubled
7174+*
7175+*
7176+*,// MVZ T165V1,T165V2
7177+*
7178+* finally generate code: &ICNT copies of &CODE &ARGS
7179+*
007C0E D309 C15C C166 07D4C 07D56 7180+ MVZ T165V1,T165V2
007C14 D309 C15C C166 07D4C 07D56 7181+ MVZ T165V1,T165V2
007C1A D309 C15C C166 07D4C 07D56 7182+ MVZ T165V1,T165V2
007C20 D309 C15C C166 07D4C 07D56 7183+ MVZ T165V1,T165V2
007C26 D309 C15C C166 07D4C 07D56 7184+ MVZ T165V1,T165V2
007C2C D309 C15C C166 07D4C 07D56 7185+ MVZ T165V1,T165V2
007C32 D309 C15C C166 07D4C 07D56 7186+ MVZ T165V1,T165V2
007C38 D309 C15C C166 07D4C 07D56 7187+ MVZ T165V1,T165V2
007C3E D309 C15C C166 07D4C 07D56 7188+ MVZ T165V1,T165V2
007C44 D309 C15C C166 07D4C 07D56 7189+ MVZ T165V1,T165V2
PAGE 133
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
007C4A D309 C15C C166 07D4C 07D56 7190+ MVZ T165V1,T165V2
007C50 D309 C15C C166 07D4C 07D56 7191+ MVZ T165V1,T165V2
007C56 D309 C15C C166 07D4C 07D56 7192+ MVZ T165V1,T165V2
007C5C D309 C15C C166 07D4C 07D56 7193+ MVZ T165V1,T165V2
007C62 D309 C15C C166 07D4C 07D56 7194+ MVZ T165V1,T165V2
007C68 D309 C15C C166 07D4C 07D56 7195+ MVZ T165V1,T165V2
007C6E D309 C15C C166 07D4C 07D56 7196+ MVZ T165V1,T165V2
007C74 D309 C15C C166 07D4C 07D56 7197+ MVZ T165V1,T165V2
007C7A D309 C15C C166 07D4C 07D56 7198+ MVZ T165V1,T165V2
007C80 D309 C15C C166 07D4C 07D56 7199+ MVZ T165V1,T165V2
007C86 D309 C15C C166 07D4C 07D56 7200+ MVZ T165V1,T165V2
007C8C D309 C15C C166 07D4C 07D56 7201+ MVZ T165V1,T165V2
007C92 D309 C15C C166 07D4C 07D56 7202+ MVZ T165V1,T165V2
007C98 D309 C15C C166 07D4C 07D56 7203+ MVZ T165V1,T165V2
007C9E D309 C15C C166 07D4C 07D56 7204+ MVZ T165V1,T165V2
007CA4 D309 C15C C166 07D4C 07D56 7205+ MVZ T165V1,T165V2
007CAA D309 C15C C166 07D4C 07D56 7206+ MVZ T165V1,T165V2
007CB0 D309 C15C C166 07D4C 07D56 7207+ MVZ T165V1,T165V2
007CB6 D309 C15C C166 07D4C 07D56 7208+ MVZ T165V1,T165V2
007CBC D309 C15C C166 07D4C 07D56 7209+ MVZ T165V1,T165V2
007CC2 D309 C15C C166 07D4C 07D56 7210+ MVZ T165V1,T165V2
007CC8 D309 C15C C166 07D4C 07D56 7211+ MVZ T165V1,T165V2
007CCE D309 C15C C166 07D4C 07D56 7212+ MVZ T165V1,T165V2
007CD4 D309 C15C C166 07D4C 07D56 7213+ MVZ T165V1,T165V2
007CDA D309 C15C C166 07D4C 07D56 7214+ MVZ T165V1,T165V2
007CE0 D309 C15C C166 07D4C 07D56 7215+ MVZ T165V1,T165V2
007CE6 D309 C15C C166 07D4C 07D56 7216+ MVZ T165V1,T165V2
007CEC D309 C15C C166 07D4C 07D56 7217+ MVZ T165V1,T165V2
007CF2 D309 C15C C166 07D4C 07D56 7218+ MVZ T165V1,T165V2
007CF8 D309 C15C C166 07D4C 07D56 7219+ MVZ T165V1,T165V2
007CFE D309 C15C C166 07D4C 07D56 7220+ MVZ T165V1,T165V2
007D04 D309 C15C C166 07D4C 07D56 7221+ MVZ T165V1,T165V2
007D0A D309 C15C C166 07D4C 07D56 7222+ MVZ T165V1,T165V2
007D10 D309 C15C C166 07D4C 07D56 7223+ MVZ T165V1,T165V2
007D16 D309 C15C C166 07D4C 07D56 7224+ MVZ T165V1,T165V2
007D1C D309 C15C C166 07D4C 07D56 7225+ MVZ T165V1,T165V2
007D22 D309 C15C C166 07D4C 07D56 7226+ MVZ T165V1,T165V2
007D28 D309 C15C C166 07D4C 07D56 7227+ MVZ T165V1,T165V2
007D2E D309 C15C C166 07D4C 07D56 7228+ MVZ T165V1,T165V2
007D34 D309 C15C C166 07D4C 07D56 7229+ MVZ T165V1,T165V2
7230+*
007D3A 06FB 7231 BCTR R15,R11
7232 TSIMRET
007D3C 58F0 C170 07D60 7233+ L R15,=A(SAVETST) R15 := current save area
007D40 58DF 0004 00004 7234+ L R13,4(R15) get old save area back
007D44 98EC D00C 0000C 7235+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
007D48 07FE 7236+ BR 14 RETURN 02000000
7237 *
007D4C 7238 DS 0F
007D4C 4040404040404040 7239 T165V1 DC CL10' '
007D56 F0F1F2F3F4F5F6F7 7240 T165V2 DC CL10'0123456789'
007D60 7241 DS 0H
7242 TSIMEND
007D60 7243+ LTORG
007D60 00000458 7244 =A(SAVETST)
PAGE 134
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
07D64 7245+T165TEND EQU *
7246 *
7247 * Test 166 -- MVZ m,m (30c) --------------------------------
7248 *
7249 TSIMBEG T166,7000,20,1,C'MVZ m,m (30c)'
7250+*
002984 7251+TDSCDAT CSECT
002988 7252+ DS 0D
7253+*
002988 00007D68 7254+T166TDSC DC A(T166) // TENTRY
00298C 000000EC 7255+ DC A(T166TEND-T166) // TLENGTH
002990 00001B58 7256+ DC F'7000' // TLRCNT
002994 00000014 7257+ DC F'20' // TIGCNT
002998 00000001 7258+ DC F'1' // TLTYPE
001224 7259+TEXT CSECT
001224 E3F1F6F6 7260+SPTR0496 DC C'T166'
00299C 7261+TDSCDAT CSECT
00299C 7262+ DS 0F
00299C 04001224 7263+ DC AL1(L'SPTR0496),AL3(SPTR0496)
001228 7264+TEXT CSECT
001228 D4E5E940946B9440 7265+SPTR0497 DC C'MVZ m,m (30c)'
0029A0 7266+TDSCDAT CSECT
0029A0 7267+ DS 0F
0029A0 0D001228 7268+ DC AL1(L'SPTR0497),AL3(SPTR0497)
7269+*
004A5C 7270+TDSCTBL CSECT
04A5C 7271+T166TPTR EQU *
004A5C 00002988 7272+ DC A(T166TDSC) enabled test
7273+*
007D64 7274+TCODE CSECT
007D68 7275+ DS 0D ensure double word alignment for test
007D68 7276+T166 DS 0H 01650000
007D68 90EC D00C 0000C 7277+ STM 14,12,12(13) SAVE REGISTERS 02950000
007D6C 18CF 7278+ LR R12,R15 base register := entry address
07D68 7279+ USING T166,R12 declare code base register
007D6E 41B0 C01E 07D86 7280+ LA R11,T166L load loop target to R11
007D72 58F0 C0E8 07E50 7281+ L R15,=A(SAVETST) R15 := current save area
007D76 50DF 0004 00004 7282+ ST R13,4(R15) set back pointer in current save area
007D7A 182D 7283+ LR R2,R13 remember callers save area
007D7C 18DF 7284+ LR R13,R15 setup current save area
007D7E 50D2 0008 00008 7285+ ST R13,8(R2) set forw pointer in callers save area
00000 7286+ USING TDSC,R1 declare TDSC base register
007D82 58F0 1008 00008 7287+ L R15,TLRCNT load local repeat count to R15
7288+*
7289 *
7290 T166L REPINS MVZ,(T166V1,T166V2) repeat: MVZ T166V1,T166V2
7291+*
7292+* build from sublist &ALIST a comma separated string &ARGS
7293+*
7294+*
7295+*
7296+*
7297+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
7298+* this allows to transfer the repeat count from last TDSCGEN call
7299+*
PAGE 135
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
7300+*
07D86 7301+T166L EQU *
7302+*
7303+* write a comment indicating what REPINS does (in case NOGEN in effect)
7304+*
7305+*,// REPINS: do 20 times:
7306+*
7307+* MNOTE requires that ' is doubled for expanded variables
7308+* thus build &MASTR as a copy of '&ARGS with ' doubled
7309+*
7310+*
7311+*,// MVZ T166V1,T166V2
7312+*
7313+* finally generate code: &ICNT copies of &CODE &ARGS
7314+*
007D86 D31D C0A8 C0C6 07E10 07E2E 7315+ MVZ T166V1,T166V2
007D8C D31D C0A8 C0C6 07E10 07E2E 7316+ MVZ T166V1,T166V2
007D92 D31D C0A8 C0C6 07E10 07E2E 7317+ MVZ T166V1,T166V2
007D98 D31D C0A8 C0C6 07E10 07E2E 7318+ MVZ T166V1,T166V2
007D9E D31D C0A8 C0C6 07E10 07E2E 7319+ MVZ T166V1,T166V2
007DA4 D31D C0A8 C0C6 07E10 07E2E 7320+ MVZ T166V1,T166V2
007DAA D31D C0A8 C0C6 07E10 07E2E 7321+ MVZ T166V1,T166V2
007DB0 D31D C0A8 C0C6 07E10 07E2E 7322+ MVZ T166V1,T166V2
007DB6 D31D C0A8 C0C6 07E10 07E2E 7323+ MVZ T166V1,T166V2
007DBC D31D C0A8 C0C6 07E10 07E2E 7324+ MVZ T166V1,T166V2
007DC2 D31D C0A8 C0C6 07E10 07E2E 7325+ MVZ T166V1,T166V2
007DC8 D31D C0A8 C0C6 07E10 07E2E 7326+ MVZ T166V1,T166V2
007DCE D31D C0A8 C0C6 07E10 07E2E 7327+ MVZ T166V1,T166V2
007DD4 D31D C0A8 C0C6 07E10 07E2E 7328+ MVZ T166V1,T166V2
007DDA D31D C0A8 C0C6 07E10 07E2E 7329+ MVZ T166V1,T166V2
007DE0 D31D C0A8 C0C6 07E10 07E2E 7330+ MVZ T166V1,T166V2
007DE6 D31D C0A8 C0C6 07E10 07E2E 7331+ MVZ T166V1,T166V2
007DEC D31D C0A8 C0C6 07E10 07E2E 7332+ MVZ T166V1,T166V2
007DF2 D31D C0A8 C0C6 07E10 07E2E 7333+ MVZ T166V1,T166V2
007DF8 D31D C0A8 C0C6 07E10 07E2E 7334+ MVZ T166V1,T166V2
7335+*
007DFE 06FB 7336 BCTR R15,R11
7337 TSIMRET
007E00 58F0 C0E8 07E50 7338+ L R15,=A(SAVETST) R15 := current save area
007E04 58DF 0004 00004 7339+ L R13,4(R15) get old save area back
007E08 98EC D00C 0000C 7340+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
007E0C 07FE 7341+ BR 14 RETURN 02000000
7342 *
007E10 7343 DS 0F
007E10 4040404040404040 7344 T166V1 DC CL30' '
007E2E F0F1F2F3F4F5F6F7 7345 T166V2 DC CL30'012345678901234567890123456789'
007E4C 7346 DS 0H
7347 TSIMEND
007E50 7348+ LTORG
007E50 00000458 7349 =A(SAVETST)
07E54 7350+T166TEND EQU *
7351 *
7352 * Test 167 -- MVCIN m,m (10c) ------------------------------
7353 *
7354 TSIMBEG T167,3500,20,1,C'MVCIN m,m (10c)'
PAGE 136
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
7355+*
0029A4 7356+TDSCDAT CSECT
0029A8 7357+ DS 0D
7358+*
0029A8 00007E58 7359+T167TDSC DC A(T167) // TENTRY
0029AC 000000C4 7360+ DC A(T167TEND-T167) // TLENGTH
0029B0 00000DAC 7361+ DC F'3500' // TLRCNT
0029B4 00000014 7362+ DC F'20' // TIGCNT
0029B8 00000001 7363+ DC F'1' // TLTYPE
001235 7364+TEXT CSECT
001235 E3F1F6F7 7365+SPTR0508 DC C'T167'
0029BC 7366+TDSCDAT CSECT
0029BC 7367+ DS 0F
0029BC 04001235 7368+ DC AL1(L'SPTR0508),AL3(SPTR0508)
001239 7369+TEXT CSECT
001239 D4E5C3C9D540946B 7370+SPTR0509 DC C'MVCIN m,m (10c)'
0029C0 7371+TDSCDAT CSECT
0029C0 7372+ DS 0F
0029C0 0F001239 7373+ DC AL1(L'SPTR0509),AL3(SPTR0509)
7374+*
004A60 7375+TDSCTBL CSECT
04A60 7376+T167TPTR EQU *
004A60 000029A8 7377+ DC A(T167TDSC) enabled test
7378+*
007E54 7379+TCODE CSECT
007E58 7380+ DS 0D ensure double word alignment for test
007E58 7381+T167 DS 0H 01650000
007E58 90EC D00C 0000C 7382+ STM 14,12,12(13) SAVE REGISTERS 02950000
007E5C 18CF 7383+ LR R12,R15 base register := entry address
07E58 7384+ USING T167,R12 declare code base register
007E5E 41B0 C01E 07E76 7385+ LA R11,T167L load loop target to R11
007E62 58F0 C0C0 07F18 7386+ L R15,=A(SAVETST) R15 := current save area
007E66 50DF 0004 00004 7387+ ST R13,4(R15) set back pointer in current save area
007E6A 182D 7388+ LR R2,R13 remember callers save area
007E6C 18DF 7389+ LR R13,R15 setup current save area
007E6E 50D2 0008 00008 7390+ ST R13,8(R2) set forw pointer in callers save area
00000 7391+ USING TDSC,R1 declare TDSC base register
007E72 58F0 1008 00008 7392+ L R15,TLRCNT load local repeat count to R15
7393+*
7394 *
7395 T167L REPINS MVCIN,(T167V1,T167V2) repeat: MVCIN T167V1,T167V2
7396+*
7397+* build from sublist &ALIST a comma separated string &ARGS
7398+*
7399+*
7400+*
7401+*
7402+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
7403+* this allows to transfer the repeat count from last TDSCGEN call
7404+*
7405+*
07E76 7406+T167L EQU *
7407+*
7408+* write a comment indicating what REPINS does (in case NOGEN in effect)
7409+*
PAGE 137
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
7410+*,// REPINS: do 20 times:
7411+*
7412+* MNOTE requires that ' is doubled for expanded variables
7413+* thus build &MASTR as a copy of '&ARGS with ' doubled
7414+*
7415+*
7416+*,// MVCIN T167V1,T167V2
7417+*
7418+* finally generate code: &ICNT copies of &CODE &ARGS
7419+*
007E76 E809 C0A8 C0B2 07F00 07F0A 7420+ MVCIN T167V1,T167V2
007E7C E809 C0A8 C0B2 07F00 07F0A 7421+ MVCIN T167V1,T167V2
007E82 E809 C0A8 C0B2 07F00 07F0A 7422+ MVCIN T167V1,T167V2
007E88 E809 C0A8 C0B2 07F00 07F0A 7423+ MVCIN T167V1,T167V2
007E8E E809 C0A8 C0B2 07F00 07F0A 7424+ MVCIN T167V1,T167V2
007E94 E809 C0A8 C0B2 07F00 07F0A 7425+ MVCIN T167V1,T167V2
007E9A E809 C0A8 C0B2 07F00 07F0A 7426+ MVCIN T167V1,T167V2
007EA0 E809 C0A8 C0B2 07F00 07F0A 7427+ MVCIN T167V1,T167V2
007EA6 E809 C0A8 C0B2 07F00 07F0A 7428+ MVCIN T167V1,T167V2
007EAC E809 C0A8 C0B2 07F00 07F0A 7429+ MVCIN T167V1,T167V2
007EB2 E809 C0A8 C0B2 07F00 07F0A 7430+ MVCIN T167V1,T167V2
007EB8 E809 C0A8 C0B2 07F00 07F0A 7431+ MVCIN T167V1,T167V2
007EBE E809 C0A8 C0B2 07F00 07F0A 7432+ MVCIN T167V1,T167V2
007EC4 E809 C0A8 C0B2 07F00 07F0A 7433+ MVCIN T167V1,T167V2
007ECA E809 C0A8 C0B2 07F00 07F0A 7434+ MVCIN T167V1,T167V2
007ED0 E809 C0A8 C0B2 07F00 07F0A 7435+ MVCIN T167V1,T167V2
007ED6 E809 C0A8 C0B2 07F00 07F0A 7436+ MVCIN T167V1,T167V2
007EDC E809 C0A8 C0B2 07F00 07F0A 7437+ MVCIN T167V1,T167V2
007EE2 E809 C0A8 C0B2 07F00 07F0A 7438+ MVCIN T167V1,T167V2
007EE8 E809 C0A8 C0B2 07F00 07F0A 7439+ MVCIN T167V1,T167V2
7440+*
007EEE 06FB 7441 BCTR R15,R11
7442 TSIMRET
007EF0 58F0 C0C0 07F18 7443+ L R15,=A(SAVETST) R15 := current save area
007EF4 58DF 0004 00004 7444+ L R13,4(R15) get old save area back
007EF8 98EC D00C 0000C 7445+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
007EFC 07FE 7446+ BR 14 RETURN 02000000
7447 *
007F00 7448 DS 0F
007F00 4040404040404040 7449 T167V1 DC CL10' '
007F0A F0F1F2F3F4F5F6F7 7450 T167V2 DC CL10'0123456789'
007F14 7451 DS 0H
7452 TSIMEND
007F18 7453+ LTORG
007F18 00000458 7454 =A(SAVETST)
07F1C 7455+T167TEND EQU *
7456 *
7457 * Test 168 -- MVCIN m,m (30c) ------------------------------
7458 *
7459 TSIMBEG T168,1200,20,1,C'MVCIN m,m (30c)'
7460+*
0029C4 7461+TDSCDAT CSECT
0029C8 7462+ DS 0D
7463+*
0029C8 00007F20 7464+T168TDSC DC A(T168) // TENTRY
PAGE 138
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0029CC 000000EC 7465+ DC A(T168TEND-T168) // TLENGTH
0029D0 000004B0 7466+ DC F'1200' // TLRCNT
0029D4 00000014 7467+ DC F'20' // TIGCNT
0029D8 00000001 7468+ DC F'1' // TLTYPE
001248 7469+TEXT CSECT
001248 E3F1F6F8 7470+SPTR0520 DC C'T168'
0029DC 7471+TDSCDAT CSECT
0029DC 7472+ DS 0F
0029DC 04001248 7473+ DC AL1(L'SPTR0520),AL3(SPTR0520)
00124C 7474+TEXT CSECT
00124C D4E5C3C9D540946B 7475+SPTR0521 DC C'MVCIN m,m (30c)'
0029E0 7476+TDSCDAT CSECT
0029E0 7477+ DS 0F
0029E0 0F00124C 7478+ DC AL1(L'SPTR0521),AL3(SPTR0521)
7479+*
004A64 7480+TDSCTBL CSECT
04A64 7481+T168TPTR EQU *
004A64 000029C8 7482+ DC A(T168TDSC) enabled test
7483+*
007F1C 7484+TCODE CSECT
007F20 7485+ DS 0D ensure double word alignment for test
007F20 7486+T168 DS 0H 01650000
007F20 90EC D00C 0000C 7487+ STM 14,12,12(13) SAVE REGISTERS 02950000
007F24 18CF 7488+ LR R12,R15 base register := entry address
07F20 7489+ USING T168,R12 declare code base register
007F26 41B0 C01E 07F3E 7490+ LA R11,T168L load loop target to R11
007F2A 58F0 C0E8 08008 7491+ L R15,=A(SAVETST) R15 := current save area
007F2E 50DF 0004 00004 7492+ ST R13,4(R15) set back pointer in current save area
007F32 182D 7493+ LR R2,R13 remember callers save area
007F34 18DF 7494+ LR R13,R15 setup current save area
007F36 50D2 0008 00008 7495+ ST R13,8(R2) set forw pointer in callers save area
00000 7496+ USING TDSC,R1 declare TDSC base register
007F3A 58F0 1008 00008 7497+ L R15,TLRCNT load local repeat count to R15
7498+*
7499 *
7500 T168L REPINS MVCIN,(T168V1,T168V2) repeat: MVCIN T168V1,T168V2
7501+*
7502+* build from sublist &ALIST a comma separated string &ARGS
7503+*
7504+*
7505+*
7506+*
7507+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
7508+* this allows to transfer the repeat count from last TDSCGEN call
7509+*
7510+*
07F3E 7511+T168L EQU *
7512+*
7513+* write a comment indicating what REPINS does (in case NOGEN in effect)
7514+*
7515+*,// REPINS: do 20 times:
7516+*
7517+* MNOTE requires that ' is doubled for expanded variables
7518+* thus build &MASTR as a copy of '&ARGS with ' doubled
7519+*
PAGE 139
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
7520+*
7521+*,// MVCIN T168V1,T168V2
7522+*
7523+* finally generate code: &ICNT copies of &CODE &ARGS
7524+*
007F3E E81D C0A8 C0C6 07FC8 07FE6 7525+ MVCIN T168V1,T168V2
007F44 E81D C0A8 C0C6 07FC8 07FE6 7526+ MVCIN T168V1,T168V2
007F4A E81D C0A8 C0C6 07FC8 07FE6 7527+ MVCIN T168V1,T168V2
007F50 E81D C0A8 C0C6 07FC8 07FE6 7528+ MVCIN T168V1,T168V2
007F56 E81D C0A8 C0C6 07FC8 07FE6 7529+ MVCIN T168V1,T168V2
007F5C E81D C0A8 C0C6 07FC8 07FE6 7530+ MVCIN T168V1,T168V2
007F62 E81D C0A8 C0C6 07FC8 07FE6 7531+ MVCIN T168V1,T168V2
007F68 E81D C0A8 C0C6 07FC8 07FE6 7532+ MVCIN T168V1,T168V2
007F6E E81D C0A8 C0C6 07FC8 07FE6 7533+ MVCIN T168V1,T168V2
007F74 E81D C0A8 C0C6 07FC8 07FE6 7534+ MVCIN T168V1,T168V2
007F7A E81D C0A8 C0C6 07FC8 07FE6 7535+ MVCIN T168V1,T168V2
007F80 E81D C0A8 C0C6 07FC8 07FE6 7536+ MVCIN T168V1,T168V2
007F86 E81D C0A8 C0C6 07FC8 07FE6 7537+ MVCIN T168V1,T168V2
007F8C E81D C0A8 C0C6 07FC8 07FE6 7538+ MVCIN T168V1,T168V2
007F92 E81D C0A8 C0C6 07FC8 07FE6 7539+ MVCIN T168V1,T168V2
007F98 E81D C0A8 C0C6 07FC8 07FE6 7540+ MVCIN T168V1,T168V2
007F9E E81D C0A8 C0C6 07FC8 07FE6 7541+ MVCIN T168V1,T168V2
007FA4 E81D C0A8 C0C6 07FC8 07FE6 7542+ MVCIN T168V1,T168V2
007FAA E81D C0A8 C0C6 07FC8 07FE6 7543+ MVCIN T168V1,T168V2
007FB0 E81D C0A8 C0C6 07FC8 07FE6 7544+ MVCIN T168V1,T168V2
7545+*
007FB6 06FB 7546 BCTR R15,R11
7547 TSIMRET
007FB8 58F0 C0E8 08008 7548+ L R15,=A(SAVETST) R15 := current save area
007FBC 58DF 0004 00004 7549+ L R13,4(R15) get old save area back
007FC0 98EC D00C 0000C 7550+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
007FC4 07FE 7551+ BR 14 RETURN 02000000
7552 *
007FC8 7553 DS 0F
007FC8 4040404040404040 7554 T168V1 DC CL30' '
007FE6 F0F1F2F3F4F5F6F7 7555 T168V2 DC CL30'01234567899876543210ABCDEFGHIJ'
7556 TSIMEND
008008 7557+ LTORG
008008 00000458 7558 =A(SAVETST)
0800C 7559+T168TEND EQU *
7560 *
7561 * Test 169 -- MVCIN m,m (100c) -----------------------------
7562 *
7563 TSIMBEG T169,350,20,1,C'MVCIN m,m (100c)'
7564+*
0029E4 7565+TDSCDAT CSECT
0029E8 7566+ DS 0D
7567+*
0029E8 00008010 7568+T169TDSC DC A(T169) // TENTRY
0029EC 00000174 7569+ DC A(T169TEND-T169) // TLENGTH
0029F0 0000015E 7570+ DC F'350' // TLRCNT
0029F4 00000014 7571+ DC F'20' // TIGCNT
0029F8 00000001 7572+ DC F'1' // TLTYPE
00125B 7573+TEXT CSECT
00125B E3F1F6F9 7574+SPTR0532 DC C'T169'
PAGE 140
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0029FC 7575+TDSCDAT CSECT
0029FC 7576+ DS 0F
0029FC 0400125B 7577+ DC AL1(L'SPTR0532),AL3(SPTR0532)
00125F 7578+TEXT CSECT
00125F D4E5C3C9D540946B 7579+SPTR0533 DC C'MVCIN m,m (100c)'
002A00 7580+TDSCDAT CSECT
002A00 7581+ DS 0F
002A00 1000125F 7582+ DC AL1(L'SPTR0533),AL3(SPTR0533)
7583+*
004A68 7584+TDSCTBL CSECT
04A68 7585+T169TPTR EQU *
004A68 000029E8 7586+ DC A(T169TDSC) enabled test
7587+*
00800C 7588+TCODE CSECT
008010 7589+ DS 0D ensure double word alignment for test
008010 7590+T169 DS 0H 01650000
008010 90EC D00C 0000C 7591+ STM 14,12,12(13) SAVE REGISTERS 02950000
008014 18CF 7592+ LR R12,R15 base register := entry address
08010 7593+ USING T169,R12 declare code base register
008016 41B0 C01E 0802E 7594+ LA R11,T169L load loop target to R11
00801A 58F0 C170 08180 7595+ L R15,=A(SAVETST) R15 := current save area
00801E 50DF 0004 00004 7596+ ST R13,4(R15) set back pointer in current save area
008022 182D 7597+ LR R2,R13 remember callers save area
008024 18DF 7598+ LR R13,R15 setup current save area
008026 50D2 0008 00008 7599+ ST R13,8(R2) set forw pointer in callers save area
00000 7600+ USING TDSC,R1 declare TDSC base register
00802A 58F0 1008 00008 7601+ L R15,TLRCNT load local repeat count to R15
7602+*
7603 *
7604 T169L REPINS MVCIN,(T169V1,T169V2) repeat: MVCIN T169V1,T169V2
7605+*
7606+* build from sublist &ALIST a comma separated string &ARGS
7607+*
7608+*
7609+*
7610+*
7611+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
7612+* this allows to transfer the repeat count from last TDSCGEN call
7613+*
7614+*
0802E 7615+T169L EQU *
7616+*
7617+* write a comment indicating what REPINS does (in case NOGEN in effect)
7618+*
7619+*,// REPINS: do 20 times:
7620+*
7621+* MNOTE requires that ' is doubled for expanded variables
7622+* thus build &MASTR as a copy of '&ARGS with ' doubled
7623+*
7624+*
7625+*,// MVCIN T169V1,T169V2
7626+*
7627+* finally generate code: &ICNT copies of &CODE &ARGS
7628+*
00802E E863 C0A8 C10C 080B8 0811C 7629+ MVCIN T169V1,T169V2
PAGE 141
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
008034 E863 C0A8 C10C 080B8 0811C 7630+ MVCIN T169V1,T169V2
00803A E863 C0A8 C10C 080B8 0811C 7631+ MVCIN T169V1,T169V2
008040 E863 C0A8 C10C 080B8 0811C 7632+ MVCIN T169V1,T169V2
008046 E863 C0A8 C10C 080B8 0811C 7633+ MVCIN T169V1,T169V2
00804C E863 C0A8 C10C 080B8 0811C 7634+ MVCIN T169V1,T169V2
008052 E863 C0A8 C10C 080B8 0811C 7635+ MVCIN T169V1,T169V2
008058 E863 C0A8 C10C 080B8 0811C 7636+ MVCIN T169V1,T169V2
00805E E863 C0A8 C10C 080B8 0811C 7637+ MVCIN T169V1,T169V2
008064 E863 C0A8 C10C 080B8 0811C 7638+ MVCIN T169V1,T169V2
00806A E863 C0A8 C10C 080B8 0811C 7639+ MVCIN T169V1,T169V2
008070 E863 C0A8 C10C 080B8 0811C 7640+ MVCIN T169V1,T169V2
008076 E863 C0A8 C10C 080B8 0811C 7641+ MVCIN T169V1,T169V2
00807C E863 C0A8 C10C 080B8 0811C 7642+ MVCIN T169V1,T169V2
008082 E863 C0A8 C10C 080B8 0811C 7643+ MVCIN T169V1,T169V2
008088 E863 C0A8 C10C 080B8 0811C 7644+ MVCIN T169V1,T169V2
00808E E863 C0A8 C10C 080B8 0811C 7645+ MVCIN T169V1,T169V2
008094 E863 C0A8 C10C 080B8 0811C 7646+ MVCIN T169V1,T169V2
00809A E863 C0A8 C10C 080B8 0811C 7647+ MVCIN T169V1,T169V2
0080A0 E863 C0A8 C10C 080B8 0811C 7648+ MVCIN T169V1,T169V2
7649+*
0080A6 06FB 7650 BCTR R15,R11
7651 TSIMRET
0080A8 58F0 C170 08180 7652+ L R15,=A(SAVETST) R15 := current save area
0080AC 58DF 0004 00004 7653+ L R13,4(R15) get old save area back
0080B0 98EC D00C 0000C 7654+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0080B4 07FE 7655+ BR 14 RETURN 02000000
7656 *
0080B8 7657 DS 0F
0080B8 4040404040404040 7658 T169V1 DC CL100' '
00811C F0F1F2F3F4F5F6F7 7659 T169V2 DC CL100'0123456789'
7660 TSIMEND
008180 7661+ LTORG
008180 00000458 7662 =A(SAVETST)
08184 7663+T169TEND EQU *
7664 *
7665 * Test 17x -- MVCL =========================================
7666 *
7667 * Test 170 -- MVCL m,m (10b,copy) --------------------------
7668 *
7669 TSIMBEG T170,13000,10,1,C'4*Lx;MVCL (10b)'
7670+*
002A04 7671+TDSCDAT CSECT
002A08 7672+ DS 0D
7673+*
002A08 00008188 7674+T170TDSC DC A(T170) // TENTRY
002A0C 000000DC 7675+ DC A(T170TEND-T170) // TLENGTH
002A10 000032C8 7676+ DC F'13000' // TLRCNT
002A14 0000000A 7677+ DC F'10' // TIGCNT
002A18 00000001 7678+ DC F'1' // TLTYPE
00126F 7679+TEXT CSECT
00126F E3F1F7F0 7680+SPTR0544 DC C'T170'
002A1C 7681+TDSCDAT CSECT
002A1C 7682+ DS 0F
002A1C 0400126F 7683+ DC AL1(L'SPTR0544),AL3(SPTR0544)
001273 7684+TEXT CSECT
PAGE 142
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001273 F45CD3A75ED4E5C3 7685+SPTR0545 DC C'4*Lx;MVCL (10b)'
002A20 7686+TDSCDAT CSECT
002A20 7687+ DS 0F
002A20 0F001273 7688+ DC AL1(L'SPTR0545),AL3(SPTR0545)
7689+*
004A6C 7690+TDSCTBL CSECT
04A6C 7691+T170TPTR EQU *
004A6C 00002A08 7692+ DC A(T170TDSC) enabled test
7693+*
008184 7694+TCODE CSECT
008188 7695+ DS 0D ensure double word alignment for test
008188 7696+T170 DS 0H 01650000
008188 90EC D00C 0000C 7697+ STM 14,12,12(13) SAVE REGISTERS 02950000
00818C 18CF 7698+ LR R12,R15 base register := entry address
08188 7699+ USING T170,R12 declare code base register
00818E 41B0 C02E 081B6 7700+ LA R11,T170L load loop target to R11
008192 58F0 C0D0 08258 7701+ L R15,=A(SAVETST) R15 := current save area
008196 50DF 0004 00004 7702+ ST R13,4(R15) set back pointer in current save area
00819A 182D 7703+ LR R2,R13 remember callers save area
00819C 18DF 7704+ LR R13,R15 setup current save area
00819E 50D2 0008 00008 7705+ ST R13,8(R2) set forw pointer in callers save area
00000 7706+ USING TDSC,R1 declare TDSC base register
0081A2 58F0 1008 00008 7707+ L R15,TLRCNT load local repeat count to R15
7708+*
7709 *
7710 * use sequence
7711 * LR R2,R6 dest addr
7712 * LA R3,10 dest length
7713 * LR R4,R8 source addr
7714 * LA R5,10 source length
7715 * MVCL R2,R4 doit
7716 *
0081A6 5860 C0D4 0825C 7717 L R6,=A(PBUF4K1) get ptr to ptr
0081AA 5866 0000 00000 7718 L R6,0(R6) get ptr to BUF4K1
0081AE 5880 C0D8 08260 7719 L R8,=A(PBUF4K2) get ptr to ptr
0081B2 5888 0000 00000 7720 L R8,0(R8) get ptr to BUF4K2
7721 T170L REPINSN LR,(R2,R6),LA,(R3,10), X
LR,(R4,R8),LA,(R5,10), X
MVCL,(R2,R4)
7722+*
7723+* build from sublist &ALIST* a comma separated string &ARGS*
7724+*
7725+*
7726+*
7727+*
7728+*
7729+*
7730+*
7731+*
7732+*
7733+*
7734+*
7735+*
081B6 7736+T170L EQU *
7737+*
PAGE 143
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
7738+*
7739+* write a comment indicating what REPINSN does (if NOGEN in effect)
7740+*
7741+*,// REPINSN: do 10 times:
7742+*
7743+* MNOTE requires that ' is doubled for expanded variables
7744+* thus build &MASTR as a copy of '&ARGS with ' doubled
7745+*
7746+*
7747+*,// LR R2,R6
7748+*
7749+* MNOTE requires that ' is doubled for expanded variables
7750+* thus build &MASTR as a copy of '&ARGS with ' doubled
7751+*
7752+*
7753+*,// LA R3,10
7754+*
7755+* MNOTE requires that ' is doubled for expanded variables
7756+* thus build &MASTR as a copy of '&ARGS with ' doubled
7757+*
7758+*
7759+*,// LR R4,R8
7760+*
7761+* MNOTE requires that ' is doubled for expanded variables
7762+* thus build &MASTR as a copy of '&ARGS with ' doubled
7763+*
7764+*
7765+*,// LA R5,10
7766+*
7767+* MNOTE requires that ' is doubled for expanded variables
7768+* thus build &MASTR as a copy of '&ARGS with ' doubled
7769+*
7770+*
7771+*,// MVCL R2,R4
7772+*
7773+* finally generate code: &ICNT copies of &CO1 ...
7774+*
0081B6 1826 7775+ LR R2,R6
0081B8 4130 000A 0000A 7776+ LA R3,10
0081BC 1848 7777+ LR R4,R8
0081BE 4150 000A 0000A 7778+ LA R5,10
0081C2 0E24 7779+ MVCL R2,R4
0081C4 1826 7780+ LR R2,R6
0081C6 4130 000A 0000A 7781+ LA R3,10
0081CA 1848 7782+ LR R4,R8
0081CC 4150 000A 0000A 7783+ LA R5,10
0081D0 0E24 7784+ MVCL R2,R4
0081D2 1826 7785+ LR R2,R6
0081D4 4130 000A 0000A 7786+ LA R3,10
0081D8 1848 7787+ LR R4,R8
0081DA 4150 000A 0000A 7788+ LA R5,10
0081DE 0E24 7789+ MVCL R2,R4
0081E0 1826 7790+ LR R2,R6
0081E2 4130 000A 0000A 7791+ LA R3,10
0081E6 1848 7792+ LR R4,R8
PAGE 144
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0081E8 4150 000A 0000A 7793+ LA R5,10
0081EC 0E24 7794+ MVCL R2,R4
0081EE 1826 7795+ LR R2,R6
0081F0 4130 000A 0000A 7796+ LA R3,10
0081F4 1848 7797+ LR R4,R8
0081F6 4150 000A 0000A 7798+ LA R5,10
0081FA 0E24 7799+ MVCL R2,R4
0081FC 1826 7800+ LR R2,R6
0081FE 4130 000A 0000A 7801+ LA R3,10
008202 1848 7802+ LR R4,R8
008204 4150 000A 0000A 7803+ LA R5,10
008208 0E24 7804+ MVCL R2,R4
00820A 1826 7805+ LR R2,R6
00820C 4130 000A 0000A 7806+ LA R3,10
008210 1848 7807+ LR R4,R8
008212 4150 000A 0000A 7808+ LA R5,10
008216 0E24 7809+ MVCL R2,R4
008218 1826 7810+ LR R2,R6
00821A 4130 000A 0000A 7811+ LA R3,10
00821E 1848 7812+ LR R4,R8
008220 4150 000A 0000A 7813+ LA R5,10
008224 0E24 7814+ MVCL R2,R4
008226 1826 7815+ LR R2,R6
008228 4130 000A 0000A 7816+ LA R3,10
00822C 1848 7817+ LR R4,R8
00822E 4150 000A 0000A 7818+ LA R5,10
008232 0E24 7819+ MVCL R2,R4
008234 1826 7820+ LR R2,R6
008236 4130 000A 0000A 7821+ LA R3,10
00823A 1848 7822+ LR R4,R8
00823C 4150 000A 0000A 7823+ LA R5,10
008240 0E24 7824+ MVCL R2,R4
7825+*
008242 06FB 7826 BCTR R15,R11
7827 TSIMRET
008244 58F0 C0D0 08258 7828+ L R15,=A(SAVETST) R15 := current save area
008248 58DF 0004 00004 7829+ L R13,4(R15) get old save area back
00824C 98EC D00C 0000C 7830+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
008250 07FE 7831+ BR 14 RETURN 02000000
7832 TSIMEND
008258 7833+ LTORG
008258 00000458 7834 =A(SAVETST)
00825C 000004B4 7835 =A(PBUF4K1)
008260 000004B8 7836 =A(PBUF4K2)
08264 7837+T170TEND EQU *
7838 *
7839 * Test 171 -- MVCL m,m (100b,copy) -------------------------
7840 *
7841 TSIMBEG T171,11000,10,1,C'4*Lx;MVCL (100b)'
7842+*
002A24 7843+TDSCDAT CSECT
002A28 7844+ DS 0D
7845+*
002A28 00008268 7846+T171TDSC DC A(T171) // TENTRY
002A2C 000000DC 7847+ DC A(T171TEND-T171) // TLENGTH
PAGE 145
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002A30 00002AF8 7848+ DC F'11000' // TLRCNT
002A34 0000000A 7849+ DC F'10' // TIGCNT
002A38 00000001 7850+ DC F'1' // TLTYPE
001282 7851+TEXT CSECT
001282 E3F1F7F1 7852+SPTR0564 DC C'T171'
002A3C 7853+TDSCDAT CSECT
002A3C 7854+ DS 0F
002A3C 04001282 7855+ DC AL1(L'SPTR0564),AL3(SPTR0564)
001286 7856+TEXT CSECT
001286 F45CD3A75ED4E5C3 7857+SPTR0565 DC C'4*Lx;MVCL (100b)'
002A40 7858+TDSCDAT CSECT
002A40 7859+ DS 0F
002A40 10001286 7860+ DC AL1(L'SPTR0565),AL3(SPTR0565)
7861+*
004A70 7862+TDSCTBL CSECT
04A70 7863+T171TPTR EQU *
004A70 00002A28 7864+ DC A(T171TDSC) enabled test
7865+*
008264 7866+TCODE CSECT
008268 7867+ DS 0D ensure double word alignment for test
008268 7868+T171 DS 0H 01650000
008268 90EC D00C 0000C 7869+ STM 14,12,12(13) SAVE REGISTERS 02950000
00826C 18CF 7870+ LR R12,R15 base register := entry address
08268 7871+ USING T171,R12 declare code base register
00826E 41B0 C02E 08296 7872+ LA R11,T171L load loop target to R11
008272 58F0 C0D0 08338 7873+ L R15,=A(SAVETST) R15 := current save area
008276 50DF 0004 00004 7874+ ST R13,4(R15) set back pointer in current save area
00827A 182D 7875+ LR R2,R13 remember callers save area
00827C 18DF 7876+ LR R13,R15 setup current save area
00827E 50D2 0008 00008 7877+ ST R13,8(R2) set forw pointer in callers save area
00000 7878+ USING TDSC,R1 declare TDSC base register
008282 58F0 1008 00008 7879+ L R15,TLRCNT load local repeat count to R15
7880+*
7881 *
7882 * use sequence
7883 * LR R2,R6 dest addr
7884 * LA R3,100 dest length
7885 * LR R4,R8 source addr
7886 * LA R5,100 source length
7887 * MVCL R2,R4 doit
7888 *
008286 5860 C0D4 0833C 7889 L R6,=A(PBUF4K1) get ptr to ptr
00828A 5866 0000 00000 7890 L R6,0(R6) get ptr to BUF4K1
00828E 5880 C0D8 08340 7891 L R8,=A(PBUF4K2) get ptr to ptr
008292 5888 0000 00000 7892 L R8,0(R8) get ptr to BUF4K2
7893 T171L REPINSN LR,(R2,R6),LA,(R3,100), X
LR,(R4,R8),LA,(R5,100), X
MVCL,(R2,R4)
7894+*
7895+* build from sublist &ALIST* a comma separated string &ARGS*
7896+*
7897+*
7898+*
7899+*
7900+*
PAGE 146
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
7901+*
7902+*
7903+*
7904+*
7905+*
7906+*
7907+*
08296 7908+T171L EQU *
7909+*
7910+*
7911+* write a comment indicating what REPINSN does (if NOGEN in effect)
7912+*
7913+*,// REPINSN: do 10 times:
7914+*
7915+* MNOTE requires that ' is doubled for expanded variables
7916+* thus build &MASTR as a copy of '&ARGS with ' doubled
7917+*
7918+*
7919+*,// LR R2,R6
7920+*
7921+* MNOTE requires that ' is doubled for expanded variables
7922+* thus build &MASTR as a copy of '&ARGS with ' doubled
7923+*
7924+*
7925+*,// LA R3,100
7926+*
7927+* MNOTE requires that ' is doubled for expanded variables
7928+* thus build &MASTR as a copy of '&ARGS with ' doubled
7929+*
7930+*
7931+*,// LR R4,R8
7932+*
7933+* MNOTE requires that ' is doubled for expanded variables
7934+* thus build &MASTR as a copy of '&ARGS with ' doubled
7935+*
7936+*
7937+*,// LA R5,100
7938+*
7939+* MNOTE requires that ' is doubled for expanded variables
7940+* thus build &MASTR as a copy of '&ARGS with ' doubled
7941+*
7942+*
7943+*,// MVCL R2,R4
7944+*
7945+* finally generate code: &ICNT copies of &CO1 ...
7946+*
008296 1826 7947+ LR R2,R6
008298 4130 0064 00064 7948+ LA R3,100
00829C 1848 7949+ LR R4,R8
00829E 4150 0064 00064 7950+ LA R5,100
0082A2 0E24 7951+ MVCL R2,R4
0082A4 1826 7952+ LR R2,R6
0082A6 4130 0064 00064 7953+ LA R3,100
0082AA 1848 7954+ LR R4,R8
0082AC 4150 0064 00064 7955+ LA R5,100
PAGE 147
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0082B0 0E24 7956+ MVCL R2,R4
0082B2 1826 7957+ LR R2,R6
0082B4 4130 0064 00064 7958+ LA R3,100
0082B8 1848 7959+ LR R4,R8
0082BA 4150 0064 00064 7960+ LA R5,100
0082BE 0E24 7961+ MVCL R2,R4
0082C0 1826 7962+ LR R2,R6
0082C2 4130 0064 00064 7963+ LA R3,100
0082C6 1848 7964+ LR R4,R8
0082C8 4150 0064 00064 7965+ LA R5,100
0082CC 0E24 7966+ MVCL R2,R4
0082CE 1826 7967+ LR R2,R6
0082D0 4130 0064 00064 7968+ LA R3,100
0082D4 1848 7969+ LR R4,R8
0082D6 4150 0064 00064 7970+ LA R5,100
0082DA 0E24 7971+ MVCL R2,R4
0082DC 1826 7972+ LR R2,R6
0082DE 4130 0064 00064 7973+ LA R3,100
0082E2 1848 7974+ LR R4,R8
0082E4 4150 0064 00064 7975+ LA R5,100
0082E8 0E24 7976+ MVCL R2,R4
0082EA 1826 7977+ LR R2,R6
0082EC 4130 0064 00064 7978+ LA R3,100
0082F0 1848 7979+ LR R4,R8
0082F2 4150 0064 00064 7980+ LA R5,100
0082F6 0E24 7981+ MVCL R2,R4
0082F8 1826 7982+ LR R2,R6
0082FA 4130 0064 00064 7983+ LA R3,100
0082FE 1848 7984+ LR R4,R8
008300 4150 0064 00064 7985+ LA R5,100
008304 0E24 7986+ MVCL R2,R4
008306 1826 7987+ LR R2,R6
008308 4130 0064 00064 7988+ LA R3,100
00830C 1848 7989+ LR R4,R8
00830E 4150 0064 00064 7990+ LA R5,100
008312 0E24 7991+ MVCL R2,R4
008314 1826 7992+ LR R2,R6
008316 4130 0064 00064 7993+ LA R3,100
00831A 1848 7994+ LR R4,R8
00831C 4150 0064 00064 7995+ LA R5,100
008320 0E24 7996+ MVCL R2,R4
7997+*
008322 06FB 7998 BCTR R15,R11
7999 TSIMRET
008324 58F0 C0D0 08338 8000+ L R15,=A(SAVETST) R15 := current save area
008328 58DF 0004 00004 8001+ L R13,4(R15) get old save area back
00832C 98EC D00C 0000C 8002+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
008330 07FE 8003+ BR 14 RETURN 02000000
8004 TSIMEND
008338 8005+ LTORG
008338 00000458 8006 =A(SAVETST)
00833C 000004B4 8007 =A(PBUF4K1)
008340 000004B8 8008 =A(PBUF4K2)
08344 8009+T171TEND EQU *
8010 *
PAGE 148
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
8011 * Test 172 -- MVCL m,m (250b,copy) -------------------------
8012 *
8013 TSIMBEG T172,9000,10,1,C'4*Lx;MVCL (250b)'
8014+*
002A44 8015+TDSCDAT CSECT
002A48 8016+ DS 0D
8017+*
002A48 00008348 8018+T172TDSC DC A(T172) // TENTRY
002A4C 000000DC 8019+ DC A(T172TEND-T172) // TLENGTH
002A50 00002328 8020+ DC F'9000' // TLRCNT
002A54 0000000A 8021+ DC F'10' // TIGCNT
002A58 00000001 8022+ DC F'1' // TLTYPE
001296 8023+TEXT CSECT
001296 E3F1F7F2 8024+SPTR0584 DC C'T172'
002A5C 8025+TDSCDAT CSECT
002A5C 8026+ DS 0F
002A5C 04001296 8027+ DC AL1(L'SPTR0584),AL3(SPTR0584)
00129A 8028+TEXT CSECT
00129A F45CD3A75ED4E5C3 8029+SPTR0585 DC C'4*Lx;MVCL (250b)'
002A60 8030+TDSCDAT CSECT
002A60 8031+ DS 0F
002A60 1000129A 8032+ DC AL1(L'SPTR0585),AL3(SPTR0585)
8033+*
004A74 8034+TDSCTBL CSECT
04A74 8035+T172TPTR EQU *
004A74 00002A48 8036+ DC A(T172TDSC) enabled test
8037+*
008344 8038+TCODE CSECT
008348 8039+ DS 0D ensure double word alignment for test
008348 8040+T172 DS 0H 01650000
008348 90EC D00C 0000C 8041+ STM 14,12,12(13) SAVE REGISTERS 02950000
00834C 18CF 8042+ LR R12,R15 base register := entry address
08348 8043+ USING T172,R12 declare code base register
00834E 41B0 C02E 08376 8044+ LA R11,T172L load loop target to R11
008352 58F0 C0D0 08418 8045+ L R15,=A(SAVETST) R15 := current save area
008356 50DF 0004 00004 8046+ ST R13,4(R15) set back pointer in current save area
00835A 182D 8047+ LR R2,R13 remember callers save area
00835C 18DF 8048+ LR R13,R15 setup current save area
00835E 50D2 0008 00008 8049+ ST R13,8(R2) set forw pointer in callers save area
00000 8050+ USING TDSC,R1 declare TDSC base register
008362 58F0 1008 00008 8051+ L R15,TLRCNT load local repeat count to R15
8052+*
8053 *
8054 * use sequence
8055 * LR R2,R6 dest addr
8056 * LA R3,250 dest length
8057 * LR R4,R8 source addr
8058 * LA R5,250 source length
8059 * MVCL R2,R4 doit
8060 *
008366 5860 C0D4 0841C 8061 L R6,=A(PBUF4K1) get ptr to ptr
00836A 5866 0000 00000 8062 L R6,0(R6) get ptr to BUF4K1
00836E 5880 C0D8 08420 8063 L R8,=A(PBUF4K2) get ptr to ptr
008372 5888 0000 00000 8064 L R8,0(R8) get ptr to BUF4K2
8065 T172L REPINSN LR,(R2,R6),LA,(R3,250), X
PAGE 149
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
LR,(R4,R8),LA,(R5,250), X
MVCL,(R2,R4)
8066+*
8067+* build from sublist &ALIST* a comma separated string &ARGS*
8068+*
8069+*
8070+*
8071+*
8072+*
8073+*
8074+*
8075+*
8076+*
8077+*
8078+*
8079+*
08376 8080+T172L EQU *
8081+*
8082+*
8083+* write a comment indicating what REPINSN does (if NOGEN in effect)
8084+*
8085+*,// REPINSN: do 10 times:
8086+*
8087+* MNOTE requires that ' is doubled for expanded variables
8088+* thus build &MASTR as a copy of '&ARGS with ' doubled
8089+*
8090+*
8091+*,// LR R2,R6
8092+*
8093+* MNOTE requires that ' is doubled for expanded variables
8094+* thus build &MASTR as a copy of '&ARGS with ' doubled
8095+*
8096+*
8097+*,// LA R3,250
8098+*
8099+* MNOTE requires that ' is doubled for expanded variables
8100+* thus build &MASTR as a copy of '&ARGS with ' doubled
8101+*
8102+*
8103+*,// LR R4,R8
8104+*
8105+* MNOTE requires that ' is doubled for expanded variables
8106+* thus build &MASTR as a copy of '&ARGS with ' doubled
8107+*
8108+*
8109+*,// LA R5,250
8110+*
8111+* MNOTE requires that ' is doubled for expanded variables
8112+* thus build &MASTR as a copy of '&ARGS with ' doubled
8113+*
8114+*
8115+*,// MVCL R2,R4
8116+*
8117+* finally generate code: &ICNT copies of &CO1 ...
8118+*
PAGE 150
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
008376 1826 8119+ LR R2,R6
008378 4130 00FA 000FA 8120+ LA R3,250
00837C 1848 8121+ LR R4,R8
00837E 4150 00FA 000FA 8122+ LA R5,250
008382 0E24 8123+ MVCL R2,R4
008384 1826 8124+ LR R2,R6
008386 4130 00FA 000FA 8125+ LA R3,250
00838A 1848 8126+ LR R4,R8
00838C 4150 00FA 000FA 8127+ LA R5,250
008390 0E24 8128+ MVCL R2,R4
008392 1826 8129+ LR R2,R6
008394 4130 00FA 000FA 8130+ LA R3,250
008398 1848 8131+ LR R4,R8
00839A 4150 00FA 000FA 8132+ LA R5,250
00839E 0E24 8133+ MVCL R2,R4
0083A0 1826 8134+ LR R2,R6
0083A2 4130 00FA 000FA 8135+ LA R3,250
0083A6 1848 8136+ LR R4,R8
0083A8 4150 00FA 000FA 8137+ LA R5,250
0083AC 0E24 8138+ MVCL R2,R4
0083AE 1826 8139+ LR R2,R6
0083B0 4130 00FA 000FA 8140+ LA R3,250
0083B4 1848 8141+ LR R4,R8
0083B6 4150 00FA 000FA 8142+ LA R5,250
0083BA 0E24 8143+ MVCL R2,R4
0083BC 1826 8144+ LR R2,R6
0083BE 4130 00FA 000FA 8145+ LA R3,250
0083C2 1848 8146+ LR R4,R8
0083C4 4150 00FA 000FA 8147+ LA R5,250
0083C8 0E24 8148+ MVCL R2,R4
0083CA 1826 8149+ LR R2,R6
0083CC 4130 00FA 000FA 8150+ LA R3,250
0083D0 1848 8151+ LR R4,R8
0083D2 4150 00FA 000FA 8152+ LA R5,250
0083D6 0E24 8153+ MVCL R2,R4
0083D8 1826 8154+ LR R2,R6
0083DA 4130 00FA 000FA 8155+ LA R3,250
0083DE 1848 8156+ LR R4,R8
0083E0 4150 00FA 000FA 8157+ LA R5,250
0083E4 0E24 8158+ MVCL R2,R4
0083E6 1826 8159+ LR R2,R6
0083E8 4130 00FA 000FA 8160+ LA R3,250
0083EC 1848 8161+ LR R4,R8
0083EE 4150 00FA 000FA 8162+ LA R5,250
0083F2 0E24 8163+ MVCL R2,R4
0083F4 1826 8164+ LR R2,R6
0083F6 4130 00FA 000FA 8165+ LA R3,250
0083FA 1848 8166+ LR R4,R8
0083FC 4150 00FA 000FA 8167+ LA R5,250
008400 0E24 8168+ MVCL R2,R4
8169+*
008402 06FB 8170 BCTR R15,R11
8171 TSIMRET
008404 58F0 C0D0 08418 8172+ L R15,=A(SAVETST) R15 := current save area
008408 58DF 0004 00004 8173+ L R13,4(R15) get old save area back
PAGE 151
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00840C 98EC D00C 0000C 8174+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
008410 07FE 8175+ BR 14 RETURN 02000000
8176 TSIMEND
008418 8177+ LTORG
008418 00000458 8178 =A(SAVETST)
00841C 000004B4 8179 =A(PBUF4K1)
008420 000004B8 8180 =A(PBUF4K2)
08424 8181+T172TEND EQU *
8182 *
8183 * Test 173 -- MVCL m,m (1kb,copy) --------------------------
8184 *
8185 TSIMBEG T173,4500,10,1,C'4*Lx;MVCL (1kb)'
8186+*
002A64 8187+TDSCDAT CSECT
002A68 8188+ DS 0D
8189+*
002A68 00008428 8190+T173TDSC DC A(T173) // TENTRY
002A6C 000000DC 8191+ DC A(T173TEND-T173) // TLENGTH
002A70 00001194 8192+ DC F'4500' // TLRCNT
002A74 0000000A 8193+ DC F'10' // TIGCNT
002A78 00000001 8194+ DC F'1' // TLTYPE
0012AA 8195+TEXT CSECT
0012AA E3F1F7F3 8196+SPTR0604 DC C'T173'
002A7C 8197+TDSCDAT CSECT
002A7C 8198+ DS 0F
002A7C 040012AA 8199+ DC AL1(L'SPTR0604),AL3(SPTR0604)
0012AE 8200+TEXT CSECT
0012AE F45CD3A75ED4E5C3 8201+SPTR0605 DC C'4*Lx;MVCL (1kb)'
002A80 8202+TDSCDAT CSECT
002A80 8203+ DS 0F
002A80 0F0012AE 8204+ DC AL1(L'SPTR0605),AL3(SPTR0605)
8205+*
004A78 8206+TDSCTBL CSECT
04A78 8207+T173TPTR EQU *
004A78 00002A68 8208+ DC A(T173TDSC) enabled test
8209+*
008424 8210+TCODE CSECT
008428 8211+ DS 0D ensure double word alignment for test
008428 8212+T173 DS 0H 01650000
008428 90EC D00C 0000C 8213+ STM 14,12,12(13) SAVE REGISTERS 02950000
00842C 18CF 8214+ LR R12,R15 base register := entry address
08428 8215+ USING T173,R12 declare code base register
00842E 41B0 C02E 08456 8216+ LA R11,T173L load loop target to R11
008432 58F0 C0D0 084F8 8217+ L R15,=A(SAVETST) R15 := current save area
008436 50DF 0004 00004 8218+ ST R13,4(R15) set back pointer in current save area
00843A 182D 8219+ LR R2,R13 remember callers save area
00843C 18DF 8220+ LR R13,R15 setup current save area
00843E 50D2 0008 00008 8221+ ST R13,8(R2) set forw pointer in callers save area
00000 8222+ USING TDSC,R1 declare TDSC base register
008442 58F0 1008 00008 8223+ L R15,TLRCNT load local repeat count to R15
8224+*
8225 *
8226 * use sequence
8227 * LR R2,R6 dest addr
8228 * LA R3,1024 dest length
PAGE 152
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
8229 * LR R4,R8 source addr
8230 * LA R5,1024 source length
8231 * MVCL R2,R4 doit
8232 *
008446 5860 C0D4 084FC 8233 L R6,=A(PBUF4K1) get ptr to ptr
00844A 5866 0000 00000 8234 L R6,0(R6) get ptr to BUF4K1
00844E 5880 C0D8 08500 8235 L R8,=A(PBUF4K2) get ptr to ptr
008452 5888 0000 00000 8236 L R8,0(R8) get ptr to BUF4K2
8237 T173L REPINSN LR,(R2,R6),LA,(R3,1024), X
LR,(R4,R8),LA,(R5,1024), X
MVCL,(R2,R4)
8238+*
8239+* build from sublist &ALIST* a comma separated string &ARGS*
8240+*
8241+*
8242+*
8243+*
8244+*
8245+*
8246+*
8247+*
8248+*
8249+*
8250+*
8251+*
08456 8252+T173L EQU *
8253+*
8254+*
8255+* write a comment indicating what REPINSN does (if NOGEN in effect)
8256+*
8257+*,// REPINSN: do 10 times:
8258+*
8259+* MNOTE requires that ' is doubled for expanded variables
8260+* thus build &MASTR as a copy of '&ARGS with ' doubled
8261+*
8262+*
8263+*,// LR R2,R6
8264+*
8265+* MNOTE requires that ' is doubled for expanded variables
8266+* thus build &MASTR as a copy of '&ARGS with ' doubled
8267+*
8268+*
8269+*,// LA R3,1024
8270+*
8271+* MNOTE requires that ' is doubled for expanded variables
8272+* thus build &MASTR as a copy of '&ARGS with ' doubled
8273+*
8274+*
8275+*,// LR R4,R8
8276+*
8277+* MNOTE requires that ' is doubled for expanded variables
8278+* thus build &MASTR as a copy of '&ARGS with ' doubled
8279+*
8280+*
8281+*,// LA R5,1024
PAGE 153
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
8282+*
8283+* MNOTE requires that ' is doubled for expanded variables
8284+* thus build &MASTR as a copy of '&ARGS with ' doubled
8285+*
8286+*
8287+*,// MVCL R2,R4
8288+*
8289+* finally generate code: &ICNT copies of &CO1 ...
8290+*
008456 1826 8291+ LR R2,R6
008458 4130 0400 00400 8292+ LA R3,1024
00845C 1848 8293+ LR R4,R8
00845E 4150 0400 00400 8294+ LA R5,1024
008462 0E24 8295+ MVCL R2,R4
008464 1826 8296+ LR R2,R6
008466 4130 0400 00400 8297+ LA R3,1024
00846A 1848 8298+ LR R4,R8
00846C 4150 0400 00400 8299+ LA R5,1024
008470 0E24 8300+ MVCL R2,R4
008472 1826 8301+ LR R2,R6
008474 4130 0400 00400 8302+ LA R3,1024
008478 1848 8303+ LR R4,R8
00847A 4150 0400 00400 8304+ LA R5,1024
00847E 0E24 8305+ MVCL R2,R4
008480 1826 8306+ LR R2,R6
008482 4130 0400 00400 8307+ LA R3,1024
008486 1848 8308+ LR R4,R8
008488 4150 0400 00400 8309+ LA R5,1024
00848C 0E24 8310+ MVCL R2,R4
00848E 1826 8311+ LR R2,R6
008490 4130 0400 00400 8312+ LA R3,1024
008494 1848 8313+ LR R4,R8
008496 4150 0400 00400 8314+ LA R5,1024
00849A 0E24 8315+ MVCL R2,R4
00849C 1826 8316+ LR R2,R6
00849E 4130 0400 00400 8317+ LA R3,1024
0084A2 1848 8318+ LR R4,R8
0084A4 4150 0400 00400 8319+ LA R5,1024
0084A8 0E24 8320+ MVCL R2,R4
0084AA 1826 8321+ LR R2,R6
0084AC 4130 0400 00400 8322+ LA R3,1024
0084B0 1848 8323+ LR R4,R8
0084B2 4150 0400 00400 8324+ LA R5,1024
0084B6 0E24 8325+ MVCL R2,R4
0084B8 1826 8326+ LR R2,R6
0084BA 4130 0400 00400 8327+ LA R3,1024
0084BE 1848 8328+ LR R4,R8
0084C0 4150 0400 00400 8329+ LA R5,1024
0084C4 0E24 8330+ MVCL R2,R4
0084C6 1826 8331+ LR R2,R6
0084C8 4130 0400 00400 8332+ LA R3,1024
0084CC 1848 8333+ LR R4,R8
0084CE 4150 0400 00400 8334+ LA R5,1024
0084D2 0E24 8335+ MVCL R2,R4
0084D4 1826 8336+ LR R2,R6
PAGE 154
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0084D6 4130 0400 00400 8337+ LA R3,1024
0084DA 1848 8338+ LR R4,R8
0084DC 4150 0400 00400 8339+ LA R5,1024
0084E0 0E24 8340+ MVCL R2,R4
8341+*
0084E2 06FB 8342 BCTR R15,R11
8343 TSIMRET
0084E4 58F0 C0D0 084F8 8344+ L R15,=A(SAVETST) R15 := current save area
0084E8 58DF 0004 00004 8345+ L R13,4(R15) get old save area back
0084EC 98EC D00C 0000C 8346+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0084F0 07FE 8347+ BR 14 RETURN 02000000
8348 TSIMEND
0084F8 8349+ LTORG
0084F8 00000458 8350 =A(SAVETST)
0084FC 000004B4 8351 =A(PBUF4K1)
008500 000004B8 8352 =A(PBUF4K2)
08504 8353+T173TEND EQU *
8354 *
8355 * Test 174 -- MVCL m,m (4kb,copy) --------------------------
8356 *
8357 TSIMBEG T174,1400,10,1,C'4*LR;MVCL (4kb)'
8358+*
002A84 8359+TDSCDAT CSECT
002A88 8360+ DS 0D
8361+*
002A88 00008508 8362+T174TDSC DC A(T174) // TENTRY
002A8C 000000B8 8363+ DC A(T174TEND-T174) // TLENGTH
002A90 00000578 8364+ DC F'1400' // TLRCNT
002A94 0000000A 8365+ DC F'10' // TIGCNT
002A98 00000001 8366+ DC F'1' // TLTYPE
0012BD 8367+TEXT CSECT
0012BD E3F1F7F4 8368+SPTR0624 DC C'T174'
002A9C 8369+TDSCDAT CSECT
002A9C 8370+ DS 0F
002A9C 040012BD 8371+ DC AL1(L'SPTR0624),AL3(SPTR0624)
0012C1 8372+TEXT CSECT
0012C1 F45CD3D95ED4E5C3 8373+SPTR0625 DC C'4*LR;MVCL (4kb)'
002AA0 8374+TDSCDAT CSECT
002AA0 8375+ DS 0F
002AA0 0F0012C1 8376+ DC AL1(L'SPTR0625),AL3(SPTR0625)
8377+*
004A7C 8378+TDSCTBL CSECT
04A7C 8379+T174TPTR EQU *
004A7C 00002A88 8380+ DC A(T174TDSC) enabled test
8381+*
008504 8382+TCODE CSECT
008508 8383+ DS 0D ensure double word alignment for test
008508 8384+T174 DS 0H 01650000
008508 90EC D00C 0000C 8385+ STM 14,12,12(13) SAVE REGISTERS 02950000
00850C 18CF 8386+ LR R12,R15 base register := entry address
08508 8387+ USING T174,R12 declare code base register
00850E 41B0 C032 0853A 8388+ LA R11,T174L load loop target to R11
008512 58F0 C0A8 085B0 8389+ L R15,=A(SAVETST) R15 := current save area
008516 50DF 0004 00004 8390+ ST R13,4(R15) set back pointer in current save area
00851A 182D 8391+ LR R2,R13 remember callers save area
PAGE 155
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00851C 18DF 8392+ LR R13,R15 setup current save area
00851E 50D2 0008 00008 8393+ ST R13,8(R2) set forw pointer in callers save area
00000 8394+ USING TDSC,R1 declare TDSC base register
008522 58F0 1008 00008 8395+ L R15,TLRCNT load local repeat count to R15
8396+*
8397 *
8398 * use sequence
8399 * LR R2,R6 dest addr
8400 * LR R3,R7 dest length
8401 * LR R4,R8 source addr
8402 * LR R5,R7 source length
8403 * MVCL R2,R4 doit
8404 *
008526 5860 C0AC 085B4 8405 L R6,=A(PBUF4K1) get ptr to ptr
00852A 5866 0000 00000 8406 L R6,0(R6) get ptr to BUF4K1
00852E 5880 C0B0 085B8 8407 L R8,=A(PBUF4K2) get ptr to ptr
008532 5888 0000 00000 8408 L R8,0(R8) get ptr to BUF4K2
008536 5870 C0B4 085BC 8409 L R7,=F'4096' transfer length
8410 T174L REPINSN LR,(R2,R6),LR,(R3,R7), X
LR,(R4,R8),LR,(R5,R7), X
MVCL,(R2,R4)
8411+*
8412+* build from sublist &ALIST* a comma separated string &ARGS*
8413+*
8414+*
8415+*
8416+*
8417+*
8418+*
8419+*
8420+*
8421+*
8422+*
8423+*
8424+*
0853A 8425+T174L EQU *
8426+*
8427+*
8428+* write a comment indicating what REPINSN does (if NOGEN in effect)
8429+*
8430+*,// REPINSN: do 10 times:
8431+*
8432+* MNOTE requires that ' is doubled for expanded variables
8433+* thus build &MASTR as a copy of '&ARGS with ' doubled
8434+*
8435+*
8436+*,// LR R2,R6
8437+*
8438+* MNOTE requires that ' is doubled for expanded variables
8439+* thus build &MASTR as a copy of '&ARGS with ' doubled
8440+*
8441+*
8442+*,// LR R3,R7
8443+*
8444+* MNOTE requires that ' is doubled for expanded variables
PAGE 156
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
8445+* thus build &MASTR as a copy of '&ARGS with ' doubled
8446+*
8447+*
8448+*,// LR R4,R8
8449+*
8450+* MNOTE requires that ' is doubled for expanded variables
8451+* thus build &MASTR as a copy of '&ARGS with ' doubled
8452+*
8453+*
8454+*,// LR R5,R7
8455+*
8456+* MNOTE requires that ' is doubled for expanded variables
8457+* thus build &MASTR as a copy of '&ARGS with ' doubled
8458+*
8459+*
8460+*,// MVCL R2,R4
8461+*
8462+* finally generate code: &ICNT copies of &CO1 ...
8463+*
00853A 1826 8464+ LR R2,R6
00853C 1837 8465+ LR R3,R7
00853E 1848 8466+ LR R4,R8
008540 1857 8467+ LR R5,R7
008542 0E24 8468+ MVCL R2,R4
008544 1826 8469+ LR R2,R6
008546 1837 8470+ LR R3,R7
008548 1848 8471+ LR R4,R8
00854A 1857 8472+ LR R5,R7
00854C 0E24 8473+ MVCL R2,R4
00854E 1826 8474+ LR R2,R6
008550 1837 8475+ LR R3,R7
008552 1848 8476+ LR R4,R8
008554 1857 8477+ LR R5,R7
008556 0E24 8478+ MVCL R2,R4
008558 1826 8479+ LR R2,R6
00855A 1837 8480+ LR R3,R7
00855C 1848 8481+ LR R4,R8
00855E 1857 8482+ LR R5,R7
008560 0E24 8483+ MVCL R2,R4
008562 1826 8484+ LR R2,R6
008564 1837 8485+ LR R3,R7
008566 1848 8486+ LR R4,R8
008568 1857 8487+ LR R5,R7
00856A 0E24 8488+ MVCL R2,R4
00856C 1826 8489+ LR R2,R6
00856E 1837 8490+ LR R3,R7
008570 1848 8491+ LR R4,R8
008572 1857 8492+ LR R5,R7
008574 0E24 8493+ MVCL R2,R4
008576 1826 8494+ LR R2,R6
008578 1837 8495+ LR R3,R7
00857A 1848 8496+ LR R4,R8
00857C 1857 8497+ LR R5,R7
00857E 0E24 8498+ MVCL R2,R4
008580 1826 8499+ LR R2,R6
PAGE 157
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
008582 1837 8500+ LR R3,R7
008584 1848 8501+ LR R4,R8
008586 1857 8502+ LR R5,R7
008588 0E24 8503+ MVCL R2,R4
00858A 1826 8504+ LR R2,R6
00858C 1837 8505+ LR R3,R7
00858E 1848 8506+ LR R4,R8
008590 1857 8507+ LR R5,R7
008592 0E24 8508+ MVCL R2,R4
008594 1826 8509+ LR R2,R6
008596 1837 8510+ LR R3,R7
008598 1848 8511+ LR R4,R8
00859A 1857 8512+ LR R5,R7
00859C 0E24 8513+ MVCL R2,R4
8514+*
00859E 06FB 8515 BCTR R15,R11
8516 TSIMRET
0085A0 58F0 C0A8 085B0 8517+ L R15,=A(SAVETST) R15 := current save area
0085A4 58DF 0004 00004 8518+ L R13,4(R15) get old save area back
0085A8 98EC D00C 0000C 8519+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0085AC 07FE 8520+ BR 14 RETURN 02000000
8521 TSIMEND
0085B0 8522+ LTORG
0085B0 00000458 8523 =A(SAVETST)
0085B4 000004B4 8524 =A(PBUF4K1)
0085B8 000004B8 8525 =A(PBUF4K2)
0085BC 00001000 8526 =F'4096'
085C0 8527+T174TEND EQU *
8528 *
8529 * Test 175 -- MVCL m,m (100b,pad) --------------------------
8530 *
8531 TSIMBEG T175,15000,10,1,C'4*Lx;MVCL (100b,pad)'
8532+*
002AA4 8533+TDSCDAT CSECT
002AA8 8534+ DS 0D
8535+*
002AA8 000085C0 8536+T175TDSC DC A(T175) // TENTRY
002AAC 000000D4 8537+ DC A(T175TEND-T175) // TLENGTH
002AB0 00003A98 8538+ DC F'15000' // TLRCNT
002AB4 0000000A 8539+ DC F'10' // TIGCNT
002AB8 00000001 8540+ DC F'1' // TLTYPE
0012D0 8541+TEXT CSECT
0012D0 E3F1F7F5 8542+SPTR0644 DC C'T175'
002ABC 8543+TDSCDAT CSECT
002ABC 8544+ DS 0F
002ABC 040012D0 8545+ DC AL1(L'SPTR0644),AL3(SPTR0644)
0012D4 8546+TEXT CSECT
0012D4 F45CD3A75ED4E5C3 8547+SPTR0645 DC C'4*Lx;MVCL (100b,pad)'
002AC0 8548+TDSCDAT CSECT
002AC0 8549+ DS 0F
002AC0 140012D4 8550+ DC AL1(L'SPTR0645),AL3(SPTR0645)
8551+*
004A80 8552+TDSCTBL CSECT
04A80 8553+T175TPTR EQU *
004A80 00002AA8 8554+ DC A(T175TDSC) enabled test
PAGE 158
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
8555+*
0085C0 8556+TCODE CSECT
0085C0 8557+ DS 0D ensure double word alignment for test
0085C0 8558+T175 DS 0H 01650000
0085C0 90EC D00C 0000C 8559+ STM 14,12,12(13) SAVE REGISTERS 02950000
0085C4 18CF 8560+ LR R12,R15 base register := entry address
085C0 8561+ USING T175,R12 declare code base register
0085C6 41B0 C02A 085EA 8562+ LA R11,T175L load loop target to R11
0085CA 58F0 C0C8 08688 8563+ L R15,=A(SAVETST) R15 := current save area
0085CE 50DF 0004 00004 8564+ ST R13,4(R15) set back pointer in current save area
0085D2 182D 8565+ LR R2,R13 remember callers save area
0085D4 18DF 8566+ LR R13,R15 setup current save area
0085D6 50D2 0008 00008 8567+ ST R13,8(R2) set forw pointer in callers save area
00000 8568+ USING TDSC,R1 declare TDSC base register
0085DA 58F0 1008 00008 8569+ L R15,TLRCNT load local repeat count to R15
8570+*
8571 *
8572 * use sequence
8573 * LR R2,R6 dest addr
8574 * LA R3,100 dest length
8575 * LA R4,0 source addr == 0 !
8576 * LR R5,R9 source length == 0; setup pad byte
8577 * MVCL R2,R4
8578 *
0085DE 5860 C0CC 0868C 8579 L R6,=A(PBUF4K1) get ptr to ptr
0085E2 5866 0000 00000 8580 L R6,0(R6) get ptr to BUF4K1
0085E6 5890 C0D0 08690 8581 L R9,=X'FF000000'
8582 T175L REPINSN LR,(R2,R6),LA,(R3,100), X
LA,(R4,0),LR,(R5,R9), X
MVCL,(R2,R4)
8583+*
8584+* build from sublist &ALIST* a comma separated string &ARGS*
8585+*
8586+*
8587+*
8588+*
8589+*
8590+*
8591+*
8592+*
8593+*
8594+*
8595+*
8596+*
085EA 8597+T175L EQU *
8598+*
8599+*
8600+* write a comment indicating what REPINSN does (if NOGEN in effect)
8601+*
8602+*,// REPINSN: do 10 times:
8603+*
8604+* MNOTE requires that ' is doubled for expanded variables
8605+* thus build &MASTR as a copy of '&ARGS with ' doubled
8606+*
8607+*
PAGE 159
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
8608+*,// LR R2,R6
8609+*
8610+* MNOTE requires that ' is doubled for expanded variables
8611+* thus build &MASTR as a copy of '&ARGS with ' doubled
8612+*
8613+*
8614+*,// LA R3,100
8615+*
8616+* MNOTE requires that ' is doubled for expanded variables
8617+* thus build &MASTR as a copy of '&ARGS with ' doubled
8618+*
8619+*
8620+*,// LA R4,0
8621+*
8622+* MNOTE requires that ' is doubled for expanded variables
8623+* thus build &MASTR as a copy of '&ARGS with ' doubled
8624+*
8625+*
8626+*,// LR R5,R9
8627+*
8628+* MNOTE requires that ' is doubled for expanded variables
8629+* thus build &MASTR as a copy of '&ARGS with ' doubled
8630+*
8631+*
8632+*,// MVCL R2,R4
8633+*
8634+* finally generate code: &ICNT copies of &CO1 ...
8635+*
0085EA 1826 8636+ LR R2,R6
0085EC 4130 0064 00064 8637+ LA R3,100
0085F0 4140 0000 00000 8638+ LA R4,0
0085F4 1859 8639+ LR R5,R9
0085F6 0E24 8640+ MVCL R2,R4
0085F8 1826 8641+ LR R2,R6
0085FA 4130 0064 00064 8642+ LA R3,100
0085FE 4140 0000 00000 8643+ LA R4,0
008602 1859 8644+ LR R5,R9
008604 0E24 8645+ MVCL R2,R4
008606 1826 8646+ LR R2,R6
008608 4130 0064 00064 8647+ LA R3,100
00860C 4140 0000 00000 8648+ LA R4,0
008610 1859 8649+ LR R5,R9
008612 0E24 8650+ MVCL R2,R4
008614 1826 8651+ LR R2,R6
008616 4130 0064 00064 8652+ LA R3,100
00861A 4140 0000 00000 8653+ LA R4,0
00861E 1859 8654+ LR R5,R9
008620 0E24 8655+ MVCL R2,R4
008622 1826 8656+ LR R2,R6
008624 4130 0064 00064 8657+ LA R3,100
008628 4140 0000 00000 8658+ LA R4,0
00862C 1859 8659+ LR R5,R9
00862E 0E24 8660+ MVCL R2,R4
008630 1826 8661+ LR R2,R6
008632 4130 0064 00064 8662+ LA R3,100
PAGE 160
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
008636 4140 0000 00000 8663+ LA R4,0
00863A 1859 8664+ LR R5,R9
00863C 0E24 8665+ MVCL R2,R4
00863E 1826 8666+ LR R2,R6
008640 4130 0064 00064 8667+ LA R3,100
008644 4140 0000 00000 8668+ LA R4,0
008648 1859 8669+ LR R5,R9
00864A 0E24 8670+ MVCL R2,R4
00864C 1826 8671+ LR R2,R6
00864E 4130 0064 00064 8672+ LA R3,100
008652 4140 0000 00000 8673+ LA R4,0
008656 1859 8674+ LR R5,R9
008658 0E24 8675+ MVCL R2,R4
00865A 1826 8676+ LR R2,R6
00865C 4130 0064 00064 8677+ LA R3,100
008660 4140 0000 00000 8678+ LA R4,0
008664 1859 8679+ LR R5,R9
008666 0E24 8680+ MVCL R2,R4
008668 1826 8681+ LR R2,R6
00866A 4130 0064 00064 8682+ LA R3,100
00866E 4140 0000 00000 8683+ LA R4,0
008672 1859 8684+ LR R5,R9
008674 0E24 8685+ MVCL R2,R4
8686+*
008676 06FB 8687 BCTR R15,R11
8688 TSIMRET
008678 58F0 C0C8 08688 8689+ L R15,=A(SAVETST) R15 := current save area
00867C 58DF 0004 00004 8690+ L R13,4(R15) get old save area back
008680 98EC D00C 0000C 8691+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
008684 07FE 8692+ BR 14 RETURN 02000000
8693 TSIMEND
008688 8694+ LTORG
008688 00000458 8695 =A(SAVETST)
00868C 000004B4 8696 =A(PBUF4K1)
008690 FF000000 8697 =X'FF000000'
08694 8698+T175TEND EQU *
8699 *
8700 * Test 176 -- MVCL m,m (1kb,pad) ---------------------------
8701 *
8702 TSIMBEG T176,10000,10,1,C'4*Lx;MVCL (1kb,pad)'
8703+*
002AC4 8704+TDSCDAT CSECT
002AC8 8705+ DS 0D
8706+*
002AC8 00008698 8707+T176TDSC DC A(T176) // TENTRY
002ACC 000000D4 8708+ DC A(T176TEND-T176) // TLENGTH
002AD0 00002710 8709+ DC F'10000' // TLRCNT
002AD4 0000000A 8710+ DC F'10' // TIGCNT
002AD8 00000001 8711+ DC F'1' // TLTYPE
0012E8 8712+TEXT CSECT
0012E8 E3F1F7F6 8713+SPTR0664 DC C'T176'
002ADC 8714+TDSCDAT CSECT
002ADC 8715+ DS 0F
002ADC 040012E8 8716+ DC AL1(L'SPTR0664),AL3(SPTR0664)
0012EC 8717+TEXT CSECT
PAGE 161
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0012EC F45CD3A75ED4E5C3 8718+SPTR0665 DC C'4*Lx;MVCL (1kb,pad)'
002AE0 8719+TDSCDAT CSECT
002AE0 8720+ DS 0F
002AE0 130012EC 8721+ DC AL1(L'SPTR0665),AL3(SPTR0665)
8722+*
004A84 8723+TDSCTBL CSECT
04A84 8724+T176TPTR EQU *
004A84 00002AC8 8725+ DC A(T176TDSC) enabled test
8726+*
008694 8727+TCODE CSECT
008698 8728+ DS 0D ensure double word alignment for test
008698 8729+T176 DS 0H 01650000
008698 90EC D00C 0000C 8730+ STM 14,12,12(13) SAVE REGISTERS 02950000
00869C 18CF 8731+ LR R12,R15 base register := entry address
08698 8732+ USING T176,R12 declare code base register
00869E 41B0 C02A 086C2 8733+ LA R11,T176L load loop target to R11
0086A2 58F0 C0C8 08760 8734+ L R15,=A(SAVETST) R15 := current save area
0086A6 50DF 0004 00004 8735+ ST R13,4(R15) set back pointer in current save area
0086AA 182D 8736+ LR R2,R13 remember callers save area
0086AC 18DF 8737+ LR R13,R15 setup current save area
0086AE 50D2 0008 00008 8738+ ST R13,8(R2) set forw pointer in callers save area
00000 8739+ USING TDSC,R1 declare TDSC base register
0086B2 58F0 1008 00008 8740+ L R15,TLRCNT load local repeat count to R15
8741+*
8742 *
8743 * use sequence
8744 * LR R2,R6 dest addr
8745 * LA R3,1024 dest length
8746 * LA R4,0 source addr == 0 !
8747 * LR R5,R9 source length == 0; setup pad byte
8748 * MVCL R2,R4
8749 *
0086B6 5860 C0CC 08764 8750 L R6,=A(PBUF4K1) get ptr to ptr
0086BA 5866 0000 00000 8751 L R6,0(R6) get ptr to BUF4K1
0086BE 5890 C0D0 08768 8752 L R9,=X'FF000000'
8753 T176L REPINSN LR,(R2,R6),LA,(R3,1024), X
LA,(R4,0),LR,(R5,R9), X
MVCL,(R2,R4)
8754+*
8755+* build from sublist &ALIST* a comma separated string &ARGS*
8756+*
8757+*
8758+*
8759+*
8760+*
8761+*
8762+*
8763+*
8764+*
8765+*
8766+*
8767+*
086C2 8768+T176L EQU *
8769+*
8770+*
PAGE 162
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
8771+* write a comment indicating what REPINSN does (if NOGEN in effect)
8772+*
8773+*,// REPINSN: do 10 times:
8774+*
8775+* MNOTE requires that ' is doubled for expanded variables
8776+* thus build &MASTR as a copy of '&ARGS with ' doubled
8777+*
8778+*
8779+*,// LR R2,R6
8780+*
8781+* MNOTE requires that ' is doubled for expanded variables
8782+* thus build &MASTR as a copy of '&ARGS with ' doubled
8783+*
8784+*
8785+*,// LA R3,1024
8786+*
8787+* MNOTE requires that ' is doubled for expanded variables
8788+* thus build &MASTR as a copy of '&ARGS with ' doubled
8789+*
8790+*
8791+*,// LA R4,0
8792+*
8793+* MNOTE requires that ' is doubled for expanded variables
8794+* thus build &MASTR as a copy of '&ARGS with ' doubled
8795+*
8796+*
8797+*,// LR R5,R9
8798+*
8799+* MNOTE requires that ' is doubled for expanded variables
8800+* thus build &MASTR as a copy of '&ARGS with ' doubled
8801+*
8802+*
8803+*,// MVCL R2,R4
8804+*
8805+* finally generate code: &ICNT copies of &CO1 ...
8806+*
0086C2 1826 8807+ LR R2,R6
0086C4 4130 0400 00400 8808+ LA R3,1024
0086C8 4140 0000 00000 8809+ LA R4,0
0086CC 1859 8810+ LR R5,R9
0086CE 0E24 8811+ MVCL R2,R4
0086D0 1826 8812+ LR R2,R6
0086D2 4130 0400 00400 8813+ LA R3,1024
0086D6 4140 0000 00000 8814+ LA R4,0
0086DA 1859 8815+ LR R5,R9
0086DC 0E24 8816+ MVCL R2,R4
0086DE 1826 8817+ LR R2,R6
0086E0 4130 0400 00400 8818+ LA R3,1024
0086E4 4140 0000 00000 8819+ LA R4,0
0086E8 1859 8820+ LR R5,R9
0086EA 0E24 8821+ MVCL R2,R4
0086EC 1826 8822+ LR R2,R6
0086EE 4130 0400 00400 8823+ LA R3,1024
0086F2 4140 0000 00000 8824+ LA R4,0
0086F6 1859 8825+ LR R5,R9
PAGE 163
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0086F8 0E24 8826+ MVCL R2,R4
0086FA 1826 8827+ LR R2,R6
0086FC 4130 0400 00400 8828+ LA R3,1024
008700 4140 0000 00000 8829+ LA R4,0
008704 1859 8830+ LR R5,R9
008706 0E24 8831+ MVCL R2,R4
008708 1826 8832+ LR R2,R6
00870A 4130 0400 00400 8833+ LA R3,1024
00870E 4140 0000 00000 8834+ LA R4,0
008712 1859 8835+ LR R5,R9
008714 0E24 8836+ MVCL R2,R4
008716 1826 8837+ LR R2,R6
008718 4130 0400 00400 8838+ LA R3,1024
00871C 4140 0000 00000 8839+ LA R4,0
008720 1859 8840+ LR R5,R9
008722 0E24 8841+ MVCL R2,R4
008724 1826 8842+ LR R2,R6
008726 4130 0400 00400 8843+ LA R3,1024
00872A 4140 0000 00000 8844+ LA R4,0
00872E 1859 8845+ LR R5,R9
008730 0E24 8846+ MVCL R2,R4
008732 1826 8847+ LR R2,R6
008734 4130 0400 00400 8848+ LA R3,1024
008738 4140 0000 00000 8849+ LA R4,0
00873C 1859 8850+ LR R5,R9
00873E 0E24 8851+ MVCL R2,R4
008740 1826 8852+ LR R2,R6
008742 4130 0400 00400 8853+ LA R3,1024
008746 4140 0000 00000 8854+ LA R4,0
00874A 1859 8855+ LR R5,R9
00874C 0E24 8856+ MVCL R2,R4
8857+*
00874E 06FB 8858 BCTR R15,R11
8859 TSIMRET
008750 58F0 C0C8 08760 8860+ L R15,=A(SAVETST) R15 := current save area
008754 58DF 0004 00004 8861+ L R13,4(R15) get old save area back
008758 98EC D00C 0000C 8862+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00875C 07FE 8863+ BR 14 RETURN 02000000
8864 TSIMEND
008760 8865+ LTORG
008760 00000458 8866 =A(SAVETST)
008764 000004B4 8867 =A(PBUF4K1)
008768 FF000000 8868 =X'FF000000'
0876C 8869+T176TEND EQU *
8870 *
8871 * Test 177 -- MVCL m,m (4kb,pad) ---------------------------
8872 *
8873 TSIMBEG T177,4500,10,1,C'4*Lx;MVCL (4kb,pad)'
8874+*
002AE4 8875+TDSCDAT CSECT
002AE8 8876+ DS 0D
8877+*
002AE8 00008770 8878+T177TDSC DC A(T177) // TENTRY
002AEC 000000C8 8879+ DC A(T177TEND-T177) // TLENGTH
002AF0 00001194 8880+ DC F'4500' // TLRCNT
PAGE 164
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002AF4 0000000A 8881+ DC F'10' // TIGCNT
002AF8 00000001 8882+ DC F'1' // TLTYPE
0012FF 8883+TEXT CSECT
0012FF E3F1F7F7 8884+SPTR0684 DC C'T177'
002AFC 8885+TDSCDAT CSECT
002AFC 8886+ DS 0F
002AFC 040012FF 8887+ DC AL1(L'SPTR0684),AL3(SPTR0684)
001303 8888+TEXT CSECT
001303 F45CD3A75ED4E5C3 8889+SPTR0685 DC C'4*Lx;MVCL (4kb,pad)'
002B00 8890+TDSCDAT CSECT
002B00 8891+ DS 0F
002B00 13001303 8892+ DC AL1(L'SPTR0685),AL3(SPTR0685)
8893+*
004A88 8894+TDSCTBL CSECT
04A88 8895+T177TPTR EQU *
004A88 00002AE8 8896+ DC A(T177TDSC) enabled test
8897+*
00876C 8898+TCODE CSECT
008770 8899+ DS 0D ensure double word alignment for test
008770 8900+T177 DS 0H 01650000
008770 90EC D00C 0000C 8901+ STM 14,12,12(13) SAVE REGISTERS 02950000
008774 18CF 8902+ LR R12,R15 base register := entry address
08770 8903+ USING T177,R12 declare code base register
008776 41B0 C02E 0879E 8904+ LA R11,T177L load loop target to R11
00877A 58F0 C0B8 08828 8905+ L R15,=A(SAVETST) R15 := current save area
00877E 50DF 0004 00004 8906+ ST R13,4(R15) set back pointer in current save area
008782 182D 8907+ LR R2,R13 remember callers save area
008784 18DF 8908+ LR R13,R15 setup current save area
008786 50D2 0008 00008 8909+ ST R13,8(R2) set forw pointer in callers save area
00000 8910+ USING TDSC,R1 declare TDSC base register
00878A 58F0 1008 00008 8911+ L R15,TLRCNT load local repeat count to R15
8912+*
8913 *
8914 * use sequence
8915 * LR R2,R6 dest addr
8916 * LR R3,R7 dest length
8917 * LA R4,0 source addr == 0 !
8918 * LR R5,R9 source length == 0; setup pad byte
8919 * MVCL R2,R4
8920 *
00878E 5860 C0BC 0882C 8921 L R6,=A(PBUF4K1) get ptr to ptr
008792 5866 0000 00000 8922 L R6,0(R6) get ptr to BUF4K1
008796 5870 C0C0 08830 8923 L R7,=F'4096'
00879A 5890 C0C4 08834 8924 L R9,=X'FF000000'
8925 T177L REPINSN LR,(R2,R6),LR,(R3,R7), X
LA,(R4,0),LR,(R5,R9), X
MVCL,(R2,R4)
8926+*
8927+* build from sublist &ALIST* a comma separated string &ARGS*
8928+*
8929+*
8930+*
8931+*
8932+*
8933+*
PAGE 165
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
8934+*
8935+*
8936+*
8937+*
8938+*
8939+*
0879E 8940+T177L EQU *
8941+*
8942+*
8943+* write a comment indicating what REPINSN does (if NOGEN in effect)
8944+*
8945+*,// REPINSN: do 10 times:
8946+*
8947+* MNOTE requires that ' is doubled for expanded variables
8948+* thus build &MASTR as a copy of '&ARGS with ' doubled
8949+*
8950+*
8951+*,// LR R2,R6
8952+*
8953+* MNOTE requires that ' is doubled for expanded variables
8954+* thus build &MASTR as a copy of '&ARGS with ' doubled
8955+*
8956+*
8957+*,// LR R3,R7
8958+*
8959+* MNOTE requires that ' is doubled for expanded variables
8960+* thus build &MASTR as a copy of '&ARGS with ' doubled
8961+*
8962+*
8963+*,// LA R4,0
8964+*
8965+* MNOTE requires that ' is doubled for expanded variables
8966+* thus build &MASTR as a copy of '&ARGS with ' doubled
8967+*
8968+*
8969+*,// LR R5,R9
8970+*
8971+* MNOTE requires that ' is doubled for expanded variables
8972+* thus build &MASTR as a copy of '&ARGS with ' doubled
8973+*
8974+*
8975+*,// MVCL R2,R4
8976+*
8977+* finally generate code: &ICNT copies of &CO1 ...
8978+*
00879E 1826 8979+ LR R2,R6
0087A0 1837 8980+ LR R3,R7
0087A2 4140 0000 00000 8981+ LA R4,0
0087A6 1859 8982+ LR R5,R9
0087A8 0E24 8983+ MVCL R2,R4
0087AA 1826 8984+ LR R2,R6
0087AC 1837 8985+ LR R3,R7
0087AE 4140 0000 00000 8986+ LA R4,0
0087B2 1859 8987+ LR R5,R9
0087B4 0E24 8988+ MVCL R2,R4
PAGE 166
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0087B6 1826 8989+ LR R2,R6
0087B8 1837 8990+ LR R3,R7
0087BA 4140 0000 00000 8991+ LA R4,0
0087BE 1859 8992+ LR R5,R9
0087C0 0E24 8993+ MVCL R2,R4
0087C2 1826 8994+ LR R2,R6
0087C4 1837 8995+ LR R3,R7
0087C6 4140 0000 00000 8996+ LA R4,0
0087CA 1859 8997+ LR R5,R9
0087CC 0E24 8998+ MVCL R2,R4
0087CE 1826 8999+ LR R2,R6
0087D0 1837 9000+ LR R3,R7
0087D2 4140 0000 00000 9001+ LA R4,0
0087D6 1859 9002+ LR R5,R9
0087D8 0E24 9003+ MVCL R2,R4
0087DA 1826 9004+ LR R2,R6
0087DC 1837 9005+ LR R3,R7
0087DE 4140 0000 00000 9006+ LA R4,0
0087E2 1859 9007+ LR R5,R9
0087E4 0E24 9008+ MVCL R2,R4
0087E6 1826 9009+ LR R2,R6
0087E8 1837 9010+ LR R3,R7
0087EA 4140 0000 00000 9011+ LA R4,0
0087EE 1859 9012+ LR R5,R9
0087F0 0E24 9013+ MVCL R2,R4
0087F2 1826 9014+ LR R2,R6
0087F4 1837 9015+ LR R3,R7
0087F6 4140 0000 00000 9016+ LA R4,0
0087FA 1859 9017+ LR R5,R9
0087FC 0E24 9018+ MVCL R2,R4
0087FE 1826 9019+ LR R2,R6
008800 1837 9020+ LR R3,R7
008802 4140 0000 00000 9021+ LA R4,0
008806 1859 9022+ LR R5,R9
008808 0E24 9023+ MVCL R2,R4
00880A 1826 9024+ LR R2,R6
00880C 1837 9025+ LR R3,R7
00880E 4140 0000 00000 9026+ LA R4,0
008812 1859 9027+ LR R5,R9
008814 0E24 9028+ MVCL R2,R4
9029+*
008816 06FB 9030 BCTR R15,R11
9031 TSIMRET
008818 58F0 C0B8 08828 9032+ L R15,=A(SAVETST) R15 := current save area
00881C 58DF 0004 00004 9033+ L R13,4(R15) get old save area back
008820 98EC D00C 0000C 9034+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
008824 07FE 9035+ BR 14 RETURN 02000000
9036 TSIMEND
008828 9037+ LTORG
008828 00000458 9038 =A(SAVETST)
00882C 000004B4 9039 =A(PBUF4K1)
008830 00001000 9040 =F'4096'
008834 FF000000 9041 =X'FF000000'
08838 9042+T177TEND EQU *
9043 *
PAGE 167
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
9044 * Test 178 -- MVCL m,m (1kb,over1) -------------------------
9045 * test byte propagation usage of MVCL
9046 * destination offset by + 1 byte to source
9047 *
9048 TSIMBEG T178,21000,10,1,C'4*LA;MVCL (1kb,over1)'
9049+*
002B04 9050+TDSCDAT CSECT
002B08 9051+ DS 0D
9052+*
002B08 00008838 9053+T178TDSC DC A(T178) // TENTRY
002B0C 000004EC 9054+ DC A(T178TEND-T178) // TLENGTH
002B10 00005208 9055+ DC F'21000' // TLRCNT
002B14 0000000A 9056+ DC F'10' // TIGCNT
002B18 00000001 9057+ DC F'1' // TLTYPE
001316 9058+TEXT CSECT
001316 E3F1F7F8 9059+SPTR0704 DC C'T178'
002B1C 9060+TDSCDAT CSECT
002B1C 9061+ DS 0F
002B1C 04001316 9062+ DC AL1(L'SPTR0704),AL3(SPTR0704)
00131A 9063+TEXT CSECT
00131A F45CD3C15ED4E5C3 9064+SPTR0705 DC C'4*LA;MVCL (1kb,over1)'
002B20 9065+TDSCDAT CSECT
002B20 9066+ DS 0F
002B20 1500131A 9067+ DC AL1(L'SPTR0705),AL3(SPTR0705)
9068+*
004A8C 9069+TDSCTBL CSECT
04A8C 9070+T178TPTR EQU *
004A8C 00002B08 9071+ DC A(T178TDSC) enabled test
9072+*
008838 9073+TCODE CSECT
008838 9074+ DS 0D ensure double word alignment for test
008838 9075+T178 DS 0H 01650000
008838 90EC D00C 0000C 9076+ STM 14,12,12(13) SAVE REGISTERS 02950000
00883C 18CF 9077+ LR R12,R15 base register := entry address
08838 9078+ USING T178,R12 declare code base register
00883E 41B0 C01E 08856 9079+ LA R11,T178L load loop target to R11
008842 58F0 C4E8 08D20 9080+ L R15,=A(SAVETST) R15 := current save area
008846 50DF 0004 00004 9081+ ST R13,4(R15) set back pointer in current save area
00884A 182D 9082+ LR R2,R13 remember callers save area
00884C 18DF 9083+ LR R13,R15 setup current save area
00884E 50D2 0008 00008 9084+ ST R13,8(R2) set forw pointer in callers save area
00000 9085+ USING TDSC,R1 declare TDSC base register
008852 58F0 1008 00008 9086+ L R15,TLRCNT load local repeat count to R15
9087+*
9088 *
9089 * use sequence
9090 * LA R2,T178V2 dest addr
9091 * LA R3,1024 dest length
9092 * LA R4,T178V1 source addr
9093 * LA R5,1024 source length
9094 * MVCL R2,R4
9095 *
9096 T178L REPINSN LA,(R2,T178V2),LA,(R3,1024), X
LA,(R4,T178V1),LA,(R5,1024), X
MVCL,(R2,R4)
PAGE 168
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
9097+*
9098+* build from sublist &ALIST* a comma separated string &ARGS*
9099+*
9100+*
9101+*
9102+*
9103+*
9104+*
9105+*
9106+*
9107+*
9108+*
9109+*
9110+*
08856 9111+T178L EQU *
9112+*
9113+*
9114+* write a comment indicating what REPINSN does (if NOGEN in effect)
9115+*
9116+*,// REPINSN: do 10 times:
9117+*
9118+* MNOTE requires that ' is doubled for expanded variables
9119+* thus build &MASTR as a copy of '&ARGS with ' doubled
9120+*
9121+*
9122+*,// LA R2,T178V2
9123+*
9124+* MNOTE requires that ' is doubled for expanded variables
9125+* thus build &MASTR as a copy of '&ARGS with ' doubled
9126+*
9127+*
9128+*,// LA R3,1024
9129+*
9130+* MNOTE requires that ' is doubled for expanded variables
9131+* thus build &MASTR as a copy of '&ARGS with ' doubled
9132+*
9133+*
9134+*,// LA R4,T178V1
9135+*
9136+* MNOTE requires that ' is doubled for expanded variables
9137+* thus build &MASTR as a copy of '&ARGS with ' doubled
9138+*
9139+*
9140+*,// LA R5,1024
9141+*
9142+* MNOTE requires that ' is doubled for expanded variables
9143+* thus build &MASTR as a copy of '&ARGS with ' doubled
9144+*
9145+*
9146+*,// MVCL R2,R4
9147+*
9148+* finally generate code: &ICNT copies of &CO1 ...
9149+*
008856 4120 C0E3 0891B 9150+ LA R2,T178V2
00885A 4130 0400 00400 9151+ LA R3,1024
PAGE 169
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00885E 4140 C0E2 0891A 9152+ LA R4,T178V1
008862 4150 0400 00400 9153+ LA R5,1024
008866 0E24 9154+ MVCL R2,R4
008868 4120 C0E3 0891B 9155+ LA R2,T178V2
00886C 4130 0400 00400 9156+ LA R3,1024
008870 4140 C0E2 0891A 9157+ LA R4,T178V1
008874 4150 0400 00400 9158+ LA R5,1024
008878 0E24 9159+ MVCL R2,R4
00887A 4120 C0E3 0891B 9160+ LA R2,T178V2
00887E 4130 0400 00400 9161+ LA R3,1024
008882 4140 C0E2 0891A 9162+ LA R4,T178V1
008886 4150 0400 00400 9163+ LA R5,1024
00888A 0E24 9164+ MVCL R2,R4
00888C 4120 C0E3 0891B 9165+ LA R2,T178V2
008890 4130 0400 00400 9166+ LA R3,1024
008894 4140 C0E2 0891A 9167+ LA R4,T178V1
008898 4150 0400 00400 9168+ LA R5,1024
00889C 0E24 9169+ MVCL R2,R4
00889E 4120 C0E3 0891B 9170+ LA R2,T178V2
0088A2 4130 0400 00400 9171+ LA R3,1024
0088A6 4140 C0E2 0891A 9172+ LA R4,T178V1
0088AA 4150 0400 00400 9173+ LA R5,1024
0088AE 0E24 9174+ MVCL R2,R4
0088B0 4120 C0E3 0891B 9175+ LA R2,T178V2
0088B4 4130 0400 00400 9176+ LA R3,1024
0088B8 4140 C0E2 0891A 9177+ LA R4,T178V1
0088BC 4150 0400 00400 9178+ LA R5,1024
0088C0 0E24 9179+ MVCL R2,R4
0088C2 4120 C0E3 0891B 9180+ LA R2,T178V2
0088C6 4130 0400 00400 9181+ LA R3,1024
0088CA 4140 C0E2 0891A 9182+ LA R4,T178V1
0088CE 4150 0400 00400 9183+ LA R5,1024
0088D2 0E24 9184+ MVCL R2,R4
0088D4 4120 C0E3 0891B 9185+ LA R2,T178V2
0088D8 4130 0400 00400 9186+ LA R3,1024
0088DC 4140 C0E2 0891A 9187+ LA R4,T178V1
0088E0 4150 0400 00400 9188+ LA R5,1024
0088E4 0E24 9189+ MVCL R2,R4
0088E6 4120 C0E3 0891B 9190+ LA R2,T178V2
0088EA 4130 0400 00400 9191+ LA R3,1024
0088EE 4140 C0E2 0891A 9192+ LA R4,T178V1
0088F2 4150 0400 00400 9193+ LA R5,1024
0088F6 0E24 9194+ MVCL R2,R4
0088F8 4120 C0E3 0891B 9195+ LA R2,T178V2
0088FC 4130 0400 00400 9196+ LA R3,1024
008900 4140 C0E2 0891A 9197+ LA R4,T178V1
008904 4150 0400 00400 9198+ LA R5,1024
008908 0E24 9199+ MVCL R2,R4
9200+*
00890A 06FB 9201 BCTR R15,R11
9202 TSIMRET
00890C 58F0 C4E8 08D20 9203+ L R15,=A(SAVETST) R15 := current save area
008910 58DF 0004 00004 9204+ L R13,4(R15) get old save area back
008914 98EC D00C 0000C 9205+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
008918 07FE 9206+ BR 14 RETURN 02000000
PAGE 170
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
9207 *
00891A E7 9208 T178V1 DC C'X' byte to propagate
00891B 9209 T178V2 DS 1024C into this target buffer
9210 TSIMEND
008D20 9211+ LTORG
008D20 00000458 9212 =A(SAVETST)
08D24 9213+T178TEND EQU *
9214 *
9215 * Test 179 -- MVCL m,m (1kb,over2) -------------------------
9216 * test buffer shift left usage of MVCL
9217 * destination offset by -100 byte to source
9218 *
9219 TSIMBEG T179,4000,10,1,C'4*LA;MVCL (1kb,over2)'
9220+*
002B24 9221+TDSCDAT CSECT
002B28 9222+ DS 0D
9223+*
002B28 00008D28 9224+T179TDSC DC A(T179) // TENTRY
002B2C 0000054C 9225+ DC A(T179TEND-T179) // TLENGTH
002B30 00000FA0 9226+ DC F'4000' // TLRCNT
002B34 0000000A 9227+ DC F'10' // TIGCNT
002B38 00000001 9228+ DC F'1' // TLTYPE
00132F 9229+TEXT CSECT
00132F E3F1F7F9 9230+SPTR0724 DC C'T179'
002B3C 9231+TDSCDAT CSECT
002B3C 9232+ DS 0F
002B3C 0400132F 9233+ DC AL1(L'SPTR0724),AL3(SPTR0724)
001333 9234+TEXT CSECT
001333 F45CD3C15ED4E5C3 9235+SPTR0725 DC C'4*LA;MVCL (1kb,over2)'
002B40 9236+TDSCDAT CSECT
002B40 9237+ DS 0F
002B40 15001333 9238+ DC AL1(L'SPTR0725),AL3(SPTR0725)
9239+*
004A90 9240+TDSCTBL CSECT
04A90 9241+T179TPTR EQU *
004A90 00002B28 9242+ DC A(T179TDSC) enabled test
9243+*
008D24 9244+TCODE CSECT
008D28 9245+ DS 0D ensure double word alignment for test
008D28 9246+T179 DS 0H 01650000
008D28 90EC D00C 0000C 9247+ STM 14,12,12(13) SAVE REGISTERS 02950000
008D2C 18CF 9248+ LR R12,R15 base register := entry address
08D28 9249+ USING T179,R12 declare code base register
008D2E 41B0 C01E 08D46 9250+ LA R11,T179L load loop target to R11
008D32 58F0 C548 09270 9251+ L R15,=A(SAVETST) R15 := current save area
008D36 50DF 0004 00004 9252+ ST R13,4(R15) set back pointer in current save area
008D3A 182D 9253+ LR R2,R13 remember callers save area
008D3C 18DF 9254+ LR R13,R15 setup current save area
008D3E 50D2 0008 00008 9255+ ST R13,8(R2) set forw pointer in callers save area
00000 9256+ USING TDSC,R1 declare TDSC base register
008D42 58F0 1008 00008 9257+ L R15,TLRCNT load local repeat count to R15
9258+*
9259 *
9260 * use sequence
9261 * LA R2,T179V1 dest addr
PAGE 171
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
9262 * LA R3,1024 dest length
9263 * LA R4,T179V2 source addr
9264 * LA R5,1024 source length
9265 * MVCL R2,R4
9266 *
9267 T179L REPINSN LA,(R2,T179V1),LA,(R3,1024), X
LA,(R4,T179V2),LA,(R5,1024), X
MVCL,(R2,R4)
9268+*
9269+* build from sublist &ALIST* a comma separated string &ARGS*
9270+*
9271+*
9272+*
9273+*
9274+*
9275+*
9276+*
9277+*
9278+*
9279+*
9280+*
9281+*
08D46 9282+T179L EQU *
9283+*
9284+*
9285+* write a comment indicating what REPINSN does (if NOGEN in effect)
9286+*
9287+*,// REPINSN: do 10 times:
9288+*
9289+* MNOTE requires that ' is doubled for expanded variables
9290+* thus build &MASTR as a copy of '&ARGS with ' doubled
9291+*
9292+*
9293+*,// LA R2,T179V1
9294+*
9295+* MNOTE requires that ' is doubled for expanded variables
9296+* thus build &MASTR as a copy of '&ARGS with ' doubled
9297+*
9298+*
9299+*,// LA R3,1024
9300+*
9301+* MNOTE requires that ' is doubled for expanded variables
9302+* thus build &MASTR as a copy of '&ARGS with ' doubled
9303+*
9304+*
9305+*,// LA R4,T179V2
9306+*
9307+* MNOTE requires that ' is doubled for expanded variables
9308+* thus build &MASTR as a copy of '&ARGS with ' doubled
9309+*
9310+*
9311+*,// LA R5,1024
9312+*
9313+* MNOTE requires that ' is doubled for expanded variables
9314+* thus build &MASTR as a copy of '&ARGS with ' doubled
PAGE 172
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
9315+*
9316+*
9317+*,// MVCL R2,R4
9318+*
9319+* finally generate code: &ICNT copies of &CO1 ...
9320+*
008D46 4120 C0E2 08E0A 9321+ LA R2,T179V1
008D4A 4130 0400 00400 9322+ LA R3,1024
008D4E 4140 C146 08E6E 9323+ LA R4,T179V2
008D52 4150 0400 00400 9324+ LA R5,1024
008D56 0E24 9325+ MVCL R2,R4
008D58 4120 C0E2 08E0A 9326+ LA R2,T179V1
008D5C 4130 0400 00400 9327+ LA R3,1024
008D60 4140 C146 08E6E 9328+ LA R4,T179V2
008D64 4150 0400 00400 9329+ LA R5,1024
008D68 0E24 9330+ MVCL R2,R4
008D6A 4120 C0E2 08E0A 9331+ LA R2,T179V1
008D6E 4130 0400 00400 9332+ LA R3,1024
008D72 4140 C146 08E6E 9333+ LA R4,T179V2
008D76 4150 0400 00400 9334+ LA R5,1024
008D7A 0E24 9335+ MVCL R2,R4
008D7C 4120 C0E2 08E0A 9336+ LA R2,T179V1
008D80 4130 0400 00400 9337+ LA R3,1024
008D84 4140 C146 08E6E 9338+ LA R4,T179V2
008D88 4150 0400 00400 9339+ LA R5,1024
008D8C 0E24 9340+ MVCL R2,R4
008D8E 4120 C0E2 08E0A 9341+ LA R2,T179V1
008D92 4130 0400 00400 9342+ LA R3,1024
008D96 4140 C146 08E6E 9343+ LA R4,T179V2
008D9A 4150 0400 00400 9344+ LA R5,1024
008D9E 0E24 9345+ MVCL R2,R4
008DA0 4120 C0E2 08E0A 9346+ LA R2,T179V1
008DA4 4130 0400 00400 9347+ LA R3,1024
008DA8 4140 C146 08E6E 9348+ LA R4,T179V2
008DAC 4150 0400 00400 9349+ LA R5,1024
008DB0 0E24 9350+ MVCL R2,R4
008DB2 4120 C0E2 08E0A 9351+ LA R2,T179V1
008DB6 4130 0400 00400 9352+ LA R3,1024
008DBA 4140 C146 08E6E 9353+ LA R4,T179V2
008DBE 4150 0400 00400 9354+ LA R5,1024
008DC2 0E24 9355+ MVCL R2,R4
008DC4 4120 C0E2 08E0A 9356+ LA R2,T179V1
008DC8 4130 0400 00400 9357+ LA R3,1024
008DCC 4140 C146 08E6E 9358+ LA R4,T179V2
008DD0 4150 0400 00400 9359+ LA R5,1024
008DD4 0E24 9360+ MVCL R2,R4
008DD6 4120 C0E2 08E0A 9361+ LA R2,T179V1
008DDA 4130 0400 00400 9362+ LA R3,1024
008DDE 4140 C146 08E6E 9363+ LA R4,T179V2
008DE2 4150 0400 00400 9364+ LA R5,1024
008DE6 0E24 9365+ MVCL R2,R4
008DE8 4120 C0E2 08E0A 9366+ LA R2,T179V1
008DEC 4130 0400 00400 9367+ LA R3,1024
008DF0 4140 C146 08E6E 9368+ LA R4,T179V2
008DF4 4150 0400 00400 9369+ LA R5,1024
PAGE 173
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
008DF8 0E24 9370+ MVCL R2,R4
9371+*
008DFA 06FB 9372 BCTR R15,R11
9373 TSIMRET
008DFC 58F0 C548 09270 9374+ L R15,=A(SAVETST) R15 := current save area
008E00 58DF 0004 00004 9375+ L R13,4(R15) get old save area back
008E04 98EC D00C 0000C 9376+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
008E08 07FE 9377+ BR 14 RETURN 02000000
9378 *
008E0A 9379 T179V1 DS 100C target
008E6E 9380 T179V2 DS 1024C source (1/10th overlap)
9381 TSIMEND
009270 9382+ LTORG
009270 00000458 9383 =A(SAVETST)
09274 9384+T179TEND EQU *
9385 *
9386 * Test 19x -- IC ===========================================
9387 *
9388 * Test 190 -- IC R,m ---------------------------------------
9389 *
9390 TSIMBEG T190,6000,100,1,C'IC R,m'
9391+*
002B44 9392+TDSCDAT CSECT
002B48 9393+ DS 0D
9394+*
002B48 00009278 9395+T190TDSC DC A(T190) // TENTRY
002B4C 000001CC 9396+ DC A(T190TEND-T190) // TLENGTH
002B50 00001770 9397+ DC F'6000' // TLRCNT
002B54 00000064 9398+ DC F'100' // TIGCNT
002B58 00000001 9399+ DC F'1' // TLTYPE
001348 9400+TEXT CSECT
001348 E3F1F9F0 9401+SPTR0744 DC C'T190'
002B5C 9402+TDSCDAT CSECT
002B5C 9403+ DS 0F
002B5C 04001348 9404+ DC AL1(L'SPTR0744),AL3(SPTR0744)
00134C 9405+TEXT CSECT
00134C C9C340D96B94 9406+SPTR0745 DC C'IC R,m'
002B60 9407+TDSCDAT CSECT
002B60 9408+ DS 0F
002B60 0600134C 9409+ DC AL1(L'SPTR0745),AL3(SPTR0745)
9410+*
004A94 9411+TDSCTBL CSECT
04A94 9412+T190TPTR EQU *
004A94 00002B48 9413+ DC A(T190TDSC) enabled test
9414+*
009274 9415+TCODE CSECT
009278 9416+ DS 0D ensure double word alignment for test
009278 9417+T190 DS 0H 01650000
009278 90EC D00C 0000C 9418+ STM 14,12,12(13) SAVE REGISTERS 02950000
00927C 18CF 9419+ LR R12,R15 base register := entry address
09278 9420+ USING T190,R12 declare code base register
00927E 41B0 C020 09298 9421+ LA R11,T190L load loop target to R11
009282 58F0 C1C8 09440 9422+ L R15,=A(SAVETST) R15 := current save area
009286 50DF 0004 00004 9423+ ST R13,4(R15) set back pointer in current save area
00928A 182D 9424+ LR R2,R13 remember callers save area
PAGE 174
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00928C 18DF 9425+ LR R13,R15 setup current save area
00928E 50D2 0008 00008 9426+ ST R13,8(R2) set forw pointer in callers save area
00000 9427+ USING TDSC,R1 declare TDSC base register
009292 58F0 1008 00008 9428+ L R15,TLRCNT load local repeat count to R15
9429+*
9430 *
009296 1722 9431 XR R2,R2
9432 T190L REPINS IC,(R2,T190V1) repeat: IC R2,T190V1
9433+*
9434+* build from sublist &ALIST a comma separated string &ARGS
9435+*
9436+*
9437+*
9438+*
9439+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
9440+* this allows to transfer the repeat count from last TDSCGEN call
9441+*
9442+*
09298 9443+T190L EQU *
9444+*
9445+* write a comment indicating what REPINS does (in case NOGEN in effect)
9446+*
9447+*,// REPINS: do 100 times:
9448+*
9449+* MNOTE requires that ' is doubled for expanded variables
9450+* thus build &MASTR as a copy of '&ARGS with ' doubled
9451+*
9452+*
9453+*,// IC R2,T190V1
9454+*
9455+* finally generate code: &ICNT copies of &CODE &ARGS
9456+*
009298 4320 C1C0 09438 9457+ IC R2,T190V1
00929C 4320 C1C0 09438 9458+ IC R2,T190V1
0092A0 4320 C1C0 09438 9459+ IC R2,T190V1
0092A4 4320 C1C0 09438 9460+ IC R2,T190V1
0092A8 4320 C1C0 09438 9461+ IC R2,T190V1
0092AC 4320 C1C0 09438 9462+ IC R2,T190V1
0092B0 4320 C1C0 09438 9463+ IC R2,T190V1
0092B4 4320 C1C0 09438 9464+ IC R2,T190V1
0092B8 4320 C1C0 09438 9465+ IC R2,T190V1
0092BC 4320 C1C0 09438 9466+ IC R2,T190V1
0092C0 4320 C1C0 09438 9467+ IC R2,T190V1
0092C4 4320 C1C0 09438 9468+ IC R2,T190V1
0092C8 4320 C1C0 09438 9469+ IC R2,T190V1
0092CC 4320 C1C0 09438 9470+ IC R2,T190V1
0092D0 4320 C1C0 09438 9471+ IC R2,T190V1
0092D4 4320 C1C0 09438 9472+ IC R2,T190V1
0092D8 4320 C1C0 09438 9473+ IC R2,T190V1
0092DC 4320 C1C0 09438 9474+ IC R2,T190V1
0092E0 4320 C1C0 09438 9475+ IC R2,T190V1
0092E4 4320 C1C0 09438 9476+ IC R2,T190V1
0092E8 4320 C1C0 09438 9477+ IC R2,T190V1
0092EC 4320 C1C0 09438 9478+ IC R2,T190V1
0092F0 4320 C1C0 09438 9479+ IC R2,T190V1
PAGE 175
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0092F4 4320 C1C0 09438 9480+ IC R2,T190V1
0092F8 4320 C1C0 09438 9481+ IC R2,T190V1
0092FC 4320 C1C0 09438 9482+ IC R2,T190V1
009300 4320 C1C0 09438 9483+ IC R2,T190V1
009304 4320 C1C0 09438 9484+ IC R2,T190V1
009308 4320 C1C0 09438 9485+ IC R2,T190V1
00930C 4320 C1C0 09438 9486+ IC R2,T190V1
009310 4320 C1C0 09438 9487+ IC R2,T190V1
009314 4320 C1C0 09438 9488+ IC R2,T190V1
009318 4320 C1C0 09438 9489+ IC R2,T190V1
00931C 4320 C1C0 09438 9490+ IC R2,T190V1
009320 4320 C1C0 09438 9491+ IC R2,T190V1
009324 4320 C1C0 09438 9492+ IC R2,T190V1
009328 4320 C1C0 09438 9493+ IC R2,T190V1
00932C 4320 C1C0 09438 9494+ IC R2,T190V1
009330 4320 C1C0 09438 9495+ IC R2,T190V1
009334 4320 C1C0 09438 9496+ IC R2,T190V1
009338 4320 C1C0 09438 9497+ IC R2,T190V1
00933C 4320 C1C0 09438 9498+ IC R2,T190V1
009340 4320 C1C0 09438 9499+ IC R2,T190V1
009344 4320 C1C0 09438 9500+ IC R2,T190V1
009348 4320 C1C0 09438 9501+ IC R2,T190V1
00934C 4320 C1C0 09438 9502+ IC R2,T190V1
009350 4320 C1C0 09438 9503+ IC R2,T190V1
009354 4320 C1C0 09438 9504+ IC R2,T190V1
009358 4320 C1C0 09438 9505+ IC R2,T190V1
00935C 4320 C1C0 09438 9506+ IC R2,T190V1
009360 4320 C1C0 09438 9507+ IC R2,T190V1
009364 4320 C1C0 09438 9508+ IC R2,T190V1
009368 4320 C1C0 09438 9509+ IC R2,T190V1
00936C 4320 C1C0 09438 9510+ IC R2,T190V1
009370 4320 C1C0 09438 9511+ IC R2,T190V1
009374 4320 C1C0 09438 9512+ IC R2,T190V1
009378 4320 C1C0 09438 9513+ IC R2,T190V1
00937C 4320 C1C0 09438 9514+ IC R2,T190V1
009380 4320 C1C0 09438 9515+ IC R2,T190V1
009384 4320 C1C0 09438 9516+ IC R2,T190V1
009388 4320 C1C0 09438 9517+ IC R2,T190V1
00938C 4320 C1C0 09438 9518+ IC R2,T190V1
009390 4320 C1C0 09438 9519+ IC R2,T190V1
009394 4320 C1C0 09438 9520+ IC R2,T190V1
009398 4320 C1C0 09438 9521+ IC R2,T190V1
00939C 4320 C1C0 09438 9522+ IC R2,T190V1
0093A0 4320 C1C0 09438 9523+ IC R2,T190V1
0093A4 4320 C1C0 09438 9524+ IC R2,T190V1
0093A8 4320 C1C0 09438 9525+ IC R2,T190V1
0093AC 4320 C1C0 09438 9526+ IC R2,T190V1
0093B0 4320 C1C0 09438 9527+ IC R2,T190V1
0093B4 4320 C1C0 09438 9528+ IC R2,T190V1
0093B8 4320 C1C0 09438 9529+ IC R2,T190V1
0093BC 4320 C1C0 09438 9530+ IC R2,T190V1
0093C0 4320 C1C0 09438 9531+ IC R2,T190V1
0093C4 4320 C1C0 09438 9532+ IC R2,T190V1
0093C8 4320 C1C0 09438 9533+ IC R2,T190V1
0093CC 4320 C1C0 09438 9534+ IC R2,T190V1
PAGE 176
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0093D0 4320 C1C0 09438 9535+ IC R2,T190V1
0093D4 4320 C1C0 09438 9536+ IC R2,T190V1
0093D8 4320 C1C0 09438 9537+ IC R2,T190V1
0093DC 4320 C1C0 09438 9538+ IC R2,T190V1
0093E0 4320 C1C0 09438 9539+ IC R2,T190V1
0093E4 4320 C1C0 09438 9540+ IC R2,T190V1
0093E8 4320 C1C0 09438 9541+ IC R2,T190V1
0093EC 4320 C1C0 09438 9542+ IC R2,T190V1
0093F0 4320 C1C0 09438 9543+ IC R2,T190V1
0093F4 4320 C1C0 09438 9544+ IC R2,T190V1
0093F8 4320 C1C0 09438 9545+ IC R2,T190V1
0093FC 4320 C1C0 09438 9546+ IC R2,T190V1
009400 4320 C1C0 09438 9547+ IC R2,T190V1
009404 4320 C1C0 09438 9548+ IC R2,T190V1
009408 4320 C1C0 09438 9549+ IC R2,T190V1
00940C 4320 C1C0 09438 9550+ IC R2,T190V1
009410 4320 C1C0 09438 9551+ IC R2,T190V1
009414 4320 C1C0 09438 9552+ IC R2,T190V1
009418 4320 C1C0 09438 9553+ IC R2,T190V1
00941C 4320 C1C0 09438 9554+ IC R2,T190V1
009420 4320 C1C0 09438 9555+ IC R2,T190V1
009424 4320 C1C0 09438 9556+ IC R2,T190V1
9557+*
009428 06FB 9558 BCTR R15,R11
9559 TSIMRET
00942A 58F0 C1C8 09440 9560+ L R15,=A(SAVETST) R15 := current save area
00942E 58DF 0004 00004 9561+ L R13,4(R15) get old save area back
009432 98EC D00C 0000C 9562+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
009436 07FE 9563+ BR 14 RETURN 02000000
9564 *
009438 40 9565 T190V1 DC C' '
9566 TSIMEND
009440 9567+ LTORG
009440 00000458 9568 =A(SAVETST)
09444 9569+T190TEND EQU *
9570 *
9571 * Test 191 -- ICM R,m (1c) ---------------------------------
9572 *
9573 TSIMBEG T191,3000,100,1,C'ICM R,i,m (0010)'
9574+*
002B64 9575+TDSCDAT CSECT
002B68 9576+ DS 0D
9577+*
002B68 00009448 9578+T191TDSC DC A(T191) // TENTRY
002B6C 000001CC 9579+ DC A(T191TEND-T191) // TLENGTH
002B70 00000BB8 9580+ DC F'3000' // TLRCNT
002B74 00000064 9581+ DC F'100' // TIGCNT
002B78 00000001 9582+ DC F'1' // TLTYPE
001352 9583+TEXT CSECT
001352 E3F1F9F1 9584+SPTR0756 DC C'T191'
002B7C 9585+TDSCDAT CSECT
002B7C 9586+ DS 0F
002B7C 04001352 9587+ DC AL1(L'SPTR0756),AL3(SPTR0756)
001356 9588+TEXT CSECT
001356 C9C3D440D96B896B 9589+SPTR0757 DC C'ICM R,i,m (0010)'
PAGE 177
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002B80 9590+TDSCDAT CSECT
002B80 9591+ DS 0F
002B80 10001356 9592+ DC AL1(L'SPTR0757),AL3(SPTR0757)
9593+*
004A98 9594+TDSCTBL CSECT
04A98 9595+T191TPTR EQU *
004A98 00002B68 9596+ DC A(T191TDSC) enabled test
9597+*
009444 9598+TCODE CSECT
009448 9599+ DS 0D ensure double word alignment for test
009448 9600+T191 DS 0H 01650000
009448 90EC D00C 0000C 9601+ STM 14,12,12(13) SAVE REGISTERS 02950000
00944C 18CF 9602+ LR R12,R15 base register := entry address
09448 9603+ USING T191,R12 declare code base register
00944E 41B0 C020 09468 9604+ LA R11,T191L load loop target to R11
009452 58F0 C1C8 09610 9605+ L R15,=A(SAVETST) R15 := current save area
009456 50DF 0004 00004 9606+ ST R13,4(R15) set back pointer in current save area
00945A 182D 9607+ LR R2,R13 remember callers save area
00945C 18DF 9608+ LR R13,R15 setup current save area
00945E 50D2 0008 00008 9609+ ST R13,8(R2) set forw pointer in callers save area
00000 9610+ USING TDSC,R1 declare TDSC base register
009462 58F0 1008 00008 9611+ L R15,TLRCNT load local repeat count to R15
9612+*
9613 *
009466 1722 9614 XR R2,R2
9615 T191L REPINS ICM,(R2,B'0010',T191V1) repeat: ICM R2,B'0010',T191V1
9616+*
9617+* build from sublist &ALIST a comma separated string &ARGS
9618+*
9619+*
9620+*
9621+*
9622+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
9623+* this allows to transfer the repeat count from last TDSCGEN call
9624+*
9625+*
09468 9626+T191L EQU *
9627+*
9628+* write a comment indicating what REPINS does (in case NOGEN in effect)
9629+*
9630+*,// REPINS: do 100 times:
9631+*
9632+* MNOTE requires that ' is doubled for expanded variables
9633+* thus build &MASTR as a copy of '&ARGS with ' doubled
9634+*
9635+*
9636+*,// ICM R2,B'0010',T191V1
9637+*
9638+* finally generate code: &ICNT copies of &CODE &ARGS
9639+*
009468 BF22 C1C0 09608 9640+ ICM R2,B'0010',T191V1
00946C BF22 C1C0 09608 9641+ ICM R2,B'0010',T191V1
009470 BF22 C1C0 09608 9642+ ICM R2,B'0010',T191V1
009474 BF22 C1C0 09608 9643+ ICM R2,B'0010',T191V1
009478 BF22 C1C0 09608 9644+ ICM R2,B'0010',T191V1
PAGE 178
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00947C BF22 C1C0 09608 9645+ ICM R2,B'0010',T191V1
009480 BF22 C1C0 09608 9646+ ICM R2,B'0010',T191V1
009484 BF22 C1C0 09608 9647+ ICM R2,B'0010',T191V1
009488 BF22 C1C0 09608 9648+ ICM R2,B'0010',T191V1
00948C BF22 C1C0 09608 9649+ ICM R2,B'0010',T191V1
009490 BF22 C1C0 09608 9650+ ICM R2,B'0010',T191V1
009494 BF22 C1C0 09608 9651+ ICM R2,B'0010',T191V1
009498 BF22 C1C0 09608 9652+ ICM R2,B'0010',T191V1
00949C BF22 C1C0 09608 9653+ ICM R2,B'0010',T191V1
0094A0 BF22 C1C0 09608 9654+ ICM R2,B'0010',T191V1
0094A4 BF22 C1C0 09608 9655+ ICM R2,B'0010',T191V1
0094A8 BF22 C1C0 09608 9656+ ICM R2,B'0010',T191V1
0094AC BF22 C1C0 09608 9657+ ICM R2,B'0010',T191V1
0094B0 BF22 C1C0 09608 9658+ ICM R2,B'0010',T191V1
0094B4 BF22 C1C0 09608 9659+ ICM R2,B'0010',T191V1
0094B8 BF22 C1C0 09608 9660+ ICM R2,B'0010',T191V1
0094BC BF22 C1C0 09608 9661+ ICM R2,B'0010',T191V1
0094C0 BF22 C1C0 09608 9662+ ICM R2,B'0010',T191V1
0094C4 BF22 C1C0 09608 9663+ ICM R2,B'0010',T191V1
0094C8 BF22 C1C0 09608 9664+ ICM R2,B'0010',T191V1
0094CC BF22 C1C0 09608 9665+ ICM R2,B'0010',T191V1
0094D0 BF22 C1C0 09608 9666+ ICM R2,B'0010',T191V1
0094D4 BF22 C1C0 09608 9667+ ICM R2,B'0010',T191V1
0094D8 BF22 C1C0 09608 9668+ ICM R2,B'0010',T191V1
0094DC BF22 C1C0 09608 9669+ ICM R2,B'0010',T191V1
0094E0 BF22 C1C0 09608 9670+ ICM R2,B'0010',T191V1
0094E4 BF22 C1C0 09608 9671+ ICM R2,B'0010',T191V1
0094E8 BF22 C1C0 09608 9672+ ICM R2,B'0010',T191V1
0094EC BF22 C1C0 09608 9673+ ICM R2,B'0010',T191V1
0094F0 BF22 C1C0 09608 9674+ ICM R2,B'0010',T191V1
0094F4 BF22 C1C0 09608 9675+ ICM R2,B'0010',T191V1
0094F8 BF22 C1C0 09608 9676+ ICM R2,B'0010',T191V1
0094FC BF22 C1C0 09608 9677+ ICM R2,B'0010',T191V1
009500 BF22 C1C0 09608 9678+ ICM R2,B'0010',T191V1
009504 BF22 C1C0 09608 9679+ ICM R2,B'0010',T191V1
009508 BF22 C1C0 09608 9680+ ICM R2,B'0010',T191V1
00950C BF22 C1C0 09608 9681+ ICM R2,B'0010',T191V1
009510 BF22 C1C0 09608 9682+ ICM R2,B'0010',T191V1
009514 BF22 C1C0 09608 9683+ ICM R2,B'0010',T191V1
009518 BF22 C1C0 09608 9684+ ICM R2,B'0010',T191V1
00951C BF22 C1C0 09608 9685+ ICM R2,B'0010',T191V1
009520 BF22 C1C0 09608 9686+ ICM R2,B'0010',T191V1
009524 BF22 C1C0 09608 9687+ ICM R2,B'0010',T191V1
009528 BF22 C1C0 09608 9688+ ICM R2,B'0010',T191V1
00952C BF22 C1C0 09608 9689+ ICM R2,B'0010',T191V1
009530 BF22 C1C0 09608 9690+ ICM R2,B'0010',T191V1
009534 BF22 C1C0 09608 9691+ ICM R2,B'0010',T191V1
009538 BF22 C1C0 09608 9692+ ICM R2,B'0010',T191V1
00953C BF22 C1C0 09608 9693+ ICM R2,B'0010',T191V1
009540 BF22 C1C0 09608 9694+ ICM R2,B'0010',T191V1
009544 BF22 C1C0 09608 9695+ ICM R2,B'0010',T191V1
009548 BF22 C1C0 09608 9696+ ICM R2,B'0010',T191V1
00954C BF22 C1C0 09608 9697+ ICM R2,B'0010',T191V1
009550 BF22 C1C0 09608 9698+ ICM R2,B'0010',T191V1
009554 BF22 C1C0 09608 9699+ ICM R2,B'0010',T191V1
PAGE 179
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009558 BF22 C1C0 09608 9700+ ICM R2,B'0010',T191V1
00955C BF22 C1C0 09608 9701+ ICM R2,B'0010',T191V1
009560 BF22 C1C0 09608 9702+ ICM R2,B'0010',T191V1
009564 BF22 C1C0 09608 9703+ ICM R2,B'0010',T191V1
009568 BF22 C1C0 09608 9704+ ICM R2,B'0010',T191V1
00956C BF22 C1C0 09608 9705+ ICM R2,B'0010',T191V1
009570 BF22 C1C0 09608 9706+ ICM R2,B'0010',T191V1
009574 BF22 C1C0 09608 9707+ ICM R2,B'0010',T191V1
009578 BF22 C1C0 09608 9708+ ICM R2,B'0010',T191V1
00957C BF22 C1C0 09608 9709+ ICM R2,B'0010',T191V1
009580 BF22 C1C0 09608 9710+ ICM R2,B'0010',T191V1
009584 BF22 C1C0 09608 9711+ ICM R2,B'0010',T191V1
009588 BF22 C1C0 09608 9712+ ICM R2,B'0010',T191V1
00958C BF22 C1C0 09608 9713+ ICM R2,B'0010',T191V1
009590 BF22 C1C0 09608 9714+ ICM R2,B'0010',T191V1
009594 BF22 C1C0 09608 9715+ ICM R2,B'0010',T191V1
009598 BF22 C1C0 09608 9716+ ICM R2,B'0010',T191V1
00959C BF22 C1C0 09608 9717+ ICM R2,B'0010',T191V1
0095A0 BF22 C1C0 09608 9718+ ICM R2,B'0010',T191V1
0095A4 BF22 C1C0 09608 9719+ ICM R2,B'0010',T191V1
0095A8 BF22 C1C0 09608 9720+ ICM R2,B'0010',T191V1
0095AC BF22 C1C0 09608 9721+ ICM R2,B'0010',T191V1
0095B0 BF22 C1C0 09608 9722+ ICM R2,B'0010',T191V1
0095B4 BF22 C1C0 09608 9723+ ICM R2,B'0010',T191V1
0095B8 BF22 C1C0 09608 9724+ ICM R2,B'0010',T191V1
0095BC BF22 C1C0 09608 9725+ ICM R2,B'0010',T191V1
0095C0 BF22 C1C0 09608 9726+ ICM R2,B'0010',T191V1
0095C4 BF22 C1C0 09608 9727+ ICM R2,B'0010',T191V1
0095C8 BF22 C1C0 09608 9728+ ICM R2,B'0010',T191V1
0095CC BF22 C1C0 09608 9729+ ICM R2,B'0010',T191V1
0095D0 BF22 C1C0 09608 9730+ ICM R2,B'0010',T191V1
0095D4 BF22 C1C0 09608 9731+ ICM R2,B'0010',T191V1
0095D8 BF22 C1C0 09608 9732+ ICM R2,B'0010',T191V1
0095DC BF22 C1C0 09608 9733+ ICM R2,B'0010',T191V1
0095E0 BF22 C1C0 09608 9734+ ICM R2,B'0010',T191V1
0095E4 BF22 C1C0 09608 9735+ ICM R2,B'0010',T191V1
0095E8 BF22 C1C0 09608 9736+ ICM R2,B'0010',T191V1
0095EC BF22 C1C0 09608 9737+ ICM R2,B'0010',T191V1
0095F0 BF22 C1C0 09608 9738+ ICM R2,B'0010',T191V1
0095F4 BF22 C1C0 09608 9739+ ICM R2,B'0010',T191V1
9740+*
0095F8 06FB 9741 BCTR R15,R11
9742 TSIMRET
0095FA 58F0 C1C8 09610 9743+ L R15,=A(SAVETST) R15 := current save area
0095FE 58DF 0004 00004 9744+ L R13,4(R15) get old save area back
009602 98EC D00C 0000C 9745+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
009606 07FE 9746+ BR 14 RETURN 02000000
9747 *
009608 9748 DS 0F
009608 F2 9749 T191V1 DC C'2'
9750 TSIMEND
009610 9751+ LTORG
009610 00000458 9752 =A(SAVETST)
09614 9753+T191TEND EQU *
9754 *
PAGE 180
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
9755 * Test 192 -- ICM R,m (2c) ---------------------------------
9756 *
9757 TSIMBEG T192,3000,100,1,C'ICM R,i,m (1100)'
9758+*
002B84 9759+TDSCDAT CSECT
002B88 9760+ DS 0D
9761+*
002B88 00009618 9762+T192TDSC DC A(T192) // TENTRY
002B8C 000001CC 9763+ DC A(T192TEND-T192) // TLENGTH
002B90 00000BB8 9764+ DC F'3000' // TLRCNT
002B94 00000064 9765+ DC F'100' // TIGCNT
002B98 00000001 9766+ DC F'1' // TLTYPE
001366 9767+TEXT CSECT
001366 E3F1F9F2 9768+SPTR0768 DC C'T192'
002B9C 9769+TDSCDAT CSECT
002B9C 9770+ DS 0F
002B9C 04001366 9771+ DC AL1(L'SPTR0768),AL3(SPTR0768)
00136A 9772+TEXT CSECT
00136A C9C3D440D96B896B 9773+SPTR0769 DC C'ICM R,i,m (1100)'
002BA0 9774+TDSCDAT CSECT
002BA0 9775+ DS 0F
002BA0 1000136A 9776+ DC AL1(L'SPTR0769),AL3(SPTR0769)
9777+*
004A9C 9778+TDSCTBL CSECT
04A9C 9779+T192TPTR EQU *
004A9C 00002B88 9780+ DC A(T192TDSC) enabled test
9781+*
009614 9782+TCODE CSECT
009618 9783+ DS 0D ensure double word alignment for test
009618 9784+T192 DS 0H 01650000
009618 90EC D00C 0000C 9785+ STM 14,12,12(13) SAVE REGISTERS 02950000
00961C 18CF 9786+ LR R12,R15 base register := entry address
09618 9787+ USING T192,R12 declare code base register
00961E 41B0 C020 09638 9788+ LA R11,T192L load loop target to R11
009622 58F0 C1C8 097E0 9789+ L R15,=A(SAVETST) R15 := current save area
009626 50DF 0004 00004 9790+ ST R13,4(R15) set back pointer in current save area
00962A 182D 9791+ LR R2,R13 remember callers save area
00962C 18DF 9792+ LR R13,R15 setup current save area
00962E 50D2 0008 00008 9793+ ST R13,8(R2) set forw pointer in callers save area
00000 9794+ USING TDSC,R1 declare TDSC base register
009632 58F0 1008 00008 9795+ L R15,TLRCNT load local repeat count to R15
9796+*
9797 *
009636 1722 9798 XR R2,R2
9799 T192L REPINS ICM,(R2,B'1100',T192V1) repeat: ICM R2,B'1100',T192V1
9800+*
9801+* build from sublist &ALIST a comma separated string &ARGS
9802+*
9803+*
9804+*
9805+*
9806+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
9807+* this allows to transfer the repeat count from last TDSCGEN call
9808+*
9809+*
PAGE 181
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
09638 9810+T192L EQU *
9811+*
9812+* write a comment indicating what REPINS does (in case NOGEN in effect)
9813+*
9814+*,// REPINS: do 100 times:
9815+*
9816+* MNOTE requires that ' is doubled for expanded variables
9817+* thus build &MASTR as a copy of '&ARGS with ' doubled
9818+*
9819+*
9820+*,// ICM R2,B'1100',T192V1
9821+*
9822+* finally generate code: &ICNT copies of &CODE &ARGS
9823+*
009638 BF2C C1C0 097D8 9824+ ICM R2,B'1100',T192V1
00963C BF2C C1C0 097D8 9825+ ICM R2,B'1100',T192V1
009640 BF2C C1C0 097D8 9826+ ICM R2,B'1100',T192V1
009644 BF2C C1C0 097D8 9827+ ICM R2,B'1100',T192V1
009648 BF2C C1C0 097D8 9828+ ICM R2,B'1100',T192V1
00964C BF2C C1C0 097D8 9829+ ICM R2,B'1100',T192V1
009650 BF2C C1C0 097D8 9830+ ICM R2,B'1100',T192V1
009654 BF2C C1C0 097D8 9831+ ICM R2,B'1100',T192V1
009658 BF2C C1C0 097D8 9832+ ICM R2,B'1100',T192V1
00965C BF2C C1C0 097D8 9833+ ICM R2,B'1100',T192V1
009660 BF2C C1C0 097D8 9834+ ICM R2,B'1100',T192V1
009664 BF2C C1C0 097D8 9835+ ICM R2,B'1100',T192V1
009668 BF2C C1C0 097D8 9836+ ICM R2,B'1100',T192V1
00966C BF2C C1C0 097D8 9837+ ICM R2,B'1100',T192V1
009670 BF2C C1C0 097D8 9838+ ICM R2,B'1100',T192V1
009674 BF2C C1C0 097D8 9839+ ICM R2,B'1100',T192V1
009678 BF2C C1C0 097D8 9840+ ICM R2,B'1100',T192V1
00967C BF2C C1C0 097D8 9841+ ICM R2,B'1100',T192V1
009680 BF2C C1C0 097D8 9842+ ICM R2,B'1100',T192V1
009684 BF2C C1C0 097D8 9843+ ICM R2,B'1100',T192V1
009688 BF2C C1C0 097D8 9844+ ICM R2,B'1100',T192V1
00968C BF2C C1C0 097D8 9845+ ICM R2,B'1100',T192V1
009690 BF2C C1C0 097D8 9846+ ICM R2,B'1100',T192V1
009694 BF2C C1C0 097D8 9847+ ICM R2,B'1100',T192V1
009698 BF2C C1C0 097D8 9848+ ICM R2,B'1100',T192V1
00969C BF2C C1C0 097D8 9849+ ICM R2,B'1100',T192V1
0096A0 BF2C C1C0 097D8 9850+ ICM R2,B'1100',T192V1
0096A4 BF2C C1C0 097D8 9851+ ICM R2,B'1100',T192V1
0096A8 BF2C C1C0 097D8 9852+ ICM R2,B'1100',T192V1
0096AC BF2C C1C0 097D8 9853+ ICM R2,B'1100',T192V1
0096B0 BF2C C1C0 097D8 9854+ ICM R2,B'1100',T192V1
0096B4 BF2C C1C0 097D8 9855+ ICM R2,B'1100',T192V1
0096B8 BF2C C1C0 097D8 9856+ ICM R2,B'1100',T192V1
0096BC BF2C C1C0 097D8 9857+ ICM R2,B'1100',T192V1
0096C0 BF2C C1C0 097D8 9858+ ICM R2,B'1100',T192V1
0096C4 BF2C C1C0 097D8 9859+ ICM R2,B'1100',T192V1
0096C8 BF2C C1C0 097D8 9860+ ICM R2,B'1100',T192V1
0096CC BF2C C1C0 097D8 9861+ ICM R2,B'1100',T192V1
0096D0 BF2C C1C0 097D8 9862+ ICM R2,B'1100',T192V1
0096D4 BF2C C1C0 097D8 9863+ ICM R2,B'1100',T192V1
0096D8 BF2C C1C0 097D8 9864+ ICM R2,B'1100',T192V1
PAGE 182
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0096DC BF2C C1C0 097D8 9865+ ICM R2,B'1100',T192V1
0096E0 BF2C C1C0 097D8 9866+ ICM R2,B'1100',T192V1
0096E4 BF2C C1C0 097D8 9867+ ICM R2,B'1100',T192V1
0096E8 BF2C C1C0 097D8 9868+ ICM R2,B'1100',T192V1
0096EC BF2C C1C0 097D8 9869+ ICM R2,B'1100',T192V1
0096F0 BF2C C1C0 097D8 9870+ ICM R2,B'1100',T192V1
0096F4 BF2C C1C0 097D8 9871+ ICM R2,B'1100',T192V1
0096F8 BF2C C1C0 097D8 9872+ ICM R2,B'1100',T192V1
0096FC BF2C C1C0 097D8 9873+ ICM R2,B'1100',T192V1
009700 BF2C C1C0 097D8 9874+ ICM R2,B'1100',T192V1
009704 BF2C C1C0 097D8 9875+ ICM R2,B'1100',T192V1
009708 BF2C C1C0 097D8 9876+ ICM R2,B'1100',T192V1
00970C BF2C C1C0 097D8 9877+ ICM R2,B'1100',T192V1
009710 BF2C C1C0 097D8 9878+ ICM R2,B'1100',T192V1
009714 BF2C C1C0 097D8 9879+ ICM R2,B'1100',T192V1
009718 BF2C C1C0 097D8 9880+ ICM R2,B'1100',T192V1
00971C BF2C C1C0 097D8 9881+ ICM R2,B'1100',T192V1
009720 BF2C C1C0 097D8 9882+ ICM R2,B'1100',T192V1
009724 BF2C C1C0 097D8 9883+ ICM R2,B'1100',T192V1
009728 BF2C C1C0 097D8 9884+ ICM R2,B'1100',T192V1
00972C BF2C C1C0 097D8 9885+ ICM R2,B'1100',T192V1
009730 BF2C C1C0 097D8 9886+ ICM R2,B'1100',T192V1
009734 BF2C C1C0 097D8 9887+ ICM R2,B'1100',T192V1
009738 BF2C C1C0 097D8 9888+ ICM R2,B'1100',T192V1
00973C BF2C C1C0 097D8 9889+ ICM R2,B'1100',T192V1
009740 BF2C C1C0 097D8 9890+ ICM R2,B'1100',T192V1
009744 BF2C C1C0 097D8 9891+ ICM R2,B'1100',T192V1
009748 BF2C C1C0 097D8 9892+ ICM R2,B'1100',T192V1
00974C BF2C C1C0 097D8 9893+ ICM R2,B'1100',T192V1
009750 BF2C C1C0 097D8 9894+ ICM R2,B'1100',T192V1
009754 BF2C C1C0 097D8 9895+ ICM R2,B'1100',T192V1
009758 BF2C C1C0 097D8 9896+ ICM R2,B'1100',T192V1
00975C BF2C C1C0 097D8 9897+ ICM R2,B'1100',T192V1
009760 BF2C C1C0 097D8 9898+ ICM R2,B'1100',T192V1
009764 BF2C C1C0 097D8 9899+ ICM R2,B'1100',T192V1
009768 BF2C C1C0 097D8 9900+ ICM R2,B'1100',T192V1
00976C BF2C C1C0 097D8 9901+ ICM R2,B'1100',T192V1
009770 BF2C C1C0 097D8 9902+ ICM R2,B'1100',T192V1
009774 BF2C C1C0 097D8 9903+ ICM R2,B'1100',T192V1
009778 BF2C C1C0 097D8 9904+ ICM R2,B'1100',T192V1
00977C BF2C C1C0 097D8 9905+ ICM R2,B'1100',T192V1
009780 BF2C C1C0 097D8 9906+ ICM R2,B'1100',T192V1
009784 BF2C C1C0 097D8 9907+ ICM R2,B'1100',T192V1
009788 BF2C C1C0 097D8 9908+ ICM R2,B'1100',T192V1
00978C BF2C C1C0 097D8 9909+ ICM R2,B'1100',T192V1
009790 BF2C C1C0 097D8 9910+ ICM R2,B'1100',T192V1
009794 BF2C C1C0 097D8 9911+ ICM R2,B'1100',T192V1
009798 BF2C C1C0 097D8 9912+ ICM R2,B'1100',T192V1
00979C BF2C C1C0 097D8 9913+ ICM R2,B'1100',T192V1
0097A0 BF2C C1C0 097D8 9914+ ICM R2,B'1100',T192V1
0097A4 BF2C C1C0 097D8 9915+ ICM R2,B'1100',T192V1
0097A8 BF2C C1C0 097D8 9916+ ICM R2,B'1100',T192V1
0097AC BF2C C1C0 097D8 9917+ ICM R2,B'1100',T192V1
0097B0 BF2C C1C0 097D8 9918+ ICM R2,B'1100',T192V1
0097B4 BF2C C1C0 097D8 9919+ ICM R2,B'1100',T192V1
PAGE 183
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0097B8 BF2C C1C0 097D8 9920+ ICM R2,B'1100',T192V1
0097BC BF2C C1C0 097D8 9921+ ICM R2,B'1100',T192V1
0097C0 BF2C C1C0 097D8 9922+ ICM R2,B'1100',T192V1
0097C4 BF2C C1C0 097D8 9923+ ICM R2,B'1100',T192V1
9924+*
0097C8 06FB 9925 BCTR R15,R11
9926 TSIMRET
0097CA 58F0 C1C8 097E0 9927+ L R15,=A(SAVETST) R15 := current save area
0097CE 58DF 0004 00004 9928+ L R13,4(R15) get old save area back
0097D2 98EC D00C 0000C 9929+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0097D6 07FE 9930+ BR 14 RETURN 02000000
9931 *
0097D8 9932 DS 0F
0097D8 F0F1 9933 T192V1 DC C'01'
9934 TSIMEND
0097E0 9935+ LTORG
0097E0 00000458 9936 =A(SAVETST)
097E4 9937+T192TEND EQU *
9938 *
9939 * Test 193 -- ICM R,m (3c) ---------------------------------
9940 *
9941 TSIMBEG T193,4000,100,1,C'ICM R,i,m (0111)'
9942+*
002BA4 9943+TDSCDAT CSECT
002BA8 9944+ DS 0D
9945+*
002BA8 000097E8 9946+T193TDSC DC A(T193) // TENTRY
002BAC 000001CC 9947+ DC A(T193TEND-T193) // TLENGTH
002BB0 00000FA0 9948+ DC F'4000' // TLRCNT
002BB4 00000064 9949+ DC F'100' // TIGCNT
002BB8 00000001 9950+ DC F'1' // TLTYPE
00137A 9951+TEXT CSECT
00137A E3F1F9F3 9952+SPTR0780 DC C'T193'
002BBC 9953+TDSCDAT CSECT
002BBC 9954+ DS 0F
002BBC 0400137A 9955+ DC AL1(L'SPTR0780),AL3(SPTR0780)
00137E 9956+TEXT CSECT
00137E C9C3D440D96B896B 9957+SPTR0781 DC C'ICM R,i,m (0111)'
002BC0 9958+TDSCDAT CSECT
002BC0 9959+ DS 0F
002BC0 1000137E 9960+ DC AL1(L'SPTR0781),AL3(SPTR0781)
9961+*
004AA0 9962+TDSCTBL CSECT
04AA0 9963+T193TPTR EQU *
004AA0 00002BA8 9964+ DC A(T193TDSC) enabled test
9965+*
0097E4 9966+TCODE CSECT
0097E8 9967+ DS 0D ensure double word alignment for test
0097E8 9968+T193 DS 0H 01650000
0097E8 90EC D00C 0000C 9969+ STM 14,12,12(13) SAVE REGISTERS 02950000
0097EC 18CF 9970+ LR R12,R15 base register := entry address
097E8 9971+ USING T193,R12 declare code base register
0097EE 41B0 C020 09808 9972+ LA R11,T193L load loop target to R11
0097F2 58F0 C1C8 099B0 9973+ L R15,=A(SAVETST) R15 := current save area
0097F6 50DF 0004 00004 9974+ ST R13,4(R15) set back pointer in current save area
PAGE 184
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0097FA 182D 9975+ LR R2,R13 remember callers save area
0097FC 18DF 9976+ LR R13,R15 setup current save area
0097FE 50D2 0008 00008 9977+ ST R13,8(R2) set forw pointer in callers save area
00000 9978+ USING TDSC,R1 declare TDSC base register
009802 58F0 1008 00008 9979+ L R15,TLRCNT load local repeat count to R15
9980+*
9981 *
009806 1722 9982 XR R2,R2
9983 T193L REPINS ICM,(R2,B'0111',T193V1) repeat: ICM R2,B'0111',T193V1
9984+*
9985+* build from sublist &ALIST a comma separated string &ARGS
9986+*
9987+*
9988+*
9989+*
9990+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
9991+* this allows to transfer the repeat count from last TDSCGEN call
9992+*
9993+*
09808 9994+T193L EQU *
9995+*
9996+* write a comment indicating what REPINS does (in case NOGEN in effect)
9997+*
9998+*,// REPINS: do 100 times:
9999+*
10000+* MNOTE requires that ' is doubled for expanded variables
10001+* thus build &MASTR as a copy of '&ARGS with ' doubled
10002+*
10003+*
10004+*,// ICM R2,B'0111',T193V1
10005+*
10006+* finally generate code: &ICNT copies of &CODE &ARGS
10007+*
009808 BF27 C1C0 099A8 10008+ ICM R2,B'0111',T193V1
00980C BF27 C1C0 099A8 10009+ ICM R2,B'0111',T193V1
009810 BF27 C1C0 099A8 10010+ ICM R2,B'0111',T193V1
009814 BF27 C1C0 099A8 10011+ ICM R2,B'0111',T193V1
009818 BF27 C1C0 099A8 10012+ ICM R2,B'0111',T193V1
00981C BF27 C1C0 099A8 10013+ ICM R2,B'0111',T193V1
009820 BF27 C1C0 099A8 10014+ ICM R2,B'0111',T193V1
009824 BF27 C1C0 099A8 10015+ ICM R2,B'0111',T193V1
009828 BF27 C1C0 099A8 10016+ ICM R2,B'0111',T193V1
00982C BF27 C1C0 099A8 10017+ ICM R2,B'0111',T193V1
009830 BF27 C1C0 099A8 10018+ ICM R2,B'0111',T193V1
009834 BF27 C1C0 099A8 10019+ ICM R2,B'0111',T193V1
009838 BF27 C1C0 099A8 10020+ ICM R2,B'0111',T193V1
00983C BF27 C1C0 099A8 10021+ ICM R2,B'0111',T193V1
009840 BF27 C1C0 099A8 10022+ ICM R2,B'0111',T193V1
009844 BF27 C1C0 099A8 10023+ ICM R2,B'0111',T193V1
009848 BF27 C1C0 099A8 10024+ ICM R2,B'0111',T193V1
00984C BF27 C1C0 099A8 10025+ ICM R2,B'0111',T193V1
009850 BF27 C1C0 099A8 10026+ ICM R2,B'0111',T193V1
009854 BF27 C1C0 099A8 10027+ ICM R2,B'0111',T193V1
009858 BF27 C1C0 099A8 10028+ ICM R2,B'0111',T193V1
00985C BF27 C1C0 099A8 10029+ ICM R2,B'0111',T193V1
PAGE 185
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009860 BF27 C1C0 099A8 10030+ ICM R2,B'0111',T193V1
009864 BF27 C1C0 099A8 10031+ ICM R2,B'0111',T193V1
009868 BF27 C1C0 099A8 10032+ ICM R2,B'0111',T193V1
00986C BF27 C1C0 099A8 10033+ ICM R2,B'0111',T193V1
009870 BF27 C1C0 099A8 10034+ ICM R2,B'0111',T193V1
009874 BF27 C1C0 099A8 10035+ ICM R2,B'0111',T193V1
009878 BF27 C1C0 099A8 10036+ ICM R2,B'0111',T193V1
00987C BF27 C1C0 099A8 10037+ ICM R2,B'0111',T193V1
009880 BF27 C1C0 099A8 10038+ ICM R2,B'0111',T193V1
009884 BF27 C1C0 099A8 10039+ ICM R2,B'0111',T193V1
009888 BF27 C1C0 099A8 10040+ ICM R2,B'0111',T193V1
00988C BF27 C1C0 099A8 10041+ ICM R2,B'0111',T193V1
009890 BF27 C1C0 099A8 10042+ ICM R2,B'0111',T193V1
009894 BF27 C1C0 099A8 10043+ ICM R2,B'0111',T193V1
009898 BF27 C1C0 099A8 10044+ ICM R2,B'0111',T193V1
00989C BF27 C1C0 099A8 10045+ ICM R2,B'0111',T193V1
0098A0 BF27 C1C0 099A8 10046+ ICM R2,B'0111',T193V1
0098A4 BF27 C1C0 099A8 10047+ ICM R2,B'0111',T193V1
0098A8 BF27 C1C0 099A8 10048+ ICM R2,B'0111',T193V1
0098AC BF27 C1C0 099A8 10049+ ICM R2,B'0111',T193V1
0098B0 BF27 C1C0 099A8 10050+ ICM R2,B'0111',T193V1
0098B4 BF27 C1C0 099A8 10051+ ICM R2,B'0111',T193V1
0098B8 BF27 C1C0 099A8 10052+ ICM R2,B'0111',T193V1
0098BC BF27 C1C0 099A8 10053+ ICM R2,B'0111',T193V1
0098C0 BF27 C1C0 099A8 10054+ ICM R2,B'0111',T193V1
0098C4 BF27 C1C0 099A8 10055+ ICM R2,B'0111',T193V1
0098C8 BF27 C1C0 099A8 10056+ ICM R2,B'0111',T193V1
0098CC BF27 C1C0 099A8 10057+ ICM R2,B'0111',T193V1
0098D0 BF27 C1C0 099A8 10058+ ICM R2,B'0111',T193V1
0098D4 BF27 C1C0 099A8 10059+ ICM R2,B'0111',T193V1
0098D8 BF27 C1C0 099A8 10060+ ICM R2,B'0111',T193V1
0098DC BF27 C1C0 099A8 10061+ ICM R2,B'0111',T193V1
0098E0 BF27 C1C0 099A8 10062+ ICM R2,B'0111',T193V1
0098E4 BF27 C1C0 099A8 10063+ ICM R2,B'0111',T193V1
0098E8 BF27 C1C0 099A8 10064+ ICM R2,B'0111',T193V1
0098EC BF27 C1C0 099A8 10065+ ICM R2,B'0111',T193V1
0098F0 BF27 C1C0 099A8 10066+ ICM R2,B'0111',T193V1
0098F4 BF27 C1C0 099A8 10067+ ICM R2,B'0111',T193V1
0098F8 BF27 C1C0 099A8 10068+ ICM R2,B'0111',T193V1
0098FC BF27 C1C0 099A8 10069+ ICM R2,B'0111',T193V1
009900 BF27 C1C0 099A8 10070+ ICM R2,B'0111',T193V1
009904 BF27 C1C0 099A8 10071+ ICM R2,B'0111',T193V1
009908 BF27 C1C0 099A8 10072+ ICM R2,B'0111',T193V1
00990C BF27 C1C0 099A8 10073+ ICM R2,B'0111',T193V1
009910 BF27 C1C0 099A8 10074+ ICM R2,B'0111',T193V1
009914 BF27 C1C0 099A8 10075+ ICM R2,B'0111',T193V1
009918 BF27 C1C0 099A8 10076+ ICM R2,B'0111',T193V1
00991C BF27 C1C0 099A8 10077+ ICM R2,B'0111',T193V1
009920 BF27 C1C0 099A8 10078+ ICM R2,B'0111',T193V1
009924 BF27 C1C0 099A8 10079+ ICM R2,B'0111',T193V1
009928 BF27 C1C0 099A8 10080+ ICM R2,B'0111',T193V1
00992C BF27 C1C0 099A8 10081+ ICM R2,B'0111',T193V1
009930 BF27 C1C0 099A8 10082+ ICM R2,B'0111',T193V1
009934 BF27 C1C0 099A8 10083+ ICM R2,B'0111',T193V1
009938 BF27 C1C0 099A8 10084+ ICM R2,B'0111',T193V1
PAGE 186
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00993C BF27 C1C0 099A8 10085+ ICM R2,B'0111',T193V1
009940 BF27 C1C0 099A8 10086+ ICM R2,B'0111',T193V1
009944 BF27 C1C0 099A8 10087+ ICM R2,B'0111',T193V1
009948 BF27 C1C0 099A8 10088+ ICM R2,B'0111',T193V1
00994C BF27 C1C0 099A8 10089+ ICM R2,B'0111',T193V1
009950 BF27 C1C0 099A8 10090+ ICM R2,B'0111',T193V1
009954 BF27 C1C0 099A8 10091+ ICM R2,B'0111',T193V1
009958 BF27 C1C0 099A8 10092+ ICM R2,B'0111',T193V1
00995C BF27 C1C0 099A8 10093+ ICM R2,B'0111',T193V1
009960 BF27 C1C0 099A8 10094+ ICM R2,B'0111',T193V1
009964 BF27 C1C0 099A8 10095+ ICM R2,B'0111',T193V1
009968 BF27 C1C0 099A8 10096+ ICM R2,B'0111',T193V1
00996C BF27 C1C0 099A8 10097+ ICM R2,B'0111',T193V1
009970 BF27 C1C0 099A8 10098+ ICM R2,B'0111',T193V1
009974 BF27 C1C0 099A8 10099+ ICM R2,B'0111',T193V1
009978 BF27 C1C0 099A8 10100+ ICM R2,B'0111',T193V1
00997C BF27 C1C0 099A8 10101+ ICM R2,B'0111',T193V1
009980 BF27 C1C0 099A8 10102+ ICM R2,B'0111',T193V1
009984 BF27 C1C0 099A8 10103+ ICM R2,B'0111',T193V1
009988 BF27 C1C0 099A8 10104+ ICM R2,B'0111',T193V1
00998C BF27 C1C0 099A8 10105+ ICM R2,B'0111',T193V1
009990 BF27 C1C0 099A8 10106+ ICM R2,B'0111',T193V1
009994 BF27 C1C0 099A8 10107+ ICM R2,B'0111',T193V1
10108+*
009998 06FB 10109 BCTR R15,R11
10110 TSIMRET
00999A 58F0 C1C8 099B0 10111+ L R15,=A(SAVETST) R15 := current save area
00999E 58DF 0004 00004 10112+ L R13,4(R15) get old save area back
0099A2 98EC D00C 0000C 10113+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0099A6 07FE 10114+ BR 14 RETURN 02000000
10115 *
0099A8 10116 DS 0F
0099A8 F1F2F3 10117 T193V1 DC C'123'
10118 TSIMEND
0099B0 10119+ LTORG
0099B0 00000458 10120 =A(SAVETST)
099B4 10121+T193TEND EQU *
10122 *
10123 * Test 2xx -- binary/logical ====================================
10124 *
10125 * Test 20x -- arithmetic/logical add/sub ===================
10126 *
10127 * Test 200 -- AR R,R ---------------------------------------
10128 *
10129 TSIMBEG T200,14000,100,1,C'AR R,R'
10130+*
002BC4 10131+TDSCDAT CSECT
002BC8 10132+ DS 0D
10133+*
002BC8 000099B8 10134+T200TDSC DC A(T200) // TENTRY
002BCC 00000104 10135+ DC A(T200TEND-T200) // TLENGTH
002BD0 000036B0 10136+ DC F'14000' // TLRCNT
002BD4 00000064 10137+ DC F'100' // TIGCNT
002BD8 00000001 10138+ DC F'1' // TLTYPE
00138E 10139+TEXT CSECT
PAGE 187
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00138E E3F2F0F0 10140+SPTR0792 DC C'T200'
002BDC 10141+TDSCDAT CSECT
002BDC 10142+ DS 0F
002BDC 0400138E 10143+ DC AL1(L'SPTR0792),AL3(SPTR0792)
001392 10144+TEXT CSECT
001392 C1D940D96BD9 10145+SPTR0793 DC C'AR R,R'
002BE0 10146+TDSCDAT CSECT
002BE0 10147+ DS 0F
002BE0 06001392 10148+ DC AL1(L'SPTR0793),AL3(SPTR0793)
10149+*
004AA4 10150+TDSCTBL CSECT
04AA4 10151+T200TPTR EQU *
004AA4 00002BC8 10152+ DC A(T200TDSC) enabled test
10153+*
0099B4 10154+TCODE CSECT
0099B8 10155+ DS 0D ensure double word alignment for test
0099B8 10156+T200 DS 0H 01650000
0099B8 90EC D00C 0000C 10157+ STM 14,12,12(13) SAVE REGISTERS 02950000
0099BC 18CF 10158+ LR R12,R15 base register := entry address
099B8 10159+ USING T200,R12 declare code base register
0099BE 41B0 C024 099DC 10160+ LA R11,T200L load loop target to R11
0099C2 58F0 C100 09AB8 10161+ L R15,=A(SAVETST) R15 := current save area
0099C6 50DF 0004 00004 10162+ ST R13,4(R15) set back pointer in current save area
0099CA 182D 10163+ LR R2,R13 remember callers save area
0099CC 18DF 10164+ LR R13,R15 setup current save area
0099CE 50D2 0008 00008 10165+ ST R13,8(R2) set forw pointer in callers save area
00000 10166+ USING TDSC,R1 declare TDSC base register
0099D2 58F0 1008 00008 10167+ L R15,TLRCNT load local repeat count to R15
10168+*
10169 *
0099D6 1722 10170 XR R2,R2
0099D8 4130 0001 00001 10171 LA R3,1
10172 T200L REPINS AR,(R2,R3) repeat: AR R2,R3
10173+*
10174+* build from sublist &ALIST a comma separated string &ARGS
10175+*
10176+*
10177+*
10178+*
10179+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
10180+* this allows to transfer the repeat count from last TDSCGEN call
10181+*
10182+*
099DC 10183+T200L EQU *
10184+*
10185+* write a comment indicating what REPINS does (in case NOGEN in effect)
10186+*
10187+*,// REPINS: do 100 times:
10188+*
10189+* MNOTE requires that ' is doubled for expanded variables
10190+* thus build &MASTR as a copy of '&ARGS with ' doubled
10191+*
10192+*
10193+*,// AR R2,R3
10194+*
PAGE 188
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
10195+* finally generate code: &ICNT copies of &CODE &ARGS
10196+*
0099DC 1A23 10197+ AR R2,R3
0099DE 1A23 10198+ AR R2,R3
0099E0 1A23 10199+ AR R2,R3
0099E2 1A23 10200+ AR R2,R3
0099E4 1A23 10201+ AR R2,R3
0099E6 1A23 10202+ AR R2,R3
0099E8 1A23 10203+ AR R2,R3
0099EA 1A23 10204+ AR R2,R3
0099EC 1A23 10205+ AR R2,R3
0099EE 1A23 10206+ AR R2,R3
0099F0 1A23 10207+ AR R2,R3
0099F2 1A23 10208+ AR R2,R3
0099F4 1A23 10209+ AR R2,R3
0099F6 1A23 10210+ AR R2,R3
0099F8 1A23 10211+ AR R2,R3
0099FA 1A23 10212+ AR R2,R3
0099FC 1A23 10213+ AR R2,R3
0099FE 1A23 10214+ AR R2,R3
009A00 1A23 10215+ AR R2,R3
009A02 1A23 10216+ AR R2,R3
009A04 1A23 10217+ AR R2,R3
009A06 1A23 10218+ AR R2,R3
009A08 1A23 10219+ AR R2,R3
009A0A 1A23 10220+ AR R2,R3
009A0C 1A23 10221+ AR R2,R3
009A0E 1A23 10222+ AR R2,R3
009A10 1A23 10223+ AR R2,R3
009A12 1A23 10224+ AR R2,R3
009A14 1A23 10225+ AR R2,R3
009A16 1A23 10226+ AR R2,R3
009A18 1A23 10227+ AR R2,R3
009A1A 1A23 10228+ AR R2,R3
009A1C 1A23 10229+ AR R2,R3
009A1E 1A23 10230+ AR R2,R3
009A20 1A23 10231+ AR R2,R3
009A22 1A23 10232+ AR R2,R3
009A24 1A23 10233+ AR R2,R3
009A26 1A23 10234+ AR R2,R3
009A28 1A23 10235+ AR R2,R3
009A2A 1A23 10236+ AR R2,R3
009A2C 1A23 10237+ AR R2,R3
009A2E 1A23 10238+ AR R2,R3
009A30 1A23 10239+ AR R2,R3
009A32 1A23 10240+ AR R2,R3
009A34 1A23 10241+ AR R2,R3
009A36 1A23 10242+ AR R2,R3
009A38 1A23 10243+ AR R2,R3
009A3A 1A23 10244+ AR R2,R3
009A3C 1A23 10245+ AR R2,R3
009A3E 1A23 10246+ AR R2,R3
009A40 1A23 10247+ AR R2,R3
009A42 1A23 10248+ AR R2,R3
009A44 1A23 10249+ AR R2,R3
PAGE 189
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009A46 1A23 10250+ AR R2,R3
009A48 1A23 10251+ AR R2,R3
009A4A 1A23 10252+ AR R2,R3
009A4C 1A23 10253+ AR R2,R3
009A4E 1A23 10254+ AR R2,R3
009A50 1A23 10255+ AR R2,R3
009A52 1A23 10256+ AR R2,R3
009A54 1A23 10257+ AR R2,R3
009A56 1A23 10258+ AR R2,R3
009A58 1A23 10259+ AR R2,R3
009A5A 1A23 10260+ AR R2,R3
009A5C 1A23 10261+ AR R2,R3
009A5E 1A23 10262+ AR R2,R3
009A60 1A23 10263+ AR R2,R3
009A62 1A23 10264+ AR R2,R3
009A64 1A23 10265+ AR R2,R3
009A66 1A23 10266+ AR R2,R3
009A68 1A23 10267+ AR R2,R3
009A6A 1A23 10268+ AR R2,R3
009A6C 1A23 10269+ AR R2,R3
009A6E 1A23 10270+ AR R2,R3
009A70 1A23 10271+ AR R2,R3
009A72 1A23 10272+ AR R2,R3
009A74 1A23 10273+ AR R2,R3
009A76 1A23 10274+ AR R2,R3
009A78 1A23 10275+ AR R2,R3
009A7A 1A23 10276+ AR R2,R3
009A7C 1A23 10277+ AR R2,R3
009A7E 1A23 10278+ AR R2,R3
009A80 1A23 10279+ AR R2,R3
009A82 1A23 10280+ AR R2,R3
009A84 1A23 10281+ AR R2,R3
009A86 1A23 10282+ AR R2,R3
009A88 1A23 10283+ AR R2,R3
009A8A 1A23 10284+ AR R2,R3
009A8C 1A23 10285+ AR R2,R3
009A8E 1A23 10286+ AR R2,R3
009A90 1A23 10287+ AR R2,R3
009A92 1A23 10288+ AR R2,R3
009A94 1A23 10289+ AR R2,R3
009A96 1A23 10290+ AR R2,R3
009A98 1A23 10291+ AR R2,R3
009A9A 1A23 10292+ AR R2,R3
009A9C 1A23 10293+ AR R2,R3
009A9E 1A23 10294+ AR R2,R3
009AA0 1A23 10295+ AR R2,R3
009AA2 1A23 10296+ AR R2,R3
10297+*
009AA4 06FB 10298 BCTR R15,R11
10299 TSIMRET
009AA6 58F0 C100 09AB8 10300+ L R15,=A(SAVETST) R15 := current save area
009AAA 58DF 0004 00004 10301+ L R13,4(R15) get old save area back
009AAE 98EC D00C 0000C 10302+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
009AB2 07FE 10303+ BR 14 RETURN 02000000
10304 TSIMEND
PAGE 190
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009AB8 10305+ LTORG
009AB8 00000458 10306 =A(SAVETST)
09ABC 10307+T200TEND EQU *
10308 *
10309 * Test 201 -- A R,m ----------------------------------------
10310 *
10311 TSIMBEG T201,10000,50,1,C'A R,m'
10312+*
002BE4 10313+TDSCDAT CSECT
002BE8 10314+ DS 0D
10315+*
002BE8 00009AC0 10316+T201TDSC DC A(T201) // TENTRY
002BEC 00000100 10317+ DC A(T201TEND-T201) // TLENGTH
002BF0 00002710 10318+ DC F'10000' // TLRCNT
002BF4 00000032 10319+ DC F'50' // TIGCNT
002BF8 00000001 10320+ DC F'1' // TLTYPE
001398 10321+TEXT CSECT
001398 E3F2F0F1 10322+SPTR0804 DC C'T201'
002BFC 10323+TDSCDAT CSECT
002BFC 10324+ DS 0F
002BFC 04001398 10325+ DC AL1(L'SPTR0804),AL3(SPTR0804)
00139C 10326+TEXT CSECT
00139C C140D96B94 10327+SPTR0805 DC C'A R,m'
002C00 10328+TDSCDAT CSECT
002C00 10329+ DS 0F
002C00 0500139C 10330+ DC AL1(L'SPTR0805),AL3(SPTR0805)
10331+*
004AA8 10332+TDSCTBL CSECT
04AA8 10333+T201TPTR EQU *
004AA8 00002BE8 10334+ DC A(T201TDSC) enabled test
10335+*
009ABC 10336+TCODE CSECT
009AC0 10337+ DS 0D ensure double word alignment for test
009AC0 10338+T201 DS 0H 01650000
009AC0 90EC D00C 0000C 10339+ STM 14,12,12(13) SAVE REGISTERS 02950000
009AC4 18CF 10340+ LR R12,R15 base register := entry address
09AC0 10341+ USING T201,R12 declare code base register
009AC6 41B0 C020 09AE0 10342+ LA R11,T201L load loop target to R11
009ACA 58F0 C0F8 09BB8 10343+ L R15,=A(SAVETST) R15 := current save area
009ACE 50DF 0004 00004 10344+ ST R13,4(R15) set back pointer in current save area
009AD2 182D 10345+ LR R2,R13 remember callers save area
009AD4 18DF 10346+ LR R13,R15 setup current save area
009AD6 50D2 0008 00008 10347+ ST R13,8(R2) set forw pointer in callers save area
00000 10348+ USING TDSC,R1 declare TDSC base register
009ADA 58F0 1008 00008 10349+ L R15,TLRCNT load local repeat count to R15
10350+*
10351 *
009ADE 1722 10352 XR R2,R2
10353 T201L REPINS A,(R2,=F'1') repeat: A R2,=F'1'
10354+*
10355+* build from sublist &ALIST a comma separated string &ARGS
10356+*
10357+*
10358+*
10359+*
PAGE 191
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
10360+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
10361+* this allows to transfer the repeat count from last TDSCGEN call
10362+*
10363+*
09AE0 10364+T201L EQU *
10365+*
10366+* write a comment indicating what REPINS does (in case NOGEN in effect)
10367+*
10368+*,// REPINS: do 50 times:
10369+*
10370+* MNOTE requires that ' is doubled for expanded variables
10371+* thus build &MASTR as a copy of '&ARGS with ' doubled
10372+*
10373+*
10374+*,// A R2,=F'1'
10375+*
10376+* finally generate code: &ICNT copies of &CODE &ARGS
10377+*
009AE0 5A20 C0FC 09BBC 10378+ A R2,=F'1'
009AE4 5A20 C0FC 09BBC 10379+ A R2,=F'1'
009AE8 5A20 C0FC 09BBC 10380+ A R2,=F'1'
009AEC 5A20 C0FC 09BBC 10381+ A R2,=F'1'
009AF0 5A20 C0FC 09BBC 10382+ A R2,=F'1'
009AF4 5A20 C0FC 09BBC 10383+ A R2,=F'1'
009AF8 5A20 C0FC 09BBC 10384+ A R2,=F'1'
009AFC 5A20 C0FC 09BBC 10385+ A R2,=F'1'
009B00 5A20 C0FC 09BBC 10386+ A R2,=F'1'
009B04 5A20 C0FC 09BBC 10387+ A R2,=F'1'
009B08 5A20 C0FC 09BBC 10388+ A R2,=F'1'
009B0C 5A20 C0FC 09BBC 10389+ A R2,=F'1'
009B10 5A20 C0FC 09BBC 10390+ A R2,=F'1'
009B14 5A20 C0FC 09BBC 10391+ A R2,=F'1'
009B18 5A20 C0FC 09BBC 10392+ A R2,=F'1'
009B1C 5A20 C0FC 09BBC 10393+ A R2,=F'1'
009B20 5A20 C0FC 09BBC 10394+ A R2,=F'1'
009B24 5A20 C0FC 09BBC 10395+ A R2,=F'1'
009B28 5A20 C0FC 09BBC 10396+ A R2,=F'1'
009B2C 5A20 C0FC 09BBC 10397+ A R2,=F'1'
009B30 5A20 C0FC 09BBC 10398+ A R2,=F'1'
009B34 5A20 C0FC 09BBC 10399+ A R2,=F'1'
009B38 5A20 C0FC 09BBC 10400+ A R2,=F'1'
009B3C 5A20 C0FC 09BBC 10401+ A R2,=F'1'
009B40 5A20 C0FC 09BBC 10402+ A R2,=F'1'
009B44 5A20 C0FC 09BBC 10403+ A R2,=F'1'
009B48 5A20 C0FC 09BBC 10404+ A R2,=F'1'
009B4C 5A20 C0FC 09BBC 10405+ A R2,=F'1'
009B50 5A20 C0FC 09BBC 10406+ A R2,=F'1'
009B54 5A20 C0FC 09BBC 10407+ A R2,=F'1'
009B58 5A20 C0FC 09BBC 10408+ A R2,=F'1'
009B5C 5A20 C0FC 09BBC 10409+ A R2,=F'1'
009B60 5A20 C0FC 09BBC 10410+ A R2,=F'1'
009B64 5A20 C0FC 09BBC 10411+ A R2,=F'1'
009B68 5A20 C0FC 09BBC 10412+ A R2,=F'1'
009B6C 5A20 C0FC 09BBC 10413+ A R2,=F'1'
009B70 5A20 C0FC 09BBC 10414+ A R2,=F'1'
PAGE 192
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009B74 5A20 C0FC 09BBC 10415+ A R2,=F'1'
009B78 5A20 C0FC 09BBC 10416+ A R2,=F'1'
009B7C 5A20 C0FC 09BBC 10417+ A R2,=F'1'
009B80 5A20 C0FC 09BBC 10418+ A R2,=F'1'
009B84 5A20 C0FC 09BBC 10419+ A R2,=F'1'
009B88 5A20 C0FC 09BBC 10420+ A R2,=F'1'
009B8C 5A20 C0FC 09BBC 10421+ A R2,=F'1'
009B90 5A20 C0FC 09BBC 10422+ A R2,=F'1'
009B94 5A20 C0FC 09BBC 10423+ A R2,=F'1'
009B98 5A20 C0FC 09BBC 10424+ A R2,=F'1'
009B9C 5A20 C0FC 09BBC 10425+ A R2,=F'1'
009BA0 5A20 C0FC 09BBC 10426+ A R2,=F'1'
009BA4 5A20 C0FC 09BBC 10427+ A R2,=F'1'
10428+*
009BA8 06FB 10429 BCTR R15,R11
10430 TSIMRET
009BAA 58F0 C0F8 09BB8 10431+ L R15,=A(SAVETST) R15 := current save area
009BAE 58DF 0004 00004 10432+ L R13,4(R15) get old save area back
009BB2 98EC D00C 0000C 10433+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
009BB6 07FE 10434+ BR 14 RETURN 02000000
10435 TSIMEND
009BB8 10436+ LTORG
009BB8 00000458 10437 =A(SAVETST)
009BBC 00000001 10438 =F'1'
09BC0 10439+T201TEND EQU *
10440 *
10441 * Test 202 -- AH R,m ---------------------------------------
10442 TSIMBEG T202,10000,50,1,C'AH R,m'
10443+*
002C04 10444+TDSCDAT CSECT
002C08 10445+ DS 0D
10446+*
002C08 00009BC0 10447+T202TDSC DC A(T202) // TENTRY
002C0C 000000FE 10448+ DC A(T202TEND-T202) // TLENGTH
002C10 00002710 10449+ DC F'10000' // TLRCNT
002C14 00000032 10450+ DC F'50' // TIGCNT
002C18 00000001 10451+ DC F'1' // TLTYPE
0013A1 10452+TEXT CSECT
0013A1 E3F2F0F2 10453+SPTR0816 DC C'T202'
002C1C 10454+TDSCDAT CSECT
002C1C 10455+ DS 0F
002C1C 040013A1 10456+ DC AL1(L'SPTR0816),AL3(SPTR0816)
0013A5 10457+TEXT CSECT
0013A5 C1C840D96B94 10458+SPTR0817 DC C'AH R,m'
002C20 10459+TDSCDAT CSECT
002C20 10460+ DS 0F
002C20 060013A5 10461+ DC AL1(L'SPTR0817),AL3(SPTR0817)
10462+*
004AAC 10463+TDSCTBL CSECT
04AAC 10464+T202TPTR EQU *
004AAC 00002C08 10465+ DC A(T202TDSC) enabled test
10466+*
009BC0 10467+TCODE CSECT
009BC0 10468+ DS 0D ensure double word alignment for test
009BC0 10469+T202 DS 0H 01650000
PAGE 193
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009BC0 90EC D00C 0000C 10470+ STM 14,12,12(13) SAVE REGISTERS 02950000
009BC4 18CF 10471+ LR R12,R15 base register := entry address
09BC0 10472+ USING T202,R12 declare code base register
009BC6 41B0 C020 09BE0 10473+ LA R11,T202L load loop target to R11
009BCA 58F0 C0F8 09CB8 10474+ L R15,=A(SAVETST) R15 := current save area
009BCE 50DF 0004 00004 10475+ ST R13,4(R15) set back pointer in current save area
009BD2 182D 10476+ LR R2,R13 remember callers save area
009BD4 18DF 10477+ LR R13,R15 setup current save area
009BD6 50D2 0008 00008 10478+ ST R13,8(R2) set forw pointer in callers save area
00000 10479+ USING TDSC,R1 declare TDSC base register
009BDA 58F0 1008 00008 10480+ L R15,TLRCNT load local repeat count to R15
10481+*
10482 *
009BDE 1722 10483 XR R2,R2
10484 T202L REPINS AH,(R2,=H'1') repeat: AH R2,=H'1'
10485+*
10486+* build from sublist &ALIST a comma separated string &ARGS
10487+*
10488+*
10489+*
10490+*
10491+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
10492+* this allows to transfer the repeat count from last TDSCGEN call
10493+*
10494+*
09BE0 10495+T202L EQU *
10496+*
10497+* write a comment indicating what REPINS does (in case NOGEN in effect)
10498+*
10499+*,// REPINS: do 50 times:
10500+*
10501+* MNOTE requires that ' is doubled for expanded variables
10502+* thus build &MASTR as a copy of '&ARGS with ' doubled
10503+*
10504+*
10505+*,// AH R2,=H'1'
10506+*
10507+* finally generate code: &ICNT copies of &CODE &ARGS
10508+*
009BE0 4A20 C0FC 09CBC 10509+ AH R2,=H'1'
009BE4 4A20 C0FC 09CBC 10510+ AH R2,=H'1'
009BE8 4A20 C0FC 09CBC 10511+ AH R2,=H'1'
009BEC 4A20 C0FC 09CBC 10512+ AH R2,=H'1'
009BF0 4A20 C0FC 09CBC 10513+ AH R2,=H'1'
009BF4 4A20 C0FC 09CBC 10514+ AH R2,=H'1'
009BF8 4A20 C0FC 09CBC 10515+ AH R2,=H'1'
009BFC 4A20 C0FC 09CBC 10516+ AH R2,=H'1'
009C00 4A20 C0FC 09CBC 10517+ AH R2,=H'1'
009C04 4A20 C0FC 09CBC 10518+ AH R2,=H'1'
009C08 4A20 C0FC 09CBC 10519+ AH R2,=H'1'
009C0C 4A20 C0FC 09CBC 10520+ AH R2,=H'1'
009C10 4A20 C0FC 09CBC 10521+ AH R2,=H'1'
009C14 4A20 C0FC 09CBC 10522+ AH R2,=H'1'
009C18 4A20 C0FC 09CBC 10523+ AH R2,=H'1'
009C1C 4A20 C0FC 09CBC 10524+ AH R2,=H'1'
PAGE 194
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009C20 4A20 C0FC 09CBC 10525+ AH R2,=H'1'
009C24 4A20 C0FC 09CBC 10526+ AH R2,=H'1'
009C28 4A20 C0FC 09CBC 10527+ AH R2,=H'1'
009C2C 4A20 C0FC 09CBC 10528+ AH R2,=H'1'
009C30 4A20 C0FC 09CBC 10529+ AH R2,=H'1'
009C34 4A20 C0FC 09CBC 10530+ AH R2,=H'1'
009C38 4A20 C0FC 09CBC 10531+ AH R2,=H'1'
009C3C 4A20 C0FC 09CBC 10532+ AH R2,=H'1'
009C40 4A20 C0FC 09CBC 10533+ AH R2,=H'1'
009C44 4A20 C0FC 09CBC 10534+ AH R2,=H'1'
009C48 4A20 C0FC 09CBC 10535+ AH R2,=H'1'
009C4C 4A20 C0FC 09CBC 10536+ AH R2,=H'1'
009C50 4A20 C0FC 09CBC 10537+ AH R2,=H'1'
009C54 4A20 C0FC 09CBC 10538+ AH R2,=H'1'
009C58 4A20 C0FC 09CBC 10539+ AH R2,=H'1'
009C5C 4A20 C0FC 09CBC 10540+ AH R2,=H'1'
009C60 4A20 C0FC 09CBC 10541+ AH R2,=H'1'
009C64 4A20 C0FC 09CBC 10542+ AH R2,=H'1'
009C68 4A20 C0FC 09CBC 10543+ AH R2,=H'1'
009C6C 4A20 C0FC 09CBC 10544+ AH R2,=H'1'
009C70 4A20 C0FC 09CBC 10545+ AH R2,=H'1'
009C74 4A20 C0FC 09CBC 10546+ AH R2,=H'1'
009C78 4A20 C0FC 09CBC 10547+ AH R2,=H'1'
009C7C 4A20 C0FC 09CBC 10548+ AH R2,=H'1'
009C80 4A20 C0FC 09CBC 10549+ AH R2,=H'1'
009C84 4A20 C0FC 09CBC 10550+ AH R2,=H'1'
009C88 4A20 C0FC 09CBC 10551+ AH R2,=H'1'
009C8C 4A20 C0FC 09CBC 10552+ AH R2,=H'1'
009C90 4A20 C0FC 09CBC 10553+ AH R2,=H'1'
009C94 4A20 C0FC 09CBC 10554+ AH R2,=H'1'
009C98 4A20 C0FC 09CBC 10555+ AH R2,=H'1'
009C9C 4A20 C0FC 09CBC 10556+ AH R2,=H'1'
009CA0 4A20 C0FC 09CBC 10557+ AH R2,=H'1'
009CA4 4A20 C0FC 09CBC 10558+ AH R2,=H'1'
10559+*
009CA8 06FB 10560 BCTR R15,R11
10561 TSIMRET
009CAA 58F0 C0F8 09CB8 10562+ L R15,=A(SAVETST) R15 := current save area
009CAE 58DF 0004 00004 10563+ L R13,4(R15) get old save area back
009CB2 98EC D00C 0000C 10564+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
009CB6 07FE 10565+ BR 14 RETURN 02000000
10566 TSIMEND
009CB8 10567+ LTORG
009CB8 00000458 10568 =A(SAVETST)
009CBC 0001 10569 =H'1'
09CBE 10570+T202TEND EQU *
10571 *
10572 * Test 203 -- ALR R,R --------------------------------------
10573 *
10574 TSIMBEG T203,17000,100,1,C'ALR R,R'
10575+*
002C24 10576+TDSCDAT CSECT
002C28 10577+ DS 0D
10578+*
002C28 00009CC0 10579+T203TDSC DC A(T203) // TENTRY
PAGE 195
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002C2C 00000104 10580+ DC A(T203TEND-T203) // TLENGTH
002C30 00004268 10581+ DC F'17000' // TLRCNT
002C34 00000064 10582+ DC F'100' // TIGCNT
002C38 00000001 10583+ DC F'1' // TLTYPE
0013AB 10584+TEXT CSECT
0013AB E3F2F0F3 10585+SPTR0828 DC C'T203'
002C3C 10586+TDSCDAT CSECT
002C3C 10587+ DS 0F
002C3C 040013AB 10588+ DC AL1(L'SPTR0828),AL3(SPTR0828)
0013AF 10589+TEXT CSECT
0013AF C1D3D940D96BD9 10590+SPTR0829 DC C'ALR R,R'
002C40 10591+TDSCDAT CSECT
002C40 10592+ DS 0F
002C40 070013AF 10593+ DC AL1(L'SPTR0829),AL3(SPTR0829)
10594+*
004AB0 10595+TDSCTBL CSECT
04AB0 10596+T203TPTR EQU *
004AB0 00002C28 10597+ DC A(T203TDSC) enabled test
10598+*
009CBE 10599+TCODE CSECT
009CC0 10600+ DS 0D ensure double word alignment for test
009CC0 10601+T203 DS 0H 01650000
009CC0 90EC D00C 0000C 10602+ STM 14,12,12(13) SAVE REGISTERS 02950000
009CC4 18CF 10603+ LR R12,R15 base register := entry address
09CC0 10604+ USING T203,R12 declare code base register
009CC6 41B0 C024 09CE4 10605+ LA R11,T203L load loop target to R11
009CCA 58F0 C100 09DC0 10606+ L R15,=A(SAVETST) R15 := current save area
009CCE 50DF 0004 00004 10607+ ST R13,4(R15) set back pointer in current save area
009CD2 182D 10608+ LR R2,R13 remember callers save area
009CD4 18DF 10609+ LR R13,R15 setup current save area
009CD6 50D2 0008 00008 10610+ ST R13,8(R2) set forw pointer in callers save area
00000 10611+ USING TDSC,R1 declare TDSC base register
009CDA 58F0 1008 00008 10612+ L R15,TLRCNT load local repeat count to R15
10613+*
10614 *
009CDE 1722 10615 XR R2,R2
009CE0 4130 0001 00001 10616 LA R3,1
10617 T203L REPINS ALR,(R2,R3) repeat: ALR R2,R3
10618+*
10619+* build from sublist &ALIST a comma separated string &ARGS
10620+*
10621+*
10622+*
10623+*
10624+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
10625+* this allows to transfer the repeat count from last TDSCGEN call
10626+*
10627+*
09CE4 10628+T203L EQU *
10629+*
10630+* write a comment indicating what REPINS does (in case NOGEN in effect)
10631+*
10632+*,// REPINS: do 100 times:
10633+*
10634+* MNOTE requires that ' is doubled for expanded variables
PAGE 196
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
10635+* thus build &MASTR as a copy of '&ARGS with ' doubled
10636+*
10637+*
10638+*,// ALR R2,R3
10639+*
10640+* finally generate code: &ICNT copies of &CODE &ARGS
10641+*
009CE4 1E23 10642+ ALR R2,R3
009CE6 1E23 10643+ ALR R2,R3
009CE8 1E23 10644+ ALR R2,R3
009CEA 1E23 10645+ ALR R2,R3
009CEC 1E23 10646+ ALR R2,R3
009CEE 1E23 10647+ ALR R2,R3
009CF0 1E23 10648+ ALR R2,R3
009CF2 1E23 10649+ ALR R2,R3
009CF4 1E23 10650+ ALR R2,R3
009CF6 1E23 10651+ ALR R2,R3
009CF8 1E23 10652+ ALR R2,R3
009CFA 1E23 10653+ ALR R2,R3
009CFC 1E23 10654+ ALR R2,R3
009CFE 1E23 10655+ ALR R2,R3
009D00 1E23 10656+ ALR R2,R3
009D02 1E23 10657+ ALR R2,R3
009D04 1E23 10658+ ALR R2,R3
009D06 1E23 10659+ ALR R2,R3
009D08 1E23 10660+ ALR R2,R3
009D0A 1E23 10661+ ALR R2,R3
009D0C 1E23 10662+ ALR R2,R3
009D0E 1E23 10663+ ALR R2,R3
009D10 1E23 10664+ ALR R2,R3
009D12 1E23 10665+ ALR R2,R3
009D14 1E23 10666+ ALR R2,R3
009D16 1E23 10667+ ALR R2,R3
009D18 1E23 10668+ ALR R2,R3
009D1A 1E23 10669+ ALR R2,R3
009D1C 1E23 10670+ ALR R2,R3
009D1E 1E23 10671+ ALR R2,R3
009D20 1E23 10672+ ALR R2,R3
009D22 1E23 10673+ ALR R2,R3
009D24 1E23 10674+ ALR R2,R3
009D26 1E23 10675+ ALR R2,R3
009D28 1E23 10676+ ALR R2,R3
009D2A 1E23 10677+ ALR R2,R3
009D2C 1E23 10678+ ALR R2,R3
009D2E 1E23 10679+ ALR R2,R3
009D30 1E23 10680+ ALR R2,R3
009D32 1E23 10681+ ALR R2,R3
009D34 1E23 10682+ ALR R2,R3
009D36 1E23 10683+ ALR R2,R3
009D38 1E23 10684+ ALR R2,R3
009D3A 1E23 10685+ ALR R2,R3
009D3C 1E23 10686+ ALR R2,R3
009D3E 1E23 10687+ ALR R2,R3
009D40 1E23 10688+ ALR R2,R3
009D42 1E23 10689+ ALR R2,R3
PAGE 197
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009D44 1E23 10690+ ALR R2,R3
009D46 1E23 10691+ ALR R2,R3
009D48 1E23 10692+ ALR R2,R3
009D4A 1E23 10693+ ALR R2,R3
009D4C 1E23 10694+ ALR R2,R3
009D4E 1E23 10695+ ALR R2,R3
009D50 1E23 10696+ ALR R2,R3
009D52 1E23 10697+ ALR R2,R3
009D54 1E23 10698+ ALR R2,R3
009D56 1E23 10699+ ALR R2,R3
009D58 1E23 10700+ ALR R2,R3
009D5A 1E23 10701+ ALR R2,R3
009D5C 1E23 10702+ ALR R2,R3
009D5E 1E23 10703+ ALR R2,R3
009D60 1E23 10704+ ALR R2,R3
009D62 1E23 10705+ ALR R2,R3
009D64 1E23 10706+ ALR R2,R3
009D66 1E23 10707+ ALR R2,R3
009D68 1E23 10708+ ALR R2,R3
009D6A 1E23 10709+ ALR R2,R3
009D6C 1E23 10710+ ALR R2,R3
009D6E 1E23 10711+ ALR R2,R3
009D70 1E23 10712+ ALR R2,R3
009D72 1E23 10713+ ALR R2,R3
009D74 1E23 10714+ ALR R2,R3
009D76 1E23 10715+ ALR R2,R3
009D78 1E23 10716+ ALR R2,R3
009D7A 1E23 10717+ ALR R2,R3
009D7C 1E23 10718+ ALR R2,R3
009D7E 1E23 10719+ ALR R2,R3
009D80 1E23 10720+ ALR R2,R3
009D82 1E23 10721+ ALR R2,R3
009D84 1E23 10722+ ALR R2,R3
009D86 1E23 10723+ ALR R2,R3
009D88 1E23 10724+ ALR R2,R3
009D8A 1E23 10725+ ALR R2,R3
009D8C 1E23 10726+ ALR R2,R3
009D8E 1E23 10727+ ALR R2,R3
009D90 1E23 10728+ ALR R2,R3
009D92 1E23 10729+ ALR R2,R3
009D94 1E23 10730+ ALR R2,R3
009D96 1E23 10731+ ALR R2,R3
009D98 1E23 10732+ ALR R2,R3
009D9A 1E23 10733+ ALR R2,R3
009D9C 1E23 10734+ ALR R2,R3
009D9E 1E23 10735+ ALR R2,R3
009DA0 1E23 10736+ ALR R2,R3
009DA2 1E23 10737+ ALR R2,R3
009DA4 1E23 10738+ ALR R2,R3
009DA6 1E23 10739+ ALR R2,R3
009DA8 1E23 10740+ ALR R2,R3
009DAA 1E23 10741+ ALR R2,R3
10742+*
009DAC 06FB 10743 BCTR R15,R11
10744 TSIMRET
PAGE 198
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009DAE 58F0 C100 09DC0 10745+ L R15,=A(SAVETST) R15 := current save area
009DB2 58DF 0004 00004 10746+ L R13,4(R15) get old save area back
009DB6 98EC D00C 0000C 10747+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
009DBA 07FE 10748+ BR 14 RETURN 02000000
10749 TSIMEND
009DC0 10750+ LTORG
009DC0 00000458 10751 =A(SAVETST)
09DC4 10752+T203TEND EQU *
10753 *
10754 * Test 204 -- AL R,m ---------------------------------------
10755 *
10756 TSIMBEG T204,10000,50,1,C'AL R,m'
10757+*
002C44 10758+TDSCDAT CSECT
002C48 10759+ DS 0D
10760+*
002C48 00009DC8 10761+T204TDSC DC A(T204) // TENTRY
002C4C 00000100 10762+ DC A(T204TEND-T204) // TLENGTH
002C50 00002710 10763+ DC F'10000' // TLRCNT
002C54 00000032 10764+ DC F'50' // TIGCNT
002C58 00000001 10765+ DC F'1' // TLTYPE
0013B6 10766+TEXT CSECT
0013B6 E3F2F0F4 10767+SPTR0840 DC C'T204'
002C5C 10768+TDSCDAT CSECT
002C5C 10769+ DS 0F
002C5C 040013B6 10770+ DC AL1(L'SPTR0840),AL3(SPTR0840)
0013BA 10771+TEXT CSECT
0013BA C1D340D96B94 10772+SPTR0841 DC C'AL R,m'
002C60 10773+TDSCDAT CSECT
002C60 10774+ DS 0F
002C60 060013BA 10775+ DC AL1(L'SPTR0841),AL3(SPTR0841)
10776+*
004AB4 10777+TDSCTBL CSECT
04AB4 10778+T204TPTR EQU *
004AB4 00002C48 10779+ DC A(T204TDSC) enabled test
10780+*
009DC4 10781+TCODE CSECT
009DC8 10782+ DS 0D ensure double word alignment for test
009DC8 10783+T204 DS 0H 01650000
009DC8 90EC D00C 0000C 10784+ STM 14,12,12(13) SAVE REGISTERS 02950000
009DCC 18CF 10785+ LR R12,R15 base register := entry address
09DC8 10786+ USING T204,R12 declare code base register
009DCE 41B0 C020 09DE8 10787+ LA R11,T204L load loop target to R11
009DD2 58F0 C0F8 09EC0 10788+ L R15,=A(SAVETST) R15 := current save area
009DD6 50DF 0004 00004 10789+ ST R13,4(R15) set back pointer in current save area
009DDA 182D 10790+ LR R2,R13 remember callers save area
009DDC 18DF 10791+ LR R13,R15 setup current save area
009DDE 50D2 0008 00008 10792+ ST R13,8(R2) set forw pointer in callers save area
00000 10793+ USING TDSC,R1 declare TDSC base register
009DE2 58F0 1008 00008 10794+ L R15,TLRCNT load local repeat count to R15
10795+*
10796 *
009DE6 1722 10797 XR R2,R2
10798 T204L REPINS AL,(R2,=F'1') repeat: AL R2,=F'1'
10799+*
PAGE 199
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
10800+* build from sublist &ALIST a comma separated string &ARGS
10801+*
10802+*
10803+*
10804+*
10805+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
10806+* this allows to transfer the repeat count from last TDSCGEN call
10807+*
10808+*
09DE8 10809+T204L EQU *
10810+*
10811+* write a comment indicating what REPINS does (in case NOGEN in effect)
10812+*
10813+*,// REPINS: do 50 times:
10814+*
10815+* MNOTE requires that ' is doubled for expanded variables
10816+* thus build &MASTR as a copy of '&ARGS with ' doubled
10817+*
10818+*
10819+*,// AL R2,=F'1'
10820+*
10821+* finally generate code: &ICNT copies of &CODE &ARGS
10822+*
009DE8 5E20 C0FC 09EC4 10823+ AL R2,=F'1'
009DEC 5E20 C0FC 09EC4 10824+ AL R2,=F'1'
009DF0 5E20 C0FC 09EC4 10825+ AL R2,=F'1'
009DF4 5E20 C0FC 09EC4 10826+ AL R2,=F'1'
009DF8 5E20 C0FC 09EC4 10827+ AL R2,=F'1'
009DFC 5E20 C0FC 09EC4 10828+ AL R2,=F'1'
009E00 5E20 C0FC 09EC4 10829+ AL R2,=F'1'
009E04 5E20 C0FC 09EC4 10830+ AL R2,=F'1'
009E08 5E20 C0FC 09EC4 10831+ AL R2,=F'1'
009E0C 5E20 C0FC 09EC4 10832+ AL R2,=F'1'
009E10 5E20 C0FC 09EC4 10833+ AL R2,=F'1'
009E14 5E20 C0FC 09EC4 10834+ AL R2,=F'1'
009E18 5E20 C0FC 09EC4 10835+ AL R2,=F'1'
009E1C 5E20 C0FC 09EC4 10836+ AL R2,=F'1'
009E20 5E20 C0FC 09EC4 10837+ AL R2,=F'1'
009E24 5E20 C0FC 09EC4 10838+ AL R2,=F'1'
009E28 5E20 C0FC 09EC4 10839+ AL R2,=F'1'
009E2C 5E20 C0FC 09EC4 10840+ AL R2,=F'1'
009E30 5E20 C0FC 09EC4 10841+ AL R2,=F'1'
009E34 5E20 C0FC 09EC4 10842+ AL R2,=F'1'
009E38 5E20 C0FC 09EC4 10843+ AL R2,=F'1'
009E3C 5E20 C0FC 09EC4 10844+ AL R2,=F'1'
009E40 5E20 C0FC 09EC4 10845+ AL R2,=F'1'
009E44 5E20 C0FC 09EC4 10846+ AL R2,=F'1'
009E48 5E20 C0FC 09EC4 10847+ AL R2,=F'1'
009E4C 5E20 C0FC 09EC4 10848+ AL R2,=F'1'
009E50 5E20 C0FC 09EC4 10849+ AL R2,=F'1'
009E54 5E20 C0FC 09EC4 10850+ AL R2,=F'1'
009E58 5E20 C0FC 09EC4 10851+ AL R2,=F'1'
009E5C 5E20 C0FC 09EC4 10852+ AL R2,=F'1'
009E60 5E20 C0FC 09EC4 10853+ AL R2,=F'1'
009E64 5E20 C0FC 09EC4 10854+ AL R2,=F'1'
PAGE 200
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009E68 5E20 C0FC 09EC4 10855+ AL R2,=F'1'
009E6C 5E20 C0FC 09EC4 10856+ AL R2,=F'1'
009E70 5E20 C0FC 09EC4 10857+ AL R2,=F'1'
009E74 5E20 C0FC 09EC4 10858+ AL R2,=F'1'
009E78 5E20 C0FC 09EC4 10859+ AL R2,=F'1'
009E7C 5E20 C0FC 09EC4 10860+ AL R2,=F'1'
009E80 5E20 C0FC 09EC4 10861+ AL R2,=F'1'
009E84 5E20 C0FC 09EC4 10862+ AL R2,=F'1'
009E88 5E20 C0FC 09EC4 10863+ AL R2,=F'1'
009E8C 5E20 C0FC 09EC4 10864+ AL R2,=F'1'
009E90 5E20 C0FC 09EC4 10865+ AL R2,=F'1'
009E94 5E20 C0FC 09EC4 10866+ AL R2,=F'1'
009E98 5E20 C0FC 09EC4 10867+ AL R2,=F'1'
009E9C 5E20 C0FC 09EC4 10868+ AL R2,=F'1'
009EA0 5E20 C0FC 09EC4 10869+ AL R2,=F'1'
009EA4 5E20 C0FC 09EC4 10870+ AL R2,=F'1'
009EA8 5E20 C0FC 09EC4 10871+ AL R2,=F'1'
009EAC 5E20 C0FC 09EC4 10872+ AL R2,=F'1'
10873+*
009EB0 06FB 10874 BCTR R15,R11
10875 TSIMRET
009EB2 58F0 C0F8 09EC0 10876+ L R15,=A(SAVETST) R15 := current save area
009EB6 58DF 0004 00004 10877+ L R13,4(R15) get old save area back
009EBA 98EC D00C 0000C 10878+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
009EBE 07FE 10879+ BR 14 RETURN 02000000
10880 TSIMEND
009EC0 10881+ LTORG
009EC0 00000458 10882 =A(SAVETST)
009EC4 00000001 10883 =F'1'
09EC8 10884+T204TEND EQU *
10885 *
10886 * Test 205 -- SR R,R ---------------------------------------
10887 *
10888 TSIMBEG T205,14000,100,1,C'SR R,R'
10889+*
002C64 10890+TDSCDAT CSECT
002C68 10891+ DS 0D
10892+*
002C68 00009EC8 10893+T205TDSC DC A(T205) // TENTRY
002C6C 00000104 10894+ DC A(T205TEND-T205) // TLENGTH
002C70 000036B0 10895+ DC F'14000' // TLRCNT
002C74 00000064 10896+ DC F'100' // TIGCNT
002C78 00000001 10897+ DC F'1' // TLTYPE
0013C0 10898+TEXT CSECT
0013C0 E3F2F0F5 10899+SPTR0852 DC C'T205'
002C7C 10900+TDSCDAT CSECT
002C7C 10901+ DS 0F
002C7C 040013C0 10902+ DC AL1(L'SPTR0852),AL3(SPTR0852)
0013C4 10903+TEXT CSECT
0013C4 E2D940D96BD9 10904+SPTR0853 DC C'SR R,R'
002C80 10905+TDSCDAT CSECT
002C80 10906+ DS 0F
002C80 060013C4 10907+ DC AL1(L'SPTR0853),AL3(SPTR0853)
10908+*
004AB8 10909+TDSCTBL CSECT
PAGE 201
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
04AB8 10910+T205TPTR EQU *
004AB8 00002C68 10911+ DC A(T205TDSC) enabled test
10912+*
009EC8 10913+TCODE CSECT
009EC8 10914+ DS 0D ensure double word alignment for test
009EC8 10915+T205 DS 0H 01650000
009EC8 90EC D00C 0000C 10916+ STM 14,12,12(13) SAVE REGISTERS 02950000
009ECC 18CF 10917+ LR R12,R15 base register := entry address
09EC8 10918+ USING T205,R12 declare code base register
009ECE 41B0 C024 09EEC 10919+ LA R11,T205L load loop target to R11
009ED2 58F0 C100 09FC8 10920+ L R15,=A(SAVETST) R15 := current save area
009ED6 50DF 0004 00004 10921+ ST R13,4(R15) set back pointer in current save area
009EDA 182D 10922+ LR R2,R13 remember callers save area
009EDC 18DF 10923+ LR R13,R15 setup current save area
009EDE 50D2 0008 00008 10924+ ST R13,8(R2) set forw pointer in callers save area
00000 10925+ USING TDSC,R1 declare TDSC base register
009EE2 58F0 1008 00008 10926+ L R15,TLRCNT load local repeat count to R15
10927+*
10928 *
009EE6 1722 10929 XR R2,R2
009EE8 4130 0001 00001 10930 LA R3,1
10931 T205L REPINS SR,(R2,R3) repeat: SR R2,R3
10932+*
10933+* build from sublist &ALIST a comma separated string &ARGS
10934+*
10935+*
10936+*
10937+*
10938+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
10939+* this allows to transfer the repeat count from last TDSCGEN call
10940+*
10941+*
09EEC 10942+T205L EQU *
10943+*
10944+* write a comment indicating what REPINS does (in case NOGEN in effect)
10945+*
10946+*,// REPINS: do 100 times:
10947+*
10948+* MNOTE requires that ' is doubled for expanded variables
10949+* thus build &MASTR as a copy of '&ARGS with ' doubled
10950+*
10951+*
10952+*,// SR R2,R3
10953+*
10954+* finally generate code: &ICNT copies of &CODE &ARGS
10955+*
009EEC 1B23 10956+ SR R2,R3
009EEE 1B23 10957+ SR R2,R3
009EF0 1B23 10958+ SR R2,R3
009EF2 1B23 10959+ SR R2,R3
009EF4 1B23 10960+ SR R2,R3
009EF6 1B23 10961+ SR R2,R3
009EF8 1B23 10962+ SR R2,R3
009EFA 1B23 10963+ SR R2,R3
009EFC 1B23 10964+ SR R2,R3
PAGE 202
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009EFE 1B23 10965+ SR R2,R3
009F00 1B23 10966+ SR R2,R3
009F02 1B23 10967+ SR R2,R3
009F04 1B23 10968+ SR R2,R3
009F06 1B23 10969+ SR R2,R3
009F08 1B23 10970+ SR R2,R3
009F0A 1B23 10971+ SR R2,R3
009F0C 1B23 10972+ SR R2,R3
009F0E 1B23 10973+ SR R2,R3
009F10 1B23 10974+ SR R2,R3
009F12 1B23 10975+ SR R2,R3
009F14 1B23 10976+ SR R2,R3
009F16 1B23 10977+ SR R2,R3
009F18 1B23 10978+ SR R2,R3
009F1A 1B23 10979+ SR R2,R3
009F1C 1B23 10980+ SR R2,R3
009F1E 1B23 10981+ SR R2,R3
009F20 1B23 10982+ SR R2,R3
009F22 1B23 10983+ SR R2,R3
009F24 1B23 10984+ SR R2,R3
009F26 1B23 10985+ SR R2,R3
009F28 1B23 10986+ SR R2,R3
009F2A 1B23 10987+ SR R2,R3
009F2C 1B23 10988+ SR R2,R3
009F2E 1B23 10989+ SR R2,R3
009F30 1B23 10990+ SR R2,R3
009F32 1B23 10991+ SR R2,R3
009F34 1B23 10992+ SR R2,R3
009F36 1B23 10993+ SR R2,R3
009F38 1B23 10994+ SR R2,R3
009F3A 1B23 10995+ SR R2,R3
009F3C 1B23 10996+ SR R2,R3
009F3E 1B23 10997+ SR R2,R3
009F40 1B23 10998+ SR R2,R3
009F42 1B23 10999+ SR R2,R3
009F44 1B23 11000+ SR R2,R3
009F46 1B23 11001+ SR R2,R3
009F48 1B23 11002+ SR R2,R3
009F4A 1B23 11003+ SR R2,R3
009F4C 1B23 11004+ SR R2,R3
009F4E 1B23 11005+ SR R2,R3
009F50 1B23 11006+ SR R2,R3
009F52 1B23 11007+ SR R2,R3
009F54 1B23 11008+ SR R2,R3
009F56 1B23 11009+ SR R2,R3
009F58 1B23 11010+ SR R2,R3
009F5A 1B23 11011+ SR R2,R3
009F5C 1B23 11012+ SR R2,R3
009F5E 1B23 11013+ SR R2,R3
009F60 1B23 11014+ SR R2,R3
009F62 1B23 11015+ SR R2,R3
009F64 1B23 11016+ SR R2,R3
009F66 1B23 11017+ SR R2,R3
009F68 1B23 11018+ SR R2,R3
009F6A 1B23 11019+ SR R2,R3
PAGE 203
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
009F6C 1B23 11020+ SR R2,R3
009F6E 1B23 11021+ SR R2,R3
009F70 1B23 11022+ SR R2,R3
009F72 1B23 11023+ SR R2,R3
009F74 1B23 11024+ SR R2,R3
009F76 1B23 11025+ SR R2,R3
009F78 1B23 11026+ SR R2,R3
009F7A 1B23 11027+ SR R2,R3
009F7C 1B23 11028+ SR R2,R3
009F7E 1B23 11029+ SR R2,R3
009F80 1B23 11030+ SR R2,R3
009F82 1B23 11031+ SR R2,R3
009F84 1B23 11032+ SR R2,R3
009F86 1B23 11033+ SR R2,R3
009F88 1B23 11034+ SR R2,R3
009F8A 1B23 11035+ SR R2,R3
009F8C 1B23 11036+ SR R2,R3
009F8E 1B23 11037+ SR R2,R3
009F90 1B23 11038+ SR R2,R3
009F92 1B23 11039+ SR R2,R3
009F94 1B23 11040+ SR R2,R3
009F96 1B23 11041+ SR R2,R3
009F98 1B23 11042+ SR R2,R3
009F9A 1B23 11043+ SR R2,R3
009F9C 1B23 11044+ SR R2,R3
009F9E 1B23 11045+ SR R2,R3
009FA0 1B23 11046+ SR R2,R3
009FA2 1B23 11047+ SR R2,R3
009FA4 1B23 11048+ SR R2,R3
009FA6 1B23 11049+ SR R2,R3
009FA8 1B23 11050+ SR R2,R3
009FAA 1B23 11051+ SR R2,R3
009FAC 1B23 11052+ SR R2,R3
009FAE 1B23 11053+ SR R2,R3
009FB0 1B23 11054+ SR R2,R3
009FB2 1B23 11055+ SR R2,R3
11056+*
009FB4 06FB 11057 BCTR R15,R11
11058 TSIMRET
009FB6 58F0 C100 09FC8 11059+ L R15,=A(SAVETST) R15 := current save area
009FBA 58DF 0004 00004 11060+ L R13,4(R15) get old save area back
009FBE 98EC D00C 0000C 11061+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
009FC2 07FE 11062+ BR 14 RETURN 02000000
11063 TSIMEND
009FC8 11064+ LTORG
009FC8 00000458 11065 =A(SAVETST)
09FCC 11066+T205TEND EQU *
11067 *
11068 * Test 206 -- S R,m ----------------------------------------
11069 *
11070 TSIMBEG T206,10000,50,1,C'S R,m'
11071+*
002C84 11072+TDSCDAT CSECT
002C88 11073+ DS 0D
11074+*
PAGE 204
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002C88 00009FD0 11075+T206TDSC DC A(T206) // TENTRY
002C8C 00000100 11076+ DC A(T206TEND-T206) // TLENGTH
002C90 00002710 11077+ DC F'10000' // TLRCNT
002C94 00000032 11078+ DC F'50' // TIGCNT
002C98 00000001 11079+ DC F'1' // TLTYPE
0013CA 11080+TEXT CSECT
0013CA E3F2F0F6 11081+SPTR0864 DC C'T206'
002C9C 11082+TDSCDAT CSECT
002C9C 11083+ DS 0F
002C9C 040013CA 11084+ DC AL1(L'SPTR0864),AL3(SPTR0864)
0013CE 11085+TEXT CSECT
0013CE E240D96B94 11086+SPTR0865 DC C'S R,m'
002CA0 11087+TDSCDAT CSECT
002CA0 11088+ DS 0F
002CA0 050013CE 11089+ DC AL1(L'SPTR0865),AL3(SPTR0865)
11090+*
004ABC 11091+TDSCTBL CSECT
04ABC 11092+T206TPTR EQU *
004ABC 00002C88 11093+ DC A(T206TDSC) enabled test
11094+*
009FCC 11095+TCODE CSECT
009FD0 11096+ DS 0D ensure double word alignment for test
009FD0 11097+T206 DS 0H 01650000
009FD0 90EC D00C 0000C 11098+ STM 14,12,12(13) SAVE REGISTERS 02950000
009FD4 18CF 11099+ LR R12,R15 base register := entry address
09FD0 11100+ USING T206,R12 declare code base register
009FD6 41B0 C020 09FF0 11101+ LA R11,T206L load loop target to R11
009FDA 58F0 C0F8 0A0C8 11102+ L R15,=A(SAVETST) R15 := current save area
009FDE 50DF 0004 00004 11103+ ST R13,4(R15) set back pointer in current save area
009FE2 182D 11104+ LR R2,R13 remember callers save area
009FE4 18DF 11105+ LR R13,R15 setup current save area
009FE6 50D2 0008 00008 11106+ ST R13,8(R2) set forw pointer in callers save area
00000 11107+ USING TDSC,R1 declare TDSC base register
009FEA 58F0 1008 00008 11108+ L R15,TLRCNT load local repeat count to R15
11109+*
11110 *
009FEE 1722 11111 XR R2,R2
11112 T206L REPINS S,(R2,=F'1') repeat: S R2,=F'1'
11113+*
11114+* build from sublist &ALIST a comma separated string &ARGS
11115+*
11116+*
11117+*
11118+*
11119+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
11120+* this allows to transfer the repeat count from last TDSCGEN call
11121+*
11122+*
09FF0 11123+T206L EQU *
11124+*
11125+* write a comment indicating what REPINS does (in case NOGEN in effect)
11126+*
11127+*,// REPINS: do 50 times:
11128+*
11129+* MNOTE requires that ' is doubled for expanded variables
PAGE 205
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
11130+* thus build &MASTR as a copy of '&ARGS with ' doubled
11131+*
11132+*
11133+*,// S R2,=F'1'
11134+*
11135+* finally generate code: &ICNT copies of &CODE &ARGS
11136+*
009FF0 5B20 C0FC 0A0CC 11137+ S R2,=F'1'
009FF4 5B20 C0FC 0A0CC 11138+ S R2,=F'1'
009FF8 5B20 C0FC 0A0CC 11139+ S R2,=F'1'
009FFC 5B20 C0FC 0A0CC 11140+ S R2,=F'1'
00A000 5B20 C0FC 0A0CC 11141+ S R2,=F'1'
00A004 5B20 C0FC 0A0CC 11142+ S R2,=F'1'
00A008 5B20 C0FC 0A0CC 11143+ S R2,=F'1'
00A00C 5B20 C0FC 0A0CC 11144+ S R2,=F'1'
00A010 5B20 C0FC 0A0CC 11145+ S R2,=F'1'
00A014 5B20 C0FC 0A0CC 11146+ S R2,=F'1'
00A018 5B20 C0FC 0A0CC 11147+ S R2,=F'1'
00A01C 5B20 C0FC 0A0CC 11148+ S R2,=F'1'
00A020 5B20 C0FC 0A0CC 11149+ S R2,=F'1'
00A024 5B20 C0FC 0A0CC 11150+ S R2,=F'1'
00A028 5B20 C0FC 0A0CC 11151+ S R2,=F'1'
00A02C 5B20 C0FC 0A0CC 11152+ S R2,=F'1'
00A030 5B20 C0FC 0A0CC 11153+ S R2,=F'1'
00A034 5B20 C0FC 0A0CC 11154+ S R2,=F'1'
00A038 5B20 C0FC 0A0CC 11155+ S R2,=F'1'
00A03C 5B20 C0FC 0A0CC 11156+ S R2,=F'1'
00A040 5B20 C0FC 0A0CC 11157+ S R2,=F'1'
00A044 5B20 C0FC 0A0CC 11158+ S R2,=F'1'
00A048 5B20 C0FC 0A0CC 11159+ S R2,=F'1'
00A04C 5B20 C0FC 0A0CC 11160+ S R2,=F'1'
00A050 5B20 C0FC 0A0CC 11161+ S R2,=F'1'
00A054 5B20 C0FC 0A0CC 11162+ S R2,=F'1'
00A058 5B20 C0FC 0A0CC 11163+ S R2,=F'1'
00A05C 5B20 C0FC 0A0CC 11164+ S R2,=F'1'
00A060 5B20 C0FC 0A0CC 11165+ S R2,=F'1'
00A064 5B20 C0FC 0A0CC 11166+ S R2,=F'1'
00A068 5B20 C0FC 0A0CC 11167+ S R2,=F'1'
00A06C 5B20 C0FC 0A0CC 11168+ S R2,=F'1'
00A070 5B20 C0FC 0A0CC 11169+ S R2,=F'1'
00A074 5B20 C0FC 0A0CC 11170+ S R2,=F'1'
00A078 5B20 C0FC 0A0CC 11171+ S R2,=F'1'
00A07C 5B20 C0FC 0A0CC 11172+ S R2,=F'1'
00A080 5B20 C0FC 0A0CC 11173+ S R2,=F'1'
00A084 5B20 C0FC 0A0CC 11174+ S R2,=F'1'
00A088 5B20 C0FC 0A0CC 11175+ S R2,=F'1'
00A08C 5B20 C0FC 0A0CC 11176+ S R2,=F'1'
00A090 5B20 C0FC 0A0CC 11177+ S R2,=F'1'
00A094 5B20 C0FC 0A0CC 11178+ S R2,=F'1'
00A098 5B20 C0FC 0A0CC 11179+ S R2,=F'1'
00A09C 5B20 C0FC 0A0CC 11180+ S R2,=F'1'
00A0A0 5B20 C0FC 0A0CC 11181+ S R2,=F'1'
00A0A4 5B20 C0FC 0A0CC 11182+ S R2,=F'1'
00A0A8 5B20 C0FC 0A0CC 11183+ S R2,=F'1'
00A0AC 5B20 C0FC 0A0CC 11184+ S R2,=F'1'
PAGE 206
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A0B0 5B20 C0FC 0A0CC 11185+ S R2,=F'1'
00A0B4 5B20 C0FC 0A0CC 11186+ S R2,=F'1'
11187+*
00A0B8 06FB 11188 BCTR R15,R11
11189 TSIMRET
00A0BA 58F0 C0F8 0A0C8 11190+ L R15,=A(SAVETST) R15 := current save area
00A0BE 58DF 0004 00004 11191+ L R13,4(R15) get old save area back
00A0C2 98EC D00C 0000C 11192+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A0C6 07FE 11193+ BR 14 RETURN 02000000
11194 TSIMEND
00A0C8 11195+ LTORG
00A0C8 00000458 11196 =A(SAVETST)
00A0CC 00000001 11197 =F'1'
0A0D0 11198+T206TEND EQU *
11199 *
11200 * Test 207 -- SH R,m ---------------------------------------
11201 *
11202 TSIMBEG T207,10000,50,1,C'SH R,m'
11203+*
002CA4 11204+TDSCDAT CSECT
002CA8 11205+ DS 0D
11206+*
002CA8 0000A0D0 11207+T207TDSC DC A(T207) // TENTRY
002CAC 000000FE 11208+ DC A(T207TEND-T207) // TLENGTH
002CB0 00002710 11209+ DC F'10000' // TLRCNT
002CB4 00000032 11210+ DC F'50' // TIGCNT
002CB8 00000001 11211+ DC F'1' // TLTYPE
0013D3 11212+TEXT CSECT
0013D3 E3F2F0F7 11213+SPTR0876 DC C'T207'
002CBC 11214+TDSCDAT CSECT
002CBC 11215+ DS 0F
002CBC 040013D3 11216+ DC AL1(L'SPTR0876),AL3(SPTR0876)
0013D7 11217+TEXT CSECT
0013D7 E2C840D96B94 11218+SPTR0877 DC C'SH R,m'
002CC0 11219+TDSCDAT CSECT
002CC0 11220+ DS 0F
002CC0 060013D7 11221+ DC AL1(L'SPTR0877),AL3(SPTR0877)
11222+*
004AC0 11223+TDSCTBL CSECT
04AC0 11224+T207TPTR EQU *
004AC0 00002CA8 11225+ DC A(T207TDSC) enabled test
11226+*
00A0D0 11227+TCODE CSECT
00A0D0 11228+ DS 0D ensure double word alignment for test
00A0D0 11229+T207 DS 0H 01650000
00A0D0 90EC D00C 0000C 11230+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A0D4 18CF 11231+ LR R12,R15 base register := entry address
0A0D0 11232+ USING T207,R12 declare code base register
00A0D6 41B0 C020 0A0F0 11233+ LA R11,T207L load loop target to R11
00A0DA 58F0 C0F8 0A1C8 11234+ L R15,=A(SAVETST) R15 := current save area
00A0DE 50DF 0004 00004 11235+ ST R13,4(R15) set back pointer in current save area
00A0E2 182D 11236+ LR R2,R13 remember callers save area
00A0E4 18DF 11237+ LR R13,R15 setup current save area
00A0E6 50D2 0008 00008 11238+ ST R13,8(R2) set forw pointer in callers save area
00000 11239+ USING TDSC,R1 declare TDSC base register
PAGE 207
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A0EA 58F0 1008 00008 11240+ L R15,TLRCNT load local repeat count to R15
11241+*
11242 *
00A0EE 1722 11243 XR R2,R2
11244 T207L REPINS SH,(R2,=H'1') repeat: SH R2,=H'1'
11245+*
11246+* build from sublist &ALIST a comma separated string &ARGS
11247+*
11248+*
11249+*
11250+*
11251+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
11252+* this allows to transfer the repeat count from last TDSCGEN call
11253+*
11254+*
0A0F0 11255+T207L EQU *
11256+*
11257+* write a comment indicating what REPINS does (in case NOGEN in effect)
11258+*
11259+*,// REPINS: do 50 times:
11260+*
11261+* MNOTE requires that ' is doubled for expanded variables
11262+* thus build &MASTR as a copy of '&ARGS with ' doubled
11263+*
11264+*
11265+*,// SH R2,=H'1'
11266+*
11267+* finally generate code: &ICNT copies of &CODE &ARGS
11268+*
00A0F0 4B20 C0FC 0A1CC 11269+ SH R2,=H'1'
00A0F4 4B20 C0FC 0A1CC 11270+ SH R2,=H'1'
00A0F8 4B20 C0FC 0A1CC 11271+ SH R2,=H'1'
00A0FC 4B20 C0FC 0A1CC 11272+ SH R2,=H'1'
00A100 4B20 C0FC 0A1CC 11273+ SH R2,=H'1'
00A104 4B20 C0FC 0A1CC 11274+ SH R2,=H'1'
00A108 4B20 C0FC 0A1CC 11275+ SH R2,=H'1'
00A10C 4B20 C0FC 0A1CC 11276+ SH R2,=H'1'
00A110 4B20 C0FC 0A1CC 11277+ SH R2,=H'1'
00A114 4B20 C0FC 0A1CC 11278+ SH R2,=H'1'
00A118 4B20 C0FC 0A1CC 11279+ SH R2,=H'1'
00A11C 4B20 C0FC 0A1CC 11280+ SH R2,=H'1'
00A120 4B20 C0FC 0A1CC 11281+ SH R2,=H'1'
00A124 4B20 C0FC 0A1CC 11282+ SH R2,=H'1'
00A128 4B20 C0FC 0A1CC 11283+ SH R2,=H'1'
00A12C 4B20 C0FC 0A1CC 11284+ SH R2,=H'1'
00A130 4B20 C0FC 0A1CC 11285+ SH R2,=H'1'
00A134 4B20 C0FC 0A1CC 11286+ SH R2,=H'1'
00A138 4B20 C0FC 0A1CC 11287+ SH R2,=H'1'
00A13C 4B20 C0FC 0A1CC 11288+ SH R2,=H'1'
00A140 4B20 C0FC 0A1CC 11289+ SH R2,=H'1'
00A144 4B20 C0FC 0A1CC 11290+ SH R2,=H'1'
00A148 4B20 C0FC 0A1CC 11291+ SH R2,=H'1'
00A14C 4B20 C0FC 0A1CC 11292+ SH R2,=H'1'
00A150 4B20 C0FC 0A1CC 11293+ SH R2,=H'1'
00A154 4B20 C0FC 0A1CC 11294+ SH R2,=H'1'
PAGE 208
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A158 4B20 C0FC 0A1CC 11295+ SH R2,=H'1'
00A15C 4B20 C0FC 0A1CC 11296+ SH R2,=H'1'
00A160 4B20 C0FC 0A1CC 11297+ SH R2,=H'1'
00A164 4B20 C0FC 0A1CC 11298+ SH R2,=H'1'
00A168 4B20 C0FC 0A1CC 11299+ SH R2,=H'1'
00A16C 4B20 C0FC 0A1CC 11300+ SH R2,=H'1'
00A170 4B20 C0FC 0A1CC 11301+ SH R2,=H'1'
00A174 4B20 C0FC 0A1CC 11302+ SH R2,=H'1'
00A178 4B20 C0FC 0A1CC 11303+ SH R2,=H'1'
00A17C 4B20 C0FC 0A1CC 11304+ SH R2,=H'1'
00A180 4B20 C0FC 0A1CC 11305+ SH R2,=H'1'
00A184 4B20 C0FC 0A1CC 11306+ SH R2,=H'1'
00A188 4B20 C0FC 0A1CC 11307+ SH R2,=H'1'
00A18C 4B20 C0FC 0A1CC 11308+ SH R2,=H'1'
00A190 4B20 C0FC 0A1CC 11309+ SH R2,=H'1'
00A194 4B20 C0FC 0A1CC 11310+ SH R2,=H'1'
00A198 4B20 C0FC 0A1CC 11311+ SH R2,=H'1'
00A19C 4B20 C0FC 0A1CC 11312+ SH R2,=H'1'
00A1A0 4B20 C0FC 0A1CC 11313+ SH R2,=H'1'
00A1A4 4B20 C0FC 0A1CC 11314+ SH R2,=H'1'
00A1A8 4B20 C0FC 0A1CC 11315+ SH R2,=H'1'
00A1AC 4B20 C0FC 0A1CC 11316+ SH R2,=H'1'
00A1B0 4B20 C0FC 0A1CC 11317+ SH R2,=H'1'
00A1B4 4B20 C0FC 0A1CC 11318+ SH R2,=H'1'
11319+*
00A1B8 06FB 11320 BCTR R15,R11
11321 TSIMRET
00A1BA 58F0 C0F8 0A1C8 11322+ L R15,=A(SAVETST) R15 := current save area
00A1BE 58DF 0004 00004 11323+ L R13,4(R15) get old save area back
00A1C2 98EC D00C 0000C 11324+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A1C6 07FE 11325+ BR 14 RETURN 02000000
11326 TSIMEND
00A1C8 11327+ LTORG
00A1C8 00000458 11328 =A(SAVETST)
00A1CC 0001 11329 =H'1'
0A1CE 11330+T207TEND EQU *
11331 *
11332 * Test 208 -- SLR R,R --------------------------------------
11333 *
11334 TSIMBEG T208,17000,100,1,C'SLR R,R'
11335+*
002CC4 11336+TDSCDAT CSECT
002CC8 11337+ DS 0D
11338+*
002CC8 0000A1D0 11339+T208TDSC DC A(T208) // TENTRY
002CCC 00000104 11340+ DC A(T208TEND-T208) // TLENGTH
002CD0 00004268 11341+ DC F'17000' // TLRCNT
002CD4 00000064 11342+ DC F'100' // TIGCNT
002CD8 00000001 11343+ DC F'1' // TLTYPE
0013DD 11344+TEXT CSECT
0013DD E3F2F0F8 11345+SPTR0888 DC C'T208'
002CDC 11346+TDSCDAT CSECT
002CDC 11347+ DS 0F
002CDC 040013DD 11348+ DC AL1(L'SPTR0888),AL3(SPTR0888)
0013E1 11349+TEXT CSECT
PAGE 209
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0013E1 E2D3D940D96BD9 11350+SPTR0889 DC C'SLR R,R'
002CE0 11351+TDSCDAT CSECT
002CE0 11352+ DS 0F
002CE0 070013E1 11353+ DC AL1(L'SPTR0889),AL3(SPTR0889)
11354+*
004AC4 11355+TDSCTBL CSECT
04AC4 11356+T208TPTR EQU *
004AC4 00002CC8 11357+ DC A(T208TDSC) enabled test
11358+*
00A1CE 11359+TCODE CSECT
00A1D0 11360+ DS 0D ensure double word alignment for test
00A1D0 11361+T208 DS 0H 01650000
00A1D0 90EC D00C 0000C 11362+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A1D4 18CF 11363+ LR R12,R15 base register := entry address
0A1D0 11364+ USING T208,R12 declare code base register
00A1D6 41B0 C024 0A1F4 11365+ LA R11,T208L load loop target to R11
00A1DA 58F0 C100 0A2D0 11366+ L R15,=A(SAVETST) R15 := current save area
00A1DE 50DF 0004 00004 11367+ ST R13,4(R15) set back pointer in current save area
00A1E2 182D 11368+ LR R2,R13 remember callers save area
00A1E4 18DF 11369+ LR R13,R15 setup current save area
00A1E6 50D2 0008 00008 11370+ ST R13,8(R2) set forw pointer in callers save area
00000 11371+ USING TDSC,R1 declare TDSC base register
00A1EA 58F0 1008 00008 11372+ L R15,TLRCNT load local repeat count to R15
11373+*
11374 *
00A1EE 1722 11375 XR R2,R2
00A1F0 4130 0001 00001 11376 LA R3,1
11377 T208L REPINS SLR,(R2,R3) repeat: SLR R2,R3
11378+*
11379+* build from sublist &ALIST a comma separated string &ARGS
11380+*
11381+*
11382+*
11383+*
11384+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
11385+* this allows to transfer the repeat count from last TDSCGEN call
11386+*
11387+*
0A1F4 11388+T208L EQU *
11389+*
11390+* write a comment indicating what REPINS does (in case NOGEN in effect)
11391+*
11392+*,// REPINS: do 100 times:
11393+*
11394+* MNOTE requires that ' is doubled for expanded variables
11395+* thus build &MASTR as a copy of '&ARGS with ' doubled
11396+*
11397+*
11398+*,// SLR R2,R3
11399+*
11400+* finally generate code: &ICNT copies of &CODE &ARGS
11401+*
00A1F4 1F23 11402+ SLR R2,R3
00A1F6 1F23 11403+ SLR R2,R3
00A1F8 1F23 11404+ SLR R2,R3
PAGE 210
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A1FA 1F23 11405+ SLR R2,R3
00A1FC 1F23 11406+ SLR R2,R3
00A1FE 1F23 11407+ SLR R2,R3
00A200 1F23 11408+ SLR R2,R3
00A202 1F23 11409+ SLR R2,R3
00A204 1F23 11410+ SLR R2,R3
00A206 1F23 11411+ SLR R2,R3
00A208 1F23 11412+ SLR R2,R3
00A20A 1F23 11413+ SLR R2,R3
00A20C 1F23 11414+ SLR R2,R3
00A20E 1F23 11415+ SLR R2,R3
00A210 1F23 11416+ SLR R2,R3
00A212 1F23 11417+ SLR R2,R3
00A214 1F23 11418+ SLR R2,R3
00A216 1F23 11419+ SLR R2,R3
00A218 1F23 11420+ SLR R2,R3
00A21A 1F23 11421+ SLR R2,R3
00A21C 1F23 11422+ SLR R2,R3
00A21E 1F23 11423+ SLR R2,R3
00A220 1F23 11424+ SLR R2,R3
00A222 1F23 11425+ SLR R2,R3
00A224 1F23 11426+ SLR R2,R3
00A226 1F23 11427+ SLR R2,R3
00A228 1F23 11428+ SLR R2,R3
00A22A 1F23 11429+ SLR R2,R3
00A22C 1F23 11430+ SLR R2,R3
00A22E 1F23 11431+ SLR R2,R3
00A230 1F23 11432+ SLR R2,R3
00A232 1F23 11433+ SLR R2,R3
00A234 1F23 11434+ SLR R2,R3
00A236 1F23 11435+ SLR R2,R3
00A238 1F23 11436+ SLR R2,R3
00A23A 1F23 11437+ SLR R2,R3
00A23C 1F23 11438+ SLR R2,R3
00A23E 1F23 11439+ SLR R2,R3
00A240 1F23 11440+ SLR R2,R3
00A242 1F23 11441+ SLR R2,R3
00A244 1F23 11442+ SLR R2,R3
00A246 1F23 11443+ SLR R2,R3
00A248 1F23 11444+ SLR R2,R3
00A24A 1F23 11445+ SLR R2,R3
00A24C 1F23 11446+ SLR R2,R3
00A24E 1F23 11447+ SLR R2,R3
00A250 1F23 11448+ SLR R2,R3
00A252 1F23 11449+ SLR R2,R3
00A254 1F23 11450+ SLR R2,R3
00A256 1F23 11451+ SLR R2,R3
00A258 1F23 11452+ SLR R2,R3
00A25A 1F23 11453+ SLR R2,R3
00A25C 1F23 11454+ SLR R2,R3
00A25E 1F23 11455+ SLR R2,R3
00A260 1F23 11456+ SLR R2,R3
00A262 1F23 11457+ SLR R2,R3
00A264 1F23 11458+ SLR R2,R3
00A266 1F23 11459+ SLR R2,R3
PAGE 211
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A268 1F23 11460+ SLR R2,R3
00A26A 1F23 11461+ SLR R2,R3
00A26C 1F23 11462+ SLR R2,R3
00A26E 1F23 11463+ SLR R2,R3
00A270 1F23 11464+ SLR R2,R3
00A272 1F23 11465+ SLR R2,R3
00A274 1F23 11466+ SLR R2,R3
00A276 1F23 11467+ SLR R2,R3
00A278 1F23 11468+ SLR R2,R3
00A27A 1F23 11469+ SLR R2,R3
00A27C 1F23 11470+ SLR R2,R3
00A27E 1F23 11471+ SLR R2,R3
00A280 1F23 11472+ SLR R2,R3
00A282 1F23 11473+ SLR R2,R3
00A284 1F23 11474+ SLR R2,R3
00A286 1F23 11475+ SLR R2,R3
00A288 1F23 11476+ SLR R2,R3
00A28A 1F23 11477+ SLR R2,R3
00A28C 1F23 11478+ SLR R2,R3
00A28E 1F23 11479+ SLR R2,R3
00A290 1F23 11480+ SLR R2,R3
00A292 1F23 11481+ SLR R2,R3
00A294 1F23 11482+ SLR R2,R3
00A296 1F23 11483+ SLR R2,R3
00A298 1F23 11484+ SLR R2,R3
00A29A 1F23 11485+ SLR R2,R3
00A29C 1F23 11486+ SLR R2,R3
00A29E 1F23 11487+ SLR R2,R3
00A2A0 1F23 11488+ SLR R2,R3
00A2A2 1F23 11489+ SLR R2,R3
00A2A4 1F23 11490+ SLR R2,R3
00A2A6 1F23 11491+ SLR R2,R3
00A2A8 1F23 11492+ SLR R2,R3
00A2AA 1F23 11493+ SLR R2,R3
00A2AC 1F23 11494+ SLR R2,R3
00A2AE 1F23 11495+ SLR R2,R3
00A2B0 1F23 11496+ SLR R2,R3
00A2B2 1F23 11497+ SLR R2,R3
00A2B4 1F23 11498+ SLR R2,R3
00A2B6 1F23 11499+ SLR R2,R3
00A2B8 1F23 11500+ SLR R2,R3
00A2BA 1F23 11501+ SLR R2,R3
11502+*
00A2BC 06FB 11503 BCTR R15,R11
11504 TSIMRET
00A2BE 58F0 C100 0A2D0 11505+ L R15,=A(SAVETST) R15 := current save area
00A2C2 58DF 0004 00004 11506+ L R13,4(R15) get old save area back
00A2C6 98EC D00C 0000C 11507+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A2CA 07FE 11508+ BR 14 RETURN 02000000
11509 TSIMEND
00A2D0 11510+ LTORG
00A2D0 00000458 11511 =A(SAVETST)
0A2D4 11512+T208TEND EQU *
11513 *
11514 * Test 209 -- SL R,m ---------------------------------------
PAGE 212
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
11515 *
11516 TSIMBEG T209,10000,50,1,C'SL R,m'
11517+*
002CE4 11518+TDSCDAT CSECT
002CE8 11519+ DS 0D
11520+*
002CE8 0000A2D8 11521+T209TDSC DC A(T209) // TENTRY
002CEC 00000100 11522+ DC A(T209TEND-T209) // TLENGTH
002CF0 00002710 11523+ DC F'10000' // TLRCNT
002CF4 00000032 11524+ DC F'50' // TIGCNT
002CF8 00000001 11525+ DC F'1' // TLTYPE
0013E8 11526+TEXT CSECT
0013E8 E3F2F0F9 11527+SPTR0900 DC C'T209'
002CFC 11528+TDSCDAT CSECT
002CFC 11529+ DS 0F
002CFC 040013E8 11530+ DC AL1(L'SPTR0900),AL3(SPTR0900)
0013EC 11531+TEXT CSECT
0013EC E2D340D96B94 11532+SPTR0901 DC C'SL R,m'
002D00 11533+TDSCDAT CSECT
002D00 11534+ DS 0F
002D00 060013EC 11535+ DC AL1(L'SPTR0901),AL3(SPTR0901)
11536+*
004AC8 11537+TDSCTBL CSECT
04AC8 11538+T209TPTR EQU *
004AC8 00002CE8 11539+ DC A(T209TDSC) enabled test
11540+*
00A2D4 11541+TCODE CSECT
00A2D8 11542+ DS 0D ensure double word alignment for test
00A2D8 11543+T209 DS 0H 01650000
00A2D8 90EC D00C 0000C 11544+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A2DC 18CF 11545+ LR R12,R15 base register := entry address
0A2D8 11546+ USING T209,R12 declare code base register
00A2DE 41B0 C020 0A2F8 11547+ LA R11,T209L load loop target to R11
00A2E2 58F0 C0F8 0A3D0 11548+ L R15,=A(SAVETST) R15 := current save area
00A2E6 50DF 0004 00004 11549+ ST R13,4(R15) set back pointer in current save area
00A2EA 182D 11550+ LR R2,R13 remember callers save area
00A2EC 18DF 11551+ LR R13,R15 setup current save area
00A2EE 50D2 0008 00008 11552+ ST R13,8(R2) set forw pointer in callers save area
00000 11553+ USING TDSC,R1 declare TDSC base register
00A2F2 58F0 1008 00008 11554+ L R15,TLRCNT load local repeat count to R15
11555+*
11556 *
00A2F6 1722 11557 XR R2,R2
11558 T209L REPINS SL,(R2,=F'1') repeat: SL R2,=F'1'
11559+*
11560+* build from sublist &ALIST a comma separated string &ARGS
11561+*
11562+*
11563+*
11564+*
11565+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
11566+* this allows to transfer the repeat count from last TDSCGEN call
11567+*
11568+*
0A2F8 11569+T209L EQU *
PAGE 213
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
11570+*
11571+* write a comment indicating what REPINS does (in case NOGEN in effect)
11572+*
11573+*,// REPINS: do 50 times:
11574+*
11575+* MNOTE requires that ' is doubled for expanded variables
11576+* thus build &MASTR as a copy of '&ARGS with ' doubled
11577+*
11578+*
11579+*,// SL R2,=F'1'
11580+*
11581+* finally generate code: &ICNT copies of &CODE &ARGS
11582+*
00A2F8 5F20 C0FC 0A3D4 11583+ SL R2,=F'1'
00A2FC 5F20 C0FC 0A3D4 11584+ SL R2,=F'1'
00A300 5F20 C0FC 0A3D4 11585+ SL R2,=F'1'
00A304 5F20 C0FC 0A3D4 11586+ SL R2,=F'1'
00A308 5F20 C0FC 0A3D4 11587+ SL R2,=F'1'
00A30C 5F20 C0FC 0A3D4 11588+ SL R2,=F'1'
00A310 5F20 C0FC 0A3D4 11589+ SL R2,=F'1'
00A314 5F20 C0FC 0A3D4 11590+ SL R2,=F'1'
00A318 5F20 C0FC 0A3D4 11591+ SL R2,=F'1'
00A31C 5F20 C0FC 0A3D4 11592+ SL R2,=F'1'
00A320 5F20 C0FC 0A3D4 11593+ SL R2,=F'1'
00A324 5F20 C0FC 0A3D4 11594+ SL R2,=F'1'
00A328 5F20 C0FC 0A3D4 11595+ SL R2,=F'1'
00A32C 5F20 C0FC 0A3D4 11596+ SL R2,=F'1'
00A330 5F20 C0FC 0A3D4 11597+ SL R2,=F'1'
00A334 5F20 C0FC 0A3D4 11598+ SL R2,=F'1'
00A338 5F20 C0FC 0A3D4 11599+ SL R2,=F'1'
00A33C 5F20 C0FC 0A3D4 11600+ SL R2,=F'1'
00A340 5F20 C0FC 0A3D4 11601+ SL R2,=F'1'
00A344 5F20 C0FC 0A3D4 11602+ SL R2,=F'1'
00A348 5F20 C0FC 0A3D4 11603+ SL R2,=F'1'
00A34C 5F20 C0FC 0A3D4 11604+ SL R2,=F'1'
00A350 5F20 C0FC 0A3D4 11605+ SL R2,=F'1'
00A354 5F20 C0FC 0A3D4 11606+ SL R2,=F'1'
00A358 5F20 C0FC 0A3D4 11607+ SL R2,=F'1'
00A35C 5F20 C0FC 0A3D4 11608+ SL R2,=F'1'
00A360 5F20 C0FC 0A3D4 11609+ SL R2,=F'1'
00A364 5F20 C0FC 0A3D4 11610+ SL R2,=F'1'
00A368 5F20 C0FC 0A3D4 11611+ SL R2,=F'1'
00A36C 5F20 C0FC 0A3D4 11612+ SL R2,=F'1'
00A370 5F20 C0FC 0A3D4 11613+ SL R2,=F'1'
00A374 5F20 C0FC 0A3D4 11614+ SL R2,=F'1'
00A378 5F20 C0FC 0A3D4 11615+ SL R2,=F'1'
00A37C 5F20 C0FC 0A3D4 11616+ SL R2,=F'1'
00A380 5F20 C0FC 0A3D4 11617+ SL R2,=F'1'
00A384 5F20 C0FC 0A3D4 11618+ SL R2,=F'1'
00A388 5F20 C0FC 0A3D4 11619+ SL R2,=F'1'
00A38C 5F20 C0FC 0A3D4 11620+ SL R2,=F'1'
00A390 5F20 C0FC 0A3D4 11621+ SL R2,=F'1'
00A394 5F20 C0FC 0A3D4 11622+ SL R2,=F'1'
00A398 5F20 C0FC 0A3D4 11623+ SL R2,=F'1'
00A39C 5F20 C0FC 0A3D4 11624+ SL R2,=F'1'
PAGE 214
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A3A0 5F20 C0FC 0A3D4 11625+ SL R2,=F'1'
00A3A4 5F20 C0FC 0A3D4 11626+ SL R2,=F'1'
00A3A8 5F20 C0FC 0A3D4 11627+ SL R2,=F'1'
00A3AC 5F20 C0FC 0A3D4 11628+ SL R2,=F'1'
00A3B0 5F20 C0FC 0A3D4 11629+ SL R2,=F'1'
00A3B4 5F20 C0FC 0A3D4 11630+ SL R2,=F'1'
00A3B8 5F20 C0FC 0A3D4 11631+ SL R2,=F'1'
00A3BC 5F20 C0FC 0A3D4 11632+ SL R2,=F'1'
11633+*
00A3C0 06FB 11634 BCTR R15,R11
11635 TSIMRET
00A3C2 58F0 C0F8 0A3D0 11636+ L R15,=A(SAVETST) R15 := current save area
00A3C6 58DF 0004 00004 11637+ L R13,4(R15) get old save area back
00A3CA 98EC D00C 0000C 11638+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A3CE 07FE 11639+ BR 14 RETURN 02000000
11640 TSIMEND
00A3D0 11641+ LTORG
00A3D0 00000458 11642 =A(SAVETST)
00A3D4 00000001 11643 =F'1'
0A3D8 11644+T209TEND EQU *
11645 *
11646 * Test 21x -- arithmetic mul/div ===========================
11647 *
11648 * Test 210 -- MR R,R ---------------------------------------
11649 *
11650 TSIMBEG T210,30000,30,4,C'MR R,R'
11651+*
002D04 11652+TDSCDAT CSECT
002D08 11653+ DS 0D
11654+*
002D08 0000A3D8 11655+T210TDSC DC A(T210) // TENTRY
002D0C 0000007C 11656+ DC A(T210TEND-T210) // TLENGTH
002D10 00007530 11657+ DC F'30000' // TLRCNT
002D14 0000001E 11658+ DC F'30' // TIGCNT
002D18 00000004 11659+ DC F'4' // TLTYPE
0013F2 11660+TEXT CSECT
0013F2 E3F2F1F0 11661+SPTR0912 DC C'T210'
002D1C 11662+TDSCDAT CSECT
002D1C 11663+ DS 0F
002D1C 040013F2 11664+ DC AL1(L'SPTR0912),AL3(SPTR0912)
0013F6 11665+TEXT CSECT
0013F6 D4D940D96BD9 11666+SPTR0913 DC C'MR R,R'
002D20 11667+TDSCDAT CSECT
002D20 11668+ DS 0F
002D20 060013F6 11669+ DC AL1(L'SPTR0913),AL3(SPTR0913)
11670+*
004ACC 11671+TDSCTBL CSECT
04ACC 11672+T210TPTR EQU *
004ACC 00002D08 11673+ DC A(T210TDSC) enabled test
11674+*
00A3D8 11675+TCODE CSECT
00A3D8 11676+ DS 0D ensure double word alignment for test
00A3D8 11677+T210 DS 0H 01650000
00A3D8 90EC D00C 0000C 11678+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A3DC 18CF 11679+ LR R12,R15 base register := entry address
PAGE 215
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0A3D8 11680+ USING T210,R12 declare code base register
00A3DE 41B0 C022 0A3FA 11681+ LA R11,T210L load loop target to R11
00A3E2 58F0 C078 0A450 11682+ L R15,=A(SAVETST) R15 := current save area
00A3E6 50DF 0004 00004 11683+ ST R13,4(R15) set back pointer in current save area
00A3EA 182D 11684+ LR R2,R13 remember callers save area
00A3EC 18DF 11685+ LR R13,R15 setup current save area
00A3EE 50D2 0008 00008 11686+ ST R13,8(R2) set forw pointer in callers save area
00000 11687+ USING TDSC,R1 declare TDSC base register
00A3F2 58F0 1008 00008 11688+ L R15,TLRCNT load local repeat count to R15
11689+*
11690 * inner loop logic:
11691 * load R3 with 1
11692 * multiply 30 times by 2
11693 *
00A3F6 4140 0002 00002 11694 LA R4,2
00A3FA 4130 0001 00001 11695 T210L LA R3,1
11696 REPINS MR,(R2,R4) repeat: MR R2,R4
11697+*
11698+* build from sublist &ALIST a comma separated string &ARGS
11699+*
11700+*
11701+*
11702+*
11703+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
11704+* this allows to transfer the repeat count from last TDSCGEN call
11705+*
11706+*
11707+*
11708+* write a comment indicating what REPINS does (in case NOGEN in effect)
11709+*
11710+*,// REPINS: do 30 times:
11711+*
11712+* MNOTE requires that ' is doubled for expanded variables
11713+* thus build &MASTR as a copy of '&ARGS with ' doubled
11714+*
11715+*
11716+*,// MR R2,R4
11717+*
11718+* finally generate code: &ICNT copies of &CODE &ARGS
11719+*
00A3FE 1C24 11720+ MR R2,R4
00A400 1C24 11721+ MR R2,R4
00A402 1C24 11722+ MR R2,R4
00A404 1C24 11723+ MR R2,R4
00A406 1C24 11724+ MR R2,R4
00A408 1C24 11725+ MR R2,R4
00A40A 1C24 11726+ MR R2,R4
00A40C 1C24 11727+ MR R2,R4
00A40E 1C24 11728+ MR R2,R4
00A410 1C24 11729+ MR R2,R4
00A412 1C24 11730+ MR R2,R4
00A414 1C24 11731+ MR R2,R4
00A416 1C24 11732+ MR R2,R4
00A418 1C24 11733+ MR R2,R4
00A41A 1C24 11734+ MR R2,R4
PAGE 216
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A41C 1C24 11735+ MR R2,R4
00A41E 1C24 11736+ MR R2,R4
00A420 1C24 11737+ MR R2,R4
00A422 1C24 11738+ MR R2,R4
00A424 1C24 11739+ MR R2,R4
00A426 1C24 11740+ MR R2,R4
00A428 1C24 11741+ MR R2,R4
00A42A 1C24 11742+ MR R2,R4
00A42C 1C24 11743+ MR R2,R4
00A42E 1C24 11744+ MR R2,R4
00A430 1C24 11745+ MR R2,R4
00A432 1C24 11746+ MR R2,R4
00A434 1C24 11747+ MR R2,R4
00A436 1C24 11748+ MR R2,R4
00A438 1C24 11749+ MR R2,R4
11750+*
00A43A 06FB 11751 BCTR R15,R11
11752 TSIMRET
00A43C 58F0 C078 0A450 11753+ L R15,=A(SAVETST) R15 := current save area
00A440 58DF 0004 00004 11754+ L R13,4(R15) get old save area back
00A444 98EC D00C 0000C 11755+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A448 07FE 11756+ BR 14 RETURN 02000000
11757 TSIMEND
00A450 11758+ LTORG
00A450 00000458 11759 =A(SAVETST)
0A454 11760+T210TEND EQU *
11761 *
11762 * Test 211 -- M R,m ----------------------------------------
11763 *
11764 TSIMBEG T211,15000,30,4,C'M R,m'
11765+*
002D24 11766+TDSCDAT CSECT
002D28 11767+ DS 0D
11768+*
002D28 0000A458 11769+T211TDSC DC A(T211) // TENTRY
002D2C 000000B8 11770+ DC A(T211TEND-T211) // TLENGTH
002D30 00003A98 11771+ DC F'15000' // TLRCNT
002D34 0000001E 11772+ DC F'30' // TIGCNT
002D38 00000004 11773+ DC F'4' // TLTYPE
0013FC 11774+TEXT CSECT
0013FC E3F2F1F1 11775+SPTR0924 DC C'T211'
002D3C 11776+TDSCDAT CSECT
002D3C 11777+ DS 0F
002D3C 040013FC 11778+ DC AL1(L'SPTR0924),AL3(SPTR0924)
001400 11779+TEXT CSECT
001400 D440D96B94 11780+SPTR0925 DC C'M R,m'
002D40 11781+TDSCDAT CSECT
002D40 11782+ DS 0F
002D40 05001400 11783+ DC AL1(L'SPTR0925),AL3(SPTR0925)
11784+*
004AD0 11785+TDSCTBL CSECT
04AD0 11786+T211TPTR EQU *
004AD0 00002D28 11787+ DC A(T211TDSC) enabled test
11788+*
00A454 11789+TCODE CSECT
PAGE 217
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A458 11790+ DS 0D ensure double word alignment for test
00A458 11791+T211 DS 0H 01650000
00A458 90EC D00C 0000C 11792+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A45C 18CF 11793+ LR R12,R15 base register := entry address
0A458 11794+ USING T211,R12 declare code base register
00A45E 41B0 C01E 0A476 11795+ LA R11,T211L load loop target to R11
00A462 58F0 C0B0 0A508 11796+ L R15,=A(SAVETST) R15 := current save area
00A466 50DF 0004 00004 11797+ ST R13,4(R15) set back pointer in current save area
00A46A 182D 11798+ LR R2,R13 remember callers save area
00A46C 18DF 11799+ LR R13,R15 setup current save area
00A46E 50D2 0008 00008 11800+ ST R13,8(R2) set forw pointer in callers save area
00000 11801+ USING TDSC,R1 declare TDSC base register
00A472 58F0 1008 00008 11802+ L R15,TLRCNT load local repeat count to R15
11803+*
11804 * inner loop logic:
11805 * load R3 with 1
11806 * multiply 30 times by 2
11807 *
00A476 4130 0001 00001 11808 T211L LA R3,1
11809 REPINS M,(R2,=F'2') repeat: M R2,=F'2'
11810+*
11811+* build from sublist &ALIST a comma separated string &ARGS
11812+*
11813+*
11814+*
11815+*
11816+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
11817+* this allows to transfer the repeat count from last TDSCGEN call
11818+*
11819+*
11820+*
11821+* write a comment indicating what REPINS does (in case NOGEN in effect)
11822+*
11823+*,// REPINS: do 30 times:
11824+*
11825+* MNOTE requires that ' is doubled for expanded variables
11826+* thus build &MASTR as a copy of '&ARGS with ' doubled
11827+*
11828+*
11829+*,// M R2,=F'2'
11830+*
11831+* finally generate code: &ICNT copies of &CODE &ARGS
11832+*
00A47A 5C20 C0B4 0A50C 11833+ M R2,=F'2'
00A47E 5C20 C0B4 0A50C 11834+ M R2,=F'2'
00A482 5C20 C0B4 0A50C 11835+ M R2,=F'2'
00A486 5C20 C0B4 0A50C 11836+ M R2,=F'2'
00A48A 5C20 C0B4 0A50C 11837+ M R2,=F'2'
00A48E 5C20 C0B4 0A50C 11838+ M R2,=F'2'
00A492 5C20 C0B4 0A50C 11839+ M R2,=F'2'
00A496 5C20 C0B4 0A50C 11840+ M R2,=F'2'
00A49A 5C20 C0B4 0A50C 11841+ M R2,=F'2'
00A49E 5C20 C0B4 0A50C 11842+ M R2,=F'2'
00A4A2 5C20 C0B4 0A50C 11843+ M R2,=F'2'
00A4A6 5C20 C0B4 0A50C 11844+ M R2,=F'2'
PAGE 218
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A4AA 5C20 C0B4 0A50C 11845+ M R2,=F'2'
00A4AE 5C20 C0B4 0A50C 11846+ M R2,=F'2'
00A4B2 5C20 C0B4 0A50C 11847+ M R2,=F'2'
00A4B6 5C20 C0B4 0A50C 11848+ M R2,=F'2'
00A4BA 5C20 C0B4 0A50C 11849+ M R2,=F'2'
00A4BE 5C20 C0B4 0A50C 11850+ M R2,=F'2'
00A4C2 5C20 C0B4 0A50C 11851+ M R2,=F'2'
00A4C6 5C20 C0B4 0A50C 11852+ M R2,=F'2'
00A4CA 5C20 C0B4 0A50C 11853+ M R2,=F'2'
00A4CE 5C20 C0B4 0A50C 11854+ M R2,=F'2'
00A4D2 5C20 C0B4 0A50C 11855+ M R2,=F'2'
00A4D6 5C20 C0B4 0A50C 11856+ M R2,=F'2'
00A4DA 5C20 C0B4 0A50C 11857+ M R2,=F'2'
00A4DE 5C20 C0B4 0A50C 11858+ M R2,=F'2'
00A4E2 5C20 C0B4 0A50C 11859+ M R2,=F'2'
00A4E6 5C20 C0B4 0A50C 11860+ M R2,=F'2'
00A4EA 5C20 C0B4 0A50C 11861+ M R2,=F'2'
00A4EE 5C20 C0B4 0A50C 11862+ M R2,=F'2'
11863+*
00A4F2 06FB 11864 BCTR R15,R11
11865 TSIMRET
00A4F4 58F0 C0B0 0A508 11866+ L R15,=A(SAVETST) R15 := current save area
00A4F8 58DF 0004 00004 11867+ L R13,4(R15) get old save area back
00A4FC 98EC D00C 0000C 11868+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A500 07FE 11869+ BR 14 RETURN 02000000
11870 TSIMEND
00A508 11871+ LTORG
00A508 00000458 11872 =A(SAVETST)
00A50C 00000002 11873 =F'2'
0A510 11874+T211TEND EQU *
11875 *
11876 * Test 212 -- MH R,m ---------------------------------------
11877 *
11878 TSIMBEG T212,15000,30,4,C'MH R,m'
11879+*
002D44 11880+TDSCDAT CSECT
002D48 11881+ DS 0D
11882+*
002D48 0000A510 11883+T212TDSC DC A(T212) // TENTRY
002D4C 000000B6 11884+ DC A(T212TEND-T212) // TLENGTH
002D50 00003A98 11885+ DC F'15000' // TLRCNT
002D54 0000001E 11886+ DC F'30' // TIGCNT
002D58 00000004 11887+ DC F'4' // TLTYPE
001405 11888+TEXT CSECT
001405 E3F2F1F2 11889+SPTR0936 DC C'T212'
002D5C 11890+TDSCDAT CSECT
002D5C 11891+ DS 0F
002D5C 04001405 11892+ DC AL1(L'SPTR0936),AL3(SPTR0936)
001409 11893+TEXT CSECT
001409 D4C840D96B94 11894+SPTR0937 DC C'MH R,m'
002D60 11895+TDSCDAT CSECT
002D60 11896+ DS 0F
002D60 06001409 11897+ DC AL1(L'SPTR0937),AL3(SPTR0937)
11898+*
004AD4 11899+TDSCTBL CSECT
PAGE 219
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
04AD4 11900+T212TPTR EQU *
004AD4 00002D48 11901+ DC A(T212TDSC) enabled test
11902+*
00A510 11903+TCODE CSECT
00A510 11904+ DS 0D ensure double word alignment for test
00A510 11905+T212 DS 0H 01650000
00A510 90EC D00C 0000C 11906+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A514 18CF 11907+ LR R12,R15 base register := entry address
0A510 11908+ USING T212,R12 declare code base register
00A516 41B0 C01E 0A52E 11909+ LA R11,T212L load loop target to R11
00A51A 58F0 C0B0 0A5C0 11910+ L R15,=A(SAVETST) R15 := current save area
00A51E 50DF 0004 00004 11911+ ST R13,4(R15) set back pointer in current save area
00A522 182D 11912+ LR R2,R13 remember callers save area
00A524 18DF 11913+ LR R13,R15 setup current save area
00A526 50D2 0008 00008 11914+ ST R13,8(R2) set forw pointer in callers save area
00000 11915+ USING TDSC,R1 declare TDSC base register
00A52A 58F0 1008 00008 11916+ L R15,TLRCNT load local repeat count to R15
11917+*
11918 * inner loop logic:
11919 * load R3 with 1
11920 * multiply 30 times by 2
11921 *
00A52E 4130 0001 00001 11922 T212L LA R3,1
11923 REPINS MH,(R3,=H'2') repeat: MH R3,=H'2'
11924+*
11925+* build from sublist &ALIST a comma separated string &ARGS
11926+*
11927+*
11928+*
11929+*
11930+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
11931+* this allows to transfer the repeat count from last TDSCGEN call
11932+*
11933+*
11934+*
11935+* write a comment indicating what REPINS does (in case NOGEN in effect)
11936+*
11937+*,// REPINS: do 30 times:
11938+*
11939+* MNOTE requires that ' is doubled for expanded variables
11940+* thus build &MASTR as a copy of '&ARGS with ' doubled
11941+*
11942+*
11943+*,// MH R3,=H'2'
11944+*
11945+* finally generate code: &ICNT copies of &CODE &ARGS
11946+*
00A532 4C30 C0B4 0A5C4 11947+ MH R3,=H'2'
00A536 4C30 C0B4 0A5C4 11948+ MH R3,=H'2'
00A53A 4C30 C0B4 0A5C4 11949+ MH R3,=H'2'
00A53E 4C30 C0B4 0A5C4 11950+ MH R3,=H'2'
00A542 4C30 C0B4 0A5C4 11951+ MH R3,=H'2'
00A546 4C30 C0B4 0A5C4 11952+ MH R3,=H'2'
00A54A 4C30 C0B4 0A5C4 11953+ MH R3,=H'2'
00A54E 4C30 C0B4 0A5C4 11954+ MH R3,=H'2'
PAGE 220
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A552 4C30 C0B4 0A5C4 11955+ MH R3,=H'2'
00A556 4C30 C0B4 0A5C4 11956+ MH R3,=H'2'
00A55A 4C30 C0B4 0A5C4 11957+ MH R3,=H'2'
00A55E 4C30 C0B4 0A5C4 11958+ MH R3,=H'2'
00A562 4C30 C0B4 0A5C4 11959+ MH R3,=H'2'
00A566 4C30 C0B4 0A5C4 11960+ MH R3,=H'2'
00A56A 4C30 C0B4 0A5C4 11961+ MH R3,=H'2'
00A56E 4C30 C0B4 0A5C4 11962+ MH R3,=H'2'
00A572 4C30 C0B4 0A5C4 11963+ MH R3,=H'2'
00A576 4C30 C0B4 0A5C4 11964+ MH R3,=H'2'
00A57A 4C30 C0B4 0A5C4 11965+ MH R3,=H'2'
00A57E 4C30 C0B4 0A5C4 11966+ MH R3,=H'2'
00A582 4C30 C0B4 0A5C4 11967+ MH R3,=H'2'
00A586 4C30 C0B4 0A5C4 11968+ MH R3,=H'2'
00A58A 4C30 C0B4 0A5C4 11969+ MH R3,=H'2'
00A58E 4C30 C0B4 0A5C4 11970+ MH R3,=H'2'
00A592 4C30 C0B4 0A5C4 11971+ MH R3,=H'2'
00A596 4C30 C0B4 0A5C4 11972+ MH R3,=H'2'
00A59A 4C30 C0B4 0A5C4 11973+ MH R3,=H'2'
00A59E 4C30 C0B4 0A5C4 11974+ MH R3,=H'2'
00A5A2 4C30 C0B4 0A5C4 11975+ MH R3,=H'2'
00A5A6 4C30 C0B4 0A5C4 11976+ MH R3,=H'2'
11977+*
00A5AA 06FB 11978 BCTR R15,R11
11979 TSIMRET
00A5AC 58F0 C0B0 0A5C0 11980+ L R15,=A(SAVETST) R15 := current save area
00A5B0 58DF 0004 00004 11981+ L R13,4(R15) get old save area back
00A5B4 98EC D00C 0000C 11982+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A5B8 07FE 11983+ BR 14 RETURN 02000000
11984 TSIMEND
00A5C0 11985+ LTORG
00A5C0 00000458 11986 =A(SAVETST)
00A5C4 0002 11987 =H'2'
0A5C6 11988+T212TEND EQU *
11989 *
11990 * Test 215 -- DR R,R ---------------------------------------
11991 *
11992 TSIMBEG T215,14000,20,3,C'XR R,R; DR R,R'
11993+*
002D64 11994+TDSCDAT CSECT
002D68 11995+ DS 0D
11996+*
002D68 0000A5C8 11997+T215TDSC DC A(T215) // TENTRY
002D6C 00000090 11998+ DC A(T215TEND-T215) // TLENGTH
002D70 000036B0 11999+ DC F'14000' // TLRCNT
002D74 00000014 12000+ DC F'20' // TIGCNT
002D78 00000003 12001+ DC F'3' // TLTYPE
00140F 12002+TEXT CSECT
00140F E3F2F1F5 12003+SPTR0948 DC C'T215'
002D7C 12004+TDSCDAT CSECT
002D7C 12005+ DS 0F
002D7C 0400140F 12006+ DC AL1(L'SPTR0948),AL3(SPTR0948)
001413 12007+TEXT CSECT
001413 E7D940D96BD95E40 12008+SPTR0949 DC C'XR R,R; DR R,R'
002D80 12009+TDSCDAT CSECT
PAGE 221
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002D80 12010+ DS 0F
002D80 0E001413 12011+ DC AL1(L'SPTR0949),AL3(SPTR0949)
12012+*
004AD8 12013+TDSCTBL CSECT
04AD8 12014+T215TPTR EQU *
004AD8 00002D68 12015+ DC A(T215TDSC) enabled test
12016+*
00A5C6 12017+TCODE CSECT
00A5C8 12018+ DS 0D ensure double word alignment for test
00A5C8 12019+T215 DS 0H 01650000
00A5C8 90EC D00C 0000C 12020+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A5CC 18CF 12021+ LR R12,R15 base register := entry address
0A5C8 12022+ USING T215,R12 declare code base register
00A5CE 41B0 C026 0A5EE 12023+ LA R11,T215L load loop target to R11
00A5D2 58F0 C088 0A650 12024+ L R15,=A(SAVETST) R15 := current save area
00A5D6 50DF 0004 00004 12025+ ST R13,4(R15) set back pointer in current save area
00A5DA 182D 12026+ LR R2,R13 remember callers save area
00A5DC 18DF 12027+ LR R13,R15 setup current save area
00A5DE 50D2 0008 00008 12028+ ST R13,8(R2) set forw pointer in callers save area
00000 12029+ USING TDSC,R1 declare TDSC base register
00A5E2 58F0 1008 00008 12030+ L R15,TLRCNT load local repeat count to R15
12031+*
12032 * inner loop logic:
12033 * load R3 with 123456789
12034 * divide 20 times by 2
12035 *
12036 * use sequence
12037 * XR R2,R2 drop high order part
12038 * DR R2,R4 and divide
12039 *
00A5E6 4140 0002 00002 12040 LA R4,2
00A5EA 5860 C08C 0A654 12041 L R6,=F'123456789'
00A5EE 1836 12042 T215L LR R3,R6 setup initial divident
12043 REPINSN XR,(R2,R2),DR,(R2,R4)
12044+*
12045+* build from sublist &ALIST* a comma separated string &ARGS*
12046+*
12047+*
12048+*
12049+*
12050+*
12051+*
12052+*
12053+*
12054+* write a comment indicating what REPINSN does (if NOGEN in effect)
12055+*
12056+*,// REPINSN: do 20 times:
12057+*
12058+* MNOTE requires that ' is doubled for expanded variables
12059+* thus build &MASTR as a copy of '&ARGS with ' doubled
12060+*
12061+*
12062+*,// XR R2,R2
12063+*
12064+* MNOTE requires that ' is doubled for expanded variables
PAGE 222
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
12065+* thus build &MASTR as a copy of '&ARGS with ' doubled
12066+*
12067+*
12068+*,// DR R2,R4
12069+*
12070+* finally generate code: &ICNT copies of &CO1 ...
12071+*
00A5F0 1722 12072+ XR R2,R2
00A5F2 1D24 12073+ DR R2,R4
00A5F4 1722 12074+ XR R2,R2
00A5F6 1D24 12075+ DR R2,R4
00A5F8 1722 12076+ XR R2,R2
00A5FA 1D24 12077+ DR R2,R4
00A5FC 1722 12078+ XR R2,R2
00A5FE 1D24 12079+ DR R2,R4
00A600 1722 12080+ XR R2,R2
00A602 1D24 12081+ DR R2,R4
00A604 1722 12082+ XR R2,R2
00A606 1D24 12083+ DR R2,R4
00A608 1722 12084+ XR R2,R2
00A60A 1D24 12085+ DR R2,R4
00A60C 1722 12086+ XR R2,R2
00A60E 1D24 12087+ DR R2,R4
00A610 1722 12088+ XR R2,R2
00A612 1D24 12089+ DR R2,R4
00A614 1722 12090+ XR R2,R2
00A616 1D24 12091+ DR R2,R4
00A618 1722 12092+ XR R2,R2
00A61A 1D24 12093+ DR R2,R4
00A61C 1722 12094+ XR R2,R2
00A61E 1D24 12095+ DR R2,R4
00A620 1722 12096+ XR R2,R2
00A622 1D24 12097+ DR R2,R4
00A624 1722 12098+ XR R2,R2
00A626 1D24 12099+ DR R2,R4
00A628 1722 12100+ XR R2,R2
00A62A 1D24 12101+ DR R2,R4
00A62C 1722 12102+ XR R2,R2
00A62E 1D24 12103+ DR R2,R4
00A630 1722 12104+ XR R2,R2
00A632 1D24 12105+ DR R2,R4
00A634 1722 12106+ XR R2,R2
00A636 1D24 12107+ DR R2,R4
00A638 1722 12108+ XR R2,R2
00A63A 1D24 12109+ DR R2,R4
00A63C 1722 12110+ XR R2,R2
00A63E 1D24 12111+ DR R2,R4
12112+*
00A640 06FB 12113 BCTR R15,R11
12114 TSIMRET
00A642 58F0 C088 0A650 12115+ L R15,=A(SAVETST) R15 := current save area
00A646 58DF 0004 00004 12116+ L R13,4(R15) get old save area back
00A64A 98EC D00C 0000C 12117+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A64E 07FE 12118+ BR 14 RETURN 02000000
12119 TSIMEND
PAGE 223
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A650 12120+ LTORG
00A650 00000458 12121 =A(SAVETST)
00A654 075BCD15 12122 =F'123456789'
0A658 12123+T215TEND EQU *
12124 *
12125 * Test 216 -- D R,m ----------------------------------------
12126 *
12127 TSIMBEG T216,11000,20,3,C'XR R,R; D R,m'
12128+*
002D84 12129+TDSCDAT CSECT
002D88 12130+ DS 0D
12131+*
002D88 0000A658 12132+T216TDSC DC A(T216) // TENTRY
002D8C 000000BC 12133+ DC A(T216TEND-T216) // TLENGTH
002D90 00002AF8 12134+ DC F'11000' // TLRCNT
002D94 00000014 12135+ DC F'20' // TIGCNT
002D98 00000003 12136+ DC F'3' // TLTYPE
001421 12137+TEXT CSECT
001421 E3F2F1F6 12138+SPTR0962 DC C'T216'
002D9C 12139+TDSCDAT CSECT
002D9C 12140+ DS 0F
002D9C 04001421 12141+ DC AL1(L'SPTR0962),AL3(SPTR0962)
001425 12142+TEXT CSECT
001425 E7D940D96BD95E40 12143+SPTR0963 DC C'XR R,R; D R,m'
002DA0 12144+TDSCDAT CSECT
002DA0 12145+ DS 0F
002DA0 0D001425 12146+ DC AL1(L'SPTR0963),AL3(SPTR0963)
12147+*
004ADC 12148+TDSCTBL CSECT
04ADC 12149+T216TPTR EQU *
004ADC 00002D88 12150+ DC A(T216TDSC) enabled test
12151+*
00A658 12152+TCODE CSECT
00A658 12153+ DS 0D ensure double word alignment for test
00A658 12154+T216 DS 0H 01650000
00A658 90EC D00C 0000C 12155+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A65C 18CF 12156+ LR R12,R15 base register := entry address
0A658 12157+ USING T216,R12 declare code base register
00A65E 41B0 C026 0A67E 12158+ LA R11,T216L load loop target to R11
00A662 58F0 C0B0 0A708 12159+ L R15,=A(SAVETST) R15 := current save area
00A666 50DF 0004 00004 12160+ ST R13,4(R15) set back pointer in current save area
00A66A 182D 12161+ LR R2,R13 remember callers save area
00A66C 18DF 12162+ LR R13,R15 setup current save area
00A66E 50D2 0008 00008 12163+ ST R13,8(R2) set forw pointer in callers save area
00000 12164+ USING TDSC,R1 declare TDSC base register
00A672 58F0 1008 00008 12165+ L R15,TLRCNT load local repeat count to R15
12166+*
12167 * inner loop logic:
12168 * load R3 with 123456789
12169 * divide 20 times by 2
12170 *
12171 * use sequence
12172 * XR R2,R2 drop high order part
12173 * D R2,=F'2' and divide
12174 *
PAGE 224
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A676 4140 0002 00002 12175 LA R4,2
00A67A 5860 C0B4 0A70C 12176 L R6,=F'123456789'
00A67E 1836 12177 T216L LR R3,R6 setup initial divident
12178 REPINSN XR,(R2,R2),D,(R2,=F'2')
12179+*
12180+* build from sublist &ALIST* a comma separated string &ARGS*
12181+*
12182+*
12183+*
12184+*
12185+*
12186+*
12187+*
12188+*
12189+* write a comment indicating what REPINSN does (if NOGEN in effect)
12190+*
12191+*,// REPINSN: do 20 times:
12192+*
12193+* MNOTE requires that ' is doubled for expanded variables
12194+* thus build &MASTR as a copy of '&ARGS with ' doubled
12195+*
12196+*
12197+*,// XR R2,R2
12198+*
12199+* MNOTE requires that ' is doubled for expanded variables
12200+* thus build &MASTR as a copy of '&ARGS with ' doubled
12201+*
12202+*
12203+*,// D R2,=F'2'
12204+*
12205+* finally generate code: &ICNT copies of &CO1 ...
12206+*
00A680 1722 12207+ XR R2,R2
00A682 5D20 C0B8 0A710 12208+ D R2,=F'2'
00A686 1722 12209+ XR R2,R2
00A688 5D20 C0B8 0A710 12210+ D R2,=F'2'
00A68C 1722 12211+ XR R2,R2
00A68E 5D20 C0B8 0A710 12212+ D R2,=F'2'
00A692 1722 12213+ XR R2,R2
00A694 5D20 C0B8 0A710 12214+ D R2,=F'2'
00A698 1722 12215+ XR R2,R2
00A69A 5D20 C0B8 0A710 12216+ D R2,=F'2'
00A69E 1722 12217+ XR R2,R2
00A6A0 5D20 C0B8 0A710 12218+ D R2,=F'2'
00A6A4 1722 12219+ XR R2,R2
00A6A6 5D20 C0B8 0A710 12220+ D R2,=F'2'
00A6AA 1722 12221+ XR R2,R2
00A6AC 5D20 C0B8 0A710 12222+ D R2,=F'2'
00A6B0 1722 12223+ XR R2,R2
00A6B2 5D20 C0B8 0A710 12224+ D R2,=F'2'
00A6B6 1722 12225+ XR R2,R2
00A6B8 5D20 C0B8 0A710 12226+ D R2,=F'2'
00A6BC 1722 12227+ XR R2,R2
00A6BE 5D20 C0B8 0A710 12228+ D R2,=F'2'
00A6C2 1722 12229+ XR R2,R2
PAGE 225
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A6C4 5D20 C0B8 0A710 12230+ D R2,=F'2'
00A6C8 1722 12231+ XR R2,R2
00A6CA 5D20 C0B8 0A710 12232+ D R2,=F'2'
00A6CE 1722 12233+ XR R2,R2
00A6D0 5D20 C0B8 0A710 12234+ D R2,=F'2'
00A6D4 1722 12235+ XR R2,R2
00A6D6 5D20 C0B8 0A710 12236+ D R2,=F'2'
00A6DA 1722 12237+ XR R2,R2
00A6DC 5D20 C0B8 0A710 12238+ D R2,=F'2'
00A6E0 1722 12239+ XR R2,R2
00A6E2 5D20 C0B8 0A710 12240+ D R2,=F'2'
00A6E6 1722 12241+ XR R2,R2
00A6E8 5D20 C0B8 0A710 12242+ D R2,=F'2'
00A6EC 1722 12243+ XR R2,R2
00A6EE 5D20 C0B8 0A710 12244+ D R2,=F'2'
00A6F2 1722 12245+ XR R2,R2
00A6F4 5D20 C0B8 0A710 12246+ D R2,=F'2'
12247+*
00A6F8 06FB 12248 BCTR R15,R11
12249 TSIMRET
00A6FA 58F0 C0B0 0A708 12250+ L R15,=A(SAVETST) R15 := current save area
00A6FE 58DF 0004 00004 12251+ L R13,4(R15) get old save area back
00A702 98EC D00C 0000C 12252+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A706 07FE 12253+ BR 14 RETURN 02000000
12254 TSIMEND
00A708 12255+ LTORG
00A708 00000458 12256 =A(SAVETST)
00A70C 075BCD15 12257 =F'123456789'
00A710 00000002 12258 =F'2'
0A714 12259+T216TEND EQU *
12260 *
12261 * Test 22x -- arithmetic shifts ============================
12262 *
12263 * Test 220 -- SLA R,1 --------------------------------------
12264 *
12265 TSIMBEG T220,24000,30,4,C'SLA R,1'
12266+*
002DA4 12267+TDSCDAT CSECT
002DA8 12268+ DS 0D
12269+*
002DA8 0000A718 12270+T220TDSC DC A(T220) // TENTRY
002DAC 000000B4 12271+ DC A(T220TEND-T220) // TLENGTH
002DB0 00005DC0 12272+ DC F'24000' // TLRCNT
002DB4 0000001E 12273+ DC F'30' // TIGCNT
002DB8 00000004 12274+ DC F'4' // TLTYPE
001432 12275+TEXT CSECT
001432 E3F2F2F0 12276+SPTR0976 DC C'T220'
002DBC 12277+TDSCDAT CSECT
002DBC 12278+ DS 0F
002DBC 04001432 12279+ DC AL1(L'SPTR0976),AL3(SPTR0976)
001436 12280+TEXT CSECT
001436 E2D3C140D96BF1 12281+SPTR0977 DC C'SLA R,1'
002DC0 12282+TDSCDAT CSECT
002DC0 12283+ DS 0F
002DC0 07001436 12284+ DC AL1(L'SPTR0977),AL3(SPTR0977)
PAGE 226
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
12285+*
004AE0 12286+TDSCTBL CSECT
04AE0 12287+T220TPTR EQU *
004AE0 00002DA8 12288+ DC A(T220TDSC) enabled test
12289+*
00A714 12290+TCODE CSECT
00A718 12291+ DS 0D ensure double word alignment for test
00A718 12292+T220 DS 0H 01650000
00A718 90EC D00C 0000C 12293+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A71C 18CF 12294+ LR R12,R15 base register := entry address
0A718 12295+ USING T220,R12 declare code base register
00A71E 41B0 C01E 0A736 12296+ LA R11,T220L load loop target to R11
00A722 58F0 C0B0 0A7C8 12297+ L R15,=A(SAVETST) R15 := current save area
00A726 50DF 0004 00004 12298+ ST R13,4(R15) set back pointer in current save area
00A72A 182D 12299+ LR R2,R13 remember callers save area
00A72C 18DF 12300+ LR R13,R15 setup current save area
00A72E 50D2 0008 00008 12301+ ST R13,8(R2) set forw pointer in callers save area
00000 12302+ USING TDSC,R1 declare TDSC base register
00A732 58F0 1008 00008 12303+ L R15,TLRCNT load local repeat count to R15
12304+*
12305 *
00A736 4120 0001 00001 12306 T220L LA R2,1
12307 REPINS SLA,(R2,1) repeat: SLA R2,1
12308+*
12309+* build from sublist &ALIST a comma separated string &ARGS
12310+*
12311+*
12312+*
12313+*
12314+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
12315+* this allows to transfer the repeat count from last TDSCGEN call
12316+*
12317+*
12318+*
12319+* write a comment indicating what REPINS does (in case NOGEN in effect)
12320+*
12321+*,// REPINS: do 30 times:
12322+*
12323+* MNOTE requires that ' is doubled for expanded variables
12324+* thus build &MASTR as a copy of '&ARGS with ' doubled
12325+*
12326+*
12327+*,// SLA R2,1
12328+*
12329+* finally generate code: &ICNT copies of &CODE &ARGS
12330+*
00A73A 8B20 0001 00001 12331+ SLA R2,1
00A73E 8B20 0001 00001 12332+ SLA R2,1
00A742 8B20 0001 00001 12333+ SLA R2,1
00A746 8B20 0001 00001 12334+ SLA R2,1
00A74A 8B20 0001 00001 12335+ SLA R2,1
00A74E 8B20 0001 00001 12336+ SLA R2,1
00A752 8B20 0001 00001 12337+ SLA R2,1
00A756 8B20 0001 00001 12338+ SLA R2,1
00A75A 8B20 0001 00001 12339+ SLA R2,1
PAGE 227
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A75E 8B20 0001 00001 12340+ SLA R2,1
00A762 8B20 0001 00001 12341+ SLA R2,1
00A766 8B20 0001 00001 12342+ SLA R2,1
00A76A 8B20 0001 00001 12343+ SLA R2,1
00A76E 8B20 0001 00001 12344+ SLA R2,1
00A772 8B20 0001 00001 12345+ SLA R2,1
00A776 8B20 0001 00001 12346+ SLA R2,1
00A77A 8B20 0001 00001 12347+ SLA R2,1
00A77E 8B20 0001 00001 12348+ SLA R2,1
00A782 8B20 0001 00001 12349+ SLA R2,1
00A786 8B20 0001 00001 12350+ SLA R2,1
00A78A 8B20 0001 00001 12351+ SLA R2,1
00A78E 8B20 0001 00001 12352+ SLA R2,1
00A792 8B20 0001 00001 12353+ SLA R2,1
00A796 8B20 0001 00001 12354+ SLA R2,1
00A79A 8B20 0001 00001 12355+ SLA R2,1
00A79E 8B20 0001 00001 12356+ SLA R2,1
00A7A2 8B20 0001 00001 12357+ SLA R2,1
00A7A6 8B20 0001 00001 12358+ SLA R2,1
00A7AA 8B20 0001 00001 12359+ SLA R2,1
00A7AE 8B20 0001 00001 12360+ SLA R2,1
12361+*
00A7B2 06FB 12362 BCTR R15,R11
12363 TSIMRET
00A7B4 58F0 C0B0 0A7C8 12364+ L R15,=A(SAVETST) R15 := current save area
00A7B8 58DF 0004 00004 12365+ L R13,4(R15) get old save area back
00A7BC 98EC D00C 0000C 12366+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A7C0 07FE 12367+ BR 14 RETURN 02000000
12368 TSIMEND
00A7C8 12369+ LTORG
00A7C8 00000458 12370 =A(SAVETST)
0A7CC 12371+T220TEND EQU *
12372 *
12373 * Test 221 -- SLDA R,1 -------------------------------------
12374 *
12375 TSIMBEG T221,12000,60,5,C'SLDA R,1'
12376+*
002DC4 12377+TDSCDAT CSECT
002DC8 12378+ DS 0D
12379+*
002DC8 0000A7D0 12380+T221TDSC DC A(T221) // TENTRY
002DCC 0000012C 12381+ DC A(T221TEND-T221) // TLENGTH
002DD0 00002EE0 12382+ DC F'12000' // TLRCNT
002DD4 0000003C 12383+ DC F'60' // TIGCNT
002DD8 00000005 12384+ DC F'5' // TLTYPE
00143D 12385+TEXT CSECT
00143D E3F2F2F1 12386+SPTR0988 DC C'T221'
002DDC 12387+TDSCDAT CSECT
002DDC 12388+ DS 0F
002DDC 0400143D 12389+ DC AL1(L'SPTR0988),AL3(SPTR0988)
001441 12390+TEXT CSECT
001441 E2D3C4C140D96BF1 12391+SPTR0989 DC C'SLDA R,1'
002DE0 12392+TDSCDAT CSECT
002DE0 12393+ DS 0F
002DE0 08001441 12394+ DC AL1(L'SPTR0989),AL3(SPTR0989)
PAGE 228
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
12395+*
004AE4 12396+TDSCTBL CSECT
04AE4 12397+T221TPTR EQU *
004AE4 00002DC8 12398+ DC A(T221TDSC) enabled test
12399+*
00A7CC 12400+TCODE CSECT
00A7D0 12401+ DS 0D ensure double word alignment for test
00A7D0 12402+T221 DS 0H 01650000
00A7D0 90EC D00C 0000C 12403+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A7D4 18CF 12404+ LR R12,R15 base register := entry address
0A7D0 12405+ USING T221,R12 declare code base register
00A7D6 41B0 C01E 0A7EE 12406+ LA R11,T221L load loop target to R11
00A7DA 58F0 C128 0A8F8 12407+ L R15,=A(SAVETST) R15 := current save area
00A7DE 50DF 0004 00004 12408+ ST R13,4(R15) set back pointer in current save area
00A7E2 182D 12409+ LR R2,R13 remember callers save area
00A7E4 18DF 12410+ LR R13,R15 setup current save area
00A7E6 50D2 0008 00008 12411+ ST R13,8(R2) set forw pointer in callers save area
00000 12412+ USING TDSC,R1 declare TDSC base register
00A7EA 58F0 1008 00008 12413+ L R15,TLRCNT load local repeat count to R15
12414+*
12415 *
00A7EE 1722 12416 T221L XR R2,R2
00A7F0 4130 0001 00001 12417 LA R3,1
12418 REPINS SLDA,(R2,1) repeat: SLDA R2,1
12419+*
12420+* build from sublist &ALIST a comma separated string &ARGS
12421+*
12422+*
12423+*
12424+*
12425+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
12426+* this allows to transfer the repeat count from last TDSCGEN call
12427+*
12428+*
12429+*
12430+* write a comment indicating what REPINS does (in case NOGEN in effect)
12431+*
12432+*,// REPINS: do 60 times:
12433+*
12434+* MNOTE requires that ' is doubled for expanded variables
12435+* thus build &MASTR as a copy of '&ARGS with ' doubled
12436+*
12437+*
12438+*,// SLDA R2,1
12439+*
12440+* finally generate code: &ICNT copies of &CODE &ARGS
12441+*
00A7F4 8F20 0001 00001 12442+ SLDA R2,1
00A7F8 8F20 0001 00001 12443+ SLDA R2,1
00A7FC 8F20 0001 00001 12444+ SLDA R2,1
00A800 8F20 0001 00001 12445+ SLDA R2,1
00A804 8F20 0001 00001 12446+ SLDA R2,1
00A808 8F20 0001 00001 12447+ SLDA R2,1
00A80C 8F20 0001 00001 12448+ SLDA R2,1
00A810 8F20 0001 00001 12449+ SLDA R2,1
PAGE 229
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A814 8F20 0001 00001 12450+ SLDA R2,1
00A818 8F20 0001 00001 12451+ SLDA R2,1
00A81C 8F20 0001 00001 12452+ SLDA R2,1
00A820 8F20 0001 00001 12453+ SLDA R2,1
00A824 8F20 0001 00001 12454+ SLDA R2,1
00A828 8F20 0001 00001 12455+ SLDA R2,1
00A82C 8F20 0001 00001 12456+ SLDA R2,1
00A830 8F20 0001 00001 12457+ SLDA R2,1
00A834 8F20 0001 00001 12458+ SLDA R2,1
00A838 8F20 0001 00001 12459+ SLDA R2,1
00A83C 8F20 0001 00001 12460+ SLDA R2,1
00A840 8F20 0001 00001 12461+ SLDA R2,1
00A844 8F20 0001 00001 12462+ SLDA R2,1
00A848 8F20 0001 00001 12463+ SLDA R2,1
00A84C 8F20 0001 00001 12464+ SLDA R2,1
00A850 8F20 0001 00001 12465+ SLDA R2,1
00A854 8F20 0001 00001 12466+ SLDA R2,1
00A858 8F20 0001 00001 12467+ SLDA R2,1
00A85C 8F20 0001 00001 12468+ SLDA R2,1
00A860 8F20 0001 00001 12469+ SLDA R2,1
00A864 8F20 0001 00001 12470+ SLDA R2,1
00A868 8F20 0001 00001 12471+ SLDA R2,1
00A86C 8F20 0001 00001 12472+ SLDA R2,1
00A870 8F20 0001 00001 12473+ SLDA R2,1
00A874 8F20 0001 00001 12474+ SLDA R2,1
00A878 8F20 0001 00001 12475+ SLDA R2,1
00A87C 8F20 0001 00001 12476+ SLDA R2,1
00A880 8F20 0001 00001 12477+ SLDA R2,1
00A884 8F20 0001 00001 12478+ SLDA R2,1
00A888 8F20 0001 00001 12479+ SLDA R2,1
00A88C 8F20 0001 00001 12480+ SLDA R2,1
00A890 8F20 0001 00001 12481+ SLDA R2,1
00A894 8F20 0001 00001 12482+ SLDA R2,1
00A898 8F20 0001 00001 12483+ SLDA R2,1
00A89C 8F20 0001 00001 12484+ SLDA R2,1
00A8A0 8F20 0001 00001 12485+ SLDA R2,1
00A8A4 8F20 0001 00001 12486+ SLDA R2,1
00A8A8 8F20 0001 00001 12487+ SLDA R2,1
00A8AC 8F20 0001 00001 12488+ SLDA R2,1
00A8B0 8F20 0001 00001 12489+ SLDA R2,1
00A8B4 8F20 0001 00001 12490+ SLDA R2,1
00A8B8 8F20 0001 00001 12491+ SLDA R2,1
00A8BC 8F20 0001 00001 12492+ SLDA R2,1
00A8C0 8F20 0001 00001 12493+ SLDA R2,1
00A8C4 8F20 0001 00001 12494+ SLDA R2,1
00A8C8 8F20 0001 00001 12495+ SLDA R2,1
00A8CC 8F20 0001 00001 12496+ SLDA R2,1
00A8D0 8F20 0001 00001 12497+ SLDA R2,1
00A8D4 8F20 0001 00001 12498+ SLDA R2,1
00A8D8 8F20 0001 00001 12499+ SLDA R2,1
00A8DC 8F20 0001 00001 12500+ SLDA R2,1
00A8E0 8F20 0001 00001 12501+ SLDA R2,1
12502+*
00A8E4 06FB 12503 BCTR R15,R11
12504 TSIMRET
PAGE 230
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A8E6 58F0 C128 0A8F8 12505+ L R15,=A(SAVETST) R15 := current save area
00A8EA 58DF 0004 00004 12506+ L R13,4(R15) get old save area back
00A8EE 98EC D00C 0000C 12507+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A8F2 07FE 12508+ BR 14 RETURN 02000000
12509 TSIMEND
00A8F8 12510+ LTORG
00A8F8 00000458 12511 =A(SAVETST)
0A8FC 12512+T221TEND EQU *
12513 *
12514 * Test 222 -- SRA R,1 --------------------------------------
12515 *
12516 TSIMBEG T222,30000,30,4,C'SRA R,1'
12517+*
002DE4 12518+TDSCDAT CSECT
002DE8 12519+ DS 0D
12520+*
002DE8 0000A900 12521+T222TDSC DC A(T222) // TENTRY
002DEC 000000B4 12522+ DC A(T222TEND-T222) // TLENGTH
002DF0 00007530 12523+ DC F'30000' // TLRCNT
002DF4 0000001E 12524+ DC F'30' // TIGCNT
002DF8 00000004 12525+ DC F'4' // TLTYPE
001449 12526+TEXT CSECT
001449 E3F2F2F2 12527+SPTR1000 DC C'T222'
002DFC 12528+TDSCDAT CSECT
002DFC 12529+ DS 0F
002DFC 04001449 12530+ DC AL1(L'SPTR1000),AL3(SPTR1000)
00144D 12531+TEXT CSECT
00144D E2D9C140D96BF1 12532+SPTR1001 DC C'SRA R,1'
002E00 12533+TDSCDAT CSECT
002E00 12534+ DS 0F
002E00 0700144D 12535+ DC AL1(L'SPTR1001),AL3(SPTR1001)
12536+*
004AE8 12537+TDSCTBL CSECT
04AE8 12538+T222TPTR EQU *
004AE8 00002DE8 12539+ DC A(T222TDSC) enabled test
12540+*
00A8FC 12541+TCODE CSECT
00A900 12542+ DS 0D ensure double word alignment for test
00A900 12543+T222 DS 0H 01650000
00A900 90EC D00C 0000C 12544+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A904 18CF 12545+ LR R12,R15 base register := entry address
0A900 12546+ USING T222,R12 declare code base register
00A906 41B0 C01E 0A91E 12547+ LA R11,T222L load loop target to R11
00A90A 58F0 C0B0 0A9B0 12548+ L R15,=A(SAVETST) R15 := current save area
00A90E 50DF 0004 00004 12549+ ST R13,4(R15) set back pointer in current save area
00A912 182D 12550+ LR R2,R13 remember callers save area
00A914 18DF 12551+ LR R13,R15 setup current save area
00A916 50D2 0008 00008 12552+ ST R13,8(R2) set forw pointer in callers save area
00000 12553+ USING TDSC,R1 declare TDSC base register
00A91A 58F0 1008 00008 12554+ L R15,TLRCNT load local repeat count to R15
12555+*
12556 *
00A91E 4120 0001 00001 12557 T222L LA R2,1
12558 REPINS SRA,(R2,1) repeat: SRA R2,1
12559+*
PAGE 231
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
12560+* build from sublist &ALIST a comma separated string &ARGS
12561+*
12562+*
12563+*
12564+*
12565+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
12566+* this allows to transfer the repeat count from last TDSCGEN call
12567+*
12568+*
12569+*
12570+* write a comment indicating what REPINS does (in case NOGEN in effect)
12571+*
12572+*,// REPINS: do 30 times:
12573+*
12574+* MNOTE requires that ' is doubled for expanded variables
12575+* thus build &MASTR as a copy of '&ARGS with ' doubled
12576+*
12577+*
12578+*,// SRA R2,1
12579+*
12580+* finally generate code: &ICNT copies of &CODE &ARGS
12581+*
00A922 8A20 0001 00001 12582+ SRA R2,1
00A926 8A20 0001 00001 12583+ SRA R2,1
00A92A 8A20 0001 00001 12584+ SRA R2,1
00A92E 8A20 0001 00001 12585+ SRA R2,1
00A932 8A20 0001 00001 12586+ SRA R2,1
00A936 8A20 0001 00001 12587+ SRA R2,1
00A93A 8A20 0001 00001 12588+ SRA R2,1
00A93E 8A20 0001 00001 12589+ SRA R2,1
00A942 8A20 0001 00001 12590+ SRA R2,1
00A946 8A20 0001 00001 12591+ SRA R2,1
00A94A 8A20 0001 00001 12592+ SRA R2,1
00A94E 8A20 0001 00001 12593+ SRA R2,1
00A952 8A20 0001 00001 12594+ SRA R2,1
00A956 8A20 0001 00001 12595+ SRA R2,1
00A95A 8A20 0001 00001 12596+ SRA R2,1
00A95E 8A20 0001 00001 12597+ SRA R2,1
00A962 8A20 0001 00001 12598+ SRA R2,1
00A966 8A20 0001 00001 12599+ SRA R2,1
00A96A 8A20 0001 00001 12600+ SRA R2,1
00A96E 8A20 0001 00001 12601+ SRA R2,1
00A972 8A20 0001 00001 12602+ SRA R2,1
00A976 8A20 0001 00001 12603+ SRA R2,1
00A97A 8A20 0001 00001 12604+ SRA R2,1
00A97E 8A20 0001 00001 12605+ SRA R2,1
00A982 8A20 0001 00001 12606+ SRA R2,1
00A986 8A20 0001 00001 12607+ SRA R2,1
00A98A 8A20 0001 00001 12608+ SRA R2,1
00A98E 8A20 0001 00001 12609+ SRA R2,1
00A992 8A20 0001 00001 12610+ SRA R2,1
00A996 8A20 0001 00001 12611+ SRA R2,1
12612+*
00A99A 06FB 12613 BCTR R15,R11
12614 TSIMRET
PAGE 232
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00A99C 58F0 C0B0 0A9B0 12615+ L R15,=A(SAVETST) R15 := current save area
00A9A0 58DF 0004 00004 12616+ L R13,4(R15) get old save area back
00A9A4 98EC D00C 0000C 12617+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00A9A8 07FE 12618+ BR 14 RETURN 02000000
12619 TSIMEND
00A9B0 12620+ LTORG
00A9B0 00000458 12621 =A(SAVETST)
0A9B4 12622+T222TEND EQU *
12623 *
12624 * Test 223 -- SRDA R,1 -------------------------------------
12625 *
12626 TSIMBEG T223,12000,60,5,C'SRDA R,1'
12627+*
002E04 12628+TDSCDAT CSECT
002E08 12629+ DS 0D
12630+*
002E08 0000A9B8 12631+T223TDSC DC A(T223) // TENTRY
002E0C 0000012C 12632+ DC A(T223TEND-T223) // TLENGTH
002E10 00002EE0 12633+ DC F'12000' // TLRCNT
002E14 0000003C 12634+ DC F'60' // TIGCNT
002E18 00000005 12635+ DC F'5' // TLTYPE
001454 12636+TEXT CSECT
001454 E3F2F2F3 12637+SPTR1012 DC C'T223'
002E1C 12638+TDSCDAT CSECT
002E1C 12639+ DS 0F
002E1C 04001454 12640+ DC AL1(L'SPTR1012),AL3(SPTR1012)
001458 12641+TEXT CSECT
001458 E2D9C4C140D96BF1 12642+SPTR1013 DC C'SRDA R,1'
002E20 12643+TDSCDAT CSECT
002E20 12644+ DS 0F
002E20 08001458 12645+ DC AL1(L'SPTR1013),AL3(SPTR1013)
12646+*
004AEC 12647+TDSCTBL CSECT
04AEC 12648+T223TPTR EQU *
004AEC 00002E08 12649+ DC A(T223TDSC) enabled test
12650+*
00A9B4 12651+TCODE CSECT
00A9B8 12652+ DS 0D ensure double word alignment for test
00A9B8 12653+T223 DS 0H 01650000
00A9B8 90EC D00C 0000C 12654+ STM 14,12,12(13) SAVE REGISTERS 02950000
00A9BC 18CF 12655+ LR R12,R15 base register := entry address
0A9B8 12656+ USING T223,R12 declare code base register
00A9BE 41B0 C01E 0A9D6 12657+ LA R11,T223L load loop target to R11
00A9C2 58F0 C128 0AAE0 12658+ L R15,=A(SAVETST) R15 := current save area
00A9C6 50DF 0004 00004 12659+ ST R13,4(R15) set back pointer in current save area
00A9CA 182D 12660+ LR R2,R13 remember callers save area
00A9CC 18DF 12661+ LR R13,R15 setup current save area
00A9CE 50D2 0008 00008 12662+ ST R13,8(R2) set forw pointer in callers save area
00000 12663+ USING TDSC,R1 declare TDSC base register
00A9D2 58F0 1008 00008 12664+ L R15,TLRCNT load local repeat count to R15
12665+*
12666 *
00A9D6 1722 12667 T223L XR R2,R2
00A9D8 4130 0001 00001 12668 LA R3,1
12669 REPINS SRDA,(R2,1) repeat: SRDA R2,1
PAGE 233
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
12670+*
12671+* build from sublist &ALIST a comma separated string &ARGS
12672+*
12673+*
12674+*
12675+*
12676+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
12677+* this allows to transfer the repeat count from last TDSCGEN call
12678+*
12679+*
12680+*
12681+* write a comment indicating what REPINS does (in case NOGEN in effect)
12682+*
12683+*,// REPINS: do 60 times:
12684+*
12685+* MNOTE requires that ' is doubled for expanded variables
12686+* thus build &MASTR as a copy of '&ARGS with ' doubled
12687+*
12688+*
12689+*,// SRDA R2,1
12690+*
12691+* finally generate code: &ICNT copies of &CODE &ARGS
12692+*
00A9DC 8E20 0001 00001 12693+ SRDA R2,1
00A9E0 8E20 0001 00001 12694+ SRDA R2,1
00A9E4 8E20 0001 00001 12695+ SRDA R2,1
00A9E8 8E20 0001 00001 12696+ SRDA R2,1
00A9EC 8E20 0001 00001 12697+ SRDA R2,1
00A9F0 8E20 0001 00001 12698+ SRDA R2,1
00A9F4 8E20 0001 00001 12699+ SRDA R2,1
00A9F8 8E20 0001 00001 12700+ SRDA R2,1
00A9FC 8E20 0001 00001 12701+ SRDA R2,1
00AA00 8E20 0001 00001 12702+ SRDA R2,1
00AA04 8E20 0001 00001 12703+ SRDA R2,1
00AA08 8E20 0001 00001 12704+ SRDA R2,1
00AA0C 8E20 0001 00001 12705+ SRDA R2,1
00AA10 8E20 0001 00001 12706+ SRDA R2,1
00AA14 8E20 0001 00001 12707+ SRDA R2,1
00AA18 8E20 0001 00001 12708+ SRDA R2,1
00AA1C 8E20 0001 00001 12709+ SRDA R2,1
00AA20 8E20 0001 00001 12710+ SRDA R2,1
00AA24 8E20 0001 00001 12711+ SRDA R2,1
00AA28 8E20 0001 00001 12712+ SRDA R2,1
00AA2C 8E20 0001 00001 12713+ SRDA R2,1
00AA30 8E20 0001 00001 12714+ SRDA R2,1
00AA34 8E20 0001 00001 12715+ SRDA R2,1
00AA38 8E20 0001 00001 12716+ SRDA R2,1
00AA3C 8E20 0001 00001 12717+ SRDA R2,1
00AA40 8E20 0001 00001 12718+ SRDA R2,1
00AA44 8E20 0001 00001 12719+ SRDA R2,1
00AA48 8E20 0001 00001 12720+ SRDA R2,1
00AA4C 8E20 0001 00001 12721+ SRDA R2,1
00AA50 8E20 0001 00001 12722+ SRDA R2,1
00AA54 8E20 0001 00001 12723+ SRDA R2,1
00AA58 8E20 0001 00001 12724+ SRDA R2,1
PAGE 234
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00AA5C 8E20 0001 00001 12725+ SRDA R2,1
00AA60 8E20 0001 00001 12726+ SRDA R2,1
00AA64 8E20 0001 00001 12727+ SRDA R2,1
00AA68 8E20 0001 00001 12728+ SRDA R2,1
00AA6C 8E20 0001 00001 12729+ SRDA R2,1
00AA70 8E20 0001 00001 12730+ SRDA R2,1
00AA74 8E20 0001 00001 12731+ SRDA R2,1
00AA78 8E20 0001 00001 12732+ SRDA R2,1
00AA7C 8E20 0001 00001 12733+ SRDA R2,1
00AA80 8E20 0001 00001 12734+ SRDA R2,1
00AA84 8E20 0001 00001 12735+ SRDA R2,1
00AA88 8E20 0001 00001 12736+ SRDA R2,1
00AA8C 8E20 0001 00001 12737+ SRDA R2,1
00AA90 8E20 0001 00001 12738+ SRDA R2,1
00AA94 8E20 0001 00001 12739+ SRDA R2,1
00AA98 8E20 0001 00001 12740+ SRDA R2,1
00AA9C 8E20 0001 00001 12741+ SRDA R2,1
00AAA0 8E20 0001 00001 12742+ SRDA R2,1
00AAA4 8E20 0001 00001 12743+ SRDA R2,1
00AAA8 8E20 0001 00001 12744+ SRDA R2,1
00AAAC 8E20 0001 00001 12745+ SRDA R2,1
00AAB0 8E20 0001 00001 12746+ SRDA R2,1
00AAB4 8E20 0001 00001 12747+ SRDA R2,1
00AAB8 8E20 0001 00001 12748+ SRDA R2,1
00AABC 8E20 0001 00001 12749+ SRDA R2,1
00AAC0 8E20 0001 00001 12750+ SRDA R2,1
00AAC4 8E20 0001 00001 12751+ SRDA R2,1
00AAC8 8E20 0001 00001 12752+ SRDA R2,1
12753+*
00AACC 06FB 12754 BCTR R15,R11
12755 TSIMRET
00AACE 58F0 C128 0AAE0 12756+ L R15,=A(SAVETST) R15 := current save area
00AAD2 58DF 0004 00004 12757+ L R13,4(R15) get old save area back
00AAD6 98EC D00C 0000C 12758+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00AADA 07FE 12759+ BR 14 RETURN 02000000
12760 TSIMEND
00AAE0 12761+ LTORG
00AAE0 00000458 12762 =A(SAVETST)
0AAE4 12763+T223TEND EQU *
12764 *
12765 * Test 224 -- SRA R,30 -------------------------------------
12766 *
12767 TSIMBEG T224,30000,30,4,C'SRA R,30'
12768+*
002E24 12769+TDSCDAT CSECT
002E28 12770+ DS 0D
12771+*
002E28 0000AAE8 12772+T224TDSC DC A(T224) // TENTRY
002E2C 000000B4 12773+ DC A(T224TEND-T224) // TLENGTH
002E30 00007530 12774+ DC F'30000' // TLRCNT
002E34 0000001E 12775+ DC F'30' // TIGCNT
002E38 00000004 12776+ DC F'4' // TLTYPE
001460 12777+TEXT CSECT
001460 E3F2F2F4 12778+SPTR1024 DC C'T224'
002E3C 12779+TDSCDAT CSECT
PAGE 235
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002E3C 12780+ DS 0F
002E3C 04001460 12781+ DC AL1(L'SPTR1024),AL3(SPTR1024)
001464 12782+TEXT CSECT
001464 E2D9C140D96BF3F0 12783+SPTR1025 DC C'SRA R,30'
002E40 12784+TDSCDAT CSECT
002E40 12785+ DS 0F
002E40 08001464 12786+ DC AL1(L'SPTR1025),AL3(SPTR1025)
12787+*
004AF0 12788+TDSCTBL CSECT
04AF0 12789+T224TPTR EQU *
004AF0 00002E28 12790+ DC A(T224TDSC) enabled test
12791+*
00AAE4 12792+TCODE CSECT
00AAE8 12793+ DS 0D ensure double word alignment for test
00AAE8 12794+T224 DS 0H 01650000
00AAE8 90EC D00C 0000C 12795+ STM 14,12,12(13) SAVE REGISTERS 02950000
00AAEC 18CF 12796+ LR R12,R15 base register := entry address
0AAE8 12797+ USING T224,R12 declare code base register
00AAEE 41B0 C01E 0AB06 12798+ LA R11,T224L load loop target to R11
00AAF2 58F0 C0B0 0AB98 12799+ L R15,=A(SAVETST) R15 := current save area
00AAF6 50DF 0004 00004 12800+ ST R13,4(R15) set back pointer in current save area
00AAFA 182D 12801+ LR R2,R13 remember callers save area
00AAFC 18DF 12802+ LR R13,R15 setup current save area
00AAFE 50D2 0008 00008 12803+ ST R13,8(R2) set forw pointer in callers save area
00000 12804+ USING TDSC,R1 declare TDSC base register
00AB02 58F0 1008 00008 12805+ L R15,TLRCNT load local repeat count to R15
12806+*
12807 *
00AB06 4120 0001 00001 12808 T224L LA R2,1
12809 REPINS SRA,(R2,30) repeat: SRA R2,30
12810+*
12811+* build from sublist &ALIST a comma separated string &ARGS
12812+*
12813+*
12814+*
12815+*
12816+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
12817+* this allows to transfer the repeat count from last TDSCGEN call
12818+*
12819+*
12820+*
12821+* write a comment indicating what REPINS does (in case NOGEN in effect)
12822+*
12823+*,// REPINS: do 30 times:
12824+*
12825+* MNOTE requires that ' is doubled for expanded variables
12826+* thus build &MASTR as a copy of '&ARGS with ' doubled
12827+*
12828+*
12829+*,// SRA R2,30
12830+*
12831+* finally generate code: &ICNT copies of &CODE &ARGS
12832+*
00AB0A 8A20 001E 0001E 12833+ SRA R2,30
00AB0E 8A20 001E 0001E 12834+ SRA R2,30
PAGE 236
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00AB12 8A20 001E 0001E 12835+ SRA R2,30
00AB16 8A20 001E 0001E 12836+ SRA R2,30
00AB1A 8A20 001E 0001E 12837+ SRA R2,30
00AB1E 8A20 001E 0001E 12838+ SRA R2,30
00AB22 8A20 001E 0001E 12839+ SRA R2,30
00AB26 8A20 001E 0001E 12840+ SRA R2,30
00AB2A 8A20 001E 0001E 12841+ SRA R2,30
00AB2E 8A20 001E 0001E 12842+ SRA R2,30
00AB32 8A20 001E 0001E 12843+ SRA R2,30
00AB36 8A20 001E 0001E 12844+ SRA R2,30
00AB3A 8A20 001E 0001E 12845+ SRA R2,30
00AB3E 8A20 001E 0001E 12846+ SRA R2,30
00AB42 8A20 001E 0001E 12847+ SRA R2,30
00AB46 8A20 001E 0001E 12848+ SRA R2,30
00AB4A 8A20 001E 0001E 12849+ SRA R2,30
00AB4E 8A20 001E 0001E 12850+ SRA R2,30
00AB52 8A20 001E 0001E 12851+ SRA R2,30
00AB56 8A20 001E 0001E 12852+ SRA R2,30
00AB5A 8A20 001E 0001E 12853+ SRA R2,30
00AB5E 8A20 001E 0001E 12854+ SRA R2,30
00AB62 8A20 001E 0001E 12855+ SRA R2,30
00AB66 8A20 001E 0001E 12856+ SRA R2,30
00AB6A 8A20 001E 0001E 12857+ SRA R2,30
00AB6E 8A20 001E 0001E 12858+ SRA R2,30
00AB72 8A20 001E 0001E 12859+ SRA R2,30
00AB76 8A20 001E 0001E 12860+ SRA R2,30
00AB7A 8A20 001E 0001E 12861+ SRA R2,30
00AB7E 8A20 001E 0001E 12862+ SRA R2,30
12863+*
00AB82 06FB 12864 BCTR R15,R11
12865 TSIMRET
00AB84 58F0 C0B0 0AB98 12866+ L R15,=A(SAVETST) R15 := current save area
00AB88 58DF 0004 00004 12867+ L R13,4(R15) get old save area back
00AB8C 98EC D00C 0000C 12868+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00AB90 07FE 12869+ BR 14 RETURN 02000000
12870 TSIMEND
00AB98 12871+ LTORG
00AB98 00000458 12872 =A(SAVETST)
0AB9C 12873+T224TEND EQU *
12874 *
12875 * Test 225 -- SRDA R,60 ------------------------------------
12876 *
12877 TSIMBEG T225,12000,60,5,C'SRDA R,60'
12878+*
002E44 12879+TDSCDAT CSECT
002E48 12880+ DS 0D
12881+*
002E48 0000ABA0 12882+T225TDSC DC A(T225) // TENTRY
002E4C 0000012C 12883+ DC A(T225TEND-T225) // TLENGTH
002E50 00002EE0 12884+ DC F'12000' // TLRCNT
002E54 0000003C 12885+ DC F'60' // TIGCNT
002E58 00000005 12886+ DC F'5' // TLTYPE
00146C 12887+TEXT CSECT
00146C E3F2F2F5 12888+SPTR1036 DC C'T225'
002E5C 12889+TDSCDAT CSECT
PAGE 237
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002E5C 12890+ DS 0F
002E5C 0400146C 12891+ DC AL1(L'SPTR1036),AL3(SPTR1036)
001470 12892+TEXT CSECT
001470 E2D9C4C140D96BF6 12893+SPTR1037 DC C'SRDA R,60'
002E60 12894+TDSCDAT CSECT
002E60 12895+ DS 0F
002E60 09001470 12896+ DC AL1(L'SPTR1037),AL3(SPTR1037)
12897+*
004AF4 12898+TDSCTBL CSECT
04AF4 12899+T225TPTR EQU *
004AF4 00002E48 12900+ DC A(T225TDSC) enabled test
12901+*
00AB9C 12902+TCODE CSECT
00ABA0 12903+ DS 0D ensure double word alignment for test
00ABA0 12904+T225 DS 0H 01650000
00ABA0 90EC D00C 0000C 12905+ STM 14,12,12(13) SAVE REGISTERS 02950000
00ABA4 18CF 12906+ LR R12,R15 base register := entry address
0ABA0 12907+ USING T225,R12 declare code base register
00ABA6 41B0 C01E 0ABBE 12908+ LA R11,T225L load loop target to R11
00ABAA 58F0 C128 0ACC8 12909+ L R15,=A(SAVETST) R15 := current save area
00ABAE 50DF 0004 00004 12910+ ST R13,4(R15) set back pointer in current save area
00ABB2 182D 12911+ LR R2,R13 remember callers save area
00ABB4 18DF 12912+ LR R13,R15 setup current save area
00ABB6 50D2 0008 00008 12913+ ST R13,8(R2) set forw pointer in callers save area
00000 12914+ USING TDSC,R1 declare TDSC base register
00ABBA 58F0 1008 00008 12915+ L R15,TLRCNT load local repeat count to R15
12916+*
12917 *
00ABBE 1722 12918 T225L XR R2,R2
00ABC0 4130 0001 00001 12919 LA R3,1
12920 REPINS SRDA,(R2,60) repeat: SRDA R2,60
12921+*
12922+* build from sublist &ALIST a comma separated string &ARGS
12923+*
12924+*
12925+*
12926+*
12927+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
12928+* this allows to transfer the repeat count from last TDSCGEN call
12929+*
12930+*
12931+*
12932+* write a comment indicating what REPINS does (in case NOGEN in effect)
12933+*
12934+*,// REPINS: do 60 times:
12935+*
12936+* MNOTE requires that ' is doubled for expanded variables
12937+* thus build &MASTR as a copy of '&ARGS with ' doubled
12938+*
12939+*
12940+*,// SRDA R2,60
12941+*
12942+* finally generate code: &ICNT copies of &CODE &ARGS
12943+*
00ABC4 8E20 003C 0003C 12944+ SRDA R2,60
PAGE 238
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00ABC8 8E20 003C 0003C 12945+ SRDA R2,60
00ABCC 8E20 003C 0003C 12946+ SRDA R2,60
00ABD0 8E20 003C 0003C 12947+ SRDA R2,60
00ABD4 8E20 003C 0003C 12948+ SRDA R2,60
00ABD8 8E20 003C 0003C 12949+ SRDA R2,60
00ABDC 8E20 003C 0003C 12950+ SRDA R2,60
00ABE0 8E20 003C 0003C 12951+ SRDA R2,60
00ABE4 8E20 003C 0003C 12952+ SRDA R2,60
00ABE8 8E20 003C 0003C 12953+ SRDA R2,60
00ABEC 8E20 003C 0003C 12954+ SRDA R2,60
00ABF0 8E20 003C 0003C 12955+ SRDA R2,60
00ABF4 8E20 003C 0003C 12956+ SRDA R2,60
00ABF8 8E20 003C 0003C 12957+ SRDA R2,60
00ABFC 8E20 003C 0003C 12958+ SRDA R2,60
00AC00 8E20 003C 0003C 12959+ SRDA R2,60
00AC04 8E20 003C 0003C 12960+ SRDA R2,60
00AC08 8E20 003C 0003C 12961+ SRDA R2,60
00AC0C 8E20 003C 0003C 12962+ SRDA R2,60
00AC10 8E20 003C 0003C 12963+ SRDA R2,60
00AC14 8E20 003C 0003C 12964+ SRDA R2,60
00AC18 8E20 003C 0003C 12965+ SRDA R2,60
00AC1C 8E20 003C 0003C 12966+ SRDA R2,60
00AC20 8E20 003C 0003C 12967+ SRDA R2,60
00AC24 8E20 003C 0003C 12968+ SRDA R2,60
00AC28 8E20 003C 0003C 12969+ SRDA R2,60
00AC2C 8E20 003C 0003C 12970+ SRDA R2,60
00AC30 8E20 003C 0003C 12971+ SRDA R2,60
00AC34 8E20 003C 0003C 12972+ SRDA R2,60
00AC38 8E20 003C 0003C 12973+ SRDA R2,60
00AC3C 8E20 003C 0003C 12974+ SRDA R2,60
00AC40 8E20 003C 0003C 12975+ SRDA R2,60
00AC44 8E20 003C 0003C 12976+ SRDA R2,60
00AC48 8E20 003C 0003C 12977+ SRDA R2,60
00AC4C 8E20 003C 0003C 12978+ SRDA R2,60
00AC50 8E20 003C 0003C 12979+ SRDA R2,60
00AC54 8E20 003C 0003C 12980+ SRDA R2,60
00AC58 8E20 003C 0003C 12981+ SRDA R2,60
00AC5C 8E20 003C 0003C 12982+ SRDA R2,60
00AC60 8E20 003C 0003C 12983+ SRDA R2,60
00AC64 8E20 003C 0003C 12984+ SRDA R2,60
00AC68 8E20 003C 0003C 12985+ SRDA R2,60
00AC6C 8E20 003C 0003C 12986+ SRDA R2,60
00AC70 8E20 003C 0003C 12987+ SRDA R2,60
00AC74 8E20 003C 0003C 12988+ SRDA R2,60
00AC78 8E20 003C 0003C 12989+ SRDA R2,60
00AC7C 8E20 003C 0003C 12990+ SRDA R2,60
00AC80 8E20 003C 0003C 12991+ SRDA R2,60
00AC84 8E20 003C 0003C 12992+ SRDA R2,60
00AC88 8E20 003C 0003C 12993+ SRDA R2,60
00AC8C 8E20 003C 0003C 12994+ SRDA R2,60
00AC90 8E20 003C 0003C 12995+ SRDA R2,60
00AC94 8E20 003C 0003C 12996+ SRDA R2,60
00AC98 8E20 003C 0003C 12997+ SRDA R2,60
00AC9C 8E20 003C 0003C 12998+ SRDA R2,60
00ACA0 8E20 003C 0003C 12999+ SRDA R2,60
PAGE 239
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00ACA4 8E20 003C 0003C 13000+ SRDA R2,60
00ACA8 8E20 003C 0003C 13001+ SRDA R2,60
00ACAC 8E20 003C 0003C 13002+ SRDA R2,60
00ACB0 8E20 003C 0003C 13003+ SRDA R2,60
13004+*
00ACB4 06FB 13005 BCTR R15,R11
13006 TSIMRET
00ACB6 58F0 C128 0ACC8 13007+ L R15,=A(SAVETST) R15 := current save area
00ACBA 58DF 0004 00004 13008+ L R13,4(R15) get old save area back
00ACBE 98EC D00C 0000C 13009+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00ACC2 07FE 13010+ BR 14 RETURN 02000000
13011 TSIMEND
00ACC8 13012+ LTORG
00ACC8 00000458 13013 =A(SAVETST)
0ACCC 13014+T225TEND EQU *
13015 *
13016 * Test 23x -- logical and/or/xor ===========================
13017 *
13018 * Test 230 -- XR R,R ---------------------------------------
13019 *
13020 TSIMBEG T230,15000,100,1,C'XR R,R'
13021+*
002E64 13022+TDSCDAT CSECT
002E68 13023+ DS 0D
13024+*
002E68 0000ACD0 13025+T230TDSC DC A(T230) // TENTRY
002E6C 00000104 13026+ DC A(T230TEND-T230) // TLENGTH
002E70 00003A98 13027+ DC F'15000' // TLRCNT
002E74 00000064 13028+ DC F'100' // TIGCNT
002E78 00000001 13029+ DC F'1' // TLTYPE
001479 13030+TEXT CSECT
001479 E3F2F3F0 13031+SPTR1048 DC C'T230'
002E7C 13032+TDSCDAT CSECT
002E7C 13033+ DS 0F
002E7C 04001479 13034+ DC AL1(L'SPTR1048),AL3(SPTR1048)
00147D 13035+TEXT CSECT
00147D E7D940D96BD9 13036+SPTR1049 DC C'XR R,R'
002E80 13037+TDSCDAT CSECT
002E80 13038+ DS 0F
002E80 0600147D 13039+ DC AL1(L'SPTR1049),AL3(SPTR1049)
13040+*
004AF8 13041+TDSCTBL CSECT
04AF8 13042+T230TPTR EQU *
004AF8 00002E68 13043+ DC A(T230TDSC) enabled test
13044+*
00ACCC 13045+TCODE CSECT
00ACD0 13046+ DS 0D ensure double word alignment for test
00ACD0 13047+T230 DS 0H 01650000
00ACD0 90EC D00C 0000C 13048+ STM 14,12,12(13) SAVE REGISTERS 02950000
00ACD4 18CF 13049+ LR R12,R15 base register := entry address
0ACD0 13050+ USING T230,R12 declare code base register
00ACD6 41B0 C024 0ACF4 13051+ LA R11,T230L load loop target to R11
00ACDA 58F0 C100 0ADD0 13052+ L R15,=A(SAVETST) R15 := current save area
00ACDE 50DF 0004 00004 13053+ ST R13,4(R15) set back pointer in current save area
00ACE2 182D 13054+ LR R2,R13 remember callers save area
PAGE 240
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00ACE4 18DF 13055+ LR R13,R15 setup current save area
00ACE6 50D2 0008 00008 13056+ ST R13,8(R2) set forw pointer in callers save area
00000 13057+ USING TDSC,R1 declare TDSC base register
00ACEA 58F0 1008 00008 13058+ L R15,TLRCNT load local repeat count to R15
13059+*
13060 *
00ACEE 1722 13061 XR R2,R2
00ACF0 4130 0001 00001 13062 LA R3,1
13063 T230L REPINS XR,(R2,R3) repeat: XR R2,R3
13064+*
13065+* build from sublist &ALIST a comma separated string &ARGS
13066+*
13067+*
13068+*
13069+*
13070+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
13071+* this allows to transfer the repeat count from last TDSCGEN call
13072+*
13073+*
0ACF4 13074+T230L EQU *
13075+*
13076+* write a comment indicating what REPINS does (in case NOGEN in effect)
13077+*
13078+*,// REPINS: do 100 times:
13079+*
13080+* MNOTE requires that ' is doubled for expanded variables
13081+* thus build &MASTR as a copy of '&ARGS with ' doubled
13082+*
13083+*
13084+*,// XR R2,R3
13085+*
13086+* finally generate code: &ICNT copies of &CODE &ARGS
13087+*
00ACF4 1723 13088+ XR R2,R3
00ACF6 1723 13089+ XR R2,R3
00ACF8 1723 13090+ XR R2,R3
00ACFA 1723 13091+ XR R2,R3
00ACFC 1723 13092+ XR R2,R3
00ACFE 1723 13093+ XR R2,R3
00AD00 1723 13094+ XR R2,R3
00AD02 1723 13095+ XR R2,R3
00AD04 1723 13096+ XR R2,R3
00AD06 1723 13097+ XR R2,R3
00AD08 1723 13098+ XR R2,R3
00AD0A 1723 13099+ XR R2,R3
00AD0C 1723 13100+ XR R2,R3
00AD0E 1723 13101+ XR R2,R3
00AD10 1723 13102+ XR R2,R3
00AD12 1723 13103+ XR R2,R3
00AD14 1723 13104+ XR R2,R3
00AD16 1723 13105+ XR R2,R3
00AD18 1723 13106+ XR R2,R3
00AD1A 1723 13107+ XR R2,R3
00AD1C 1723 13108+ XR R2,R3
00AD1E 1723 13109+ XR R2,R3
PAGE 241
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00AD20 1723 13110+ XR R2,R3
00AD22 1723 13111+ XR R2,R3
00AD24 1723 13112+ XR R2,R3
00AD26 1723 13113+ XR R2,R3
00AD28 1723 13114+ XR R2,R3
00AD2A 1723 13115+ XR R2,R3
00AD2C 1723 13116+ XR R2,R3
00AD2E 1723 13117+ XR R2,R3
00AD30 1723 13118+ XR R2,R3
00AD32 1723 13119+ XR R2,R3
00AD34 1723 13120+ XR R2,R3
00AD36 1723 13121+ XR R2,R3
00AD38 1723 13122+ XR R2,R3
00AD3A 1723 13123+ XR R2,R3
00AD3C 1723 13124+ XR R2,R3
00AD3E 1723 13125+ XR R2,R3
00AD40 1723 13126+ XR R2,R3
00AD42 1723 13127+ XR R2,R3
00AD44 1723 13128+ XR R2,R3
00AD46 1723 13129+ XR R2,R3
00AD48 1723 13130+ XR R2,R3
00AD4A 1723 13131+ XR R2,R3
00AD4C 1723 13132+ XR R2,R3
00AD4E 1723 13133+ XR R2,R3
00AD50 1723 13134+ XR R2,R3
00AD52 1723 13135+ XR R2,R3
00AD54 1723 13136+ XR R2,R3
00AD56 1723 13137+ XR R2,R3
00AD58 1723 13138+ XR R2,R3
00AD5A 1723 13139+ XR R2,R3
00AD5C 1723 13140+ XR R2,R3
00AD5E 1723 13141+ XR R2,R3
00AD60 1723 13142+ XR R2,R3
00AD62 1723 13143+ XR R2,R3
00AD64 1723 13144+ XR R2,R3
00AD66 1723 13145+ XR R2,R3
00AD68 1723 13146+ XR R2,R3
00AD6A 1723 13147+ XR R2,R3
00AD6C 1723 13148+ XR R2,R3
00AD6E 1723 13149+ XR R2,R3
00AD70 1723 13150+ XR R2,R3
00AD72 1723 13151+ XR R2,R3
00AD74 1723 13152+ XR R2,R3
00AD76 1723 13153+ XR R2,R3
00AD78 1723 13154+ XR R2,R3
00AD7A 1723 13155+ XR R2,R3
00AD7C 1723 13156+ XR R2,R3
00AD7E 1723 13157+ XR R2,R3
00AD80 1723 13158+ XR R2,R3
00AD82 1723 13159+ XR R2,R3
00AD84 1723 13160+ XR R2,R3
00AD86 1723 13161+ XR R2,R3
00AD88 1723 13162+ XR R2,R3
00AD8A 1723 13163+ XR R2,R3
00AD8C 1723 13164+ XR R2,R3
PAGE 242
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00AD8E 1723 13165+ XR R2,R3
00AD90 1723 13166+ XR R2,R3
00AD92 1723 13167+ XR R2,R3
00AD94 1723 13168+ XR R2,R3
00AD96 1723 13169+ XR R2,R3
00AD98 1723 13170+ XR R2,R3
00AD9A 1723 13171+ XR R2,R3
00AD9C 1723 13172+ XR R2,R3
00AD9E 1723 13173+ XR R2,R3
00ADA0 1723 13174+ XR R2,R3
00ADA2 1723 13175+ XR R2,R3
00ADA4 1723 13176+ XR R2,R3
00ADA6 1723 13177+ XR R2,R3
00ADA8 1723 13178+ XR R2,R3
00ADAA 1723 13179+ XR R2,R3
00ADAC 1723 13180+ XR R2,R3
00ADAE 1723 13181+ XR R2,R3
00ADB0 1723 13182+ XR R2,R3
00ADB2 1723 13183+ XR R2,R3
00ADB4 1723 13184+ XR R2,R3
00ADB6 1723 13185+ XR R2,R3
00ADB8 1723 13186+ XR R2,R3
00ADBA 1723 13187+ XR R2,R3
13188+*
00ADBC 06FB 13189 BCTR R15,R11
13190 TSIMRET
00ADBE 58F0 C100 0ADD0 13191+ L R15,=A(SAVETST) R15 := current save area
00ADC2 58DF 0004 00004 13192+ L R13,4(R15) get old save area back
00ADC6 98EC D00C 0000C 13193+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00ADCA 07FE 13194+ BR 14 RETURN 02000000
13195 TSIMEND
00ADD0 13196+ LTORG
00ADD0 00000458 13197 =A(SAVETST)
0ADD4 13198+T230TEND EQU *
13199 *
13200 * Test 231 -- X R,m ----------------------------------------
13201 *
13202 TSIMBEG T231,10000,50,1,C'X R,m'
13203+*
002E84 13204+TDSCDAT CSECT
002E88 13205+ DS 0D
13206+*
002E88 0000ADD8 13207+T231TDSC DC A(T231) // TENTRY
002E8C 00000100 13208+ DC A(T231TEND-T231) // TLENGTH
002E90 00002710 13209+ DC F'10000' // TLRCNT
002E94 00000032 13210+ DC F'50' // TIGCNT
002E98 00000001 13211+ DC F'1' // TLTYPE
001483 13212+TEXT CSECT
001483 E3F2F3F1 13213+SPTR1060 DC C'T231'
002E9C 13214+TDSCDAT CSECT
002E9C 13215+ DS 0F
002E9C 04001483 13216+ DC AL1(L'SPTR1060),AL3(SPTR1060)
001487 13217+TEXT CSECT
001487 E740D96B94 13218+SPTR1061 DC C'X R,m'
002EA0 13219+TDSCDAT CSECT
PAGE 243
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002EA0 13220+ DS 0F
002EA0 05001487 13221+ DC AL1(L'SPTR1061),AL3(SPTR1061)
13222+*
004AFC 13223+TDSCTBL CSECT
04AFC 13224+T231TPTR EQU *
004AFC 00002E88 13225+ DC A(T231TDSC) enabled test
13226+*
00ADD4 13227+TCODE CSECT
00ADD8 13228+ DS 0D ensure double word alignment for test
00ADD8 13229+T231 DS 0H 01650000
00ADD8 90EC D00C 0000C 13230+ STM 14,12,12(13) SAVE REGISTERS 02950000
00ADDC 18CF 13231+ LR R12,R15 base register := entry address
0ADD8 13232+ USING T231,R12 declare code base register
00ADDE 41B0 C020 0ADF8 13233+ LA R11,T231L load loop target to R11
00ADE2 58F0 C0F8 0AED0 13234+ L R15,=A(SAVETST) R15 := current save area
00ADE6 50DF 0004 00004 13235+ ST R13,4(R15) set back pointer in current save area
00ADEA 182D 13236+ LR R2,R13 remember callers save area
00ADEC 18DF 13237+ LR R13,R15 setup current save area
00ADEE 50D2 0008 00008 13238+ ST R13,8(R2) set forw pointer in callers save area
00000 13239+ USING TDSC,R1 declare TDSC base register
00ADF2 58F0 1008 00008 13240+ L R15,TLRCNT load local repeat count to R15
13241+*
13242 *
00ADF6 1722 13243 XR R2,R2
13244 T231L REPINS X,(R2,=F'1') repeat: X R2,=F'1'
13245+*
13246+* build from sublist &ALIST a comma separated string &ARGS
13247+*
13248+*
13249+*
13250+*
13251+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
13252+* this allows to transfer the repeat count from last TDSCGEN call
13253+*
13254+*
0ADF8 13255+T231L EQU *
13256+*
13257+* write a comment indicating what REPINS does (in case NOGEN in effect)
13258+*
13259+*,// REPINS: do 50 times:
13260+*
13261+* MNOTE requires that ' is doubled for expanded variables
13262+* thus build &MASTR as a copy of '&ARGS with ' doubled
13263+*
13264+*
13265+*,// X R2,=F'1'
13266+*
13267+* finally generate code: &ICNT copies of &CODE &ARGS
13268+*
00ADF8 5720 C0FC 0AED4 13269+ X R2,=F'1'
00ADFC 5720 C0FC 0AED4 13270+ X R2,=F'1'
00AE00 5720 C0FC 0AED4 13271+ X R2,=F'1'
00AE04 5720 C0FC 0AED4 13272+ X R2,=F'1'
00AE08 5720 C0FC 0AED4 13273+ X R2,=F'1'
00AE0C 5720 C0FC 0AED4 13274+ X R2,=F'1'
PAGE 244
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00AE10 5720 C0FC 0AED4 13275+ X R2,=F'1'
00AE14 5720 C0FC 0AED4 13276+ X R2,=F'1'
00AE18 5720 C0FC 0AED4 13277+ X R2,=F'1'
00AE1C 5720 C0FC 0AED4 13278+ X R2,=F'1'
00AE20 5720 C0FC 0AED4 13279+ X R2,=F'1'
00AE24 5720 C0FC 0AED4 13280+ X R2,=F'1'
00AE28 5720 C0FC 0AED4 13281+ X R2,=F'1'
00AE2C 5720 C0FC 0AED4 13282+ X R2,=F'1'
00AE30 5720 C0FC 0AED4 13283+ X R2,=F'1'
00AE34 5720 C0FC 0AED4 13284+ X R2,=F'1'
00AE38 5720 C0FC 0AED4 13285+ X R2,=F'1'
00AE3C 5720 C0FC 0AED4 13286+ X R2,=F'1'
00AE40 5720 C0FC 0AED4 13287+ X R2,=F'1'
00AE44 5720 C0FC 0AED4 13288+ X R2,=F'1'
00AE48 5720 C0FC 0AED4 13289+ X R2,=F'1'
00AE4C 5720 C0FC 0AED4 13290+ X R2,=F'1'
00AE50 5720 C0FC 0AED4 13291+ X R2,=F'1'
00AE54 5720 C0FC 0AED4 13292+ X R2,=F'1'
00AE58 5720 C0FC 0AED4 13293+ X R2,=F'1'
00AE5C 5720 C0FC 0AED4 13294+ X R2,=F'1'
00AE60 5720 C0FC 0AED4 13295+ X R2,=F'1'
00AE64 5720 C0FC 0AED4 13296+ X R2,=F'1'
00AE68 5720 C0FC 0AED4 13297+ X R2,=F'1'
00AE6C 5720 C0FC 0AED4 13298+ X R2,=F'1'
00AE70 5720 C0FC 0AED4 13299+ X R2,=F'1'
00AE74 5720 C0FC 0AED4 13300+ X R2,=F'1'
00AE78 5720 C0FC 0AED4 13301+ X R2,=F'1'
00AE7C 5720 C0FC 0AED4 13302+ X R2,=F'1'
00AE80 5720 C0FC 0AED4 13303+ X R2,=F'1'
00AE84 5720 C0FC 0AED4 13304+ X R2,=F'1'
00AE88 5720 C0FC 0AED4 13305+ X R2,=F'1'
00AE8C 5720 C0FC 0AED4 13306+ X R2,=F'1'
00AE90 5720 C0FC 0AED4 13307+ X R2,=F'1'
00AE94 5720 C0FC 0AED4 13308+ X R2,=F'1'
00AE98 5720 C0FC 0AED4 13309+ X R2,=F'1'
00AE9C 5720 C0FC 0AED4 13310+ X R2,=F'1'
00AEA0 5720 C0FC 0AED4 13311+ X R2,=F'1'
00AEA4 5720 C0FC 0AED4 13312+ X R2,=F'1'
00AEA8 5720 C0FC 0AED4 13313+ X R2,=F'1'
00AEAC 5720 C0FC 0AED4 13314+ X R2,=F'1'
00AEB0 5720 C0FC 0AED4 13315+ X R2,=F'1'
00AEB4 5720 C0FC 0AED4 13316+ X R2,=F'1'
00AEB8 5720 C0FC 0AED4 13317+ X R2,=F'1'
00AEBC 5720 C0FC 0AED4 13318+ X R2,=F'1'
13319+*
00AEC0 06FB 13320 BCTR R15,R11
13321 TSIMRET
00AEC2 58F0 C0F8 0AED0 13322+ L R15,=A(SAVETST) R15 := current save area
00AEC6 58DF 0004 00004 13323+ L R13,4(R15) get old save area back
00AECA 98EC D00C 0000C 13324+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00AECE 07FE 13325+ BR 14 RETURN 02000000
13326 TSIMEND
00AED0 13327+ LTORG
00AED0 00000458 13328 =A(SAVETST)
00AED4 00000001 13329 =F'1'
PAGE 245
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0AED8 13330+T231TEND EQU *
13331 *
13332 * Test 232 -- XI R,i ---------------------------------------
13333 *
13334 TSIMBEG T232,10000,50,1,C'XI m,i'
13335+*
002EA4 13336+TDSCDAT CSECT
002EA8 13337+ DS 0D
13338+*
002EA8 0000AED8 13339+T232TDSC DC A(T232) // TENTRY
002EAC 000000FC 13340+ DC A(T232TEND-T232) // TLENGTH
002EB0 00002710 13341+ DC F'10000' // TLRCNT
002EB4 00000032 13342+ DC F'50' // TIGCNT
002EB8 00000001 13343+ DC F'1' // TLTYPE
00148C 13344+TEXT CSECT
00148C E3F2F3F2 13345+SPTR1072 DC C'T232'
002EBC 13346+TDSCDAT CSECT
002EBC 13347+ DS 0F
002EBC 0400148C 13348+ DC AL1(L'SPTR1072),AL3(SPTR1072)
001490 13349+TEXT CSECT
001490 E7C940946B89 13350+SPTR1073 DC C'XI m,i'
002EC0 13351+TDSCDAT CSECT
002EC0 13352+ DS 0F
002EC0 06001490 13353+ DC AL1(L'SPTR1073),AL3(SPTR1073)
13354+*
004B00 13355+TDSCTBL CSECT
04B00 13356+T232TPTR EQU *
004B00 00002EA8 13357+ DC A(T232TDSC) enabled test
13358+*
00AED8 13359+TCODE CSECT
00AED8 13360+ DS 0D ensure double word alignment for test
00AED8 13361+T232 DS 0H 01650000
00AED8 90EC D00C 0000C 13362+ STM 14,12,12(13) SAVE REGISTERS 02950000
00AEDC 18CF 13363+ LR R12,R15 base register := entry address
0AED8 13364+ USING T232,R12 declare code base register
00AEDE 41B0 C01E 0AEF6 13365+ LA R11,T232L load loop target to R11
00AEE2 58F0 C0F8 0AFD0 13366+ L R15,=A(SAVETST) R15 := current save area
00AEE6 50DF 0004 00004 13367+ ST R13,4(R15) set back pointer in current save area
00AEEA 182D 13368+ LR R2,R13 remember callers save area
00AEEC 18DF 13369+ LR R13,R15 setup current save area
00AEEE 50D2 0008 00008 13370+ ST R13,8(R2) set forw pointer in callers save area
00000 13371+ USING TDSC,R1 declare TDSC base register
00AEF2 58F0 1008 00008 13372+ L R15,TLRCNT load local repeat count to R15
13373+*
13374 *
13375 T232L REPINS XI,(T232V,X'FF') repeat: XI T232V,X'FF'
13376+*
13377+* build from sublist &ALIST a comma separated string &ARGS
13378+*
13379+*
13380+*
13381+*
13382+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
13383+* this allows to transfer the repeat count from last TDSCGEN call
13384+*
PAGE 246
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
13385+*
0AEF6 13386+T232L EQU *
13387+*
13388+* write a comment indicating what REPINS does (in case NOGEN in effect)
13389+*
13390+*,// REPINS: do 50 times:
13391+*
13392+* MNOTE requires that ' is doubled for expanded variables
13393+* thus build &MASTR as a copy of '&ARGS with ' doubled
13394+*
13395+*
13396+*,// XI T232V,X'FF'
13397+*
13398+* finally generate code: &ICNT copies of &CODE &ARGS
13399+*
00AEF6 97FF C0F6 0AFCE 13400+ XI T232V,X'FF'
00AEFA 97FF C0F6 0AFCE 13401+ XI T232V,X'FF'
00AEFE 97FF C0F6 0AFCE 13402+ XI T232V,X'FF'
00AF02 97FF C0F6 0AFCE 13403+ XI T232V,X'FF'
00AF06 97FF C0F6 0AFCE 13404+ XI T232V,X'FF'
00AF0A 97FF C0F6 0AFCE 13405+ XI T232V,X'FF'
00AF0E 97FF C0F6 0AFCE 13406+ XI T232V,X'FF'
00AF12 97FF C0F6 0AFCE 13407+ XI T232V,X'FF'
00AF16 97FF C0F6 0AFCE 13408+ XI T232V,X'FF'
00AF1A 97FF C0F6 0AFCE 13409+ XI T232V,X'FF'
00AF1E 97FF C0F6 0AFCE 13410+ XI T232V,X'FF'
00AF22 97FF C0F6 0AFCE 13411+ XI T232V,X'FF'
00AF26 97FF C0F6 0AFCE 13412+ XI T232V,X'FF'
00AF2A 97FF C0F6 0AFCE 13413+ XI T232V,X'FF'
00AF2E 97FF C0F6 0AFCE 13414+ XI T232V,X'FF'
00AF32 97FF C0F6 0AFCE 13415+ XI T232V,X'FF'
00AF36 97FF C0F6 0AFCE 13416+ XI T232V,X'FF'
00AF3A 97FF C0F6 0AFCE 13417+ XI T232V,X'FF'
00AF3E 97FF C0F6 0AFCE 13418+ XI T232V,X'FF'
00AF42 97FF C0F6 0AFCE 13419+ XI T232V,X'FF'
00AF46 97FF C0F6 0AFCE 13420+ XI T232V,X'FF'
00AF4A 97FF C0F6 0AFCE 13421+ XI T232V,X'FF'
00AF4E 97FF C0F6 0AFCE 13422+ XI T232V,X'FF'
00AF52 97FF C0F6 0AFCE 13423+ XI T232V,X'FF'
00AF56 97FF C0F6 0AFCE 13424+ XI T232V,X'FF'
00AF5A 97FF C0F6 0AFCE 13425+ XI T232V,X'FF'
00AF5E 97FF C0F6 0AFCE 13426+ XI T232V,X'FF'
00AF62 97FF C0F6 0AFCE 13427+ XI T232V,X'FF'
00AF66 97FF C0F6 0AFCE 13428+ XI T232V,X'FF'
00AF6A 97FF C0F6 0AFCE 13429+ XI T232V,X'FF'
00AF6E 97FF C0F6 0AFCE 13430+ XI T232V,X'FF'
00AF72 97FF C0F6 0AFCE 13431+ XI T232V,X'FF'
00AF76 97FF C0F6 0AFCE 13432+ XI T232V,X'FF'
00AF7A 97FF C0F6 0AFCE 13433+ XI T232V,X'FF'
00AF7E 97FF C0F6 0AFCE 13434+ XI T232V,X'FF'
00AF82 97FF C0F6 0AFCE 13435+ XI T232V,X'FF'
00AF86 97FF C0F6 0AFCE 13436+ XI T232V,X'FF'
00AF8A 97FF C0F6 0AFCE 13437+ XI T232V,X'FF'
00AF8E 97FF C0F6 0AFCE 13438+ XI T232V,X'FF'
00AF92 97FF C0F6 0AFCE 13439+ XI T232V,X'FF'
PAGE 247
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00AF96 97FF C0F6 0AFCE 13440+ XI T232V,X'FF'
00AF9A 97FF C0F6 0AFCE 13441+ XI T232V,X'FF'
00AF9E 97FF C0F6 0AFCE 13442+ XI T232V,X'FF'
00AFA2 97FF C0F6 0AFCE 13443+ XI T232V,X'FF'
00AFA6 97FF C0F6 0AFCE 13444+ XI T232V,X'FF'
00AFAA 97FF C0F6 0AFCE 13445+ XI T232V,X'FF'
00AFAE 97FF C0F6 0AFCE 13446+ XI T232V,X'FF'
00AFB2 97FF C0F6 0AFCE 13447+ XI T232V,X'FF'
00AFB6 97FF C0F6 0AFCE 13448+ XI T232V,X'FF'
00AFBA 97FF C0F6 0AFCE 13449+ XI T232V,X'FF'
13450+*
00AFBE 06FB 13451 BCTR R15,R11
13452 TSIMRET
00AFC0 58F0 C0F8 0AFD0 13453+ L R15,=A(SAVETST) R15 := current save area
00AFC4 58DF 0004 00004 13454+ L R13,4(R15) get old save area back
00AFC8 98EC D00C 0000C 13455+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00AFCC 07FE 13456+ BR 14 RETURN 02000000
13457 *
00AFCE 11 13458 T232V DC X'11'
13459 TSIMEND
00AFD0 13460+ LTORG
00AFD0 00000458 13461 =A(SAVETST)
0AFD4 13462+T232TEND EQU *
13463 *
13464 * Test 235 -- XC m,m (10c) ---------------------------------
13465 *
13466 TSIMBEG T235,4500,50,1,C'XC m,m (10c)'
13467+*
002EC4 13468+TDSCDAT CSECT
002EC8 13469+ DS 0D
13470+*
002EC8 0000AFD8 13471+T235TDSC DC A(T235) // TENTRY
002ECC 0000017C 13472+ DC A(T235TEND-T235) // TLENGTH
002ED0 00001194 13473+ DC F'4500' // TLRCNT
002ED4 00000032 13474+ DC F'50' // TIGCNT
002ED8 00000001 13475+ DC F'1' // TLTYPE
001496 13476+TEXT CSECT
001496 E3F2F3F5 13477+SPTR1084 DC C'T235'
002EDC 13478+TDSCDAT CSECT
002EDC 13479+ DS 0F
002EDC 04001496 13480+ DC AL1(L'SPTR1084),AL3(SPTR1084)
00149A 13481+TEXT CSECT
00149A E7C340946B94404D 13482+SPTR1085 DC C'XC m,m (10c)'
002EE0 13483+TDSCDAT CSECT
002EE0 13484+ DS 0F
002EE0 0C00149A 13485+ DC AL1(L'SPTR1085),AL3(SPTR1085)
13486+*
004B04 13487+TDSCTBL CSECT
04B04 13488+T235TPTR EQU *
004B04 00002EC8 13489+ DC A(T235TDSC) enabled test
13490+*
00AFD4 13491+TCODE CSECT
00AFD8 13492+ DS 0D ensure double word alignment for test
00AFD8 13493+T235 DS 0H 01650000
00AFD8 90EC D00C 0000C 13494+ STM 14,12,12(13) SAVE REGISTERS 02950000
PAGE 248
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00AFDC 18CF 13495+ LR R12,R15 base register := entry address
0AFD8 13496+ USING T235,R12 declare code base register
00AFDE 41B0 C026 0AFFE 13497+ LA R11,T235L load loop target to R11
00AFE2 58F0 C178 0B150 13498+ L R15,=A(SAVETST) R15 := current save area
00AFE6 50DF 0004 00004 13499+ ST R13,4(R15) set back pointer in current save area
00AFEA 182D 13500+ LR R2,R13 remember callers save area
00AFEC 18DF 13501+ LR R13,R15 setup current save area
00AFEE 50D2 0008 00008 13502+ ST R13,8(R2) set forw pointer in callers save area
00000 13503+ USING TDSC,R1 declare TDSC base register
00AFF2 58F0 1008 00008 13504+ L R15,TLRCNT load local repeat count to R15
13505+*
13506 *
00AFF6 4120 C162 0B13A 13507 LA R2,T235V1
00AFFA 4130 C16C 0B144 13508 LA R3,T235V2
13509 T235L REPINS XC,(0(10,R2),0(R3)) repeat: XC 0(10,R2),0(R3)
13510+*
13511+* build from sublist &ALIST a comma separated string &ARGS
13512+*
13513+*
13514+*
13515+*
13516+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
13517+* this allows to transfer the repeat count from last TDSCGEN call
13518+*
13519+*
0AFFE 13520+T235L EQU *
13521+*
13522+* write a comment indicating what REPINS does (in case NOGEN in effect)
13523+*
13524+*,// REPINS: do 50 times:
13525+*
13526+* MNOTE requires that ' is doubled for expanded variables
13527+* thus build &MASTR as a copy of '&ARGS with ' doubled
13528+*
13529+*
13530+*,// XC 0(10,R2),0(R3)
13531+*
13532+* finally generate code: &ICNT copies of &CODE &ARGS
13533+*
00AFFE D709 2000 3000 00000 00000 13534+ XC 0(10,R2),0(R3)
00B004 D709 2000 3000 00000 00000 13535+ XC 0(10,R2),0(R3)
00B00A D709 2000 3000 00000 00000 13536+ XC 0(10,R2),0(R3)
00B010 D709 2000 3000 00000 00000 13537+ XC 0(10,R2),0(R3)
00B016 D709 2000 3000 00000 00000 13538+ XC 0(10,R2),0(R3)
00B01C D709 2000 3000 00000 00000 13539+ XC 0(10,R2),0(R3)
00B022 D709 2000 3000 00000 00000 13540+ XC 0(10,R2),0(R3)
00B028 D709 2000 3000 00000 00000 13541+ XC 0(10,R2),0(R3)
00B02E D709 2000 3000 00000 00000 13542+ XC 0(10,R2),0(R3)
00B034 D709 2000 3000 00000 00000 13543+ XC 0(10,R2),0(R3)
00B03A D709 2000 3000 00000 00000 13544+ XC 0(10,R2),0(R3)
00B040 D709 2000 3000 00000 00000 13545+ XC 0(10,R2),0(R3)
00B046 D709 2000 3000 00000 00000 13546+ XC 0(10,R2),0(R3)
00B04C D709 2000 3000 00000 00000 13547+ XC 0(10,R2),0(R3)
00B052 D709 2000 3000 00000 00000 13548+ XC 0(10,R2),0(R3)
00B058 D709 2000 3000 00000 00000 13549+ XC 0(10,R2),0(R3)
PAGE 249
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00B05E D709 2000 3000 00000 00000 13550+ XC 0(10,R2),0(R3)
00B064 D709 2000 3000 00000 00000 13551+ XC 0(10,R2),0(R3)
00B06A D709 2000 3000 00000 00000 13552+ XC 0(10,R2),0(R3)
00B070 D709 2000 3000 00000 00000 13553+ XC 0(10,R2),0(R3)
00B076 D709 2000 3000 00000 00000 13554+ XC 0(10,R2),0(R3)
00B07C D709 2000 3000 00000 00000 13555+ XC 0(10,R2),0(R3)
00B082 D709 2000 3000 00000 00000 13556+ XC 0(10,R2),0(R3)
00B088 D709 2000 3000 00000 00000 13557+ XC 0(10,R2),0(R3)
00B08E D709 2000 3000 00000 00000 13558+ XC 0(10,R2),0(R3)
00B094 D709 2000 3000 00000 00000 13559+ XC 0(10,R2),0(R3)
00B09A D709 2000 3000 00000 00000 13560+ XC 0(10,R2),0(R3)
00B0A0 D709 2000 3000 00000 00000 13561+ XC 0(10,R2),0(R3)
00B0A6 D709 2000 3000 00000 00000 13562+ XC 0(10,R2),0(R3)
00B0AC D709 2000 3000 00000 00000 13563+ XC 0(10,R2),0(R3)
00B0B2 D709 2000 3000 00000 00000 13564+ XC 0(10,R2),0(R3)
00B0B8 D709 2000 3000 00000 00000 13565+ XC 0(10,R2),0(R3)
00B0BE D709 2000 3000 00000 00000 13566+ XC 0(10,R2),0(R3)
00B0C4 D709 2000 3000 00000 00000 13567+ XC 0(10,R2),0(R3)
00B0CA D709 2000 3000 00000 00000 13568+ XC 0(10,R2),0(R3)
00B0D0 D709 2000 3000 00000 00000 13569+ XC 0(10,R2),0(R3)
00B0D6 D709 2000 3000 00000 00000 13570+ XC 0(10,R2),0(R3)
00B0DC D709 2000 3000 00000 00000 13571+ XC 0(10,R2),0(R3)
00B0E2 D709 2000 3000 00000 00000 13572+ XC 0(10,R2),0(R3)
00B0E8 D709 2000 3000 00000 00000 13573+ XC 0(10,R2),0(R3)
00B0EE D709 2000 3000 00000 00000 13574+ XC 0(10,R2),0(R3)
00B0F4 D709 2000 3000 00000 00000 13575+ XC 0(10,R2),0(R3)
00B0FA D709 2000 3000 00000 00000 13576+ XC 0(10,R2),0(R3)
00B100 D709 2000 3000 00000 00000 13577+ XC 0(10,R2),0(R3)
00B106 D709 2000 3000 00000 00000 13578+ XC 0(10,R2),0(R3)
00B10C D709 2000 3000 00000 00000 13579+ XC 0(10,R2),0(R3)
00B112 D709 2000 3000 00000 00000 13580+ XC 0(10,R2),0(R3)
00B118 D709 2000 3000 00000 00000 13581+ XC 0(10,R2),0(R3)
00B11E D709 2000 3000 00000 00000 13582+ XC 0(10,R2),0(R3)
00B124 D709 2000 3000 00000 00000 13583+ XC 0(10,R2),0(R3)
13584+*
00B12A 06FB 13585 BCTR R15,R11
13586 TSIMRET
00B12C 58F0 C178 0B150 13587+ L R15,=A(SAVETST) R15 := current save area
00B130 58DF 0004 00004 13588+ L R13,4(R15) get old save area back
00B134 98EC D00C 0000C 13589+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00B138 07FE 13590+ BR 14 RETURN 02000000
13591 *
00B13A 1111111111111111 13592 T235V1 DC 10X'11'
00B144 FFFFFFFFFFFFFFFF 13593 T235V2 DC 10X'FF'
13594 TSIMEND
00B150 13595+ LTORG
00B150 00000458 13596 =A(SAVETST)
0B154 13597+T235TEND EQU *
13598 *
13599 * Test 236 -- XC m,m (100c) --------------------------------
13600 *
13601 TSIMBEG T236,2500,20,1,C'XC m,m (100c)'
13602+*
002EE4 13603+TDSCDAT CSECT
002EE8 13604+ DS 0D
PAGE 250
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
13605+*
002EE8 0000B158 13606+T236TDSC DC A(T236) // TENTRY
002EEC 0000017C 13607+ DC A(T236TEND-T236) // TLENGTH
002EF0 000009C4 13608+ DC F'2500' // TLRCNT
002EF4 00000014 13609+ DC F'20' // TIGCNT
002EF8 00000001 13610+ DC F'1' // TLTYPE
0014A6 13611+TEXT CSECT
0014A6 E3F2F3F6 13612+SPTR1096 DC C'T236'
002EFC 13613+TDSCDAT CSECT
002EFC 13614+ DS 0F
002EFC 040014A6 13615+ DC AL1(L'SPTR1096),AL3(SPTR1096)
0014AA 13616+TEXT CSECT
0014AA E7C340946B94404D 13617+SPTR1097 DC C'XC m,m (100c)'
002F00 13618+TDSCDAT CSECT
002F00 13619+ DS 0F
002F00 0D0014AA 13620+ DC AL1(L'SPTR1097),AL3(SPTR1097)
13621+*
004B08 13622+TDSCTBL CSECT
04B08 13623+T236TPTR EQU *
004B08 00002EE8 13624+ DC A(T236TDSC) enabled test
13625+*
00B154 13626+TCODE CSECT
00B158 13627+ DS 0D ensure double word alignment for test
00B158 13628+T236 DS 0H 01650000
00B158 90EC D00C 0000C 13629+ STM 14,12,12(13) SAVE REGISTERS 02950000
00B15C 18CF 13630+ LR R12,R15 base register := entry address
0B158 13631+ USING T236,R12 declare code base register
00B15E 41B0 C026 0B17E 13632+ LA R11,T236L load loop target to R11
00B162 58F0 C178 0B2D0 13633+ L R15,=A(SAVETST) R15 := current save area
00B166 50DF 0004 00004 13634+ ST R13,4(R15) set back pointer in current save area
00B16A 182D 13635+ LR R2,R13 remember callers save area
00B16C 18DF 13636+ LR R13,R15 setup current save area
00B16E 50D2 0008 00008 13637+ ST R13,8(R2) set forw pointer in callers save area
00000 13638+ USING TDSC,R1 declare TDSC base register
00B172 58F0 1008 00008 13639+ L R15,TLRCNT load local repeat count to R15
13640+*
13641 *
00B176 4120 C0AE 0B206 13642 LA R2,T236V1
00B17A 4130 C112 0B26A 13643 LA R3,T236V2
13644 T236L REPINS XC,(0(100,R2),0(R3)) repeat: XC 0(100,R2),0(R3)
13645+*
13646+* build from sublist &ALIST a comma separated string &ARGS
13647+*
13648+*
13649+*
13650+*
13651+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
13652+* this allows to transfer the repeat count from last TDSCGEN call
13653+*
13654+*
0B17E 13655+T236L EQU *
13656+*
13657+* write a comment indicating what REPINS does (in case NOGEN in effect)
13658+*
13659+*,// REPINS: do 20 times:
PAGE 251
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
13660+*
13661+* MNOTE requires that ' is doubled for expanded variables
13662+* thus build &MASTR as a copy of '&ARGS with ' doubled
13663+*
13664+*
13665+*,// XC 0(100,R2),0(R3)
13666+*
13667+* finally generate code: &ICNT copies of &CODE &ARGS
13668+*
00B17E D763 2000 3000 00000 00000 13669+ XC 0(100,R2),0(R3)
00B184 D763 2000 3000 00000 00000 13670+ XC 0(100,R2),0(R3)
00B18A D763 2000 3000 00000 00000 13671+ XC 0(100,R2),0(R3)
00B190 D763 2000 3000 00000 00000 13672+ XC 0(100,R2),0(R3)
00B196 D763 2000 3000 00000 00000 13673+ XC 0(100,R2),0(R3)
00B19C D763 2000 3000 00000 00000 13674+ XC 0(100,R2),0(R3)
00B1A2 D763 2000 3000 00000 00000 13675+ XC 0(100,R2),0(R3)
00B1A8 D763 2000 3000 00000 00000 13676+ XC 0(100,R2),0(R3)
00B1AE D763 2000 3000 00000 00000 13677+ XC 0(100,R2),0(R3)
00B1B4 D763 2000 3000 00000 00000 13678+ XC 0(100,R2),0(R3)
00B1BA D763 2000 3000 00000 00000 13679+ XC 0(100,R2),0(R3)
00B1C0 D763 2000 3000 00000 00000 13680+ XC 0(100,R2),0(R3)
00B1C6 D763 2000 3000 00000 00000 13681+ XC 0(100,R2),0(R3)
00B1CC D763 2000 3000 00000 00000 13682+ XC 0(100,R2),0(R3)
00B1D2 D763 2000 3000 00000 00000 13683+ XC 0(100,R2),0(R3)
00B1D8 D763 2000 3000 00000 00000 13684+ XC 0(100,R2),0(R3)
00B1DE D763 2000 3000 00000 00000 13685+ XC 0(100,R2),0(R3)
00B1E4 D763 2000 3000 00000 00000 13686+ XC 0(100,R2),0(R3)
00B1EA D763 2000 3000 00000 00000 13687+ XC 0(100,R2),0(R3)
00B1F0 D763 2000 3000 00000 00000 13688+ XC 0(100,R2),0(R3)
13689+*
00B1F6 06FB 13690 BCTR R15,R11
13691 TSIMRET
00B1F8 58F0 C178 0B2D0 13692+ L R15,=A(SAVETST) R15 := current save area
00B1FC 58DF 0004 00004 13693+ L R13,4(R15) get old save area back
00B200 98EC D00C 0000C 13694+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00B204 07FE 13695+ BR 14 RETURN 02000000
13696 *
00B206 1111111111111111 13697 T236V1 DC 100X'11'
00B26A FFFFFFFFFFFFFFFF 13698 T236V2 DC 100X'FF'
13699 TSIMEND
00B2D0 13700+ LTORG
00B2D0 00000458 13701 =A(SAVETST)
0B2D4 13702+T236TEND EQU *
13703 *
13704 * Test 237 -- XC m,m (250c) --------------------------------
13705 *
13706 TSIMBEG T237,1000,20,1,C'XC m,m (250c)'
13707+*
002F04 13708+TDSCDAT CSECT
002F08 13709+ DS 0D
13710+*
002F08 0000B2D8 13711+T237TDSC DC A(T237) // TENTRY
002F0C 000002AC 13712+ DC A(T237TEND-T237) // TLENGTH
002F10 000003E8 13713+ DC F'1000' // TLRCNT
002F14 00000014 13714+ DC F'20' // TIGCNT
PAGE 252
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002F18 00000001 13715+ DC F'1' // TLTYPE
0014B7 13716+TEXT CSECT
0014B7 E3F2F3F7 13717+SPTR1108 DC C'T237'
002F1C 13718+TDSCDAT CSECT
002F1C 13719+ DS 0F
002F1C 040014B7 13720+ DC AL1(L'SPTR1108),AL3(SPTR1108)
0014BB 13721+TEXT CSECT
0014BB E7C340946B94404D 13722+SPTR1109 DC C'XC m,m (250c)'
002F20 13723+TDSCDAT CSECT
002F20 13724+ DS 0F
002F20 0D0014BB 13725+ DC AL1(L'SPTR1109),AL3(SPTR1109)
13726+*
004B0C 13727+TDSCTBL CSECT
04B0C 13728+T237TPTR EQU *
004B0C 00002F08 13729+ DC A(T237TDSC) enabled test
13730+*
00B2D4 13731+TCODE CSECT
00B2D8 13732+ DS 0D ensure double word alignment for test
00B2D8 13733+T237 DS 0H 01650000
00B2D8 90EC D00C 0000C 13734+ STM 14,12,12(13) SAVE REGISTERS 02950000
00B2DC 18CF 13735+ LR R12,R15 base register := entry address
0B2D8 13736+ USING T237,R12 declare code base register
00B2DE 41B0 C026 0B2FE 13737+ LA R11,T237L load loop target to R11
00B2E2 58F0 C2A8 0B580 13738+ L R15,=A(SAVETST) R15 := current save area
00B2E6 50DF 0004 00004 13739+ ST R13,4(R15) set back pointer in current save area
00B2EA 182D 13740+ LR R2,R13 remember callers save area
00B2EC 18DF 13741+ LR R13,R15 setup current save area
00B2EE 50D2 0008 00008 13742+ ST R13,8(R2) set forw pointer in callers save area
00000 13743+ USING TDSC,R1 declare TDSC base register
00B2F2 58F0 1008 00008 13744+ L R15,TLRCNT load local repeat count to R15
13745+*
13746 *
00B2F6 4120 C0AE 0B386 13747 LA R2,T237V1
00B2FA 4130 C1A8 0B480 13748 LA R3,T237V2
13749 T237L REPINS XC,(0(250,R2),0(R3)) repeat: XC 0(250,R2),0(R3)
13750+*
13751+* build from sublist &ALIST a comma separated string &ARGS
13752+*
13753+*
13754+*
13755+*
13756+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
13757+* this allows to transfer the repeat count from last TDSCGEN call
13758+*
13759+*
0B2FE 13760+T237L EQU *
13761+*
13762+* write a comment indicating what REPINS does (in case NOGEN in effect)
13763+*
13764+*,// REPINS: do 20 times:
13765+*
13766+* MNOTE requires that ' is doubled for expanded variables
13767+* thus build &MASTR as a copy of '&ARGS with ' doubled
13768+*
13769+*
PAGE 253
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
13770+*,// XC 0(250,R2),0(R3)
13771+*
13772+* finally generate code: &ICNT copies of &CODE &ARGS
13773+*
00B2FE D7F9 2000 3000 00000 00000 13774+ XC 0(250,R2),0(R3)
00B304 D7F9 2000 3000 00000 00000 13775+ XC 0(250,R2),0(R3)
00B30A D7F9 2000 3000 00000 00000 13776+ XC 0(250,R2),0(R3)
00B310 D7F9 2000 3000 00000 00000 13777+ XC 0(250,R2),0(R3)
00B316 D7F9 2000 3000 00000 00000 13778+ XC 0(250,R2),0(R3)
00B31C D7F9 2000 3000 00000 00000 13779+ XC 0(250,R2),0(R3)
00B322 D7F9 2000 3000 00000 00000 13780+ XC 0(250,R2),0(R3)
00B328 D7F9 2000 3000 00000 00000 13781+ XC 0(250,R2),0(R3)
00B32E D7F9 2000 3000 00000 00000 13782+ XC 0(250,R2),0(R3)
00B334 D7F9 2000 3000 00000 00000 13783+ XC 0(250,R2),0(R3)
00B33A D7F9 2000 3000 00000 00000 13784+ XC 0(250,R2),0(R3)
00B340 D7F9 2000 3000 00000 00000 13785+ XC 0(250,R2),0(R3)
00B346 D7F9 2000 3000 00000 00000 13786+ XC 0(250,R2),0(R3)
00B34C D7F9 2000 3000 00000 00000 13787+ XC 0(250,R2),0(R3)
00B352 D7F9 2000 3000 00000 00000 13788+ XC 0(250,R2),0(R3)
00B358 D7F9 2000 3000 00000 00000 13789+ XC 0(250,R2),0(R3)
00B35E D7F9 2000 3000 00000 00000 13790+ XC 0(250,R2),0(R3)
00B364 D7F9 2000 3000 00000 00000 13791+ XC 0(250,R2),0(R3)
00B36A D7F9 2000 3000 00000 00000 13792+ XC 0(250,R2),0(R3)
00B370 D7F9 2000 3000 00000 00000 13793+ XC 0(250,R2),0(R3)
13794+*
00B376 06FB 13795 BCTR R15,R11
13796 TSIMRET
00B378 58F0 C2A8 0B580 13797+ L R15,=A(SAVETST) R15 := current save area
00B37C 58DF 0004 00004 13798+ L R13,4(R15) get old save area back
00B380 98EC D00C 0000C 13799+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00B384 07FE 13800+ BR 14 RETURN 02000000
13801 *
00B386 1111111111111111 13802 T237V1 DC 250X'11'
00B480 FFFFFFFFFFFFFFFF 13803 T237V2 DC 250X'FF'
13804 TSIMEND
00B580 13805+ LTORG
00B580 00000458 13806 =A(SAVETST)
0B584 13807+T237TEND EQU *
13808 *
13809 * Test 238 -- NR R,R ---------------------------------------
13810 *
13811 TSIMBEG T238,13000,100,1,C'NR R,R'
13812+*
002F24 13813+TDSCDAT CSECT
002F28 13814+ DS 0D
13815+*
002F28 0000B588 13816+T238TDSC DC A(T238) // TENTRY
002F2C 00000104 13817+ DC A(T238TEND-T238) // TLENGTH
002F30 000032C8 13818+ DC F'13000' // TLRCNT
002F34 00000064 13819+ DC F'100' // TIGCNT
002F38 00000001 13820+ DC F'1' // TLTYPE
0014C8 13821+TEXT CSECT
0014C8 E3F2F3F8 13822+SPTR1120 DC C'T238'
002F3C 13823+TDSCDAT CSECT
002F3C 13824+ DS 0F
PAGE 254
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002F3C 040014C8 13825+ DC AL1(L'SPTR1120),AL3(SPTR1120)
0014CC 13826+TEXT CSECT
0014CC D5D940D96BD9 13827+SPTR1121 DC C'NR R,R'
002F40 13828+TDSCDAT CSECT
002F40 13829+ DS 0F
002F40 060014CC 13830+ DC AL1(L'SPTR1121),AL3(SPTR1121)
13831+*
004B10 13832+TDSCTBL CSECT
04B10 13833+T238TPTR EQU *
004B10 00002F28 13834+ DC A(T238TDSC) enabled test
13835+*
00B584 13836+TCODE CSECT
00B588 13837+ DS 0D ensure double word alignment for test
00B588 13838+T238 DS 0H 01650000
00B588 90EC D00C 0000C 13839+ STM 14,12,12(13) SAVE REGISTERS 02950000
00B58C 18CF 13840+ LR R12,R15 base register := entry address
0B588 13841+ USING T238,R12 declare code base register
00B58E 41B0 C024 0B5AC 13842+ LA R11,T238L load loop target to R11
00B592 58F0 C100 0B688 13843+ L R15,=A(SAVETST) R15 := current save area
00B596 50DF 0004 00004 13844+ ST R13,4(R15) set back pointer in current save area
00B59A 182D 13845+ LR R2,R13 remember callers save area
00B59C 18DF 13846+ LR R13,R15 setup current save area
00B59E 50D2 0008 00008 13847+ ST R13,8(R2) set forw pointer in callers save area
00000 13848+ USING TDSC,R1 declare TDSC base register
00B5A2 58F0 1008 00008 13849+ L R15,TLRCNT load local repeat count to R15
13850+*
13851 *
00B5A6 1722 13852 XR R2,R2
00B5A8 4130 0001 00001 13853 LA R3,1
13854 T238L REPINS NR,(R2,R3) repeat: NR R2,R3
13855+*
13856+* build from sublist &ALIST a comma separated string &ARGS
13857+*
13858+*
13859+*
13860+*
13861+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
13862+* this allows to transfer the repeat count from last TDSCGEN call
13863+*
13864+*
0B5AC 13865+T238L EQU *
13866+*
13867+* write a comment indicating what REPINS does (in case NOGEN in effect)
13868+*
13869+*,// REPINS: do 100 times:
13870+*
13871+* MNOTE requires that ' is doubled for expanded variables
13872+* thus build &MASTR as a copy of '&ARGS with ' doubled
13873+*
13874+*
13875+*,// NR R2,R3
13876+*
13877+* finally generate code: &ICNT copies of &CODE &ARGS
13878+*
00B5AC 1423 13879+ NR R2,R3
PAGE 255
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00B5AE 1423 13880+ NR R2,R3
00B5B0 1423 13881+ NR R2,R3
00B5B2 1423 13882+ NR R2,R3
00B5B4 1423 13883+ NR R2,R3
00B5B6 1423 13884+ NR R2,R3
00B5B8 1423 13885+ NR R2,R3
00B5BA 1423 13886+ NR R2,R3
00B5BC 1423 13887+ NR R2,R3
00B5BE 1423 13888+ NR R2,R3
00B5C0 1423 13889+ NR R2,R3
00B5C2 1423 13890+ NR R2,R3
00B5C4 1423 13891+ NR R2,R3
00B5C6 1423 13892+ NR R2,R3
00B5C8 1423 13893+ NR R2,R3
00B5CA 1423 13894+ NR R2,R3
00B5CC 1423 13895+ NR R2,R3
00B5CE 1423 13896+ NR R2,R3
00B5D0 1423 13897+ NR R2,R3
00B5D2 1423 13898+ NR R2,R3
00B5D4 1423 13899+ NR R2,R3
00B5D6 1423 13900+ NR R2,R3
00B5D8 1423 13901+ NR R2,R3
00B5DA 1423 13902+ NR R2,R3
00B5DC 1423 13903+ NR R2,R3
00B5DE 1423 13904+ NR R2,R3
00B5E0 1423 13905+ NR R2,R3
00B5E2 1423 13906+ NR R2,R3
00B5E4 1423 13907+ NR R2,R3
00B5E6 1423 13908+ NR R2,R3
00B5E8 1423 13909+ NR R2,R3
00B5EA 1423 13910+ NR R2,R3
00B5EC 1423 13911+ NR R2,R3
00B5EE 1423 13912+ NR R2,R3
00B5F0 1423 13913+ NR R2,R3
00B5F2 1423 13914+ NR R2,R3
00B5F4 1423 13915+ NR R2,R3
00B5F6 1423 13916+ NR R2,R3
00B5F8 1423 13917+ NR R2,R3
00B5FA 1423 13918+ NR R2,R3
00B5FC 1423 13919+ NR R2,R3
00B5FE 1423 13920+ NR R2,R3
00B600 1423 13921+ NR R2,R3
00B602 1423 13922+ NR R2,R3
00B604 1423 13923+ NR R2,R3
00B606 1423 13924+ NR R2,R3
00B608 1423 13925+ NR R2,R3
00B60A 1423 13926+ NR R2,R3
00B60C 1423 13927+ NR R2,R3
00B60E 1423 13928+ NR R2,R3
00B610 1423 13929+ NR R2,R3
00B612 1423 13930+ NR R2,R3
00B614 1423 13931+ NR R2,R3
00B616 1423 13932+ NR R2,R3
00B618 1423 13933+ NR R2,R3
00B61A 1423 13934+ NR R2,R3
PAGE 256
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00B61C 1423 13935+ NR R2,R3
00B61E 1423 13936+ NR R2,R3
00B620 1423 13937+ NR R2,R3
00B622 1423 13938+ NR R2,R3
00B624 1423 13939+ NR R2,R3
00B626 1423 13940+ NR R2,R3
00B628 1423 13941+ NR R2,R3
00B62A 1423 13942+ NR R2,R3
00B62C 1423 13943+ NR R2,R3
00B62E 1423 13944+ NR R2,R3
00B630 1423 13945+ NR R2,R3
00B632 1423 13946+ NR R2,R3
00B634 1423 13947+ NR R2,R3
00B636 1423 13948+ NR R2,R3
00B638 1423 13949+ NR R2,R3
00B63A 1423 13950+ NR R2,R3
00B63C 1423 13951+ NR R2,R3
00B63E 1423 13952+ NR R2,R3
00B640 1423 13953+ NR R2,R3
00B642 1423 13954+ NR R2,R3
00B644 1423 13955+ NR R2,R3
00B646 1423 13956+ NR R2,R3
00B648 1423 13957+ NR R2,R3
00B64A 1423 13958+ NR R2,R3
00B64C 1423 13959+ NR R2,R3
00B64E 1423 13960+ NR R2,R3
00B650 1423 13961+ NR R2,R3
00B652 1423 13962+ NR R2,R3
00B654 1423 13963+ NR R2,R3
00B656 1423 13964+ NR R2,R3
00B658 1423 13965+ NR R2,R3
00B65A 1423 13966+ NR R2,R3
00B65C 1423 13967+ NR R2,R3
00B65E 1423 13968+ NR R2,R3
00B660 1423 13969+ NR R2,R3
00B662 1423 13970+ NR R2,R3
00B664 1423 13971+ NR R2,R3
00B666 1423 13972+ NR R2,R3
00B668 1423 13973+ NR R2,R3
00B66A 1423 13974+ NR R2,R3
00B66C 1423 13975+ NR R2,R3
00B66E 1423 13976+ NR R2,R3
00B670 1423 13977+ NR R2,R3
00B672 1423 13978+ NR R2,R3
13979+*
00B674 06FB 13980 BCTR R15,R11
13981 TSIMRET
00B676 58F0 C100 0B688 13982+ L R15,=A(SAVETST) R15 := current save area
00B67A 58DF 0004 00004 13983+ L R13,4(R15) get old save area back
00B67E 98EC D00C 0000C 13984+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00B682 07FE 13985+ BR 14 RETURN 02000000
13986 TSIMEND
00B688 13987+ LTORG
00B688 00000458 13988 =A(SAVETST)
0B68C 13989+T238TEND EQU *
PAGE 257
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
13990 *
13991 * Test 239 -- OR R,R ---------------------------------------
13992 *
13993 TSIMBEG T239,14000,100,1,C'OR R,R'
13994+*
002F44 13995+TDSCDAT CSECT
002F48 13996+ DS 0D
13997+*
002F48 0000B690 13998+T239TDSC DC A(T239) // TENTRY
002F4C 00000104 13999+ DC A(T239TEND-T239) // TLENGTH
002F50 000036B0 14000+ DC F'14000' // TLRCNT
002F54 00000064 14001+ DC F'100' // TIGCNT
002F58 00000001 14002+ DC F'1' // TLTYPE
0014D2 14003+TEXT CSECT
0014D2 E3F2F3F9 14004+SPTR1132 DC C'T239'
002F5C 14005+TDSCDAT CSECT
002F5C 14006+ DS 0F
002F5C 040014D2 14007+ DC AL1(L'SPTR1132),AL3(SPTR1132)
0014D6 14008+TEXT CSECT
0014D6 D6D940D96BD9 14009+SPTR1133 DC C'OR R,R'
002F60 14010+TDSCDAT CSECT
002F60 14011+ DS 0F
002F60 060014D6 14012+ DC AL1(L'SPTR1133),AL3(SPTR1133)
14013+*
004B14 14014+TDSCTBL CSECT
04B14 14015+T239TPTR EQU *
004B14 00002F48 14016+ DC A(T239TDSC) enabled test
14017+*
00B68C 14018+TCODE CSECT
00B690 14019+ DS 0D ensure double word alignment for test
00B690 14020+T239 DS 0H 01650000
00B690 90EC D00C 0000C 14021+ STM 14,12,12(13) SAVE REGISTERS 02950000
00B694 18CF 14022+ LR R12,R15 base register := entry address
0B690 14023+ USING T239,R12 declare code base register
00B696 41B0 C024 0B6B4 14024+ LA R11,T239L load loop target to R11
00B69A 58F0 C100 0B790 14025+ L R15,=A(SAVETST) R15 := current save area
00B69E 50DF 0004 00004 14026+ ST R13,4(R15) set back pointer in current save area
00B6A2 182D 14027+ LR R2,R13 remember callers save area
00B6A4 18DF 14028+ LR R13,R15 setup current save area
00B6A6 50D2 0008 00008 14029+ ST R13,8(R2) set forw pointer in callers save area
00000 14030+ USING TDSC,R1 declare TDSC base register
00B6AA 58F0 1008 00008 14031+ L R15,TLRCNT load local repeat count to R15
14032+*
14033 *
00B6AE 1722 14034 XR R2,R2
00B6B0 4130 0001 00001 14035 LA R3,1
14036 T239L REPINS OR,(R2,R3) repeat: OR R2,R3
14037+*
14038+* build from sublist &ALIST a comma separated string &ARGS
14039+*
14040+*
14041+*
14042+*
14043+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
14044+* this allows to transfer the repeat count from last TDSCGEN call
PAGE 258
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
14045+*
14046+*
0B6B4 14047+T239L EQU *
14048+*
14049+* write a comment indicating what REPINS does (in case NOGEN in effect)
14050+*
14051+*,// REPINS: do 100 times:
14052+*
14053+* MNOTE requires that ' is doubled for expanded variables
14054+* thus build &MASTR as a copy of '&ARGS with ' doubled
14055+*
14056+*
14057+*,// OR R2,R3
14058+*
14059+* finally generate code: &ICNT copies of &CODE &ARGS
14060+*
00B6B4 1623 14061+ OR R2,R3
00B6B6 1623 14062+ OR R2,R3
00B6B8 1623 14063+ OR R2,R3
00B6BA 1623 14064+ OR R2,R3
00B6BC 1623 14065+ OR R2,R3
00B6BE 1623 14066+ OR R2,R3
00B6C0 1623 14067+ OR R2,R3
00B6C2 1623 14068+ OR R2,R3
00B6C4 1623 14069+ OR R2,R3
00B6C6 1623 14070+ OR R2,R3
00B6C8 1623 14071+ OR R2,R3
00B6CA 1623 14072+ OR R2,R3
00B6CC 1623 14073+ OR R2,R3
00B6CE 1623 14074+ OR R2,R3
00B6D0 1623 14075+ OR R2,R3
00B6D2 1623 14076+ OR R2,R3
00B6D4 1623 14077+ OR R2,R3
00B6D6 1623 14078+ OR R2,R3
00B6D8 1623 14079+ OR R2,R3
00B6DA 1623 14080+ OR R2,R3
00B6DC 1623 14081+ OR R2,R3
00B6DE 1623 14082+ OR R2,R3
00B6E0 1623 14083+ OR R2,R3
00B6E2 1623 14084+ OR R2,R3
00B6E4 1623 14085+ OR R2,R3
00B6E6 1623 14086+ OR R2,R3
00B6E8 1623 14087+ OR R2,R3
00B6EA 1623 14088+ OR R2,R3
00B6EC 1623 14089+ OR R2,R3
00B6EE 1623 14090+ OR R2,R3
00B6F0 1623 14091+ OR R2,R3
00B6F2 1623 14092+ OR R2,R3
00B6F4 1623 14093+ OR R2,R3
00B6F6 1623 14094+ OR R2,R3
00B6F8 1623 14095+ OR R2,R3
00B6FA 1623 14096+ OR R2,R3
00B6FC 1623 14097+ OR R2,R3
00B6FE 1623 14098+ OR R2,R3
00B700 1623 14099+ OR R2,R3
PAGE 259
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00B702 1623 14100+ OR R2,R3
00B704 1623 14101+ OR R2,R3
00B706 1623 14102+ OR R2,R3
00B708 1623 14103+ OR R2,R3
00B70A 1623 14104+ OR R2,R3
00B70C 1623 14105+ OR R2,R3
00B70E 1623 14106+ OR R2,R3
00B710 1623 14107+ OR R2,R3
00B712 1623 14108+ OR R2,R3
00B714 1623 14109+ OR R2,R3
00B716 1623 14110+ OR R2,R3
00B718 1623 14111+ OR R2,R3
00B71A 1623 14112+ OR R2,R3
00B71C 1623 14113+ OR R2,R3
00B71E 1623 14114+ OR R2,R3
00B720 1623 14115+ OR R2,R3
00B722 1623 14116+ OR R2,R3
00B724 1623 14117+ OR R2,R3
00B726 1623 14118+ OR R2,R3
00B728 1623 14119+ OR R2,R3
00B72A 1623 14120+ OR R2,R3
00B72C 1623 14121+ OR R2,R3
00B72E 1623 14122+ OR R2,R3
00B730 1623 14123+ OR R2,R3
00B732 1623 14124+ OR R2,R3
00B734 1623 14125+ OR R2,R3
00B736 1623 14126+ OR R2,R3
00B738 1623 14127+ OR R2,R3
00B73A 1623 14128+ OR R2,R3
00B73C 1623 14129+ OR R2,R3
00B73E 1623 14130+ OR R2,R3
00B740 1623 14131+ OR R2,R3
00B742 1623 14132+ OR R2,R3
00B744 1623 14133+ OR R2,R3
00B746 1623 14134+ OR R2,R3
00B748 1623 14135+ OR R2,R3
00B74A 1623 14136+ OR R2,R3
00B74C 1623 14137+ OR R2,R3
00B74E 1623 14138+ OR R2,R3
00B750 1623 14139+ OR R2,R3
00B752 1623 14140+ OR R2,R3
00B754 1623 14141+ OR R2,R3
00B756 1623 14142+ OR R2,R3
00B758 1623 14143+ OR R2,R3
00B75A 1623 14144+ OR R2,R3
00B75C 1623 14145+ OR R2,R3
00B75E 1623 14146+ OR R2,R3
00B760 1623 14147+ OR R2,R3
00B762 1623 14148+ OR R2,R3
00B764 1623 14149+ OR R2,R3
00B766 1623 14150+ OR R2,R3
00B768 1623 14151+ OR R2,R3
00B76A 1623 14152+ OR R2,R3
00B76C 1623 14153+ OR R2,R3
00B76E 1623 14154+ OR R2,R3
PAGE 260
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00B770 1623 14155+ OR R2,R3
00B772 1623 14156+ OR R2,R3
00B774 1623 14157+ OR R2,R3
00B776 1623 14158+ OR R2,R3
00B778 1623 14159+ OR R2,R3
00B77A 1623 14160+ OR R2,R3
14161+*
00B77C 06FB 14162 BCTR R15,R11
14163 TSIMRET
00B77E 58F0 C100 0B790 14164+ L R15,=A(SAVETST) R15 := current save area
00B782 58DF 0004 00004 14165+ L R13,4(R15) get old save area back
00B786 98EC D00C 0000C 14166+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00B78A 07FE 14167+ BR 14 RETURN 02000000
14168 TSIMEND
00B790 14169+ LTORG
00B790 00000458 14170 =A(SAVETST)
0B794 14171+T239TEND EQU *
14172 *
14173 * Test 24x -- logical shifts ===============================
14174 *
14175 * Test 240 -- SLL R,1 --------------------------------------
14176 *
14177 TSIMBEG T240,35000,30,4,C'SLL R,1'
14178+*
002F64 14179+TDSCDAT CSECT
002F68 14180+ DS 0D
14181+*
002F68 0000B798 14182+T240TDSC DC A(T240) // TENTRY
002F6C 000000B4 14183+ DC A(T240TEND-T240) // TLENGTH
002F70 000088B8 14184+ DC F'35000' // TLRCNT
002F74 0000001E 14185+ DC F'30' // TIGCNT
002F78 00000004 14186+ DC F'4' // TLTYPE
0014DC 14187+TEXT CSECT
0014DC E3F2F4F0 14188+SPTR1144 DC C'T240'
002F7C 14189+TDSCDAT CSECT
002F7C 14190+ DS 0F
002F7C 040014DC 14191+ DC AL1(L'SPTR1144),AL3(SPTR1144)
0014E0 14192+TEXT CSECT
0014E0 E2D3D340D96BF1 14193+SPTR1145 DC C'SLL R,1'
002F80 14194+TDSCDAT CSECT
002F80 14195+ DS 0F
002F80 070014E0 14196+ DC AL1(L'SPTR1145),AL3(SPTR1145)
14197+*
004B18 14198+TDSCTBL CSECT
04B18 14199+T240TPTR EQU *
004B18 00002F68 14200+ DC A(T240TDSC) enabled test
14201+*
00B794 14202+TCODE CSECT
00B798 14203+ DS 0D ensure double word alignment for test
00B798 14204+T240 DS 0H 01650000
00B798 90EC D00C 0000C 14205+ STM 14,12,12(13) SAVE REGISTERS 02950000
00B79C 18CF 14206+ LR R12,R15 base register := entry address
0B798 14207+ USING T240,R12 declare code base register
00B79E 41B0 C01E 0B7B6 14208+ LA R11,T240L load loop target to R11
00B7A2 58F0 C0B0 0B848 14209+ L R15,=A(SAVETST) R15 := current save area
PAGE 261
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00B7A6 50DF 0004 00004 14210+ ST R13,4(R15) set back pointer in current save area
00B7AA 182D 14211+ LR R2,R13 remember callers save area
00B7AC 18DF 14212+ LR R13,R15 setup current save area
00B7AE 50D2 0008 00008 14213+ ST R13,8(R2) set forw pointer in callers save area
00000 14214+ USING TDSC,R1 declare TDSC base register
00B7B2 58F0 1008 00008 14215+ L R15,TLRCNT load local repeat count to R15
14216+*
14217 *
00B7B6 4120 0001 00001 14218 T240L LA R2,1
14219 REPINS SLL,(R2,1) repeat: SLL R2,1
14220+*
14221+* build from sublist &ALIST a comma separated string &ARGS
14222+*
14223+*
14224+*
14225+*
14226+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
14227+* this allows to transfer the repeat count from last TDSCGEN call
14228+*
14229+*
14230+*
14231+* write a comment indicating what REPINS does (in case NOGEN in effect)
14232+*
14233+*,// REPINS: do 30 times:
14234+*
14235+* MNOTE requires that ' is doubled for expanded variables
14236+* thus build &MASTR as a copy of '&ARGS with ' doubled
14237+*
14238+*
14239+*,// SLL R2,1
14240+*
14241+* finally generate code: &ICNT copies of &CODE &ARGS
14242+*
00B7BA 8920 0001 00001 14243+ SLL R2,1
00B7BE 8920 0001 00001 14244+ SLL R2,1
00B7C2 8920 0001 00001 14245+ SLL R2,1
00B7C6 8920 0001 00001 14246+ SLL R2,1
00B7CA 8920 0001 00001 14247+ SLL R2,1
00B7CE 8920 0001 00001 14248+ SLL R2,1
00B7D2 8920 0001 00001 14249+ SLL R2,1
00B7D6 8920 0001 00001 14250+ SLL R2,1
00B7DA 8920 0001 00001 14251+ SLL R2,1
00B7DE 8920 0001 00001 14252+ SLL R2,1
00B7E2 8920 0001 00001 14253+ SLL R2,1
00B7E6 8920 0001 00001 14254+ SLL R2,1
00B7EA 8920 0001 00001 14255+ SLL R2,1
00B7EE 8920 0001 00001 14256+ SLL R2,1
00B7F2 8920 0001 00001 14257+ SLL R2,1
00B7F6 8920 0001 00001 14258+ SLL R2,1
00B7FA 8920 0001 00001 14259+ SLL R2,1
00B7FE 8920 0001 00001 14260+ SLL R2,1
00B802 8920 0001 00001 14261+ SLL R2,1
00B806 8920 0001 00001 14262+ SLL R2,1
00B80A 8920 0001 00001 14263+ SLL R2,1
00B80E 8920 0001 00001 14264+ SLL R2,1
PAGE 262
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00B812 8920 0001 00001 14265+ SLL R2,1
00B816 8920 0001 00001 14266+ SLL R2,1
00B81A 8920 0001 00001 14267+ SLL R2,1
00B81E 8920 0001 00001 14268+ SLL R2,1
00B822 8920 0001 00001 14269+ SLL R2,1
00B826 8920 0001 00001 14270+ SLL R2,1
00B82A 8920 0001 00001 14271+ SLL R2,1
00B82E 8920 0001 00001 14272+ SLL R2,1
14273+*
00B832 06FB 14274 BCTR R15,R11
14275 TSIMRET
00B834 58F0 C0B0 0B848 14276+ L R15,=A(SAVETST) R15 := current save area
00B838 58DF 0004 00004 14277+ L R13,4(R15) get old save area back
00B83C 98EC D00C 0000C 14278+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00B840 07FE 14279+ BR 14 RETURN 02000000
14280 TSIMEND
00B848 14281+ LTORG
00B848 00000458 14282 =A(SAVETST)
0B84C 14283+T240TEND EQU *
14284 *
14285 * Test 241 -- SLDL R,1 -------------------------------------
14286 *
14287 TSIMBEG T241,13000,60,5,C'SLDL R,1'
14288+*
002F84 14289+TDSCDAT CSECT
002F88 14290+ DS 0D
14291+*
002F88 0000B850 14292+T241TDSC DC A(T241) // TENTRY
002F8C 0000012C 14293+ DC A(T241TEND-T241) // TLENGTH
002F90 000032C8 14294+ DC F'13000' // TLRCNT
002F94 0000003C 14295+ DC F'60' // TIGCNT
002F98 00000005 14296+ DC F'5' // TLTYPE
0014E7 14297+TEXT CSECT
0014E7 E3F2F4F1 14298+SPTR1156 DC C'T241'
002F9C 14299+TDSCDAT CSECT
002F9C 14300+ DS 0F
002F9C 040014E7 14301+ DC AL1(L'SPTR1156),AL3(SPTR1156)
0014EB 14302+TEXT CSECT
0014EB E2D3C4D340D96BF1 14303+SPTR1157 DC C'SLDL R,1'
002FA0 14304+TDSCDAT CSECT
002FA0 14305+ DS 0F
002FA0 080014EB 14306+ DC AL1(L'SPTR1157),AL3(SPTR1157)
14307+*
004B1C 14308+TDSCTBL CSECT
04B1C 14309+T241TPTR EQU *
004B1C 00002F88 14310+ DC A(T241TDSC) enabled test
14311+*
00B84C 14312+TCODE CSECT
00B850 14313+ DS 0D ensure double word alignment for test
00B850 14314+T241 DS 0H 01650000
00B850 90EC D00C 0000C 14315+ STM 14,12,12(13) SAVE REGISTERS 02950000
00B854 18CF 14316+ LR R12,R15 base register := entry address
0B850 14317+ USING T241,R12 declare code base register
00B856 41B0 C01E 0B86E 14318+ LA R11,T241L load loop target to R11
00B85A 58F0 C128 0B978 14319+ L R15,=A(SAVETST) R15 := current save area
PAGE 263
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00B85E 50DF 0004 00004 14320+ ST R13,4(R15) set back pointer in current save area
00B862 182D 14321+ LR R2,R13 remember callers save area
00B864 18DF 14322+ LR R13,R15 setup current save area
00B866 50D2 0008 00008 14323+ ST R13,8(R2) set forw pointer in callers save area
00000 14324+ USING TDSC,R1 declare TDSC base register
00B86A 58F0 1008 00008 14325+ L R15,TLRCNT load local repeat count to R15
14326+*
14327 *
00B86E 1722 14328 T241L XR R2,R2
00B870 4130 0001 00001 14329 LA R3,1
14330 REPINS SLDL,(R2,1) repeat: SLDL R2,1
14331+*
14332+* build from sublist &ALIST a comma separated string &ARGS
14333+*
14334+*
14335+*
14336+*
14337+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
14338+* this allows to transfer the repeat count from last TDSCGEN call
14339+*
14340+*
14341+*
14342+* write a comment indicating what REPINS does (in case NOGEN in effect)
14343+*
14344+*,// REPINS: do 60 times:
14345+*
14346+* MNOTE requires that ' is doubled for expanded variables
14347+* thus build &MASTR as a copy of '&ARGS with ' doubled
14348+*
14349+*
14350+*,// SLDL R2,1
14351+*
14352+* finally generate code: &ICNT copies of &CODE &ARGS
14353+*
00B874 8D20 0001 00001 14354+ SLDL R2,1
00B878 8D20 0001 00001 14355+ SLDL R2,1
00B87C 8D20 0001 00001 14356+ SLDL R2,1
00B880 8D20 0001 00001 14357+ SLDL R2,1
00B884 8D20 0001 00001 14358+ SLDL R2,1
00B888 8D20 0001 00001 14359+ SLDL R2,1
00B88C 8D20 0001 00001 14360+ SLDL R2,1
00B890 8D20 0001 00001 14361+ SLDL R2,1
00B894 8D20 0001 00001 14362+ SLDL R2,1
00B898 8D20 0001 00001 14363+ SLDL R2,1
00B89C 8D20 0001 00001 14364+ SLDL R2,1
00B8A0 8D20 0001 00001 14365+ SLDL R2,1
00B8A4 8D20 0001 00001 14366+ SLDL R2,1
00B8A8 8D20 0001 00001 14367+ SLDL R2,1
00B8AC 8D20 0001 00001 14368+ SLDL R2,1
00B8B0 8D20 0001 00001 14369+ SLDL R2,1
00B8B4 8D20 0001 00001 14370+ SLDL R2,1
00B8B8 8D20 0001 00001 14371+ SLDL R2,1
00B8BC 8D20 0001 00001 14372+ SLDL R2,1
00B8C0 8D20 0001 00001 14373+ SLDL R2,1
00B8C4 8D20 0001 00001 14374+ SLDL R2,1
PAGE 264
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00B8C8 8D20 0001 00001 14375+ SLDL R2,1
00B8CC 8D20 0001 00001 14376+ SLDL R2,1
00B8D0 8D20 0001 00001 14377+ SLDL R2,1
00B8D4 8D20 0001 00001 14378+ SLDL R2,1
00B8D8 8D20 0001 00001 14379+ SLDL R2,1
00B8DC 8D20 0001 00001 14380+ SLDL R2,1
00B8E0 8D20 0001 00001 14381+ SLDL R2,1
00B8E4 8D20 0001 00001 14382+ SLDL R2,1
00B8E8 8D20 0001 00001 14383+ SLDL R2,1
00B8EC 8D20 0001 00001 14384+ SLDL R2,1
00B8F0 8D20 0001 00001 14385+ SLDL R2,1
00B8F4 8D20 0001 00001 14386+ SLDL R2,1
00B8F8 8D20 0001 00001 14387+ SLDL R2,1
00B8FC 8D20 0001 00001 14388+ SLDL R2,1
00B900 8D20 0001 00001 14389+ SLDL R2,1
00B904 8D20 0001 00001 14390+ SLDL R2,1
00B908 8D20 0001 00001 14391+ SLDL R2,1
00B90C 8D20 0001 00001 14392+ SLDL R2,1
00B910 8D20 0001 00001 14393+ SLDL R2,1
00B914 8D20 0001 00001 14394+ SLDL R2,1
00B918 8D20 0001 00001 14395+ SLDL R2,1
00B91C 8D20 0001 00001 14396+ SLDL R2,1
00B920 8D20 0001 00001 14397+ SLDL R2,1
00B924 8D20 0001 00001 14398+ SLDL R2,1
00B928 8D20 0001 00001 14399+ SLDL R2,1
00B92C 8D20 0001 00001 14400+ SLDL R2,1
00B930 8D20 0001 00001 14401+ SLDL R2,1
00B934 8D20 0001 00001 14402+ SLDL R2,1
00B938 8D20 0001 00001 14403+ SLDL R2,1
00B93C 8D20 0001 00001 14404+ SLDL R2,1
00B940 8D20 0001 00001 14405+ SLDL R2,1
00B944 8D20 0001 00001 14406+ SLDL R2,1
00B948 8D20 0001 00001 14407+ SLDL R2,1
00B94C 8D20 0001 00001 14408+ SLDL R2,1
00B950 8D20 0001 00001 14409+ SLDL R2,1
00B954 8D20 0001 00001 14410+ SLDL R2,1
00B958 8D20 0001 00001 14411+ SLDL R2,1
00B95C 8D20 0001 00001 14412+ SLDL R2,1
00B960 8D20 0001 00001 14413+ SLDL R2,1
14414+*
00B964 06FB 14415 BCTR R15,R11
14416 TSIMRET
00B966 58F0 C128 0B978 14417+ L R15,=A(SAVETST) R15 := current save area
00B96A 58DF 0004 00004 14418+ L R13,4(R15) get old save area back
00B96E 98EC D00C 0000C 14419+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00B972 07FE 14420+ BR 14 RETURN 02000000
14421 TSIMEND
00B978 14422+ LTORG
00B978 00000458 14423 =A(SAVETST)
0B97C 14424+T241TEND EQU *
14425 *
14426 * Test 242 -- SRL R,1 --------------------------------------
14427 *
14428 TSIMBEG T242,35000,30,4,C'SRL R,1'
14429+*
PAGE 265
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002FA4 14430+TDSCDAT CSECT
002FA8 14431+ DS 0D
14432+*
002FA8 0000B980 14433+T242TDSC DC A(T242) // TENTRY
002FAC 000000B4 14434+ DC A(T242TEND-T242) // TLENGTH
002FB0 000088B8 14435+ DC F'35000' // TLRCNT
002FB4 0000001E 14436+ DC F'30' // TIGCNT
002FB8 00000004 14437+ DC F'4' // TLTYPE
0014F3 14438+TEXT CSECT
0014F3 E3F2F4F2 14439+SPTR1168 DC C'T242'
002FBC 14440+TDSCDAT CSECT
002FBC 14441+ DS 0F
002FBC 040014F3 14442+ DC AL1(L'SPTR1168),AL3(SPTR1168)
0014F7 14443+TEXT CSECT
0014F7 E2D9D340D96BF1 14444+SPTR1169 DC C'SRL R,1'
002FC0 14445+TDSCDAT CSECT
002FC0 14446+ DS 0F
002FC0 070014F7 14447+ DC AL1(L'SPTR1169),AL3(SPTR1169)
14448+*
004B20 14449+TDSCTBL CSECT
04B20 14450+T242TPTR EQU *
004B20 00002FA8 14451+ DC A(T242TDSC) enabled test
14452+*
00B97C 14453+TCODE CSECT
00B980 14454+ DS 0D ensure double word alignment for test
00B980 14455+T242 DS 0H 01650000
00B980 90EC D00C 0000C 14456+ STM 14,12,12(13) SAVE REGISTERS 02950000
00B984 18CF 14457+ LR R12,R15 base register := entry address
0B980 14458+ USING T242,R12 declare code base register
00B986 41B0 C01E 0B99E 14459+ LA R11,T242L load loop target to R11
00B98A 58F0 C0B0 0BA30 14460+ L R15,=A(SAVETST) R15 := current save area
00B98E 50DF 0004 00004 14461+ ST R13,4(R15) set back pointer in current save area
00B992 182D 14462+ LR R2,R13 remember callers save area
00B994 18DF 14463+ LR R13,R15 setup current save area
00B996 50D2 0008 00008 14464+ ST R13,8(R2) set forw pointer in callers save area
00000 14465+ USING TDSC,R1 declare TDSC base register
00B99A 58F0 1008 00008 14466+ L R15,TLRCNT load local repeat count to R15
14467+*
14468 *
00B99E 4120 0001 00001 14469 T242L LA R2,1
14470 REPINS SRL,(R2,1) repeat: SRL R2,1
14471+*
14472+* build from sublist &ALIST a comma separated string &ARGS
14473+*
14474+*
14475+*
14476+*
14477+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
14478+* this allows to transfer the repeat count from last TDSCGEN call
14479+*
14480+*
14481+*
14482+* write a comment indicating what REPINS does (in case NOGEN in effect)
14483+*
14484+*,// REPINS: do 30 times:
PAGE 266
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
14485+*
14486+* MNOTE requires that ' is doubled for expanded variables
14487+* thus build &MASTR as a copy of '&ARGS with ' doubled
14488+*
14489+*
14490+*,// SRL R2,1
14491+*
14492+* finally generate code: &ICNT copies of &CODE &ARGS
14493+*
00B9A2 8820 0001 00001 14494+ SRL R2,1
00B9A6 8820 0001 00001 14495+ SRL R2,1
00B9AA 8820 0001 00001 14496+ SRL R2,1
00B9AE 8820 0001 00001 14497+ SRL R2,1
00B9B2 8820 0001 00001 14498+ SRL R2,1
00B9B6 8820 0001 00001 14499+ SRL R2,1
00B9BA 8820 0001 00001 14500+ SRL R2,1
00B9BE 8820 0001 00001 14501+ SRL R2,1
00B9C2 8820 0001 00001 14502+ SRL R2,1
00B9C6 8820 0001 00001 14503+ SRL R2,1
00B9CA 8820 0001 00001 14504+ SRL R2,1
00B9CE 8820 0001 00001 14505+ SRL R2,1
00B9D2 8820 0001 00001 14506+ SRL R2,1
00B9D6 8820 0001 00001 14507+ SRL R2,1
00B9DA 8820 0001 00001 14508+ SRL R2,1
00B9DE 8820 0001 00001 14509+ SRL R2,1
00B9E2 8820 0001 00001 14510+ SRL R2,1
00B9E6 8820 0001 00001 14511+ SRL R2,1
00B9EA 8820 0001 00001 14512+ SRL R2,1
00B9EE 8820 0001 00001 14513+ SRL R2,1
00B9F2 8820 0001 00001 14514+ SRL R2,1
00B9F6 8820 0001 00001 14515+ SRL R2,1
00B9FA 8820 0001 00001 14516+ SRL R2,1
00B9FE 8820 0001 00001 14517+ SRL R2,1
00BA02 8820 0001 00001 14518+ SRL R2,1
00BA06 8820 0001 00001 14519+ SRL R2,1
00BA0A 8820 0001 00001 14520+ SRL R2,1
00BA0E 8820 0001 00001 14521+ SRL R2,1
00BA12 8820 0001 00001 14522+ SRL R2,1
00BA16 8820 0001 00001 14523+ SRL R2,1
14524+*
00BA1A 06FB 14525 BCTR R15,R11
14526 TSIMRET
00BA1C 58F0 C0B0 0BA30 14527+ L R15,=A(SAVETST) R15 := current save area
00BA20 58DF 0004 00004 14528+ L R13,4(R15) get old save area back
00BA24 98EC D00C 0000C 14529+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00BA28 07FE 14530+ BR 14 RETURN 02000000
14531 TSIMEND
00BA30 14532+ LTORG
00BA30 00000458 14533 =A(SAVETST)
0BA34 14534+T242TEND EQU *
14535 *
14536 * Test 243 -- SRDL R,1 -------------------------------------
14537 *
14538 TSIMBEG T243,13000,60,5,C'SRDL R,1'
14539+*
PAGE 267
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002FC4 14540+TDSCDAT CSECT
002FC8 14541+ DS 0D
14542+*
002FC8 0000BA38 14543+T243TDSC DC A(T243) // TENTRY
002FCC 0000012C 14544+ DC A(T243TEND-T243) // TLENGTH
002FD0 000032C8 14545+ DC F'13000' // TLRCNT
002FD4 0000003C 14546+ DC F'60' // TIGCNT
002FD8 00000005 14547+ DC F'5' // TLTYPE
0014FE 14548+TEXT CSECT
0014FE E3F2F4F3 14549+SPTR1180 DC C'T243'
002FDC 14550+TDSCDAT CSECT
002FDC 14551+ DS 0F
002FDC 040014FE 14552+ DC AL1(L'SPTR1180),AL3(SPTR1180)
001502 14553+TEXT CSECT
001502 E2D9C4D340D96BF1 14554+SPTR1181 DC C'SRDL R,1'
002FE0 14555+TDSCDAT CSECT
002FE0 14556+ DS 0F
002FE0 08001502 14557+ DC AL1(L'SPTR1181),AL3(SPTR1181)
14558+*
004B24 14559+TDSCTBL CSECT
04B24 14560+T243TPTR EQU *
004B24 00002FC8 14561+ DC A(T243TDSC) enabled test
14562+*
00BA34 14563+TCODE CSECT
00BA38 14564+ DS 0D ensure double word alignment for test
00BA38 14565+T243 DS 0H 01650000
00BA38 90EC D00C 0000C 14566+ STM 14,12,12(13) SAVE REGISTERS 02950000
00BA3C 18CF 14567+ LR R12,R15 base register := entry address
0BA38 14568+ USING T243,R12 declare code base register
00BA3E 41B0 C01E 0BA56 14569+ LA R11,T243L load loop target to R11
00BA42 58F0 C128 0BB60 14570+ L R15,=A(SAVETST) R15 := current save area
00BA46 50DF 0004 00004 14571+ ST R13,4(R15) set back pointer in current save area
00BA4A 182D 14572+ LR R2,R13 remember callers save area
00BA4C 18DF 14573+ LR R13,R15 setup current save area
00BA4E 50D2 0008 00008 14574+ ST R13,8(R2) set forw pointer in callers save area
00000 14575+ USING TDSC,R1 declare TDSC base register
00BA52 58F0 1008 00008 14576+ L R15,TLRCNT load local repeat count to R15
14577+*
14578 *
00BA56 1722 14579 T243L XR R2,R2
00BA58 4130 0001 00001 14580 LA R3,1
14581 REPINS SRDL,(R2,1) repeat: SRDL R2,1
14582+*
14583+* build from sublist &ALIST a comma separated string &ARGS
14584+*
14585+*
14586+*
14587+*
14588+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
14589+* this allows to transfer the repeat count from last TDSCGEN call
14590+*
14591+*
14592+*
14593+* write a comment indicating what REPINS does (in case NOGEN in effect)
14594+*
PAGE 268
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
14595+*,// REPINS: do 60 times:
14596+*
14597+* MNOTE requires that ' is doubled for expanded variables
14598+* thus build &MASTR as a copy of '&ARGS with ' doubled
14599+*
14600+*
14601+*,// SRDL R2,1
14602+*
14603+* finally generate code: &ICNT copies of &CODE &ARGS
14604+*
00BA5C 8C20 0001 00001 14605+ SRDL R2,1
00BA60 8C20 0001 00001 14606+ SRDL R2,1
00BA64 8C20 0001 00001 14607+ SRDL R2,1
00BA68 8C20 0001 00001 14608+ SRDL R2,1
00BA6C 8C20 0001 00001 14609+ SRDL R2,1
00BA70 8C20 0001 00001 14610+ SRDL R2,1
00BA74 8C20 0001 00001 14611+ SRDL R2,1
00BA78 8C20 0001 00001 14612+ SRDL R2,1
00BA7C 8C20 0001 00001 14613+ SRDL R2,1
00BA80 8C20 0001 00001 14614+ SRDL R2,1
00BA84 8C20 0001 00001 14615+ SRDL R2,1
00BA88 8C20 0001 00001 14616+ SRDL R2,1
00BA8C 8C20 0001 00001 14617+ SRDL R2,1
00BA90 8C20 0001 00001 14618+ SRDL R2,1
00BA94 8C20 0001 00001 14619+ SRDL R2,1
00BA98 8C20 0001 00001 14620+ SRDL R2,1
00BA9C 8C20 0001 00001 14621+ SRDL R2,1
00BAA0 8C20 0001 00001 14622+ SRDL R2,1
00BAA4 8C20 0001 00001 14623+ SRDL R2,1
00BAA8 8C20 0001 00001 14624+ SRDL R2,1
00BAAC 8C20 0001 00001 14625+ SRDL R2,1
00BAB0 8C20 0001 00001 14626+ SRDL R2,1
00BAB4 8C20 0001 00001 14627+ SRDL R2,1
00BAB8 8C20 0001 00001 14628+ SRDL R2,1
00BABC 8C20 0001 00001 14629+ SRDL R2,1
00BAC0 8C20 0001 00001 14630+ SRDL R2,1
00BAC4 8C20 0001 00001 14631+ SRDL R2,1
00BAC8 8C20 0001 00001 14632+ SRDL R2,1
00BACC 8C20 0001 00001 14633+ SRDL R2,1
00BAD0 8C20 0001 00001 14634+ SRDL R2,1
00BAD4 8C20 0001 00001 14635+ SRDL R2,1
00BAD8 8C20 0001 00001 14636+ SRDL R2,1
00BADC 8C20 0001 00001 14637+ SRDL R2,1
00BAE0 8C20 0001 00001 14638+ SRDL R2,1
00BAE4 8C20 0001 00001 14639+ SRDL R2,1
00BAE8 8C20 0001 00001 14640+ SRDL R2,1
00BAEC 8C20 0001 00001 14641+ SRDL R2,1
00BAF0 8C20 0001 00001 14642+ SRDL R2,1
00BAF4 8C20 0001 00001 14643+ SRDL R2,1
00BAF8 8C20 0001 00001 14644+ SRDL R2,1
00BAFC 8C20 0001 00001 14645+ SRDL R2,1
00BB00 8C20 0001 00001 14646+ SRDL R2,1
00BB04 8C20 0001 00001 14647+ SRDL R2,1
00BB08 8C20 0001 00001 14648+ SRDL R2,1
00BB0C 8C20 0001 00001 14649+ SRDL R2,1
PAGE 269
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00BB10 8C20 0001 00001 14650+ SRDL R2,1
00BB14 8C20 0001 00001 14651+ SRDL R2,1
00BB18 8C20 0001 00001 14652+ SRDL R2,1
00BB1C 8C20 0001 00001 14653+ SRDL R2,1
00BB20 8C20 0001 00001 14654+ SRDL R2,1
00BB24 8C20 0001 00001 14655+ SRDL R2,1
00BB28 8C20 0001 00001 14656+ SRDL R2,1
00BB2C 8C20 0001 00001 14657+ SRDL R2,1
00BB30 8C20 0001 00001 14658+ SRDL R2,1
00BB34 8C20 0001 00001 14659+ SRDL R2,1
00BB38 8C20 0001 00001 14660+ SRDL R2,1
00BB3C 8C20 0001 00001 14661+ SRDL R2,1
00BB40 8C20 0001 00001 14662+ SRDL R2,1
00BB44 8C20 0001 00001 14663+ SRDL R2,1
00BB48 8C20 0001 00001 14664+ SRDL R2,1
14665+*
00BB4C 06FB 14666 BCTR R15,R11
14667 TSIMRET
00BB4E 58F0 C128 0BB60 14668+ L R15,=A(SAVETST) R15 := current save area
00BB52 58DF 0004 00004 14669+ L R13,4(R15) get old save area back
00BB56 98EC D00C 0000C 14670+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00BB5A 07FE 14671+ BR 14 RETURN 02000000
14672 TSIMEND
00BB60 14673+ LTORG
00BB60 00000458 14674 =A(SAVETST)
0BB64 14675+T243TEND EQU *
14676 *
14677 * Test 244 -- SLL R,30 -------------------------------------
14678 *
14679 TSIMBEG T244,35000,30,4,C'SLL R,30'
14680+*
002FE4 14681+TDSCDAT CSECT
002FE8 14682+ DS 0D
14683+*
002FE8 0000BB68 14684+T244TDSC DC A(T244) // TENTRY
002FEC 000000B4 14685+ DC A(T244TEND-T244) // TLENGTH
002FF0 000088B8 14686+ DC F'35000' // TLRCNT
002FF4 0000001E 14687+ DC F'30' // TIGCNT
002FF8 00000004 14688+ DC F'4' // TLTYPE
00150A 14689+TEXT CSECT
00150A E3F2F4F4 14690+SPTR1192 DC C'T244'
002FFC 14691+TDSCDAT CSECT
002FFC 14692+ DS 0F
002FFC 0400150A 14693+ DC AL1(L'SPTR1192),AL3(SPTR1192)
00150E 14694+TEXT CSECT
00150E E2D3D340D96BF3F0 14695+SPTR1193 DC C'SLL R,30'
003000 14696+TDSCDAT CSECT
003000 14697+ DS 0F
003000 0800150E 14698+ DC AL1(L'SPTR1193),AL3(SPTR1193)
14699+*
004B28 14700+TDSCTBL CSECT
04B28 14701+T244TPTR EQU *
004B28 00002FE8 14702+ DC A(T244TDSC) enabled test
14703+*
00BB64 14704+TCODE CSECT
PAGE 270
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00BB68 14705+ DS 0D ensure double word alignment for test
00BB68 14706+T244 DS 0H 01650000
00BB68 90EC D00C 0000C 14707+ STM 14,12,12(13) SAVE REGISTERS 02950000
00BB6C 18CF 14708+ LR R12,R15 base register := entry address
0BB68 14709+ USING T244,R12 declare code base register
00BB6E 41B0 C01E 0BB86 14710+ LA R11,T244L load loop target to R11
00BB72 58F0 C0B0 0BC18 14711+ L R15,=A(SAVETST) R15 := current save area
00BB76 50DF 0004 00004 14712+ ST R13,4(R15) set back pointer in current save area
00BB7A 182D 14713+ LR R2,R13 remember callers save area
00BB7C 18DF 14714+ LR R13,R15 setup current save area
00BB7E 50D2 0008 00008 14715+ ST R13,8(R2) set forw pointer in callers save area
00000 14716+ USING TDSC,R1 declare TDSC base register
00BB82 58F0 1008 00008 14717+ L R15,TLRCNT load local repeat count to R15
14718+*
14719 *
00BB86 4120 0001 00001 14720 T244L LA R2,1
14721 REPINS SLL,(R2,30) repeat: SLL R2,30
14722+*
14723+* build from sublist &ALIST a comma separated string &ARGS
14724+*
14725+*
14726+*
14727+*
14728+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
14729+* this allows to transfer the repeat count from last TDSCGEN call
14730+*
14731+*
14732+*
14733+* write a comment indicating what REPINS does (in case NOGEN in effect)
14734+*
14735+*,// REPINS: do 30 times:
14736+*
14737+* MNOTE requires that ' is doubled for expanded variables
14738+* thus build &MASTR as a copy of '&ARGS with ' doubled
14739+*
14740+*
14741+*,// SLL R2,30
14742+*
14743+* finally generate code: &ICNT copies of &CODE &ARGS
14744+*
00BB8A 8920 001E 0001E 14745+ SLL R2,30
00BB8E 8920 001E 0001E 14746+ SLL R2,30
00BB92 8920 001E 0001E 14747+ SLL R2,30
00BB96 8920 001E 0001E 14748+ SLL R2,30
00BB9A 8920 001E 0001E 14749+ SLL R2,30
00BB9E 8920 001E 0001E 14750+ SLL R2,30
00BBA2 8920 001E 0001E 14751+ SLL R2,30
00BBA6 8920 001E 0001E 14752+ SLL R2,30
00BBAA 8920 001E 0001E 14753+ SLL R2,30
00BBAE 8920 001E 0001E 14754+ SLL R2,30
00BBB2 8920 001E 0001E 14755+ SLL R2,30
00BBB6 8920 001E 0001E 14756+ SLL R2,30
00BBBA 8920 001E 0001E 14757+ SLL R2,30
00BBBE 8920 001E 0001E 14758+ SLL R2,30
00BBC2 8920 001E 0001E 14759+ SLL R2,30
PAGE 271
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00BBC6 8920 001E 0001E 14760+ SLL R2,30
00BBCA 8920 001E 0001E 14761+ SLL R2,30
00BBCE 8920 001E 0001E 14762+ SLL R2,30
00BBD2 8920 001E 0001E 14763+ SLL R2,30
00BBD6 8920 001E 0001E 14764+ SLL R2,30
00BBDA 8920 001E 0001E 14765+ SLL R2,30
00BBDE 8920 001E 0001E 14766+ SLL R2,30
00BBE2 8920 001E 0001E 14767+ SLL R2,30
00BBE6 8920 001E 0001E 14768+ SLL R2,30
00BBEA 8920 001E 0001E 14769+ SLL R2,30
00BBEE 8920 001E 0001E 14770+ SLL R2,30
00BBF2 8920 001E 0001E 14771+ SLL R2,30
00BBF6 8920 001E 0001E 14772+ SLL R2,30
00BBFA 8920 001E 0001E 14773+ SLL R2,30
00BBFE 8920 001E 0001E 14774+ SLL R2,30
14775+*
00BC02 06FB 14776 BCTR R15,R11
14777 TSIMRET
00BC04 58F0 C0B0 0BC18 14778+ L R15,=A(SAVETST) R15 := current save area
00BC08 58DF 0004 00004 14779+ L R13,4(R15) get old save area back
00BC0C 98EC D00C 0000C 14780+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00BC10 07FE 14781+ BR 14 RETURN 02000000
14782 TSIMEND
00BC18 14783+ LTORG
00BC18 00000458 14784 =A(SAVETST)
0BC1C 14785+T244TEND EQU *
14786 *
14787 * Test 245 -- SLDL R,60 ------------------------------------
14788 *
14789 TSIMBEG T245,14000,60,5,C'SLDL R,60'
14790+*
003004 14791+TDSCDAT CSECT
003008 14792+ DS 0D
14793+*
003008 0000BC20 14794+T245TDSC DC A(T245) // TENTRY
00300C 0000012C 14795+ DC A(T245TEND-T245) // TLENGTH
003010 000036B0 14796+ DC F'14000' // TLRCNT
003014 0000003C 14797+ DC F'60' // TIGCNT
003018 00000005 14798+ DC F'5' // TLTYPE
001516 14799+TEXT CSECT
001516 E3F2F4F5 14800+SPTR1204 DC C'T245'
00301C 14801+TDSCDAT CSECT
00301C 14802+ DS 0F
00301C 04001516 14803+ DC AL1(L'SPTR1204),AL3(SPTR1204)
00151A 14804+TEXT CSECT
00151A E2D3C4D340D96BF6 14805+SPTR1205 DC C'SLDL R,60'
003020 14806+TDSCDAT CSECT
003020 14807+ DS 0F
003020 0900151A 14808+ DC AL1(L'SPTR1205),AL3(SPTR1205)
14809+*
004B2C 14810+TDSCTBL CSECT
04B2C 14811+T245TPTR EQU *
004B2C 00003008 14812+ DC A(T245TDSC) enabled test
14813+*
00BC1C 14814+TCODE CSECT
PAGE 272
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00BC20 14815+ DS 0D ensure double word alignment for test
00BC20 14816+T245 DS 0H 01650000
00BC20 90EC D00C 0000C 14817+ STM 14,12,12(13) SAVE REGISTERS 02950000
00BC24 18CF 14818+ LR R12,R15 base register := entry address
0BC20 14819+ USING T245,R12 declare code base register
00BC26 41B0 C01E 0BC3E 14820+ LA R11,T245L load loop target to R11
00BC2A 58F0 C128 0BD48 14821+ L R15,=A(SAVETST) R15 := current save area
00BC2E 50DF 0004 00004 14822+ ST R13,4(R15) set back pointer in current save area
00BC32 182D 14823+ LR R2,R13 remember callers save area
00BC34 18DF 14824+ LR R13,R15 setup current save area
00BC36 50D2 0008 00008 14825+ ST R13,8(R2) set forw pointer in callers save area
00000 14826+ USING TDSC,R1 declare TDSC base register
00BC3A 58F0 1008 00008 14827+ L R15,TLRCNT load local repeat count to R15
14828+*
14829 *
00BC3E 1722 14830 T245L XR R2,R2
00BC40 4130 0001 00001 14831 LA R3,1
14832 REPINS SLDL,(R2,60) repeat: SLDL R2,60
14833+*
14834+* build from sublist &ALIST a comma separated string &ARGS
14835+*
14836+*
14837+*
14838+*
14839+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
14840+* this allows to transfer the repeat count from last TDSCGEN call
14841+*
14842+*
14843+*
14844+* write a comment indicating what REPINS does (in case NOGEN in effect)
14845+*
14846+*,// REPINS: do 60 times:
14847+*
14848+* MNOTE requires that ' is doubled for expanded variables
14849+* thus build &MASTR as a copy of '&ARGS with ' doubled
14850+*
14851+*
14852+*,// SLDL R2,60
14853+*
14854+* finally generate code: &ICNT copies of &CODE &ARGS
14855+*
00BC44 8D20 003C 0003C 14856+ SLDL R2,60
00BC48 8D20 003C 0003C 14857+ SLDL R2,60
00BC4C 8D20 003C 0003C 14858+ SLDL R2,60
00BC50 8D20 003C 0003C 14859+ SLDL R2,60
00BC54 8D20 003C 0003C 14860+ SLDL R2,60
00BC58 8D20 003C 0003C 14861+ SLDL R2,60
00BC5C 8D20 003C 0003C 14862+ SLDL R2,60
00BC60 8D20 003C 0003C 14863+ SLDL R2,60
00BC64 8D20 003C 0003C 14864+ SLDL R2,60
00BC68 8D20 003C 0003C 14865+ SLDL R2,60
00BC6C 8D20 003C 0003C 14866+ SLDL R2,60
00BC70 8D20 003C 0003C 14867+ SLDL R2,60
00BC74 8D20 003C 0003C 14868+ SLDL R2,60
00BC78 8D20 003C 0003C 14869+ SLDL R2,60
PAGE 273
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00BC7C 8D20 003C 0003C 14870+ SLDL R2,60
00BC80 8D20 003C 0003C 14871+ SLDL R2,60
00BC84 8D20 003C 0003C 14872+ SLDL R2,60
00BC88 8D20 003C 0003C 14873+ SLDL R2,60
00BC8C 8D20 003C 0003C 14874+ SLDL R2,60
00BC90 8D20 003C 0003C 14875+ SLDL R2,60
00BC94 8D20 003C 0003C 14876+ SLDL R2,60
00BC98 8D20 003C 0003C 14877+ SLDL R2,60
00BC9C 8D20 003C 0003C 14878+ SLDL R2,60
00BCA0 8D20 003C 0003C 14879+ SLDL R2,60
00BCA4 8D20 003C 0003C 14880+ SLDL R2,60
00BCA8 8D20 003C 0003C 14881+ SLDL R2,60
00BCAC 8D20 003C 0003C 14882+ SLDL R2,60
00BCB0 8D20 003C 0003C 14883+ SLDL R2,60
00BCB4 8D20 003C 0003C 14884+ SLDL R2,60
00BCB8 8D20 003C 0003C 14885+ SLDL R2,60
00BCBC 8D20 003C 0003C 14886+ SLDL R2,60
00BCC0 8D20 003C 0003C 14887+ SLDL R2,60
00BCC4 8D20 003C 0003C 14888+ SLDL R2,60
00BCC8 8D20 003C 0003C 14889+ SLDL R2,60
00BCCC 8D20 003C 0003C 14890+ SLDL R2,60
00BCD0 8D20 003C 0003C 14891+ SLDL R2,60
00BCD4 8D20 003C 0003C 14892+ SLDL R2,60
00BCD8 8D20 003C 0003C 14893+ SLDL R2,60
00BCDC 8D20 003C 0003C 14894+ SLDL R2,60
00BCE0 8D20 003C 0003C 14895+ SLDL R2,60
00BCE4 8D20 003C 0003C 14896+ SLDL R2,60
00BCE8 8D20 003C 0003C 14897+ SLDL R2,60
00BCEC 8D20 003C 0003C 14898+ SLDL R2,60
00BCF0 8D20 003C 0003C 14899+ SLDL R2,60
00BCF4 8D20 003C 0003C 14900+ SLDL R2,60
00BCF8 8D20 003C 0003C 14901+ SLDL R2,60
00BCFC 8D20 003C 0003C 14902+ SLDL R2,60
00BD00 8D20 003C 0003C 14903+ SLDL R2,60
00BD04 8D20 003C 0003C 14904+ SLDL R2,60
00BD08 8D20 003C 0003C 14905+ SLDL R2,60
00BD0C 8D20 003C 0003C 14906+ SLDL R2,60
00BD10 8D20 003C 0003C 14907+ SLDL R2,60
00BD14 8D20 003C 0003C 14908+ SLDL R2,60
00BD18 8D20 003C 0003C 14909+ SLDL R2,60
00BD1C 8D20 003C 0003C 14910+ SLDL R2,60
00BD20 8D20 003C 0003C 14911+ SLDL R2,60
00BD24 8D20 003C 0003C 14912+ SLDL R2,60
00BD28 8D20 003C 0003C 14913+ SLDL R2,60
00BD2C 8D20 003C 0003C 14914+ SLDL R2,60
00BD30 8D20 003C 0003C 14915+ SLDL R2,60
14916+*
00BD34 06FB 14917 BCTR R15,R11
14918 TSIMRET
00BD36 58F0 C128 0BD48 14919+ L R15,=A(SAVETST) R15 := current save area
00BD3A 58DF 0004 00004 14920+ L R13,4(R15) get old save area back
00BD3E 98EC D00C 0000C 14921+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00BD42 07FE 14922+ BR 14 RETURN 02000000
14923 TSIMEND
00BD48 14924+ LTORG
PAGE 274
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00BD48 00000458 14925 =A(SAVETST)
0BD4C 14926+T245TEND EQU *
14927 *
14928 * Test 25x -- misc TM,TR,TRT ===============================
14929 *
14930 * Test 250 -- TM m,i ---------------------------------------
14931 *
14932 TSIMBEG T250,10000,50,1,C'TM m,i'
14933+*
003024 14934+TDSCDAT CSECT
003028 14935+ DS 0D
14936+*
003028 0000BD50 14937+T250TDSC DC A(T250) // TENTRY
00302C 000000FC 14938+ DC A(T250TEND-T250) // TLENGTH
003030 00002710 14939+ DC F'10000' // TLRCNT
003034 00000032 14940+ DC F'50' // TIGCNT
003038 00000001 14941+ DC F'1' // TLTYPE
001523 14942+TEXT CSECT
001523 E3F2F5F0 14943+SPTR1216 DC C'T250'
00303C 14944+TDSCDAT CSECT
00303C 14945+ DS 0F
00303C 04001523 14946+ DC AL1(L'SPTR1216),AL3(SPTR1216)
001527 14947+TEXT CSECT
001527 E3D440946B89 14948+SPTR1217 DC C'TM m,i'
003040 14949+TDSCDAT CSECT
003040 14950+ DS 0F
003040 06001527 14951+ DC AL1(L'SPTR1217),AL3(SPTR1217)
14952+*
004B30 14953+TDSCTBL CSECT
04B30 14954+T250TPTR EQU *
004B30 00003028 14955+ DC A(T250TDSC) enabled test
14956+*
00BD4C 14957+TCODE CSECT
00BD50 14958+ DS 0D ensure double word alignment for test
00BD50 14959+T250 DS 0H 01650000
00BD50 90EC D00C 0000C 14960+ STM 14,12,12(13) SAVE REGISTERS 02950000
00BD54 18CF 14961+ LR R12,R15 base register := entry address
0BD50 14962+ USING T250,R12 declare code base register
00BD56 41B0 C01E 0BD6E 14963+ LA R11,T250L load loop target to R11
00BD5A 58F0 C0F8 0BE48 14964+ L R15,=A(SAVETST) R15 := current save area
00BD5E 50DF 0004 00004 14965+ ST R13,4(R15) set back pointer in current save area
00BD62 182D 14966+ LR R2,R13 remember callers save area
00BD64 18DF 14967+ LR R13,R15 setup current save area
00BD66 50D2 0008 00008 14968+ ST R13,8(R2) set forw pointer in callers save area
00000 14969+ USING TDSC,R1 declare TDSC base register
00BD6A 58F0 1008 00008 14970+ L R15,TLRCNT load local repeat count to R15
14971+*
14972 *
14973 T250L REPINS TM,(T250V,X'01') repeat: TM T250V,X'01'
14974+*
14975+* build from sublist &ALIST a comma separated string &ARGS
14976+*
14977+*
14978+*
14979+*
PAGE 275
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
14980+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
14981+* this allows to transfer the repeat count from last TDSCGEN call
14982+*
14983+*
0BD6E 14984+T250L EQU *
14985+*
14986+* write a comment indicating what REPINS does (in case NOGEN in effect)
14987+*
14988+*,// REPINS: do 50 times:
14989+*
14990+* MNOTE requires that ' is doubled for expanded variables
14991+* thus build &MASTR as a copy of '&ARGS with ' doubled
14992+*
14993+*
14994+*,// TM T250V,X'01'
14995+*
14996+* finally generate code: &ICNT copies of &CODE &ARGS
14997+*
00BD6E 9101 C0F6 0BE46 14998+ TM T250V,X'01'
00BD72 9101 C0F6 0BE46 14999+ TM T250V,X'01'
00BD76 9101 C0F6 0BE46 15000+ TM T250V,X'01'
00BD7A 9101 C0F6 0BE46 15001+ TM T250V,X'01'
00BD7E 9101 C0F6 0BE46 15002+ TM T250V,X'01'
00BD82 9101 C0F6 0BE46 15003+ TM T250V,X'01'
00BD86 9101 C0F6 0BE46 15004+ TM T250V,X'01'
00BD8A 9101 C0F6 0BE46 15005+ TM T250V,X'01'
00BD8E 9101 C0F6 0BE46 15006+ TM T250V,X'01'
00BD92 9101 C0F6 0BE46 15007+ TM T250V,X'01'
00BD96 9101 C0F6 0BE46 15008+ TM T250V,X'01'
00BD9A 9101 C0F6 0BE46 15009+ TM T250V,X'01'
00BD9E 9101 C0F6 0BE46 15010+ TM T250V,X'01'
00BDA2 9101 C0F6 0BE46 15011+ TM T250V,X'01'
00BDA6 9101 C0F6 0BE46 15012+ TM T250V,X'01'
00BDAA 9101 C0F6 0BE46 15013+ TM T250V,X'01'
00BDAE 9101 C0F6 0BE46 15014+ TM T250V,X'01'
00BDB2 9101 C0F6 0BE46 15015+ TM T250V,X'01'
00BDB6 9101 C0F6 0BE46 15016+ TM T250V,X'01'
00BDBA 9101 C0F6 0BE46 15017+ TM T250V,X'01'
00BDBE 9101 C0F6 0BE46 15018+ TM T250V,X'01'
00BDC2 9101 C0F6 0BE46 15019+ TM T250V,X'01'
00BDC6 9101 C0F6 0BE46 15020+ TM T250V,X'01'
00BDCA 9101 C0F6 0BE46 15021+ TM T250V,X'01'
00BDCE 9101 C0F6 0BE46 15022+ TM T250V,X'01'
00BDD2 9101 C0F6 0BE46 15023+ TM T250V,X'01'
00BDD6 9101 C0F6 0BE46 15024+ TM T250V,X'01'
00BDDA 9101 C0F6 0BE46 15025+ TM T250V,X'01'
00BDDE 9101 C0F6 0BE46 15026+ TM T250V,X'01'
00BDE2 9101 C0F6 0BE46 15027+ TM T250V,X'01'
00BDE6 9101 C0F6 0BE46 15028+ TM T250V,X'01'
00BDEA 9101 C0F6 0BE46 15029+ TM T250V,X'01'
00BDEE 9101 C0F6 0BE46 15030+ TM T250V,X'01'
00BDF2 9101 C0F6 0BE46 15031+ TM T250V,X'01'
00BDF6 9101 C0F6 0BE46 15032+ TM T250V,X'01'
00BDFA 9101 C0F6 0BE46 15033+ TM T250V,X'01'
00BDFE 9101 C0F6 0BE46 15034+ TM T250V,X'01'
PAGE 276
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00BE02 9101 C0F6 0BE46 15035+ TM T250V,X'01'
00BE06 9101 C0F6 0BE46 15036+ TM T250V,X'01'
00BE0A 9101 C0F6 0BE46 15037+ TM T250V,X'01'
00BE0E 9101 C0F6 0BE46 15038+ TM T250V,X'01'
00BE12 9101 C0F6 0BE46 15039+ TM T250V,X'01'
00BE16 9101 C0F6 0BE46 15040+ TM T250V,X'01'
00BE1A 9101 C0F6 0BE46 15041+ TM T250V,X'01'
00BE1E 9101 C0F6 0BE46 15042+ TM T250V,X'01'
00BE22 9101 C0F6 0BE46 15043+ TM T250V,X'01'
00BE26 9101 C0F6 0BE46 15044+ TM T250V,X'01'
00BE2A 9101 C0F6 0BE46 15045+ TM T250V,X'01'
00BE2E 9101 C0F6 0BE46 15046+ TM T250V,X'01'
00BE32 9101 C0F6 0BE46 15047+ TM T250V,X'01'
15048+*
00BE36 06FB 15049 BCTR R15,R11
15050 TSIMRET
00BE38 58F0 C0F8 0BE48 15051+ L R15,=A(SAVETST) R15 := current save area
00BE3C 58DF 0004 00004 15052+ L R13,4(R15) get old save area back
00BE40 98EC D00C 0000C 15053+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00BE44 07FE 15054+ BR 14 RETURN 02000000
15055 *
00BE46 01 15056 T250V DC X'01'
15057 TSIMEND
00BE48 15058+ LTORG
00BE48 00000458 15059 =A(SAVETST)
0BE4C 15060+T250TEND EQU *
15061 *
15062 * Test 252 -- TR m,m (10c) ---------------------------------
15063 *
15064 TSIMBEG T252,3500,50,1,C'TR m,m (10c)'
15065+*
003044 15066+TDSCDAT CSECT
003048 15067+ DS 0D
15068+*
003048 0000BE50 15069+T252TDSC DC A(T252) // TENTRY
00304C 00000178 15070+ DC A(T252TEND-T252) // TLENGTH
003050 00000DAC 15071+ DC F'3500' // TLRCNT
003054 00000032 15072+ DC F'50' // TIGCNT
003058 00000001 15073+ DC F'1' // TLTYPE
00152D 15074+TEXT CSECT
00152D E3F2F5F2 15075+SPTR1228 DC C'T252'
00305C 15076+TDSCDAT CSECT
00305C 15077+ DS 0F
00305C 0400152D 15078+ DC AL1(L'SPTR1228),AL3(SPTR1228)
001531 15079+TEXT CSECT
001531 E3D940946B94404D 15080+SPTR1229 DC C'TR m,m (10c)'
003060 15081+TDSCDAT CSECT
003060 15082+ DS 0F
003060 0C001531 15083+ DC AL1(L'SPTR1229),AL3(SPTR1229)
15084+*
004B34 15085+TDSCTBL CSECT
04B34 15086+T252TPTR EQU *
004B34 00003048 15087+ DC A(T252TDSC) enabled test
15088+*
00BE4C 15089+TCODE CSECT
PAGE 277
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00BE50 15090+ DS 0D ensure double word alignment for test
00BE50 15091+T252 DS 0H 01650000
00BE50 90EC D00C 0000C 15092+ STM 14,12,12(13) SAVE REGISTERS 02950000
00BE54 18CF 15093+ LR R12,R15 base register := entry address
0BE50 15094+ USING T252,R12 declare code base register
00BE56 41B0 C026 0BE76 15095+ LA R11,T252L load loop target to R11
00BE5A 58F0 C170 0BFC0 15096+ L R15,=A(SAVETST) R15 := current save area
00BE5E 50DF 0004 00004 15097+ ST R13,4(R15) set back pointer in current save area
00BE62 182D 15098+ LR R2,R13 remember callers save area
00BE64 18DF 15099+ LR R13,R15 setup current save area
00BE66 50D2 0008 00008 15100+ ST R13,8(R2) set forw pointer in callers save area
00000 15101+ USING TDSC,R1 declare TDSC base register
00BE6A 58F0 1008 00008 15102+ L R15,TLRCNT load local repeat count to R15
15103+*
15104 *
00BE6E 4120 C162 0BFB2 15105 LA R2,T252V
00BE72 5830 C174 0BFC4 15106 L R3,=A(TRTBLINV)
15107 T252L REPINS TR,(0(10,R2),0(R3)) repeat: TR 0(10,R2),0(R3)
15108+*
15109+* build from sublist &ALIST a comma separated string &ARGS
15110+*
15111+*
15112+*
15113+*
15114+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
15115+* this allows to transfer the repeat count from last TDSCGEN call
15116+*
15117+*
0BE76 15118+T252L EQU *
15119+*
15120+* write a comment indicating what REPINS does (in case NOGEN in effect)
15121+*
15122+*,// REPINS: do 50 times:
15123+*
15124+* MNOTE requires that ' is doubled for expanded variables
15125+* thus build &MASTR as a copy of '&ARGS with ' doubled
15126+*
15127+*
15128+*,// TR 0(10,R2),0(R3)
15129+*
15130+* finally generate code: &ICNT copies of &CODE &ARGS
15131+*
00BE76 DC09 2000 3000 00000 00000 15132+ TR 0(10,R2),0(R3)
00BE7C DC09 2000 3000 00000 00000 15133+ TR 0(10,R2),0(R3)
00BE82 DC09 2000 3000 00000 00000 15134+ TR 0(10,R2),0(R3)
00BE88 DC09 2000 3000 00000 00000 15135+ TR 0(10,R2),0(R3)
00BE8E DC09 2000 3000 00000 00000 15136+ TR 0(10,R2),0(R3)
00BE94 DC09 2000 3000 00000 00000 15137+ TR 0(10,R2),0(R3)
00BE9A DC09 2000 3000 00000 00000 15138+ TR 0(10,R2),0(R3)
00BEA0 DC09 2000 3000 00000 00000 15139+ TR 0(10,R2),0(R3)
00BEA6 DC09 2000 3000 00000 00000 15140+ TR 0(10,R2),0(R3)
00BEAC DC09 2000 3000 00000 00000 15141+ TR 0(10,R2),0(R3)
00BEB2 DC09 2000 3000 00000 00000 15142+ TR 0(10,R2),0(R3)
00BEB8 DC09 2000 3000 00000 00000 15143+ TR 0(10,R2),0(R3)
00BEBE DC09 2000 3000 00000 00000 15144+ TR 0(10,R2),0(R3)
PAGE 278
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00BEC4 DC09 2000 3000 00000 00000 15145+ TR 0(10,R2),0(R3)
00BECA DC09 2000 3000 00000 00000 15146+ TR 0(10,R2),0(R3)
00BED0 DC09 2000 3000 00000 00000 15147+ TR 0(10,R2),0(R3)
00BED6 DC09 2000 3000 00000 00000 15148+ TR 0(10,R2),0(R3)
00BEDC DC09 2000 3000 00000 00000 15149+ TR 0(10,R2),0(R3)
00BEE2 DC09 2000 3000 00000 00000 15150+ TR 0(10,R2),0(R3)
00BEE8 DC09 2000 3000 00000 00000 15151+ TR 0(10,R2),0(R3)
00BEEE DC09 2000 3000 00000 00000 15152+ TR 0(10,R2),0(R3)
00BEF4 DC09 2000 3000 00000 00000 15153+ TR 0(10,R2),0(R3)
00BEFA DC09 2000 3000 00000 00000 15154+ TR 0(10,R2),0(R3)
00BF00 DC09 2000 3000 00000 00000 15155+ TR 0(10,R2),0(R3)
00BF06 DC09 2000 3000 00000 00000 15156+ TR 0(10,R2),0(R3)
00BF0C DC09 2000 3000 00000 00000 15157+ TR 0(10,R2),0(R3)
00BF12 DC09 2000 3000 00000 00000 15158+ TR 0(10,R2),0(R3)
00BF18 DC09 2000 3000 00000 00000 15159+ TR 0(10,R2),0(R3)
00BF1E DC09 2000 3000 00000 00000 15160+ TR 0(10,R2),0(R3)
00BF24 DC09 2000 3000 00000 00000 15161+ TR 0(10,R2),0(R3)
00BF2A DC09 2000 3000 00000 00000 15162+ TR 0(10,R2),0(R3)
00BF30 DC09 2000 3000 00000 00000 15163+ TR 0(10,R2),0(R3)
00BF36 DC09 2000 3000 00000 00000 15164+ TR 0(10,R2),0(R3)
00BF3C DC09 2000 3000 00000 00000 15165+ TR 0(10,R2),0(R3)
00BF42 DC09 2000 3000 00000 00000 15166+ TR 0(10,R2),0(R3)
00BF48 DC09 2000 3000 00000 00000 15167+ TR 0(10,R2),0(R3)
00BF4E DC09 2000 3000 00000 00000 15168+ TR 0(10,R2),0(R3)
00BF54 DC09 2000 3000 00000 00000 15169+ TR 0(10,R2),0(R3)
00BF5A DC09 2000 3000 00000 00000 15170+ TR 0(10,R2),0(R3)
00BF60 DC09 2000 3000 00000 00000 15171+ TR 0(10,R2),0(R3)
00BF66 DC09 2000 3000 00000 00000 15172+ TR 0(10,R2),0(R3)
00BF6C DC09 2000 3000 00000 00000 15173+ TR 0(10,R2),0(R3)
00BF72 DC09 2000 3000 00000 00000 15174+ TR 0(10,R2),0(R3)
00BF78 DC09 2000 3000 00000 00000 15175+ TR 0(10,R2),0(R3)
00BF7E DC09 2000 3000 00000 00000 15176+ TR 0(10,R2),0(R3)
00BF84 DC09 2000 3000 00000 00000 15177+ TR 0(10,R2),0(R3)
00BF8A DC09 2000 3000 00000 00000 15178+ TR 0(10,R2),0(R3)
00BF90 DC09 2000 3000 00000 00000 15179+ TR 0(10,R2),0(R3)
00BF96 DC09 2000 3000 00000 00000 15180+ TR 0(10,R2),0(R3)
00BF9C DC09 2000 3000 00000 00000 15181+ TR 0(10,R2),0(R3)
15182+*
00BFA2 06FB 15183 BCTR R15,R11
15184 TSIMRET
00BFA4 58F0 C170 0BFC0 15185+ L R15,=A(SAVETST) R15 := current save area
00BFA8 58DF 0004 00004 15186+ L R13,4(R15) get old save area back
00BFAC 98EC D00C 0000C 15187+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00BFB0 07FE 15188+ BR 14 RETURN 02000000
15189 *
00BFB2 D8E6C5D9E3E8E4C9 15190 T252V DC C'QWERTYUIOP'
15191 TSIMEND
00BFC0 15192+ LTORG
00BFC0 00000458 15193 =A(SAVETST)
00BFC4 000023E8 15194 =A(TRTBLINV)
0BFC8 15195+T252TEND EQU *
15196 *
15197 * Test 253 -- TR m,m (100c) --------------------------------
15198 *
15199 TSIMBEG T253,1600,20,1,C'TR m,m (100c)'
PAGE 279
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
15200+*
003064 15201+TDSCDAT CSECT
003068 15202+ DS 0D
15203+*
003068 0000BFC8 15204+T253TDSC DC A(T253) // TENTRY
00306C 00000120 15205+ DC A(T253TEND-T253) // TLENGTH
003070 00000640 15206+ DC F'1600' // TLRCNT
003074 00000014 15207+ DC F'20' // TIGCNT
003078 00000001 15208+ DC F'1' // TLTYPE
00153D 15209+TEXT CSECT
00153D E3F2F5F3 15210+SPTR1240 DC C'T253'
00307C 15211+TDSCDAT CSECT
00307C 15212+ DS 0F
00307C 0400153D 15213+ DC AL1(L'SPTR1240),AL3(SPTR1240)
001541 15214+TEXT CSECT
001541 E3D940946B94404D 15215+SPTR1241 DC C'TR m,m (100c)'
003080 15216+TDSCDAT CSECT
003080 15217+ DS 0F
003080 0D001541 15218+ DC AL1(L'SPTR1241),AL3(SPTR1241)
15219+*
004B38 15220+TDSCTBL CSECT
04B38 15221+T253TPTR EQU *
004B38 00003068 15222+ DC A(T253TDSC) enabled test
15223+*
00BFC8 15224+TCODE CSECT
00BFC8 15225+ DS 0D ensure double word alignment for test
00BFC8 15226+T253 DS 0H 01650000
00BFC8 90EC D00C 0000C 15227+ STM 14,12,12(13) SAVE REGISTERS 02950000
00BFCC 18CF 15228+ LR R12,R15 base register := entry address
0BFC8 15229+ USING T253,R12 declare code base register
00BFCE 41B0 C026 0BFEE 15230+ LA R11,T253L load loop target to R11
00BFD2 58F0 C118 0C0E0 15231+ L R15,=A(SAVETST) R15 := current save area
00BFD6 50DF 0004 00004 15232+ ST R13,4(R15) set back pointer in current save area
00BFDA 182D 15233+ LR R2,R13 remember callers save area
00BFDC 18DF 15234+ LR R13,R15 setup current save area
00BFDE 50D2 0008 00008 15235+ ST R13,8(R2) set forw pointer in callers save area
00000 15236+ USING TDSC,R1 declare TDSC base register
00BFE2 58F0 1008 00008 15237+ L R15,TLRCNT load local repeat count to R15
15238+*
15239 *
00BFE6 4120 C0AE 0C076 15240 LA R2,T253V
00BFEA 5830 C11C 0C0E4 15241 L R3,=A(TRTBLINV)
15242 T253L REPINS TR,(0(100,R2),0(R3)) repeat: TR 0(100,R2),0(R3)
15243+*
15244+* build from sublist &ALIST a comma separated string &ARGS
15245+*
15246+*
15247+*
15248+*
15249+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
15250+* this allows to transfer the repeat count from last TDSCGEN call
15251+*
15252+*
0BFEE 15253+T253L EQU *
15254+*
PAGE 280
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
15255+* write a comment indicating what REPINS does (in case NOGEN in effect)
15256+*
15257+*,// REPINS: do 20 times:
15258+*
15259+* MNOTE requires that ' is doubled for expanded variables
15260+* thus build &MASTR as a copy of '&ARGS with ' doubled
15261+*
15262+*
15263+*,// TR 0(100,R2),0(R3)
15264+*
15265+* finally generate code: &ICNT copies of &CODE &ARGS
15266+*
00BFEE DC63 2000 3000 00000 00000 15267+ TR 0(100,R2),0(R3)
00BFF4 DC63 2000 3000 00000 00000 15268+ TR 0(100,R2),0(R3)
00BFFA DC63 2000 3000 00000 00000 15269+ TR 0(100,R2),0(R3)
00C000 DC63 2000 3000 00000 00000 15270+ TR 0(100,R2),0(R3)
00C006 DC63 2000 3000 00000 00000 15271+ TR 0(100,R2),0(R3)
00C00C DC63 2000 3000 00000 00000 15272+ TR 0(100,R2),0(R3)
00C012 DC63 2000 3000 00000 00000 15273+ TR 0(100,R2),0(R3)
00C018 DC63 2000 3000 00000 00000 15274+ TR 0(100,R2),0(R3)
00C01E DC63 2000 3000 00000 00000 15275+ TR 0(100,R2),0(R3)
00C024 DC63 2000 3000 00000 00000 15276+ TR 0(100,R2),0(R3)
00C02A DC63 2000 3000 00000 00000 15277+ TR 0(100,R2),0(R3)
00C030 DC63 2000 3000 00000 00000 15278+ TR 0(100,R2),0(R3)
00C036 DC63 2000 3000 00000 00000 15279+ TR 0(100,R2),0(R3)
00C03C DC63 2000 3000 00000 00000 15280+ TR 0(100,R2),0(R3)
00C042 DC63 2000 3000 00000 00000 15281+ TR 0(100,R2),0(R3)
00C048 DC63 2000 3000 00000 00000 15282+ TR 0(100,R2),0(R3)
00C04E DC63 2000 3000 00000 00000 15283+ TR 0(100,R2),0(R3)
00C054 DC63 2000 3000 00000 00000 15284+ TR 0(100,R2),0(R3)
00C05A DC63 2000 3000 00000 00000 15285+ TR 0(100,R2),0(R3)
00C060 DC63 2000 3000 00000 00000 15286+ TR 0(100,R2),0(R3)
15287+*
00C066 06FB 15288 BCTR R15,R11
15289 TSIMRET
00C068 58F0 C118 0C0E0 15290+ L R15,=A(SAVETST) R15 := current save area
00C06C 58DF 0004 00004 15291+ L R13,4(R15) get old save area back
00C070 98EC D00C 0000C 15292+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00C074 07FE 15293+ BR 14 RETURN 02000000
15294 *
00C076 D8E6C5D9E3E8E4C9 15295 T253V DC C'QWERTYUIOPASDFGHJKLZXCVBN'
00C08F D5D4F1F2F3F4F5F6 15296 DC C'NM1234567890-=:<,>.?/!@#$'
00C0A8 6C5C4D5D6D604E7E 15297 DC C'%*()_-+=qwertyuiopasdfghj'
00C0C1 9293A9A783A58295 15298 DC C'klzxcvbnm9876543210!@#$%*'
15299 TSIMEND
00C0E0 15300+ LTORG
00C0E0 00000458 15301 =A(SAVETST)
00C0E4 000023E8 15302 =A(TRTBLINV)
0C0E8 15303+T253TEND EQU *
15304 *
15305 * Test 254 -- TR m,m (250c) --------------------------------
15306 *
15307 TSIMBEG T254,700,20,1,C'TR m,m (250c)'
15308+*
003084 15309+TDSCDAT CSECT
PAGE 281
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003088 15310+ DS 0D
15311+*
003088 0000C0E8 15312+T254TDSC DC A(T254) // TENTRY
00308C 000001B0 15313+ DC A(T254TEND-T254) // TLENGTH
003090 000002BC 15314+ DC F'700' // TLRCNT
003094 00000014 15315+ DC F'20' // TIGCNT
003098 00000001 15316+ DC F'1' // TLTYPE
00154E 15317+TEXT CSECT
00154E E3F2F5F4 15318+SPTR1252 DC C'T254'
00309C 15319+TDSCDAT CSECT
00309C 15320+ DS 0F
00309C 0400154E 15321+ DC AL1(L'SPTR1252),AL3(SPTR1252)
001552 15322+TEXT CSECT
001552 E3D940946B94404D 15323+SPTR1253 DC C'TR m,m (250c)'
0030A0 15324+TDSCDAT CSECT
0030A0 15325+ DS 0F
0030A0 0D001552 15326+ DC AL1(L'SPTR1253),AL3(SPTR1253)
15327+*
004B3C 15328+TDSCTBL CSECT
04B3C 15329+T254TPTR EQU *
004B3C 00003088 15330+ DC A(T254TDSC) enabled test
15331+*
00C0E8 15332+TCODE CSECT
00C0E8 15333+ DS 0D ensure double word alignment for test
00C0E8 15334+T254 DS 0H 01650000
00C0E8 90EC D00C 0000C 15335+ STM 14,12,12(13) SAVE REGISTERS 02950000
00C0EC 18CF 15336+ LR R12,R15 base register := entry address
0C0E8 15337+ USING T254,R12 declare code base register
00C0EE 41B0 C026 0C10E 15338+ LA R11,T254L load loop target to R11
00C0F2 58F0 C1A8 0C290 15339+ L R15,=A(SAVETST) R15 := current save area
00C0F6 50DF 0004 00004 15340+ ST R13,4(R15) set back pointer in current save area
00C0FA 182D 15341+ LR R2,R13 remember callers save area
00C0FC 18DF 15342+ LR R13,R15 setup current save area
00C0FE 50D2 0008 00008 15343+ ST R13,8(R2) set forw pointer in callers save area
00000 15344+ USING TDSC,R1 declare TDSC base register
00C102 58F0 1008 00008 15345+ L R15,TLRCNT load local repeat count to R15
15346+*
15347 *
00C106 4120 C0AE 0C196 15348 LA R2,T254V
00C10A 5830 C1AC 0C294 15349 L R3,=A(TRTBLINV)
15350 T254L REPINS TR,(0(250,R2),0(R3)) repeat: TR 0(250,R2),0(R3)
15351+*
15352+* build from sublist &ALIST a comma separated string &ARGS
15353+*
15354+*
15355+*
15356+*
15357+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
15358+* this allows to transfer the repeat count from last TDSCGEN call
15359+*
15360+*
0C10E 15361+T254L EQU *
15362+*
15363+* write a comment indicating what REPINS does (in case NOGEN in effect)
15364+*
PAGE 282
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
15365+*,// REPINS: do 20 times:
15366+*
15367+* MNOTE requires that ' is doubled for expanded variables
15368+* thus build &MASTR as a copy of '&ARGS with ' doubled
15369+*
15370+*
15371+*,// TR 0(250,R2),0(R3)
15372+*
15373+* finally generate code: &ICNT copies of &CODE &ARGS
15374+*
00C10E DCF9 2000 3000 00000 00000 15375+ TR 0(250,R2),0(R3)
00C114 DCF9 2000 3000 00000 00000 15376+ TR 0(250,R2),0(R3)
00C11A DCF9 2000 3000 00000 00000 15377+ TR 0(250,R2),0(R3)
00C120 DCF9 2000 3000 00000 00000 15378+ TR 0(250,R2),0(R3)
00C126 DCF9 2000 3000 00000 00000 15379+ TR 0(250,R2),0(R3)
00C12C DCF9 2000 3000 00000 00000 15380+ TR 0(250,R2),0(R3)
00C132 DCF9 2000 3000 00000 00000 15381+ TR 0(250,R2),0(R3)
00C138 DCF9 2000 3000 00000 00000 15382+ TR 0(250,R2),0(R3)
00C13E DCF9 2000 3000 00000 00000 15383+ TR 0(250,R2),0(R3)
00C144 DCF9 2000 3000 00000 00000 15384+ TR 0(250,R2),0(R3)
00C14A DCF9 2000 3000 00000 00000 15385+ TR 0(250,R2),0(R3)
00C150 DCF9 2000 3000 00000 00000 15386+ TR 0(250,R2),0(R3)
00C156 DCF9 2000 3000 00000 00000 15387+ TR 0(250,R2),0(R3)
00C15C DCF9 2000 3000 00000 00000 15388+ TR 0(250,R2),0(R3)
00C162 DCF9 2000 3000 00000 00000 15389+ TR 0(250,R2),0(R3)
00C168 DCF9 2000 3000 00000 00000 15390+ TR 0(250,R2),0(R3)
00C16E DCF9 2000 3000 00000 00000 15391+ TR 0(250,R2),0(R3)
00C174 DCF9 2000 3000 00000 00000 15392+ TR 0(250,R2),0(R3)
00C17A DCF9 2000 3000 00000 00000 15393+ TR 0(250,R2),0(R3)
00C180 DCF9 2000 3000 00000 00000 15394+ TR 0(250,R2),0(R3)
15395+*
00C186 06FB 15396 BCTR R15,R11
15397 TSIMRET
00C188 58F0 C1A8 0C290 15398+ L R15,=A(SAVETST) R15 := current save area
00C18C 58DF 0004 00004 15399+ L R13,4(R15) get old save area back
00C190 98EC D00C 0000C 15400+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00C194 07FE 15401+ BR 14 RETURN 02000000
15402 *
00C196 D8E6C5D9E3E8E4C9 15403 T254V DC C'QWERTYUIOPASDFGHJKLZXCVBN'
00C1AF D5D4F1F2F3F4F5F6 15404 DC C'NM1234567890-=:<,>.?/!@#$'
00C1C8 6C5C4D5D6D604E7E 15405 DC C'%*()_-+=qwertyuiopasdfghj'
00C1E1 9293A9A783A58295 15406 DC C'klzxcvbnm9876543210!@#$%*'
00C1FA D8E6C5D9E3E8E4C9 15407 DC C'QWERTYUIOPASDFGHJKLZXCVBN'
00C213 D5D4F1F2F3F4F5F6 15408 DC C'NM1234567890-=:<,>.?/!@#$'
00C22C 6C5C4D5D6D604E7E 15409 DC C'%*()_-+=qwertyuiopasdfghj'
00C245 9293A9A783A58295 15410 DC C'klzxcvbnm9876543210!@#$%*'
00C25E D8E6C5D9E3E8E4C9 15411 DC C'QWERTYUIOPASDFGHJKLZXCVBN'
00C277 D5D4F1F2F3F4F5F6 15412 DC C'NM1234567890-=:<,>.?/!@#$'
15413 TSIMEND
00C290 15414+ LTORG
00C290 00000458 15415 =A(SAVETST)
00C294 000023E8 15416 =A(TRTBLINV)
0C298 15417+T254TEND EQU *
15418 *
15419 * Test 255 -- TRT m,m (10c,zero) ---------------------------
PAGE 283
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
15420 * test TRT with an all-zero function table
15421 *
15422 TSIMBEG T255,1200,50,1,C'TRT m,m (10c,zero)'
15423+*
0030A4 15424+TDSCDAT CSECT
0030A8 15425+ DS 0D
15426+*
0030A8 0000C298 15427+T255TDSC DC A(T255) // TENTRY
0030AC 00000270 15428+ DC A(T255TEND-T255) // TLENGTH
0030B0 000004B0 15429+ DC F'1200' // TLRCNT
0030B4 00000032 15430+ DC F'50' // TIGCNT
0030B8 00000001 15431+ DC F'1' // TLTYPE
00155F 15432+TEXT CSECT
00155F E3F2F5F5 15433+SPTR1264 DC C'T255'
0030BC 15434+TDSCDAT CSECT
0030BC 15435+ DS 0F
0030BC 0400155F 15436+ DC AL1(L'SPTR1264),AL3(SPTR1264)
001563 15437+TEXT CSECT
001563 E3D9E340946B9440 15438+SPTR1265 DC C'TRT m,m (10c,zero)'
0030C0 15439+TDSCDAT CSECT
0030C0 15440+ DS 0F
0030C0 12001563 15441+ DC AL1(L'SPTR1265),AL3(SPTR1265)
15442+*
004B40 15443+TDSCTBL CSECT
04B40 15444+T255TPTR EQU *
004B40 000030A8 15445+ DC A(T255TDSC) enabled test
15446+*
00C298 15447+TCODE CSECT
00C298 15448+ DS 0D ensure double word alignment for test
00C298 15449+T255 DS 0H 01650000
00C298 90EC D00C 0000C 15450+ STM 14,12,12(13) SAVE REGISTERS 02950000
00C29C 18CF 15451+ LR R12,R15 base register := entry address
0C298 15452+ USING T255,R12 declare code base register
00C29E 41B0 C026 0C2BE 15453+ LA R11,T255L load loop target to R11
00C2A2 58F0 C268 0C500 15454+ L R15,=A(SAVETST) R15 := current save area
00C2A6 50DF 0004 00004 15455+ ST R13,4(R15) set back pointer in current save area
00C2AA 182D 15456+ LR R2,R13 remember callers save area
00C2AC 18DF 15457+ LR R13,R15 setup current save area
00C2AE 50D2 0008 00008 15458+ ST R13,8(R2) set forw pointer in callers save area
00000 15459+ USING TDSC,R1 declare TDSC base register
00C2B2 58F0 1008 00008 15460+ L R15,TLRCNT load local repeat count to R15
15461+*
15462 *
00C2B6 5840 C26C 0C504 15463 L R4,=A(TRTBLINV)
00C2BA 4150 C162 0C3FA 15464 LA R5,T255V
15465 T255L REPINS TRT,(0(10,R4),0(R5)) repeat: TRT 0(10,R4),0(R5)
15466+*
15467+* build from sublist &ALIST a comma separated string &ARGS
15468+*
15469+*
15470+*
15471+*
15472+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
15473+* this allows to transfer the repeat count from last TDSCGEN call
15474+*
PAGE 284
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
15475+*
0C2BE 15476+T255L EQU *
15477+*
15478+* write a comment indicating what REPINS does (in case NOGEN in effect)
15479+*
15480+*,// REPINS: do 50 times:
15481+*
15482+* MNOTE requires that ' is doubled for expanded variables
15483+* thus build &MASTR as a copy of '&ARGS with ' doubled
15484+*
15485+*
15486+*,// TRT 0(10,R4),0(R5)
15487+*
15488+* finally generate code: &ICNT copies of &CODE &ARGS
15489+*
00C2BE DD09 4000 5000 00000 00000 15490+ TRT 0(10,R4),0(R5)
00C2C4 DD09 4000 5000 00000 00000 15491+ TRT 0(10,R4),0(R5)
00C2CA DD09 4000 5000 00000 00000 15492+ TRT 0(10,R4),0(R5)
00C2D0 DD09 4000 5000 00000 00000 15493+ TRT 0(10,R4),0(R5)
00C2D6 DD09 4000 5000 00000 00000 15494+ TRT 0(10,R4),0(R5)
00C2DC DD09 4000 5000 00000 00000 15495+ TRT 0(10,R4),0(R5)
00C2E2 DD09 4000 5000 00000 00000 15496+ TRT 0(10,R4),0(R5)
00C2E8 DD09 4000 5000 00000 00000 15497+ TRT 0(10,R4),0(R5)
00C2EE DD09 4000 5000 00000 00000 15498+ TRT 0(10,R4),0(R5)
00C2F4 DD09 4000 5000 00000 00000 15499+ TRT 0(10,R4),0(R5)
00C2FA DD09 4000 5000 00000 00000 15500+ TRT 0(10,R4),0(R5)
00C300 DD09 4000 5000 00000 00000 15501+ TRT 0(10,R4),0(R5)
00C306 DD09 4000 5000 00000 00000 15502+ TRT 0(10,R4),0(R5)
00C30C DD09 4000 5000 00000 00000 15503+ TRT 0(10,R4),0(R5)
00C312 DD09 4000 5000 00000 00000 15504+ TRT 0(10,R4),0(R5)
00C318 DD09 4000 5000 00000 00000 15505+ TRT 0(10,R4),0(R5)
00C31E DD09 4000 5000 00000 00000 15506+ TRT 0(10,R4),0(R5)
00C324 DD09 4000 5000 00000 00000 15507+ TRT 0(10,R4),0(R5)
00C32A DD09 4000 5000 00000 00000 15508+ TRT 0(10,R4),0(R5)
00C330 DD09 4000 5000 00000 00000 15509+ TRT 0(10,R4),0(R5)
00C336 DD09 4000 5000 00000 00000 15510+ TRT 0(10,R4),0(R5)
00C33C DD09 4000 5000 00000 00000 15511+ TRT 0(10,R4),0(R5)
00C342 DD09 4000 5000 00000 00000 15512+ TRT 0(10,R4),0(R5)
00C348 DD09 4000 5000 00000 00000 15513+ TRT 0(10,R4),0(R5)
00C34E DD09 4000 5000 00000 00000 15514+ TRT 0(10,R4),0(R5)
00C354 DD09 4000 5000 00000 00000 15515+ TRT 0(10,R4),0(R5)
00C35A DD09 4000 5000 00000 00000 15516+ TRT 0(10,R4),0(R5)
00C360 DD09 4000 5000 00000 00000 15517+ TRT 0(10,R4),0(R5)
00C366 DD09 4000 5000 00000 00000 15518+ TRT 0(10,R4),0(R5)
00C36C DD09 4000 5000 00000 00000 15519+ TRT 0(10,R4),0(R5)
00C372 DD09 4000 5000 00000 00000 15520+ TRT 0(10,R4),0(R5)
00C378 DD09 4000 5000 00000 00000 15521+ TRT 0(10,R4),0(R5)
00C37E DD09 4000 5000 00000 00000 15522+ TRT 0(10,R4),0(R5)
00C384 DD09 4000 5000 00000 00000 15523+ TRT 0(10,R4),0(R5)
00C38A DD09 4000 5000 00000 00000 15524+ TRT 0(10,R4),0(R5)
00C390 DD09 4000 5000 00000 00000 15525+ TRT 0(10,R4),0(R5)
00C396 DD09 4000 5000 00000 00000 15526+ TRT 0(10,R4),0(R5)
00C39C DD09 4000 5000 00000 00000 15527+ TRT 0(10,R4),0(R5)
00C3A2 DD09 4000 5000 00000 00000 15528+ TRT 0(10,R4),0(R5)
00C3A8 DD09 4000 5000 00000 00000 15529+ TRT 0(10,R4),0(R5)
PAGE 285
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00C3AE DD09 4000 5000 00000 00000 15530+ TRT 0(10,R4),0(R5)
00C3B4 DD09 4000 5000 00000 00000 15531+ TRT 0(10,R4),0(R5)
00C3BA DD09 4000 5000 00000 00000 15532+ TRT 0(10,R4),0(R5)
00C3C0 DD09 4000 5000 00000 00000 15533+ TRT 0(10,R4),0(R5)
00C3C6 DD09 4000 5000 00000 00000 15534+ TRT 0(10,R4),0(R5)
00C3CC DD09 4000 5000 00000 00000 15535+ TRT 0(10,R4),0(R5)
00C3D2 DD09 4000 5000 00000 00000 15536+ TRT 0(10,R4),0(R5)
00C3D8 DD09 4000 5000 00000 00000 15537+ TRT 0(10,R4),0(R5)
00C3DE DD09 4000 5000 00000 00000 15538+ TRT 0(10,R4),0(R5)
00C3E4 DD09 4000 5000 00000 00000 15539+ TRT 0(10,R4),0(R5)
15540+*
00C3EA 06FB 15541 BCTR R15,R11
15542 TSIMRET
00C3EC 58F0 C268 0C500 15543+ L R15,=A(SAVETST) R15 := current save area
00C3F0 58DF 0004 00004 15544+ L R13,4(R15) get old save area back
00C3F4 98EC D00C 0000C 15545+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00C3F8 07FE 15546+ BR 14 RETURN 02000000
15547 *
00C3FA 0000000000000000 15548 T255V DC 256X'00'
15549 TSIMEND
00C500 15550+ LTORG
00C500 00000458 15551 =A(SAVETST)
00C504 000023E8 15552 =A(TRTBLINV)
0C508 15553+T255TEND EQU *
15554 *
15555 * Test 256 -- TRT m,m (100c,zero) --------------------------
15556 * test TRT with an all-zero function table
15557 *
15558 TSIMBEG T256,300,20,1,C'TRT m,m (100c,zero)'
15559+*
0030C4 15560+TDSCDAT CSECT
0030C8 15561+ DS 0D
15562+*
0030C8 0000C508 15563+T256TDSC DC A(T256) // TENTRY
0030CC 000001B8 15564+ DC A(T256TEND-T256) // TLENGTH
0030D0 0000012C 15565+ DC F'300' // TLRCNT
0030D4 00000014 15566+ DC F'20' // TIGCNT
0030D8 00000001 15567+ DC F'1' // TLTYPE
001575 15568+TEXT CSECT
001575 E3F2F5F6 15569+SPTR1276 DC C'T256'
0030DC 15570+TDSCDAT CSECT
0030DC 15571+ DS 0F
0030DC 04001575 15572+ DC AL1(L'SPTR1276),AL3(SPTR1276)
001579 15573+TEXT CSECT
001579 E3D9E340946B9440 15574+SPTR1277 DC C'TRT m,m (100c,zero)'
0030E0 15575+TDSCDAT CSECT
0030E0 15576+ DS 0F
0030E0 13001579 15577+ DC AL1(L'SPTR1277),AL3(SPTR1277)
15578+*
004B44 15579+TDSCTBL CSECT
04B44 15580+T256TPTR EQU *
004B44 000030C8 15581+ DC A(T256TDSC) enabled test
15582+*
00C508 15583+TCODE CSECT
00C508 15584+ DS 0D ensure double word alignment for test
PAGE 286
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00C508 15585+T256 DS 0H 01650000
00C508 90EC D00C 0000C 15586+ STM 14,12,12(13) SAVE REGISTERS 02950000
00C50C 18CF 15587+ LR R12,R15 base register := entry address
0C508 15588+ USING T256,R12 declare code base register
00C50E 41B0 C026 0C52E 15589+ LA R11,T256L load loop target to R11
00C512 58F0 C1B0 0C6B8 15590+ L R15,=A(SAVETST) R15 := current save area
00C516 50DF 0004 00004 15591+ ST R13,4(R15) set back pointer in current save area
00C51A 182D 15592+ LR R2,R13 remember callers save area
00C51C 18DF 15593+ LR R13,R15 setup current save area
00C51E 50D2 0008 00008 15594+ ST R13,8(R2) set forw pointer in callers save area
00000 15595+ USING TDSC,R1 declare TDSC base register
00C522 58F0 1008 00008 15596+ L R15,TLRCNT load local repeat count to R15
15597+*
15598 *
00C526 5840 C1B4 0C6BC 15599 L R4,=A(TRTBLINV)
00C52A 4150 C0AE 0C5B6 15600 LA R5,T256V
15601 T256L REPINS TRT,(0(100,R4),0(R5)) repeat: TRT 0(100,R4),0(R5)
15602+*
15603+* build from sublist &ALIST a comma separated string &ARGS
15604+*
15605+*
15606+*
15607+*
15608+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
15609+* this allows to transfer the repeat count from last TDSCGEN call
15610+*
15611+*
0C52E 15612+T256L EQU *
15613+*
15614+* write a comment indicating what REPINS does (in case NOGEN in effect)
15615+*
15616+*,// REPINS: do 20 times:
15617+*
15618+* MNOTE requires that ' is doubled for expanded variables
15619+* thus build &MASTR as a copy of '&ARGS with ' doubled
15620+*
15621+*
15622+*,// TRT 0(100,R4),0(R5)
15623+*
15624+* finally generate code: &ICNT copies of &CODE &ARGS
15625+*
00C52E DD63 4000 5000 00000 00000 15626+ TRT 0(100,R4),0(R5)
00C534 DD63 4000 5000 00000 00000 15627+ TRT 0(100,R4),0(R5)
00C53A DD63 4000 5000 00000 00000 15628+ TRT 0(100,R4),0(R5)
00C540 DD63 4000 5000 00000 00000 15629+ TRT 0(100,R4),0(R5)
00C546 DD63 4000 5000 00000 00000 15630+ TRT 0(100,R4),0(R5)
00C54C DD63 4000 5000 00000 00000 15631+ TRT 0(100,R4),0(R5)
00C552 DD63 4000 5000 00000 00000 15632+ TRT 0(100,R4),0(R5)
00C558 DD63 4000 5000 00000 00000 15633+ TRT 0(100,R4),0(R5)
00C55E DD63 4000 5000 00000 00000 15634+ TRT 0(100,R4),0(R5)
00C564 DD63 4000 5000 00000 00000 15635+ TRT 0(100,R4),0(R5)
00C56A DD63 4000 5000 00000 00000 15636+ TRT 0(100,R4),0(R5)
00C570 DD63 4000 5000 00000 00000 15637+ TRT 0(100,R4),0(R5)
00C576 DD63 4000 5000 00000 00000 15638+ TRT 0(100,R4),0(R5)
00C57C DD63 4000 5000 00000 00000 15639+ TRT 0(100,R4),0(R5)
PAGE 287
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00C582 DD63 4000 5000 00000 00000 15640+ TRT 0(100,R4),0(R5)
00C588 DD63 4000 5000 00000 00000 15641+ TRT 0(100,R4),0(R5)
00C58E DD63 4000 5000 00000 00000 15642+ TRT 0(100,R4),0(R5)
00C594 DD63 4000 5000 00000 00000 15643+ TRT 0(100,R4),0(R5)
00C59A DD63 4000 5000 00000 00000 15644+ TRT 0(100,R4),0(R5)
00C5A0 DD63 4000 5000 00000 00000 15645+ TRT 0(100,R4),0(R5)
15646+*
00C5A6 06FB 15647 BCTR R15,R11
15648 TSIMRET
00C5A8 58F0 C1B0 0C6B8 15649+ L R15,=A(SAVETST) R15 := current save area
00C5AC 58DF 0004 00004 15650+ L R13,4(R15) get old save area back
00C5B0 98EC D00C 0000C 15651+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00C5B4 07FE 15652+ BR 14 RETURN 02000000
15653 *
00C5B6 0000000000000000 15654 T256V DC 256X'00'
15655 TSIMEND
00C6B8 15656+ LTORG
00C6B8 00000458 15657 =A(SAVETST)
00C6BC 000023E8 15658 =A(TRTBLINV)
0C6C0 15659+T256TEND EQU *
15660 *
15661 * Test 257 -- TRT m,m (250c,zero) --------------------------
15662 * test TRT with an all-zero function table
15663 *
15664 TSIMBEG T257,130,20,1,C'TRT m,m (250c,zero)'
15665+*
0030E4 15666+TDSCDAT CSECT
0030E8 15667+ DS 0D
15668+*
0030E8 0000C6C0 15669+T257TDSC DC A(T257) // TENTRY
0030EC 000001B8 15670+ DC A(T257TEND-T257) // TLENGTH
0030F0 00000082 15671+ DC F'130' // TLRCNT
0030F4 00000014 15672+ DC F'20' // TIGCNT
0030F8 00000001 15673+ DC F'1' // TLTYPE
00158C 15674+TEXT CSECT
00158C E3F2F5F7 15675+SPTR1288 DC C'T257'
0030FC 15676+TDSCDAT CSECT
0030FC 15677+ DS 0F
0030FC 0400158C 15678+ DC AL1(L'SPTR1288),AL3(SPTR1288)
001590 15679+TEXT CSECT
001590 E3D9E340946B9440 15680+SPTR1289 DC C'TRT m,m (250c,zero)'
003100 15681+TDSCDAT CSECT
003100 15682+ DS 0F
003100 13001590 15683+ DC AL1(L'SPTR1289),AL3(SPTR1289)
15684+*
004B48 15685+TDSCTBL CSECT
04B48 15686+T257TPTR EQU *
004B48 000030E8 15687+ DC A(T257TDSC) enabled test
15688+*
00C6C0 15689+TCODE CSECT
00C6C0 15690+ DS 0D ensure double word alignment for test
00C6C0 15691+T257 DS 0H 01650000
00C6C0 90EC D00C 0000C 15692+ STM 14,12,12(13) SAVE REGISTERS 02950000
00C6C4 18CF 15693+ LR R12,R15 base register := entry address
0C6C0 15694+ USING T257,R12 declare code base register
PAGE 288
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00C6C6 41B0 C026 0C6E6 15695+ LA R11,T257L load loop target to R11
00C6CA 58F0 C1B0 0C870 15696+ L R15,=A(SAVETST) R15 := current save area
00C6CE 50DF 0004 00004 15697+ ST R13,4(R15) set back pointer in current save area
00C6D2 182D 15698+ LR R2,R13 remember callers save area
00C6D4 18DF 15699+ LR R13,R15 setup current save area
00C6D6 50D2 0008 00008 15700+ ST R13,8(R2) set forw pointer in callers save area
00000 15701+ USING TDSC,R1 declare TDSC base register
00C6DA 58F0 1008 00008 15702+ L R15,TLRCNT load local repeat count to R15
15703+*
15704 *
00C6DE 5840 C1B4 0C874 15705 L R4,=A(TRTBLINV)
00C6E2 4150 C0AE 0C76E 15706 LA R5,T257V
15707 T257L REPINS TRT,(0(250,R4),0(R5)) repeat: TRT 0(250,R4),0(R5)
15708+*
15709+* build from sublist &ALIST a comma separated string &ARGS
15710+*
15711+*
15712+*
15713+*
15714+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
15715+* this allows to transfer the repeat count from last TDSCGEN call
15716+*
15717+*
0C6E6 15718+T257L EQU *
15719+*
15720+* write a comment indicating what REPINS does (in case NOGEN in effect)
15721+*
15722+*,// REPINS: do 20 times:
15723+*
15724+* MNOTE requires that ' is doubled for expanded variables
15725+* thus build &MASTR as a copy of '&ARGS with ' doubled
15726+*
15727+*
15728+*,// TRT 0(250,R4),0(R5)
15729+*
15730+* finally generate code: &ICNT copies of &CODE &ARGS
15731+*
00C6E6 DDF9 4000 5000 00000 00000 15732+ TRT 0(250,R4),0(R5)
00C6EC DDF9 4000 5000 00000 00000 15733+ TRT 0(250,R4),0(R5)
00C6F2 DDF9 4000 5000 00000 00000 15734+ TRT 0(250,R4),0(R5)
00C6F8 DDF9 4000 5000 00000 00000 15735+ TRT 0(250,R4),0(R5)
00C6FE DDF9 4000 5000 00000 00000 15736+ TRT 0(250,R4),0(R5)
00C704 DDF9 4000 5000 00000 00000 15737+ TRT 0(250,R4),0(R5)
00C70A DDF9 4000 5000 00000 00000 15738+ TRT 0(250,R4),0(R5)
00C710 DDF9 4000 5000 00000 00000 15739+ TRT 0(250,R4),0(R5)
00C716 DDF9 4000 5000 00000 00000 15740+ TRT 0(250,R4),0(R5)
00C71C DDF9 4000 5000 00000 00000 15741+ TRT 0(250,R4),0(R5)
00C722 DDF9 4000 5000 00000 00000 15742+ TRT 0(250,R4),0(R5)
00C728 DDF9 4000 5000 00000 00000 15743+ TRT 0(250,R4),0(R5)
00C72E DDF9 4000 5000 00000 00000 15744+ TRT 0(250,R4),0(R5)
00C734 DDF9 4000 5000 00000 00000 15745+ TRT 0(250,R4),0(R5)
00C73A DDF9 4000 5000 00000 00000 15746+ TRT 0(250,R4),0(R5)
00C740 DDF9 4000 5000 00000 00000 15747+ TRT 0(250,R4),0(R5)
00C746 DDF9 4000 5000 00000 00000 15748+ TRT 0(250,R4),0(R5)
00C74C DDF9 4000 5000 00000 00000 15749+ TRT 0(250,R4),0(R5)
PAGE 289
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00C752 DDF9 4000 5000 00000 00000 15750+ TRT 0(250,R4),0(R5)
00C758 DDF9 4000 5000 00000 00000 15751+ TRT 0(250,R4),0(R5)
15752+*
00C75E 06FB 15753 BCTR R15,R11
15754 TSIMRET
00C760 58F0 C1B0 0C870 15755+ L R15,=A(SAVETST) R15 := current save area
00C764 58DF 0004 00004 15756+ L R13,4(R15) get old save area back
00C768 98EC D00C 0000C 15757+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00C76C 07FE 15758+ BR 14 RETURN 02000000
15759 *
00C76E 0000000000000000 15760 T257V DC 256X'00'
15761 TSIMEND
00C870 15762+ LTORG
00C870 00000458 15763 =A(SAVETST)
00C874 000023E8 15764 =A(TRTBLINV)
0C878 15765+T257TEND EQU *
15766 *
15767 * Test 258 -- TRT m,m (250c,10b) ---------------------------
15768 * test TRT with a function table with match for 11th source byte
15769 *
15770 TSIMBEG T258,2500,20,1,C'TRT m,m (250c,10b)'
15771+*
003104 15772+TDSCDAT CSECT
003108 15773+ DS 0D
15774+*
003108 0000C878 15775+T258TDSC DC A(T258) // TENTRY
00310C 000001C0 15776+ DC A(T258TEND-T258) // TLENGTH
003110 000009C4 15777+ DC F'2500' // TLRCNT
003114 00000014 15778+ DC F'20' // TIGCNT
003118 00000001 15779+ DC F'1' // TLTYPE
0015A3 15780+TEXT CSECT
0015A3 E3F2F5F8 15781+SPTR1300 DC C'T258'
00311C 15782+TDSCDAT CSECT
00311C 15783+ DS 0F
00311C 040015A3 15784+ DC AL1(L'SPTR1300),AL3(SPTR1300)
0015A7 15785+TEXT CSECT
0015A7 E3D9E340946B9440 15786+SPTR1301 DC C'TRT m,m (250c,10b)'
003120 15787+TDSCDAT CSECT
003120 15788+ DS 0F
003120 120015A7 15789+ DC AL1(L'SPTR1301),AL3(SPTR1301)
15790+*
004B4C 15791+TDSCTBL CSECT
04B4C 15792+T258TPTR EQU *
004B4C 00003108 15793+ DC A(T258TDSC) enabled test
15794+*
00C878 15795+TCODE CSECT
00C878 15796+ DS 0D ensure double word alignment for test
00C878 15797+T258 DS 0H 01650000
00C878 90EC D00C 0000C 15798+ STM 14,12,12(13) SAVE REGISTERS 02950000
00C87C 18CF 15799+ LR R12,R15 base register := entry address
0C878 15800+ USING T258,R12 declare code base register
00C87E 41B0 C02A 0C8A2 15801+ LA R11,T258L load loop target to R11
00C882 58F0 C1B8 0CA30 15802+ L R15,=A(SAVETST) R15 := current save area
00C886 50DF 0004 00004 15803+ ST R13,4(R15) set back pointer in current save area
00C88A 182D 15804+ LR R2,R13 remember callers save area
PAGE 290
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00C88C 18DF 15805+ LR R13,R15 setup current save area
00C88E 50D2 0008 00008 15806+ ST R13,8(R2) set forw pointer in callers save area
00000 15807+ USING TDSC,R1 declare TDSC base register
00C892 58F0 1008 00008 15808+ L R15,TLRCNT load local repeat count to R15
15809+*
15810 *
00C896 5840 C1BC 0CA34 15811 L R4,=A(TRTBLINV)
00C89A 4150 C0B2 0C92A 15812 LA R5,T258V
00C89E 92FF 50F5 000F5 15813 MVI 245(R5),X'FF' mark TRTBLINV[10]=0xf5=245
15814 T258L REPINS TRT,(0(250,R4),0(R5)) repeat: TRT 0(250,R4),0(R5)
15815+*
15816+* build from sublist &ALIST a comma separated string &ARGS
15817+*
15818+*
15819+*
15820+*
15821+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
15822+* this allows to transfer the repeat count from last TDSCGEN call
15823+*
15824+*
0C8A2 15825+T258L EQU *
15826+*
15827+* write a comment indicating what REPINS does (in case NOGEN in effect)
15828+*
15829+*,// REPINS: do 20 times:
15830+*
15831+* MNOTE requires that ' is doubled for expanded variables
15832+* thus build &MASTR as a copy of '&ARGS with ' doubled
15833+*
15834+*
15835+*,// TRT 0(250,R4),0(R5)
15836+*
15837+* finally generate code: &ICNT copies of &CODE &ARGS
15838+*
00C8A2 DDF9 4000 5000 00000 00000 15839+ TRT 0(250,R4),0(R5)
00C8A8 DDF9 4000 5000 00000 00000 15840+ TRT 0(250,R4),0(R5)
00C8AE DDF9 4000 5000 00000 00000 15841+ TRT 0(250,R4),0(R5)
00C8B4 DDF9 4000 5000 00000 00000 15842+ TRT 0(250,R4),0(R5)
00C8BA DDF9 4000 5000 00000 00000 15843+ TRT 0(250,R4),0(R5)
00C8C0 DDF9 4000 5000 00000 00000 15844+ TRT 0(250,R4),0(R5)
00C8C6 DDF9 4000 5000 00000 00000 15845+ TRT 0(250,R4),0(R5)
00C8CC DDF9 4000 5000 00000 00000 15846+ TRT 0(250,R4),0(R5)
00C8D2 DDF9 4000 5000 00000 00000 15847+ TRT 0(250,R4),0(R5)
00C8D8 DDF9 4000 5000 00000 00000 15848+ TRT 0(250,R4),0(R5)
00C8DE DDF9 4000 5000 00000 00000 15849+ TRT 0(250,R4),0(R5)
00C8E4 DDF9 4000 5000 00000 00000 15850+ TRT 0(250,R4),0(R5)
00C8EA DDF9 4000 5000 00000 00000 15851+ TRT 0(250,R4),0(R5)
00C8F0 DDF9 4000 5000 00000 00000 15852+ TRT 0(250,R4),0(R5)
00C8F6 DDF9 4000 5000 00000 00000 15853+ TRT 0(250,R4),0(R5)
00C8FC DDF9 4000 5000 00000 00000 15854+ TRT 0(250,R4),0(R5)
00C902 DDF9 4000 5000 00000 00000 15855+ TRT 0(250,R4),0(R5)
00C908 DDF9 4000 5000 00000 00000 15856+ TRT 0(250,R4),0(R5)
00C90E DDF9 4000 5000 00000 00000 15857+ TRT 0(250,R4),0(R5)
00C914 DDF9 4000 5000 00000 00000 15858+ TRT 0(250,R4),0(R5)
15859+*
PAGE 291
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00C91A 06FB 15860 BCTR R15,R11
15861 TSIMRET
00C91C 58F0 C1B8 0CA30 15862+ L R15,=A(SAVETST) R15 := current save area
00C920 58DF 0004 00004 15863+ L R13,4(R15) get old save area back
00C924 98EC D00C 0000C 15864+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00C928 07FE 15865+ BR 14 RETURN 02000000
15866 *
00C92A 0000000000000000 15867 T258V DC 256X'00'
15868 TSIMEND
00CA30 15869+ LTORG
00CA30 00000458 15870 =A(SAVETST)
00CA34 000023E8 15871 =A(TRTBLINV)
0CA38 15872+T258TEND EQU *
15873 *
15874 * Test 259 -- TRT m,m (250c,100b) --------------------------
15875 * test TRT with a function table with match for 101th source byte
15876 *
15877 TSIMBEG T259,300,20,1,C'TRT m,m (250c,100b)'
15878+*
003124 15879+TDSCDAT CSECT
003128 15880+ DS 0D
15881+*
003128 0000CA38 15882+T259TDSC DC A(T259) // TENTRY
00312C 000001C0 15883+ DC A(T259TEND-T259) // TLENGTH
003130 0000012C 15884+ DC F'300' // TLRCNT
003134 00000014 15885+ DC F'20' // TIGCNT
003138 00000001 15886+ DC F'1' // TLTYPE
0015B9 15887+TEXT CSECT
0015B9 E3F2F5F9 15888+SPTR1312 DC C'T259'
00313C 15889+TDSCDAT CSECT
00313C 15890+ DS 0F
00313C 040015B9 15891+ DC AL1(L'SPTR1312),AL3(SPTR1312)
0015BD 15892+TEXT CSECT
0015BD E3D9E340946B9440 15893+SPTR1313 DC C'TRT m,m (250c,100b)'
003140 15894+TDSCDAT CSECT
003140 15895+ DS 0F
003140 130015BD 15896+ DC AL1(L'SPTR1313),AL3(SPTR1313)
15897+*
004B50 15898+TDSCTBL CSECT
04B50 15899+T259TPTR EQU *
004B50 00003128 15900+ DC A(T259TDSC) enabled test
15901+*
00CA38 15902+TCODE CSECT
00CA38 15903+ DS 0D ensure double word alignment for test
00CA38 15904+T259 DS 0H 01650000
00CA38 90EC D00C 0000C 15905+ STM 14,12,12(13) SAVE REGISTERS 02950000
00CA3C 18CF 15906+ LR R12,R15 base register := entry address
0CA38 15907+ USING T259,R12 declare code base register
00CA3E 41B0 C02A 0CA62 15908+ LA R11,T259L load loop target to R11
00CA42 58F0 C1B8 0CBF0 15909+ L R15,=A(SAVETST) R15 := current save area
00CA46 50DF 0004 00004 15910+ ST R13,4(R15) set back pointer in current save area
00CA4A 182D 15911+ LR R2,R13 remember callers save area
00CA4C 18DF 15912+ LR R13,R15 setup current save area
00CA4E 50D2 0008 00008 15913+ ST R13,8(R2) set forw pointer in callers save area
00000 15914+ USING TDSC,R1 declare TDSC base register
PAGE 292
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00CA52 58F0 1008 00008 15915+ L R15,TLRCNT load local repeat count to R15
15916+*
15917 *
00CA56 5840 C1BC 0CBF4 15918 L R4,=A(TRTBLINV)
00CA5A 4150 C0B2 0CAEA 15919 LA R5,T259V
00CA5E 92FF 509B 0009B 15920 MVI 155(R5),X'FF' mark TRTBLINV[100]=0x9b=155
15921 T259L REPINS TRT,(0(250,R4),0(R5)) repeat: TRT 0(250,R4),0(R5)
15922+*
15923+* build from sublist &ALIST a comma separated string &ARGS
15924+*
15925+*
15926+*
15927+*
15928+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
15929+* this allows to transfer the repeat count from last TDSCGEN call
15930+*
15931+*
0CA62 15932+T259L EQU *
15933+*
15934+* write a comment indicating what REPINS does (in case NOGEN in effect)
15935+*
15936+*,// REPINS: do 20 times:
15937+*
15938+* MNOTE requires that ' is doubled for expanded variables
15939+* thus build &MASTR as a copy of '&ARGS with ' doubled
15940+*
15941+*
15942+*,// TRT 0(250,R4),0(R5)
15943+*
15944+* finally generate code: &ICNT copies of &CODE &ARGS
15945+*
00CA62 DDF9 4000 5000 00000 00000 15946+ TRT 0(250,R4),0(R5)
00CA68 DDF9 4000 5000 00000 00000 15947+ TRT 0(250,R4),0(R5)
00CA6E DDF9 4000 5000 00000 00000 15948+ TRT 0(250,R4),0(R5)
00CA74 DDF9 4000 5000 00000 00000 15949+ TRT 0(250,R4),0(R5)
00CA7A DDF9 4000 5000 00000 00000 15950+ TRT 0(250,R4),0(R5)
00CA80 DDF9 4000 5000 00000 00000 15951+ TRT 0(250,R4),0(R5)
00CA86 DDF9 4000 5000 00000 00000 15952+ TRT 0(250,R4),0(R5)
00CA8C DDF9 4000 5000 00000 00000 15953+ TRT 0(250,R4),0(R5)
00CA92 DDF9 4000 5000 00000 00000 15954+ TRT 0(250,R4),0(R5)
00CA98 DDF9 4000 5000 00000 00000 15955+ TRT 0(250,R4),0(R5)
00CA9E DDF9 4000 5000 00000 00000 15956+ TRT 0(250,R4),0(R5)
00CAA4 DDF9 4000 5000 00000 00000 15957+ TRT 0(250,R4),0(R5)
00CAAA DDF9 4000 5000 00000 00000 15958+ TRT 0(250,R4),0(R5)
00CAB0 DDF9 4000 5000 00000 00000 15959+ TRT 0(250,R4),0(R5)
00CAB6 DDF9 4000 5000 00000 00000 15960+ TRT 0(250,R4),0(R5)
00CABC DDF9 4000 5000 00000 00000 15961+ TRT 0(250,R4),0(R5)
00CAC2 DDF9 4000 5000 00000 00000 15962+ TRT 0(250,R4),0(R5)
00CAC8 DDF9 4000 5000 00000 00000 15963+ TRT 0(250,R4),0(R5)
00CACE DDF9 4000 5000 00000 00000 15964+ TRT 0(250,R4),0(R5)
00CAD4 DDF9 4000 5000 00000 00000 15965+ TRT 0(250,R4),0(R5)
15966+*
00CADA 06FB 15967 BCTR R15,R11
15968 TSIMRET
00CADC 58F0 C1B8 0CBF0 15969+ L R15,=A(SAVETST) R15 := current save area
PAGE 293
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00CAE0 58DF 0004 00004 15970+ L R13,4(R15) get old save area back
00CAE4 98EC D00C 0000C 15971+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00CAE8 07FE 15972+ BR 14 RETURN 02000000
15973 *
00CAEA 0000000000000000 15974 T259V DC 256X'00'
15975 TSIMEND
00CBF0 15976+ LTORG
00CBF0 00000458 15977 =A(SAVETST)
00CBF4 000023E8 15978 =A(TRTBLINV)
0CBF8 15979+T259TEND EQU *
15980 *
15981 * Test 26x -- compare ======================================
15982 *
15983 * Test 260 -- CR R,R ---------------------------------------
15984 *
15985 TSIMBEG T260,17000,100,1,C'CR R,R'
15986+*
003144 15987+TDSCDAT CSECT
003148 15988+ DS 0D
15989+*
003148 0000CBF8 15990+T260TDSC DC A(T260) // TENTRY
00314C 00000104 15991+ DC A(T260TEND-T260) // TLENGTH
003150 00004268 15992+ DC F'17000' // TLRCNT
003154 00000064 15993+ DC F'100' // TIGCNT
003158 00000001 15994+ DC F'1' // TLTYPE
0015D0 15995+TEXT CSECT
0015D0 E3F2F6F0 15996+SPTR1324 DC C'T260'
00315C 15997+TDSCDAT CSECT
00315C 15998+ DS 0F
00315C 040015D0 15999+ DC AL1(L'SPTR1324),AL3(SPTR1324)
0015D4 16000+TEXT CSECT
0015D4 C3D940D96BD9 16001+SPTR1325 DC C'CR R,R'
003160 16002+TDSCDAT CSECT
003160 16003+ DS 0F
003160 060015D4 16004+ DC AL1(L'SPTR1325),AL3(SPTR1325)
16005+*
004B54 16006+TDSCTBL CSECT
04B54 16007+T260TPTR EQU *
004B54 00003148 16008+ DC A(T260TDSC) enabled test
16009+*
00CBF8 16010+TCODE CSECT
00CBF8 16011+ DS 0D ensure double word alignment for test
00CBF8 16012+T260 DS 0H 01650000
00CBF8 90EC D00C 0000C 16013+ STM 14,12,12(13) SAVE REGISTERS 02950000
00CBFC 18CF 16014+ LR R12,R15 base register := entry address
0CBF8 16015+ USING T260,R12 declare code base register
00CBFE 41B0 C024 0CC1C 16016+ LA R11,T260L load loop target to R11
00CC02 58F0 C100 0CCF8 16017+ L R15,=A(SAVETST) R15 := current save area
00CC06 50DF 0004 00004 16018+ ST R13,4(R15) set back pointer in current save area
00CC0A 182D 16019+ LR R2,R13 remember callers save area
00CC0C 18DF 16020+ LR R13,R15 setup current save area
00CC0E 50D2 0008 00008 16021+ ST R13,8(R2) set forw pointer in callers save area
00000 16022+ USING TDSC,R1 declare TDSC base register
00CC12 58F0 1008 00008 16023+ L R15,TLRCNT load local repeat count to R15
16024+*
PAGE 294
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
16025 *
00CC16 1722 16026 XR R2,R2
00CC18 4130 0001 00001 16027 LA R3,1
16028 T260L REPINS CR,(R2,R3) repeat: CR R2,R3
16029+*
16030+* build from sublist &ALIST a comma separated string &ARGS
16031+*
16032+*
16033+*
16034+*
16035+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
16036+* this allows to transfer the repeat count from last TDSCGEN call
16037+*
16038+*
0CC1C 16039+T260L EQU *
16040+*
16041+* write a comment indicating what REPINS does (in case NOGEN in effect)
16042+*
16043+*,// REPINS: do 100 times:
16044+*
16045+* MNOTE requires that ' is doubled for expanded variables
16046+* thus build &MASTR as a copy of '&ARGS with ' doubled
16047+*
16048+*
16049+*,// CR R2,R3
16050+*
16051+* finally generate code: &ICNT copies of &CODE &ARGS
16052+*
00CC1C 1923 16053+ CR R2,R3
00CC1E 1923 16054+ CR R2,R3
00CC20 1923 16055+ CR R2,R3
00CC22 1923 16056+ CR R2,R3
00CC24 1923 16057+ CR R2,R3
00CC26 1923 16058+ CR R2,R3
00CC28 1923 16059+ CR R2,R3
00CC2A 1923 16060+ CR R2,R3
00CC2C 1923 16061+ CR R2,R3
00CC2E 1923 16062+ CR R2,R3
00CC30 1923 16063+ CR R2,R3
00CC32 1923 16064+ CR R2,R3
00CC34 1923 16065+ CR R2,R3
00CC36 1923 16066+ CR R2,R3
00CC38 1923 16067+ CR R2,R3
00CC3A 1923 16068+ CR R2,R3
00CC3C 1923 16069+ CR R2,R3
00CC3E 1923 16070+ CR R2,R3
00CC40 1923 16071+ CR R2,R3
00CC42 1923 16072+ CR R2,R3
00CC44 1923 16073+ CR R2,R3
00CC46 1923 16074+ CR R2,R3
00CC48 1923 16075+ CR R2,R3
00CC4A 1923 16076+ CR R2,R3
00CC4C 1923 16077+ CR R2,R3
00CC4E 1923 16078+ CR R2,R3
00CC50 1923 16079+ CR R2,R3
PAGE 295
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00CC52 1923 16080+ CR R2,R3
00CC54 1923 16081+ CR R2,R3
00CC56 1923 16082+ CR R2,R3
00CC58 1923 16083+ CR R2,R3
00CC5A 1923 16084+ CR R2,R3
00CC5C 1923 16085+ CR R2,R3
00CC5E 1923 16086+ CR R2,R3
00CC60 1923 16087+ CR R2,R3
00CC62 1923 16088+ CR R2,R3
00CC64 1923 16089+ CR R2,R3
00CC66 1923 16090+ CR R2,R3
00CC68 1923 16091+ CR R2,R3
00CC6A 1923 16092+ CR R2,R3
00CC6C 1923 16093+ CR R2,R3
00CC6E 1923 16094+ CR R2,R3
00CC70 1923 16095+ CR R2,R3
00CC72 1923 16096+ CR R2,R3
00CC74 1923 16097+ CR R2,R3
00CC76 1923 16098+ CR R2,R3
00CC78 1923 16099+ CR R2,R3
00CC7A 1923 16100+ CR R2,R3
00CC7C 1923 16101+ CR R2,R3
00CC7E 1923 16102+ CR R2,R3
00CC80 1923 16103+ CR R2,R3
00CC82 1923 16104+ CR R2,R3
00CC84 1923 16105+ CR R2,R3
00CC86 1923 16106+ CR R2,R3
00CC88 1923 16107+ CR R2,R3
00CC8A 1923 16108+ CR R2,R3
00CC8C 1923 16109+ CR R2,R3
00CC8E 1923 16110+ CR R2,R3
00CC90 1923 16111+ CR R2,R3
00CC92 1923 16112+ CR R2,R3
00CC94 1923 16113+ CR R2,R3
00CC96 1923 16114+ CR R2,R3
00CC98 1923 16115+ CR R2,R3
00CC9A 1923 16116+ CR R2,R3
00CC9C 1923 16117+ CR R2,R3
00CC9E 1923 16118+ CR R2,R3
00CCA0 1923 16119+ CR R2,R3
00CCA2 1923 16120+ CR R2,R3
00CCA4 1923 16121+ CR R2,R3
00CCA6 1923 16122+ CR R2,R3
00CCA8 1923 16123+ CR R2,R3
00CCAA 1923 16124+ CR R2,R3
00CCAC 1923 16125+ CR R2,R3
00CCAE 1923 16126+ CR R2,R3
00CCB0 1923 16127+ CR R2,R3
00CCB2 1923 16128+ CR R2,R3
00CCB4 1923 16129+ CR R2,R3
00CCB6 1923 16130+ CR R2,R3
00CCB8 1923 16131+ CR R2,R3
00CCBA 1923 16132+ CR R2,R3
00CCBC 1923 16133+ CR R2,R3
00CCBE 1923 16134+ CR R2,R3
PAGE 296
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00CCC0 1923 16135+ CR R2,R3
00CCC2 1923 16136+ CR R2,R3
00CCC4 1923 16137+ CR R2,R3
00CCC6 1923 16138+ CR R2,R3
00CCC8 1923 16139+ CR R2,R3
00CCCA 1923 16140+ CR R2,R3
00CCCC 1923 16141+ CR R2,R3
00CCCE 1923 16142+ CR R2,R3
00CCD0 1923 16143+ CR R2,R3
00CCD2 1923 16144+ CR R2,R3
00CCD4 1923 16145+ CR R2,R3
00CCD6 1923 16146+ CR R2,R3
00CCD8 1923 16147+ CR R2,R3
00CCDA 1923 16148+ CR R2,R3
00CCDC 1923 16149+ CR R2,R3
00CCDE 1923 16150+ CR R2,R3
00CCE0 1923 16151+ CR R2,R3
00CCE2 1923 16152+ CR R2,R3
16153+*
00CCE4 06FB 16154 BCTR R15,R11
16155 TSIMRET
00CCE6 58F0 C100 0CCF8 16156+ L R15,=A(SAVETST) R15 := current save area
00CCEA 58DF 0004 00004 16157+ L R13,4(R15) get old save area back
00CCEE 98EC D00C 0000C 16158+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00CCF2 07FE 16159+ BR 14 RETURN 02000000
16160 TSIMEND
00CCF8 16161+ LTORG
00CCF8 00000458 16162 =A(SAVETST)
0CCFC 16163+T260TEND EQU *
16164 *
16165 * Test 261 -- C R,m ----------------------------------------
16166 *
16167 TSIMBEG T261,11000,50,1,C'C R,m'
16168+*
003164 16169+TDSCDAT CSECT
003168 16170+ DS 0D
16171+*
003168 0000CD00 16172+T261TDSC DC A(T261) // TENTRY
00316C 00000100 16173+ DC A(T261TEND-T261) // TLENGTH
003170 00002AF8 16174+ DC F'11000' // TLRCNT
003174 00000032 16175+ DC F'50' // TIGCNT
003178 00000001 16176+ DC F'1' // TLTYPE
0015DA 16177+TEXT CSECT
0015DA E3F2F6F1 16178+SPTR1336 DC C'T261'
00317C 16179+TDSCDAT CSECT
00317C 16180+ DS 0F
00317C 040015DA 16181+ DC AL1(L'SPTR1336),AL3(SPTR1336)
0015DE 16182+TEXT CSECT
0015DE C340D96B94 16183+SPTR1337 DC C'C R,m'
003180 16184+TDSCDAT CSECT
003180 16185+ DS 0F
003180 050015DE 16186+ DC AL1(L'SPTR1337),AL3(SPTR1337)
16187+*
004B58 16188+TDSCTBL CSECT
04B58 16189+T261TPTR EQU *
PAGE 297
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004B58 00003168 16190+ DC A(T261TDSC) enabled test
16191+*
00CCFC 16192+TCODE CSECT
00CD00 16193+ DS 0D ensure double word alignment for test
00CD00 16194+T261 DS 0H 01650000
00CD00 90EC D00C 0000C 16195+ STM 14,12,12(13) SAVE REGISTERS 02950000
00CD04 18CF 16196+ LR R12,R15 base register := entry address
0CD00 16197+ USING T261,R12 declare code base register
00CD06 41B0 C020 0CD20 16198+ LA R11,T261L load loop target to R11
00CD0A 58F0 C0F8 0CDF8 16199+ L R15,=A(SAVETST) R15 := current save area
00CD0E 50DF 0004 00004 16200+ ST R13,4(R15) set back pointer in current save area
00CD12 182D 16201+ LR R2,R13 remember callers save area
00CD14 18DF 16202+ LR R13,R15 setup current save area
00CD16 50D2 0008 00008 16203+ ST R13,8(R2) set forw pointer in callers save area
00000 16204+ USING TDSC,R1 declare TDSC base register
00CD1A 58F0 1008 00008 16205+ L R15,TLRCNT load local repeat count to R15
16206+*
16207 *
00CD1E 1722 16208 XR R2,R2
16209 T261L REPINS C,(R2,=F'1') repeat: C R2,=F'1'
16210+*
16211+* build from sublist &ALIST a comma separated string &ARGS
16212+*
16213+*
16214+*
16215+*
16216+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
16217+* this allows to transfer the repeat count from last TDSCGEN call
16218+*
16219+*
0CD20 16220+T261L EQU *
16221+*
16222+* write a comment indicating what REPINS does (in case NOGEN in effect)
16223+*
16224+*,// REPINS: do 50 times:
16225+*
16226+* MNOTE requires that ' is doubled for expanded variables
16227+* thus build &MASTR as a copy of '&ARGS with ' doubled
16228+*
16229+*
16230+*,// C R2,=F'1'
16231+*
16232+* finally generate code: &ICNT copies of &CODE &ARGS
16233+*
00CD20 5920 C0FC 0CDFC 16234+ C R2,=F'1'
00CD24 5920 C0FC 0CDFC 16235+ C R2,=F'1'
00CD28 5920 C0FC 0CDFC 16236+ C R2,=F'1'
00CD2C 5920 C0FC 0CDFC 16237+ C R2,=F'1'
00CD30 5920 C0FC 0CDFC 16238+ C R2,=F'1'
00CD34 5920 C0FC 0CDFC 16239+ C R2,=F'1'
00CD38 5920 C0FC 0CDFC 16240+ C R2,=F'1'
00CD3C 5920 C0FC 0CDFC 16241+ C R2,=F'1'
00CD40 5920 C0FC 0CDFC 16242+ C R2,=F'1'
00CD44 5920 C0FC 0CDFC 16243+ C R2,=F'1'
00CD48 5920 C0FC 0CDFC 16244+ C R2,=F'1'
PAGE 298
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00CD4C 5920 C0FC 0CDFC 16245+ C R2,=F'1'
00CD50 5920 C0FC 0CDFC 16246+ C R2,=F'1'
00CD54 5920 C0FC 0CDFC 16247+ C R2,=F'1'
00CD58 5920 C0FC 0CDFC 16248+ C R2,=F'1'
00CD5C 5920 C0FC 0CDFC 16249+ C R2,=F'1'
00CD60 5920 C0FC 0CDFC 16250+ C R2,=F'1'
00CD64 5920 C0FC 0CDFC 16251+ C R2,=F'1'
00CD68 5920 C0FC 0CDFC 16252+ C R2,=F'1'
00CD6C 5920 C0FC 0CDFC 16253+ C R2,=F'1'
00CD70 5920 C0FC 0CDFC 16254+ C R2,=F'1'
00CD74 5920 C0FC 0CDFC 16255+ C R2,=F'1'
00CD78 5920 C0FC 0CDFC 16256+ C R2,=F'1'
00CD7C 5920 C0FC 0CDFC 16257+ C R2,=F'1'
00CD80 5920 C0FC 0CDFC 16258+ C R2,=F'1'
00CD84 5920 C0FC 0CDFC 16259+ C R2,=F'1'
00CD88 5920 C0FC 0CDFC 16260+ C R2,=F'1'
00CD8C 5920 C0FC 0CDFC 16261+ C R2,=F'1'
00CD90 5920 C0FC 0CDFC 16262+ C R2,=F'1'
00CD94 5920 C0FC 0CDFC 16263+ C R2,=F'1'
00CD98 5920 C0FC 0CDFC 16264+ C R2,=F'1'
00CD9C 5920 C0FC 0CDFC 16265+ C R2,=F'1'
00CDA0 5920 C0FC 0CDFC 16266+ C R2,=F'1'
00CDA4 5920 C0FC 0CDFC 16267+ C R2,=F'1'
00CDA8 5920 C0FC 0CDFC 16268+ C R2,=F'1'
00CDAC 5920 C0FC 0CDFC 16269+ C R2,=F'1'
00CDB0 5920 C0FC 0CDFC 16270+ C R2,=F'1'
00CDB4 5920 C0FC 0CDFC 16271+ C R2,=F'1'
00CDB8 5920 C0FC 0CDFC 16272+ C R2,=F'1'
00CDBC 5920 C0FC 0CDFC 16273+ C R2,=F'1'
00CDC0 5920 C0FC 0CDFC 16274+ C R2,=F'1'
00CDC4 5920 C0FC 0CDFC 16275+ C R2,=F'1'
00CDC8 5920 C0FC 0CDFC 16276+ C R2,=F'1'
00CDCC 5920 C0FC 0CDFC 16277+ C R2,=F'1'
00CDD0 5920 C0FC 0CDFC 16278+ C R2,=F'1'
00CDD4 5920 C0FC 0CDFC 16279+ C R2,=F'1'
00CDD8 5920 C0FC 0CDFC 16280+ C R2,=F'1'
00CDDC 5920 C0FC 0CDFC 16281+ C R2,=F'1'
00CDE0 5920 C0FC 0CDFC 16282+ C R2,=F'1'
00CDE4 5920 C0FC 0CDFC 16283+ C R2,=F'1'
16284+*
00CDE8 06FB 16285 BCTR R15,R11
16286 TSIMRET
00CDEA 58F0 C0F8 0CDF8 16287+ L R15,=A(SAVETST) R15 := current save area
00CDEE 58DF 0004 00004 16288+ L R13,4(R15) get old save area back
00CDF2 98EC D00C 0000C 16289+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00CDF6 07FE 16290+ BR 14 RETURN 02000000
16291 TSIMEND
00CDF8 16292+ LTORG
00CDF8 00000458 16293 =A(SAVETST)
00CDFC 00000001 16294 =F'1'
0CE00 16295+T261TEND EQU *
16296 *
16297 * Test 262 -- CH R,m ---------------------------------------
16298 TSIMBEG T262,12000,50,1,C'CH R,m'
16299+*
PAGE 299
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003184 16300+TDSCDAT CSECT
003188 16301+ DS 0D
16302+*
003188 0000CE00 16303+T262TDSC DC A(T262) // TENTRY
00318C 000000FE 16304+ DC A(T262TEND-T262) // TLENGTH
003190 00002EE0 16305+ DC F'12000' // TLRCNT
003194 00000032 16306+ DC F'50' // TIGCNT
003198 00000001 16307+ DC F'1' // TLTYPE
0015E3 16308+TEXT CSECT
0015E3 E3F2F6F2 16309+SPTR1348 DC C'T262'
00319C 16310+TDSCDAT CSECT
00319C 16311+ DS 0F
00319C 040015E3 16312+ DC AL1(L'SPTR1348),AL3(SPTR1348)
0015E7 16313+TEXT CSECT
0015E7 C3C840D96B94 16314+SPTR1349 DC C'CH R,m'
0031A0 16315+TDSCDAT CSECT
0031A0 16316+ DS 0F
0031A0 060015E7 16317+ DC AL1(L'SPTR1349),AL3(SPTR1349)
16318+*
004B5C 16319+TDSCTBL CSECT
04B5C 16320+T262TPTR EQU *
004B5C 00003188 16321+ DC A(T262TDSC) enabled test
16322+*
00CE00 16323+TCODE CSECT
00CE00 16324+ DS 0D ensure double word alignment for test
00CE00 16325+T262 DS 0H 01650000
00CE00 90EC D00C 0000C 16326+ STM 14,12,12(13) SAVE REGISTERS 02950000
00CE04 18CF 16327+ LR R12,R15 base register := entry address
0CE00 16328+ USING T262,R12 declare code base register
00CE06 41B0 C020 0CE20 16329+ LA R11,T262L load loop target to R11
00CE0A 58F0 C0F8 0CEF8 16330+ L R15,=A(SAVETST) R15 := current save area
00CE0E 50DF 0004 00004 16331+ ST R13,4(R15) set back pointer in current save area
00CE12 182D 16332+ LR R2,R13 remember callers save area
00CE14 18DF 16333+ LR R13,R15 setup current save area
00CE16 50D2 0008 00008 16334+ ST R13,8(R2) set forw pointer in callers save area
00000 16335+ USING TDSC,R1 declare TDSC base register
00CE1A 58F0 1008 00008 16336+ L R15,TLRCNT load local repeat count to R15
16337+*
16338 *
00CE1E 1722 16339 XR R2,R2
16340 T262L REPINS CH,(R2,=H'1') repeat: CH R2,=H'1'
16341+*
16342+* build from sublist &ALIST a comma separated string &ARGS
16343+*
16344+*
16345+*
16346+*
16347+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
16348+* this allows to transfer the repeat count from last TDSCGEN call
16349+*
16350+*
0CE20 16351+T262L EQU *
16352+*
16353+* write a comment indicating what REPINS does (in case NOGEN in effect)
16354+*
PAGE 300
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
16355+*,// REPINS: do 50 times:
16356+*
16357+* MNOTE requires that ' is doubled for expanded variables
16358+* thus build &MASTR as a copy of '&ARGS with ' doubled
16359+*
16360+*
16361+*,// CH R2,=H'1'
16362+*
16363+* finally generate code: &ICNT copies of &CODE &ARGS
16364+*
00CE20 4920 C0FC 0CEFC 16365+ CH R2,=H'1'
00CE24 4920 C0FC 0CEFC 16366+ CH R2,=H'1'
00CE28 4920 C0FC 0CEFC 16367+ CH R2,=H'1'
00CE2C 4920 C0FC 0CEFC 16368+ CH R2,=H'1'
00CE30 4920 C0FC 0CEFC 16369+ CH R2,=H'1'
00CE34 4920 C0FC 0CEFC 16370+ CH R2,=H'1'
00CE38 4920 C0FC 0CEFC 16371+ CH R2,=H'1'
00CE3C 4920 C0FC 0CEFC 16372+ CH R2,=H'1'
00CE40 4920 C0FC 0CEFC 16373+ CH R2,=H'1'
00CE44 4920 C0FC 0CEFC 16374+ CH R2,=H'1'
00CE48 4920 C0FC 0CEFC 16375+ CH R2,=H'1'
00CE4C 4920 C0FC 0CEFC 16376+ CH R2,=H'1'
00CE50 4920 C0FC 0CEFC 16377+ CH R2,=H'1'
00CE54 4920 C0FC 0CEFC 16378+ CH R2,=H'1'
00CE58 4920 C0FC 0CEFC 16379+ CH R2,=H'1'
00CE5C 4920 C0FC 0CEFC 16380+ CH R2,=H'1'
00CE60 4920 C0FC 0CEFC 16381+ CH R2,=H'1'
00CE64 4920 C0FC 0CEFC 16382+ CH R2,=H'1'
00CE68 4920 C0FC 0CEFC 16383+ CH R2,=H'1'
00CE6C 4920 C0FC 0CEFC 16384+ CH R2,=H'1'
00CE70 4920 C0FC 0CEFC 16385+ CH R2,=H'1'
00CE74 4920 C0FC 0CEFC 16386+ CH R2,=H'1'
00CE78 4920 C0FC 0CEFC 16387+ CH R2,=H'1'
00CE7C 4920 C0FC 0CEFC 16388+ CH R2,=H'1'
00CE80 4920 C0FC 0CEFC 16389+ CH R2,=H'1'
00CE84 4920 C0FC 0CEFC 16390+ CH R2,=H'1'
00CE88 4920 C0FC 0CEFC 16391+ CH R2,=H'1'
00CE8C 4920 C0FC 0CEFC 16392+ CH R2,=H'1'
00CE90 4920 C0FC 0CEFC 16393+ CH R2,=H'1'
00CE94 4920 C0FC 0CEFC 16394+ CH R2,=H'1'
00CE98 4920 C0FC 0CEFC 16395+ CH R2,=H'1'
00CE9C 4920 C0FC 0CEFC 16396+ CH R2,=H'1'
00CEA0 4920 C0FC 0CEFC 16397+ CH R2,=H'1'
00CEA4 4920 C0FC 0CEFC 16398+ CH R2,=H'1'
00CEA8 4920 C0FC 0CEFC 16399+ CH R2,=H'1'
00CEAC 4920 C0FC 0CEFC 16400+ CH R2,=H'1'
00CEB0 4920 C0FC 0CEFC 16401+ CH R2,=H'1'
00CEB4 4920 C0FC 0CEFC 16402+ CH R2,=H'1'
00CEB8 4920 C0FC 0CEFC 16403+ CH R2,=H'1'
00CEBC 4920 C0FC 0CEFC 16404+ CH R2,=H'1'
00CEC0 4920 C0FC 0CEFC 16405+ CH R2,=H'1'
00CEC4 4920 C0FC 0CEFC 16406+ CH R2,=H'1'
00CEC8 4920 C0FC 0CEFC 16407+ CH R2,=H'1'
00CECC 4920 C0FC 0CEFC 16408+ CH R2,=H'1'
00CED0 4920 C0FC 0CEFC 16409+ CH R2,=H'1'
PAGE 301
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00CED4 4920 C0FC 0CEFC 16410+ CH R2,=H'1'
00CED8 4920 C0FC 0CEFC 16411+ CH R2,=H'1'
00CEDC 4920 C0FC 0CEFC 16412+ CH R2,=H'1'
00CEE0 4920 C0FC 0CEFC 16413+ CH R2,=H'1'
00CEE4 4920 C0FC 0CEFC 16414+ CH R2,=H'1'
16415+*
00CEE8 06FB 16416 BCTR R15,R11
16417 TSIMRET
00CEEA 58F0 C0F8 0CEF8 16418+ L R15,=A(SAVETST) R15 := current save area
00CEEE 58DF 0004 00004 16419+ L R13,4(R15) get old save area back
00CEF2 98EC D00C 0000C 16420+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00CEF6 07FE 16421+ BR 14 RETURN 02000000
16422 TSIMEND
00CEF8 16423+ LTORG
00CEF8 00000458 16424 =A(SAVETST)
00CEFC 0001 16425 =H'1'
0CEFE 16426+T262TEND EQU *
16427 *
16428 * Test 263 -- CLR R,R --------------------------------------
16429 *
16430 TSIMBEG T263,18000,100,1,C'CLR R,R'
16431+*
0031A4 16432+TDSCDAT CSECT
0031A8 16433+ DS 0D
16434+*
0031A8 0000CF00 16435+T263TDSC DC A(T263) // TENTRY
0031AC 00000104 16436+ DC A(T263TEND-T263) // TLENGTH
0031B0 00004650 16437+ DC F'18000' // TLRCNT
0031B4 00000064 16438+ DC F'100' // TIGCNT
0031B8 00000001 16439+ DC F'1' // TLTYPE
0015ED 16440+TEXT CSECT
0015ED E3F2F6F3 16441+SPTR1360 DC C'T263'
0031BC 16442+TDSCDAT CSECT
0031BC 16443+ DS 0F
0031BC 040015ED 16444+ DC AL1(L'SPTR1360),AL3(SPTR1360)
0015F1 16445+TEXT CSECT
0015F1 C3D3D940D96BD9 16446+SPTR1361 DC C'CLR R,R'
0031C0 16447+TDSCDAT CSECT
0031C0 16448+ DS 0F
0031C0 070015F1 16449+ DC AL1(L'SPTR1361),AL3(SPTR1361)
16450+*
004B60 16451+TDSCTBL CSECT
04B60 16452+T263TPTR EQU *
004B60 000031A8 16453+ DC A(T263TDSC) enabled test
16454+*
00CEFE 16455+TCODE CSECT
00CF00 16456+ DS 0D ensure double word alignment for test
00CF00 16457+T263 DS 0H 01650000
00CF00 90EC D00C 0000C 16458+ STM 14,12,12(13) SAVE REGISTERS 02950000
00CF04 18CF 16459+ LR R12,R15 base register := entry address
0CF00 16460+ USING T263,R12 declare code base register
00CF06 41B0 C024 0CF24 16461+ LA R11,T263L load loop target to R11
00CF0A 58F0 C100 0D000 16462+ L R15,=A(SAVETST) R15 := current save area
00CF0E 50DF 0004 00004 16463+ ST R13,4(R15) set back pointer in current save area
00CF12 182D 16464+ LR R2,R13 remember callers save area
PAGE 302
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00CF14 18DF 16465+ LR R13,R15 setup current save area
00CF16 50D2 0008 00008 16466+ ST R13,8(R2) set forw pointer in callers save area
00000 16467+ USING TDSC,R1 declare TDSC base register
00CF1A 58F0 1008 00008 16468+ L R15,TLRCNT load local repeat count to R15
16469+*
16470 *
00CF1E 1722 16471 XR R2,R2
00CF20 4130 0001 00001 16472 LA R3,1
16473 T263L REPINS CLR,(R2,R3) repeat: CLR R2,R3
16474+*
16475+* build from sublist &ALIST a comma separated string &ARGS
16476+*
16477+*
16478+*
16479+*
16480+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
16481+* this allows to transfer the repeat count from last TDSCGEN call
16482+*
16483+*
0CF24 16484+T263L EQU *
16485+*
16486+* write a comment indicating what REPINS does (in case NOGEN in effect)
16487+*
16488+*,// REPINS: do 100 times:
16489+*
16490+* MNOTE requires that ' is doubled for expanded variables
16491+* thus build &MASTR as a copy of '&ARGS with ' doubled
16492+*
16493+*
16494+*,// CLR R2,R3
16495+*
16496+* finally generate code: &ICNT copies of &CODE &ARGS
16497+*
00CF24 1523 16498+ CLR R2,R3
00CF26 1523 16499+ CLR R2,R3
00CF28 1523 16500+ CLR R2,R3
00CF2A 1523 16501+ CLR R2,R3
00CF2C 1523 16502+ CLR R2,R3
00CF2E 1523 16503+ CLR R2,R3
00CF30 1523 16504+ CLR R2,R3
00CF32 1523 16505+ CLR R2,R3
00CF34 1523 16506+ CLR R2,R3
00CF36 1523 16507+ CLR R2,R3
00CF38 1523 16508+ CLR R2,R3
00CF3A 1523 16509+ CLR R2,R3
00CF3C 1523 16510+ CLR R2,R3
00CF3E 1523 16511+ CLR R2,R3
00CF40 1523 16512+ CLR R2,R3
00CF42 1523 16513+ CLR R2,R3
00CF44 1523 16514+ CLR R2,R3
00CF46 1523 16515+ CLR R2,R3
00CF48 1523 16516+ CLR R2,R3
00CF4A 1523 16517+ CLR R2,R3
00CF4C 1523 16518+ CLR R2,R3
00CF4E 1523 16519+ CLR R2,R3
PAGE 303
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00CF50 1523 16520+ CLR R2,R3
00CF52 1523 16521+ CLR R2,R3
00CF54 1523 16522+ CLR R2,R3
00CF56 1523 16523+ CLR R2,R3
00CF58 1523 16524+ CLR R2,R3
00CF5A 1523 16525+ CLR R2,R3
00CF5C 1523 16526+ CLR R2,R3
00CF5E 1523 16527+ CLR R2,R3
00CF60 1523 16528+ CLR R2,R3
00CF62 1523 16529+ CLR R2,R3
00CF64 1523 16530+ CLR R2,R3
00CF66 1523 16531+ CLR R2,R3
00CF68 1523 16532+ CLR R2,R3
00CF6A 1523 16533+ CLR R2,R3
00CF6C 1523 16534+ CLR R2,R3
00CF6E 1523 16535+ CLR R2,R3
00CF70 1523 16536+ CLR R2,R3
00CF72 1523 16537+ CLR R2,R3
00CF74 1523 16538+ CLR R2,R3
00CF76 1523 16539+ CLR R2,R3
00CF78 1523 16540+ CLR R2,R3
00CF7A 1523 16541+ CLR R2,R3
00CF7C 1523 16542+ CLR R2,R3
00CF7E 1523 16543+ CLR R2,R3
00CF80 1523 16544+ CLR R2,R3
00CF82 1523 16545+ CLR R2,R3
00CF84 1523 16546+ CLR R2,R3
00CF86 1523 16547+ CLR R2,R3
00CF88 1523 16548+ CLR R2,R3
00CF8A 1523 16549+ CLR R2,R3
00CF8C 1523 16550+ CLR R2,R3
00CF8E 1523 16551+ CLR R2,R3
00CF90 1523 16552+ CLR R2,R3
00CF92 1523 16553+ CLR R2,R3
00CF94 1523 16554+ CLR R2,R3
00CF96 1523 16555+ CLR R2,R3
00CF98 1523 16556+ CLR R2,R3
00CF9A 1523 16557+ CLR R2,R3
00CF9C 1523 16558+ CLR R2,R3
00CF9E 1523 16559+ CLR R2,R3
00CFA0 1523 16560+ CLR R2,R3
00CFA2 1523 16561+ CLR R2,R3
00CFA4 1523 16562+ CLR R2,R3
00CFA6 1523 16563+ CLR R2,R3
00CFA8 1523 16564+ CLR R2,R3
00CFAA 1523 16565+ CLR R2,R3
00CFAC 1523 16566+ CLR R2,R3
00CFAE 1523 16567+ CLR R2,R3
00CFB0 1523 16568+ CLR R2,R3
00CFB2 1523 16569+ CLR R2,R3
00CFB4 1523 16570+ CLR R2,R3
00CFB6 1523 16571+ CLR R2,R3
00CFB8 1523 16572+ CLR R2,R3
00CFBA 1523 16573+ CLR R2,R3
00CFBC 1523 16574+ CLR R2,R3
PAGE 304
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00CFBE 1523 16575+ CLR R2,R3
00CFC0 1523 16576+ CLR R2,R3
00CFC2 1523 16577+ CLR R2,R3
00CFC4 1523 16578+ CLR R2,R3
00CFC6 1523 16579+ CLR R2,R3
00CFC8 1523 16580+ CLR R2,R3
00CFCA 1523 16581+ CLR R2,R3
00CFCC 1523 16582+ CLR R2,R3
00CFCE 1523 16583+ CLR R2,R3
00CFD0 1523 16584+ CLR R2,R3
00CFD2 1523 16585+ CLR R2,R3
00CFD4 1523 16586+ CLR R2,R3
00CFD6 1523 16587+ CLR R2,R3
00CFD8 1523 16588+ CLR R2,R3
00CFDA 1523 16589+ CLR R2,R3
00CFDC 1523 16590+ CLR R2,R3
00CFDE 1523 16591+ CLR R2,R3
00CFE0 1523 16592+ CLR R2,R3
00CFE2 1523 16593+ CLR R2,R3
00CFE4 1523 16594+ CLR R2,R3
00CFE6 1523 16595+ CLR R2,R3
00CFE8 1523 16596+ CLR R2,R3
00CFEA 1523 16597+ CLR R2,R3
16598+*
00CFEC 06FB 16599 BCTR R15,R11
16600 TSIMRET
00CFEE 58F0 C100 0D000 16601+ L R15,=A(SAVETST) R15 := current save area
00CFF2 58DF 0004 00004 16602+ L R13,4(R15) get old save area back
00CFF6 98EC D00C 0000C 16603+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00CFFA 07FE 16604+ BR 14 RETURN 02000000
16605 TSIMEND
00D000 16606+ LTORG
00D000 00000458 16607 =A(SAVETST)
0D004 16608+T263TEND EQU *
16609 *
16610 * Test 264 -- CL R,m ---------------------------------------
16611 *
16612 TSIMBEG T264,12000,50,1,C'CL R,m'
16613+*
0031C4 16614+TDSCDAT CSECT
0031C8 16615+ DS 0D
16616+*
0031C8 0000D008 16617+T264TDSC DC A(T264) // TENTRY
0031CC 00000100 16618+ DC A(T264TEND-T264) // TLENGTH
0031D0 00002EE0 16619+ DC F'12000' // TLRCNT
0031D4 00000032 16620+ DC F'50' // TIGCNT
0031D8 00000001 16621+ DC F'1' // TLTYPE
0015F8 16622+TEXT CSECT
0015F8 E3F2F6F4 16623+SPTR1372 DC C'T264'
0031DC 16624+TDSCDAT CSECT
0031DC 16625+ DS 0F
0031DC 040015F8 16626+ DC AL1(L'SPTR1372),AL3(SPTR1372)
0015FC 16627+TEXT CSECT
0015FC C3D340D96B94 16628+SPTR1373 DC C'CL R,m'
0031E0 16629+TDSCDAT CSECT
PAGE 305
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0031E0 16630+ DS 0F
0031E0 060015FC 16631+ DC AL1(L'SPTR1373),AL3(SPTR1373)
16632+*
004B64 16633+TDSCTBL CSECT
04B64 16634+T264TPTR EQU *
004B64 000031C8 16635+ DC A(T264TDSC) enabled test
16636+*
00D004 16637+TCODE CSECT
00D008 16638+ DS 0D ensure double word alignment for test
00D008 16639+T264 DS 0H 01650000
00D008 90EC D00C 0000C 16640+ STM 14,12,12(13) SAVE REGISTERS 02950000
00D00C 18CF 16641+ LR R12,R15 base register := entry address
0D008 16642+ USING T264,R12 declare code base register
00D00E 41B0 C020 0D028 16643+ LA R11,T264L load loop target to R11
00D012 58F0 C0F8 0D100 16644+ L R15,=A(SAVETST) R15 := current save area
00D016 50DF 0004 00004 16645+ ST R13,4(R15) set back pointer in current save area
00D01A 182D 16646+ LR R2,R13 remember callers save area
00D01C 18DF 16647+ LR R13,R15 setup current save area
00D01E 50D2 0008 00008 16648+ ST R13,8(R2) set forw pointer in callers save area
00000 16649+ USING TDSC,R1 declare TDSC base register
00D022 58F0 1008 00008 16650+ L R15,TLRCNT load local repeat count to R15
16651+*
16652 *
00D026 1722 16653 XR R2,R2
16654 T264L REPINS CL,(R2,=F'1') repeat: CL R2,=F'1'
16655+*
16656+* build from sublist &ALIST a comma separated string &ARGS
16657+*
16658+*
16659+*
16660+*
16661+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
16662+* this allows to transfer the repeat count from last TDSCGEN call
16663+*
16664+*
0D028 16665+T264L EQU *
16666+*
16667+* write a comment indicating what REPINS does (in case NOGEN in effect)
16668+*
16669+*,// REPINS: do 50 times:
16670+*
16671+* MNOTE requires that ' is doubled for expanded variables
16672+* thus build &MASTR as a copy of '&ARGS with ' doubled
16673+*
16674+*
16675+*,// CL R2,=F'1'
16676+*
16677+* finally generate code: &ICNT copies of &CODE &ARGS
16678+*
00D028 5520 C0FC 0D104 16679+ CL R2,=F'1'
00D02C 5520 C0FC 0D104 16680+ CL R2,=F'1'
00D030 5520 C0FC 0D104 16681+ CL R2,=F'1'
00D034 5520 C0FC 0D104 16682+ CL R2,=F'1'
00D038 5520 C0FC 0D104 16683+ CL R2,=F'1'
00D03C 5520 C0FC 0D104 16684+ CL R2,=F'1'
PAGE 306
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00D040 5520 C0FC 0D104 16685+ CL R2,=F'1'
00D044 5520 C0FC 0D104 16686+ CL R2,=F'1'
00D048 5520 C0FC 0D104 16687+ CL R2,=F'1'
00D04C 5520 C0FC 0D104 16688+ CL R2,=F'1'
00D050 5520 C0FC 0D104 16689+ CL R2,=F'1'
00D054 5520 C0FC 0D104 16690+ CL R2,=F'1'
00D058 5520 C0FC 0D104 16691+ CL R2,=F'1'
00D05C 5520 C0FC 0D104 16692+ CL R2,=F'1'
00D060 5520 C0FC 0D104 16693+ CL R2,=F'1'
00D064 5520 C0FC 0D104 16694+ CL R2,=F'1'
00D068 5520 C0FC 0D104 16695+ CL R2,=F'1'
00D06C 5520 C0FC 0D104 16696+ CL R2,=F'1'
00D070 5520 C0FC 0D104 16697+ CL R2,=F'1'
00D074 5520 C0FC 0D104 16698+ CL R2,=F'1'
00D078 5520 C0FC 0D104 16699+ CL R2,=F'1'
00D07C 5520 C0FC 0D104 16700+ CL R2,=F'1'
00D080 5520 C0FC 0D104 16701+ CL R2,=F'1'
00D084 5520 C0FC 0D104 16702+ CL R2,=F'1'
00D088 5520 C0FC 0D104 16703+ CL R2,=F'1'
00D08C 5520 C0FC 0D104 16704+ CL R2,=F'1'
00D090 5520 C0FC 0D104 16705+ CL R2,=F'1'
00D094 5520 C0FC 0D104 16706+ CL R2,=F'1'
00D098 5520 C0FC 0D104 16707+ CL R2,=F'1'
00D09C 5520 C0FC 0D104 16708+ CL R2,=F'1'
00D0A0 5520 C0FC 0D104 16709+ CL R2,=F'1'
00D0A4 5520 C0FC 0D104 16710+ CL R2,=F'1'
00D0A8 5520 C0FC 0D104 16711+ CL R2,=F'1'
00D0AC 5520 C0FC 0D104 16712+ CL R2,=F'1'
00D0B0 5520 C0FC 0D104 16713+ CL R2,=F'1'
00D0B4 5520 C0FC 0D104 16714+ CL R2,=F'1'
00D0B8 5520 C0FC 0D104 16715+ CL R2,=F'1'
00D0BC 5520 C0FC 0D104 16716+ CL R2,=F'1'
00D0C0 5520 C0FC 0D104 16717+ CL R2,=F'1'
00D0C4 5520 C0FC 0D104 16718+ CL R2,=F'1'
00D0C8 5520 C0FC 0D104 16719+ CL R2,=F'1'
00D0CC 5520 C0FC 0D104 16720+ CL R2,=F'1'
00D0D0 5520 C0FC 0D104 16721+ CL R2,=F'1'
00D0D4 5520 C0FC 0D104 16722+ CL R2,=F'1'
00D0D8 5520 C0FC 0D104 16723+ CL R2,=F'1'
00D0DC 5520 C0FC 0D104 16724+ CL R2,=F'1'
00D0E0 5520 C0FC 0D104 16725+ CL R2,=F'1'
00D0E4 5520 C0FC 0D104 16726+ CL R2,=F'1'
00D0E8 5520 C0FC 0D104 16727+ CL R2,=F'1'
00D0EC 5520 C0FC 0D104 16728+ CL R2,=F'1'
16729+*
00D0F0 06FB 16730 BCTR R15,R11
16731 TSIMRET
00D0F2 58F0 C0F8 0D100 16732+ L R15,=A(SAVETST) R15 := current save area
00D0F6 58DF 0004 00004 16733+ L R13,4(R15) get old save area back
00D0FA 98EC D00C 0000C 16734+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00D0FE 07FE 16735+ BR 14 RETURN 02000000
16736 TSIMEND
00D100 16737+ LTORG
00D100 00000458 16738 =A(SAVETST)
00D104 00000001 16739 =F'1'
PAGE 307
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0D108 16740+T264TEND EQU *
16741 *
16742 * Test 265 -- CLI m,i --------------------------------------
16743 *
16744 TSIMBEG T265,10000,50,1,C'CLI m,i'
16745+*
0031E4 16746+TDSCDAT CSECT
0031E8 16747+ DS 0D
16748+*
0031E8 0000D108 16749+T265TDSC DC A(T265) // TENTRY
0031EC 000000FC 16750+ DC A(T265TEND-T265) // TLENGTH
0031F0 00002710 16751+ DC F'10000' // TLRCNT
0031F4 00000032 16752+ DC F'50' // TIGCNT
0031F8 00000001 16753+ DC F'1' // TLTYPE
001602 16754+TEXT CSECT
001602 E3F2F6F5 16755+SPTR1384 DC C'T265'
0031FC 16756+TDSCDAT CSECT
0031FC 16757+ DS 0F
0031FC 04001602 16758+ DC AL1(L'SPTR1384),AL3(SPTR1384)
001606 16759+TEXT CSECT
001606 C3D3C940946B89 16760+SPTR1385 DC C'CLI m,i'
003200 16761+TDSCDAT CSECT
003200 16762+ DS 0F
003200 07001606 16763+ DC AL1(L'SPTR1385),AL3(SPTR1385)
16764+*
004B68 16765+TDSCTBL CSECT
04B68 16766+T265TPTR EQU *
004B68 000031E8 16767+ DC A(T265TDSC) enabled test
16768+*
00D108 16769+TCODE CSECT
00D108 16770+ DS 0D ensure double word alignment for test
00D108 16771+T265 DS 0H 01650000
00D108 90EC D00C 0000C 16772+ STM 14,12,12(13) SAVE REGISTERS 02950000
00D10C 18CF 16773+ LR R12,R15 base register := entry address
0D108 16774+ USING T265,R12 declare code base register
00D10E 41B0 C01E 0D126 16775+ LA R11,T265L load loop target to R11
00D112 58F0 C0F8 0D200 16776+ L R15,=A(SAVETST) R15 := current save area
00D116 50DF 0004 00004 16777+ ST R13,4(R15) set back pointer in current save area
00D11A 182D 16778+ LR R2,R13 remember callers save area
00D11C 18DF 16779+ LR R13,R15 setup current save area
00D11E 50D2 0008 00008 16780+ ST R13,8(R2) set forw pointer in callers save area
00000 16781+ USING TDSC,R1 declare TDSC base register
00D122 58F0 1008 00008 16782+ L R15,TLRCNT load local repeat count to R15
16783+*
16784 *
16785 T265L REPINS CLI,(T265V,X'00') repeat: CLI T265V,X'00'
16786+*
16787+* build from sublist &ALIST a comma separated string &ARGS
16788+*
16789+*
16790+*
16791+*
16792+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
16793+* this allows to transfer the repeat count from last TDSCGEN call
16794+*
PAGE 308
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
16795+*
0D126 16796+T265L EQU *
16797+*
16798+* write a comment indicating what REPINS does (in case NOGEN in effect)
16799+*
16800+*,// REPINS: do 50 times:
16801+*
16802+* MNOTE requires that ' is doubled for expanded variables
16803+* thus build &MASTR as a copy of '&ARGS with ' doubled
16804+*
16805+*
16806+*,// CLI T265V,X'00'
16807+*
16808+* finally generate code: &ICNT copies of &CODE &ARGS
16809+*
00D126 9500 C0F6 0D1FE 16810+ CLI T265V,X'00'
00D12A 9500 C0F6 0D1FE 16811+ CLI T265V,X'00'
00D12E 9500 C0F6 0D1FE 16812+ CLI T265V,X'00'
00D132 9500 C0F6 0D1FE 16813+ CLI T265V,X'00'
00D136 9500 C0F6 0D1FE 16814+ CLI T265V,X'00'
00D13A 9500 C0F6 0D1FE 16815+ CLI T265V,X'00'
00D13E 9500 C0F6 0D1FE 16816+ CLI T265V,X'00'
00D142 9500 C0F6 0D1FE 16817+ CLI T265V,X'00'
00D146 9500 C0F6 0D1FE 16818+ CLI T265V,X'00'
00D14A 9500 C0F6 0D1FE 16819+ CLI T265V,X'00'
00D14E 9500 C0F6 0D1FE 16820+ CLI T265V,X'00'
00D152 9500 C0F6 0D1FE 16821+ CLI T265V,X'00'
00D156 9500 C0F6 0D1FE 16822+ CLI T265V,X'00'
00D15A 9500 C0F6 0D1FE 16823+ CLI T265V,X'00'
00D15E 9500 C0F6 0D1FE 16824+ CLI T265V,X'00'
00D162 9500 C0F6 0D1FE 16825+ CLI T265V,X'00'
00D166 9500 C0F6 0D1FE 16826+ CLI T265V,X'00'
00D16A 9500 C0F6 0D1FE 16827+ CLI T265V,X'00'
00D16E 9500 C0F6 0D1FE 16828+ CLI T265V,X'00'
00D172 9500 C0F6 0D1FE 16829+ CLI T265V,X'00'
00D176 9500 C0F6 0D1FE 16830+ CLI T265V,X'00'
00D17A 9500 C0F6 0D1FE 16831+ CLI T265V,X'00'
00D17E 9500 C0F6 0D1FE 16832+ CLI T265V,X'00'
00D182 9500 C0F6 0D1FE 16833+ CLI T265V,X'00'
00D186 9500 C0F6 0D1FE 16834+ CLI T265V,X'00'
00D18A 9500 C0F6 0D1FE 16835+ CLI T265V,X'00'
00D18E 9500 C0F6 0D1FE 16836+ CLI T265V,X'00'
00D192 9500 C0F6 0D1FE 16837+ CLI T265V,X'00'
00D196 9500 C0F6 0D1FE 16838+ CLI T265V,X'00'
00D19A 9500 C0F6 0D1FE 16839+ CLI T265V,X'00'
00D19E 9500 C0F6 0D1FE 16840+ CLI T265V,X'00'
00D1A2 9500 C0F6 0D1FE 16841+ CLI T265V,X'00'
00D1A6 9500 C0F6 0D1FE 16842+ CLI T265V,X'00'
00D1AA 9500 C0F6 0D1FE 16843+ CLI T265V,X'00'
00D1AE 9500 C0F6 0D1FE 16844+ CLI T265V,X'00'
00D1B2 9500 C0F6 0D1FE 16845+ CLI T265V,X'00'
00D1B6 9500 C0F6 0D1FE 16846+ CLI T265V,X'00'
00D1BA 9500 C0F6 0D1FE 16847+ CLI T265V,X'00'
00D1BE 9500 C0F6 0D1FE 16848+ CLI T265V,X'00'
00D1C2 9500 C0F6 0D1FE 16849+ CLI T265V,X'00'
PAGE 309
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00D1C6 9500 C0F6 0D1FE 16850+ CLI T265V,X'00'
00D1CA 9500 C0F6 0D1FE 16851+ CLI T265V,X'00'
00D1CE 9500 C0F6 0D1FE 16852+ CLI T265V,X'00'
00D1D2 9500 C0F6 0D1FE 16853+ CLI T265V,X'00'
00D1D6 9500 C0F6 0D1FE 16854+ CLI T265V,X'00'
00D1DA 9500 C0F6 0D1FE 16855+ CLI T265V,X'00'
00D1DE 9500 C0F6 0D1FE 16856+ CLI T265V,X'00'
00D1E2 9500 C0F6 0D1FE 16857+ CLI T265V,X'00'
00D1E6 9500 C0F6 0D1FE 16858+ CLI T265V,X'00'
00D1EA 9500 C0F6 0D1FE 16859+ CLI T265V,X'00'
16860+*
00D1EE 06FB 16861 BCTR R15,R11
16862 TSIMRET
00D1F0 58F0 C0F8 0D200 16863+ L R15,=A(SAVETST) R15 := current save area
00D1F4 58DF 0004 00004 16864+ L R13,4(R15) get old save area back
00D1F8 98EC D00C 0000C 16865+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00D1FC 07FE 16866+ BR 14 RETURN 02000000
16867 *
00D1FE 01 16868 T265V DC X'01'
16869 TSIMEND
00D200 16870+ LTORG
00D200 00000458 16871 =A(SAVETST)
0D204 16872+T265TEND EQU *
16873 *
16874 * Test 266 -- CLM R,i,m ------------------------------------
16875 *
16876 TSIMBEG T266,8000,50,1,C'CLM R,i,m'
16877+*
003204 16878+TDSCDAT CSECT
003208 16879+ DS 0D
16880+*
003208 0000D208 16881+T266TDSC DC A(T266) // TENTRY
00320C 00000104 16882+ DC A(T266TEND-T266) // TLENGTH
003210 00001F40 16883+ DC F'8000' // TLRCNT
003214 00000032 16884+ DC F'50' // TIGCNT
003218 00000001 16885+ DC F'1' // TLTYPE
00160D 16886+TEXT CSECT
00160D E3F2F6F6 16887+SPTR1396 DC C'T266'
00321C 16888+TDSCDAT CSECT
00321C 16889+ DS 0F
00321C 0400160D 16890+ DC AL1(L'SPTR1396),AL3(SPTR1396)
001611 16891+TEXT CSECT
001611 C3D3D440D96B896B 16892+SPTR1397 DC C'CLM R,i,m'
003220 16893+TDSCDAT CSECT
003220 16894+ DS 0F
003220 09001611 16895+ DC AL1(L'SPTR1397),AL3(SPTR1397)
16896+*
004B6C 16897+TDSCTBL CSECT
04B6C 16898+T266TPTR EQU *
004B6C 00003208 16899+ DC A(T266TDSC) enabled test
16900+*
00D204 16901+TCODE CSECT
00D208 16902+ DS 0D ensure double word alignment for test
00D208 16903+T266 DS 0H 01650000
00D208 90EC D00C 0000C 16904+ STM 14,12,12(13) SAVE REGISTERS 02950000
PAGE 310
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00D20C 18CF 16905+ LR R12,R15 base register := entry address
0D208 16906+ USING T266,R12 declare code base register
00D20E 41B0 C022 0D22A 16907+ LA R11,T266L load loop target to R11
00D212 58F0 C100 0D308 16908+ L R15,=A(SAVETST) R15 := current save area
00D216 50DF 0004 00004 16909+ ST R13,4(R15) set back pointer in current save area
00D21A 182D 16910+ LR R2,R13 remember callers save area
00D21C 18DF 16911+ LR R13,R15 setup current save area
00D21E 50D2 0008 00008 16912+ ST R13,8(R2) set forw pointer in callers save area
00000 16913+ USING TDSC,R1 declare TDSC base register
00D222 58F0 1008 00008 16914+ L R15,TLRCNT load local repeat count to R15
16915+*
16916 *
00D226 5820 C0FC 0D304 16917 L R2,T266V
16918 T266L REPINS CLM,(R2,X'7',T266V) repeat: CLM R2,X'7',T266V
16919+*
16920+* build from sublist &ALIST a comma separated string &ARGS
16921+*
16922+*
16923+*
16924+*
16925+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
16926+* this allows to transfer the repeat count from last TDSCGEN call
16927+*
16928+*
0D22A 16929+T266L EQU *
16930+*
16931+* write a comment indicating what REPINS does (in case NOGEN in effect)
16932+*
16933+*,// REPINS: do 50 times:
16934+*
16935+* MNOTE requires that ' is doubled for expanded variables
16936+* thus build &MASTR as a copy of '&ARGS with ' doubled
16937+*
16938+*
16939+*,// CLM R2,X'7',T266V
16940+*
16941+* finally generate code: &ICNT copies of &CODE &ARGS
16942+*
00D22A BD27 C0FC 0D304 16943+ CLM R2,X'7',T266V
00D22E BD27 C0FC 0D304 16944+ CLM R2,X'7',T266V
00D232 BD27 C0FC 0D304 16945+ CLM R2,X'7',T266V
00D236 BD27 C0FC 0D304 16946+ CLM R2,X'7',T266V
00D23A BD27 C0FC 0D304 16947+ CLM R2,X'7',T266V
00D23E BD27 C0FC 0D304 16948+ CLM R2,X'7',T266V
00D242 BD27 C0FC 0D304 16949+ CLM R2,X'7',T266V
00D246 BD27 C0FC 0D304 16950+ CLM R2,X'7',T266V
00D24A BD27 C0FC 0D304 16951+ CLM R2,X'7',T266V
00D24E BD27 C0FC 0D304 16952+ CLM R2,X'7',T266V
00D252 BD27 C0FC 0D304 16953+ CLM R2,X'7',T266V
00D256 BD27 C0FC 0D304 16954+ CLM R2,X'7',T266V
00D25A BD27 C0FC 0D304 16955+ CLM R2,X'7',T266V
00D25E BD27 C0FC 0D304 16956+ CLM R2,X'7',T266V
00D262 BD27 C0FC 0D304 16957+ CLM R2,X'7',T266V
00D266 BD27 C0FC 0D304 16958+ CLM R2,X'7',T266V
00D26A BD27 C0FC 0D304 16959+ CLM R2,X'7',T266V
PAGE 311
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00D26E BD27 C0FC 0D304 16960+ CLM R2,X'7',T266V
00D272 BD27 C0FC 0D304 16961+ CLM R2,X'7',T266V
00D276 BD27 C0FC 0D304 16962+ CLM R2,X'7',T266V
00D27A BD27 C0FC 0D304 16963+ CLM R2,X'7',T266V
00D27E BD27 C0FC 0D304 16964+ CLM R2,X'7',T266V
00D282 BD27 C0FC 0D304 16965+ CLM R2,X'7',T266V
00D286 BD27 C0FC 0D304 16966+ CLM R2,X'7',T266V
00D28A BD27 C0FC 0D304 16967+ CLM R2,X'7',T266V
00D28E BD27 C0FC 0D304 16968+ CLM R2,X'7',T266V
00D292 BD27 C0FC 0D304 16969+ CLM R2,X'7',T266V
00D296 BD27 C0FC 0D304 16970+ CLM R2,X'7',T266V
00D29A BD27 C0FC 0D304 16971+ CLM R2,X'7',T266V
00D29E BD27 C0FC 0D304 16972+ CLM R2,X'7',T266V
00D2A2 BD27 C0FC 0D304 16973+ CLM R2,X'7',T266V
00D2A6 BD27 C0FC 0D304 16974+ CLM R2,X'7',T266V
00D2AA BD27 C0FC 0D304 16975+ CLM R2,X'7',T266V
00D2AE BD27 C0FC 0D304 16976+ CLM R2,X'7',T266V
00D2B2 BD27 C0FC 0D304 16977+ CLM R2,X'7',T266V
00D2B6 BD27 C0FC 0D304 16978+ CLM R2,X'7',T266V
00D2BA BD27 C0FC 0D304 16979+ CLM R2,X'7',T266V
00D2BE BD27 C0FC 0D304 16980+ CLM R2,X'7',T266V
00D2C2 BD27 C0FC 0D304 16981+ CLM R2,X'7',T266V
00D2C6 BD27 C0FC 0D304 16982+ CLM R2,X'7',T266V
00D2CA BD27 C0FC 0D304 16983+ CLM R2,X'7',T266V
00D2CE BD27 C0FC 0D304 16984+ CLM R2,X'7',T266V
00D2D2 BD27 C0FC 0D304 16985+ CLM R2,X'7',T266V
00D2D6 BD27 C0FC 0D304 16986+ CLM R2,X'7',T266V
00D2DA BD27 C0FC 0D304 16987+ CLM R2,X'7',T266V
00D2DE BD27 C0FC 0D304 16988+ CLM R2,X'7',T266V
00D2E2 BD27 C0FC 0D304 16989+ CLM R2,X'7',T266V
00D2E6 BD27 C0FC 0D304 16990+ CLM R2,X'7',T266V
00D2EA BD27 C0FC 0D304 16991+ CLM R2,X'7',T266V
00D2EE BD27 C0FC 0D304 16992+ CLM R2,X'7',T266V
16993+*
00D2F2 06FB 16994 BCTR R15,R11
16995 TSIMRET
00D2F4 58F0 C100 0D308 16996+ L R15,=A(SAVETST) R15 := current save area
00D2F8 58DF 0004 00004 16997+ L R13,4(R15) get old save area back
00D2FC 98EC D00C 0000C 16998+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00D300 07FE 16999+ BR 14 RETURN 02000000
17000 *
00D304 17001 DS 0F
00D304 010203FF 17002 T266V DC X'010203FF'
17003 TSIMEND
00D308 17004+ LTORG
00D308 00000458 17005 =A(SAVETST)
0D30C 17006+T266TEND EQU *
17007 *
17008 * Test 27x -- CLC ==========================================
17009 *
17010 * Test 270 -- CLC m,m (10c,eq)------------------------------
17011 *
17012 TSIMBEG T270,7000,20,1,C'CLC m,m (10c,eq)'
17013+*
003224 17014+TDSCDAT CSECT
PAGE 312
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003228 17015+ DS 0D
17016+*
003228 0000D310 17017+T270TDSC DC A(T270) // TENTRY
00322C 000000B4 17018+ DC A(T270TEND-T270) // TLENGTH
003230 00001B58 17019+ DC F'7000' // TLRCNT
003234 00000014 17020+ DC F'20' // TIGCNT
003238 00000001 17021+ DC F'1' // TLTYPE
00161A 17022+TEXT CSECT
00161A E3F2F7F0 17023+SPTR1408 DC C'T270'
00323C 17024+TDSCDAT CSECT
00323C 17025+ DS 0F
00323C 0400161A 17026+ DC AL1(L'SPTR1408),AL3(SPTR1408)
00161E 17027+TEXT CSECT
00161E C3D3C340946B9440 17028+SPTR1409 DC C'CLC m,m (10c,eq)'
003240 17029+TDSCDAT CSECT
003240 17030+ DS 0F
003240 1000161E 17031+ DC AL1(L'SPTR1409),AL3(SPTR1409)
17032+*
004B70 17033+TDSCTBL CSECT
04B70 17034+T270TPTR EQU *
004B70 00003228 17035+ DC A(T270TDSC) enabled test
17036+*
00D30C 17037+TCODE CSECT
00D310 17038+ DS 0D ensure double word alignment for test
00D310 17039+T270 DS 0H 01650000
00D310 90EC D00C 0000C 17040+ STM 14,12,12(13) SAVE REGISTERS 02950000
00D314 18CF 17041+ LR R12,R15 base register := entry address
0D310 17042+ USING T270,R12 declare code base register
00D316 41B0 C01E 0D32E 17043+ LA R11,T270L load loop target to R11
00D31A 58F0 C0B0 0D3C0 17044+ L R15,=A(SAVETST) R15 := current save area
00D31E 50DF 0004 00004 17045+ ST R13,4(R15) set back pointer in current save area
00D322 182D 17046+ LR R2,R13 remember callers save area
00D324 18DF 17047+ LR R13,R15 setup current save area
00D326 50D2 0008 00008 17048+ ST R13,8(R2) set forw pointer in callers save area
00000 17049+ USING TDSC,R1 declare TDSC base register
00D32A 58F0 1008 00008 17050+ L R15,TLRCNT load local repeat count to R15
17051+*
17052 *
17053 T270L REPINS CLC,(T270V1,T270V1) repeat: CLC T270V1,T270V1
17054+*
17055+* build from sublist &ALIST a comma separated string &ARGS
17056+*
17057+*
17058+*
17059+*
17060+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
17061+* this allows to transfer the repeat count from last TDSCGEN call
17062+*
17063+*
0D32E 17064+T270L EQU *
17065+*
17066+* write a comment indicating what REPINS does (in case NOGEN in effect)
17067+*
17068+*,// REPINS: do 20 times:
17069+*
PAGE 313
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
17070+* MNOTE requires that ' is doubled for expanded variables
17071+* thus build &MASTR as a copy of '&ARGS with ' doubled
17072+*
17073+*
17074+*,// CLC T270V1,T270V1
17075+*
17076+* finally generate code: &ICNT copies of &CODE &ARGS
17077+*
00D32E D509 C0A6 C0A6 0D3B6 0D3B6 17078+ CLC T270V1,T270V1
00D334 D509 C0A6 C0A6 0D3B6 0D3B6 17079+ CLC T270V1,T270V1
00D33A D509 C0A6 C0A6 0D3B6 0D3B6 17080+ CLC T270V1,T270V1
00D340 D509 C0A6 C0A6 0D3B6 0D3B6 17081+ CLC T270V1,T270V1
00D346 D509 C0A6 C0A6 0D3B6 0D3B6 17082+ CLC T270V1,T270V1
00D34C D509 C0A6 C0A6 0D3B6 0D3B6 17083+ CLC T270V1,T270V1
00D352 D509 C0A6 C0A6 0D3B6 0D3B6 17084+ CLC T270V1,T270V1
00D358 D509 C0A6 C0A6 0D3B6 0D3B6 17085+ CLC T270V1,T270V1
00D35E D509 C0A6 C0A6 0D3B6 0D3B6 17086+ CLC T270V1,T270V1
00D364 D509 C0A6 C0A6 0D3B6 0D3B6 17087+ CLC T270V1,T270V1
00D36A D509 C0A6 C0A6 0D3B6 0D3B6 17088+ CLC T270V1,T270V1
00D370 D509 C0A6 C0A6 0D3B6 0D3B6 17089+ CLC T270V1,T270V1
00D376 D509 C0A6 C0A6 0D3B6 0D3B6 17090+ CLC T270V1,T270V1
00D37C D509 C0A6 C0A6 0D3B6 0D3B6 17091+ CLC T270V1,T270V1
00D382 D509 C0A6 C0A6 0D3B6 0D3B6 17092+ CLC T270V1,T270V1
00D388 D509 C0A6 C0A6 0D3B6 0D3B6 17093+ CLC T270V1,T270V1
00D38E D509 C0A6 C0A6 0D3B6 0D3B6 17094+ CLC T270V1,T270V1
00D394 D509 C0A6 C0A6 0D3B6 0D3B6 17095+ CLC T270V1,T270V1
00D39A D509 C0A6 C0A6 0D3B6 0D3B6 17096+ CLC T270V1,T270V1
00D3A0 D509 C0A6 C0A6 0D3B6 0D3B6 17097+ CLC T270V1,T270V1
17098+*
00D3A6 06FB 17099 BCTR R15,R11
17100 TSIMRET
00D3A8 58F0 C0B0 0D3C0 17101+ L R15,=A(SAVETST) R15 := current save area
00D3AC 58DF 0004 00004 17102+ L R13,4(R15) get old save area back
00D3B0 98EC D00C 0000C 17103+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00D3B4 07FE 17104+ BR 14 RETURN 02000000
17105 *
00D3B6 F1F2F3F4F5F6F7F8 17106 T270V1 DC C'1234567890'
17107 TSIMEND
00D3C0 17108+ LTORG
00D3C0 00000458 17109 =A(SAVETST)
0D3C4 17110+T270TEND EQU *
17111 *
17112 * Test 271 -- CLC m,m (10c,ne)------------------------------
17113 *
17114 TSIMBEG T271,8000,20,1,C'CLC m,m (10c,ne)'
17115+*
003244 17116+TDSCDAT CSECT
003248 17117+ DS 0D
17118+*
003248 0000D3C8 17119+T271TDSC DC A(T271) // TENTRY
00324C 000000C4 17120+ DC A(T271TEND-T271) // TLENGTH
003250 00001F40 17121+ DC F'8000' // TLRCNT
003254 00000014 17122+ DC F'20' // TIGCNT
003258 00000001 17123+ DC F'1' // TLTYPE
00162E 17124+TEXT CSECT
PAGE 314
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00162E E3F2F7F1 17125+SPTR1420 DC C'T271'
00325C 17126+TDSCDAT CSECT
00325C 17127+ DS 0F
00325C 0400162E 17128+ DC AL1(L'SPTR1420),AL3(SPTR1420)
001632 17129+TEXT CSECT
001632 C3D3C340946B9440 17130+SPTR1421 DC C'CLC m,m (10c,ne)'
003260 17131+TDSCDAT CSECT
003260 17132+ DS 0F
003260 10001632 17133+ DC AL1(L'SPTR1421),AL3(SPTR1421)
17134+*
004B74 17135+TDSCTBL CSECT
04B74 17136+T271TPTR EQU *
004B74 00003248 17137+ DC A(T271TDSC) enabled test
17138+*
00D3C4 17139+TCODE CSECT
00D3C8 17140+ DS 0D ensure double word alignment for test
00D3C8 17141+T271 DS 0H 01650000
00D3C8 90EC D00C 0000C 17142+ STM 14,12,12(13) SAVE REGISTERS 02950000
00D3CC 18CF 17143+ LR R12,R15 base register := entry address
0D3C8 17144+ USING T271,R12 declare code base register
00D3CE 41B0 C01E 0D3E6 17145+ LA R11,T271L load loop target to R11
00D3D2 58F0 C0C0 0D488 17146+ L R15,=A(SAVETST) R15 := current save area
00D3D6 50DF 0004 00004 17147+ ST R13,4(R15) set back pointer in current save area
00D3DA 182D 17148+ LR R2,R13 remember callers save area
00D3DC 18DF 17149+ LR R13,R15 setup current save area
00D3DE 50D2 0008 00008 17150+ ST R13,8(R2) set forw pointer in callers save area
00000 17151+ USING TDSC,R1 declare TDSC base register
00D3E2 58F0 1008 00008 17152+ L R15,TLRCNT load local repeat count to R15
17153+*
17154 *
17155 T271L REPINS CLC,(T271V1,T271V2) repeat: CLC T271V1,T271V2
17156+*
17157+* build from sublist &ALIST a comma separated string &ARGS
17158+*
17159+*
17160+*
17161+*
17162+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
17163+* this allows to transfer the repeat count from last TDSCGEN call
17164+*
17165+*
0D3E6 17166+T271L EQU *
17167+*
17168+* write a comment indicating what REPINS does (in case NOGEN in effect)
17169+*
17170+*,// REPINS: do 20 times:
17171+*
17172+* MNOTE requires that ' is doubled for expanded variables
17173+* thus build &MASTR as a copy of '&ARGS with ' doubled
17174+*
17175+*
17176+*,// CLC T271V1,T271V2
17177+*
17178+* finally generate code: &ICNT copies of &CODE &ARGS
17179+*
PAGE 315
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00D3E6 D509 C0A6 C0B0 0D46E 0D478 17180+ CLC T271V1,T271V2
00D3EC D509 C0A6 C0B0 0D46E 0D478 17181+ CLC T271V1,T271V2
00D3F2 D509 C0A6 C0B0 0D46E 0D478 17182+ CLC T271V1,T271V2
00D3F8 D509 C0A6 C0B0 0D46E 0D478 17183+ CLC T271V1,T271V2
00D3FE D509 C0A6 C0B0 0D46E 0D478 17184+ CLC T271V1,T271V2
00D404 D509 C0A6 C0B0 0D46E 0D478 17185+ CLC T271V1,T271V2
00D40A D509 C0A6 C0B0 0D46E 0D478 17186+ CLC T271V1,T271V2
00D410 D509 C0A6 C0B0 0D46E 0D478 17187+ CLC T271V1,T271V2
00D416 D509 C0A6 C0B0 0D46E 0D478 17188+ CLC T271V1,T271V2
00D41C D509 C0A6 C0B0 0D46E 0D478 17189+ CLC T271V1,T271V2
00D422 D509 C0A6 C0B0 0D46E 0D478 17190+ CLC T271V1,T271V2
00D428 D509 C0A6 C0B0 0D46E 0D478 17191+ CLC T271V1,T271V2
00D42E D509 C0A6 C0B0 0D46E 0D478 17192+ CLC T271V1,T271V2
00D434 D509 C0A6 C0B0 0D46E 0D478 17193+ CLC T271V1,T271V2
00D43A D509 C0A6 C0B0 0D46E 0D478 17194+ CLC T271V1,T271V2
00D440 D509 C0A6 C0B0 0D46E 0D478 17195+ CLC T271V1,T271V2
00D446 D509 C0A6 C0B0 0D46E 0D478 17196+ CLC T271V1,T271V2
00D44C D509 C0A6 C0B0 0D46E 0D478 17197+ CLC T271V1,T271V2
00D452 D509 C0A6 C0B0 0D46E 0D478 17198+ CLC T271V1,T271V2
00D458 D509 C0A6 C0B0 0D46E 0D478 17199+ CLC T271V1,T271V2
17200+*
00D45E 06FB 17201 BCTR R15,R11
17202 TSIMRET
00D460 58F0 C0C0 0D488 17203+ L R15,=A(SAVETST) R15 := current save area
00D464 58DF 0004 00004 17204+ L R13,4(R15) get old save area back
00D468 98EC D00C 0000C 17205+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00D46C 07FE 17206+ BR 14 RETURN 02000000
17207 *
00D46E F1F2F3F4F5F6F7F8 17208 T271V1 DC C'1234567890'
00D478 F2F3F4F5F6F7F8F9 17209 T271V2 DC C'2345678901'
17210 TSIMEND
00D488 17211+ LTORG
00D488 00000458 17212 =A(SAVETST)
0D48C 17213+T271TEND EQU *
17214 *
17215 * Test 272 -- CLC m,m (30c,eq)------------------------------
17216 *
17217 TSIMBEG T272,5000,20,1,C'CLC m,m (30c,eq)'
17218+*
003264 17219+TDSCDAT CSECT
003268 17220+ DS 0D
17221+*
003268 0000D490 17222+T272TDSC DC A(T272) // TENTRY
00326C 000000CC 17223+ DC A(T272TEND-T272) // TLENGTH
003270 00001388 17224+ DC F'5000' // TLRCNT
003274 00000014 17225+ DC F'20' // TIGCNT
003278 00000001 17226+ DC F'1' // TLTYPE
001642 17227+TEXT CSECT
001642 E3F2F7F2 17228+SPTR1432 DC C'T272'
00327C 17229+TDSCDAT CSECT
00327C 17230+ DS 0F
00327C 04001642 17231+ DC AL1(L'SPTR1432),AL3(SPTR1432)
001646 17232+TEXT CSECT
001646 C3D3C340946B9440 17233+SPTR1433 DC C'CLC m,m (30c,eq)'
003280 17234+TDSCDAT CSECT
PAGE 316
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003280 17235+ DS 0F
003280 10001646 17236+ DC AL1(L'SPTR1433),AL3(SPTR1433)
17237+*
004B78 17238+TDSCTBL CSECT
04B78 17239+T272TPTR EQU *
004B78 00003268 17240+ DC A(T272TDSC) enabled test
17241+*
00D48C 17242+TCODE CSECT
00D490 17243+ DS 0D ensure double word alignment for test
00D490 17244+T272 DS 0H 01650000
00D490 90EC D00C 0000C 17245+ STM 14,12,12(13) SAVE REGISTERS 02950000
00D494 18CF 17246+ LR R12,R15 base register := entry address
0D490 17247+ USING T272,R12 declare code base register
00D496 41B0 C01E 0D4AE 17248+ LA R11,T272L load loop target to R11
00D49A 58F0 C0C8 0D558 17249+ L R15,=A(SAVETST) R15 := current save area
00D49E 50DF 0004 00004 17250+ ST R13,4(R15) set back pointer in current save area
00D4A2 182D 17251+ LR R2,R13 remember callers save area
00D4A4 18DF 17252+ LR R13,R15 setup current save area
00D4A6 50D2 0008 00008 17253+ ST R13,8(R2) set forw pointer in callers save area
00000 17254+ USING TDSC,R1 declare TDSC base register
00D4AA 58F0 1008 00008 17255+ L R15,TLRCNT load local repeat count to R15
17256+*
17257 *
17258 T272L REPINS CLC,(T272V1,T272V1) repeat: CLC T272V1,T272V1
17259+*
17260+* build from sublist &ALIST a comma separated string &ARGS
17261+*
17262+*
17263+*
17264+*
17265+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
17266+* this allows to transfer the repeat count from last TDSCGEN call
17267+*
17268+*
0D4AE 17269+T272L EQU *
17270+*
17271+* write a comment indicating what REPINS does (in case NOGEN in effect)
17272+*
17273+*,// REPINS: do 20 times:
17274+*
17275+* MNOTE requires that ' is doubled for expanded variables
17276+* thus build &MASTR as a copy of '&ARGS with ' doubled
17277+*
17278+*
17279+*,// CLC T272V1,T272V1
17280+*
17281+* finally generate code: &ICNT copies of &CODE &ARGS
17282+*
00D4AE D51D C0A6 C0A6 0D536 0D536 17283+ CLC T272V1,T272V1
00D4B4 D51D C0A6 C0A6 0D536 0D536 17284+ CLC T272V1,T272V1
00D4BA D51D C0A6 C0A6 0D536 0D536 17285+ CLC T272V1,T272V1
00D4C0 D51D C0A6 C0A6 0D536 0D536 17286+ CLC T272V1,T272V1
00D4C6 D51D C0A6 C0A6 0D536 0D536 17287+ CLC T272V1,T272V1
00D4CC D51D C0A6 C0A6 0D536 0D536 17288+ CLC T272V1,T272V1
00D4D2 D51D C0A6 C0A6 0D536 0D536 17289+ CLC T272V1,T272V1
PAGE 317
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00D4D8 D51D C0A6 C0A6 0D536 0D536 17290+ CLC T272V1,T272V1
00D4DE D51D C0A6 C0A6 0D536 0D536 17291+ CLC T272V1,T272V1
00D4E4 D51D C0A6 C0A6 0D536 0D536 17292+ CLC T272V1,T272V1
00D4EA D51D C0A6 C0A6 0D536 0D536 17293+ CLC T272V1,T272V1
00D4F0 D51D C0A6 C0A6 0D536 0D536 17294+ CLC T272V1,T272V1
00D4F6 D51D C0A6 C0A6 0D536 0D536 17295+ CLC T272V1,T272V1
00D4FC D51D C0A6 C0A6 0D536 0D536 17296+ CLC T272V1,T272V1
00D502 D51D C0A6 C0A6 0D536 0D536 17297+ CLC T272V1,T272V1
00D508 D51D C0A6 C0A6 0D536 0D536 17298+ CLC T272V1,T272V1
00D50E D51D C0A6 C0A6 0D536 0D536 17299+ CLC T272V1,T272V1
00D514 D51D C0A6 C0A6 0D536 0D536 17300+ CLC T272V1,T272V1
00D51A D51D C0A6 C0A6 0D536 0D536 17301+ CLC T272V1,T272V1
00D520 D51D C0A6 C0A6 0D536 0D536 17302+ CLC T272V1,T272V1
17303+*
00D526 06FB 17304 BCTR R15,R11
17305 TSIMRET
00D528 58F0 C0C8 0D558 17306+ L R15,=A(SAVETST) R15 := current save area
00D52C 58DF 0004 00004 17307+ L R13,4(R15) get old save area back
00D530 98EC D00C 0000C 17308+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00D534 07FE 17309+ BR 14 RETURN 02000000
17310 *
00D536 F1F2F3F4F5F6F7F8 17311 T272V1 DC C'123456789012345678901234567890'
17312 TSIMEND
00D558 17313+ LTORG
00D558 00000458 17314 =A(SAVETST)
0D55C 17315+T272TEND EQU *
17316 *
17317 * Test 273 -- CLC m,m (30c,ne)------------------------------
17318 *
17319 TSIMBEG T273,8000,20,1,C'CLC m,m (30c,ne)'
17320+*
003284 17321+TDSCDAT CSECT
003288 17322+ DS 0D
17323+*
003288 0000D560 17324+T273TDSC DC A(T273) // TENTRY
00328C 000000EC 17325+ DC A(T273TEND-T273) // TLENGTH
003290 00001F40 17326+ DC F'8000' // TLRCNT
003294 00000014 17327+ DC F'20' // TIGCNT
003298 00000001 17328+ DC F'1' // TLTYPE
001656 17329+TEXT CSECT
001656 E3F2F7F3 17330+SPTR1444 DC C'T273'
00329C 17331+TDSCDAT CSECT
00329C 17332+ DS 0F
00329C 04001656 17333+ DC AL1(L'SPTR1444),AL3(SPTR1444)
00165A 17334+TEXT CSECT
00165A C3D3C340946B9440 17335+SPTR1445 DC C'CLC m,m (30c,ne)'
0032A0 17336+TDSCDAT CSECT
0032A0 17337+ DS 0F
0032A0 1000165A 17338+ DC AL1(L'SPTR1445),AL3(SPTR1445)
17339+*
004B7C 17340+TDSCTBL CSECT
04B7C 17341+T273TPTR EQU *
004B7C 00003288 17342+ DC A(T273TDSC) enabled test
17343+*
00D55C 17344+TCODE CSECT
PAGE 318
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00D560 17345+ DS 0D ensure double word alignment for test
00D560 17346+T273 DS 0H 01650000
00D560 90EC D00C 0000C 17347+ STM 14,12,12(13) SAVE REGISTERS 02950000
00D564 18CF 17348+ LR R12,R15 base register := entry address
0D560 17349+ USING T273,R12 declare code base register
00D566 41B0 C01E 0D57E 17350+ LA R11,T273L load loop target to R11
00D56A 58F0 C0E8 0D648 17351+ L R15,=A(SAVETST) R15 := current save area
00D56E 50DF 0004 00004 17352+ ST R13,4(R15) set back pointer in current save area
00D572 182D 17353+ LR R2,R13 remember callers save area
00D574 18DF 17354+ LR R13,R15 setup current save area
00D576 50D2 0008 00008 17355+ ST R13,8(R2) set forw pointer in callers save area
00000 17356+ USING TDSC,R1 declare TDSC base register
00D57A 58F0 1008 00008 17357+ L R15,TLRCNT load local repeat count to R15
17358+*
17359 *
17360 T273L REPINS CLC,(T273V1,T273V2) repeat: CLC T273V1,T273V2
17361+*
17362+* build from sublist &ALIST a comma separated string &ARGS
17363+*
17364+*
17365+*
17366+*
17367+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
17368+* this allows to transfer the repeat count from last TDSCGEN call
17369+*
17370+*
0D57E 17371+T273L EQU *
17372+*
17373+* write a comment indicating what REPINS does (in case NOGEN in effect)
17374+*
17375+*,// REPINS: do 20 times:
17376+*
17377+* MNOTE requires that ' is doubled for expanded variables
17378+* thus build &MASTR as a copy of '&ARGS with ' doubled
17379+*
17380+*
17381+*,// CLC T273V1,T273V2
17382+*
17383+* finally generate code: &ICNT copies of &CODE &ARGS
17384+*
00D57E D51D C0A6 C0C4 0D606 0D624 17385+ CLC T273V1,T273V2
00D584 D51D C0A6 C0C4 0D606 0D624 17386+ CLC T273V1,T273V2
00D58A D51D C0A6 C0C4 0D606 0D624 17387+ CLC T273V1,T273V2
00D590 D51D C0A6 C0C4 0D606 0D624 17388+ CLC T273V1,T273V2
00D596 D51D C0A6 C0C4 0D606 0D624 17389+ CLC T273V1,T273V2
00D59C D51D C0A6 C0C4 0D606 0D624 17390+ CLC T273V1,T273V2
00D5A2 D51D C0A6 C0C4 0D606 0D624 17391+ CLC T273V1,T273V2
00D5A8 D51D C0A6 C0C4 0D606 0D624 17392+ CLC T273V1,T273V2
00D5AE D51D C0A6 C0C4 0D606 0D624 17393+ CLC T273V1,T273V2
00D5B4 D51D C0A6 C0C4 0D606 0D624 17394+ CLC T273V1,T273V2
00D5BA D51D C0A6 C0C4 0D606 0D624 17395+ CLC T273V1,T273V2
00D5C0 D51D C0A6 C0C4 0D606 0D624 17396+ CLC T273V1,T273V2
00D5C6 D51D C0A6 C0C4 0D606 0D624 17397+ CLC T273V1,T273V2
00D5CC D51D C0A6 C0C4 0D606 0D624 17398+ CLC T273V1,T273V2
00D5D2 D51D C0A6 C0C4 0D606 0D624 17399+ CLC T273V1,T273V2
PAGE 319
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00D5D8 D51D C0A6 C0C4 0D606 0D624 17400+ CLC T273V1,T273V2
00D5DE D51D C0A6 C0C4 0D606 0D624 17401+ CLC T273V1,T273V2
00D5E4 D51D C0A6 C0C4 0D606 0D624 17402+ CLC T273V1,T273V2
00D5EA D51D C0A6 C0C4 0D606 0D624 17403+ CLC T273V1,T273V2
00D5F0 D51D C0A6 C0C4 0D606 0D624 17404+ CLC T273V1,T273V2
17405+*
00D5F6 06FB 17406 BCTR R15,R11
17407 TSIMRET
00D5F8 58F0 C0E8 0D648 17408+ L R15,=A(SAVETST) R15 := current save area
00D5FC 58DF 0004 00004 17409+ L R13,4(R15) get old save area back
00D600 98EC D00C 0000C 17410+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00D604 07FE 17411+ BR 14 RETURN 02000000
17412 *
00D606 F1F2F3F4F5F6F7F8 17413 T273V1 DC C'123456789012345678901234567890'
00D624 F2F3F4F5F6F7F8F9 17414 T273V2 DC C'234567890123456789012345678901'
17415 TSIMEND
00D648 17416+ LTORG
00D648 00000458 17417 =A(SAVETST)
0D64C 17418+T273TEND EQU *
17419 *
17420 * Test 274 -- CLC m,m (100c,eq)-----------------------------
17421 *
17422 TSIMBEG T274,2900,20,1,C'CLC m,m (100c,eq)'
17423+*
0032A4 17424+TDSCDAT CSECT
0032A8 17425+ DS 0D
17426+*
0032A8 0000D650 17427+T274TDSC DC A(T274) // TENTRY
0032AC 00000174 17428+ DC A(T274TEND-T274) // TLENGTH
0032B0 00000B54 17429+ DC F'2900' // TLRCNT
0032B4 00000014 17430+ DC F'20' // TIGCNT
0032B8 00000001 17431+ DC F'1' // TLTYPE
00166A 17432+TEXT CSECT
00166A E3F2F7F4 17433+SPTR1456 DC C'T274'
0032BC 17434+TDSCDAT CSECT
0032BC 17435+ DS 0F
0032BC 0400166A 17436+ DC AL1(L'SPTR1456),AL3(SPTR1456)
00166E 17437+TEXT CSECT
00166E C3D3C340946B9440 17438+SPTR1457 DC C'CLC m,m (100c,eq)'
0032C0 17439+TDSCDAT CSECT
0032C0 17440+ DS 0F
0032C0 1100166E 17441+ DC AL1(L'SPTR1457),AL3(SPTR1457)
17442+*
004B80 17443+TDSCTBL CSECT
04B80 17444+T274TPTR EQU *
004B80 000032A8 17445+ DC A(T274TDSC) enabled test
17446+*
00D64C 17447+TCODE CSECT
00D650 17448+ DS 0D ensure double word alignment for test
00D650 17449+T274 DS 0H 01650000
00D650 90EC D00C 0000C 17450+ STM 14,12,12(13) SAVE REGISTERS 02950000
00D654 18CF 17451+ LR R12,R15 base register := entry address
0D650 17452+ USING T274,R12 declare code base register
00D656 41B0 C01E 0D66E 17453+ LA R11,T274L load loop target to R11
00D65A 58F0 C170 0D7C0 17454+ L R15,=A(SAVETST) R15 := current save area
PAGE 320
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00D65E 50DF 0004 00004 17455+ ST R13,4(R15) set back pointer in current save area
00D662 182D 17456+ LR R2,R13 remember callers save area
00D664 18DF 17457+ LR R13,R15 setup current save area
00D666 50D2 0008 00008 17458+ ST R13,8(R2) set forw pointer in callers save area
00000 17459+ USING TDSC,R1 declare TDSC base register
00D66A 58F0 1008 00008 17460+ L R15,TLRCNT load local repeat count to R15
17461+*
17462 *
17463 T274L REPINS CLC,(T274V1(100),T274V2) repeat: CLC T274V1(100),T274V2
17464+*
17465+* build from sublist &ALIST a comma separated string &ARGS
17466+*
17467+*
17468+*
17469+*
17470+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
17471+* this allows to transfer the repeat count from last TDSCGEN call
17472+*
17473+*
0D66E 17474+T274L EQU *
17475+*
17476+* write a comment indicating what REPINS does (in case NOGEN in effect)
17477+*
17478+*,// REPINS: do 20 times:
17479+*
17480+* MNOTE requires that ' is doubled for expanded variables
17481+* thus build &MASTR as a copy of '&ARGS with ' doubled
17482+*
17483+*
17484+*,// CLC T274V1(100),T274V2
17485+*
17486+* finally generate code: &ICNT copies of &CODE &ARGS
17487+*
00D66E D563 C0A6 C10A 0D6F6 0D75A 17488+ CLC T274V1(100),T274V2
00D674 D563 C0A6 C10A 0D6F6 0D75A 17489+ CLC T274V1(100),T274V2
00D67A D563 C0A6 C10A 0D6F6 0D75A 17490+ CLC T274V1(100),T274V2
00D680 D563 C0A6 C10A 0D6F6 0D75A 17491+ CLC T274V1(100),T274V2
00D686 D563 C0A6 C10A 0D6F6 0D75A 17492+ CLC T274V1(100),T274V2
00D68C D563 C0A6 C10A 0D6F6 0D75A 17493+ CLC T274V1(100),T274V2
00D692 D563 C0A6 C10A 0D6F6 0D75A 17494+ CLC T274V1(100),T274V2
00D698 D563 C0A6 C10A 0D6F6 0D75A 17495+ CLC T274V1(100),T274V2
00D69E D563 C0A6 C10A 0D6F6 0D75A 17496+ CLC T274V1(100),T274V2
00D6A4 D563 C0A6 C10A 0D6F6 0D75A 17497+ CLC T274V1(100),T274V2
00D6AA D563 C0A6 C10A 0D6F6 0D75A 17498+ CLC T274V1(100),T274V2
00D6B0 D563 C0A6 C10A 0D6F6 0D75A 17499+ CLC T274V1(100),T274V2
00D6B6 D563 C0A6 C10A 0D6F6 0D75A 17500+ CLC T274V1(100),T274V2
00D6BC D563 C0A6 C10A 0D6F6 0D75A 17501+ CLC T274V1(100),T274V2
00D6C2 D563 C0A6 C10A 0D6F6 0D75A 17502+ CLC T274V1(100),T274V2
00D6C8 D563 C0A6 C10A 0D6F6 0D75A 17503+ CLC T274V1(100),T274V2
00D6CE D563 C0A6 C10A 0D6F6 0D75A 17504+ CLC T274V1(100),T274V2
00D6D4 D563 C0A6 C10A 0D6F6 0D75A 17505+ CLC T274V1(100),T274V2
00D6DA D563 C0A6 C10A 0D6F6 0D75A 17506+ CLC T274V1(100),T274V2
00D6E0 D563 C0A6 C10A 0D6F6 0D75A 17507+ CLC T274V1(100),T274V2
17508+*
00D6E6 06FB 17509 BCTR R15,R11
PAGE 321
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
17510 TSIMRET
00D6E8 58F0 C170 0D7C0 17511+ L R15,=A(SAVETST) R15 := current save area
00D6EC 58DF 0004 00004 17512+ L R13,4(R15) get old save area back
00D6F0 98EC D00C 0000C 17513+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00D6F4 07FE 17514+ BR 14 RETURN 02000000
17515 *
00D6F6 E7E7E7E7E7E7E7E7 17516 T274V1 DC 100C'X'
00D75A E7E7E7E7E7E7E7E7 17517 T274V2 DC 100C'X'
17518 TSIMEND
00D7C0 17519+ LTORG
00D7C0 00000458 17520 =A(SAVETST)
0D7C4 17521+T274TEND EQU *
17522 *
17523 * Test 275 -- CLC m,m (100c,ne)-----------------------------
17524 *
17525 TSIMBEG T275,8000,20,1,C'CLC m,m (100c,ne)'
17526+*
0032C4 17527+TDSCDAT CSECT
0032C8 17528+ DS 0D
17529+*
0032C8 0000D7C8 17530+T275TDSC DC A(T275) // TENTRY
0032CC 00000174 17531+ DC A(T275TEND-T275) // TLENGTH
0032D0 00001F40 17532+ DC F'8000' // TLRCNT
0032D4 00000014 17533+ DC F'20' // TIGCNT
0032D8 00000001 17534+ DC F'1' // TLTYPE
00167F 17535+TEXT CSECT
00167F E3F2F7F5 17536+SPTR1468 DC C'T275'
0032DC 17537+TDSCDAT CSECT
0032DC 17538+ DS 0F
0032DC 0400167F 17539+ DC AL1(L'SPTR1468),AL3(SPTR1468)
001683 17540+TEXT CSECT
001683 C3D3C340946B9440 17541+SPTR1469 DC C'CLC m,m (100c,ne)'
0032E0 17542+TDSCDAT CSECT
0032E0 17543+ DS 0F
0032E0 11001683 17544+ DC AL1(L'SPTR1469),AL3(SPTR1469)
17545+*
004B84 17546+TDSCTBL CSECT
04B84 17547+T275TPTR EQU *
004B84 000032C8 17548+ DC A(T275TDSC) enabled test
17549+*
00D7C4 17550+TCODE CSECT
00D7C8 17551+ DS 0D ensure double word alignment for test
00D7C8 17552+T275 DS 0H 01650000
00D7C8 90EC D00C 0000C 17553+ STM 14,12,12(13) SAVE REGISTERS 02950000
00D7CC 18CF 17554+ LR R12,R15 base register := entry address
0D7C8 17555+ USING T275,R12 declare code base register
00D7CE 41B0 C01E 0D7E6 17556+ LA R11,T275L load loop target to R11
00D7D2 58F0 C170 0D938 17557+ L R15,=A(SAVETST) R15 := current save area
00D7D6 50DF 0004 00004 17558+ ST R13,4(R15) set back pointer in current save area
00D7DA 182D 17559+ LR R2,R13 remember callers save area
00D7DC 18DF 17560+ LR R13,R15 setup current save area
00D7DE 50D2 0008 00008 17561+ ST R13,8(R2) set forw pointer in callers save area
00000 17562+ USING TDSC,R1 declare TDSC base register
00D7E2 58F0 1008 00008 17563+ L R15,TLRCNT load local repeat count to R15
17564+*
PAGE 322
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
17565 *
17566 T275L REPINS CLC,(T275V1(100),T275V2) repeat: CLC T275V1(100),T275V2
17567+*
17568+* build from sublist &ALIST a comma separated string &ARGS
17569+*
17570+*
17571+*
17572+*
17573+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
17574+* this allows to transfer the repeat count from last TDSCGEN call
17575+*
17576+*
0D7E6 17577+T275L EQU *
17578+*
17579+* write a comment indicating what REPINS does (in case NOGEN in effect)
17580+*
17581+*,// REPINS: do 20 times:
17582+*
17583+* MNOTE requires that ' is doubled for expanded variables
17584+* thus build &MASTR as a copy of '&ARGS with ' doubled
17585+*
17586+*
17587+*,// CLC T275V1(100),T275V2
17588+*
17589+* finally generate code: &ICNT copies of &CODE &ARGS
17590+*
00D7E6 D563 C0A6 C10A 0D86E 0D8D2 17591+ CLC T275V1(100),T275V2
00D7EC D563 C0A6 C10A 0D86E 0D8D2 17592+ CLC T275V1(100),T275V2
00D7F2 D563 C0A6 C10A 0D86E 0D8D2 17593+ CLC T275V1(100),T275V2
00D7F8 D563 C0A6 C10A 0D86E 0D8D2 17594+ CLC T275V1(100),T275V2
00D7FE D563 C0A6 C10A 0D86E 0D8D2 17595+ CLC T275V1(100),T275V2
00D804 D563 C0A6 C10A 0D86E 0D8D2 17596+ CLC T275V1(100),T275V2
00D80A D563 C0A6 C10A 0D86E 0D8D2 17597+ CLC T275V1(100),T275V2
00D810 D563 C0A6 C10A 0D86E 0D8D2 17598+ CLC T275V1(100),T275V2
00D816 D563 C0A6 C10A 0D86E 0D8D2 17599+ CLC T275V1(100),T275V2
00D81C D563 C0A6 C10A 0D86E 0D8D2 17600+ CLC T275V1(100),T275V2
00D822 D563 C0A6 C10A 0D86E 0D8D2 17601+ CLC T275V1(100),T275V2
00D828 D563 C0A6 C10A 0D86E 0D8D2 17602+ CLC T275V1(100),T275V2
00D82E D563 C0A6 C10A 0D86E 0D8D2 17603+ CLC T275V1(100),T275V2
00D834 D563 C0A6 C10A 0D86E 0D8D2 17604+ CLC T275V1(100),T275V2
00D83A D563 C0A6 C10A 0D86E 0D8D2 17605+ CLC T275V1(100),T275V2
00D840 D563 C0A6 C10A 0D86E 0D8D2 17606+ CLC T275V1(100),T275V2
00D846 D563 C0A6 C10A 0D86E 0D8D2 17607+ CLC T275V1(100),T275V2
00D84C D563 C0A6 C10A 0D86E 0D8D2 17608+ CLC T275V1(100),T275V2
00D852 D563 C0A6 C10A 0D86E 0D8D2 17609+ CLC T275V1(100),T275V2
00D858 D563 C0A6 C10A 0D86E 0D8D2 17610+ CLC T275V1(100),T275V2
17611+*
00D85E 06FB 17612 BCTR R15,R11
17613 TSIMRET
00D860 58F0 C170 0D938 17614+ L R15,=A(SAVETST) R15 := current save area
00D864 58DF 0004 00004 17615+ L R13,4(R15) get old save area back
00D868 98EC D00C 0000C 17616+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00D86C 07FE 17617+ BR 14 RETURN 02000000
17618 *
00D86E E7E7E7E7E7E7E7E7 17619 T275V1 DC 100C'X'
PAGE 323
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00D8D2 E8E8E8E8E8E8E8E8 17620 T275V2 DC 100C'Y'
17621 TSIMEND
00D938 17622+ LTORG
00D938 00000458 17623 =A(SAVETST)
0D93C 17624+T275TEND EQU *
17625 *
17626 * Test 276 -- CLC m,m (250c,eq)-----------------------------
17627 *
17628 TSIMBEG T276,1500,20,1,C'CLC m,m (250c,eq)'
17629+*
0032E4 17630+TDSCDAT CSECT
0032E8 17631+ DS 0D
17632+*
0032E8 0000D940 17633+T276TDSC DC A(T276) // TENTRY
0032EC 000002A4 17634+ DC A(T276TEND-T276) // TLENGTH
0032F0 000005DC 17635+ DC F'1500' // TLRCNT
0032F4 00000014 17636+ DC F'20' // TIGCNT
0032F8 00000001 17637+ DC F'1' // TLTYPE
001694 17638+TEXT CSECT
001694 E3F2F7F6 17639+SPTR1480 DC C'T276'
0032FC 17640+TDSCDAT CSECT
0032FC 17641+ DS 0F
0032FC 04001694 17642+ DC AL1(L'SPTR1480),AL3(SPTR1480)
001698 17643+TEXT CSECT
001698 C3D3C340946B9440 17644+SPTR1481 DC C'CLC m,m (250c,eq)'
003300 17645+TDSCDAT CSECT
003300 17646+ DS 0F
003300 11001698 17647+ DC AL1(L'SPTR1481),AL3(SPTR1481)
17648+*
004B88 17649+TDSCTBL CSECT
04B88 17650+T276TPTR EQU *
004B88 000032E8 17651+ DC A(T276TDSC) enabled test
17652+*
00D93C 17653+TCODE CSECT
00D940 17654+ DS 0D ensure double word alignment for test
00D940 17655+T276 DS 0H 01650000
00D940 90EC D00C 0000C 17656+ STM 14,12,12(13) SAVE REGISTERS 02950000
00D944 18CF 17657+ LR R12,R15 base register := entry address
0D940 17658+ USING T276,R12 declare code base register
00D946 41B0 C01E 0D95E 17659+ LA R11,T276L load loop target to R11
00D94A 58F0 C2A0 0DBE0 17660+ L R15,=A(SAVETST) R15 := current save area
00D94E 50DF 0004 00004 17661+ ST R13,4(R15) set back pointer in current save area
00D952 182D 17662+ LR R2,R13 remember callers save area
00D954 18DF 17663+ LR R13,R15 setup current save area
00D956 50D2 0008 00008 17664+ ST R13,8(R2) set forw pointer in callers save area
00000 17665+ USING TDSC,R1 declare TDSC base register
00D95A 58F0 1008 00008 17666+ L R15,TLRCNT load local repeat count to R15
17667+*
17668 *
17669 T276L REPINS CLC,(T276V1(250),T276V2) repeat: CLC T276V1(250),T276V2
17670+*
17671+* build from sublist &ALIST a comma separated string &ARGS
17672+*
17673+*
17674+*
PAGE 324
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
17675+*
17676+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
17677+* this allows to transfer the repeat count from last TDSCGEN call
17678+*
17679+*
0D95E 17680+T276L EQU *
17681+*
17682+* write a comment indicating what REPINS does (in case NOGEN in effect)
17683+*
17684+*,// REPINS: do 20 times:
17685+*
17686+* MNOTE requires that ' is doubled for expanded variables
17687+* thus build &MASTR as a copy of '&ARGS with ' doubled
17688+*
17689+*
17690+*,// CLC T276V1(250),T276V2
17691+*
17692+* finally generate code: &ICNT copies of &CODE &ARGS
17693+*
00D95E D5F9 C0A6 C1A0 0D9E6 0DAE0 17694+ CLC T276V1(250),T276V2
00D964 D5F9 C0A6 C1A0 0D9E6 0DAE0 17695+ CLC T276V1(250),T276V2
00D96A D5F9 C0A6 C1A0 0D9E6 0DAE0 17696+ CLC T276V1(250),T276V2
00D970 D5F9 C0A6 C1A0 0D9E6 0DAE0 17697+ CLC T276V1(250),T276V2
00D976 D5F9 C0A6 C1A0 0D9E6 0DAE0 17698+ CLC T276V1(250),T276V2
00D97C D5F9 C0A6 C1A0 0D9E6 0DAE0 17699+ CLC T276V1(250),T276V2
00D982 D5F9 C0A6 C1A0 0D9E6 0DAE0 17700+ CLC T276V1(250),T276V2
00D988 D5F9 C0A6 C1A0 0D9E6 0DAE0 17701+ CLC T276V1(250),T276V2
00D98E D5F9 C0A6 C1A0 0D9E6 0DAE0 17702+ CLC T276V1(250),T276V2
00D994 D5F9 C0A6 C1A0 0D9E6 0DAE0 17703+ CLC T276V1(250),T276V2
00D99A D5F9 C0A6 C1A0 0D9E6 0DAE0 17704+ CLC T276V1(250),T276V2
00D9A0 D5F9 C0A6 C1A0 0D9E6 0DAE0 17705+ CLC T276V1(250),T276V2
00D9A6 D5F9 C0A6 C1A0 0D9E6 0DAE0 17706+ CLC T276V1(250),T276V2
00D9AC D5F9 C0A6 C1A0 0D9E6 0DAE0 17707+ CLC T276V1(250),T276V2
00D9B2 D5F9 C0A6 C1A0 0D9E6 0DAE0 17708+ CLC T276V1(250),T276V2
00D9B8 D5F9 C0A6 C1A0 0D9E6 0DAE0 17709+ CLC T276V1(250),T276V2
00D9BE D5F9 C0A6 C1A0 0D9E6 0DAE0 17710+ CLC T276V1(250),T276V2
00D9C4 D5F9 C0A6 C1A0 0D9E6 0DAE0 17711+ CLC T276V1(250),T276V2
00D9CA D5F9 C0A6 C1A0 0D9E6 0DAE0 17712+ CLC T276V1(250),T276V2
00D9D0 D5F9 C0A6 C1A0 0D9E6 0DAE0 17713+ CLC T276V1(250),T276V2
17714+*
00D9D6 06FB 17715 BCTR R15,R11
17716 TSIMRET
00D9D8 58F0 C2A0 0DBE0 17717+ L R15,=A(SAVETST) R15 := current save area
00D9DC 58DF 0004 00004 17718+ L R13,4(R15) get old save area back
00D9E0 98EC D00C 0000C 17719+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00D9E4 07FE 17720+ BR 14 RETURN 02000000
17721 *
00D9E6 E7E7E7E7E7E7E7E7 17722 T276V1 DC 250C'X'
00DAE0 E7E7E7E7E7E7E7E7 17723 T276V2 DC 250C'X'
17724 TSIMEND
00DBE0 17725+ LTORG
00DBE0 00000458 17726 =A(SAVETST)
0DBE4 17727+T276TEND EQU *
17728 *
17729 * Test 277 -- CLC m,m (250c,ne)-----------------------------
PAGE 325
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
17730 *
17731 TSIMBEG T277,8000,20,1,C'CLC m,m (250c,ne)'
17732+*
003304 17733+TDSCDAT CSECT
003308 17734+ DS 0D
17735+*
003308 0000DBE8 17736+T277TDSC DC A(T277) // TENTRY
00330C 000002A4 17737+ DC A(T277TEND-T277) // TLENGTH
003310 00001F40 17738+ DC F'8000' // TLRCNT
003314 00000014 17739+ DC F'20' // TIGCNT
003318 00000001 17740+ DC F'1' // TLTYPE
0016A9 17741+TEXT CSECT
0016A9 E3F2F7F7 17742+SPTR1492 DC C'T277'
00331C 17743+TDSCDAT CSECT
00331C 17744+ DS 0F
00331C 040016A9 17745+ DC AL1(L'SPTR1492),AL3(SPTR1492)
0016AD 17746+TEXT CSECT
0016AD C3D3C340946B9440 17747+SPTR1493 DC C'CLC m,m (250c,ne)'
003320 17748+TDSCDAT CSECT
003320 17749+ DS 0F
003320 110016AD 17750+ DC AL1(L'SPTR1493),AL3(SPTR1493)
17751+*
004B8C 17752+TDSCTBL CSECT
04B8C 17753+T277TPTR EQU *
004B8C 00003308 17754+ DC A(T277TDSC) enabled test
17755+*
00DBE4 17756+TCODE CSECT
00DBE8 17757+ DS 0D ensure double word alignment for test
00DBE8 17758+T277 DS 0H 01650000
00DBE8 90EC D00C 0000C 17759+ STM 14,12,12(13) SAVE REGISTERS 02950000
00DBEC 18CF 17760+ LR R12,R15 base register := entry address
0DBE8 17761+ USING T277,R12 declare code base register
00DBEE 41B0 C01E 0DC06 17762+ LA R11,T277L load loop target to R11
00DBF2 58F0 C2A0 0DE88 17763+ L R15,=A(SAVETST) R15 := current save area
00DBF6 50DF 0004 00004 17764+ ST R13,4(R15) set back pointer in current save area
00DBFA 182D 17765+ LR R2,R13 remember callers save area
00DBFC 18DF 17766+ LR R13,R15 setup current save area
00DBFE 50D2 0008 00008 17767+ ST R13,8(R2) set forw pointer in callers save area
00000 17768+ USING TDSC,R1 declare TDSC base register
00DC02 58F0 1008 00008 17769+ L R15,TLRCNT load local repeat count to R15
17770+*
17771 *
17772 T277L REPINS CLC,(T277V1(250),T277V2) repeat: CLC T277V1(250),T277V2
17773+*
17774+* build from sublist &ALIST a comma separated string &ARGS
17775+*
17776+*
17777+*
17778+*
17779+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
17780+* this allows to transfer the repeat count from last TDSCGEN call
17781+*
17782+*
0DC06 17783+T277L EQU *
17784+*
PAGE 326
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
17785+* write a comment indicating what REPINS does (in case NOGEN in effect)
17786+*
17787+*,// REPINS: do 20 times:
17788+*
17789+* MNOTE requires that ' is doubled for expanded variables
17790+* thus build &MASTR as a copy of '&ARGS with ' doubled
17791+*
17792+*
17793+*,// CLC T277V1(250),T277V2
17794+*
17795+* finally generate code: &ICNT copies of &CODE &ARGS
17796+*
00DC06 D5F9 C0A6 C1A0 0DC8E 0DD88 17797+ CLC T277V1(250),T277V2
00DC0C D5F9 C0A6 C1A0 0DC8E 0DD88 17798+ CLC T277V1(250),T277V2
00DC12 D5F9 C0A6 C1A0 0DC8E 0DD88 17799+ CLC T277V1(250),T277V2
00DC18 D5F9 C0A6 C1A0 0DC8E 0DD88 17800+ CLC T277V1(250),T277V2
00DC1E D5F9 C0A6 C1A0 0DC8E 0DD88 17801+ CLC T277V1(250),T277V2
00DC24 D5F9 C0A6 C1A0 0DC8E 0DD88 17802+ CLC T277V1(250),T277V2
00DC2A D5F9 C0A6 C1A0 0DC8E 0DD88 17803+ CLC T277V1(250),T277V2
00DC30 D5F9 C0A6 C1A0 0DC8E 0DD88 17804+ CLC T277V1(250),T277V2
00DC36 D5F9 C0A6 C1A0 0DC8E 0DD88 17805+ CLC T277V1(250),T277V2
00DC3C D5F9 C0A6 C1A0 0DC8E 0DD88 17806+ CLC T277V1(250),T277V2
00DC42 D5F9 C0A6 C1A0 0DC8E 0DD88 17807+ CLC T277V1(250),T277V2
00DC48 D5F9 C0A6 C1A0 0DC8E 0DD88 17808+ CLC T277V1(250),T277V2
00DC4E D5F9 C0A6 C1A0 0DC8E 0DD88 17809+ CLC T277V1(250),T277V2
00DC54 D5F9 C0A6 C1A0 0DC8E 0DD88 17810+ CLC T277V1(250),T277V2
00DC5A D5F9 C0A6 C1A0 0DC8E 0DD88 17811+ CLC T277V1(250),T277V2
00DC60 D5F9 C0A6 C1A0 0DC8E 0DD88 17812+ CLC T277V1(250),T277V2
00DC66 D5F9 C0A6 C1A0 0DC8E 0DD88 17813+ CLC T277V1(250),T277V2
00DC6C D5F9 C0A6 C1A0 0DC8E 0DD88 17814+ CLC T277V1(250),T277V2
00DC72 D5F9 C0A6 C1A0 0DC8E 0DD88 17815+ CLC T277V1(250),T277V2
00DC78 D5F9 C0A6 C1A0 0DC8E 0DD88 17816+ CLC T277V1(250),T277V2
17817+*
00DC7E 06FB 17818 BCTR R15,R11
17819 TSIMRET
00DC80 58F0 C2A0 0DE88 17820+ L R15,=A(SAVETST) R15 := current save area
00DC84 58DF 0004 00004 17821+ L R13,4(R15) get old save area back
00DC88 98EC D00C 0000C 17822+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00DC8C 07FE 17823+ BR 14 RETURN 02000000
17824 *
00DC8E E7E7E7E7E7E7E7E7 17825 T277V1 DC 250C'X'
00DD88 E8E8E8E8E8E8E8E8 17826 T277V2 DC 250C'Y'
17827 TSIMEND
00DE88 17828+ LTORG
00DE88 00000458 17829 =A(SAVETST)
0DE8C 17830+T277TEND EQU *
17831 *
17832 * Test 28x -- CLCL =========================================
17833 *
17834 * Test 280 -- CLCL m,m (100b,10b) --------------------------
17835 *
17836 TSIMBEG T280,4500,10,1,C'4*LR;CLCL (100b,10b)'
17837+*
003324 17838+TDSCDAT CSECT
003328 17839+ DS 0D
PAGE 327
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
17840+*
003328 0000DE90 17841+T280TDSC DC A(T280) // TENTRY
00332C 000000D8 17842+ DC A(T280TEND-T280) // TLENGTH
003330 00001194 17843+ DC F'4500' // TLRCNT
003334 0000000A 17844+ DC F'10' // TIGCNT
003338 00000001 17845+ DC F'1' // TLTYPE
0016BE 17846+TEXT CSECT
0016BE E3F2F8F0 17847+SPTR1504 DC C'T280'
00333C 17848+TDSCDAT CSECT
00333C 17849+ DS 0F
00333C 040016BE 17850+ DC AL1(L'SPTR1504),AL3(SPTR1504)
0016C2 17851+TEXT CSECT
0016C2 F45CD3D95EC3D3C3 17852+SPTR1505 DC C'4*LR;CLCL (100b,10b)'
003340 17853+TDSCDAT CSECT
003340 17854+ DS 0F
003340 140016C2 17855+ DC AL1(L'SPTR1505),AL3(SPTR1505)
17856+*
004B90 17857+TDSCTBL CSECT
04B90 17858+T280TPTR EQU *
004B90 00003328 17859+ DC A(T280TDSC) enabled test
17860+*
00DE8C 17861+TCODE CSECT
00DE90 17862+ DS 0D ensure double word alignment for test
00DE90 17863+T280 DS 0H 01650000
00DE90 90EC D00C 0000C 17864+ STM 14,12,12(13) SAVE REGISTERS 02950000
00DE94 18CF 17865+ LR R12,R15 base register := entry address
0DE90 17866+ USING T280,R12 declare code base register
00DE96 41B0 C054 0DEE4 17867+ LA R11,T280L load loop target to R11
00DE9A 58F0 C0C8 0DF58 17868+ L R15,=A(SAVETST) R15 := current save area
00DE9E 50DF 0004 00004 17869+ ST R13,4(R15) set back pointer in current save area
00DEA2 182D 17870+ LR R2,R13 remember callers save area
00DEA4 18DF 17871+ LR R13,R15 setup current save area
00DEA6 50D2 0008 00008 17872+ ST R13,8(R2) set forw pointer in callers save area
00000 17873+ USING TDSC,R1 declare TDSC base register
00DEAA 58F0 1008 00008 17874+ L R15,TLRCNT load local repeat count to R15
17875+*
17876 *
17877 * use sequence
17878 * LR R2,R6 dest addr
17879 * LR R3,R7 dest length
17880 * LR R4,R8 source addr
17881 * LR R5,R7 source length
17882 * CLCL R2,R4 doit
17883 *
00DEAE 5860 C0CC 0DF5C 17884 L R6,=A(PBUF4K1) get ptr to ptr
00DEB2 5866 0000 00000 17885 L R6,0(R6) get ptr to BUF4K1
00DEB6 5880 C0D0 0DF60 17886 L R8,=A(PBUF4K2) get ptr to ptr
00DEBA 5888 0000 00000 17887 L R8,0(R8) get ptr to BUF4K2
00DEBE 5870 C0D4 0DF64 17888 L R7,=F'100' transfer length
17889 *
00DEC2 1826 17890 LR R2,R6 dst = BUF4K1
00DEC4 1837 17891 LR R3,R7 length = 100
00DEC6 4140 0000 00000 17892 LA R4,0 setup zero fill
00DECA 4150 0000 00000 17893 LA R5,0
00DECE 0E24 17894 MVCL R2,R4 clear BUF4K1 (dst)
PAGE 328
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00DED0 1828 17895 LR R2,R8 dst = BUF4K2
00DED2 1837 17896 LR R3,R7 length = 100
00DED4 4140 0000 00000 17897 LA R4,0 setup zero fill
00DED8 4150 0000 00000 17898 LA R5,0
00DEDC 0E24 17899 MVCL R2,R4 clear BUF4K2 (src)
00DEDE 1826 17900 LR R2,R6
00DEE0 92FF 600A 0000A 17901 MVI 10(R6),X'FF' and set src[10] to 0xff
17902 *
17903 T280L REPINSN LR,(R2,R6),LR,(R3,R7), X
LR,(R4,R8),LR,(R5,R7), X
CLCL,(R2,R4)
17904+*
17905+* build from sublist &ALIST* a comma separated string &ARGS*
17906+*
17907+*
17908+*
17909+*
17910+*
17911+*
17912+*
17913+*
17914+*
17915+*
17916+*
17917+*
0DEE4 17918+T280L EQU *
17919+*
17920+*
17921+* write a comment indicating what REPINSN does (if NOGEN in effect)
17922+*
17923+*,// REPINSN: do 10 times:
17924+*
17925+* MNOTE requires that ' is doubled for expanded variables
17926+* thus build &MASTR as a copy of '&ARGS with ' doubled
17927+*
17928+*
17929+*,// LR R2,R6
17930+*
17931+* MNOTE requires that ' is doubled for expanded variables
17932+* thus build &MASTR as a copy of '&ARGS with ' doubled
17933+*
17934+*
17935+*,// LR R3,R7
17936+*
17937+* MNOTE requires that ' is doubled for expanded variables
17938+* thus build &MASTR as a copy of '&ARGS with ' doubled
17939+*
17940+*
17941+*,// LR R4,R8
17942+*
17943+* MNOTE requires that ' is doubled for expanded variables
17944+* thus build &MASTR as a copy of '&ARGS with ' doubled
17945+*
17946+*
17947+*,// LR R5,R7
PAGE 329
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
17948+*
17949+* MNOTE requires that ' is doubled for expanded variables
17950+* thus build &MASTR as a copy of '&ARGS with ' doubled
17951+*
17952+*
17953+*,// CLCL R2,R4
17954+*
17955+* finally generate code: &ICNT copies of &CO1 ...
17956+*
00DEE4 1826 17957+ LR R2,R6
00DEE6 1837 17958+ LR R3,R7
00DEE8 1848 17959+ LR R4,R8
00DEEA 1857 17960+ LR R5,R7
00DEEC 0F24 17961+ CLCL R2,R4
00DEEE 1826 17962+ LR R2,R6
00DEF0 1837 17963+ LR R3,R7
00DEF2 1848 17964+ LR R4,R8
00DEF4 1857 17965+ LR R5,R7
00DEF6 0F24 17966+ CLCL R2,R4
00DEF8 1826 17967+ LR R2,R6
00DEFA 1837 17968+ LR R3,R7
00DEFC 1848 17969+ LR R4,R8
00DEFE 1857 17970+ LR R5,R7
00DF00 0F24 17971+ CLCL R2,R4
00DF02 1826 17972+ LR R2,R6
00DF04 1837 17973+ LR R3,R7
00DF06 1848 17974+ LR R4,R8
00DF08 1857 17975+ LR R5,R7
00DF0A 0F24 17976+ CLCL R2,R4
00DF0C 1826 17977+ LR R2,R6
00DF0E 1837 17978+ LR R3,R7
00DF10 1848 17979+ LR R4,R8
00DF12 1857 17980+ LR R5,R7
00DF14 0F24 17981+ CLCL R2,R4
00DF16 1826 17982+ LR R2,R6
00DF18 1837 17983+ LR R3,R7
00DF1A 1848 17984+ LR R4,R8
00DF1C 1857 17985+ LR R5,R7
00DF1E 0F24 17986+ CLCL R2,R4
00DF20 1826 17987+ LR R2,R6
00DF22 1837 17988+ LR R3,R7
00DF24 1848 17989+ LR R4,R8
00DF26 1857 17990+ LR R5,R7
00DF28 0F24 17991+ CLCL R2,R4
00DF2A 1826 17992+ LR R2,R6
00DF2C 1837 17993+ LR R3,R7
00DF2E 1848 17994+ LR R4,R8
00DF30 1857 17995+ LR R5,R7
00DF32 0F24 17996+ CLCL R2,R4
00DF34 1826 17997+ LR R2,R6
00DF36 1837 17998+ LR R3,R7
00DF38 1848 17999+ LR R4,R8
00DF3A 1857 18000+ LR R5,R7
00DF3C 0F24 18001+ CLCL R2,R4
00DF3E 1826 18002+ LR R2,R6
PAGE 330
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00DF40 1837 18003+ LR R3,R7
00DF42 1848 18004+ LR R4,R8
00DF44 1857 18005+ LR R5,R7
00DF46 0F24 18006+ CLCL R2,R4
18007+*
00DF48 06FB 18008 BCTR R15,R11
18009 TSIMRET
00DF4A 58F0 C0C8 0DF58 18010+ L R15,=A(SAVETST) R15 := current save area
00DF4E 58DF 0004 00004 18011+ L R13,4(R15) get old save area back
00DF52 98EC D00C 0000C 18012+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00DF56 07FE 18013+ BR 14 RETURN 02000000
18014 TSIMEND
00DF58 18015+ LTORG
00DF58 00000458 18016 =A(SAVETST)
00DF5C 000004B4 18017 =A(PBUF4K1)
00DF60 000004B8 18018 =A(PBUF4K2)
00DF64 00000064 18019 =F'100'
0DF68 18020+T280TEND EQU *
18021 *
18022 * Test 281 -- CLCL m,m (4kb,10b) ---------------------------
18023 *
18024 TSIMBEG T281,4500,10,1,C'4*LR;CLCL (4kb,10b)'
18025+*
003344 18026+TDSCDAT CSECT
003348 18027+ DS 0D
18028+*
003348 0000DF68 18029+T281TDSC DC A(T281) // TENTRY
00334C 000000D8 18030+ DC A(T281TEND-T281) // TLENGTH
003350 00001194 18031+ DC F'4500' // TLRCNT
003354 0000000A 18032+ DC F'10' // TIGCNT
003358 00000001 18033+ DC F'1' // TLTYPE
0016D6 18034+TEXT CSECT
0016D6 E3F2F8F1 18035+SPTR1524 DC C'T281'
00335C 18036+TDSCDAT CSECT
00335C 18037+ DS 0F
00335C 040016D6 18038+ DC AL1(L'SPTR1524),AL3(SPTR1524)
0016DA 18039+TEXT CSECT
0016DA F45CD3D95EC3D3C3 18040+SPTR1525 DC C'4*LR;CLCL (4kb,10b)'
003360 18041+TDSCDAT CSECT
003360 18042+ DS 0F
003360 130016DA 18043+ DC AL1(L'SPTR1525),AL3(SPTR1525)
18044+*
004B94 18045+TDSCTBL CSECT
04B94 18046+T281TPTR EQU *
004B94 00003348 18047+ DC A(T281TDSC) enabled test
18048+*
00DF68 18049+TCODE CSECT
00DF68 18050+ DS 0D ensure double word alignment for test
00DF68 18051+T281 DS 0H 01650000
00DF68 90EC D00C 0000C 18052+ STM 14,12,12(13) SAVE REGISTERS 02950000
00DF6C 18CF 18053+ LR R12,R15 base register := entry address
0DF68 18054+ USING T281,R12 declare code base register
00DF6E 41B0 C054 0DFBC 18055+ LA R11,T281L load loop target to R11
00DF72 58F0 C0C8 0E030 18056+ L R15,=A(SAVETST) R15 := current save area
00DF76 50DF 0004 00004 18057+ ST R13,4(R15) set back pointer in current save area
PAGE 331
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00DF7A 182D 18058+ LR R2,R13 remember callers save area
00DF7C 18DF 18059+ LR R13,R15 setup current save area
00DF7E 50D2 0008 00008 18060+ ST R13,8(R2) set forw pointer in callers save area
00000 18061+ USING TDSC,R1 declare TDSC base register
00DF82 58F0 1008 00008 18062+ L R15,TLRCNT load local repeat count to R15
18063+*
18064 *
18065 * use sequence
18066 * LR R2,R6 dest addr
18067 * LR R3,R7 dest length
18068 * LR R4,R8 source addr
18069 * LR R5,R7 source length
18070 * CLCL R2,R4 doit
18071 *
00DF86 5860 C0CC 0E034 18072 L R6,=A(PBUF4K1) get ptr to ptr
00DF8A 5866 0000 00000 18073 L R6,0(R6) get ptr to BUF4K1
00DF8E 5880 C0D0 0E038 18074 L R8,=A(PBUF4K2) get ptr to ptr
00DF92 5888 0000 00000 18075 L R8,0(R8) get ptr to BUF4K2
00DF96 5870 C0D4 0E03C 18076 L R7,=F'4096' transfer length
18077 *
00DF9A 1826 18078 LR R2,R6 dst = BUF4K1
00DF9C 1837 18079 LR R3,R7 length = 4k
00DF9E 4140 0000 00000 18080 LA R4,0 setup zero fill
00DFA2 4150 0000 00000 18081 LA R5,0
00DFA6 0E24 18082 MVCL R2,R4 clear BUF4K1 (dst)
00DFA8 1828 18083 LR R2,R8 dst = BUF4K2
00DFAA 1837 18084 LR R3,R7 length = 4k
00DFAC 4140 0000 00000 18085 LA R4,0 setup zero fill
00DFB0 4150 0000 00000 18086 LA R5,0
00DFB4 0E24 18087 MVCL R2,R4 clear BUF4K2 (src)
00DFB6 1826 18088 LR R2,R6
00DFB8 92FF 600A 0000A 18089 MVI 10(R6),X'FF' and set src[10] to 0xff
18090 *
18091 T281L REPINSN LR,(R2,R6),LR,(R3,R7), X
LR,(R4,R8),LR,(R5,R7), X
CLCL,(R2,R4)
18092+*
18093+* build from sublist &ALIST* a comma separated string &ARGS*
18094+*
18095+*
18096+*
18097+*
18098+*
18099+*
18100+*
18101+*
18102+*
18103+*
18104+*
18105+*
0DFBC 18106+T281L EQU *
18107+*
18108+*
18109+* write a comment indicating what REPINSN does (if NOGEN in effect)
18110+*
PAGE 332
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
18111+*,// REPINSN: do 10 times:
18112+*
18113+* MNOTE requires that ' is doubled for expanded variables
18114+* thus build &MASTR as a copy of '&ARGS with ' doubled
18115+*
18116+*
18117+*,// LR R2,R6
18118+*
18119+* MNOTE requires that ' is doubled for expanded variables
18120+* thus build &MASTR as a copy of '&ARGS with ' doubled
18121+*
18122+*
18123+*,// LR R3,R7
18124+*
18125+* MNOTE requires that ' is doubled for expanded variables
18126+* thus build &MASTR as a copy of '&ARGS with ' doubled
18127+*
18128+*
18129+*,// LR R4,R8
18130+*
18131+* MNOTE requires that ' is doubled for expanded variables
18132+* thus build &MASTR as a copy of '&ARGS with ' doubled
18133+*
18134+*
18135+*,// LR R5,R7
18136+*
18137+* MNOTE requires that ' is doubled for expanded variables
18138+* thus build &MASTR as a copy of '&ARGS with ' doubled
18139+*
18140+*
18141+*,// CLCL R2,R4
18142+*
18143+* finally generate code: &ICNT copies of &CO1 ...
18144+*
00DFBC 1826 18145+ LR R2,R6
00DFBE 1837 18146+ LR R3,R7
00DFC0 1848 18147+ LR R4,R8
00DFC2 1857 18148+ LR R5,R7
00DFC4 0F24 18149+ CLCL R2,R4
00DFC6 1826 18150+ LR R2,R6
00DFC8 1837 18151+ LR R3,R7
00DFCA 1848 18152+ LR R4,R8
00DFCC 1857 18153+ LR R5,R7
00DFCE 0F24 18154+ CLCL R2,R4
00DFD0 1826 18155+ LR R2,R6
00DFD2 1837 18156+ LR R3,R7
00DFD4 1848 18157+ LR R4,R8
00DFD6 1857 18158+ LR R5,R7
00DFD8 0F24 18159+ CLCL R2,R4
00DFDA 1826 18160+ LR R2,R6
00DFDC 1837 18161+ LR R3,R7
00DFDE 1848 18162+ LR R4,R8
00DFE0 1857 18163+ LR R5,R7
00DFE2 0F24 18164+ CLCL R2,R4
00DFE4 1826 18165+ LR R2,R6
PAGE 333
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00DFE6 1837 18166+ LR R3,R7
00DFE8 1848 18167+ LR R4,R8
00DFEA 1857 18168+ LR R5,R7
00DFEC 0F24 18169+ CLCL R2,R4
00DFEE 1826 18170+ LR R2,R6
00DFF0 1837 18171+ LR R3,R7
00DFF2 1848 18172+ LR R4,R8
00DFF4 1857 18173+ LR R5,R7
00DFF6 0F24 18174+ CLCL R2,R4
00DFF8 1826 18175+ LR R2,R6
00DFFA 1837 18176+ LR R3,R7
00DFFC 1848 18177+ LR R4,R8
00DFFE 1857 18178+ LR R5,R7
00E000 0F24 18179+ CLCL R2,R4
00E002 1826 18180+ LR R2,R6
00E004 1837 18181+ LR R3,R7
00E006 1848 18182+ LR R4,R8
00E008 1857 18183+ LR R5,R7
00E00A 0F24 18184+ CLCL R2,R4
00E00C 1826 18185+ LR R2,R6
00E00E 1837 18186+ LR R3,R7
00E010 1848 18187+ LR R4,R8
00E012 1857 18188+ LR R5,R7
00E014 0F24 18189+ CLCL R2,R4
00E016 1826 18190+ LR R2,R6
00E018 1837 18191+ LR R3,R7
00E01A 1848 18192+ LR R4,R8
00E01C 1857 18193+ LR R5,R7
00E01E 0F24 18194+ CLCL R2,R4
18195+*
00E020 06FB 18196 BCTR R15,R11
18197 TSIMRET
00E022 58F0 C0C8 0E030 18198+ L R15,=A(SAVETST) R15 := current save area
00E026 58DF 0004 00004 18199+ L R13,4(R15) get old save area back
00E02A 98EC D00C 0000C 18200+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E02E 07FE 18201+ BR 14 RETURN 02000000
18202 TSIMEND
00E030 18203+ LTORG
00E030 00000458 18204 =A(SAVETST)
00E034 000004B4 18205 =A(PBUF4K1)
00E038 000004B8 18206 =A(PBUF4K2)
00E03C 00001000 18207 =F'4096'
0E040 18208+T281TEND EQU *
18209 *
18210 * Test 282 -- CLCL m,m (4kb,100b) --------------------------
18211 *
18212 TSIMBEG T282,600,10,1,C'4*LR;CLCL (4kb,100b)'
18213+*
003364 18214+TDSCDAT CSECT
003368 18215+ DS 0D
18216+*
003368 0000E040 18217+T282TDSC DC A(T282) // TENTRY
00336C 000000D8 18218+ DC A(T282TEND-T282) // TLENGTH
003370 00000258 18219+ DC F'600' // TLRCNT
003374 0000000A 18220+ DC F'10' // TIGCNT
PAGE 334
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003378 00000001 18221+ DC F'1' // TLTYPE
0016ED 18222+TEXT CSECT
0016ED E3F2F8F2 18223+SPTR1544 DC C'T282'
00337C 18224+TDSCDAT CSECT
00337C 18225+ DS 0F
00337C 040016ED 18226+ DC AL1(L'SPTR1544),AL3(SPTR1544)
0016F1 18227+TEXT CSECT
0016F1 F45CD3D95EC3D3C3 18228+SPTR1545 DC C'4*LR;CLCL (4kb,100b)'
003380 18229+TDSCDAT CSECT
003380 18230+ DS 0F
003380 140016F1 18231+ DC AL1(L'SPTR1545),AL3(SPTR1545)
18232+*
004B98 18233+TDSCTBL CSECT
04B98 18234+T282TPTR EQU *
004B98 00003368 18235+ DC A(T282TDSC) enabled test
18236+*
00E040 18237+TCODE CSECT
00E040 18238+ DS 0D ensure double word alignment for test
00E040 18239+T282 DS 0H 01650000
00E040 90EC D00C 0000C 18240+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E044 18CF 18241+ LR R12,R15 base register := entry address
0E040 18242+ USING T282,R12 declare code base register
00E046 41B0 C054 0E094 18243+ LA R11,T282L load loop target to R11
00E04A 58F0 C0C8 0E108 18244+ L R15,=A(SAVETST) R15 := current save area
00E04E 50DF 0004 00004 18245+ ST R13,4(R15) set back pointer in current save area
00E052 182D 18246+ LR R2,R13 remember callers save area
00E054 18DF 18247+ LR R13,R15 setup current save area
00E056 50D2 0008 00008 18248+ ST R13,8(R2) set forw pointer in callers save area
00000 18249+ USING TDSC,R1 declare TDSC base register
00E05A 58F0 1008 00008 18250+ L R15,TLRCNT load local repeat count to R15
18251+*
18252 *
18253 * use sequence
18254 * LR R2,R6 dest addr
18255 * LR R3,R7 dest length
18256 * LR R4,R8 source addr
18257 * LR R5,R7 source length
18258 * CLCL R2,R4 doit
18259 *
00E05E 5860 C0CC 0E10C 18260 L R6,=A(PBUF4K1) get ptr to ptr
00E062 5866 0000 00000 18261 L R6,0(R6) get ptr to BUF4K1
00E066 5880 C0D0 0E110 18262 L R8,=A(PBUF4K2) get ptr to ptr
00E06A 5888 0000 00000 18263 L R8,0(R8) get ptr to BUF4K2
00E06E 5870 C0D4 0E114 18264 L R7,=F'4096' transfer length
18265 *
00E072 1826 18266 LR R2,R6 dst = BUF4K1
00E074 1837 18267 LR R3,R7 length = 4k
00E076 4140 0000 00000 18268 LA R4,0 setup zero fill
00E07A 4150 0000 00000 18269 LA R5,0
00E07E 0E24 18270 MVCL R2,R4 clear BUF4K1 (dst)
00E080 1828 18271 LR R2,R8 dst = BUF4K2
00E082 1837 18272 LR R3,R7 length = 4k
00E084 4140 0000 00000 18273 LA R4,0 setup zero fill
00E088 4150 0000 00000 18274 LA R5,0
00E08C 0E24 18275 MVCL R2,R4 clear BUF4K2 (src)
PAGE 335
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E08E 1826 18276 LR R2,R6
00E090 92FF 6064 00064 18277 MVI 100(R6),X'FF' and set src[100] to 0xff
18278 *
18279 T282L REPINSN LR,(R2,R6),LR,(R3,R7), X
LR,(R4,R8),LR,(R5,R7), X
CLCL,(R2,R4)
18280+*
18281+* build from sublist &ALIST* a comma separated string &ARGS*
18282+*
18283+*
18284+*
18285+*
18286+*
18287+*
18288+*
18289+*
18290+*
18291+*
18292+*
18293+*
0E094 18294+T282L EQU *
18295+*
18296+*
18297+* write a comment indicating what REPINSN does (if NOGEN in effect)
18298+*
18299+*,// REPINSN: do 10 times:
18300+*
18301+* MNOTE requires that ' is doubled for expanded variables
18302+* thus build &MASTR as a copy of '&ARGS with ' doubled
18303+*
18304+*
18305+*,// LR R2,R6
18306+*
18307+* MNOTE requires that ' is doubled for expanded variables
18308+* thus build &MASTR as a copy of '&ARGS with ' doubled
18309+*
18310+*
18311+*,// LR R3,R7
18312+*
18313+* MNOTE requires that ' is doubled for expanded variables
18314+* thus build &MASTR as a copy of '&ARGS with ' doubled
18315+*
18316+*
18317+*,// LR R4,R8
18318+*
18319+* MNOTE requires that ' is doubled for expanded variables
18320+* thus build &MASTR as a copy of '&ARGS with ' doubled
18321+*
18322+*
18323+*,// LR R5,R7
18324+*
18325+* MNOTE requires that ' is doubled for expanded variables
18326+* thus build &MASTR as a copy of '&ARGS with ' doubled
18327+*
18328+*
PAGE 336
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
18329+*,// CLCL R2,R4
18330+*
18331+* finally generate code: &ICNT copies of &CO1 ...
18332+*
00E094 1826 18333+ LR R2,R6
00E096 1837 18334+ LR R3,R7
00E098 1848 18335+ LR R4,R8
00E09A 1857 18336+ LR R5,R7
00E09C 0F24 18337+ CLCL R2,R4
00E09E 1826 18338+ LR R2,R6
00E0A0 1837 18339+ LR R3,R7
00E0A2 1848 18340+ LR R4,R8
00E0A4 1857 18341+ LR R5,R7
00E0A6 0F24 18342+ CLCL R2,R4
00E0A8 1826 18343+ LR R2,R6
00E0AA 1837 18344+ LR R3,R7
00E0AC 1848 18345+ LR R4,R8
00E0AE 1857 18346+ LR R5,R7
00E0B0 0F24 18347+ CLCL R2,R4
00E0B2 1826 18348+ LR R2,R6
00E0B4 1837 18349+ LR R3,R7
00E0B6 1848 18350+ LR R4,R8
00E0B8 1857 18351+ LR R5,R7
00E0BA 0F24 18352+ CLCL R2,R4
00E0BC 1826 18353+ LR R2,R6
00E0BE 1837 18354+ LR R3,R7
00E0C0 1848 18355+ LR R4,R8
00E0C2 1857 18356+ LR R5,R7
00E0C4 0F24 18357+ CLCL R2,R4
00E0C6 1826 18358+ LR R2,R6
00E0C8 1837 18359+ LR R3,R7
00E0CA 1848 18360+ LR R4,R8
00E0CC 1857 18361+ LR R5,R7
00E0CE 0F24 18362+ CLCL R2,R4
00E0D0 1826 18363+ LR R2,R6
00E0D2 1837 18364+ LR R3,R7
00E0D4 1848 18365+ LR R4,R8
00E0D6 1857 18366+ LR R5,R7
00E0D8 0F24 18367+ CLCL R2,R4
00E0DA 1826 18368+ LR R2,R6
00E0DC 1837 18369+ LR R3,R7
00E0DE 1848 18370+ LR R4,R8
00E0E0 1857 18371+ LR R5,R7
00E0E2 0F24 18372+ CLCL R2,R4
00E0E4 1826 18373+ LR R2,R6
00E0E6 1837 18374+ LR R3,R7
00E0E8 1848 18375+ LR R4,R8
00E0EA 1857 18376+ LR R5,R7
00E0EC 0F24 18377+ CLCL R2,R4
00E0EE 1826 18378+ LR R2,R6
00E0F0 1837 18379+ LR R3,R7
00E0F2 1848 18380+ LR R4,R8
00E0F4 1857 18381+ LR R5,R7
00E0F6 0F24 18382+ CLCL R2,R4
18383+*
PAGE 337
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E0F8 06FB 18384 BCTR R15,R11
18385 TSIMRET
00E0FA 58F0 C0C8 0E108 18386+ L R15,=A(SAVETST) R15 := current save area
00E0FE 58DF 0004 00004 18387+ L R13,4(R15) get old save area back
00E102 98EC D00C 0000C 18388+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E106 07FE 18389+ BR 14 RETURN 02000000
18390 TSIMEND
00E108 18391+ LTORG
00E108 00000458 18392 =A(SAVETST)
00E10C 000004B4 18393 =A(PBUF4K1)
00E110 000004B8 18394 =A(PBUF4K2)
00E114 00001000 18395 =F'4096'
0E118 18396+T282TEND EQU *
18397 *
18398 * Test 283 -- CLCL m,m (4kb,250b) --------------------------
18399 *
18400 TSIMBEG T283,220,10,1,C'4*LR;CLCL (4kb,250b)'
18401+*
003384 18402+TDSCDAT CSECT
003388 18403+ DS 0D
18404+*
003388 0000E118 18405+T283TDSC DC A(T283) // TENTRY
00338C 000000D8 18406+ DC A(T283TEND-T283) // TLENGTH
003390 000000DC 18407+ DC F'220' // TLRCNT
003394 0000000A 18408+ DC F'10' // TIGCNT
003398 00000001 18409+ DC F'1' // TLTYPE
001705 18410+TEXT CSECT
001705 E3F2F8F3 18411+SPTR1564 DC C'T283'
00339C 18412+TDSCDAT CSECT
00339C 18413+ DS 0F
00339C 04001705 18414+ DC AL1(L'SPTR1564),AL3(SPTR1564)
001709 18415+TEXT CSECT
001709 F45CD3D95EC3D3C3 18416+SPTR1565 DC C'4*LR;CLCL (4kb,250b)'
0033A0 18417+TDSCDAT CSECT
0033A0 18418+ DS 0F
0033A0 14001709 18419+ DC AL1(L'SPTR1565),AL3(SPTR1565)
18420+*
004B9C 18421+TDSCTBL CSECT
04B9C 18422+T283TPTR EQU *
004B9C 00003388 18423+ DC A(T283TDSC) enabled test
18424+*
00E118 18425+TCODE CSECT
00E118 18426+ DS 0D ensure double word alignment for test
00E118 18427+T283 DS 0H 01650000
00E118 90EC D00C 0000C 18428+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E11C 18CF 18429+ LR R12,R15 base register := entry address
0E118 18430+ USING T283,R12 declare code base register
00E11E 41B0 C054 0E16C 18431+ LA R11,T283L load loop target to R11
00E122 58F0 C0C8 0E1E0 18432+ L R15,=A(SAVETST) R15 := current save area
00E126 50DF 0004 00004 18433+ ST R13,4(R15) set back pointer in current save area
00E12A 182D 18434+ LR R2,R13 remember callers save area
00E12C 18DF 18435+ LR R13,R15 setup current save area
00E12E 50D2 0008 00008 18436+ ST R13,8(R2) set forw pointer in callers save area
00000 18437+ USING TDSC,R1 declare TDSC base register
00E132 58F0 1008 00008 18438+ L R15,TLRCNT load local repeat count to R15
PAGE 338
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
18439+*
18440 *
18441 * use sequence
18442 * LR R2,R6 dest addr
18443 * LR R3,R7 dest length
18444 * LR R4,R8 source addr
18445 * LR R5,R7 source length
18446 * CLCL R2,R4 doit
18447 *
00E136 5860 C0CC 0E1E4 18448 L R6,=A(PBUF4K1) get ptr to ptr
00E13A 5866 0000 00000 18449 L R6,0(R6) get ptr to BUF4K1
00E13E 5880 C0D0 0E1E8 18450 L R8,=A(PBUF4K2) get ptr to ptr
00E142 5888 0000 00000 18451 L R8,0(R8) get ptr to BUF4K2
00E146 5870 C0D4 0E1EC 18452 L R7,=F'4096' transfer length
18453 *
00E14A 1826 18454 LR R2,R6 dst = BUF4K1
00E14C 1837 18455 LR R3,R7 length = 4k
00E14E 4140 0000 00000 18456 LA R4,0 setup zero fill
00E152 4150 0000 00000 18457 LA R5,0
00E156 0E24 18458 MVCL R2,R4 clear BUF4K1 (dst)
00E158 1828 18459 LR R2,R8 dst = BUF4K2
00E15A 1837 18460 LR R3,R7 length = 4k
00E15C 4140 0000 00000 18461 LA R4,0 setup zero fill
00E160 4150 0000 00000 18462 LA R5,0
00E164 0E24 18463 MVCL R2,R4 clear BUF4K2 (src)
00E166 1826 18464 LR R2,R6
00E168 92FF 60FA 000FA 18465 MVI 250(R6),X'FF' and set src[250] to 0xff
18466 *
18467 T283L REPINSN LR,(R2,R6),LR,(R3,R7), X
LR,(R4,R8),LR,(R5,R7), X
CLCL,(R2,R4)
18468+*
18469+* build from sublist &ALIST* a comma separated string &ARGS*
18470+*
18471+*
18472+*
18473+*
18474+*
18475+*
18476+*
18477+*
18478+*
18479+*
18480+*
18481+*
0E16C 18482+T283L EQU *
18483+*
18484+*
18485+* write a comment indicating what REPINSN does (if NOGEN in effect)
18486+*
18487+*,// REPINSN: do 10 times:
18488+*
18489+* MNOTE requires that ' is doubled for expanded variables
18490+* thus build &MASTR as a copy of '&ARGS with ' doubled
18491+*
PAGE 339
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
18492+*
18493+*,// LR R2,R6
18494+*
18495+* MNOTE requires that ' is doubled for expanded variables
18496+* thus build &MASTR as a copy of '&ARGS with ' doubled
18497+*
18498+*
18499+*,// LR R3,R7
18500+*
18501+* MNOTE requires that ' is doubled for expanded variables
18502+* thus build &MASTR as a copy of '&ARGS with ' doubled
18503+*
18504+*
18505+*,// LR R4,R8
18506+*
18507+* MNOTE requires that ' is doubled for expanded variables
18508+* thus build &MASTR as a copy of '&ARGS with ' doubled
18509+*
18510+*
18511+*,// LR R5,R7
18512+*
18513+* MNOTE requires that ' is doubled for expanded variables
18514+* thus build &MASTR as a copy of '&ARGS with ' doubled
18515+*
18516+*
18517+*,// CLCL R2,R4
18518+*
18519+* finally generate code: &ICNT copies of &CO1 ...
18520+*
00E16C 1826 18521+ LR R2,R6
00E16E 1837 18522+ LR R3,R7
00E170 1848 18523+ LR R4,R8
00E172 1857 18524+ LR R5,R7
00E174 0F24 18525+ CLCL R2,R4
00E176 1826 18526+ LR R2,R6
00E178 1837 18527+ LR R3,R7
00E17A 1848 18528+ LR R4,R8
00E17C 1857 18529+ LR R5,R7
00E17E 0F24 18530+ CLCL R2,R4
00E180 1826 18531+ LR R2,R6
00E182 1837 18532+ LR R3,R7
00E184 1848 18533+ LR R4,R8
00E186 1857 18534+ LR R5,R7
00E188 0F24 18535+ CLCL R2,R4
00E18A 1826 18536+ LR R2,R6
00E18C 1837 18537+ LR R3,R7
00E18E 1848 18538+ LR R4,R8
00E190 1857 18539+ LR R5,R7
00E192 0F24 18540+ CLCL R2,R4
00E194 1826 18541+ LR R2,R6
00E196 1837 18542+ LR R3,R7
00E198 1848 18543+ LR R4,R8
00E19A 1857 18544+ LR R5,R7
00E19C 0F24 18545+ CLCL R2,R4
00E19E 1826 18546+ LR R2,R6
PAGE 340
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E1A0 1837 18547+ LR R3,R7
00E1A2 1848 18548+ LR R4,R8
00E1A4 1857 18549+ LR R5,R7
00E1A6 0F24 18550+ CLCL R2,R4
00E1A8 1826 18551+ LR R2,R6
00E1AA 1837 18552+ LR R3,R7
00E1AC 1848 18553+ LR R4,R8
00E1AE 1857 18554+ LR R5,R7
00E1B0 0F24 18555+ CLCL R2,R4
00E1B2 1826 18556+ LR R2,R6
00E1B4 1837 18557+ LR R3,R7
00E1B6 1848 18558+ LR R4,R8
00E1B8 1857 18559+ LR R5,R7
00E1BA 0F24 18560+ CLCL R2,R4
00E1BC 1826 18561+ LR R2,R6
00E1BE 1837 18562+ LR R3,R7
00E1C0 1848 18563+ LR R4,R8
00E1C2 1857 18564+ LR R5,R7
00E1C4 0F24 18565+ CLCL R2,R4
00E1C6 1826 18566+ LR R2,R6
00E1C8 1837 18567+ LR R3,R7
00E1CA 1848 18568+ LR R4,R8
00E1CC 1857 18569+ LR R5,R7
00E1CE 0F24 18570+ CLCL R2,R4
18571+*
00E1D0 06FB 18572 BCTR R15,R11
18573 TSIMRET
00E1D2 58F0 C0C8 0E1E0 18574+ L R15,=A(SAVETST) R15 := current save area
00E1D6 58DF 0004 00004 18575+ L R13,4(R15) get old save area back
00E1DA 98EC D00C 0000C 18576+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E1DE 07FE 18577+ BR 14 RETURN 02000000
18578 TSIMEND
00E1E0 18579+ LTORG
00E1E0 00000458 18580 =A(SAVETST)
00E1E4 000004B4 18581 =A(PBUF4K1)
00E1E8 000004B8 18582 =A(PBUF4K2)
00E1EC 00001000 18583 =F'4096'
0E1F0 18584+T283TEND EQU *
18585 *
18586 * Test 284 -- CLCL m,m (4kb,1kb) ---------------------------
18587 *
18588 TSIMBEG T284,80,10,1,C'4*LR;CLCL (4kb,1kb)',DIS=1
18589+*
0033A4 18590+TDSCDAT CSECT
0033A8 18591+ DS 0D
18592+*
0033A8 0000E1F0 18593+T284TDSC DC A(T284) // TENTRY
0033AC 000000D8 18594+ DC A(T284TEND-T284) // TLENGTH
0033B0 00000050 18595+ DC F'80' // TLRCNT
0033B4 0000000A 18596+ DC F'10' // TIGCNT
0033B8 00000001 18597+ DC F'1' // TLTYPE
00171D 18598+TEXT CSECT
00171D E3F2F8F4 18599+SPTR1584 DC C'T284'
0033BC 18600+TDSCDAT CSECT
0033BC 18601+ DS 0F
PAGE 341
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0033BC 0400171D 18602+ DC AL1(L'SPTR1584),AL3(SPTR1584)
001721 18603+TEXT CSECT
001721 F45CD3D95EC3D3C3 18604+SPTR1585 DC C'4*LR;CLCL (4kb,1kb)'
0033C0 18605+TDSCDAT CSECT
0033C0 18606+ DS 0F
0033C0 13001721 18607+ DC AL1(L'SPTR1585),AL3(SPTR1585)
18608+*
004BA0 18609+TDSCTBL CSECT
04BA0 18610+T284TPTR EQU *
004BA0 010033A8 18611+ DC X'01',AL3(T284TDSC) disabled test
18612+*
00E1F0 18613+TCODE CSECT
00E1F0 18614+ DS 0D ensure double word alignment for test
00E1F0 18615+T284 DS 0H 01650000
00E1F0 90EC D00C 0000C 18616+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E1F4 18CF 18617+ LR R12,R15 base register := entry address
0E1F0 18618+ USING T284,R12 declare code base register
00E1F6 41B0 C054 0E244 18619+ LA R11,T284L load loop target to R11
00E1FA 58F0 C0C8 0E2B8 18620+ L R15,=A(SAVETST) R15 := current save area
00E1FE 50DF 0004 00004 18621+ ST R13,4(R15) set back pointer in current save area
00E202 182D 18622+ LR R2,R13 remember callers save area
00E204 18DF 18623+ LR R13,R15 setup current save area
00E206 50D2 0008 00008 18624+ ST R13,8(R2) set forw pointer in callers save area
00000 18625+ USING TDSC,R1 declare TDSC base register
00E20A 58F0 1008 00008 18626+ L R15,TLRCNT load local repeat count to R15
18627+*
18628 *
18629 * use sequence
18630 * LR R2,R6 dest addr
18631 * LR R3,R7 dest length
18632 * LR R4,R8 source addr
18633 * LR R5,R7 source length
18634 * CLCL R2,R4 doit
18635 *
00E20E 5860 C0CC 0E2BC 18636 L R6,=A(PBUF4K1) get ptr to ptr
00E212 5866 0000 00000 18637 L R6,0(R6) get ptr to BUF4K1
00E216 5880 C0D0 0E2C0 18638 L R8,=A(PBUF4K2) get ptr to ptr
00E21A 5888 0000 00000 18639 L R8,0(R8) get ptr to BUF4K2
00E21E 5870 C0D4 0E2C4 18640 L R7,=F'4096' transfer length
18641 *
00E222 1826 18642 LR R2,R6 dst = BUF4K1
00E224 1837 18643 LR R3,R7 length = 4k
00E226 4140 0000 00000 18644 LA R4,0 setup zero fill
00E22A 4150 0000 00000 18645 LA R5,0
00E22E 0E24 18646 MVCL R2,R4 clear BUF4K1 (dst)
00E230 1828 18647 LR R2,R8 dst = BUF4K2
00E232 1837 18648 LR R3,R7 length = 4k
00E234 4140 0000 00000 18649 LA R4,0 setup zero fill
00E238 4150 0000 00000 18650 LA R5,0
00E23C 0E24 18651 MVCL R2,R4 clear BUF4K2 (src)
00E23E 1826 18652 LR R2,R6
00E240 92FF 6400 00400 18653 MVI 1024(R6),X'FF' and set src[1024] to 0xff
18654 *
18655 T284L REPINSN LR,(R2,R6),LR,(R3,R7), X
LR,(R4,R8),LR,(R5,R7), X
PAGE 342
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
CLCL,(R2,R4)
18656+*
18657+* build from sublist &ALIST* a comma separated string &ARGS*
18658+*
18659+*
18660+*
18661+*
18662+*
18663+*
18664+*
18665+*
18666+*
18667+*
18668+*
18669+*
0E244 18670+T284L EQU *
18671+*
18672+*
18673+* write a comment indicating what REPINSN does (if NOGEN in effect)
18674+*
18675+*,// REPINSN: do 10 times:
18676+*
18677+* MNOTE requires that ' is doubled for expanded variables
18678+* thus build &MASTR as a copy of '&ARGS with ' doubled
18679+*
18680+*
18681+*,// LR R2,R6
18682+*
18683+* MNOTE requires that ' is doubled for expanded variables
18684+* thus build &MASTR as a copy of '&ARGS with ' doubled
18685+*
18686+*
18687+*,// LR R3,R7
18688+*
18689+* MNOTE requires that ' is doubled for expanded variables
18690+* thus build &MASTR as a copy of '&ARGS with ' doubled
18691+*
18692+*
18693+*,// LR R4,R8
18694+*
18695+* MNOTE requires that ' is doubled for expanded variables
18696+* thus build &MASTR as a copy of '&ARGS with ' doubled
18697+*
18698+*
18699+*,// LR R5,R7
18700+*
18701+* MNOTE requires that ' is doubled for expanded variables
18702+* thus build &MASTR as a copy of '&ARGS with ' doubled
18703+*
18704+*
18705+*,// CLCL R2,R4
18706+*
18707+* finally generate code: &ICNT copies of &CO1 ...
18708+*
00E244 1826 18709+ LR R2,R6
PAGE 343
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E246 1837 18710+ LR R3,R7
00E248 1848 18711+ LR R4,R8
00E24A 1857 18712+ LR R5,R7
00E24C 0F24 18713+ CLCL R2,R4
00E24E 1826 18714+ LR R2,R6
00E250 1837 18715+ LR R3,R7
00E252 1848 18716+ LR R4,R8
00E254 1857 18717+ LR R5,R7
00E256 0F24 18718+ CLCL R2,R4
00E258 1826 18719+ LR R2,R6
00E25A 1837 18720+ LR R3,R7
00E25C 1848 18721+ LR R4,R8
00E25E 1857 18722+ LR R5,R7
00E260 0F24 18723+ CLCL R2,R4
00E262 1826 18724+ LR R2,R6
00E264 1837 18725+ LR R3,R7
00E266 1848 18726+ LR R4,R8
00E268 1857 18727+ LR R5,R7
00E26A 0F24 18728+ CLCL R2,R4
00E26C 1826 18729+ LR R2,R6
00E26E 1837 18730+ LR R3,R7
00E270 1848 18731+ LR R4,R8
00E272 1857 18732+ LR R5,R7
00E274 0F24 18733+ CLCL R2,R4
00E276 1826 18734+ LR R2,R6
00E278 1837 18735+ LR R3,R7
00E27A 1848 18736+ LR R4,R8
00E27C 1857 18737+ LR R5,R7
00E27E 0F24 18738+ CLCL R2,R4
00E280 1826 18739+ LR R2,R6
00E282 1837 18740+ LR R3,R7
00E284 1848 18741+ LR R4,R8
00E286 1857 18742+ LR R5,R7
00E288 0F24 18743+ CLCL R2,R4
00E28A 1826 18744+ LR R2,R6
00E28C 1837 18745+ LR R3,R7
00E28E 1848 18746+ LR R4,R8
00E290 1857 18747+ LR R5,R7
00E292 0F24 18748+ CLCL R2,R4
00E294 1826 18749+ LR R2,R6
00E296 1837 18750+ LR R3,R7
00E298 1848 18751+ LR R4,R8
00E29A 1857 18752+ LR R5,R7
00E29C 0F24 18753+ CLCL R2,R4
00E29E 1826 18754+ LR R2,R6
00E2A0 1837 18755+ LR R3,R7
00E2A2 1848 18756+ LR R4,R8
00E2A4 1857 18757+ LR R5,R7
00E2A6 0F24 18758+ CLCL R2,R4
18759+*
00E2A8 06FB 18760 BCTR R15,R11
18761 TSIMRET
00E2AA 58F0 C0C8 0E2B8 18762+ L R15,=A(SAVETST) R15 := current save area
00E2AE 58DF 0004 00004 18763+ L R13,4(R15) get old save area back
00E2B2 98EC D00C 0000C 18764+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
PAGE 344
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E2B6 07FE 18765+ BR 14 RETURN 02000000
18766 TSIMEND
00E2B8 18767+ LTORG
00E2B8 00000458 18768 =A(SAVETST)
00E2BC 000004B4 18769 =A(PBUF4K1)
00E2C0 000004B8 18770 =A(PBUF4K2)
00E2C4 00001000 18771 =F'4096'
0E2C8 18772+T284TEND EQU *
18773 *
18774 * Test 285 -- CLCL m,m (4kb,4kb) ---------------------------
18775 *
18776 TSIMBEG T285,5,10,1,C'4*LR;CLCL (4kb,4kb)',DIS=1
18777+*
0033C4 18778+TDSCDAT CSECT
0033C8 18779+ DS 0D
18780+*
0033C8 0000E2C8 18781+T285TDSC DC A(T285) // TENTRY
0033CC 000000D8 18782+ DC A(T285TEND-T285) // TLENGTH
0033D0 00000005 18783+ DC F'5' // TLRCNT
0033D4 0000000A 18784+ DC F'10' // TIGCNT
0033D8 00000001 18785+ DC F'1' // TLTYPE
001734 18786+TEXT CSECT
001734 E3F2F8F5 18787+SPTR1604 DC C'T285'
0033DC 18788+TDSCDAT CSECT
0033DC 18789+ DS 0F
0033DC 04001734 18790+ DC AL1(L'SPTR1604),AL3(SPTR1604)
001738 18791+TEXT CSECT
001738 F45CD3D95EC3D3C3 18792+SPTR1605 DC C'4*LR;CLCL (4kb,4kb)'
0033E0 18793+TDSCDAT CSECT
0033E0 18794+ DS 0F
0033E0 13001738 18795+ DC AL1(L'SPTR1605),AL3(SPTR1605)
18796+*
004BA4 18797+TDSCTBL CSECT
04BA4 18798+T285TPTR EQU *
004BA4 010033C8 18799+ DC X'01',AL3(T285TDSC) disabled test
18800+*
00E2C8 18801+TCODE CSECT
00E2C8 18802+ DS 0D ensure double word alignment for test
00E2C8 18803+T285 DS 0H 01650000
00E2C8 90EC D00C 0000C 18804+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E2CC 18CF 18805+ LR R12,R15 base register := entry address
0E2C8 18806+ USING T285,R12 declare code base register
00E2CE 41B0 C050 0E318 18807+ LA R11,T285L load loop target to R11
00E2D2 58F0 C0C8 0E390 18808+ L R15,=A(SAVETST) R15 := current save area
00E2D6 50DF 0004 00004 18809+ ST R13,4(R15) set back pointer in current save area
00E2DA 182D 18810+ LR R2,R13 remember callers save area
00E2DC 18DF 18811+ LR R13,R15 setup current save area
00E2DE 50D2 0008 00008 18812+ ST R13,8(R2) set forw pointer in callers save area
00000 18813+ USING TDSC,R1 declare TDSC base register
00E2E2 58F0 1008 00008 18814+ L R15,TLRCNT load local repeat count to R15
18815+*
18816 *
18817 * use sequence
18818 * LR R2,R6 dest addr
18819 * LR R3,R7 dest length
PAGE 345
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
18820 * LR R4,R8 source addr
18821 * LR R5,R7 source length
18822 * CLCL R2,R4 doit
18823 *
00E2E6 5860 C0CC 0E394 18824 L R6,=A(PBUF4K1) get ptr to ptr
00E2EA 5866 0000 00000 18825 L R6,0(R6) get ptr to BUF4K1
00E2EE 5880 C0D0 0E398 18826 L R8,=A(PBUF4K2) get ptr to ptr
00E2F2 5888 0000 00000 18827 L R8,0(R8) get ptr to BUF4K2
00E2F6 5870 C0D4 0E39C 18828 L R7,=F'4096' transfer length
18829 *
00E2FA 1826 18830 LR R2,R6 dst = BUF4K1
00E2FC 1837 18831 LR R3,R7 length = 4k
00E2FE 4140 0000 00000 18832 LA R4,0 setup zero fill
00E302 4150 0000 00000 18833 LA R5,0
00E306 0E24 18834 MVCL R2,R4 clear BUF4K1 (dst)
00E308 1828 18835 LR R2,R8 dst = BUF4K2
00E30A 1837 18836 LR R3,R7 length = 4k
00E30C 4140 0000 00000 18837 LA R4,0 setup zero fill
00E310 4150 0000 00000 18838 LA R5,0
00E314 0E24 18839 MVCL R2,R4 clear BUF4K2 (src)
00E316 1826 18840 LR R2,R6
18841 * leave dst zero'ed !!
18842 *
18843 T285L REPINSN LR,(R2,R6),LR,(R3,R7), X
LR,(R4,R8),LR,(R5,R7), X
CLCL,(R2,R4)
18844+*
18845+* build from sublist &ALIST* a comma separated string &ARGS*
18846+*
18847+*
18848+*
18849+*
18850+*
18851+*
18852+*
18853+*
18854+*
18855+*
18856+*
18857+*
0E318 18858+T285L EQU *
18859+*
18860+*
18861+* write a comment indicating what REPINSN does (if NOGEN in effect)
18862+*
18863+*,// REPINSN: do 10 times:
18864+*
18865+* MNOTE requires that ' is doubled for expanded variables
18866+* thus build &MASTR as a copy of '&ARGS with ' doubled
18867+*
18868+*
18869+*,// LR R2,R6
18870+*
18871+* MNOTE requires that ' is doubled for expanded variables
18872+* thus build &MASTR as a copy of '&ARGS with ' doubled
PAGE 346
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
18873+*
18874+*
18875+*,// LR R3,R7
18876+*
18877+* MNOTE requires that ' is doubled for expanded variables
18878+* thus build &MASTR as a copy of '&ARGS with ' doubled
18879+*
18880+*
18881+*,// LR R4,R8
18882+*
18883+* MNOTE requires that ' is doubled for expanded variables
18884+* thus build &MASTR as a copy of '&ARGS with ' doubled
18885+*
18886+*
18887+*,// LR R5,R7
18888+*
18889+* MNOTE requires that ' is doubled for expanded variables
18890+* thus build &MASTR as a copy of '&ARGS with ' doubled
18891+*
18892+*
18893+*,// CLCL R2,R4
18894+*
18895+* finally generate code: &ICNT copies of &CO1 ...
18896+*
00E318 1826 18897+ LR R2,R6
00E31A 1837 18898+ LR R3,R7
00E31C 1848 18899+ LR R4,R8
00E31E 1857 18900+ LR R5,R7
00E320 0F24 18901+ CLCL R2,R4
00E322 1826 18902+ LR R2,R6
00E324 1837 18903+ LR R3,R7
00E326 1848 18904+ LR R4,R8
00E328 1857 18905+ LR R5,R7
00E32A 0F24 18906+ CLCL R2,R4
00E32C 1826 18907+ LR R2,R6
00E32E 1837 18908+ LR R3,R7
00E330 1848 18909+ LR R4,R8
00E332 1857 18910+ LR R5,R7
00E334 0F24 18911+ CLCL R2,R4
00E336 1826 18912+ LR R2,R6
00E338 1837 18913+ LR R3,R7
00E33A 1848 18914+ LR R4,R8
00E33C 1857 18915+ LR R5,R7
00E33E 0F24 18916+ CLCL R2,R4
00E340 1826 18917+ LR R2,R6
00E342 1837 18918+ LR R3,R7
00E344 1848 18919+ LR R4,R8
00E346 1857 18920+ LR R5,R7
00E348 0F24 18921+ CLCL R2,R4
00E34A 1826 18922+ LR R2,R6
00E34C 1837 18923+ LR R3,R7
00E34E 1848 18924+ LR R4,R8
00E350 1857 18925+ LR R5,R7
00E352 0F24 18926+ CLCL R2,R4
00E354 1826 18927+ LR R2,R6
PAGE 347
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E356 1837 18928+ LR R3,R7
00E358 1848 18929+ LR R4,R8
00E35A 1857 18930+ LR R5,R7
00E35C 0F24 18931+ CLCL R2,R4
00E35E 1826 18932+ LR R2,R6
00E360 1837 18933+ LR R3,R7
00E362 1848 18934+ LR R4,R8
00E364 1857 18935+ LR R5,R7
00E366 0F24 18936+ CLCL R2,R4
00E368 1826 18937+ LR R2,R6
00E36A 1837 18938+ LR R3,R7
00E36C 1848 18939+ LR R4,R8
00E36E 1857 18940+ LR R5,R7
00E370 0F24 18941+ CLCL R2,R4
00E372 1826 18942+ LR R2,R6
00E374 1837 18943+ LR R3,R7
00E376 1848 18944+ LR R4,R8
00E378 1857 18945+ LR R5,R7
00E37A 0F24 18946+ CLCL R2,R4
18947+*
00E37C 06FB 18948 BCTR R15,R11
18949 TSIMRET
00E37E 58F0 C0C8 0E390 18950+ L R15,=A(SAVETST) R15 := current save area
00E382 58DF 0004 00004 18951+ L R13,4(R15) get old save area back
00E386 98EC D00C 0000C 18952+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E38A 07FE 18953+ BR 14 RETURN 02000000
18954 TSIMEND
00E390 18955+ LTORG
00E390 00000458 18956 =A(SAVETST)
00E394 000004B4 18957 =A(PBUF4K1)
00E398 000004B8 18958 =A(PBUF4K2)
00E39C 00001000 18959 =F'4096'
0E3A0 18960+T285TEND EQU *
18961 *
18962 * Test 29x -- CS,CDS =======================================
18963 *
18964 * Test 290 -- CS R,R,m (eq,eq) -----------------------------
18965 *
18966 TSIMBEG T290,6000,20,1,C'LR;CS R,R,m (eq,eq)'
18967+*
0033E4 18968+TDSCDAT CSECT
0033E8 18969+ DS 0D
18970+*
0033E8 0000E3A0 18971+T290TDSC DC A(T290) // TENTRY
0033EC 000000C4 18972+ DC A(T290TEND-T290) // TLENGTH
0033F0 00001770 18973+ DC F'6000' // TLRCNT
0033F4 00000014 18974+ DC F'20' // TIGCNT
0033F8 00000001 18975+ DC F'1' // TLTYPE
00174B 18976+TEXT CSECT
00174B E3F2F9F0 18977+SPTR1624 DC C'T290'
0033FC 18978+TDSCDAT CSECT
0033FC 18979+ DS 0F
0033FC 0400174B 18980+ DC AL1(L'SPTR1624),AL3(SPTR1624)
00174F 18981+TEXT CSECT
00174F D3D95EC3E240D96B 18982+SPTR1625 DC C'LR;CS R,R,m (eq,eq)'
PAGE 348
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003400 18983+TDSCDAT CSECT
003400 18984+ DS 0F
003400 1300174F 18985+ DC AL1(L'SPTR1625),AL3(SPTR1625)
18986+*
004BA8 18987+TDSCTBL CSECT
04BA8 18988+T290TPTR EQU *
004BA8 000033E8 18989+ DC A(T290TDSC) enabled test
18990+*
00E3A0 18991+TCODE CSECT
00E3A0 18992+ DS 0D ensure double word alignment for test
00E3A0 18993+T290 DS 0H 01650000
00E3A0 90EC D00C 0000C 18994+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E3A4 18CF 18995+ LR R12,R15 base register := entry address
0E3A0 18996+ USING T290,R12 declare code base register
00E3A6 41B0 C02E 0E3CE 18997+ LA R11,T290L load loop target to R11
00E3AA 58F0 C0C0 0E460 18998+ L R15,=A(SAVETST) R15 := current save area
00E3AE 50DF 0004 00004 18999+ ST R13,4(R15) set back pointer in current save area
00E3B2 182D 19000+ LR R2,R13 remember callers save area
00E3B4 18DF 19001+ LR R13,R15 setup current save area
00E3B6 50D2 0008 00008 19002+ ST R13,8(R2) set forw pointer in callers save area
00000 19003+ USING TDSC,R1 declare TDSC base register
00E3BA 58F0 1008 00008 19004+ L R15,TLRCNT load local repeat count to R15
19005+*
19006 *
19007 * CS OP1,OP3,OP2 - if OP1==OP2 then OP2:=OP3
19008 * if OP1!=OP2 then OP1:=OP2
19009 *
00E3BE 4120 0001 00001 19010 LA R2,1 init OP1
00E3C2 5020 C0B8 0E458 19011 ST R2,T290V init OP2, OP2==OP1
00E3C6 4140 0001 00001 19012 LA R4,1 init OP3, OP3==OP1
00E3CA 4160 0001 00001 19013 LA R6,1 restore OP1
19014 T290L REPINSN LR,(R2,R6),CS,(R2,R4,T290V)
19015+*
19016+* build from sublist &ALIST* a comma separated string &ARGS*
19017+*
19018+*
19019+*
19020+*
19021+*
19022+*
0E3CE 19023+T290L EQU *
19024+*
19025+*
19026+* write a comment indicating what REPINSN does (if NOGEN in effect)
19027+*
19028+*,// REPINSN: do 20 times:
19029+*
19030+* MNOTE requires that ' is doubled for expanded variables
19031+* thus build &MASTR as a copy of '&ARGS with ' doubled
19032+*
19033+*
19034+*,// LR R2,R6
19035+*
19036+* MNOTE requires that ' is doubled for expanded variables
19037+* thus build &MASTR as a copy of '&ARGS with ' doubled
PAGE 349
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
19038+*
19039+*
19040+*,// CS R2,R4,T290V
19041+*
19042+* finally generate code: &ICNT copies of &CO1 ...
19043+*
00E3CE 1826 19044+ LR R2,R6
00E3D0 BA24 C0B8 0E458 19045+ CS R2,R4,T290V
00E3D4 1826 19046+ LR R2,R6
00E3D6 BA24 C0B8 0E458 19047+ CS R2,R4,T290V
00E3DA 1826 19048+ LR R2,R6
00E3DC BA24 C0B8 0E458 19049+ CS R2,R4,T290V
00E3E0 1826 19050+ LR R2,R6
00E3E2 BA24 C0B8 0E458 19051+ CS R2,R4,T290V
00E3E6 1826 19052+ LR R2,R6
00E3E8 BA24 C0B8 0E458 19053+ CS R2,R4,T290V
00E3EC 1826 19054+ LR R2,R6
00E3EE BA24 C0B8 0E458 19055+ CS R2,R4,T290V
00E3F2 1826 19056+ LR R2,R6
00E3F4 BA24 C0B8 0E458 19057+ CS R2,R4,T290V
00E3F8 1826 19058+ LR R2,R6
00E3FA BA24 C0B8 0E458 19059+ CS R2,R4,T290V
00E3FE 1826 19060+ LR R2,R6
00E400 BA24 C0B8 0E458 19061+ CS R2,R4,T290V
00E404 1826 19062+ LR R2,R6
00E406 BA24 C0B8 0E458 19063+ CS R2,R4,T290V
00E40A 1826 19064+ LR R2,R6
00E40C BA24 C0B8 0E458 19065+ CS R2,R4,T290V
00E410 1826 19066+ LR R2,R6
00E412 BA24 C0B8 0E458 19067+ CS R2,R4,T290V
00E416 1826 19068+ LR R2,R6
00E418 BA24 C0B8 0E458 19069+ CS R2,R4,T290V
00E41C 1826 19070+ LR R2,R6
00E41E BA24 C0B8 0E458 19071+ CS R2,R4,T290V
00E422 1826 19072+ LR R2,R6
00E424 BA24 C0B8 0E458 19073+ CS R2,R4,T290V
00E428 1826 19074+ LR R2,R6
00E42A BA24 C0B8 0E458 19075+ CS R2,R4,T290V
00E42E 1826 19076+ LR R2,R6
00E430 BA24 C0B8 0E458 19077+ CS R2,R4,T290V
00E434 1826 19078+ LR R2,R6
00E436 BA24 C0B8 0E458 19079+ CS R2,R4,T290V
00E43A 1826 19080+ LR R2,R6
00E43C BA24 C0B8 0E458 19081+ CS R2,R4,T290V
00E440 1826 19082+ LR R2,R6
00E442 BA24 C0B8 0E458 19083+ CS R2,R4,T290V
19084+*
00E446 06FB 19085 BCTR R15,R11
19086 TSIMRET
00E448 58F0 C0C0 0E460 19087+ L R15,=A(SAVETST) R15 := current save area
00E44C 58DF 0004 00004 19088+ L R13,4(R15) get old save area back
00E450 98EC D00C 0000C 19089+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E454 07FE 19090+ BR 14 RETURN 02000000
19091 *
00E456 0000
PAGE 350
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E458 FFFFFFFF 19092 T290V DC F'-1' will be set
19093 TSIMEND
00E460 19094+ LTORG
00E460 00000458 19095 =A(SAVETST)
0E464 19096+T290TEND EQU *
19097 *
19098 * Test 291 -- CS R,R,m (eq,ne) -----------------------------
19099 *
19100 TSIMBEG T291,6000,20,1,C'LR;CS R,R,m (eq,ne)'
19101+*
003404 19102+TDSCDAT CSECT
003408 19103+ DS 0D
19104+*
003408 0000E468 19105+T291TDSC DC A(T291) // TENTRY
00340C 000000BC 19106+ DC A(T291TEND-T291) // TLENGTH
003410 00001770 19107+ DC F'6000' // TLRCNT
003414 00000014 19108+ DC F'20' // TIGCNT
003418 00000001 19109+ DC F'1' // TLTYPE
001762 19110+TEXT CSECT
001762 E3F2F9F1 19111+SPTR1638 DC C'T291'
00341C 19112+TDSCDAT CSECT
00341C 19113+ DS 0F
00341C 04001762 19114+ DC AL1(L'SPTR1638),AL3(SPTR1638)
001766 19115+TEXT CSECT
001766 D3D95EC3E240D96B 19116+SPTR1639 DC C'LR;CS R,R,m (eq,ne)'
003420 19117+TDSCDAT CSECT
003420 19118+ DS 0F
003420 13001766 19119+ DC AL1(L'SPTR1639),AL3(SPTR1639)
19120+*
004BAC 19121+TDSCTBL CSECT
04BAC 19122+T291TPTR EQU *
004BAC 00003408 19123+ DC A(T291TDSC) enabled test
19124+*
00E464 19125+TCODE CSECT
00E468 19126+ DS 0D ensure double word alignment for test
00E468 19127+T291 DS 0H 01650000
00E468 90EC D00C 0000C 19128+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E46C 18CF 19129+ LR R12,R15 base register := entry address
0E468 19130+ USING T291,R12 declare code base register
00E46E 41B0 C028 0E490 19131+ LA R11,T291L load loop target to R11
00E472 58F0 C0B8 0E520 19132+ L R15,=A(SAVETST) R15 := current save area
00E476 50DF 0004 00004 19133+ ST R13,4(R15) set back pointer in current save area
00E47A 182D 19134+ LR R2,R13 remember callers save area
00E47C 18DF 19135+ LR R13,R15 setup current save area
00E47E 50D2 0008 00008 19136+ ST R13,8(R2) set forw pointer in callers save area
00000 19137+ USING TDSC,R1 declare TDSC base register
00E482 58F0 1008 00008 19138+ L R15,TLRCNT load local repeat count to R15
19139+*
19140 *
00E486 4120 0000 00000 19141 LA R2,0 init OP1
00E48A 5020 C0B0 0E518 19142 ST R2,T291V init OP2, OP2==OP1
00E48E 184F 19143 LR R4,R15 init OP3 (counter)
19144 T291L REPINSN CS,(R2,R4,T291V),LR,(R2,R4)
19145+*
19146+* build from sublist &ALIST* a comma separated string &ARGS*
PAGE 351
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
19147+*
19148+*
19149+*
19150+*
19151+*
19152+*
0E490 19153+T291L EQU *
19154+*
19155+*
19156+* write a comment indicating what REPINSN does (if NOGEN in effect)
19157+*
19158+*,// REPINSN: do 20 times:
19159+*
19160+* MNOTE requires that ' is doubled for expanded variables
19161+* thus build &MASTR as a copy of '&ARGS with ' doubled
19162+*
19163+*
19164+*,// CS R2,R4,T291V
19165+*
19166+* MNOTE requires that ' is doubled for expanded variables
19167+* thus build &MASTR as a copy of '&ARGS with ' doubled
19168+*
19169+*
19170+*,// LR R2,R4
19171+*
19172+* finally generate code: &ICNT copies of &CO1 ...
19173+*
00E490 BA24 C0B0 0E518 19174+ CS R2,R4,T291V
00E494 1824 19175+ LR R2,R4
00E496 BA24 C0B0 0E518 19176+ CS R2,R4,T291V
00E49A 1824 19177+ LR R2,R4
00E49C BA24 C0B0 0E518 19178+ CS R2,R4,T291V
00E4A0 1824 19179+ LR R2,R4
00E4A2 BA24 C0B0 0E518 19180+ CS R2,R4,T291V
00E4A6 1824 19181+ LR R2,R4
00E4A8 BA24 C0B0 0E518 19182+ CS R2,R4,T291V
00E4AC 1824 19183+ LR R2,R4
00E4AE BA24 C0B0 0E518 19184+ CS R2,R4,T291V
00E4B2 1824 19185+ LR R2,R4
00E4B4 BA24 C0B0 0E518 19186+ CS R2,R4,T291V
00E4B8 1824 19187+ LR R2,R4
00E4BA BA24 C0B0 0E518 19188+ CS R2,R4,T291V
00E4BE 1824 19189+ LR R2,R4
00E4C0 BA24 C0B0 0E518 19190+ CS R2,R4,T291V
00E4C4 1824 19191+ LR R2,R4
00E4C6 BA24 C0B0 0E518 19192+ CS R2,R4,T291V
00E4CA 1824 19193+ LR R2,R4
00E4CC BA24 C0B0 0E518 19194+ CS R2,R4,T291V
00E4D0 1824 19195+ LR R2,R4
00E4D2 BA24 C0B0 0E518 19196+ CS R2,R4,T291V
00E4D6 1824 19197+ LR R2,R4
00E4D8 BA24 C0B0 0E518 19198+ CS R2,R4,T291V
00E4DC 1824 19199+ LR R2,R4
00E4DE BA24 C0B0 0E518 19200+ CS R2,R4,T291V
00E4E2 1824 19201+ LR R2,R4
PAGE 352
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E4E4 BA24 C0B0 0E518 19202+ CS R2,R4,T291V
00E4E8 1824 19203+ LR R2,R4
00E4EA BA24 C0B0 0E518 19204+ CS R2,R4,T291V
00E4EE 1824 19205+ LR R2,R4
00E4F0 BA24 C0B0 0E518 19206+ CS R2,R4,T291V
00E4F4 1824 19207+ LR R2,R4
00E4F6 BA24 C0B0 0E518 19208+ CS R2,R4,T291V
00E4FA 1824 19209+ LR R2,R4
00E4FC BA24 C0B0 0E518 19210+ CS R2,R4,T291V
00E500 1824 19211+ LR R2,R4
00E502 BA24 C0B0 0E518 19212+ CS R2,R4,T291V
00E506 1824 19213+ LR R2,R4
19214+*
00E508 064B 19215 BCTR R4,R11 counter is R4 here !!
19216 TSIMRET
00E50A 58F0 C0B8 0E520 19217+ L R15,=A(SAVETST) R15 := current save area
00E50E 58DF 0004 00004 19218+ L R13,4(R15) get old save area back
00E512 98EC D00C 0000C 19219+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E516 07FE 19220+ BR 14 RETURN 02000000
19221 *
00E518 FFFFFFFF 19222 T291V DC F'-1' will be setup
19223 TSIMEND
00E520 19224+ LTORG
00E520 00000458 19225 =A(SAVETST)
0E524 19226+T291TEND EQU *
19227 *
19228 * Test 292 -- CS R,R,m (ne) --------------------------------
19229 *
19230 TSIMBEG T292,1400,20,1,C'LR;CS R,R,m (ne)'
19231+*
003424 19232+TDSCDAT CSECT
003428 19233+ DS 0D
19234+*
003428 0000E528 19235+T292TDSC DC A(T292) // TENTRY
00342C 000000BC 19236+ DC A(T292TEND-T292) // TLENGTH
003430 00000578 19237+ DC F'1400' // TLRCNT
003434 00000014 19238+ DC F'20' // TIGCNT
003438 00000001 19239+ DC F'1' // TLTYPE
001779 19240+TEXT CSECT
001779 E3F2F9F2 19241+SPTR1652 DC C'T292'
00343C 19242+TDSCDAT CSECT
00343C 19243+ DS 0F
00343C 04001779 19244+ DC AL1(L'SPTR1652),AL3(SPTR1652)
00177D 19245+TEXT CSECT
00177D D3D95EC3E240D96B 19246+SPTR1653 DC C'LR;CS R,R,m (ne)'
003440 19247+TDSCDAT CSECT
003440 19248+ DS 0F
003440 1000177D 19249+ DC AL1(L'SPTR1653),AL3(SPTR1653)
19250+*
004BB0 19251+TDSCTBL CSECT
04BB0 19252+T292TPTR EQU *
004BB0 00003428 19253+ DC A(T292TDSC) enabled test
19254+*
00E524 19255+TCODE CSECT
00E528 19256+ DS 0D ensure double word alignment for test
PAGE 353
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E528 19257+T292 DS 0H 01650000
00E528 90EC D00C 0000C 19258+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E52C 18CF 19259+ LR R12,R15 base register := entry address
0E528 19260+ USING T292,R12 declare code base register
00E52E 41B0 C02A 0E552 19261+ LA R11,T292L load loop target to R11
00E532 58F0 C0B8 0E5E0 19262+ L R15,=A(SAVETST) R15 := current save area
00E536 50DF 0004 00004 19263+ ST R13,4(R15) set back pointer in current save area
00E53A 182D 19264+ LR R2,R13 remember callers save area
00E53C 18DF 19265+ LR R13,R15 setup current save area
00E53E 50D2 0008 00008 19266+ ST R13,8(R2) set forw pointer in callers save area
00000 19267+ USING TDSC,R1 declare TDSC base register
00E542 58F0 1008 00008 19268+ L R15,TLRCNT load local repeat count to R15
19269+*
19270 *
00E546 4120 0064 00064 19271 LA R2,100 init OP1, OP1!=OP2
00E54A 4140 0001 00001 19272 LA R4,1 init OP3
00E54E 4160 0064 00064 19273 LA R6,100 restore OP1
19274 T292L REPINSN LR,(R2,R6),CS,(R2,R4,T292V)
19275+*
19276+* build from sublist &ALIST* a comma separated string &ARGS*
19277+*
19278+*
19279+*
19280+*
19281+*
19282+*
0E552 19283+T292L EQU *
19284+*
19285+*
19286+* write a comment indicating what REPINSN does (if NOGEN in effect)
19287+*
19288+*,// REPINSN: do 20 times:
19289+*
19290+* MNOTE requires that ' is doubled for expanded variables
19291+* thus build &MASTR as a copy of '&ARGS with ' doubled
19292+*
19293+*
19294+*,// LR R2,R6
19295+*
19296+* MNOTE requires that ' is doubled for expanded variables
19297+* thus build &MASTR as a copy of '&ARGS with ' doubled
19298+*
19299+*
19300+*,// CS R2,R4,T292V
19301+*
19302+* finally generate code: &ICNT copies of &CO1 ...
19303+*
00E552 1826 19304+ LR R2,R6
00E554 BA24 C0B4 0E5DC 19305+ CS R2,R4,T292V
00E558 1826 19306+ LR R2,R6
00E55A BA24 C0B4 0E5DC 19307+ CS R2,R4,T292V
00E55E 1826 19308+ LR R2,R6
00E560 BA24 C0B4 0E5DC 19309+ CS R2,R4,T292V
00E564 1826 19310+ LR R2,R6
00E566 BA24 C0B4 0E5DC 19311+ CS R2,R4,T292V
PAGE 354
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E56A 1826 19312+ LR R2,R6
00E56C BA24 C0B4 0E5DC 19313+ CS R2,R4,T292V
00E570 1826 19314+ LR R2,R6
00E572 BA24 C0B4 0E5DC 19315+ CS R2,R4,T292V
00E576 1826 19316+ LR R2,R6
00E578 BA24 C0B4 0E5DC 19317+ CS R2,R4,T292V
00E57C 1826 19318+ LR R2,R6
00E57E BA24 C0B4 0E5DC 19319+ CS R2,R4,T292V
00E582 1826 19320+ LR R2,R6
00E584 BA24 C0B4 0E5DC 19321+ CS R2,R4,T292V
00E588 1826 19322+ LR R2,R6
00E58A BA24 C0B4 0E5DC 19323+ CS R2,R4,T292V
00E58E 1826 19324+ LR R2,R6
00E590 BA24 C0B4 0E5DC 19325+ CS R2,R4,T292V
00E594 1826 19326+ LR R2,R6
00E596 BA24 C0B4 0E5DC 19327+ CS R2,R4,T292V
00E59A 1826 19328+ LR R2,R6
00E59C BA24 C0B4 0E5DC 19329+ CS R2,R4,T292V
00E5A0 1826 19330+ LR R2,R6
00E5A2 BA24 C0B4 0E5DC 19331+ CS R2,R4,T292V
00E5A6 1826 19332+ LR R2,R6
00E5A8 BA24 C0B4 0E5DC 19333+ CS R2,R4,T292V
00E5AC 1826 19334+ LR R2,R6
00E5AE BA24 C0B4 0E5DC 19335+ CS R2,R4,T292V
00E5B2 1826 19336+ LR R2,R6
00E5B4 BA24 C0B4 0E5DC 19337+ CS R2,R4,T292V
00E5B8 1826 19338+ LR R2,R6
00E5BA BA24 C0B4 0E5DC 19339+ CS R2,R4,T292V
00E5BE 1826 19340+ LR R2,R6
00E5C0 BA24 C0B4 0E5DC 19341+ CS R2,R4,T292V
00E5C4 1826 19342+ LR R2,R6
00E5C6 BA24 C0B4 0E5DC 19343+ CS R2,R4,T292V
19344+*
00E5CA 06FB 19345 BCTR R15,R11
19346 TSIMRET
00E5CC 58F0 C0B8 0E5E0 19347+ L R15,=A(SAVETST) R15 := current save area
00E5D0 58DF 0004 00004 19348+ L R13,4(R15) get old save area back
00E5D4 98EC D00C 0000C 19349+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E5D8 07FE 19350+ BR 14 RETURN 02000000
19351 *
00E5DA 0000
00E5DC 00000001 19352 T292V DC F'1' init OP2
19353 TSIMEND
00E5E0 19354+ LTORG
00E5E0 00000458 19355 =A(SAVETST)
0E5E4 19356+T292TEND EQU *
19357 *
19358 * Test 295 -- CDS R,R,m (eq,eq) ----------------------------
19359 *
19360 TSIMBEG T295,6000,20,1,C'LR;CDS R,R,m (eq,eq)'
19361+*
003444 19362+TDSCDAT CSECT
003448 19363+ DS 0D
19364+*
003448 0000E5E8 19365+T295TDSC DC A(T295) // TENTRY
PAGE 355
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00344C 000000D4 19366+ DC A(T295TEND-T295) // TLENGTH
003450 00001770 19367+ DC F'6000' // TLRCNT
003454 00000014 19368+ DC F'20' // TIGCNT
003458 00000001 19369+ DC F'1' // TLTYPE
00178D 19370+TEXT CSECT
00178D E3F2F9F5 19371+SPTR1666 DC C'T295'
00345C 19372+TDSCDAT CSECT
00345C 19373+ DS 0F
00345C 0400178D 19374+ DC AL1(L'SPTR1666),AL3(SPTR1666)
001791 19375+TEXT CSECT
001791 D3D95EC3C4E240D9 19376+SPTR1667 DC C'LR;CDS R,R,m (eq,eq)'
003460 19377+TDSCDAT CSECT
003460 19378+ DS 0F
003460 14001791 19379+ DC AL1(L'SPTR1667),AL3(SPTR1667)
19380+*
004BB4 19381+TDSCTBL CSECT
04BB4 19382+T295TPTR EQU *
004BB4 00003448 19383+ DC A(T295TDSC) enabled test
19384+*
00E5E4 19385+TCODE CSECT
00E5E8 19386+ DS 0D ensure double word alignment for test
00E5E8 19387+T295 DS 0H 01650000
00E5E8 90EC D00C 0000C 19388+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E5EC 18CF 19389+ LR R12,R15 base register := entry address
0E5E8 19390+ USING T295,R12 declare code base register
00E5EE 41B0 C03A 0E622 19391+ LA R11,T295L load loop target to R11
00E5F2 58F0 C0D0 0E6B8 19392+ L R15,=A(SAVETST) R15 := current save area
00E5F6 50DF 0004 00004 19393+ ST R13,4(R15) set back pointer in current save area
00E5FA 182D 19394+ LR R2,R13 remember callers save area
00E5FC 18DF 19395+ LR R13,R15 setup current save area
00E5FE 50D2 0008 00008 19396+ ST R13,8(R2) set forw pointer in callers save area
00000 19397+ USING TDSC,R1 declare TDSC base register
00E602 58F0 1008 00008 19398+ L R15,TLRCNT load local repeat count to R15
19399+*
19400 *
19401 * CDS OP1,OP3,OP2 - if OP1==OP2 then OP2:=OP3
19402 * if OP1!=OP2 then OP1:=OP2
19403 *
00E606 4120 000B 0000B 19404 LA R2,11 init OP1
00E60A 4130 0016 00016 19405 LA R3,22 upper part
00E60E 5020 C0C8 0E6B0 19406 ST R2,T295V init OP2, OP2==OP1
00E612 5030 C0CC 0E6B4 19407 ST R3,T295V+4 upper part
00E616 4140 000B 0000B 19408 LA R4,11 init OP3
00E61A 4150 0016 00016 19409 LA R5,22 upper part
00E61E 4160 000B 0000B 19410 LA R6,11 restore OP1
19411 T295L REPINSN LR,(R2,R6),CDS,(R2,R4,T295V)
19412+*
19413+* build from sublist &ALIST* a comma separated string &ARGS*
19414+*
19415+*
19416+*
19417+*
19418+*
19419+*
0E622 19420+T295L EQU *
PAGE 356
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
19421+*
19422+*
19423+* write a comment indicating what REPINSN does (if NOGEN in effect)
19424+*
19425+*,// REPINSN: do 20 times:
19426+*
19427+* MNOTE requires that ' is doubled for expanded variables
19428+* thus build &MASTR as a copy of '&ARGS with ' doubled
19429+*
19430+*
19431+*,// LR R2,R6
19432+*
19433+* MNOTE requires that ' is doubled for expanded variables
19434+* thus build &MASTR as a copy of '&ARGS with ' doubled
19435+*
19436+*
19437+*,// CDS R2,R4,T295V
19438+*
19439+* finally generate code: &ICNT copies of &CO1 ...
19440+*
00E622 1826 19441+ LR R2,R6
00E624 BB24 C0C8 0E6B0 19442+ CDS R2,R4,T295V
00E628 1826 19443+ LR R2,R6
00E62A BB24 C0C8 0E6B0 19444+ CDS R2,R4,T295V
00E62E 1826 19445+ LR R2,R6
00E630 BB24 C0C8 0E6B0 19446+ CDS R2,R4,T295V
00E634 1826 19447+ LR R2,R6
00E636 BB24 C0C8 0E6B0 19448+ CDS R2,R4,T295V
00E63A 1826 19449+ LR R2,R6
00E63C BB24 C0C8 0E6B0 19450+ CDS R2,R4,T295V
00E640 1826 19451+ LR R2,R6
00E642 BB24 C0C8 0E6B0 19452+ CDS R2,R4,T295V
00E646 1826 19453+ LR R2,R6
00E648 BB24 C0C8 0E6B0 19454+ CDS R2,R4,T295V
00E64C 1826 19455+ LR R2,R6
00E64E BB24 C0C8 0E6B0 19456+ CDS R2,R4,T295V
00E652 1826 19457+ LR R2,R6
00E654 BB24 C0C8 0E6B0 19458+ CDS R2,R4,T295V
00E658 1826 19459+ LR R2,R6
00E65A BB24 C0C8 0E6B0 19460+ CDS R2,R4,T295V
00E65E 1826 19461+ LR R2,R6
00E660 BB24 C0C8 0E6B0 19462+ CDS R2,R4,T295V
00E664 1826 19463+ LR R2,R6
00E666 BB24 C0C8 0E6B0 19464+ CDS R2,R4,T295V
00E66A 1826 19465+ LR R2,R6
00E66C BB24 C0C8 0E6B0 19466+ CDS R2,R4,T295V
00E670 1826 19467+ LR R2,R6
00E672 BB24 C0C8 0E6B0 19468+ CDS R2,R4,T295V
00E676 1826 19469+ LR R2,R6
00E678 BB24 C0C8 0E6B0 19470+ CDS R2,R4,T295V
00E67C 1826 19471+ LR R2,R6
00E67E BB24 C0C8 0E6B0 19472+ CDS R2,R4,T295V
00E682 1826 19473+ LR R2,R6
00E684 BB24 C0C8 0E6B0 19474+ CDS R2,R4,T295V
00E688 1826 19475+ LR R2,R6
PAGE 357
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E68A BB24 C0C8 0E6B0 19476+ CDS R2,R4,T295V
00E68E 1826 19477+ LR R2,R6
00E690 BB24 C0C8 0E6B0 19478+ CDS R2,R4,T295V
00E694 1826 19479+ LR R2,R6
00E696 BB24 C0C8 0E6B0 19480+ CDS R2,R4,T295V
19481+*
00E69A 06FB 19482 BCTR R15,R11
19483 TSIMRET
00E69C 58F0 C0D0 0E6B8 19484+ L R15,=A(SAVETST) R15 := current save area
00E6A0 58DF 0004 00004 19485+ L R13,4(R15) get old save area back
00E6A4 98EC D00C 0000C 19486+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E6A8 07FE 19487+ BR 14 RETURN 02000000
19488 *
00E6B0 19489 DS 0D
00E6B0 FFFFFFFFFFFFFFFE 19490 T295V DC F'-1',F'-2' will be set
19491 TSIMEND
00E6B8 19492+ LTORG
00E6B8 00000458 19493 =A(SAVETST)
0E6BC 19494+T295TEND EQU *
19495 *
19496 * Test 296 -- CDS R,R,m (eq,ne) ----------------------------
19497 *
19498 TSIMBEG T296,6000,20,1,C'LR;CDS R,R,m (eq,ne)'
19499+*
003464 19500+TDSCDAT CSECT
003468 19501+ DS 0D
19502+*
003468 0000E6C0 19503+T296TDSC DC A(T296) // TENTRY
00346C 000000CC 19504+ DC A(T296TEND-T296) // TLENGTH
003470 00001770 19505+ DC F'6000' // TLRCNT
003474 00000014 19506+ DC F'20' // TIGCNT
003478 00000001 19507+ DC F'1' // TLTYPE
0017A5 19508+TEXT CSECT
0017A5 E3F2F9F6 19509+SPTR1680 DC C'T296'
00347C 19510+TDSCDAT CSECT
00347C 19511+ DS 0F
00347C 040017A5 19512+ DC AL1(L'SPTR1680),AL3(SPTR1680)
0017A9 19513+TEXT CSECT
0017A9 D3D95EC3C4E240D9 19514+SPTR1681 DC C'LR;CDS R,R,m (eq,ne)'
003480 19515+TDSCDAT CSECT
003480 19516+ DS 0F
003480 140017A9 19517+ DC AL1(L'SPTR1681),AL3(SPTR1681)
19518+*
004BB8 19519+TDSCTBL CSECT
04BB8 19520+T296TPTR EQU *
004BB8 00003468 19521+ DC A(T296TDSC) enabled test
19522+*
00E6BC 19523+TCODE CSECT
00E6C0 19524+ DS 0D ensure double word alignment for test
00E6C0 19525+T296 DS 0H 01650000
00E6C0 90EC D00C 0000C 19526+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E6C4 18CF 19527+ LR R12,R15 base register := entry address
0E6C0 19528+ USING T296,R12 declare code base register
00E6C6 41B0 C032 0E6F2 19529+ LA R11,T296L load loop target to R11
00E6CA 58F0 C0C8 0E788 19530+ L R15,=A(SAVETST) R15 := current save area
PAGE 358
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E6CE 50DF 0004 00004 19531+ ST R13,4(R15) set back pointer in current save area
00E6D2 182D 19532+ LR R2,R13 remember callers save area
00E6D4 18DF 19533+ LR R13,R15 setup current save area
00E6D6 50D2 0008 00008 19534+ ST R13,8(R2) set forw pointer in callers save area
00000 19535+ USING TDSC,R1 declare TDSC base register
00E6DA 58F0 1008 00008 19536+ L R15,TLRCNT load local repeat count to R15
19537+*
19538 *
00E6DE 4120 0000 00000 19539 LA R2,0 init OP1
00E6E2 4130 0001 00001 19540 LA R3,1 upper part
00E6E6 5020 C0C0 0E780 19541 ST R2,T296V init OP2
00E6EA 5030 C0C4 0E784 19542 ST R3,T296V+4 upper part
00E6EE 184F 19543 LR R4,R15 init OP3 (counter)
00E6F0 1853 19544 LR R5,R3 upper part
19545 T296L REPINSN CDS,(R2,R4,T296V),LR,(R2,R4)
19546+*
19547+* build from sublist &ALIST* a comma separated string &ARGS*
19548+*
19549+*
19550+*
19551+*
19552+*
19553+*
0E6F2 19554+T296L EQU *
19555+*
19556+*
19557+* write a comment indicating what REPINSN does (if NOGEN in effect)
19558+*
19559+*,// REPINSN: do 20 times:
19560+*
19561+* MNOTE requires that ' is doubled for expanded variables
19562+* thus build &MASTR as a copy of '&ARGS with ' doubled
19563+*
19564+*
19565+*,// CDS R2,R4,T296V
19566+*
19567+* MNOTE requires that ' is doubled for expanded variables
19568+* thus build &MASTR as a copy of '&ARGS with ' doubled
19569+*
19570+*
19571+*,// LR R2,R4
19572+*
19573+* finally generate code: &ICNT copies of &CO1 ...
19574+*
00E6F2 BB24 C0C0 0E780 19575+ CDS R2,R4,T296V
00E6F6 1824 19576+ LR R2,R4
00E6F8 BB24 C0C0 0E780 19577+ CDS R2,R4,T296V
00E6FC 1824 19578+ LR R2,R4
00E6FE BB24 C0C0 0E780 19579+ CDS R2,R4,T296V
00E702 1824 19580+ LR R2,R4
00E704 BB24 C0C0 0E780 19581+ CDS R2,R4,T296V
00E708 1824 19582+ LR R2,R4
00E70A BB24 C0C0 0E780 19583+ CDS R2,R4,T296V
00E70E 1824 19584+ LR R2,R4
00E710 BB24 C0C0 0E780 19585+ CDS R2,R4,T296V
PAGE 359
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E714 1824 19586+ LR R2,R4
00E716 BB24 C0C0 0E780 19587+ CDS R2,R4,T296V
00E71A 1824 19588+ LR R2,R4
00E71C BB24 C0C0 0E780 19589+ CDS R2,R4,T296V
00E720 1824 19590+ LR R2,R4
00E722 BB24 C0C0 0E780 19591+ CDS R2,R4,T296V
00E726 1824 19592+ LR R2,R4
00E728 BB24 C0C0 0E780 19593+ CDS R2,R4,T296V
00E72C 1824 19594+ LR R2,R4
00E72E BB24 C0C0 0E780 19595+ CDS R2,R4,T296V
00E732 1824 19596+ LR R2,R4
00E734 BB24 C0C0 0E780 19597+ CDS R2,R4,T296V
00E738 1824 19598+ LR R2,R4
00E73A BB24 C0C0 0E780 19599+ CDS R2,R4,T296V
00E73E 1824 19600+ LR R2,R4
00E740 BB24 C0C0 0E780 19601+ CDS R2,R4,T296V
00E744 1824 19602+ LR R2,R4
00E746 BB24 C0C0 0E780 19603+ CDS R2,R4,T296V
00E74A 1824 19604+ LR R2,R4
00E74C BB24 C0C0 0E780 19605+ CDS R2,R4,T296V
00E750 1824 19606+ LR R2,R4
00E752 BB24 C0C0 0E780 19607+ CDS R2,R4,T296V
00E756 1824 19608+ LR R2,R4
00E758 BB24 C0C0 0E780 19609+ CDS R2,R4,T296V
00E75C 1824 19610+ LR R2,R4
00E75E BB24 C0C0 0E780 19611+ CDS R2,R4,T296V
00E762 1824 19612+ LR R2,R4
00E764 BB24 C0C0 0E780 19613+ CDS R2,R4,T296V
00E768 1824 19614+ LR R2,R4
19615+*
00E76A 064B 19616 BCTR R4,R11 counter is R4 here !!
19617 TSIMRET
00E76C 58F0 C0C8 0E788 19618+ L R15,=A(SAVETST) R15 := current save area
00E770 58DF 0004 00004 19619+ L R13,4(R15) get old save area back
00E774 98EC D00C 0000C 19620+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E778 07FE 19621+ BR 14 RETURN 02000000
19622 *
00E780 19623 DS 0D
00E780 FFFFFFFFFFFFFFFE 19624 T296V DC F'-1',F'-2' will be setup
19625 TSIMEND
00E788 19626+ LTORG
00E788 00000458 19627 =A(SAVETST)
0E78C 19628+T296TEND EQU *
19629 *
19630 * Test 297 -- CDS R,R,m (ne) -------------------------------
19631 *
19632 TSIMBEG T297,1400,20,1,C'LR;CDS R,R,m (ne)'
19633+*
003484 19634+TDSCDAT CSECT
003488 19635+ DS 0D
19636+*
003488 0000E790 19637+T297TDSC DC A(T297) // TENTRY
00348C 000000CC 19638+ DC A(T297TEND-T297) // TLENGTH
003490 00000578 19639+ DC F'1400' // TLRCNT
003494 00000014 19640+ DC F'20' // TIGCNT
PAGE 360
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003498 00000001 19641+ DC F'1' // TLTYPE
0017BD 19642+TEXT CSECT
0017BD E3F2F9F7 19643+SPTR1694 DC C'T297'
00349C 19644+TDSCDAT CSECT
00349C 19645+ DS 0F
00349C 040017BD 19646+ DC AL1(L'SPTR1694),AL3(SPTR1694)
0017C1 19647+TEXT CSECT
0017C1 D3D95EC3C4E240D9 19648+SPTR1695 DC C'LR;CDS R,R,m (ne)'
0034A0 19649+TDSCDAT CSECT
0034A0 19650+ DS 0F
0034A0 110017C1 19651+ DC AL1(L'SPTR1695),AL3(SPTR1695)
19652+*
004BBC 19653+TDSCTBL CSECT
04BBC 19654+T297TPTR EQU *
004BBC 00003488 19655+ DC A(T297TDSC) enabled test
19656+*
00E78C 19657+TCODE CSECT
00E790 19658+ DS 0D ensure double word alignment for test
00E790 19659+T297 DS 0H 01650000
00E790 90EC D00C 0000C 19660+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E794 18CF 19661+ LR R12,R15 base register := entry address
0E790 19662+ USING T297,R12 declare code base register
00E796 41B0 C032 0E7C2 19663+ LA R11,T297L load loop target to R11
00E79A 58F0 C0C8 0E858 19664+ L R15,=A(SAVETST) R15 := current save area
00E79E 50DF 0004 00004 19665+ ST R13,4(R15) set back pointer in current save area
00E7A2 182D 19666+ LR R2,R13 remember callers save area
00E7A4 18DF 19667+ LR R13,R15 setup current save area
00E7A6 50D2 0008 00008 19668+ ST R13,8(R2) set forw pointer in callers save area
00000 19669+ USING TDSC,R1 declare TDSC base register
00E7AA 58F0 1008 00008 19670+ L R15,TLRCNT load local repeat count to R15
19671+*
19672 *
00E7AE 4120 006E 0006E 19673 LA R2,110 init OP1, OP1!=OP2
00E7B2 4130 00DC 000DC 19674 LA R3,220 upper part
00E7B6 4140 000B 0000B 19675 LA R4,11 init OP3
00E7BA 4150 0016 00016 19676 LA R5,22 upper part
00E7BE 4160 006E 0006E 19677 LA R6,110 restore OP1
19678 T297L REPINSN LR,(R2,R6),CDS,(R2,R4,T297V)
19679+*
19680+* build from sublist &ALIST* a comma separated string &ARGS*
19681+*
19682+*
19683+*
19684+*
19685+*
19686+*
0E7C2 19687+T297L EQU *
19688+*
19689+*
19690+* write a comment indicating what REPINSN does (if NOGEN in effect)
19691+*
19692+*,// REPINSN: do 20 times:
19693+*
19694+* MNOTE requires that ' is doubled for expanded variables
19695+* thus build &MASTR as a copy of '&ARGS with ' doubled
PAGE 361
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
19696+*
19697+*
19698+*,// LR R2,R6
19699+*
19700+* MNOTE requires that ' is doubled for expanded variables
19701+* thus build &MASTR as a copy of '&ARGS with ' doubled
19702+*
19703+*
19704+*,// CDS R2,R4,T297V
19705+*
19706+* finally generate code: &ICNT copies of &CO1 ...
19707+*
00E7C2 1826 19708+ LR R2,R6
00E7C4 BB24 C0C0 0E850 19709+ CDS R2,R4,T297V
00E7C8 1826 19710+ LR R2,R6
00E7CA BB24 C0C0 0E850 19711+ CDS R2,R4,T297V
00E7CE 1826 19712+ LR R2,R6
00E7D0 BB24 C0C0 0E850 19713+ CDS R2,R4,T297V
00E7D4 1826 19714+ LR R2,R6
00E7D6 BB24 C0C0 0E850 19715+ CDS R2,R4,T297V
00E7DA 1826 19716+ LR R2,R6
00E7DC BB24 C0C0 0E850 19717+ CDS R2,R4,T297V
00E7E0 1826 19718+ LR R2,R6
00E7E2 BB24 C0C0 0E850 19719+ CDS R2,R4,T297V
00E7E6 1826 19720+ LR R2,R6
00E7E8 BB24 C0C0 0E850 19721+ CDS R2,R4,T297V
00E7EC 1826 19722+ LR R2,R6
00E7EE BB24 C0C0 0E850 19723+ CDS R2,R4,T297V
00E7F2 1826 19724+ LR R2,R6
00E7F4 BB24 C0C0 0E850 19725+ CDS R2,R4,T297V
00E7F8 1826 19726+ LR R2,R6
00E7FA BB24 C0C0 0E850 19727+ CDS R2,R4,T297V
00E7FE 1826 19728+ LR R2,R6
00E800 BB24 C0C0 0E850 19729+ CDS R2,R4,T297V
00E804 1826 19730+ LR R2,R6
00E806 BB24 C0C0 0E850 19731+ CDS R2,R4,T297V
00E80A 1826 19732+ LR R2,R6
00E80C BB24 C0C0 0E850 19733+ CDS R2,R4,T297V
00E810 1826 19734+ LR R2,R6
00E812 BB24 C0C0 0E850 19735+ CDS R2,R4,T297V
00E816 1826 19736+ LR R2,R6
00E818 BB24 C0C0 0E850 19737+ CDS R2,R4,T297V
00E81C 1826 19738+ LR R2,R6
00E81E BB24 C0C0 0E850 19739+ CDS R2,R4,T297V
00E822 1826 19740+ LR R2,R6
00E824 BB24 C0C0 0E850 19741+ CDS R2,R4,T297V
00E828 1826 19742+ LR R2,R6
00E82A BB24 C0C0 0E850 19743+ CDS R2,R4,T297V
00E82E 1826 19744+ LR R2,R6
00E830 BB24 C0C0 0E850 19745+ CDS R2,R4,T297V
00E834 1826 19746+ LR R2,R6
00E836 BB24 C0C0 0E850 19747+ CDS R2,R4,T297V
19748+*
00E83A 06FB 19749 BCTR R15,R11
19750 TSIMRET
PAGE 362
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E83C 58F0 C0C8 0E858 19751+ L R15,=A(SAVETST) R15 := current save area
00E840 58DF 0004 00004 19752+ L R13,4(R15) get old save area back
00E844 98EC D00C 0000C 19753+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E848 07FE 19754+ BR 14 RETURN 02000000
19755 *
00E850 19756 DS 0D
00E850 0000000B00000016 19757 T297V DC F'11',F'22' init OP2
19758 TSIMEND
00E858 19759+ LTORG
00E858 00000458 19760 =A(SAVETST)
0E85C 19761+T297TEND EQU *
19762 *
19763 * Test 3xx -- flow control ======================================
19764 *
19765 * Test 300 -- BCR 0,0 --------------------------------------
19766 *
19767 TSIMBEG T300,20000,100,1,C'BCR 0,0 (noop)'
19768+*
0034A4 19769+TDSCDAT CSECT
0034A8 19770+ DS 0D
19771+*
0034A8 0000E860 19772+T300TDSC DC A(T300) // TENTRY
0034AC 000000FC 19773+ DC A(T300TEND-T300) // TLENGTH
0034B0 00004E20 19774+ DC F'20000' // TLRCNT
0034B4 00000064 19775+ DC F'100' // TIGCNT
0034B8 00000001 19776+ DC F'1' // TLTYPE
0017D2 19777+TEXT CSECT
0017D2 E3F3F0F0 19778+SPTR1708 DC C'T300'
0034BC 19779+TDSCDAT CSECT
0034BC 19780+ DS 0F
0034BC 040017D2 19781+ DC AL1(L'SPTR1708),AL3(SPTR1708)
0017D6 19782+TEXT CSECT
0017D6 C2C3D940F06BF040 19783+SPTR1709 DC C'BCR 0,0 (noop)'
0034C0 19784+TDSCDAT CSECT
0034C0 19785+ DS 0F
0034C0 0E0017D6 19786+ DC AL1(L'SPTR1709),AL3(SPTR1709)
19787+*
004BC0 19788+TDSCTBL CSECT
04BC0 19789+T300TPTR EQU *
004BC0 000034A8 19790+ DC A(T300TDSC) enabled test
19791+*
00E85C 19792+TCODE CSECT
00E860 19793+ DS 0D ensure double word alignment for test
00E860 19794+T300 DS 0H 01650000
00E860 90EC D00C 0000C 19795+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E864 18CF 19796+ LR R12,R15 base register := entry address
0E860 19797+ USING T300,R12 declare code base register
00E866 41B0 C01E 0E87E 19798+ LA R11,T300L load loop target to R11
00E86A 58F0 C0F8 0E958 19799+ L R15,=A(SAVETST) R15 := current save area
00E86E 50DF 0004 00004 19800+ ST R13,4(R15) set back pointer in current save area
00E872 182D 19801+ LR R2,R13 remember callers save area
00E874 18DF 19802+ LR R13,R15 setup current save area
00E876 50D2 0008 00008 19803+ ST R13,8(R2) set forw pointer in callers save area
00000 19804+ USING TDSC,R1 declare TDSC base register
00E87A 58F0 1008 00008 19805+ L R15,TLRCNT load local repeat count to R15
PAGE 363
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
19806+*
19807 *
19808 T300L REPINS BCR,(0,0) repeat: BCR 0,0
19809+*
19810+* build from sublist &ALIST a comma separated string &ARGS
19811+*
19812+*
19813+*
19814+*
19815+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
19816+* this allows to transfer the repeat count from last TDSCGEN call
19817+*
19818+*
0E87E 19819+T300L EQU *
19820+*
19821+* write a comment indicating what REPINS does (in case NOGEN in effect)
19822+*
19823+*,// REPINS: do 100 times:
19824+*
19825+* MNOTE requires that ' is doubled for expanded variables
19826+* thus build &MASTR as a copy of '&ARGS with ' doubled
19827+*
19828+*
19829+*,// BCR 0,0
19830+*
19831+* finally generate code: &ICNT copies of &CODE &ARGS
19832+*
00E87E 0700 19833+ BCR 0,0
00E880 0700 19834+ BCR 0,0
00E882 0700 19835+ BCR 0,0
00E884 0700 19836+ BCR 0,0
00E886 0700 19837+ BCR 0,0
00E888 0700 19838+ BCR 0,0
00E88A 0700 19839+ BCR 0,0
00E88C 0700 19840+ BCR 0,0
00E88E 0700 19841+ BCR 0,0
00E890 0700 19842+ BCR 0,0
00E892 0700 19843+ BCR 0,0
00E894 0700 19844+ BCR 0,0
00E896 0700 19845+ BCR 0,0
00E898 0700 19846+ BCR 0,0
00E89A 0700 19847+ BCR 0,0
00E89C 0700 19848+ BCR 0,0
00E89E 0700 19849+ BCR 0,0
00E8A0 0700 19850+ BCR 0,0
00E8A2 0700 19851+ BCR 0,0
00E8A4 0700 19852+ BCR 0,0
00E8A6 0700 19853+ BCR 0,0
00E8A8 0700 19854+ BCR 0,0
00E8AA 0700 19855+ BCR 0,0
00E8AC 0700 19856+ BCR 0,0
00E8AE 0700 19857+ BCR 0,0
00E8B0 0700 19858+ BCR 0,0
00E8B2 0700 19859+ BCR 0,0
00E8B4 0700 19860+ BCR 0,0
PAGE 364
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E8B6 0700 19861+ BCR 0,0
00E8B8 0700 19862+ BCR 0,0
00E8BA 0700 19863+ BCR 0,0
00E8BC 0700 19864+ BCR 0,0
00E8BE 0700 19865+ BCR 0,0
00E8C0 0700 19866+ BCR 0,0
00E8C2 0700 19867+ BCR 0,0
00E8C4 0700 19868+ BCR 0,0
00E8C6 0700 19869+ BCR 0,0
00E8C8 0700 19870+ BCR 0,0
00E8CA 0700 19871+ BCR 0,0
00E8CC 0700 19872+ BCR 0,0
00E8CE 0700 19873+ BCR 0,0
00E8D0 0700 19874+ BCR 0,0
00E8D2 0700 19875+ BCR 0,0
00E8D4 0700 19876+ BCR 0,0
00E8D6 0700 19877+ BCR 0,0
00E8D8 0700 19878+ BCR 0,0
00E8DA 0700 19879+ BCR 0,0
00E8DC 0700 19880+ BCR 0,0
00E8DE 0700 19881+ BCR 0,0
00E8E0 0700 19882+ BCR 0,0
00E8E2 0700 19883+ BCR 0,0
00E8E4 0700 19884+ BCR 0,0
00E8E6 0700 19885+ BCR 0,0
00E8E8 0700 19886+ BCR 0,0
00E8EA 0700 19887+ BCR 0,0
00E8EC 0700 19888+ BCR 0,0
00E8EE 0700 19889+ BCR 0,0
00E8F0 0700 19890+ BCR 0,0
00E8F2 0700 19891+ BCR 0,0
00E8F4 0700 19892+ BCR 0,0
00E8F6 0700 19893+ BCR 0,0
00E8F8 0700 19894+ BCR 0,0
00E8FA 0700 19895+ BCR 0,0
00E8FC 0700 19896+ BCR 0,0
00E8FE 0700 19897+ BCR 0,0
00E900 0700 19898+ BCR 0,0
00E902 0700 19899+ BCR 0,0
00E904 0700 19900+ BCR 0,0
00E906 0700 19901+ BCR 0,0
00E908 0700 19902+ BCR 0,0
00E90A 0700 19903+ BCR 0,0
00E90C 0700 19904+ BCR 0,0
00E90E 0700 19905+ BCR 0,0
00E910 0700 19906+ BCR 0,0
00E912 0700 19907+ BCR 0,0
00E914 0700 19908+ BCR 0,0
00E916 0700 19909+ BCR 0,0
00E918 0700 19910+ BCR 0,0
00E91A 0700 19911+ BCR 0,0
00E91C 0700 19912+ BCR 0,0
00E91E 0700 19913+ BCR 0,0
00E920 0700 19914+ BCR 0,0
00E922 0700 19915+ BCR 0,0
PAGE 365
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E924 0700 19916+ BCR 0,0
00E926 0700 19917+ BCR 0,0
00E928 0700 19918+ BCR 0,0
00E92A 0700 19919+ BCR 0,0
00E92C 0700 19920+ BCR 0,0
00E92E 0700 19921+ BCR 0,0
00E930 0700 19922+ BCR 0,0
00E932 0700 19923+ BCR 0,0
00E934 0700 19924+ BCR 0,0
00E936 0700 19925+ BCR 0,0
00E938 0700 19926+ BCR 0,0
00E93A 0700 19927+ BCR 0,0
00E93C 0700 19928+ BCR 0,0
00E93E 0700 19929+ BCR 0,0
00E940 0700 19930+ BCR 0,0
00E942 0700 19931+ BCR 0,0
00E944 0700 19932+ BCR 0,0
19933+*
00E946 06FB 19934 BCTR R15,R11
19935 TSIMRET
00E948 58F0 C0F8 0E958 19936+ L R15,=A(SAVETST) R15 := current save area
00E94C 58DF 0004 00004 19937+ L R13,4(R15) get old save area back
00E950 98EC D00C 0000C 19938+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00E954 07FE 19939+ BR 14 RETURN 02000000
19940 TSIMEND
00E958 19941+ LTORG
00E958 00000458 19942 =A(SAVETST)
0E95C 19943+T300TEND EQU *
19944 *
19945 * Test 301 -- BNZ l (no br) --------------------------------
19946 *
19947 TSIMBEG T301,22000,100,1,C'BNZ l (no br)'
19948+*
0034C4 19949+TDSCDAT CSECT
0034C8 19950+ DS 0D
19951+*
0034C8 0000E960 19952+T301TDSC DC A(T301) // TENTRY
0034CC 000001CC 19953+ DC A(T301TEND-T301) // TLENGTH
0034D0 000055F0 19954+ DC F'22000' // TLRCNT
0034D4 00000064 19955+ DC F'100' // TIGCNT
0034D8 00000001 19956+ DC F'1' // TLTYPE
0017E4 19957+TEXT CSECT
0017E4 E3F3F0F1 19958+SPTR1720 DC C'T301'
0034DC 19959+TDSCDAT CSECT
0034DC 19960+ DS 0F
0034DC 040017E4 19961+ DC AL1(L'SPTR1720),AL3(SPTR1720)
0017E8 19962+TEXT CSECT
0017E8 C2D5E94093404D95 19963+SPTR1721 DC C'BNZ l (no br)'
0034E0 19964+TDSCDAT CSECT
0034E0 19965+ DS 0F
0034E0 0D0017E8 19966+ DC AL1(L'SPTR1721),AL3(SPTR1721)
19967+*
004BC4 19968+TDSCTBL CSECT
04BC4 19969+T301TPTR EQU *
004BC4 000034C8 19970+ DC A(T301TDSC) enabled test
PAGE 366
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
19971+*
00E95C 19972+TCODE CSECT
00E960 19973+ DS 0D ensure double word alignment for test
00E960 19974+T301 DS 0H 01650000
00E960 90EC D00C 0000C 19975+ STM 14,12,12(13) SAVE REGISTERS 02950000
00E964 18CF 19976+ LR R12,R15 base register := entry address
0E960 19977+ USING T301,R12 declare code base register
00E966 41B0 C020 0E980 19978+ LA R11,T301L load loop target to R11
00E96A 58F0 C1C8 0EB28 19979+ L R15,=A(SAVETST) R15 := current save area
00E96E 50DF 0004 00004 19980+ ST R13,4(R15) set back pointer in current save area
00E972 182D 19981+ LR R2,R13 remember callers save area
00E974 18DF 19982+ LR R13,R15 setup current save area
00E976 50D2 0008 00008 19983+ ST R13,8(R2) set forw pointer in callers save area
00000 19984+ USING TDSC,R1 declare TDSC base register
00E97A 58F0 1008 00008 19985+ L R15,TLRCNT load local repeat count to R15
19986+*
19987 *
00E97E 1700 19988 XR R0,R0 clear, ensure Z cond set
19989 T301L REPINS BNZ,(T301BAD) repeat: BNZ T301BAD
19990+*
19991+* build from sublist &ALIST a comma separated string &ARGS
19992+*
19993+*
19994+*
19995+*
19996+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
19997+* this allows to transfer the repeat count from last TDSCGEN call
19998+*
19999+*
0E980 20000+T301L EQU *
20001+*
20002+* write a comment indicating what REPINS does (in case NOGEN in effect)
20003+*
20004+*,// REPINS: do 100 times:
20005+*
20006+* MNOTE requires that ' is doubled for expanded variables
20007+* thus build &MASTR as a copy of '&ARGS with ' doubled
20008+*
20009+*
20010+*,// BNZ T301BAD
20011+*
20012+* finally generate code: &ICNT copies of &CODE &ARGS
20013+*
00E980 4770 C1C0 0EB20 20014+ BNZ T301BAD
00E984 4770 C1C0 0EB20 20015+ BNZ T301BAD
00E988 4770 C1C0 0EB20 20016+ BNZ T301BAD
00E98C 4770 C1C0 0EB20 20017+ BNZ T301BAD
00E990 4770 C1C0 0EB20 20018+ BNZ T301BAD
00E994 4770 C1C0 0EB20 20019+ BNZ T301BAD
00E998 4770 C1C0 0EB20 20020+ BNZ T301BAD
00E99C 4770 C1C0 0EB20 20021+ BNZ T301BAD
00E9A0 4770 C1C0 0EB20 20022+ BNZ T301BAD
00E9A4 4770 C1C0 0EB20 20023+ BNZ T301BAD
00E9A8 4770 C1C0 0EB20 20024+ BNZ T301BAD
00E9AC 4770 C1C0 0EB20 20025+ BNZ T301BAD
PAGE 367
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00E9B0 4770 C1C0 0EB20 20026+ BNZ T301BAD
00E9B4 4770 C1C0 0EB20 20027+ BNZ T301BAD
00E9B8 4770 C1C0 0EB20 20028+ BNZ T301BAD
00E9BC 4770 C1C0 0EB20 20029+ BNZ T301BAD
00E9C0 4770 C1C0 0EB20 20030+ BNZ T301BAD
00E9C4 4770 C1C0 0EB20 20031+ BNZ T301BAD
00E9C8 4770 C1C0 0EB20 20032+ BNZ T301BAD
00E9CC 4770 C1C0 0EB20 20033+ BNZ T301BAD
00E9D0 4770 C1C0 0EB20 20034+ BNZ T301BAD
00E9D4 4770 C1C0 0EB20 20035+ BNZ T301BAD
00E9D8 4770 C1C0 0EB20 20036+ BNZ T301BAD
00E9DC 4770 C1C0 0EB20 20037+ BNZ T301BAD
00E9E0 4770 C1C0 0EB20 20038+ BNZ T301BAD
00E9E4 4770 C1C0 0EB20 20039+ BNZ T301BAD
00E9E8 4770 C1C0 0EB20 20040+ BNZ T301BAD
00E9EC 4770 C1C0 0EB20 20041+ BNZ T301BAD
00E9F0 4770 C1C0 0EB20 20042+ BNZ T301BAD
00E9F4 4770 C1C0 0EB20 20043+ BNZ T301BAD
00E9F8 4770 C1C0 0EB20 20044+ BNZ T301BAD
00E9FC 4770 C1C0 0EB20 20045+ BNZ T301BAD
00EA00 4770 C1C0 0EB20 20046+ BNZ T301BAD
00EA04 4770 C1C0 0EB20 20047+ BNZ T301BAD
00EA08 4770 C1C0 0EB20 20048+ BNZ T301BAD
00EA0C 4770 C1C0 0EB20 20049+ BNZ T301BAD
00EA10 4770 C1C0 0EB20 20050+ BNZ T301BAD
00EA14 4770 C1C0 0EB20 20051+ BNZ T301BAD
00EA18 4770 C1C0 0EB20 20052+ BNZ T301BAD
00EA1C 4770 C1C0 0EB20 20053+ BNZ T301BAD
00EA20 4770 C1C0 0EB20 20054+ BNZ T301BAD
00EA24 4770 C1C0 0EB20 20055+ BNZ T301BAD
00EA28 4770 C1C0 0EB20 20056+ BNZ T301BAD
00EA2C 4770 C1C0 0EB20 20057+ BNZ T301BAD
00EA30 4770 C1C0 0EB20 20058+ BNZ T301BAD
00EA34 4770 C1C0 0EB20 20059+ BNZ T301BAD
00EA38 4770 C1C0 0EB20 20060+ BNZ T301BAD
00EA3C 4770 C1C0 0EB20 20061+ BNZ T301BAD
00EA40 4770 C1C0 0EB20 20062+ BNZ T301BAD
00EA44 4770 C1C0 0EB20 20063+ BNZ T301BAD
00EA48 4770 C1C0 0EB20 20064+ BNZ T301BAD
00EA4C 4770 C1C0 0EB20 20065+ BNZ T301BAD
00EA50 4770 C1C0 0EB20 20066+ BNZ T301BAD
00EA54 4770 C1C0 0EB20 20067+ BNZ T301BAD
00EA58 4770 C1C0 0EB20 20068+ BNZ T301BAD
00EA5C 4770 C1C0 0EB20 20069+ BNZ T301BAD
00EA60 4770 C1C0 0EB20 20070+ BNZ T301BAD
00EA64 4770 C1C0 0EB20 20071+ BNZ T301BAD
00EA68 4770 C1C0 0EB20 20072+ BNZ T301BAD
00EA6C 4770 C1C0 0EB20 20073+ BNZ T301BAD
00EA70 4770 C1C0 0EB20 20074+ BNZ T301BAD
00EA74 4770 C1C0 0EB20 20075+ BNZ T301BAD
00EA78 4770 C1C0 0EB20 20076+ BNZ T301BAD
00EA7C 4770 C1C0 0EB20 20077+ BNZ T301BAD
00EA80 4770 C1C0 0EB20 20078+ BNZ T301BAD
00EA84 4770 C1C0 0EB20 20079+ BNZ T301BAD
00EA88 4770 C1C0 0EB20 20080+ BNZ T301BAD
PAGE 368
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00EA8C 4770 C1C0 0EB20 20081+ BNZ T301BAD
00EA90 4770 C1C0 0EB20 20082+ BNZ T301BAD
00EA94 4770 C1C0 0EB20 20083+ BNZ T301BAD
00EA98 4770 C1C0 0EB20 20084+ BNZ T301BAD
00EA9C 4770 C1C0 0EB20 20085+ BNZ T301BAD
00EAA0 4770 C1C0 0EB20 20086+ BNZ T301BAD
00EAA4 4770 C1C0 0EB20 20087+ BNZ T301BAD
00EAA8 4770 C1C0 0EB20 20088+ BNZ T301BAD
00EAAC 4770 C1C0 0EB20 20089+ BNZ T301BAD
00EAB0 4770 C1C0 0EB20 20090+ BNZ T301BAD
00EAB4 4770 C1C0 0EB20 20091+ BNZ T301BAD
00EAB8 4770 C1C0 0EB20 20092+ BNZ T301BAD
00EABC 4770 C1C0 0EB20 20093+ BNZ T301BAD
00EAC0 4770 C1C0 0EB20 20094+ BNZ T301BAD
00EAC4 4770 C1C0 0EB20 20095+ BNZ T301BAD
00EAC8 4770 C1C0 0EB20 20096+ BNZ T301BAD
00EACC 4770 C1C0 0EB20 20097+ BNZ T301BAD
00EAD0 4770 C1C0 0EB20 20098+ BNZ T301BAD
00EAD4 4770 C1C0 0EB20 20099+ BNZ T301BAD
00EAD8 4770 C1C0 0EB20 20100+ BNZ T301BAD
00EADC 4770 C1C0 0EB20 20101+ BNZ T301BAD
00EAE0 4770 C1C0 0EB20 20102+ BNZ T301BAD
00EAE4 4770 C1C0 0EB20 20103+ BNZ T301BAD
00EAE8 4770 C1C0 0EB20 20104+ BNZ T301BAD
00EAEC 4770 C1C0 0EB20 20105+ BNZ T301BAD
00EAF0 4770 C1C0 0EB20 20106+ BNZ T301BAD
00EAF4 4770 C1C0 0EB20 20107+ BNZ T301BAD
00EAF8 4770 C1C0 0EB20 20108+ BNZ T301BAD
00EAFC 4770 C1C0 0EB20 20109+ BNZ T301BAD
00EB00 4770 C1C0 0EB20 20110+ BNZ T301BAD
00EB04 4770 C1C0 0EB20 20111+ BNZ T301BAD
00EB08 4770 C1C0 0EB20 20112+ BNZ T301BAD
00EB0C 4770 C1C0 0EB20 20113+ BNZ T301BAD
20114+*
00EB10 06FB 20115 BCTR R15,R11
20116 TSIMRET
00EB12 58F0 C1C8 0EB28 20117+ L R15,=A(SAVETST) R15 := current save area
00EB16 58DF 0004 00004 20118+ L R13,4(R15) get old save area back
00EB1A 98EC D00C 0000C 20119+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00EB1E 07FE 20120+ BR 14 RETURN 02000000
20121 *
20122 T301BAD ABEND 50
00EB20 20123+T301BAD DS 0H 00400002
00EB20 4110 0032 00032 20124+ LA 1,50 LOAD PARAMETER REG 1 01900002
00EB24 0A0D 20125+ SVC 13 LINK TO ABEND ROUTINE 02050002
20126 TSIMEND
00EB28 20127+ LTORG
00EB28 00000458 20128 =A(SAVETST)
0EB2C 20129+T301TEND EQU *
20130 *
20131 * Test 302 -- BNZ l (do br) --------------------------------
20132 *
20133 TSIMBEG T302,12000,60,1,C'BNZ l (do br)'
20134+*
0034E4 20135+TDSCDAT CSECT
PAGE 369
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0034E8 20136+ DS 0D
20137+*
0034E8 0000EB30 20138+T302TDSC DC A(T302) // TENTRY
0034EC 00000140 20139+ DC A(T302TEND-T302) // TLENGTH
0034F0 00002EE0 20140+ DC F'12000' // TLRCNT
0034F4 0000003C 20141+ DC F'60' // TIGCNT
0034F8 00000001 20142+ DC F'1' // TLTYPE
0017F5 20143+TEXT CSECT
0017F5 E3F3F0F2 20144+SPTR1734 DC C'T302'
0034FC 20145+TDSCDAT CSECT
0034FC 20146+ DS 0F
0034FC 040017F5 20147+ DC AL1(L'SPTR1734),AL3(SPTR1734)
0017F9 20148+TEXT CSECT
0017F9 C2D5E94093404D84 20149+SPTR1735 DC C'BNZ l (do br)'
003500 20150+TDSCDAT CSECT
003500 20151+ DS 0F
003500 0D0017F9 20152+ DC AL1(L'SPTR1735),AL3(SPTR1735)
20153+*
004BC8 20154+TDSCTBL CSECT
04BC8 20155+T302TPTR EQU *
004BC8 000034E8 20156+ DC A(T302TDSC) enabled test
20157+*
00EB2C 20158+TCODE CSECT
00EB30 20159+ DS 0D ensure double word alignment for test
00EB30 20160+T302 DS 0H 01650000
00EB30 90EC D00C 0000C 20161+ STM 14,12,12(13) SAVE REGISTERS 02950000
00EB34 18CF 20162+ LR R12,R15 base register := entry address
0EB30 20163+ USING T302,R12 declare code base register
00EB36 41B0 C024 0EB54 20164+ LA R11,T302L load loop target to R11
00EB3A 58F0 C138 0EC68 20165+ L R15,=A(SAVETST) R15 := current save area
00EB3E 50DF 0004 00004 20166+ ST R13,4(R15) set back pointer in current save area
00EB42 182D 20167+ LR R2,R13 remember callers save area
00EB44 18DF 20168+ LR R13,R15 setup current save area
00EB46 50D2 0008 00008 20169+ ST R13,8(R2) set forw pointer in callers save area
00000 20170+ USING TDSC,R1 declare TDSC base register
00EB4A 58F0 1008 00008 20171+ L R15,TLRCNT load local repeat count to R15
20172+*
20173 *
00EB4E 1700 20174 XR R0,R0 clear, ensure Z cond set
00EB50 5A00 C13C 0EC6C 20175 A R0,=F'1' inc, ensure Z cond not set
0EB54 20176 T302L EQU *
00EB54 4770 C0A8 0EBD8 20177 BNZ T302D01 1st branch
00EB58 4770 C0AC 0EBDC 20178 T302U01 BNZ T302D02 3rd branch
00EB5C 4770 C0B0 0EBE0 20179 T302U02 BNZ T302D03 5th branch
00EB60 4770 C0B4 0EBE4 20180 T302U03 BNZ T302D04
00EB64 4770 C0B8 0EBE8 20181 T302U04 BNZ T302D05
00EB68 4770 C0BC 0EBEC 20182 T302U05 BNZ T302D06
00EB6C 4770 C0C0 0EBF0 20183 T302U06 BNZ T302D07
00EB70 4770 C0C4 0EBF4 20184 T302U07 BNZ T302D08
00EB74 4770 C0C8 0EBF8 20185 T302U08 BNZ T302D09
00EB78 4770 C0CC 0EBFC 20186 T302U09 BNZ T302D10
00EB7C 4770 C0D0 0EC00 20187 T302U10 BNZ T302D11
00EB80 4770 C0D4 0EC04 20188 T302U11 BNZ T302D12
00EB84 4770 C0D8 0EC08 20189 T302U12 BNZ T302D13
00EB88 4770 C0DC 0EC0C 20190 T302U13 BNZ T302D14
PAGE 370
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00EB8C 4770 C0E0 0EC10 20191 T302U14 BNZ T302D15
00EB90 4770 C0E4 0EC14 20192 T302U15 BNZ T302D16
00EB94 4770 C0E8 0EC18 20193 T302U16 BNZ T302D17
00EB98 4770 C0EC 0EC1C 20194 T302U17 BNZ T302D18
00EB9C 4770 C0F0 0EC20 20195 T302U18 BNZ T302D19
00EBA0 4770 C0F4 0EC24 20196 T302U19 BNZ T302D20
00EBA4 4770 C0F8 0EC28 20197 T302U20 BNZ T302D21
00EBA8 4770 C0FC 0EC2C 20198 T302U21 BNZ T302D22
00EBAC 4770 C100 0EC30 20199 T302U22 BNZ T302D23
00EBB0 4770 C104 0EC34 20200 T302U23 BNZ T302D24
00EBB4 4770 C108 0EC38 20201 T302U24 BNZ T302D25
00EBB8 4770 C10C 0EC3C 20202 T302U25 BNZ T302D26
00EBBC 4770 C110 0EC40 20203 T302U26 BNZ T302D27
00EBC0 4770 C114 0EC44 20204 T302U27 BNZ T302D28
00EBC4 4770 C118 0EC48 20205 T302U28 BNZ T302D29 57th branch
00EBC8 4770 C11C 0EC4C 20206 T302U29 BNZ T302D30 59th branch
20207 ABEND 50
00EBCC 20208+ DS 0H 00400002
00EBCC 4110 0032 00032 20209+ LA 1,50 LOAD PARAMETER REG 1 01900002
00EBD0 0A0D 20210+ SVC 13 LINK TO ABEND ROUTINE 02050002
20211 *
00EBD2 06FB 20212 T302U30 BCTR R15,R11 inner loop closure
00EBD4 47F0 C126 0EC56 20213 B T302END before bottom half of maze
20214 *
00EBD8 4770 C028 0EB58 20215 T302D01 BNZ T302U01 2nd branch
00EBDC 4770 C02C 0EB5C 20216 T302D02 BNZ T302U02 4th branch
00EBE0 4770 C030 0EB60 20217 T302D03 BNZ T302U03
00EBE4 4770 C034 0EB64 20218 T302D04 BNZ T302U04
00EBE8 4770 C038 0EB68 20219 T302D05 BNZ T302U05
00EBEC 4770 C03C 0EB6C 20220 T302D06 BNZ T302U06
00EBF0 4770 C040 0EB70 20221 T302D07 BNZ T302U07
00EBF4 4770 C044 0EB74 20222 T302D08 BNZ T302U08
00EBF8 4770 C048 0EB78 20223 T302D09 BNZ T302U09
00EBFC 4770 C04C 0EB7C 20224 T302D10 BNZ T302U10
00EC00 4770 C050 0EB80 20225 T302D11 BNZ T302U11
00EC04 4770 C054 0EB84 20226 T302D12 BNZ T302U12
00EC08 4770 C058 0EB88 20227 T302D13 BNZ T302U13
00EC0C 4770 C05C 0EB8C 20228 T302D14 BNZ T302U14
00EC10 4770 C060 0EB90 20229 T302D15 BNZ T302U15
00EC14 4770 C064 0EB94 20230 T302D16 BNZ T302U16
00EC18 4770 C068 0EB98 20231 T302D17 BNZ T302U17
00EC1C 4770 C06C 0EB9C 20232 T302D18 BNZ T302U18
00EC20 4770 C070 0EBA0 20233 T302D19 BNZ T302U19
00EC24 4770 C074 0EBA4 20234 T302D20 BNZ T302U20
00EC28 4770 C078 0EBA8 20235 T302D21 BNZ T302U21
00EC2C 4770 C07C 0EBAC 20236 T302D22 BNZ T302U22
00EC30 4770 C080 0EBB0 20237 T302D23 BNZ T302U23
00EC34 4770 C084 0EBB4 20238 T302D24 BNZ T302U24
00EC38 4770 C088 0EBB8 20239 T302D25 BNZ T302U25
00EC3C 4770 C08C 0EBBC 20240 T302D26 BNZ T302U26
00EC40 4770 C090 0EBC0 20241 T302D27 BNZ T302U27
00EC44 4770 C094 0EBC4 20242 T302D28 BNZ T302U28
00EC48 4770 C098 0EBC8 20243 T302D29 BNZ T302U29
00EC4C 4770 C0A2 0EBD2 20244 T302D30 BNZ T302U30 60th branch
20245 ABEND 50
PAGE 371
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00EC50 20246+ DS 0H 00400002
00EC50 4110 0032 00032 20247+ LA 1,50 LOAD PARAMETER REG 1 01900002
00EC54 0A0D 20248+ SVC 13 LINK TO ABEND ROUTINE 02050002
20249 *
0EC56 20250 T302END EQU *
20251 TSIMRET
00EC56 58F0 C138 0EC68 20252+ L R15,=A(SAVETST) R15 := current save area
00EC5A 58DF 0004 00004 20253+ L R13,4(R15) get old save area back
00EC5E 98EC D00C 0000C 20254+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00EC62 07FE 20255+ BR 14 RETURN 02000000
20256 TSIMEND
00EC68 20257+ LTORG
00EC68 00000458 20258 =A(SAVETST)
00EC6C 00000001 20259 =F'1'
0EC70 20260+T302TEND EQU *
20261 *
20262 * Test 303 -- BNZ l (do br) --------------------------------
20263 *
20264 TSIMBEG T303,6000,60,1,C'BNZ l (do br, far)',NBASE=2
20265+*
003504 20266+TDSCDAT CSECT
003508 20267+ DS 0D
20268+*
003508 0000EC70 20269+T303TDSC DC A(T303) // TENTRY
00350C 00001148 20270+ DC A(T303TEND-T303) // TLENGTH
003510 00001770 20271+ DC F'6000' // TLRCNT
003514 0000003C 20272+ DC F'60' // TIGCNT
003518 00000001 20273+ DC F'1' // TLTYPE
001806 20274+TEXT CSECT
001806 E3F3F0F3 20275+SPTR1747 DC C'T303'
00351C 20276+TDSCDAT CSECT
00351C 20277+ DS 0F
00351C 04001806 20278+ DC AL1(L'SPTR1747),AL3(SPTR1747)
00180A 20279+TEXT CSECT
00180A C2D5E94093404D84 20280+SPTR1748 DC C'BNZ l (do br, far)'
003520 20281+TDSCDAT CSECT
003520 20282+ DS 0F
003520 1200180A 20283+ DC AL1(L'SPTR1748),AL3(SPTR1748)
20284+*
004BCC 20285+TDSCTBL CSECT
04BCC 20286+T303TPTR EQU *
004BCC 00003508 20287+ DC A(T303TDSC) enabled test
20288+*
00EC70 20289+TCODE CSECT
00EC70 20290+ DS 0D ensure double word alignment for test
00EC70 20291+T303 DS 0H 01650000
00EC70 90EC D00C 0000C 20292+ STM 14,12,12(13) SAVE REGISTERS 02950000
00EC74 18BF 20293+ LR R11,R15 base register 1 := entry address
00EC76 41CB 0800 00800 20294+ LA R12,2048(R11)
00EC7A 41CC 0800 00800 20295+ LA R12,2048(R12) base register 1 := entry address+4k
0EC70 20296+ USING T303,R11,R12 declare code base registers
00EC7E 41A0 B02C 0EC9C 20297+ LA R10,T303L load loop target to R10
00EC82 58F0 C140 0FDB0 20298+ L R15,=A(SAVETST) R15 := current save area
00EC86 50DF 0004 00004 20299+ ST R13,4(R15) set back pointer in current save area
00EC8A 182D 20300+ LR R2,R13 remember callers save area
PAGE 372
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00EC8C 18DF 20301+ LR R13,R15 setup current save area
00EC8E 50D2 0008 00008 20302+ ST R13,8(R2) set forw pointer in callers save area
00000 20303+ USING TDSC,R1 declare TDSC base register
00EC92 58F0 1008 00008 20304+ L R15,TLRCNT load local repeat count to R15
20305+*
20306 *
00EC96 1700 20307 XR R0,R0 clear, ensure Z cond set
00EC98 5A00 C144 0FDB4 20308 A R0,=F'1' inc, ensure Z cond not set
0EC9C 20309 T303L EQU *
00EC9C 4770 C0B0 0FD20 20310 BNZ T303D01 1st branch
00ECA0 4770 C0B4 0FD24 20311 T303U01 BNZ T303D02 3rd branch
00ECA4 4770 C0B8 0FD28 20312 T303U02 BNZ T303D03 5th branch
00ECA8 4770 C0BC 0FD2C 20313 T303U03 BNZ T303D04
00ECAC 4770 C0C0 0FD30 20314 T303U04 BNZ T303D05
00ECB0 4770 C0C4 0FD34 20315 T303U05 BNZ T303D06
00ECB4 4770 C0C8 0FD38 20316 T303U06 BNZ T303D07
00ECB8 4770 C0CC 0FD3C 20317 T303U07 BNZ T303D08
00ECBC 4770 C0D0 0FD40 20318 T303U08 BNZ T303D09
00ECC0 4770 C0D4 0FD44 20319 T303U09 BNZ T303D10
00ECC4 4770 C0D8 0FD48 20320 T303U10 BNZ T303D11
00ECC8 4770 C0DC 0FD4C 20321 T303U11 BNZ T303D12
00ECCC 4770 C0E0 0FD50 20322 T303U12 BNZ T303D13
00ECD0 4770 C0E4 0FD54 20323 T303U13 BNZ T303D14
00ECD4 4770 C0E8 0FD58 20324 T303U14 BNZ T303D15
00ECD8 4770 C0EC 0FD5C 20325 T303U15 BNZ T303D16
00ECDC 4770 C0F0 0FD60 20326 T303U16 BNZ T303D17
00ECE0 4770 C0F4 0FD64 20327 T303U17 BNZ T303D18
00ECE4 4770 C0F8 0FD68 20328 T303U18 BNZ T303D19
00ECE8 4770 C0FC 0FD6C 20329 T303U19 BNZ T303D20
00ECEC 4770 C100 0FD70 20330 T303U20 BNZ T303D21
00ECF0 4770 C104 0FD74 20331 T303U21 BNZ T303D22
00ECF4 4770 C108 0FD78 20332 T303U22 BNZ T303D23
00ECF8 4770 C10C 0FD7C 20333 T303U23 BNZ T303D24
00ECFC 4770 C110 0FD80 20334 T303U24 BNZ T303D25
00ED00 4770 C114 0FD84 20335 T303U25 BNZ T303D26
00ED04 4770 C118 0FD88 20336 T303U26 BNZ T303D27
00ED08 4770 C11C 0FD8C 20337 T303U27 BNZ T303D28
00ED0C 4770 C120 0FD90 20338 T303U28 BNZ T303D29 57th branch
00ED10 4770 C124 0FD94 20339 T303U29 BNZ T303D30 59th branch
20340 ABEND 50
00ED14 20341+ DS 0H 00400002
00ED14 4110 0032 00032 20342+ LA 1,50 LOAD PARAMETER REG 1 01900002
00ED18 0A0D 20343+ SVC 13 LINK TO ABEND ROUTINE 02050002
20344 *
00ED1A 06FA 20345 T303U30 BCTR R15,R10 R10 is loop target !!
00ED1C 47F0 C12E 0FD9E 20346 B T303END before bottom half of maze
20347 * ensure that BCTR is not 'far'
20348 *
00ED20 20349 DS 2048H force next page
20350 *
00FD20 4770 B030 0ECA0 20351 T303D01 BNZ T303U01 2nd branch
00FD24 4770 B034 0ECA4 20352 T303D02 BNZ T303U02 4th branch
00FD28 4770 B038 0ECA8 20353 T303D03 BNZ T303U03
00FD2C 4770 B03C 0ECAC 20354 T303D04 BNZ T303U04
00FD30 4770 B040 0ECB0 20355 T303D05 BNZ T303U05
PAGE 373
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00FD34 4770 B044 0ECB4 20356 T303D06 BNZ T303U06
00FD38 4770 B048 0ECB8 20357 T303D07 BNZ T303U07
00FD3C 4770 B04C 0ECBC 20358 T303D08 BNZ T303U08
00FD40 4770 B050 0ECC0 20359 T303D09 BNZ T303U09
00FD44 4770 B054 0ECC4 20360 T303D10 BNZ T303U10
00FD48 4770 B058 0ECC8 20361 T303D11 BNZ T303U11
00FD4C 4770 B05C 0ECCC 20362 T303D12 BNZ T303U12
00FD50 4770 B060 0ECD0 20363 T303D13 BNZ T303U13
00FD54 4770 B064 0ECD4 20364 T303D14 BNZ T303U14
00FD58 4770 B068 0ECD8 20365 T303D15 BNZ T303U15
00FD5C 4770 B06C 0ECDC 20366 T303D16 BNZ T303U16
00FD60 4770 B070 0ECE0 20367 T303D17 BNZ T303U17
00FD64 4770 B074 0ECE4 20368 T303D18 BNZ T303U18
00FD68 4770 B078 0ECE8 20369 T303D19 BNZ T303U19
00FD6C 4770 B07C 0ECEC 20370 T303D20 BNZ T303U20
00FD70 4770 B080 0ECF0 20371 T303D21 BNZ T303U21
00FD74 4770 B084 0ECF4 20372 T303D22 BNZ T303U22
00FD78 4770 B088 0ECF8 20373 T303D23 BNZ T303U23
00FD7C 4770 B08C 0ECFC 20374 T303D24 BNZ T303U24
00FD80 4770 B090 0ED00 20375 T303D25 BNZ T303U25
00FD84 4770 B094 0ED04 20376 T303D26 BNZ T303U26
00FD88 4770 B098 0ED08 20377 T303D27 BNZ T303U27
00FD8C 4770 B09C 0ED0C 20378 T303D28 BNZ T303U28
00FD90 4770 B0A0 0ED10 20379 T303D29 BNZ T303U29
00FD94 4770 B0AA 0ED1A 20380 T303D30 BNZ T303U30 60th branch
20381 ABEND 50
00FD98 20382+ DS 0H 00400002
00FD98 4110 0032 00032 20383+ LA 1,50 LOAD PARAMETER REG 1 01900002
00FD9C 0A0D 20384+ SVC 13 LINK TO ABEND ROUTINE 02050002
20385 *
0FD9E 20386 T303END EQU *
20387 TSIMRET
00FD9E 58F0 C140 0FDB0 20388+ L R15,=A(SAVETST) R15 := current save area
00FDA2 58DF 0004 00004 20389+ L R13,4(R15) get old save area back
00FDA6 98EC D00C 0000C 20390+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00FDAA 07FE 20391+ BR 14 RETURN 02000000
20392 TSIMEND
00FDB0 20393+ LTORG
00FDB0 00000458 20394 =A(SAVETST)
00FDB4 00000001 20395 =F'1'
0FDB8 20396+T303TEND EQU *
20397 *
20398 * Test 304 -- BR R -----------------------------------------
20399 *
20400 TSIMBEG T304,70000,10,1,C'BR R'
20401+*
003524 20402+TDSCDAT CSECT
003528 20403+ DS 0D
20404+*
003528 0000FDB8 20405+T304TDSC DC A(T304) // TENTRY
00352C 00000074 20406+ DC A(T304TEND-T304) // TLENGTH
003530 00011170 20407+ DC F'70000' // TLRCNT
003534 0000000A 20408+ DC F'10' // TIGCNT
003538 00000001 20409+ DC F'1' // TLTYPE
00181C 20410+TEXT CSECT
PAGE 374
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00181C E3F3F0F4 20411+SPTR1760 DC C'T304'
00353C 20412+TDSCDAT CSECT
00353C 20413+ DS 0F
00353C 0400181C 20414+ DC AL1(L'SPTR1760),AL3(SPTR1760)
001820 20415+TEXT CSECT
001820 C2D940D9 20416+SPTR1761 DC C'BR R'
003540 20417+TDSCDAT CSECT
003540 20418+ DS 0F
003540 04001820 20419+ DC AL1(L'SPTR1761),AL3(SPTR1761)
20420+*
004BD0 20421+TDSCTBL CSECT
04BD0 20422+T304TPTR EQU *
004BD0 00003528 20423+ DC A(T304TDSC) enabled test
20424+*
00FDB8 20425+TCODE CSECT
00FDB8 20426+ DS 0D ensure double word alignment for test
00FDB8 20427+T304 DS 0H 01650000
00FDB8 90EC D00C 0000C 20428+ STM 14,12,12(13) SAVE REGISTERS 02950000
00FDBC 18CF 20429+ LR R12,R15 base register := entry address
0FDB8 20430+ USING T304,R12 declare code base register
00FDBE 41B0 C046 0FDFE 20431+ LA R11,T304L load loop target to R11
00FDC2 58F0 C070 0FE28 20432+ L R15,=A(SAVETST) R15 := current save area
00FDC6 50DF 0004 00004 20433+ ST R13,4(R15) set back pointer in current save area
00FDCA 182D 20434+ LR R2,R13 remember callers save area
00FDCC 18DF 20435+ LR R13,R15 setup current save area
00FDCE 50D2 0008 00008 20436+ ST R13,8(R2) set forw pointer in callers save area
00000 20437+ USING TDSC,R1 declare TDSC base register
00FDD2 58F0 1008 00008 20438+ L R15,TLRCNT load local repeat count to R15
20439+*
20440 *
00FDD6 4100 C056 0FE0E 20441 LA R0,T304TR0
00FDDA 4110 C058 0FE10 20442 LA R1,T304TR1
00FDDE 4120 C05A 0FE12 20443 LA R2,T304TR2
00FDE2 4130 C05C 0FE14 20444 LA R3,T304TR3
00FDE6 4140 C05E 0FE16 20445 LA R4,T304TR4
00FDEA 4150 C048 0FE00 20446 LA R5,T304TR5
00FDEE 4160 C04A 0FE02 20447 LA R6,T304TR6
00FDF2 4170 C04C 0FE04 20448 LA R7,T304TR7
00FDF6 4180 C04E 0FE06 20449 LA R8,T304TR8
00FDFA 4190 C050 0FE08 20450 LA R9,T304TR9
20451 *
00FDFE 07F0 20452 T304L BR R0 1st branch
00FE00 07F1 20453 T304TR5 BR R1 3rd branch
00FE02 07F2 20454 T304TR6 BR R2 5th branch
00FE04 07F3 20455 T304TR7 BR R3 7th branch
00FE06 07F4 20456 T304TR8 BR R4 9th branch
20457 *
00FE08 06FB 20458 T304TR9 BCTR R15,R11
00FE0A 47F0 C060 0FE18 20459 B T304END
20460 *
00FE0E 07F5 20461 T304TR0 BR R5 2nd branch
00FE10 07F6 20462 T304TR1 BR R6 4th branch
00FE12 07F7 20463 T304TR2 BR R7 6th branch
00FE14 07F8 20464 T304TR3 BR R8 8th branch
00FE16 07F9 20465 T304TR4 BR R9 10st branch
PAGE 375
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
20466 *
0FE18 20467 T304END EQU *
20468 TSIMRET
00FE18 58F0 C070 0FE28 20469+ L R15,=A(SAVETST) R15 := current save area
00FE1C 58DF 0004 00004 20470+ L R13,4(R15) get old save area back
00FE20 98EC D00C 0000C 20471+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
00FE24 07FE 20472+ BR 14 RETURN 02000000
20473 TSIMEND
00FE28 20474+ LTORG
00FE28 00000458 20475 =A(SAVETST)
0FE2C 20476+T304TEND EQU *
20477 *
20478 * Test 305 -- BR R -----------------------------------------
20479 *
20480 TSIMBEG T305,45000,10,1,C'BR R (far)',NBASE=2
20481+*
003544 20482+TDSCDAT CSECT
003548 20483+ DS 0D
20484+*
003548 0000FE30 20485+T305TDSC DC A(T305) // TENTRY
00354C 0000107C 20486+ DC A(T305TEND-T305) // TLENGTH
003550 0000AFC8 20487+ DC F'45000' // TLRCNT
003554 0000000A 20488+ DC F'10' // TIGCNT
003558 00000001 20489+ DC F'1' // TLTYPE
001824 20490+TEXT CSECT
001824 E3F3F0F5 20491+SPTR1769 DC C'T305'
00355C 20492+TDSCDAT CSECT
00355C 20493+ DS 0F
00355C 04001824 20494+ DC AL1(L'SPTR1769),AL3(SPTR1769)
001828 20495+TEXT CSECT
001828 C2D940D9404D8681 20496+SPTR1770 DC C'BR R (far)'
003560 20497+TDSCDAT CSECT
003560 20498+ DS 0F
003560 0A001828 20499+ DC AL1(L'SPTR1770),AL3(SPTR1770)
20500+*
004BD4 20501+TDSCTBL CSECT
04BD4 20502+T305TPTR EQU *
004BD4 00003548 20503+ DC A(T305TDSC) enabled test
20504+*
00FE2C 20505+TCODE CSECT
00FE30 20506+ DS 0D ensure double word alignment for test
00FE30 20507+T305 DS 0H 01650000
00FE30 90EC D00C 0000C 20508+ STM 14,12,12(13) SAVE REGISTERS 02950000
00FE34 18BF 20509+ LR R11,R15 base register 1 := entry address
00FE36 41CB 0800 00800 20510+ LA R12,2048(R11)
00FE3A 41CC 0800 00800 20511+ LA R12,2048(R12) base register 1 := entry address+4k
0FE30 20512+ USING T305,R11,R12 declare code base registers
00FE3E 41A0 B04E 0FE7E 20513+ LA R10,T305L load loop target to R10
00FE42 58F0 C078 10EA8 20514+ L R15,=A(SAVETST) R15 := current save area
00FE46 50DF 0004 00004 20515+ ST R13,4(R15) set back pointer in current save area
00FE4A 182D 20516+ LR R2,R13 remember callers save area
00FE4C 18DF 20517+ LR R13,R15 setup current save area
00FE4E 50D2 0008 00008 20518+ ST R13,8(R2) set forw pointer in callers save area
00000 20519+ USING TDSC,R1 declare TDSC base register
00FE52 58F0 1008 00008 20520+ L R15,TLRCNT load local repeat count to R15
PAGE 376
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
20521+*
20522 *
00FE56 4100 C05E 10E8E 20523 LA R0,T305TR0
00FE5A 4110 C060 10E90 20524 LA R1,T305TR1
00FE5E 4120 C062 10E92 20525 LA R2,T305TR2
00FE62 4130 C064 10E94 20526 LA R3,T305TR3
00FE66 4140 C066 10E96 20527 LA R4,T305TR4
00FE6A 4150 B050 0FE80 20528 LA R5,T305TR5
00FE6E 4160 B052 0FE82 20529 LA R6,T305TR6
00FE72 4170 B054 0FE84 20530 LA R7,T305TR7
00FE76 4180 B056 0FE86 20531 LA R8,T305TR8
00FE7A 4190 B058 0FE88 20532 LA R9,T305TR9
20533 *
00FE7E 07F0 20534 T305L BR R0 1st branch
00FE80 07F1 20535 T305TR5 BR R1 3rd branch
00FE82 07F2 20536 T305TR6 BR R2 5th branch
00FE84 07F3 20537 T305TR7 BR R3 7th branch
00FE86 07F4 20538 T305TR8 BR R4 9th branch
20539 *
00FE88 06FA 20540 T305TR9 BCTR R15,R10 R10 is loop target !!
00FE8A 47F0 C068 10E98 20541 B T305END
20542 *
00FE8E 20543 DS 2048H force next page
20544 *
010E8E 07F5 20545 T305TR0 BR R5 2nd branch
010E90 07F6 20546 T305TR1 BR R6 4th branch
010E92 07F7 20547 T305TR2 BR R7 6th branch
010E94 07F8 20548 T305TR3 BR R8 8th branch
010E96 07F9 20549 T305TR4 BR R9 10st branch
20550 *
10E98 20551 T305END EQU *
20552 TSIMRET
010E98 58F0 C078 10EA8 20553+ L R15,=A(SAVETST) R15 := current save area
010E9C 58DF 0004 00004 20554+ L R13,4(R15) get old save area back
010EA0 98EC D00C 0000C 20555+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
010EA4 07FE 20556+ BR 14 RETURN 02000000
20557 TSIMEND
010EA8 20558+ LTORG
010EA8 00000458 20559 =A(SAVETST)
10EAC 20560+T305TEND EQU *
20561 *
20562 * Test 310 -- BCTR R,0 -------------------------------------
20563 *
20564 TSIMBEG T310,15000,100,1,C'BCTR R,0'
20565+*
003564 20566+TDSCDAT CSECT
003568 20567+ DS 0D
20568+*
003568 00010EB0 20569+T310TDSC DC A(T310) // TENTRY
00356C 00000108 20570+ DC A(T310TEND-T310) // TLENGTH
003570 00003A98 20571+ DC F'15000' // TLRCNT
003574 00000064 20572+ DC F'100' // TIGCNT
003578 00000001 20573+ DC F'1' // TLTYPE
001832 20574+TEXT CSECT
001832 E3F3F1F0 20575+SPTR1778 DC C'T310'
PAGE 377
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00357C 20576+TDSCDAT CSECT
00357C 20577+ DS 0F
00357C 04001832 20578+ DC AL1(L'SPTR1778),AL3(SPTR1778)
001836 20579+TEXT CSECT
001836 C2C3E3D940D96BF0 20580+SPTR1779 DC C'BCTR R,0'
003580 20581+TDSCDAT CSECT
003580 20582+ DS 0F
003580 08001836 20583+ DC AL1(L'SPTR1779),AL3(SPTR1779)
20584+*
004BD8 20585+TDSCTBL CSECT
04BD8 20586+T310TPTR EQU *
004BD8 00003568 20587+ DC A(T310TDSC) enabled test
20588+*
010EAC 20589+TCODE CSECT
010EB0 20590+ DS 0D ensure double word alignment for test
010EB0 20591+T310 DS 0H 01650000
010EB0 90EC D00C 0000C 20592+ STM 14,12,12(13) SAVE REGISTERS 02950000
010EB4 18CF 20593+ LR R12,R15 base register := entry address
10EB0 20594+ USING T310,R12 declare code base register
010EB6 41B0 C022 10ED2 20595+ LA R11,T310L load loop target to R11
010EBA 58F0 C100 10FB0 20596+ L R15,=A(SAVETST) R15 := current save area
010EBE 50DF 0004 00004 20597+ ST R13,4(R15) set back pointer in current save area
010EC2 182D 20598+ LR R2,R13 remember callers save area
010EC4 18DF 20599+ LR R13,R15 setup current save area
010EC6 50D2 0008 00008 20600+ ST R13,8(R2) set forw pointer in callers save area
00000 20601+ USING TDSC,R1 declare TDSC base register
010ECA 58F0 1008 00008 20602+ L R15,TLRCNT load local repeat count to R15
20603+*
20604 *
010ECE 5820 C104 10FB4 20605 L R2,=F'1000000000' init counter
20606 T310L REPINS BCTR,(R2,0) repeat: BCTR R2,0
20607+*
20608+* build from sublist &ALIST a comma separated string &ARGS
20609+*
20610+*
20611+*
20612+*
20613+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
20614+* this allows to transfer the repeat count from last TDSCGEN call
20615+*
20616+*
10ED2 20617+T310L EQU *
20618+*
20619+* write a comment indicating what REPINS does (in case NOGEN in effect)
20620+*
20621+*,// REPINS: do 100 times:
20622+*
20623+* MNOTE requires that ' is doubled for expanded variables
20624+* thus build &MASTR as a copy of '&ARGS with ' doubled
20625+*
20626+*
20627+*,// BCTR R2,0
20628+*
20629+* finally generate code: &ICNT copies of &CODE &ARGS
20630+*
PAGE 378
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
010ED2 0620 20631+ BCTR R2,0
010ED4 0620 20632+ BCTR R2,0
010ED6 0620 20633+ BCTR R2,0
010ED8 0620 20634+ BCTR R2,0
010EDA 0620 20635+ BCTR R2,0
010EDC 0620 20636+ BCTR R2,0
010EDE 0620 20637+ BCTR R2,0
010EE0 0620 20638+ BCTR R2,0
010EE2 0620 20639+ BCTR R2,0
010EE4 0620 20640+ BCTR R2,0
010EE6 0620 20641+ BCTR R2,0
010EE8 0620 20642+ BCTR R2,0
010EEA 0620 20643+ BCTR R2,0
010EEC 0620 20644+ BCTR R2,0
010EEE 0620 20645+ BCTR R2,0
010EF0 0620 20646+ BCTR R2,0
010EF2 0620 20647+ BCTR R2,0
010EF4 0620 20648+ BCTR R2,0
010EF6 0620 20649+ BCTR R2,0
010EF8 0620 20650+ BCTR R2,0
010EFA 0620 20651+ BCTR R2,0
010EFC 0620 20652+ BCTR R2,0
010EFE 0620 20653+ BCTR R2,0
010F00 0620 20654+ BCTR R2,0
010F02 0620 20655+ BCTR R2,0
010F04 0620 20656+ BCTR R2,0
010F06 0620 20657+ BCTR R2,0
010F08 0620 20658+ BCTR R2,0
010F0A 0620 20659+ BCTR R2,0
010F0C 0620 20660+ BCTR R2,0
010F0E 0620 20661+ BCTR R2,0
010F10 0620 20662+ BCTR R2,0
010F12 0620 20663+ BCTR R2,0
010F14 0620 20664+ BCTR R2,0
010F16 0620 20665+ BCTR R2,0
010F18 0620 20666+ BCTR R2,0
010F1A 0620 20667+ BCTR R2,0
010F1C 0620 20668+ BCTR R2,0
010F1E 0620 20669+ BCTR R2,0
010F20 0620 20670+ BCTR R2,0
010F22 0620 20671+ BCTR R2,0
010F24 0620 20672+ BCTR R2,0
010F26 0620 20673+ BCTR R2,0
010F28 0620 20674+ BCTR R2,0
010F2A 0620 20675+ BCTR R2,0
010F2C 0620 20676+ BCTR R2,0
010F2E 0620 20677+ BCTR R2,0
010F30 0620 20678+ BCTR R2,0
010F32 0620 20679+ BCTR R2,0
010F34 0620 20680+ BCTR R2,0
010F36 0620 20681+ BCTR R2,0
010F38 0620 20682+ BCTR R2,0
010F3A 0620 20683+ BCTR R2,0
010F3C 0620 20684+ BCTR R2,0
010F3E 0620 20685+ BCTR R2,0
PAGE 379
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
010F40 0620 20686+ BCTR R2,0
010F42 0620 20687+ BCTR R2,0
010F44 0620 20688+ BCTR R2,0
010F46 0620 20689+ BCTR R2,0
010F48 0620 20690+ BCTR R2,0
010F4A 0620 20691+ BCTR R2,0
010F4C 0620 20692+ BCTR R2,0
010F4E 0620 20693+ BCTR R2,0
010F50 0620 20694+ BCTR R2,0
010F52 0620 20695+ BCTR R2,0
010F54 0620 20696+ BCTR R2,0
010F56 0620 20697+ BCTR R2,0
010F58 0620 20698+ BCTR R2,0
010F5A 0620 20699+ BCTR R2,0
010F5C 0620 20700+ BCTR R2,0
010F5E 0620 20701+ BCTR R2,0
010F60 0620 20702+ BCTR R2,0
010F62 0620 20703+ BCTR R2,0
010F64 0620 20704+ BCTR R2,0
010F66 0620 20705+ BCTR R2,0
010F68 0620 20706+ BCTR R2,0
010F6A 0620 20707+ BCTR R2,0
010F6C 0620 20708+ BCTR R2,0
010F6E 0620 20709+ BCTR R2,0
010F70 0620 20710+ BCTR R2,0
010F72 0620 20711+ BCTR R2,0
010F74 0620 20712+ BCTR R2,0
010F76 0620 20713+ BCTR R2,0
010F78 0620 20714+ BCTR R2,0
010F7A 0620 20715+ BCTR R2,0
010F7C 0620 20716+ BCTR R2,0
010F7E 0620 20717+ BCTR R2,0
010F80 0620 20718+ BCTR R2,0
010F82 0620 20719+ BCTR R2,0
010F84 0620 20720+ BCTR R2,0
010F86 0620 20721+ BCTR R2,0
010F88 0620 20722+ BCTR R2,0
010F8A 0620 20723+ BCTR R2,0
010F8C 0620 20724+ BCTR R2,0
010F8E 0620 20725+ BCTR R2,0
010F90 0620 20726+ BCTR R2,0
010F92 0620 20727+ BCTR R2,0
010F94 0620 20728+ BCTR R2,0
010F96 0620 20729+ BCTR R2,0
010F98 0620 20730+ BCTR R2,0
20731+*
010F9A 06FB 20732 BCTR R15,R11
20733 TSIMRET
010F9C 58F0 C100 10FB0 20734+ L R15,=A(SAVETST) R15 := current save area
010FA0 58DF 0004 00004 20735+ L R13,4(R15) get old save area back
010FA4 98EC D00C 0000C 20736+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
010FA8 07FE 20737+ BR 14 RETURN 02000000
20738 TSIMEND
010FB0 20739+ LTORG
010FB0 00000458 20740 =A(SAVETST)
PAGE 380
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
010FB4 3B9ACA00 20741 =F'1000000000'
10FB8 20742+T310TEND EQU *
20743 *
20744 * Test 311 -- BCTR R,R -------------------------------------
20745 *
20746 TSIMBEG T311,700000,1,0,C'BCTR R,R'
20747+*
003584 20748+TDSCDAT CSECT
003588 20749+ DS 0D
20750+*
003588 00010FB8 20751+T311TDSC DC A(T311) // TENTRY
00358C 00000034 20752+ DC A(T311TEND-T311) // TLENGTH
003590 000AAE60 20753+ DC F'700000' // TLRCNT
003594 00000001 20754+ DC F'1' // TIGCNT
003598 00000000 20755+ DC F'0' // TLTYPE
00183E 20756+TEXT CSECT
00183E E3F3F1F1 20757+SPTR1790 DC C'T311'
00359C 20758+TDSCDAT CSECT
00359C 20759+ DS 0F
00359C 0400183E 20760+ DC AL1(L'SPTR1790),AL3(SPTR1790)
001842 20761+TEXT CSECT
001842 C2C3E3D940D96BD9 20762+SPTR1791 DC C'BCTR R,R'
0035A0 20763+TDSCDAT CSECT
0035A0 20764+ DS 0F
0035A0 08001842 20765+ DC AL1(L'SPTR1791),AL3(SPTR1791)
20766+*
004BDC 20767+TDSCTBL CSECT
04BDC 20768+T311TPTR EQU *
004BDC 00003588 20769+ DC A(T311TDSC) enabled test
20770+*
010FB8 20771+TCODE CSECT
010FB8 20772+ DS 0D ensure double word alignment for test
010FB8 20773+T311 DS 0H 01650000
010FB8 90EC D00C 0000C 20774+ STM 14,12,12(13) SAVE REGISTERS 02950000
010FBC 18CF 20775+ LR R12,R15 base register := entry address
10FB8 20776+ USING T311,R12 declare code base register
010FBE 41B0 C01E 10FD6 20777+ LA R11,T311L load loop target to R11
010FC2 58F0 C030 10FE8 20778+ L R15,=A(SAVETST) R15 := current save area
010FC6 50DF 0004 00004 20779+ ST R13,4(R15) set back pointer in current save area
010FCA 182D 20780+ LR R2,R13 remember callers save area
010FCC 18DF 20781+ LR R13,R15 setup current save area
010FCE 50D2 0008 00008 20782+ ST R13,8(R2) set forw pointer in callers save area
00000 20783+ USING TDSC,R1 declare TDSC base register
010FD2 58F0 1008 00008 20784+ L R15,TLRCNT load local repeat count to R15
20785+*
20786 *
10FD6 20787 T311L EQU * no test body, just test BCTR
010FD6 06FB 20788 BCTR R15,R11
20789 TSIMRET
010FD8 58F0 C030 10FE8 20790+ L R15,=A(SAVETST) R15 := current save area
010FDC 58DF 0004 00004 20791+ L R13,4(R15) get old save area back
010FE0 98EC D00C 0000C 20792+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
010FE4 07FE 20793+ BR 14 RETURN 02000000
20794 TSIMEND
010FE8 20795+ LTORG
PAGE 381
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
010FE8 00000458 20796 =A(SAVETST)
10FEC 20797+T311TEND EQU *
20798 *
20799 * Test 312 -- BCT R,l --------------------------------------
20800 *
20801 TSIMBEG T312,600000,1,0,C'BCT R,l'
20802+*
0035A4 20803+TDSCDAT CSECT
0035A8 20804+ DS 0D
20805+*
0035A8 00010FF0 20806+T312TDSC DC A(T312) // TENTRY
0035AC 00000034 20807+ DC A(T312TEND-T312) // TLENGTH
0035B0 000927C0 20808+ DC F'600000' // TLRCNT
0035B4 00000001 20809+ DC F'1' // TIGCNT
0035B8 00000000 20810+ DC F'0' // TLTYPE
00184A 20811+TEXT CSECT
00184A E3F3F1F2 20812+SPTR1799 DC C'T312'
0035BC 20813+TDSCDAT CSECT
0035BC 20814+ DS 0F
0035BC 0400184A 20815+ DC AL1(L'SPTR1799),AL3(SPTR1799)
00184E 20816+TEXT CSECT
00184E C2C3E340D96B93 20817+SPTR1800 DC C'BCT R,l'
0035C0 20818+TDSCDAT CSECT
0035C0 20819+ DS 0F
0035C0 0700184E 20820+ DC AL1(L'SPTR1800),AL3(SPTR1800)
20821+*
004BE0 20822+TDSCTBL CSECT
04BE0 20823+T312TPTR EQU *
004BE0 000035A8 20824+ DC A(T312TDSC) enabled test
20825+*
010FEC 20826+TCODE CSECT
010FF0 20827+ DS 0D ensure double word alignment for test
010FF0 20828+T312 DS 0H 01650000
010FF0 90EC D00C 0000C 20829+ STM 14,12,12(13) SAVE REGISTERS 02950000
010FF4 18CF 20830+ LR R12,R15 base register := entry address
10FF0 20831+ USING T312,R12 declare code base register
010FF6 41B0 C01E 1100E 20832+ LA R11,T312L load loop target to R11
010FFA 58F0 C030 11020 20833+ L R15,=A(SAVETST) R15 := current save area
010FFE 50DF 0004 00004 20834+ ST R13,4(R15) set back pointer in current save area
011002 182D 20835+ LR R2,R13 remember callers save area
011004 18DF 20836+ LR R13,R15 setup current save area
011006 50D2 0008 00008 20837+ ST R13,8(R2) set forw pointer in callers save area
00000 20838+ USING TDSC,R1 declare TDSC base register
01100A 58F0 1008 00008 20839+ L R15,TLRCNT load local repeat count to R15
20840+*
20841 *
1100E 20842 T312L EQU * no test body, just test BCT
01100E 46F0 C01E 1100E 20843 BCT R15,T312L
20844 TSIMRET
011012 58F0 C030 11020 20845+ L R15,=A(SAVETST) R15 := current save area
011016 58DF 0004 00004 20846+ L R13,4(R15) get old save area back
01101A 98EC D00C 0000C 20847+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01101E 07FE 20848+ BR 14 RETURN 02000000
20849 TSIMEND
011020 20850+ LTORG
PAGE 382
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
011020 00000458 20851 =A(SAVETST)
11024 20852+T312TEND EQU *
20853 *
20854 * Test 315 -- BXLE R,R,l -----------------------------------
20855 *
20856 TSIMBEG T315,6000,100,6,C'BXLE R,R,l'
20857+*
0035C4 20858+TDSCDAT CSECT
0035C8 20859+ DS 0D
20860+*
0035C8 00011028 20861+T315TDSC DC A(T315) // TENTRY
0035CC 00000044 20862+ DC A(T315TEND-T315) // TLENGTH
0035D0 00001770 20863+ DC F'6000' // TLRCNT
0035D4 00000064 20864+ DC F'100' // TIGCNT
0035D8 00000006 20865+ DC F'6' // TLTYPE
001855 20866+TEXT CSECT
001855 E3F3F1F5 20867+SPTR1808 DC C'T315'
0035DC 20868+TDSCDAT CSECT
0035DC 20869+ DS 0F
0035DC 04001855 20870+ DC AL1(L'SPTR1808),AL3(SPTR1808)
001859 20871+TEXT CSECT
001859 C2E7D3C540D96BD9 20872+SPTR1809 DC C'BXLE R,R,l'
0035E0 20873+TDSCDAT CSECT
0035E0 20874+ DS 0F
0035E0 0A001859 20875+ DC AL1(L'SPTR1809),AL3(SPTR1809)
20876+*
004BE4 20877+TDSCTBL CSECT
04BE4 20878+T315TPTR EQU *
004BE4 000035C8 20879+ DC A(T315TDSC) enabled test
20880+*
011024 20881+TCODE CSECT
011028 20882+ DS 0D ensure double word alignment for test
011028 20883+T315 DS 0H 01650000
011028 90EC D00C 0000C 20884+ STM 14,12,12(13) SAVE REGISTERS 02950000
01102C 18CF 20885+ LR R12,R15 base register := entry address
11028 20886+ USING T315,R12 declare code base register
01102E 41B0 C01E 11046 20887+ LA R11,T315L load loop target to R11
011032 58F0 C040 11068 20888+ L R15,=A(SAVETST) R15 := current save area
011036 50DF 0004 00004 20889+ ST R13,4(R15) set back pointer in current save area
01103A 182D 20890+ LR R2,R13 remember callers save area
01103C 18DF 20891+ LR R13,R15 setup current save area
01103E 50D2 0008 00008 20892+ ST R13,8(R2) set forw pointer in callers save area
00000 20893+ USING TDSC,R1 declare TDSC base register
011042 58F0 1008 00008 20894+ L R15,TLRCNT load local repeat count to R15
20895+*
20896 *
011046 4130 0000 00000 20897 T315L LA R3,0 index begin
01104A 4140 0001 00001 20898 LA R4,1 index increment
01104E 4150 0063 00063 20899 LA R5,99 index end
11052 20900 T315LL EQU * no inner loop body
011052 8734 C02A 11052 20901 BXLE R3,R4,T315LL will be executed 100 times
011056 06FB 20902 BCTR R15,R11
20903 TSIMRET
011058 58F0 C040 11068 20904+ L R15,=A(SAVETST) R15 := current save area
01105C 58DF 0004 00004 20905+ L R13,4(R15) get old save area back
PAGE 383
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
011060 98EC D00C 0000C 20906+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
011064 07FE 20907+ BR 14 RETURN 02000000
20908 TSIMEND
011068 20909+ LTORG
011068 00000458 20910 =A(SAVETST)
1106C 20911+T315TEND EQU *
20912 *
20913 * Test 320 -- BALR R,R; BR R -------------------------------
20914 *
20915 TSIMBEG T320,8000,50,1,C'BALR R,R; BR R'
20916+*
0035E4 20917+TDSCDAT CSECT
0035E8 20918+ DS 0D
20919+*
0035E8 00011070 20920+T320TDSC DC A(T320) // TENTRY
0035EC 0000009C 20921+ DC A(T320TEND-T320) // TLENGTH
0035F0 00001F40 20922+ DC F'8000' // TLRCNT
0035F4 00000032 20923+ DC F'50' // TIGCNT
0035F8 00000001 20924+ DC F'1' // TLTYPE
001863 20925+TEXT CSECT
001863 E3F3F2F0 20926+SPTR1817 DC C'T320'
0035FC 20927+TDSCDAT CSECT
0035FC 20928+ DS 0F
0035FC 04001863 20929+ DC AL1(L'SPTR1817),AL3(SPTR1817)
001867 20930+TEXT CSECT
001867 C2C1D3D940D96BD9 20931+SPTR1818 DC C'BALR R,R; BR R'
003600 20932+TDSCDAT CSECT
003600 20933+ DS 0F
003600 0E001867 20934+ DC AL1(L'SPTR1818),AL3(SPTR1818)
20935+*
004BE8 20936+TDSCTBL CSECT
04BE8 20937+T320TPTR EQU *
004BE8 000035E8 20938+ DC A(T320TDSC) enabled test
20939+*
01106C 20940+TCODE CSECT
011070 20941+ DS 0D ensure double word alignment for test
011070 20942+T320 DS 0H 01650000
011070 90EC D00C 0000C 20943+ STM 14,12,12(13) SAVE REGISTERS 02950000
011074 18CF 20944+ LR R12,R15 base register := entry address
11070 20945+ USING T320,R12 declare code base register
011076 41B0 C022 11092 20946+ LA R11,T320L load loop target to R11
01107A 58F0 C098 11108 20947+ L R15,=A(SAVETST) R15 := current save area
01107E 50DF 0004 00004 20948+ ST R13,4(R15) set back pointer in current save area
011082 182D 20949+ LR R2,R13 remember callers save area
011084 18DF 20950+ LR R13,R15 setup current save area
011086 50D2 0008 00008 20951+ ST R13,8(R2) set forw pointer in callers save area
00000 20952+ USING TDSC,R1 declare TDSC base register
01108A 58F0 1008 00008 20953+ L R15,TLRCNT load local repeat count to R15
20954+*
20955 *
01108E 4120 C096 11106 20956 LA R2,T320R load target address
20957 T320L REPINS BALR,(R14,R2) repeat: BALR R14,R2
20958+*
20959+* build from sublist &ALIST a comma separated string &ARGS
20960+*
PAGE 384
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
20961+*
20962+*
20963+*
20964+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
20965+* this allows to transfer the repeat count from last TDSCGEN call
20966+*
20967+*
11092 20968+T320L EQU *
20969+*
20970+* write a comment indicating what REPINS does (in case NOGEN in effect)
20971+*
20972+*,// REPINS: do 50 times:
20973+*
20974+* MNOTE requires that ' is doubled for expanded variables
20975+* thus build &MASTR as a copy of '&ARGS with ' doubled
20976+*
20977+*
20978+*,// BALR R14,R2
20979+*
20980+* finally generate code: &ICNT copies of &CODE &ARGS
20981+*
011092 05E2 20982+ BALR R14,R2
011094 05E2 20983+ BALR R14,R2
011096 05E2 20984+ BALR R14,R2
011098 05E2 20985+ BALR R14,R2
01109A 05E2 20986+ BALR R14,R2
01109C 05E2 20987+ BALR R14,R2
01109E 05E2 20988+ BALR R14,R2
0110A0 05E2 20989+ BALR R14,R2
0110A2 05E2 20990+ BALR R14,R2
0110A4 05E2 20991+ BALR R14,R2
0110A6 05E2 20992+ BALR R14,R2
0110A8 05E2 20993+ BALR R14,R2
0110AA 05E2 20994+ BALR R14,R2
0110AC 05E2 20995+ BALR R14,R2
0110AE 05E2 20996+ BALR R14,R2
0110B0 05E2 20997+ BALR R14,R2
0110B2 05E2 20998+ BALR R14,R2
0110B4 05E2 20999+ BALR R14,R2
0110B6 05E2 21000+ BALR R14,R2
0110B8 05E2 21001+ BALR R14,R2
0110BA 05E2 21002+ BALR R14,R2
0110BC 05E2 21003+ BALR R14,R2
0110BE 05E2 21004+ BALR R14,R2
0110C0 05E2 21005+ BALR R14,R2
0110C2 05E2 21006+ BALR R14,R2
0110C4 05E2 21007+ BALR R14,R2
0110C6 05E2 21008+ BALR R14,R2
0110C8 05E2 21009+ BALR R14,R2
0110CA 05E2 21010+ BALR R14,R2
0110CC 05E2 21011+ BALR R14,R2
0110CE 05E2 21012+ BALR R14,R2
0110D0 05E2 21013+ BALR R14,R2
0110D2 05E2 21014+ BALR R14,R2
0110D4 05E2 21015+ BALR R14,R2
PAGE 385
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0110D6 05E2 21016+ BALR R14,R2
0110D8 05E2 21017+ BALR R14,R2
0110DA 05E2 21018+ BALR R14,R2
0110DC 05E2 21019+ BALR R14,R2
0110DE 05E2 21020+ BALR R14,R2
0110E0 05E2 21021+ BALR R14,R2
0110E2 05E2 21022+ BALR R14,R2
0110E4 05E2 21023+ BALR R14,R2
0110E6 05E2 21024+ BALR R14,R2
0110E8 05E2 21025+ BALR R14,R2
0110EA 05E2 21026+ BALR R14,R2
0110EC 05E2 21027+ BALR R14,R2
0110EE 05E2 21028+ BALR R14,R2
0110F0 05E2 21029+ BALR R14,R2
0110F2 05E2 21030+ BALR R14,R2
0110F4 05E2 21031+ BALR R14,R2
21032+*
0110F6 06FB 21033 BCTR R15,R11
21034 TSIMRET
0110F8 58F0 C098 11108 21035+ L R15,=A(SAVETST) R15 := current save area
0110FC 58DF 0004 00004 21036+ L R13,4(R15) get old save area back
011100 98EC D00C 0000C 21037+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
011104 07FE 21038+ BR 14 RETURN 02000000
21039 *
011106 21040 DS 0H
011106 07FE 21041 T320R BR R14
21042 TSIMEND
011108 21043+ LTORG
011108 00000458 21044 =A(SAVETST)
1110C 21045+T320TEND EQU *
21046 *
21047 * Test 321 -- BALR R,R; BR R (far) -------------------------
21048 *
21049 TSIMBEG T321,2500,50,1,C'BALR R,R; BR R (far)'
21050+*
003604 21051+TDSCDAT CSECT
003608 21052+ DS 0D
21053+*
003608 00011110 21054+T321TDSC DC A(T321) // TENTRY
00360C 000000A0 21055+ DC A(T321TEND-T321) // TLENGTH
003610 000009C4 21056+ DC F'2500' // TLRCNT
003614 00000032 21057+ DC F'50' // TIGCNT
003618 00000001 21058+ DC F'1' // TLTYPE
001875 21059+TEXT CSECT
001875 E3F3F2F1 21060+SPTR1829 DC C'T321'
00361C 21061+TDSCDAT CSECT
00361C 21062+ DS 0F
00361C 04001875 21063+ DC AL1(L'SPTR1829),AL3(SPTR1829)
001879 21064+TEXT CSECT
001879 C2C1D3D940D96BD9 21065+SPTR1830 DC C'BALR R,R; BR R (far)'
003620 21066+TDSCDAT CSECT
003620 21067+ DS 0F
003620 14001879 21068+ DC AL1(L'SPTR1830),AL3(SPTR1830)
21069+*
004BEC 21070+TDSCTBL CSECT
PAGE 386
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
04BEC 21071+T321TPTR EQU *
004BEC 00003608 21072+ DC A(T321TDSC) enabled test
21073+*
01110C 21074+TCODE CSECT
011110 21075+ DS 0D ensure double word alignment for test
011110 21076+T321 DS 0H 01650000
011110 90EC D00C 0000C 21077+ STM 14,12,12(13) SAVE REGISTERS 02950000
011114 18CF 21078+ LR R12,R15 base register := entry address
11110 21079+ USING T321,R12 declare code base register
011116 41B0 C022 11132 21080+ LA R11,T321L load loop target to R11
01111A 58F0 C098 111A8 21081+ L R15,=A(SAVETST) R15 := current save area
01111E 50DF 0004 00004 21082+ ST R13,4(R15) set back pointer in current save area
011122 182D 21083+ LR R2,R13 remember callers save area
011124 18DF 21084+ LR R13,R15 setup current save area
011126 50D2 0008 00008 21085+ ST R13,8(R2) set forw pointer in callers save area
00000 21086+ USING TDSC,R1 declare TDSC base register
01112A 58F0 1008 00008 21087+ L R15,TLRCNT load local repeat count to R15
21088+*
21089 *
01112E 5820 C09C 111AC 21090 L R2,=A(BR14FAR) load target address
21091 T321L REPINS BALR,(R14,R2) repeat: BALR R14,R2
21092+*
21093+* build from sublist &ALIST a comma separated string &ARGS
21094+*
21095+*
21096+*
21097+*
21098+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
21099+* this allows to transfer the repeat count from last TDSCGEN call
21100+*
21101+*
11132 21102+T321L EQU *
21103+*
21104+* write a comment indicating what REPINS does (in case NOGEN in effect)
21105+*
21106+*,// REPINS: do 50 times:
21107+*
21108+* MNOTE requires that ' is doubled for expanded variables
21109+* thus build &MASTR as a copy of '&ARGS with ' doubled
21110+*
21111+*
21112+*,// BALR R14,R2
21113+*
21114+* finally generate code: &ICNT copies of &CODE &ARGS
21115+*
011132 05E2 21116+ BALR R14,R2
011134 05E2 21117+ BALR R14,R2
011136 05E2 21118+ BALR R14,R2
011138 05E2 21119+ BALR R14,R2
01113A 05E2 21120+ BALR R14,R2
01113C 05E2 21121+ BALR R14,R2
01113E 05E2 21122+ BALR R14,R2
011140 05E2 21123+ BALR R14,R2
011142 05E2 21124+ BALR R14,R2
011144 05E2 21125+ BALR R14,R2
PAGE 387
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
011146 05E2 21126+ BALR R14,R2
011148 05E2 21127+ BALR R14,R2
01114A 05E2 21128+ BALR R14,R2
01114C 05E2 21129+ BALR R14,R2
01114E 05E2 21130+ BALR R14,R2
011150 05E2 21131+ BALR R14,R2
011152 05E2 21132+ BALR R14,R2
011154 05E2 21133+ BALR R14,R2
011156 05E2 21134+ BALR R14,R2
011158 05E2 21135+ BALR R14,R2
01115A 05E2 21136+ BALR R14,R2
01115C 05E2 21137+ BALR R14,R2
01115E 05E2 21138+ BALR R14,R2
011160 05E2 21139+ BALR R14,R2
011162 05E2 21140+ BALR R14,R2
011164 05E2 21141+ BALR R14,R2
011166 05E2 21142+ BALR R14,R2
011168 05E2 21143+ BALR R14,R2
01116A 05E2 21144+ BALR R14,R2
01116C 05E2 21145+ BALR R14,R2
01116E 05E2 21146+ BALR R14,R2
011170 05E2 21147+ BALR R14,R2
011172 05E2 21148+ BALR R14,R2
011174 05E2 21149+ BALR R14,R2
011176 05E2 21150+ BALR R14,R2
011178 05E2 21151+ BALR R14,R2
01117A 05E2 21152+ BALR R14,R2
01117C 05E2 21153+ BALR R14,R2
01117E 05E2 21154+ BALR R14,R2
011180 05E2 21155+ BALR R14,R2
011182 05E2 21156+ BALR R14,R2
011184 05E2 21157+ BALR R14,R2
011186 05E2 21158+ BALR R14,R2
011188 05E2 21159+ BALR R14,R2
01118A 05E2 21160+ BALR R14,R2
01118C 05E2 21161+ BALR R14,R2
01118E 05E2 21162+ BALR R14,R2
011190 05E2 21163+ BALR R14,R2
011192 05E2 21164+ BALR R14,R2
011194 05E2 21165+ BALR R14,R2
21166+*
011196 06FB 21167 BCTR R15,R11
21168 TSIMRET
011198 58F0 C098 111A8 21169+ L R15,=A(SAVETST) R15 := current save area
01119C 58DF 0004 00004 21170+ L R13,4(R15) get old save area back
0111A0 98EC D00C 0000C 21171+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0111A4 07FE 21172+ BR 14 RETURN 02000000
21173 TSIMEND
0111A8 21174+ LTORG
0111A8 00000458 21175 =A(SAVETST)
0111AC 000005D8 21176 =A(BR14FAR)
111B0 21177+T321TEND EQU *
21178 *
21179 * Test 322 -- BAL R,l; BR R --------------------------------
21180 *
PAGE 388
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
21181 TSIMBEG T322,7000,50,1,C'BAL R,l; BR R'
21182+*
003624 21183+TDSCDAT CSECT
003628 21184+ DS 0D
21185+*
003628 000111B0 21186+T322TDSC DC A(T322) // TENTRY
00362C 000000FC 21187+ DC A(T322TEND-T322) // TLENGTH
003630 00001B58 21188+ DC F'7000' // TLRCNT
003634 00000032 21189+ DC F'50' // TIGCNT
003638 00000001 21190+ DC F'1' // TLTYPE
00188D 21191+TEXT CSECT
00188D E3F3F2F2 21192+SPTR1841 DC C'T322'
00363C 21193+TDSCDAT CSECT
00363C 21194+ DS 0F
00363C 0400188D 21195+ DC AL1(L'SPTR1841),AL3(SPTR1841)
001891 21196+TEXT CSECT
001891 C2C1D340D96B935E 21197+SPTR1842 DC C'BAL R,l; BR R'
003640 21198+TDSCDAT CSECT
003640 21199+ DS 0F
003640 0D001891 21200+ DC AL1(L'SPTR1842),AL3(SPTR1842)
21201+*
004BF0 21202+TDSCTBL CSECT
04BF0 21203+T322TPTR EQU *
004BF0 00003628 21204+ DC A(T322TDSC) enabled test
21205+*
0111B0 21206+TCODE CSECT
0111B0 21207+ DS 0D ensure double word alignment for test
0111B0 21208+T322 DS 0H 01650000
0111B0 90EC D00C 0000C 21209+ STM 14,12,12(13) SAVE REGISTERS 02950000
0111B4 18CF 21210+ LR R12,R15 base register := entry address
111B0 21211+ USING T322,R12 declare code base register
0111B6 41B0 C01E 111CE 21212+ LA R11,T322L load loop target to R11
0111BA 58F0 C0F8 112A8 21213+ L R15,=A(SAVETST) R15 := current save area
0111BE 50DF 0004 00004 21214+ ST R13,4(R15) set back pointer in current save area
0111C2 182D 21215+ LR R2,R13 remember callers save area
0111C4 18DF 21216+ LR R13,R15 setup current save area
0111C6 50D2 0008 00008 21217+ ST R13,8(R2) set forw pointer in callers save area
00000 21218+ USING TDSC,R1 declare TDSC base register
0111CA 58F0 1008 00008 21219+ L R15,TLRCNT load local repeat count to R15
21220+*
21221 *
21222 T322L REPINS BAL,(R14,T322R) repeat: BAL R14,T322R
21223+*
21224+* build from sublist &ALIST a comma separated string &ARGS
21225+*
21226+*
21227+*
21228+*
21229+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
21230+* this allows to transfer the repeat count from last TDSCGEN call
21231+*
21232+*
111CE 21233+T322L EQU *
21234+*
21235+* write a comment indicating what REPINS does (in case NOGEN in effect)
PAGE 389
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
21236+*
21237+*,// REPINS: do 50 times:
21238+*
21239+* MNOTE requires that ' is doubled for expanded variables
21240+* thus build &MASTR as a copy of '&ARGS with ' doubled
21241+*
21242+*
21243+*,// BAL R14,T322R
21244+*
21245+* finally generate code: &ICNT copies of &CODE &ARGS
21246+*
0111CE 45E0 C0F6 112A6 21247+ BAL R14,T322R
0111D2 45E0 C0F6 112A6 21248+ BAL R14,T322R
0111D6 45E0 C0F6 112A6 21249+ BAL R14,T322R
0111DA 45E0 C0F6 112A6 21250+ BAL R14,T322R
0111DE 45E0 C0F6 112A6 21251+ BAL R14,T322R
0111E2 45E0 C0F6 112A6 21252+ BAL R14,T322R
0111E6 45E0 C0F6 112A6 21253+ BAL R14,T322R
0111EA 45E0 C0F6 112A6 21254+ BAL R14,T322R
0111EE 45E0 C0F6 112A6 21255+ BAL R14,T322R
0111F2 45E0 C0F6 112A6 21256+ BAL R14,T322R
0111F6 45E0 C0F6 112A6 21257+ BAL R14,T322R
0111FA 45E0 C0F6 112A6 21258+ BAL R14,T322R
0111FE 45E0 C0F6 112A6 21259+ BAL R14,T322R
011202 45E0 C0F6 112A6 21260+ BAL R14,T322R
011206 45E0 C0F6 112A6 21261+ BAL R14,T322R
01120A 45E0 C0F6 112A6 21262+ BAL R14,T322R
01120E 45E0 C0F6 112A6 21263+ BAL R14,T322R
011212 45E0 C0F6 112A6 21264+ BAL R14,T322R
011216 45E0 C0F6 112A6 21265+ BAL R14,T322R
01121A 45E0 C0F6 112A6 21266+ BAL R14,T322R
01121E 45E0 C0F6 112A6 21267+ BAL R14,T322R
011222 45E0 C0F6 112A6 21268+ BAL R14,T322R
011226 45E0 C0F6 112A6 21269+ BAL R14,T322R
01122A 45E0 C0F6 112A6 21270+ BAL R14,T322R
01122E 45E0 C0F6 112A6 21271+ BAL R14,T322R
011232 45E0 C0F6 112A6 21272+ BAL R14,T322R
011236 45E0 C0F6 112A6 21273+ BAL R14,T322R
01123A 45E0 C0F6 112A6 21274+ BAL R14,T322R
01123E 45E0 C0F6 112A6 21275+ BAL R14,T322R
011242 45E0 C0F6 112A6 21276+ BAL R14,T322R
011246 45E0 C0F6 112A6 21277+ BAL R14,T322R
01124A 45E0 C0F6 112A6 21278+ BAL R14,T322R
01124E 45E0 C0F6 112A6 21279+ BAL R14,T322R
011252 45E0 C0F6 112A6 21280+ BAL R14,T322R
011256 45E0 C0F6 112A6 21281+ BAL R14,T322R
01125A 45E0 C0F6 112A6 21282+ BAL R14,T322R
01125E 45E0 C0F6 112A6 21283+ BAL R14,T322R
011262 45E0 C0F6 112A6 21284+ BAL R14,T322R
011266 45E0 C0F6 112A6 21285+ BAL R14,T322R
01126A 45E0 C0F6 112A6 21286+ BAL R14,T322R
01126E 45E0 C0F6 112A6 21287+ BAL R14,T322R
011272 45E0 C0F6 112A6 21288+ BAL R14,T322R
011276 45E0 C0F6 112A6 21289+ BAL R14,T322R
01127A 45E0 C0F6 112A6 21290+ BAL R14,T322R
PAGE 390
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01127E 45E0 C0F6 112A6 21291+ BAL R14,T322R
011282 45E0 C0F6 112A6 21292+ BAL R14,T322R
011286 45E0 C0F6 112A6 21293+ BAL R14,T322R
01128A 45E0 C0F6 112A6 21294+ BAL R14,T322R
01128E 45E0 C0F6 112A6 21295+ BAL R14,T322R
011292 45E0 C0F6 112A6 21296+ BAL R14,T322R
21297+*
011296 06FB 21298 BCTR R15,R11
21299 TSIMRET
011298 58F0 C0F8 112A8 21300+ L R15,=A(SAVETST) R15 := current save area
01129C 58DF 0004 00004 21301+ L R13,4(R15) get old save area back
0112A0 98EC D00C 0000C 21302+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0112A4 07FE 21303+ BR 14 RETURN 02000000
21304 *
0112A6 21305 DS 0H
0112A6 07FE 21306 T322R BR R14
21307 TSIMEND
0112A8 21308+ LTORG
0112A8 00000458 21309 =A(SAVETST)
112AC 21310+T322TEND EQU *
21311 *
21312 * Test 323 -- BAL R,l; BR R (far) --------------------------
21313 *
21314 TSIMBEG T323,3500,50,1,C'BAL R,l; BR R (far)'
21315+*
003644 21316+TDSCDAT CSECT
003648 21317+ DS 0D
21318+*
003648 000112B0 21319+T323TDSC DC A(T323) // TENTRY
00364C 00000108 21320+ DC A(T323TEND-T323) // TLENGTH
003650 00000DAC 21321+ DC F'3500' // TLRCNT
003654 00000032 21322+ DC F'50' // TIGCNT
003658 00000001 21323+ DC F'1' // TLTYPE
00189E 21324+TEXT CSECT
00189E E3F3F2F3 21325+SPTR1853 DC C'T323'
00365C 21326+TDSCDAT CSECT
00365C 21327+ DS 0F
00365C 0400189E 21328+ DC AL1(L'SPTR1853),AL3(SPTR1853)
0018A2 21329+TEXT CSECT
0018A2 C2C1D340D96B935E 21330+SPTR1854 DC C'BAL R,l; BR R (far)'
003660 21331+TDSCDAT CSECT
003660 21332+ DS 0F
003660 130018A2 21333+ DC AL1(L'SPTR1854),AL3(SPTR1854)
21334+*
004BF4 21335+TDSCTBL CSECT
04BF4 21336+T323TPTR EQU *
004BF4 00003648 21337+ DC A(T323TDSC) enabled test
21338+*
0112AC 21339+TCODE CSECT
0112B0 21340+ DS 0D ensure double word alignment for test
0112B0 21341+T323 DS 0H 01650000
0112B0 90EC D00C 0000C 21342+ STM 14,12,12(13) SAVE REGISTERS 02950000
0112B4 18CF 21343+ LR R12,R15 base register := entry address
112B0 21344+ USING T323,R12 declare code base register
0112B6 41B0 C022 112D2 21345+ LA R11,T323L load loop target to R11
PAGE 391
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0112BA 58F0 C100 113B0 21346+ L R15,=A(SAVETST) R15 := current save area
0112BE 50DF 0004 00004 21347+ ST R13,4(R15) set back pointer in current save area
0112C2 182D 21348+ LR R2,R13 remember callers save area
0112C4 18DF 21349+ LR R13,R15 setup current save area
0112C6 50D2 0008 00008 21350+ ST R13,8(R2) set forw pointer in callers save area
00000 21351+ USING TDSC,R1 declare TDSC base register
0112CA 58F0 1008 00008 21352+ L R15,TLRCNT load local repeat count to R15
21353+*
21354 *
0112CE 5820 C104 113B4 21355 L R2,=A(BR14FAR) load target address
21356 T323L REPINS BAL,(R14,0(R2)) repeat: BAL R14,0(R2)
21357+*
21358+* build from sublist &ALIST a comma separated string &ARGS
21359+*
21360+*
21361+*
21362+*
21363+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
21364+* this allows to transfer the repeat count from last TDSCGEN call
21365+*
21366+*
112D2 21367+T323L EQU *
21368+*
21369+* write a comment indicating what REPINS does (in case NOGEN in effect)
21370+*
21371+*,// REPINS: do 50 times:
21372+*
21373+* MNOTE requires that ' is doubled for expanded variables
21374+* thus build &MASTR as a copy of '&ARGS with ' doubled
21375+*
21376+*
21377+*,// BAL R14,0(R2)
21378+*
21379+* finally generate code: &ICNT copies of &CODE &ARGS
21380+*
0112D2 45E2 0000 00000 21381+ BAL R14,0(R2)
0112D6 45E2 0000 00000 21382+ BAL R14,0(R2)
0112DA 45E2 0000 00000 21383+ BAL R14,0(R2)
0112DE 45E2 0000 00000 21384+ BAL R14,0(R2)
0112E2 45E2 0000 00000 21385+ BAL R14,0(R2)
0112E6 45E2 0000 00000 21386+ BAL R14,0(R2)
0112EA 45E2 0000 00000 21387+ BAL R14,0(R2)
0112EE 45E2 0000 00000 21388+ BAL R14,0(R2)
0112F2 45E2 0000 00000 21389+ BAL R14,0(R2)
0112F6 45E2 0000 00000 21390+ BAL R14,0(R2)
0112FA 45E2 0000 00000 21391+ BAL R14,0(R2)
0112FE 45E2 0000 00000 21392+ BAL R14,0(R2)
011302 45E2 0000 00000 21393+ BAL R14,0(R2)
011306 45E2 0000 00000 21394+ BAL R14,0(R2)
01130A 45E2 0000 00000 21395+ BAL R14,0(R2)
01130E 45E2 0000 00000 21396+ BAL R14,0(R2)
011312 45E2 0000 00000 21397+ BAL R14,0(R2)
011316 45E2 0000 00000 21398+ BAL R14,0(R2)
01131A 45E2 0000 00000 21399+ BAL R14,0(R2)
01131E 45E2 0000 00000 21400+ BAL R14,0(R2)
PAGE 392
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
011322 45E2 0000 00000 21401+ BAL R14,0(R2)
011326 45E2 0000 00000 21402+ BAL R14,0(R2)
01132A 45E2 0000 00000 21403+ BAL R14,0(R2)
01132E 45E2 0000 00000 21404+ BAL R14,0(R2)
011332 45E2 0000 00000 21405+ BAL R14,0(R2)
011336 45E2 0000 00000 21406+ BAL R14,0(R2)
01133A 45E2 0000 00000 21407+ BAL R14,0(R2)
01133E 45E2 0000 00000 21408+ BAL R14,0(R2)
011342 45E2 0000 00000 21409+ BAL R14,0(R2)
011346 45E2 0000 00000 21410+ BAL R14,0(R2)
01134A 45E2 0000 00000 21411+ BAL R14,0(R2)
01134E 45E2 0000 00000 21412+ BAL R14,0(R2)
011352 45E2 0000 00000 21413+ BAL R14,0(R2)
011356 45E2 0000 00000 21414+ BAL R14,0(R2)
01135A 45E2 0000 00000 21415+ BAL R14,0(R2)
01135E 45E2 0000 00000 21416+ BAL R14,0(R2)
011362 45E2 0000 00000 21417+ BAL R14,0(R2)
011366 45E2 0000 00000 21418+ BAL R14,0(R2)
01136A 45E2 0000 00000 21419+ BAL R14,0(R2)
01136E 45E2 0000 00000 21420+ BAL R14,0(R2)
011372 45E2 0000 00000 21421+ BAL R14,0(R2)
011376 45E2 0000 00000 21422+ BAL R14,0(R2)
01137A 45E2 0000 00000 21423+ BAL R14,0(R2)
01137E 45E2 0000 00000 21424+ BAL R14,0(R2)
011382 45E2 0000 00000 21425+ BAL R14,0(R2)
011386 45E2 0000 00000 21426+ BAL R14,0(R2)
01138A 45E2 0000 00000 21427+ BAL R14,0(R2)
01138E 45E2 0000 00000 21428+ BAL R14,0(R2)
011392 45E2 0000 00000 21429+ BAL R14,0(R2)
011396 45E2 0000 00000 21430+ BAL R14,0(R2)
21431+*
01139A 06FB 21432 BCTR R15,R11
21433 TSIMRET
01139C 58F0 C100 113B0 21434+ L R15,=A(SAVETST) R15 := current save area
0113A0 58DF 0004 00004 21435+ L R13,4(R15) get old save area back
0113A4 98EC D00C 0000C 21436+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0113A8 07FE 21437+ BR 14 RETURN 02000000
21438 TSIMEND
0113B0 21439+ LTORG
0113B0 00000458 21440 =A(SAVETST)
0113B4 000005D8 21441 =A(BR14FAR)
113B8 21442+T323TEND EQU *
21443 *
21444 * old IFOX versions don't handle BAS and BASR. That's why the next
21445 * two tests can be disabled by setting DISBAS to 1 in the preamble.
21446 *
21447 AIF (&DISBAS).DISBAS
21448 *
21449 * Test 324 -- BASR R,R; BR R -------------------------------
21450 *
21451 TSIMBEG T324,8000,50,1,C'BASR R,R; BR R'
21452+*
003664 21453+TDSCDAT CSECT
003668 21454+ DS 0D
21455+*
PAGE 393
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003668 000113B8 21456+T324TDSC DC A(T324) // TENTRY
00366C 0000009C 21457+ DC A(T324TEND-T324) // TLENGTH
003670 00001F40 21458+ DC F'8000' // TLRCNT
003674 00000032 21459+ DC F'50' // TIGCNT
003678 00000001 21460+ DC F'1' // TLTYPE
0018B5 21461+TEXT CSECT
0018B5 E3F3F2F4 21462+SPTR1865 DC C'T324'
00367C 21463+TDSCDAT CSECT
00367C 21464+ DS 0F
00367C 040018B5 21465+ DC AL1(L'SPTR1865),AL3(SPTR1865)
0018B9 21466+TEXT CSECT
0018B9 C2C1E2D940D96BD9 21467+SPTR1866 DC C'BASR R,R; BR R'
003680 21468+TDSCDAT CSECT
003680 21469+ DS 0F
003680 0E0018B9 21470+ DC AL1(L'SPTR1866),AL3(SPTR1866)
21471+*
004BF8 21472+TDSCTBL CSECT
04BF8 21473+T324TPTR EQU *
004BF8 00003668 21474+ DC A(T324TDSC) enabled test
21475+*
0113B8 21476+TCODE CSECT
0113B8 21477+ DS 0D ensure double word alignment for test
0113B8 21478+T324 DS 0H 01650000
0113B8 90EC D00C 0000C 21479+ STM 14,12,12(13) SAVE REGISTERS 02950000
0113BC 18CF 21480+ LR R12,R15 base register := entry address
113B8 21481+ USING T324,R12 declare code base register
0113BE 41B0 C022 113DA 21482+ LA R11,T324L load loop target to R11
0113C2 58F0 C098 11450 21483+ L R15,=A(SAVETST) R15 := current save area
0113C6 50DF 0004 00004 21484+ ST R13,4(R15) set back pointer in current save area
0113CA 182D 21485+ LR R2,R13 remember callers save area
0113CC 18DF 21486+ LR R13,R15 setup current save area
0113CE 50D2 0008 00008 21487+ ST R13,8(R2) set forw pointer in callers save area
00000 21488+ USING TDSC,R1 declare TDSC base register
0113D2 58F0 1008 00008 21489+ L R15,TLRCNT load local repeat count to R15
21490+*
21491 *
0113D6 4120 C096 1144E 21492 LA R2,T324R load target address
21493 T324L REPINS BASR,(R14,R2) repeat: BASR R14,R2
21494+*
21495+* build from sublist &ALIST a comma separated string &ARGS
21496+*
21497+*
21498+*
21499+*
21500+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
21501+* this allows to transfer the repeat count from last TDSCGEN call
21502+*
21503+*
113DA 21504+T324L EQU *
21505+*
21506+* write a comment indicating what REPINS does (in case NOGEN in effect)
21507+*
21508+*,// REPINS: do 50 times:
21509+*
21510+* MNOTE requires that ' is doubled for expanded variables
PAGE 394
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
21511+* thus build &MASTR as a copy of '&ARGS with ' doubled
21512+*
21513+*
21514+*,// BASR R14,R2
21515+*
21516+* finally generate code: &ICNT copies of &CODE &ARGS
21517+*
0113DA 0DE2 21518+ BASR R14,R2
0113DC 0DE2 21519+ BASR R14,R2
0113DE 0DE2 21520+ BASR R14,R2
0113E0 0DE2 21521+ BASR R14,R2
0113E2 0DE2 21522+ BASR R14,R2
0113E4 0DE2 21523+ BASR R14,R2
0113E6 0DE2 21524+ BASR R14,R2
0113E8 0DE2 21525+ BASR R14,R2
0113EA 0DE2 21526+ BASR R14,R2
0113EC 0DE2 21527+ BASR R14,R2
0113EE 0DE2 21528+ BASR R14,R2
0113F0 0DE2 21529+ BASR R14,R2
0113F2 0DE2 21530+ BASR R14,R2
0113F4 0DE2 21531+ BASR R14,R2
0113F6 0DE2 21532+ BASR R14,R2
0113F8 0DE2 21533+ BASR R14,R2
0113FA 0DE2 21534+ BASR R14,R2
0113FC 0DE2 21535+ BASR R14,R2
0113FE 0DE2 21536+ BASR R14,R2
011400 0DE2 21537+ BASR R14,R2
011402 0DE2 21538+ BASR R14,R2
011404 0DE2 21539+ BASR R14,R2
011406 0DE2 21540+ BASR R14,R2
011408 0DE2 21541+ BASR R14,R2
01140A 0DE2 21542+ BASR R14,R2
01140C 0DE2 21543+ BASR R14,R2
01140E 0DE2 21544+ BASR R14,R2
011410 0DE2 21545+ BASR R14,R2
011412 0DE2 21546+ BASR R14,R2
011414 0DE2 21547+ BASR R14,R2
011416 0DE2 21548+ BASR R14,R2
011418 0DE2 21549+ BASR R14,R2
01141A 0DE2 21550+ BASR R14,R2
01141C 0DE2 21551+ BASR R14,R2
01141E 0DE2 21552+ BASR R14,R2
011420 0DE2 21553+ BASR R14,R2
011422 0DE2 21554+ BASR R14,R2
011424 0DE2 21555+ BASR R14,R2
011426 0DE2 21556+ BASR R14,R2
011428 0DE2 21557+ BASR R14,R2
01142A 0DE2 21558+ BASR R14,R2
01142C 0DE2 21559+ BASR R14,R2
01142E 0DE2 21560+ BASR R14,R2
011430 0DE2 21561+ BASR R14,R2
011432 0DE2 21562+ BASR R14,R2
011434 0DE2 21563+ BASR R14,R2
011436 0DE2 21564+ BASR R14,R2
011438 0DE2 21565+ BASR R14,R2
PAGE 395
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01143A 0DE2 21566+ BASR R14,R2
01143C 0DE2 21567+ BASR R14,R2
21568+*
01143E 06FB 21569 BCTR R15,R11
21570 TSIMRET
011440 58F0 C098 11450 21571+ L R15,=A(SAVETST) R15 := current save area
011444 58DF 0004 00004 21572+ L R13,4(R15) get old save area back
011448 98EC D00C 0000C 21573+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01144C 07FE 21574+ BR 14 RETURN 02000000
21575 *
01144E 21576 DS 0H
01144E 07FE 21577 T324R BR R14
21578 TSIMEND
011450 21579+ LTORG
011450 00000458 21580 =A(SAVETST)
11454 21581+T324TEND EQU *
21582 *
21583 * Test 325 -- BAS R,l; BR R --------------------------------
21584 *
21585 TSIMBEG T325,7000,50,1,C'BAS R,l; BR R'
21586+*
003684 21587+TDSCDAT CSECT
003688 21588+ DS 0D
21589+*
003688 00011458 21590+T325TDSC DC A(T325) // TENTRY
00368C 000000FC 21591+ DC A(T325TEND-T325) // TLENGTH
003690 00001B58 21592+ DC F'7000' // TLRCNT
003694 00000032 21593+ DC F'50' // TIGCNT
003698 00000001 21594+ DC F'1' // TLTYPE
0018C7 21595+TEXT CSECT
0018C7 E3F3F2F5 21596+SPTR1877 DC C'T325'
00369C 21597+TDSCDAT CSECT
00369C 21598+ DS 0F
00369C 040018C7 21599+ DC AL1(L'SPTR1877),AL3(SPTR1877)
0018CB 21600+TEXT CSECT
0018CB C2C1E240D96B935E 21601+SPTR1878 DC C'BAS R,l; BR R'
0036A0 21602+TDSCDAT CSECT
0036A0 21603+ DS 0F
0036A0 0D0018CB 21604+ DC AL1(L'SPTR1878),AL3(SPTR1878)
21605+*
004BFC 21606+TDSCTBL CSECT
04BFC 21607+T325TPTR EQU *
004BFC 00003688 21608+ DC A(T325TDSC) enabled test
21609+*
011454 21610+TCODE CSECT
011458 21611+ DS 0D ensure double word alignment for test
011458 21612+T325 DS 0H 01650000
011458 90EC D00C 0000C 21613+ STM 14,12,12(13) SAVE REGISTERS 02950000
01145C 18CF 21614+ LR R12,R15 base register := entry address
11458 21615+ USING T325,R12 declare code base register
01145E 41B0 C01E 11476 21616+ LA R11,T325L load loop target to R11
011462 58F0 C0F8 11550 21617+ L R15,=A(SAVETST) R15 := current save area
011466 50DF 0004 00004 21618+ ST R13,4(R15) set back pointer in current save area
01146A 182D 21619+ LR R2,R13 remember callers save area
01146C 18DF 21620+ LR R13,R15 setup current save area
PAGE 396
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01146E 50D2 0008 00008 21621+ ST R13,8(R2) set forw pointer in callers save area
00000 21622+ USING TDSC,R1 declare TDSC base register
011472 58F0 1008 00008 21623+ L R15,TLRCNT load local repeat count to R15
21624+*
21625 *
21626 T325L REPINS BAS,(R14,T325R) repeat: BAS R14,T325R
21627+*
21628+* build from sublist &ALIST a comma separated string &ARGS
21629+*
21630+*
21631+*
21632+*
21633+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
21634+* this allows to transfer the repeat count from last TDSCGEN call
21635+*
21636+*
11476 21637+T325L EQU *
21638+*
21639+* write a comment indicating what REPINS does (in case NOGEN in effect)
21640+*
21641+*,// REPINS: do 50 times:
21642+*
21643+* MNOTE requires that ' is doubled for expanded variables
21644+* thus build &MASTR as a copy of '&ARGS with ' doubled
21645+*
21646+*
21647+*,// BAS R14,T325R
21648+*
21649+* finally generate code: &ICNT copies of &CODE &ARGS
21650+*
011476 4DE0 C0F6 1154E 21651+ BAS R14,T325R
01147A 4DE0 C0F6 1154E 21652+ BAS R14,T325R
01147E 4DE0 C0F6 1154E 21653+ BAS R14,T325R
011482 4DE0 C0F6 1154E 21654+ BAS R14,T325R
011486 4DE0 C0F6 1154E 21655+ BAS R14,T325R
01148A 4DE0 C0F6 1154E 21656+ BAS R14,T325R
01148E 4DE0 C0F6 1154E 21657+ BAS R14,T325R
011492 4DE0 C0F6 1154E 21658+ BAS R14,T325R
011496 4DE0 C0F6 1154E 21659+ BAS R14,T325R
01149A 4DE0 C0F6 1154E 21660+ BAS R14,T325R
01149E 4DE0 C0F6 1154E 21661+ BAS R14,T325R
0114A2 4DE0 C0F6 1154E 21662+ BAS R14,T325R
0114A6 4DE0 C0F6 1154E 21663+ BAS R14,T325R
0114AA 4DE0 C0F6 1154E 21664+ BAS R14,T325R
0114AE 4DE0 C0F6 1154E 21665+ BAS R14,T325R
0114B2 4DE0 C0F6 1154E 21666+ BAS R14,T325R
0114B6 4DE0 C0F6 1154E 21667+ BAS R14,T325R
0114BA 4DE0 C0F6 1154E 21668+ BAS R14,T325R
0114BE 4DE0 C0F6 1154E 21669+ BAS R14,T325R
0114C2 4DE0 C0F6 1154E 21670+ BAS R14,T325R
0114C6 4DE0 C0F6 1154E 21671+ BAS R14,T325R
0114CA 4DE0 C0F6 1154E 21672+ BAS R14,T325R
0114CE 4DE0 C0F6 1154E 21673+ BAS R14,T325R
0114D2 4DE0 C0F6 1154E 21674+ BAS R14,T325R
0114D6 4DE0 C0F6 1154E 21675+ BAS R14,T325R
PAGE 397
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0114DA 4DE0 C0F6 1154E 21676+ BAS R14,T325R
0114DE 4DE0 C0F6 1154E 21677+ BAS R14,T325R
0114E2 4DE0 C0F6 1154E 21678+ BAS R14,T325R
0114E6 4DE0 C0F6 1154E 21679+ BAS R14,T325R
0114EA 4DE0 C0F6 1154E 21680+ BAS R14,T325R
0114EE 4DE0 C0F6 1154E 21681+ BAS R14,T325R
0114F2 4DE0 C0F6 1154E 21682+ BAS R14,T325R
0114F6 4DE0 C0F6 1154E 21683+ BAS R14,T325R
0114FA 4DE0 C0F6 1154E 21684+ BAS R14,T325R
0114FE 4DE0 C0F6 1154E 21685+ BAS R14,T325R
011502 4DE0 C0F6 1154E 21686+ BAS R14,T325R
011506 4DE0 C0F6 1154E 21687+ BAS R14,T325R
01150A 4DE0 C0F6 1154E 21688+ BAS R14,T325R
01150E 4DE0 C0F6 1154E 21689+ BAS R14,T325R
011512 4DE0 C0F6 1154E 21690+ BAS R14,T325R
011516 4DE0 C0F6 1154E 21691+ BAS R14,T325R
01151A 4DE0 C0F6 1154E 21692+ BAS R14,T325R
01151E 4DE0 C0F6 1154E 21693+ BAS R14,T325R
011522 4DE0 C0F6 1154E 21694+ BAS R14,T325R
011526 4DE0 C0F6 1154E 21695+ BAS R14,T325R
01152A 4DE0 C0F6 1154E 21696+ BAS R14,T325R
01152E 4DE0 C0F6 1154E 21697+ BAS R14,T325R
011532 4DE0 C0F6 1154E 21698+ BAS R14,T325R
011536 4DE0 C0F6 1154E 21699+ BAS R14,T325R
01153A 4DE0 C0F6 1154E 21700+ BAS R14,T325R
21701+*
01153E 06FB 21702 BCTR R15,R11
21703 TSIMRET
011540 58F0 C0F8 11550 21704+ L R15,=A(SAVETST) R15 := current save area
011544 58DF 0004 00004 21705+ L R13,4(R15) get old save area back
011548 98EC D00C 0000C 21706+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01154C 07FE 21707+ BR 14 RETURN 02000000
21708 *
01154E 21709 DS 0H
01154E 07FE 21710 T325R BR R14
21711 TSIMEND
011550 21712+ LTORG
011550 00000458 21713 =A(SAVETST)
11554 21714+T325TEND EQU *
21715 *
21716 .DISBAS ANOP
21717 *
21718 * Test 330 -- L;BALR;SAV;RET --------------------------------
21719 *
21720 TSIMBEG T330,4500,10,1,C'L;BALR;SAV(14,12);RET'
21721+*
0036A4 21722+TDSCDAT CSECT
0036A8 21723+ DS 0D
21724+*
0036A8 00011558 21725+T330TDSC DC A(T330) // TENTRY
0036AC 00000078 21726+ DC A(T330TEND-T330) // TLENGTH
0036B0 00001194 21727+ DC F'4500' // TLRCNT
0036B4 0000000A 21728+ DC F'10' // TIGCNT
0036B8 00000001 21729+ DC F'1' // TLTYPE
0018D8 21730+TEXT CSECT
PAGE 398
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0018D8 E3F3F3F0 21731+SPTR1889 DC C'T330'
0036BC 21732+TDSCDAT CSECT
0036BC 21733+ DS 0F
0036BC 040018D8 21734+ DC AL1(L'SPTR1889),AL3(SPTR1889)
0018DC 21735+TEXT CSECT
0018DC D35EC2C1D3D95EE2 21736+SPTR1890 DC C'L;BALR;SAV(14,12);RET'
0036C0 21737+TDSCDAT CSECT
0036C0 21738+ DS 0F
0036C0 150018DC 21739+ DC AL1(L'SPTR1890),AL3(SPTR1890)
21740+*
004C00 21741+TDSCTBL CSECT
04C00 21742+T330TPTR EQU *
004C00 000036A8 21743+ DC A(T330TDSC) enabled test
21744+*
011554 21745+TCODE CSECT
011558 21746+ DS 0D ensure double word alignment for test
011558 21747+T330 DS 0H 01650000
011558 90EC D00C 0000C 21748+ STM 14,12,12(13) SAVE REGISTERS 02950000
01155C 18CF 21749+ LR R12,R15 base register := entry address
11558 21750+ USING T330,R12 declare code base register
01155E 41B0 C020 11578 21751+ LA R11,T330L load loop target to R11
011562 58F0 C070 115C8 21752+ L R15,=A(SAVETST) R15 := current save area
011566 50DF 0004 00004 21753+ ST R13,4(R15) set back pointer in current save area
01156A 182D 21754+ LR R2,R13 remember callers save area
01156C 18DF 21755+ LR R13,R15 setup current save area
01156E 50D2 0008 00008 21756+ ST R13,8(R2) set forw pointer in callers save area
00000 21757+ USING TDSC,R1 declare TDSC base register
011572 58F0 1008 00008 21758+ L R15,TLRCNT load local repeat count to R15
21759+*
21760 *
21761 * use sequence
21762 * L R15,=A(T330R) load target addres
21763 * BALR R14,R15 and call it
21764 *
011576 18AF 21765 LR R10,R15 use R10 as repeat count
21766 T330L REPINSN L,(R15,=A(T330R)),BALR,(R14,R15)
21767+*
21768+* build from sublist &ALIST* a comma separated string &ARGS*
21769+*
21770+*
21771+*
21772+*
21773+*
21774+*
11578 21775+T330L EQU *
21776+*
21777+*
21778+* write a comment indicating what REPINSN does (if NOGEN in effect)
21779+*
21780+*,// REPINSN: do 10 times:
21781+*
21782+* MNOTE requires that ' is doubled for expanded variables
21783+* thus build &MASTR as a copy of '&ARGS with ' doubled
21784+*
21785+*
PAGE 399
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
21786+*,// L R15,=A(T330R)
21787+*
21788+* MNOTE requires that ' is doubled for expanded variables
21789+* thus build &MASTR as a copy of '&ARGS with ' doubled
21790+*
21791+*
21792+*,// BALR R14,R15
21793+*
21794+* finally generate code: &ICNT copies of &CO1 ...
21795+*
011578 58F0 C074 115CC 21796+ L R15,=A(T330R)
01157C 05EF 21797+ BALR R14,R15
01157E 58F0 C074 115CC 21798+ L R15,=A(T330R)
011582 05EF 21799+ BALR R14,R15
011584 58F0 C074 115CC 21800+ L R15,=A(T330R)
011588 05EF 21801+ BALR R14,R15
01158A 58F0 C074 115CC 21802+ L R15,=A(T330R)
01158E 05EF 21803+ BALR R14,R15
011590 58F0 C074 115CC 21804+ L R15,=A(T330R)
011594 05EF 21805+ BALR R14,R15
011596 58F0 C074 115CC 21806+ L R15,=A(T330R)
01159A 05EF 21807+ BALR R14,R15
01159C 58F0 C074 115CC 21808+ L R15,=A(T330R)
0115A0 05EF 21809+ BALR R14,R15
0115A2 58F0 C074 115CC 21810+ L R15,=A(T330R)
0115A6 05EF 21811+ BALR R14,R15
0115A8 58F0 C074 115CC 21812+ L R15,=A(T330R)
0115AC 05EF 21813+ BALR R14,R15
0115AE 58F0 C074 115CC 21814+ L R15,=A(T330R)
0115B2 05EF 21815+ BALR R14,R15
21816+*
0115B4 06AB 21817 BCTR R10,R11
21818 TSIMRET
0115B6 58F0 C070 115C8 21819+ L R15,=A(SAVETST) R15 := current save area
0115BA 58DF 0004 00004 21820+ L R13,4(R15) get old save area back
0115BE 98EC D00C 0000C 21821+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0115C2 07FE 21822+ BR 14 RETURN 02000000
21823 TSIMEND
0115C8 21824+ LTORG
0115C8 00000458 21825 =A(SAVETST)
0115CC 00018048 21826 =A(T330R)
115D0 21827+T330TEND EQU *
21828 *
018048 21829 T330CS CSECT call target in separate CSECT
21830 T330R SAVE (14,12) Save input registers
018048 21831+T330R DS 0H 01650000
018048 90EC D00C 0000C 21832+ STM 14,12,12(13) SAVE REGISTERS 02950000
01804C 18CF 21833 LR R12,R15 base register := entry address
18048 21834 USING T330R,R12 declare base register
01804E 50D0 C024 1806C 21835 ST R13,T330SAV+4 set back pointer in current save area
018052 182D 21836 LR R2,R13 remember callers save area
018054 41D0 C020 18068 21837 LA R13,T330SAV setup current save area
018058 50D2 0008 00008 21838 ST R13,8(R2) set forw pointer in callers save area
21839 * <-- empty body of procedure
01805C 58D0 C024 1806C 21840 L R13,T330SAV+4 get old save area back
PAGE 400
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
21841 RETURN (14,12) return to OS (will setup RC)
018060 98EC D00C 0000C 21842+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
018064 07FE 21843+ BR 14 RETURN 02000000
21844 DROP R12
21845 *
018068 21846 T330SAV DS 18F save area (for T330R)
21847 *
21848 * Test 4xx -- packed/decimal ====================================
21849 *
21850 * Test 40x -- convert/pack/unpack ==========================
21851 *
21852 * Test 400 -- CVB R,m --------------------------------------
21853 *
21854 TSIMBEG T400,2500,50,1,C'CVB R,m'
21855+*
0036C4 21856+TDSCDAT CSECT
0036C8 21857+ DS 0D
21858+*
0036C8 000115D0 21859+T400TDSC DC A(T400) // TENTRY
0036CC 00000104 21860+ DC A(T400TEND-T400) // TLENGTH
0036D0 000009C4 21861+ DC F'2500' // TLRCNT
0036D4 00000032 21862+ DC F'50' // TIGCNT
0036D8 00000001 21863+ DC F'1' // TLTYPE
0018F1 21864+TEXT CSECT
0018F1 E3F4F0F0 21865+SPTR1905 DC C'T400'
0036DC 21866+TDSCDAT CSECT
0036DC 21867+ DS 0F
0036DC 040018F1 21868+ DC AL1(L'SPTR1905),AL3(SPTR1905)
0018F5 21869+TEXT CSECT
0018F5 C3E5C240D96B94 21870+SPTR1906 DC C'CVB R,m'
0036E0 21871+TDSCDAT CSECT
0036E0 21872+ DS 0F
0036E0 070018F5 21873+ DC AL1(L'SPTR1906),AL3(SPTR1906)
21874+*
004C04 21875+TDSCTBL CSECT
04C04 21876+T400TPTR EQU *
004C04 000036C8 21877+ DC A(T400TDSC) enabled test
21878+*
0115D0 21879+TCODE CSECT
0115D0 21880+ DS 0D ensure double word alignment for test
0115D0 21881+T400 DS 0H 01650000
0115D0 90EC D00C 0000C 21882+ STM 14,12,12(13) SAVE REGISTERS 02950000
0115D4 18CF 21883+ LR R12,R15 base register := entry address
115D0 21884+ USING T400,R12 declare code base register
0115D6 41B0 C01E 115EE 21885+ LA R11,T400L load loop target to R11
0115DA 58F0 C100 116D0 21886+ L R15,=A(SAVETST) R15 := current save area
0115DE 50DF 0004 00004 21887+ ST R13,4(R15) set back pointer in current save area
0115E2 182D 21888+ LR R2,R13 remember callers save area
0115E4 18DF 21889+ LR R13,R15 setup current save area
0115E6 50D2 0008 00008 21890+ ST R13,8(R2) set forw pointer in callers save area
00000 21891+ USING TDSC,R1 declare TDSC base register
0115EA 58F0 1008 00008 21892+ L R15,TLRCNT load local repeat count to R15
21893+*
21894 *
21895 T400L REPINS CVB,(R2,T400V) repeat: CVB R2,T400V
PAGE 401
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
21896+*
21897+* build from sublist &ALIST a comma separated string &ARGS
21898+*
21899+*
21900+*
21901+*
21902+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
21903+* this allows to transfer the repeat count from last TDSCGEN call
21904+*
21905+*
115EE 21906+T400L EQU *
21907+*
21908+* write a comment indicating what REPINS does (in case NOGEN in effect)
21909+*
21910+*,// REPINS: do 50 times:
21911+*
21912+* MNOTE requires that ' is doubled for expanded variables
21913+* thus build &MASTR as a copy of '&ARGS with ' doubled
21914+*
21915+*
21916+*,// CVB R2,T400V
21917+*
21918+* finally generate code: &ICNT copies of &CODE &ARGS
21919+*
0115EE 4F20 C0F8 116C8 21920+ CVB R2,T400V
0115F2 4F20 C0F8 116C8 21921+ CVB R2,T400V
0115F6 4F20 C0F8 116C8 21922+ CVB R2,T400V
0115FA 4F20 C0F8 116C8 21923+ CVB R2,T400V
0115FE 4F20 C0F8 116C8 21924+ CVB R2,T400V
011602 4F20 C0F8 116C8 21925+ CVB R2,T400V
011606 4F20 C0F8 116C8 21926+ CVB R2,T400V
01160A 4F20 C0F8 116C8 21927+ CVB R2,T400V
01160E 4F20 C0F8 116C8 21928+ CVB R2,T400V
011612 4F20 C0F8 116C8 21929+ CVB R2,T400V
011616 4F20 C0F8 116C8 21930+ CVB R2,T400V
01161A 4F20 C0F8 116C8 21931+ CVB R2,T400V
01161E 4F20 C0F8 116C8 21932+ CVB R2,T400V
011622 4F20 C0F8 116C8 21933+ CVB R2,T400V
011626 4F20 C0F8 116C8 21934+ CVB R2,T400V
01162A 4F20 C0F8 116C8 21935+ CVB R2,T400V
01162E 4F20 C0F8 116C8 21936+ CVB R2,T400V
011632 4F20 C0F8 116C8 21937+ CVB R2,T400V
011636 4F20 C0F8 116C8 21938+ CVB R2,T400V
01163A 4F20 C0F8 116C8 21939+ CVB R2,T400V
01163E 4F20 C0F8 116C8 21940+ CVB R2,T400V
011642 4F20 C0F8 116C8 21941+ CVB R2,T400V
011646 4F20 C0F8 116C8 21942+ CVB R2,T400V
01164A 4F20 C0F8 116C8 21943+ CVB R2,T400V
01164E 4F20 C0F8 116C8 21944+ CVB R2,T400V
011652 4F20 C0F8 116C8 21945+ CVB R2,T400V
011656 4F20 C0F8 116C8 21946+ CVB R2,T400V
01165A 4F20 C0F8 116C8 21947+ CVB R2,T400V
01165E 4F20 C0F8 116C8 21948+ CVB R2,T400V
011662 4F20 C0F8 116C8 21949+ CVB R2,T400V
011666 4F20 C0F8 116C8 21950+ CVB R2,T400V
PAGE 402
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01166A 4F20 C0F8 116C8 21951+ CVB R2,T400V
01166E 4F20 C0F8 116C8 21952+ CVB R2,T400V
011672 4F20 C0F8 116C8 21953+ CVB R2,T400V
011676 4F20 C0F8 116C8 21954+ CVB R2,T400V
01167A 4F20 C0F8 116C8 21955+ CVB R2,T400V
01167E 4F20 C0F8 116C8 21956+ CVB R2,T400V
011682 4F20 C0F8 116C8 21957+ CVB R2,T400V
011686 4F20 C0F8 116C8 21958+ CVB R2,T400V
01168A 4F20 C0F8 116C8 21959+ CVB R2,T400V
01168E 4F20 C0F8 116C8 21960+ CVB R2,T400V
011692 4F20 C0F8 116C8 21961+ CVB R2,T400V
011696 4F20 C0F8 116C8 21962+ CVB R2,T400V
01169A 4F20 C0F8 116C8 21963+ CVB R2,T400V
01169E 4F20 C0F8 116C8 21964+ CVB R2,T400V
0116A2 4F20 C0F8 116C8 21965+ CVB R2,T400V
0116A6 4F20 C0F8 116C8 21966+ CVB R2,T400V
0116AA 4F20 C0F8 116C8 21967+ CVB R2,T400V
0116AE 4F20 C0F8 116C8 21968+ CVB R2,T400V
0116B2 4F20 C0F8 116C8 21969+ CVB R2,T400V
21970+*
0116B6 06FB 21971 BCTR R15,R11
21972 TSIMRET
0116B8 58F0 C100 116D0 21973+ L R15,=A(SAVETST) R15 := current save area
0116BC 58DF 0004 00004 21974+ L R13,4(R15) get old save area back
0116C0 98EC D00C 0000C 21975+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0116C4 07FE 21976+ BR 14 RETURN 02000000
21977 *
0116C8 21978 DS 0D
0116C8 000001234567890C 21979 T400V DC PL8'1234567890'
21980 TSIMEND
0116D0 21981+ LTORG
0116D0 00000458 21982 =A(SAVETST)
116D4 21983+T400TEND EQU *
21984 *
21985 * Test 401 -- CVD R,m --------------------------------------
21986 *
21987 TSIMBEG T401,2500,50,1,C'CVD R,m'
21988+*
0036E4 21989+TDSCDAT CSECT
0036E8 21990+ DS 0D
21991+*
0036E8 000116D8 21992+T401TDSC DC A(T401) // TENTRY
0036EC 00000110 21993+ DC A(T401TEND-T401) // TLENGTH
0036F0 000009C4 21994+ DC F'2500' // TLRCNT
0036F4 00000032 21995+ DC F'50' // TIGCNT
0036F8 00000001 21996+ DC F'1' // TLTYPE
0018FC 21997+TEXT CSECT
0018FC E3F4F0F1 21998+SPTR1917 DC C'T401'
0036FC 21999+TDSCDAT CSECT
0036FC 22000+ DS 0F
0036FC 040018FC 22001+ DC AL1(L'SPTR1917),AL3(SPTR1917)
001900 22002+TEXT CSECT
001900 C3E5C440D96B94 22003+SPTR1918 DC C'CVD R,m'
003700 22004+TDSCDAT CSECT
003700 22005+ DS 0F
PAGE 403
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003700 07001900 22006+ DC AL1(L'SPTR1918),AL3(SPTR1918)
22007+*
004C08 22008+TDSCTBL CSECT
04C08 22009+T401TPTR EQU *
004C08 000036E8 22010+ DC A(T401TDSC) enabled test
22011+*
0116D4 22012+TCODE CSECT
0116D8 22013+ DS 0D ensure double word alignment for test
0116D8 22014+T401 DS 0H 01650000
0116D8 90EC D00C 0000C 22015+ STM 14,12,12(13) SAVE REGISTERS 02950000
0116DC 18CF 22016+ LR R12,R15 base register := entry address
116D8 22017+ USING T401,R12 declare code base register
0116DE 41B0 C022 116FA 22018+ LA R11,T401L load loop target to R11
0116E2 58F0 C108 117E0 22019+ L R15,=A(SAVETST) R15 := current save area
0116E6 50DF 0004 00004 22020+ ST R13,4(R15) set back pointer in current save area
0116EA 182D 22021+ LR R2,R13 remember callers save area
0116EC 18DF 22022+ LR R13,R15 setup current save area
0116EE 50D2 0008 00008 22023+ ST R13,8(R2) set forw pointer in callers save area
00000 22024+ USING TDSC,R1 declare TDSC base register
0116F2 58F0 1008 00008 22025+ L R15,TLRCNT load local repeat count to R15
22026+*
22027 *
0116F6 5820 C10C 117E4 22028 L R2,=F'123456789'
22029 T401L REPINS CVD,(R2,T401V) repeat: CVD R2,T401V
22030+*
22031+* build from sublist &ALIST a comma separated string &ARGS
22032+*
22033+*
22034+*
22035+*
22036+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
22037+* this allows to transfer the repeat count from last TDSCGEN call
22038+*
22039+*
116FA 22040+T401L EQU *
22041+*
22042+* write a comment indicating what REPINS does (in case NOGEN in effect)
22043+*
22044+*,// REPINS: do 50 times:
22045+*
22046+* MNOTE requires that ' is doubled for expanded variables
22047+* thus build &MASTR as a copy of '&ARGS with ' doubled
22048+*
22049+*
22050+*,// CVD R2,T401V
22051+*
22052+* finally generate code: &ICNT copies of &CODE &ARGS
22053+*
0116FA 4E20 C100 117D8 22054+ CVD R2,T401V
0116FE 4E20 C100 117D8 22055+ CVD R2,T401V
011702 4E20 C100 117D8 22056+ CVD R2,T401V
011706 4E20 C100 117D8 22057+ CVD R2,T401V
01170A 4E20 C100 117D8 22058+ CVD R2,T401V
01170E 4E20 C100 117D8 22059+ CVD R2,T401V
011712 4E20 C100 117D8 22060+ CVD R2,T401V
PAGE 404
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
011716 4E20 C100 117D8 22061+ CVD R2,T401V
01171A 4E20 C100 117D8 22062+ CVD R2,T401V
01171E 4E20 C100 117D8 22063+ CVD R2,T401V
011722 4E20 C100 117D8 22064+ CVD R2,T401V
011726 4E20 C100 117D8 22065+ CVD R2,T401V
01172A 4E20 C100 117D8 22066+ CVD R2,T401V
01172E 4E20 C100 117D8 22067+ CVD R2,T401V
011732 4E20 C100 117D8 22068+ CVD R2,T401V
011736 4E20 C100 117D8 22069+ CVD R2,T401V
01173A 4E20 C100 117D8 22070+ CVD R2,T401V
01173E 4E20 C100 117D8 22071+ CVD R2,T401V
011742 4E20 C100 117D8 22072+ CVD R2,T401V
011746 4E20 C100 117D8 22073+ CVD R2,T401V
01174A 4E20 C100 117D8 22074+ CVD R2,T401V
01174E 4E20 C100 117D8 22075+ CVD R2,T401V
011752 4E20 C100 117D8 22076+ CVD R2,T401V
011756 4E20 C100 117D8 22077+ CVD R2,T401V
01175A 4E20 C100 117D8 22078+ CVD R2,T401V
01175E 4E20 C100 117D8 22079+ CVD R2,T401V
011762 4E20 C100 117D8 22080+ CVD R2,T401V
011766 4E20 C100 117D8 22081+ CVD R2,T401V
01176A 4E20 C100 117D8 22082+ CVD R2,T401V
01176E 4E20 C100 117D8 22083+ CVD R2,T401V
011772 4E20 C100 117D8 22084+ CVD R2,T401V
011776 4E20 C100 117D8 22085+ CVD R2,T401V
01177A 4E20 C100 117D8 22086+ CVD R2,T401V
01177E 4E20 C100 117D8 22087+ CVD R2,T401V
011782 4E20 C100 117D8 22088+ CVD R2,T401V
011786 4E20 C100 117D8 22089+ CVD R2,T401V
01178A 4E20 C100 117D8 22090+ CVD R2,T401V
01178E 4E20 C100 117D8 22091+ CVD R2,T401V
011792 4E20 C100 117D8 22092+ CVD R2,T401V
011796 4E20 C100 117D8 22093+ CVD R2,T401V
01179A 4E20 C100 117D8 22094+ CVD R2,T401V
01179E 4E20 C100 117D8 22095+ CVD R2,T401V
0117A2 4E20 C100 117D8 22096+ CVD R2,T401V
0117A6 4E20 C100 117D8 22097+ CVD R2,T401V
0117AA 4E20 C100 117D8 22098+ CVD R2,T401V
0117AE 4E20 C100 117D8 22099+ CVD R2,T401V
0117B2 4E20 C100 117D8 22100+ CVD R2,T401V
0117B6 4E20 C100 117D8 22101+ CVD R2,T401V
0117BA 4E20 C100 117D8 22102+ CVD R2,T401V
0117BE 4E20 C100 117D8 22103+ CVD R2,T401V
22104+*
0117C2 06FB 22105 BCTR R15,R11
22106 TSIMRET
0117C4 58F0 C108 117E0 22107+ L R15,=A(SAVETST) R15 := current save area
0117C8 58DF 0004 00004 22108+ L R13,4(R15) get old save area back
0117CC 98EC D00C 0000C 22109+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0117D0 07FE 22110+ BR 14 RETURN 02000000
22111 *
0117D8 22112 T401V DS 1D allocate 8 bytes aligned
22113 TSIMEND
0117E0 22114+ LTORG
0117E0 00000458 22115 =A(SAVETST)
PAGE 405
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0117E4 075BCD15 22116 =F'123456789'
117E8 22117+T401TEND EQU *
22118 *
22119 * Test 402 -- PACK m,m (5d) --------------------------------
22120 *
22121 TSIMBEG T402,6000,20,1,C'PACK m,m (5d)'
22122+*
003704 22123+TDSCDAT CSECT
003708 22124+ DS 0D
22125+*
003708 000117E8 22126+T402TDSC DC A(T402) // TENTRY
00370C 000000B4 22127+ DC A(T402TEND-T402) // TLENGTH
003710 00001770 22128+ DC F'6000' // TLRCNT
003714 00000014 22129+ DC F'20' // TIGCNT
003718 00000001 22130+ DC F'1' // TLTYPE
001907 22131+TEXT CSECT
001907 E3F4F0F2 22132+SPTR1929 DC C'T402'
00371C 22133+TDSCDAT CSECT
00371C 22134+ DS 0F
00371C 04001907 22135+ DC AL1(L'SPTR1929),AL3(SPTR1929)
00190B 22136+TEXT CSECT
00190B D7C1C3D240946B94 22137+SPTR1930 DC C'PACK m,m (5d)'
003720 22138+TDSCDAT CSECT
003720 22139+ DS 0F
003720 0D00190B 22140+ DC AL1(L'SPTR1930),AL3(SPTR1930)
22141+*
004C0C 22142+TDSCTBL CSECT
04C0C 22143+T402TPTR EQU *
004C0C 00003708 22144+ DC A(T402TDSC) enabled test
22145+*
0117E8 22146+TCODE CSECT
0117E8 22147+ DS 0D ensure double word alignment for test
0117E8 22148+T402 DS 0H 01650000
0117E8 90EC D00C 0000C 22149+ STM 14,12,12(13) SAVE REGISTERS 02950000
0117EC 18CF 22150+ LR R12,R15 base register := entry address
117E8 22151+ USING T402,R12 declare code base register
0117EE 41B0 C01E 11806 22152+ LA R11,T402L load loop target to R11
0117F2 58F0 C0B0 11898 22153+ L R15,=A(SAVETST) R15 := current save area
0117F6 50DF 0004 00004 22154+ ST R13,4(R15) set back pointer in current save area
0117FA 182D 22155+ LR R2,R13 remember callers save area
0117FC 18DF 22156+ LR R13,R15 setup current save area
0117FE 50D2 0008 00008 22157+ ST R13,8(R2) set forw pointer in callers save area
00000 22158+ USING TDSC,R1 declare TDSC base register
011802 58F0 1008 00008 22159+ L R15,TLRCNT load local repeat count to R15
22160+*
22161 *
22162 T402L REPINS PACK,(T402V1,T402V2) repeat: PACK T402V1,T402V2
22163+*
22164+* build from sublist &ALIST a comma separated string &ARGS
22165+*
22166+*
22167+*
22168+*
22169+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
22170+* this allows to transfer the repeat count from last TDSCGEN call
PAGE 406
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
22171+*
22172+*
11806 22173+T402L EQU *
22174+*
22175+* write a comment indicating what REPINS does (in case NOGEN in effect)
22176+*
22177+*,// REPINS: do 20 times:
22178+*
22179+* MNOTE requires that ' is doubled for expanded variables
22180+* thus build &MASTR as a copy of '&ARGS with ' doubled
22181+*
22182+*
22183+*,// PACK T402V1,T402V2
22184+*
22185+* finally generate code: &ICNT copies of &CODE &ARGS
22186+*
011806 F225 C0A6 C0A9 1188E 11891 22187+ PACK T402V1,T402V2
01180C F225 C0A6 C0A9 1188E 11891 22188+ PACK T402V1,T402V2
011812 F225 C0A6 C0A9 1188E 11891 22189+ PACK T402V1,T402V2
011818 F225 C0A6 C0A9 1188E 11891 22190+ PACK T402V1,T402V2
01181E F225 C0A6 C0A9 1188E 11891 22191+ PACK T402V1,T402V2
011824 F225 C0A6 C0A9 1188E 11891 22192+ PACK T402V1,T402V2
01182A F225 C0A6 C0A9 1188E 11891 22193+ PACK T402V1,T402V2
011830 F225 C0A6 C0A9 1188E 11891 22194+ PACK T402V1,T402V2
011836 F225 C0A6 C0A9 1188E 11891 22195+ PACK T402V1,T402V2
01183C F225 C0A6 C0A9 1188E 11891 22196+ PACK T402V1,T402V2
011842 F225 C0A6 C0A9 1188E 11891 22197+ PACK T402V1,T402V2
011848 F225 C0A6 C0A9 1188E 11891 22198+ PACK T402V1,T402V2
01184E F225 C0A6 C0A9 1188E 11891 22199+ PACK T402V1,T402V2
011854 F225 C0A6 C0A9 1188E 11891 22200+ PACK T402V1,T402V2
01185A F225 C0A6 C0A9 1188E 11891 22201+ PACK T402V1,T402V2
011860 F225 C0A6 C0A9 1188E 11891 22202+ PACK T402V1,T402V2
011866 F225 C0A6 C0A9 1188E 11891 22203+ PACK T402V1,T402V2
01186C F225 C0A6 C0A9 1188E 11891 22204+ PACK T402V1,T402V2
011872 F225 C0A6 C0A9 1188E 11891 22205+ PACK T402V1,T402V2
011878 F225 C0A6 C0A9 1188E 11891 22206+ PACK T402V1,T402V2
22207+*
01187E 06FB 22208 BCTR R15,R11
22209 TSIMRET
011880 58F0 C0B0 11898 22210+ L R15,=A(SAVETST) R15 := current save area
011884 58DF 0004 00004 22211+ L R13,4(R15) get old save area back
011888 98EC D00C 0000C 22212+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01188C 07FE 22213+ BR 14 RETURN 02000000
22214 *
01188E 00000C 22215 T402V1 DC PL3'0'
011891 F0F1F2F3F4C5 22216 T402V2 DC ZL6'12345'
22217 TSIMEND
011898 22218+ LTORG
011898 00000458 22219 =A(SAVETST)
1189C 22220+T402TEND EQU *
22221 *
22222 * Test 403 -- PACK m,m (15d) -------------------------------
22223 *
22224 TSIMBEG T403,2500,20,1,C'PACK m,m (15d)'
22225+*
PAGE 407
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003724 22226+TDSCDAT CSECT
003728 22227+ DS 0D
22228+*
003728 000118A0 22229+T403TDSC DC A(T403) // TENTRY
00372C 000000C4 22230+ DC A(T403TEND-T403) // TLENGTH
003730 000009C4 22231+ DC F'2500' // TLRCNT
003734 00000014 22232+ DC F'20' // TIGCNT
003738 00000001 22233+ DC F'1' // TLTYPE
001918 22234+TEXT CSECT
001918 E3F4F0F3 22235+SPTR1941 DC C'T403'
00373C 22236+TDSCDAT CSECT
00373C 22237+ DS 0F
00373C 04001918 22238+ DC AL1(L'SPTR1941),AL3(SPTR1941)
00191C 22239+TEXT CSECT
00191C D7C1C3D240946B94 22240+SPTR1942 DC C'PACK m,m (15d)'
003740 22241+TDSCDAT CSECT
003740 22242+ DS 0F
003740 0E00191C 22243+ DC AL1(L'SPTR1942),AL3(SPTR1942)
22244+*
004C10 22245+TDSCTBL CSECT
04C10 22246+T403TPTR EQU *
004C10 00003728 22247+ DC A(T403TDSC) enabled test
22248+*
01189C 22249+TCODE CSECT
0118A0 22250+ DS 0D ensure double word alignment for test
0118A0 22251+T403 DS 0H 01650000
0118A0 90EC D00C 0000C 22252+ STM 14,12,12(13) SAVE REGISTERS 02950000
0118A4 18CF 22253+ LR R12,R15 base register := entry address
118A0 22254+ USING T403,R12 declare code base register
0118A6 41B0 C01E 118BE 22255+ LA R11,T403L load loop target to R11
0118AA 58F0 C0C0 11960 22256+ L R15,=A(SAVETST) R15 := current save area
0118AE 50DF 0004 00004 22257+ ST R13,4(R15) set back pointer in current save area
0118B2 182D 22258+ LR R2,R13 remember callers save area
0118B4 18DF 22259+ LR R13,R15 setup current save area
0118B6 50D2 0008 00008 22260+ ST R13,8(R2) set forw pointer in callers save area
00000 22261+ USING TDSC,R1 declare TDSC base register
0118BA 58F0 1008 00008 22262+ L R15,TLRCNT load local repeat count to R15
22263+*
22264 *
22265 T403L REPINS PACK,(T403V1,T403V2) repeat: PACK T403V1,T403V2
22266+*
22267+* build from sublist &ALIST a comma separated string &ARGS
22268+*
22269+*
22270+*
22271+*
22272+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
22273+* this allows to transfer the repeat count from last TDSCGEN call
22274+*
22275+*
118BE 22276+T403L EQU *
22277+*
22278+* write a comment indicating what REPINS does (in case NOGEN in effect)
22279+*
22280+*,// REPINS: do 20 times:
PAGE 408
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
22281+*
22282+* MNOTE requires that ' is doubled for expanded variables
22283+* thus build &MASTR as a copy of '&ARGS with ' doubled
22284+*
22285+*
22286+*,// PACK T403V1,T403V2
22287+*
22288+* finally generate code: &ICNT copies of &CODE &ARGS
22289+*
0118BE F27F C0A6 C0AE 11946 1194E 22290+ PACK T403V1,T403V2
0118C4 F27F C0A6 C0AE 11946 1194E 22291+ PACK T403V1,T403V2
0118CA F27F C0A6 C0AE 11946 1194E 22292+ PACK T403V1,T403V2
0118D0 F27F C0A6 C0AE 11946 1194E 22293+ PACK T403V1,T403V2
0118D6 F27F C0A6 C0AE 11946 1194E 22294+ PACK T403V1,T403V2
0118DC F27F C0A6 C0AE 11946 1194E 22295+ PACK T403V1,T403V2
0118E2 F27F C0A6 C0AE 11946 1194E 22296+ PACK T403V1,T403V2
0118E8 F27F C0A6 C0AE 11946 1194E 22297+ PACK T403V1,T403V2
0118EE F27F C0A6 C0AE 11946 1194E 22298+ PACK T403V1,T403V2
0118F4 F27F C0A6 C0AE 11946 1194E 22299+ PACK T403V1,T403V2
0118FA F27F C0A6 C0AE 11946 1194E 22300+ PACK T403V1,T403V2
011900 F27F C0A6 C0AE 11946 1194E 22301+ PACK T403V1,T403V2
011906 F27F C0A6 C0AE 11946 1194E 22302+ PACK T403V1,T403V2
01190C F27F C0A6 C0AE 11946 1194E 22303+ PACK T403V1,T403V2
011912 F27F C0A6 C0AE 11946 1194E 22304+ PACK T403V1,T403V2
011918 F27F C0A6 C0AE 11946 1194E 22305+ PACK T403V1,T403V2
01191E F27F C0A6 C0AE 11946 1194E 22306+ PACK T403V1,T403V2
011924 F27F C0A6 C0AE 11946 1194E 22307+ PACK T403V1,T403V2
01192A F27F C0A6 C0AE 11946 1194E 22308+ PACK T403V1,T403V2
011930 F27F C0A6 C0AE 11946 1194E 22309+ PACK T403V1,T403V2
22310+*
011936 06FB 22311 BCTR R15,R11
22312 TSIMRET
011938 58F0 C0C0 11960 22313+ L R15,=A(SAVETST) R15 := current save area
01193C 58DF 0004 00004 22314+ L R13,4(R15) get old save area back
011940 98EC D00C 0000C 22315+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
011944 07FE 22316+ BR 14 RETURN 02000000
22317 *
011946 000000000000000C 22318 T403V1 DC PL8'0'
01194E F0F1F2F3F4F5F6F7 22319 T403V2 DC ZL16'123456789012345'
22320 TSIMEND
011960 22321+ LTORG
011960 00000458 22322 =A(SAVETST)
11964 22323+T403TEND EQU *
22324 *
22325 * Test 404 -- UNPK m,m (5d) --------------------------------
22326 *
22327 TSIMBEG T404,6000,20,1,C'UNPK m,m (5d)'
22328+*
003744 22329+TDSCDAT CSECT
003748 22330+ DS 0D
22331+*
003748 00011968 22332+T404TDSC DC A(T404) // TENTRY
00374C 000000B4 22333+ DC A(T404TEND-T404) // TLENGTH
003750 00001770 22334+ DC F'6000' // TLRCNT
003754 00000014 22335+ DC F'20' // TIGCNT
PAGE 409
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003758 00000001 22336+ DC F'1' // TLTYPE
00192A 22337+TEXT CSECT
00192A E3F4F0F4 22338+SPTR1953 DC C'T404'
00375C 22339+TDSCDAT CSECT
00375C 22340+ DS 0F
00375C 0400192A 22341+ DC AL1(L'SPTR1953),AL3(SPTR1953)
00192E 22342+TEXT CSECT
00192E E4D5D7D240946B94 22343+SPTR1954 DC C'UNPK m,m (5d)'
003760 22344+TDSCDAT CSECT
003760 22345+ DS 0F
003760 0D00192E 22346+ DC AL1(L'SPTR1954),AL3(SPTR1954)
22347+*
004C14 22348+TDSCTBL CSECT
04C14 22349+T404TPTR EQU *
004C14 00003748 22350+ DC A(T404TDSC) enabled test
22351+*
011964 22352+TCODE CSECT
011968 22353+ DS 0D ensure double word alignment for test
011968 22354+T404 DS 0H 01650000
011968 90EC D00C 0000C 22355+ STM 14,12,12(13) SAVE REGISTERS 02950000
01196C 18CF 22356+ LR R12,R15 base register := entry address
11968 22357+ USING T404,R12 declare code base register
01196E 41B0 C01E 11986 22358+ LA R11,T404L load loop target to R11
011972 58F0 C0B0 11A18 22359+ L R15,=A(SAVETST) R15 := current save area
011976 50DF 0004 00004 22360+ ST R13,4(R15) set back pointer in current save area
01197A 182D 22361+ LR R2,R13 remember callers save area
01197C 18DF 22362+ LR R13,R15 setup current save area
01197E 50D2 0008 00008 22363+ ST R13,8(R2) set forw pointer in callers save area
00000 22364+ USING TDSC,R1 declare TDSC base register
011982 58F0 1008 00008 22365+ L R15,TLRCNT load local repeat count to R15
22366+*
22367 *
22368 T404L REPINS UNPK,(T404V1,T404V2) repeat: UNPK T404V1,T404V2
22369+*
22370+* build from sublist &ALIST a comma separated string &ARGS
22371+*
22372+*
22373+*
22374+*
22375+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
22376+* this allows to transfer the repeat count from last TDSCGEN call
22377+*
22378+*
11986 22379+T404L EQU *
22380+*
22381+* write a comment indicating what REPINS does (in case NOGEN in effect)
22382+*
22383+*,// REPINS: do 20 times:
22384+*
22385+* MNOTE requires that ' is doubled for expanded variables
22386+* thus build &MASTR as a copy of '&ARGS with ' doubled
22387+*
22388+*
22389+*,// UNPK T404V1,T404V2
22390+*
PAGE 410
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
22391+* finally generate code: &ICNT copies of &CODE &ARGS
22392+*
011986 F352 C0A6 C0AC 11A0E 11A14 22393+ UNPK T404V1,T404V2
01198C F352 C0A6 C0AC 11A0E 11A14 22394+ UNPK T404V1,T404V2
011992 F352 C0A6 C0AC 11A0E 11A14 22395+ UNPK T404V1,T404V2
011998 F352 C0A6 C0AC 11A0E 11A14 22396+ UNPK T404V1,T404V2
01199E F352 C0A6 C0AC 11A0E 11A14 22397+ UNPK T404V1,T404V2
0119A4 F352 C0A6 C0AC 11A0E 11A14 22398+ UNPK T404V1,T404V2
0119AA F352 C0A6 C0AC 11A0E 11A14 22399+ UNPK T404V1,T404V2
0119B0 F352 C0A6 C0AC 11A0E 11A14 22400+ UNPK T404V1,T404V2
0119B6 F352 C0A6 C0AC 11A0E 11A14 22401+ UNPK T404V1,T404V2
0119BC F352 C0A6 C0AC 11A0E 11A14 22402+ UNPK T404V1,T404V2
0119C2 F352 C0A6 C0AC 11A0E 11A14 22403+ UNPK T404V1,T404V2
0119C8 F352 C0A6 C0AC 11A0E 11A14 22404+ UNPK T404V1,T404V2
0119CE F352 C0A6 C0AC 11A0E 11A14 22405+ UNPK T404V1,T404V2
0119D4 F352 C0A6 C0AC 11A0E 11A14 22406+ UNPK T404V1,T404V2
0119DA F352 C0A6 C0AC 11A0E 11A14 22407+ UNPK T404V1,T404V2
0119E0 F352 C0A6 C0AC 11A0E 11A14 22408+ UNPK T404V1,T404V2
0119E6 F352 C0A6 C0AC 11A0E 11A14 22409+ UNPK T404V1,T404V2
0119EC F352 C0A6 C0AC 11A0E 11A14 22410+ UNPK T404V1,T404V2
0119F2 F352 C0A6 C0AC 11A0E 11A14 22411+ UNPK T404V1,T404V2
0119F8 F352 C0A6 C0AC 11A0E 11A14 22412+ UNPK T404V1,T404V2
22413+*
0119FE 06FB 22414 BCTR R15,R11
22415 TSIMRET
011A00 58F0 C0B0 11A18 22416+ L R15,=A(SAVETST) R15 := current save area
011A04 58DF 0004 00004 22417+ L R13,4(R15) get old save area back
011A08 98EC D00C 0000C 22418+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
011A0C 07FE 22419+ BR 14 RETURN 02000000
22420 *
011A0E F0F0F0F0F0C0 22421 T404V1 DC ZL6'0'
011A14 12345C 22422 T404V2 DC PL3'12345'
22423 TSIMEND
011A18 22424+ LTORG
011A18 00000458 22425 =A(SAVETST)
11A1C 22426+T404TEND EQU *
22427 *
22428 * Test 405 -- UNPK m,m (15d) -------------------------------
22429 *
22430 TSIMBEG T405,2500,20,1,C'UNPK m,m (15d)'
22431+*
003764 22432+TDSCDAT CSECT
003768 22433+ DS 0D
22434+*
003768 00011A20 22435+T405TDSC DC A(T405) // TENTRY
00376C 000000C4 22436+ DC A(T405TEND-T405) // TLENGTH
003770 000009C4 22437+ DC F'2500' // TLRCNT
003774 00000014 22438+ DC F'20' // TIGCNT
003778 00000001 22439+ DC F'1' // TLTYPE
00193B 22440+TEXT CSECT
00193B E3F4F0F5 22441+SPTR1965 DC C'T405'
00377C 22442+TDSCDAT CSECT
00377C 22443+ DS 0F
00377C 0400193B 22444+ DC AL1(L'SPTR1965),AL3(SPTR1965)
00193F 22445+TEXT CSECT
PAGE 411
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00193F E4D5D7D240946B94 22446+SPTR1966 DC C'UNPK m,m (15d)'
003780 22447+TDSCDAT CSECT
003780 22448+ DS 0F
003780 0E00193F 22449+ DC AL1(L'SPTR1966),AL3(SPTR1966)
22450+*
004C18 22451+TDSCTBL CSECT
04C18 22452+T405TPTR EQU *
004C18 00003768 22453+ DC A(T405TDSC) enabled test
22454+*
011A1C 22455+TCODE CSECT
011A20 22456+ DS 0D ensure double word alignment for test
011A20 22457+T405 DS 0H 01650000
011A20 90EC D00C 0000C 22458+ STM 14,12,12(13) SAVE REGISTERS 02950000
011A24 18CF 22459+ LR R12,R15 base register := entry address
11A20 22460+ USING T405,R12 declare code base register
011A26 41B0 C01E 11A3E 22461+ LA R11,T405L load loop target to R11
011A2A 58F0 C0C0 11AE0 22462+ L R15,=A(SAVETST) R15 := current save area
011A2E 50DF 0004 00004 22463+ ST R13,4(R15) set back pointer in current save area
011A32 182D 22464+ LR R2,R13 remember callers save area
011A34 18DF 22465+ LR R13,R15 setup current save area
011A36 50D2 0008 00008 22466+ ST R13,8(R2) set forw pointer in callers save area
00000 22467+ USING TDSC,R1 declare TDSC base register
011A3A 58F0 1008 00008 22468+ L R15,TLRCNT load local repeat count to R15
22469+*
22470 *
22471 T405L REPINS UNPK,(T405V1,T405V2) repeat: UNPK T405V1,T405V2
22472+*
22473+* build from sublist &ALIST a comma separated string &ARGS
22474+*
22475+*
22476+*
22477+*
22478+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
22479+* this allows to transfer the repeat count from last TDSCGEN call
22480+*
22481+*
11A3E 22482+T405L EQU *
22483+*
22484+* write a comment indicating what REPINS does (in case NOGEN in effect)
22485+*
22486+*,// REPINS: do 20 times:
22487+*
22488+* MNOTE requires that ' is doubled for expanded variables
22489+* thus build &MASTR as a copy of '&ARGS with ' doubled
22490+*
22491+*
22492+*,// UNPK T405V1,T405V2
22493+*
22494+* finally generate code: &ICNT copies of &CODE &ARGS
22495+*
011A3E F3F7 C0A6 C0B6 11AC6 11AD6 22496+ UNPK T405V1,T405V2
011A44 F3F7 C0A6 C0B6 11AC6 11AD6 22497+ UNPK T405V1,T405V2
011A4A F3F7 C0A6 C0B6 11AC6 11AD6 22498+ UNPK T405V1,T405V2
011A50 F3F7 C0A6 C0B6 11AC6 11AD6 22499+ UNPK T405V1,T405V2
011A56 F3F7 C0A6 C0B6 11AC6 11AD6 22500+ UNPK T405V1,T405V2
PAGE 412
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
011A5C F3F7 C0A6 C0B6 11AC6 11AD6 22501+ UNPK T405V1,T405V2
011A62 F3F7 C0A6 C0B6 11AC6 11AD6 22502+ UNPK T405V1,T405V2
011A68 F3F7 C0A6 C0B6 11AC6 11AD6 22503+ UNPK T405V1,T405V2
011A6E F3F7 C0A6 C0B6 11AC6 11AD6 22504+ UNPK T405V1,T405V2
011A74 F3F7 C0A6 C0B6 11AC6 11AD6 22505+ UNPK T405V1,T405V2
011A7A F3F7 C0A6 C0B6 11AC6 11AD6 22506+ UNPK T405V1,T405V2
011A80 F3F7 C0A6 C0B6 11AC6 11AD6 22507+ UNPK T405V1,T405V2
011A86 F3F7 C0A6 C0B6 11AC6 11AD6 22508+ UNPK T405V1,T405V2
011A8C F3F7 C0A6 C0B6 11AC6 11AD6 22509+ UNPK T405V1,T405V2
011A92 F3F7 C0A6 C0B6 11AC6 11AD6 22510+ UNPK T405V1,T405V2
011A98 F3F7 C0A6 C0B6 11AC6 11AD6 22511+ UNPK T405V1,T405V2
011A9E F3F7 C0A6 C0B6 11AC6 11AD6 22512+ UNPK T405V1,T405V2
011AA4 F3F7 C0A6 C0B6 11AC6 11AD6 22513+ UNPK T405V1,T405V2
011AAA F3F7 C0A6 C0B6 11AC6 11AD6 22514+ UNPK T405V1,T405V2
011AB0 F3F7 C0A6 C0B6 11AC6 11AD6 22515+ UNPK T405V1,T405V2
22516+*
011AB6 06FB 22517 BCTR R15,R11
22518 TSIMRET
011AB8 58F0 C0C0 11AE0 22519+ L R15,=A(SAVETST) R15 := current save area
011ABC 58DF 0004 00004 22520+ L R13,4(R15) get old save area back
011AC0 98EC D00C 0000C 22521+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
011AC4 07FE 22522+ BR 14 RETURN 02000000
22523 *
011AC6 F0F0F0F0F0F0F0F0 22524 T405V1 DC ZL16'0'
011AD6 123456789012345C 22525 T405V2 DC PL8'123456789012345'
22526 TSIMEND
011AE0 22527+ LTORG
011AE0 00000458 22528 =A(SAVETST)
11AE4 22529+T405TEND EQU *
22530 *
22531 * Test 41x -- edit =========================================
22532 *
22533 * Test 410 -- MVC;ED (10c) ---------------------------------
22534 *
22535 TSIMBEG T410,3300,10,1,C'MVC;ED (10c)'
22536+*
003784 22537+TDSCDAT CSECT
003788 22538+ DS 0D
22539+*
003788 00011AE8 22540+T410TDSC DC A(T410) // TENTRY
00378C 000000E0 22541+ DC A(T410TEND-T410) // TLENGTH
003790 00000CE4 22542+ DC F'3300' // TLRCNT
003794 0000000A 22543+ DC F'10' // TIGCNT
003798 00000001 22544+ DC F'1' // TLTYPE
00194D 22545+TEXT CSECT
00194D E3F4F1F0 22546+SPTR1977 DC C'T410'
00379C 22547+TDSCDAT CSECT
00379C 22548+ DS 0F
00379C 0400194D 22549+ DC AL1(L'SPTR1977),AL3(SPTR1977)
001951 22550+TEXT CSECT
001951 D4E5C35EC5C4404D 22551+SPTR1978 DC C'MVC;ED (10c)'
0037A0 22552+TDSCDAT CSECT
0037A0 22553+ DS 0F
0037A0 0C001951 22554+ DC AL1(L'SPTR1978),AL3(SPTR1978)
22555+*
PAGE 413
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004C1C 22556+TDSCTBL CSECT
04C1C 22557+T410TPTR EQU *
004C1C 00003788 22558+ DC A(T410TDSC) enabled test
22559+*
011AE4 22560+TCODE CSECT
011AE8 22561+ DS 0D ensure double word alignment for test
011AE8 22562+T410 DS 0H 01650000
011AE8 90EC D00C 0000C 22563+ STM 14,12,12(13) SAVE REGISTERS 02950000
011AEC 18CF 22564+ LR R12,R15 base register := entry address
11AE8 22565+ USING T410,R12 declare code base register
011AEE 41B0 C02A 11B12 22566+ LA R11,T410L load loop target to R11
011AF2 58F0 C0D8 11BC0 22567+ L R15,=A(SAVETST) R15 := current save area
011AF6 50DF 0004 00004 22568+ ST R13,4(R15) set back pointer in current save area
011AFA 182D 22569+ LR R2,R13 remember callers save area
011AFC 18DF 22570+ LR R13,R15 setup current save area
011AFE 50D2 0008 00008 22571+ ST R13,8(R2) set forw pointer in callers save area
00000 22572+ USING TDSC,R1 declare TDSC base register
011B02 58F0 1008 00008 22573+ L R15,TLRCNT load local repeat count to R15
22574+*
22575 *
22576 * use sequence
22577 * MVC 0(10,R3),T410V3 setup edit pattern
22578 * ED 0(10,R3),T410V1+3 and do it
22579 *
011B06 5820 C0DC 11BC4 22580 L R2,=F'123456789'
011B0A 4E20 C0B8 11BA0 22581 CVD R2,T410V1
011B0E 4130 C0C0 11BA8 22582 LA R3,T410V2 points to edit position
22583 *
22584 T410L REPINSN MVC,(0(10,R3),T410V3),ED,(0(10,R3),T410V1+3)
22585+*
22586+* build from sublist &ALIST* a comma separated string &ARGS*
22587+*
22588+*
22589+*
22590+*
22591+*
22592+*
11B12 22593+T410L EQU *
22594+*
22595+*
22596+* write a comment indicating what REPINSN does (if NOGEN in effect)
22597+*
22598+*,// REPINSN: do 10 times:
22599+*
22600+* MNOTE requires that ' is doubled for expanded variables
22601+* thus build &MASTR as a copy of '&ARGS with ' doubled
22602+*
22603+*
22604+*,// MVC 0(10,R3),T410V3
22605+*
22606+* MNOTE requires that ' is doubled for expanded variables
22607+* thus build &MASTR as a copy of '&ARGS with ' doubled
22608+*
22609+*
22610+*,// ED 0(10,R3),T410V1+3
PAGE 414
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
22611+*
22612+* finally generate code: &ICNT copies of &CO1 ...
22613+*
011B12 D209 3000 C0CA 00000 11BB2 22614+ MVC 0(10,R3),T410V3
011B18 DE09 3000 C0BB 00000 11BA3 22615+ ED 0(10,R3),T410V1+3
011B1E D209 3000 C0CA 00000 11BB2 22616+ MVC 0(10,R3),T410V3
011B24 DE09 3000 C0BB 00000 11BA3 22617+ ED 0(10,R3),T410V1+3
011B2A D209 3000 C0CA 00000 11BB2 22618+ MVC 0(10,R3),T410V3
011B30 DE09 3000 C0BB 00000 11BA3 22619+ ED 0(10,R3),T410V1+3
011B36 D209 3000 C0CA 00000 11BB2 22620+ MVC 0(10,R3),T410V3
011B3C DE09 3000 C0BB 00000 11BA3 22621+ ED 0(10,R3),T410V1+3
011B42 D209 3000 C0CA 00000 11BB2 22622+ MVC 0(10,R3),T410V3
011B48 DE09 3000 C0BB 00000 11BA3 22623+ ED 0(10,R3),T410V1+3
011B4E D209 3000 C0CA 00000 11BB2 22624+ MVC 0(10,R3),T410V3
011B54 DE09 3000 C0BB 00000 11BA3 22625+ ED 0(10,R3),T410V1+3
011B5A D209 3000 C0CA 00000 11BB2 22626+ MVC 0(10,R3),T410V3
011B60 DE09 3000 C0BB 00000 11BA3 22627+ ED 0(10,R3),T410V1+3
011B66 D209 3000 C0CA 00000 11BB2 22628+ MVC 0(10,R3),T410V3
011B6C DE09 3000 C0BB 00000 11BA3 22629+ ED 0(10,R3),T410V1+3
011B72 D209 3000 C0CA 00000 11BB2 22630+ MVC 0(10,R3),T410V3
011B78 DE09 3000 C0BB 00000 11BA3 22631+ ED 0(10,R3),T410V1+3
011B7E D209 3000 C0CA 00000 11BB2 22632+ MVC 0(10,R3),T410V3
011B84 DE09 3000 C0BB 00000 11BA3 22633+ ED 0(10,R3),T410V1+3
22634+*
011B8A 06FB 22635 BCTR R15,R11
22636 TSIMRET
011B8C 58F0 C0D8 11BC0 22637+ L R15,=A(SAVETST) R15 := current save area
011B90 58DF 0004 00004 22638+ L R13,4(R15) get old save area back
011B94 98EC D00C 0000C 22639+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
011B98 07FE 22640+ BR 14 RETURN 02000000
22641 *
011BA0 22642 T410V1 DS 1D
011BA8 22643 T410V2 DS 10C
011BB2 4020202020202020 22644 T410V3 DC C' ',7X'20',X'21',X'20'
22645 TSIMEND
011BC0 22646+ LTORG
011BC0 00000458 22647 =A(SAVETST)
011BC4 075BCD15 22648 =F'123456789'
11BC8 22649+T410TEND EQU *
22650 *
22651 * Test 411 -- MVC;ED (30c) ---------------------------------
22652 *
22653 TSIMBEG T411,1200,10,1,C'MVC;ED (30c)'
22654+*
0037A4 22655+TDSCDAT CSECT
0037A8 22656+ DS 0D
22657+*
0037A8 00011BC8 22658+T411TDSC DC A(T411) // TENTRY
0037AC 000000FC 22659+ DC A(T411TEND-T411) // TLENGTH
0037B0 000004B0 22660+ DC F'1200' // TLRCNT
0037B4 0000000A 22661+ DC F'10' // TIGCNT
0037B8 00000001 22662+ DC F'1' // TLTYPE
00195D 22663+TEXT CSECT
00195D E3F4F1F1 22664+SPTR1991 DC C'T411'
0037BC 22665+TDSCDAT CSECT
PAGE 415
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0037BC 22666+ DS 0F
0037BC 0400195D 22667+ DC AL1(L'SPTR1991),AL3(SPTR1991)
001961 22668+TEXT CSECT
001961 D4E5C35EC5C4404D 22669+SPTR1992 DC C'MVC;ED (30c)'
0037C0 22670+TDSCDAT CSECT
0037C0 22671+ DS 0F
0037C0 0C001961 22672+ DC AL1(L'SPTR1992),AL3(SPTR1992)
22673+*
004C20 22674+TDSCTBL CSECT
04C20 22675+T411TPTR EQU *
004C20 000037A8 22676+ DC A(T411TDSC) enabled test
22677+*
011BC8 22678+TCODE CSECT
011BC8 22679+ DS 0D ensure double word alignment for test
011BC8 22680+T411 DS 0H 01650000
011BC8 90EC D00C 0000C 22681+ STM 14,12,12(13) SAVE REGISTERS 02950000
011BCC 18CF 22682+ LR R12,R15 base register := entry address
11BC8 22683+ USING T411,R12 declare code base register
011BCE 41B0 C022 11BEA 22684+ LA R11,T411L load loop target to R11
011BD2 58F0 C0F8 11CC0 22685+ L R15,=A(SAVETST) R15 := current save area
011BD6 50DF 0004 00004 22686+ ST R13,4(R15) set back pointer in current save area
011BDA 182D 22687+ LR R2,R13 remember callers save area
011BDC 18DF 22688+ LR R13,R15 setup current save area
011BDE 50D2 0008 00008 22689+ ST R13,8(R2) set forw pointer in callers save area
00000 22690+ USING TDSC,R1 declare TDSC base register
011BE2 58F0 1008 00008 22691+ L R15,TLRCNT load local repeat count to R15
22692+*
22693 *
22694 * use sequence
22695 * MVC 0(30,R3),T411V3 setup edit pattern
22696 * ED 0(30,R3),T411V1 and do it
22697 *
011BE6 4130 C0B9 11C81 22698 LA R3,T411V2 points to edit position
22699 *
22700 T411L REPINSN MVC,(0(30,R3),T411V3),ED,(0(30,R3),T411V1)
22701+*
22702+* build from sublist &ALIST* a comma separated string &ARGS*
22703+*
22704+*
22705+*
22706+*
22707+*
22708+*
11BEA 22709+T411L EQU *
22710+*
22711+*
22712+* write a comment indicating what REPINSN does (if NOGEN in effect)
22713+*
22714+*,// REPINSN: do 10 times:
22715+*
22716+* MNOTE requires that ' is doubled for expanded variables
22717+* thus build &MASTR as a copy of '&ARGS with ' doubled
22718+*
22719+*
22720+*,// MVC 0(30,R3),T411V3
PAGE 416
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
22721+*
22722+* MNOTE requires that ' is doubled for expanded variables
22723+* thus build &MASTR as a copy of '&ARGS with ' doubled
22724+*
22725+*
22726+*,// ED 0(30,R3),T411V1
22727+*
22728+* finally generate code: &ICNT copies of &CO1 ...
22729+*
011BEA D21D 3000 C0D7 00000 11C9F 22730+ MVC 0(30,R3),T411V3
011BF0 DE1D 3000 C0AA 00000 11C72 22731+ ED 0(30,R3),T411V1
011BF6 D21D 3000 C0D7 00000 11C9F 22732+ MVC 0(30,R3),T411V3
011BFC DE1D 3000 C0AA 00000 11C72 22733+ ED 0(30,R3),T411V1
011C02 D21D 3000 C0D7 00000 11C9F 22734+ MVC 0(30,R3),T411V3
011C08 DE1D 3000 C0AA 00000 11C72 22735+ ED 0(30,R3),T411V1
011C0E D21D 3000 C0D7 00000 11C9F 22736+ MVC 0(30,R3),T411V3
011C14 DE1D 3000 C0AA 00000 11C72 22737+ ED 0(30,R3),T411V1
011C1A D21D 3000 C0D7 00000 11C9F 22738+ MVC 0(30,R3),T411V3
011C20 DE1D 3000 C0AA 00000 11C72 22739+ ED 0(30,R3),T411V1
011C26 D21D 3000 C0D7 00000 11C9F 22740+ MVC 0(30,R3),T411V3
011C2C DE1D 3000 C0AA 00000 11C72 22741+ ED 0(30,R3),T411V1
011C32 D21D 3000 C0D7 00000 11C9F 22742+ MVC 0(30,R3),T411V3
011C38 DE1D 3000 C0AA 00000 11C72 22743+ ED 0(30,R3),T411V1
011C3E D21D 3000 C0D7 00000 11C9F 22744+ MVC 0(30,R3),T411V3
011C44 DE1D 3000 C0AA 00000 11C72 22745+ ED 0(30,R3),T411V1
011C4A D21D 3000 C0D7 00000 11C9F 22746+ MVC 0(30,R3),T411V3
011C50 DE1D 3000 C0AA 00000 11C72 22747+ ED 0(30,R3),T411V1
011C56 D21D 3000 C0D7 00000 11C9F 22748+ MVC 0(30,R3),T411V3
011C5C DE1D 3000 C0AA 00000 11C72 22749+ ED 0(30,R3),T411V1
22750+*
011C62 06FB 22751 BCTR R15,R11
22752 TSIMRET
011C64 58F0 C0F8 11CC0 22753+ L R15,=A(SAVETST) R15 := current save area
011C68 58DF 0004 00004 22754+ L R13,4(R15) get old save area back
011C6C 98EC D00C 0000C 22755+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
011C70 07FE 22756+ BR 14 RETURN 02000000
22757 *
011C72 0123456789012345 22758 T411V1 DC PL15'1234567890123456789012345678'
011C81 22759 T411V2 DS 30C
011C9F 4020202020202020 22760 T411V3 DC C' ',27X'20',X'21',X'20'
22761 TSIMEND
011CC0 22762+ LTORG
011CC0 00000458 22763 =A(SAVETST)
11CC4 22764+T411TEND EQU *
22765 *
22766 * Test 415 -- MVC;EDMK (10c) -------------------------------
22767 *
22768 TSIMBEG T415,3300,10,1,C'MVC;EDMK (10c)'
22769+*
0037C4 22770+TDSCDAT CSECT
0037C8 22771+ DS 0D
22772+*
0037C8 00011CC8 22773+T415TDSC DC A(T415) // TENTRY
0037CC 000000E0 22774+ DC A(T415TEND-T415) // TLENGTH
0037D0 00000CE4 22775+ DC F'3300' // TLRCNT
PAGE 417
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0037D4 0000000A 22776+ DC F'10' // TIGCNT
0037D8 00000001 22777+ DC F'1' // TLTYPE
00196D 22778+TEXT CSECT
00196D E3F4F1F5 22779+SPTR2005 DC C'T415'
0037DC 22780+TDSCDAT CSECT
0037DC 22781+ DS 0F
0037DC 0400196D 22782+ DC AL1(L'SPTR2005),AL3(SPTR2005)
001971 22783+TEXT CSECT
001971 D4E5C35EC5C4D4D2 22784+SPTR2006 DC C'MVC;EDMK (10c)'
0037E0 22785+TDSCDAT CSECT
0037E0 22786+ DS 0F
0037E0 0E001971 22787+ DC AL1(L'SPTR2006),AL3(SPTR2006)
22788+*
004C24 22789+TDSCTBL CSECT
04C24 22790+T415TPTR EQU *
004C24 000037C8 22791+ DC A(T415TDSC) enabled test
22792+*
011CC4 22793+TCODE CSECT
011CC8 22794+ DS 0D ensure double word alignment for test
011CC8 22795+T415 DS 0H 01650000
011CC8 90EC D00C 0000C 22796+ STM 14,12,12(13) SAVE REGISTERS 02950000
011CCC 18CF 22797+ LR R12,R15 base register := entry address
11CC8 22798+ USING T415,R12 declare code base register
011CCE 41B0 C02A 11CF2 22799+ LA R11,T415L load loop target to R11
011CD2 58F0 C0D8 11DA0 22800+ L R15,=A(SAVETST) R15 := current save area
011CD6 50DF 0004 00004 22801+ ST R13,4(R15) set back pointer in current save area
011CDA 182D 22802+ LR R2,R13 remember callers save area
011CDC 18DF 22803+ LR R13,R15 setup current save area
011CDE 50D2 0008 00008 22804+ ST R13,8(R2) set forw pointer in callers save area
00000 22805+ USING TDSC,R1 declare TDSC base register
011CE2 58F0 1008 00008 22806+ L R15,TLRCNT load local repeat count to R15
22807+*
22808 *
22809 * use sequence
22810 * MVC 0(10,R3),T415V3 setup edit pattern
22811 * EDMK 0(10,R3),T415V1+3 and do it
22812 *
011CE6 5820 C0DC 11DA4 22813 L R2,=F'123456789'
011CEA 4E20 C0B8 11D80 22814 CVD R2,T415V1
011CEE 4130 C0C0 11D88 22815 LA R3,T415V2 points to edit position
22816 *
22817 T415L REPINSN MVC,(0(10,R3),T415V3),EDMK,(0(10,R3),T415V1+3)
22818+*
22819+* build from sublist &ALIST* a comma separated string &ARGS*
22820+*
22821+*
22822+*
22823+*
22824+*
22825+*
11CF2 22826+T415L EQU *
22827+*
22828+*
22829+* write a comment indicating what REPINSN does (if NOGEN in effect)
22830+*
PAGE 418
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
22831+*,// REPINSN: do 10 times:
22832+*
22833+* MNOTE requires that ' is doubled for expanded variables
22834+* thus build &MASTR as a copy of '&ARGS with ' doubled
22835+*
22836+*
22837+*,// MVC 0(10,R3),T415V3
22838+*
22839+* MNOTE requires that ' is doubled for expanded variables
22840+* thus build &MASTR as a copy of '&ARGS with ' doubled
22841+*
22842+*
22843+*,// EDMK 0(10,R3),T415V1+3
22844+*
22845+* finally generate code: &ICNT copies of &CO1 ...
22846+*
011CF2 D209 3000 C0CA 00000 11D92 22847+ MVC 0(10,R3),T415V3
011CF8 DF09 3000 C0BB 00000 11D83 22848+ EDMK 0(10,R3),T415V1+3
011CFE D209 3000 C0CA 00000 11D92 22849+ MVC 0(10,R3),T415V3
011D04 DF09 3000 C0BB 00000 11D83 22850+ EDMK 0(10,R3),T415V1+3
011D0A D209 3000 C0CA 00000 11D92 22851+ MVC 0(10,R3),T415V3
011D10 DF09 3000 C0BB 00000 11D83 22852+ EDMK 0(10,R3),T415V1+3
011D16 D209 3000 C0CA 00000 11D92 22853+ MVC 0(10,R3),T415V3
011D1C DF09 3000 C0BB 00000 11D83 22854+ EDMK 0(10,R3),T415V1+3
011D22 D209 3000 C0CA 00000 11D92 22855+ MVC 0(10,R3),T415V3
011D28 DF09 3000 C0BB 00000 11D83 22856+ EDMK 0(10,R3),T415V1+3
011D2E D209 3000 C0CA 00000 11D92 22857+ MVC 0(10,R3),T415V3
011D34 DF09 3000 C0BB 00000 11D83 22858+ EDMK 0(10,R3),T415V1+3
011D3A D209 3000 C0CA 00000 11D92 22859+ MVC 0(10,R3),T415V3
011D40 DF09 3000 C0BB 00000 11D83 22860+ EDMK 0(10,R3),T415V1+3
011D46 D209 3000 C0CA 00000 11D92 22861+ MVC 0(10,R3),T415V3
011D4C DF09 3000 C0BB 00000 11D83 22862+ EDMK 0(10,R3),T415V1+3
011D52 D209 3000 C0CA 00000 11D92 22863+ MVC 0(10,R3),T415V3
011D58 DF09 3000 C0BB 00000 11D83 22864+ EDMK 0(10,R3),T415V1+3
011D5E D209 3000 C0CA 00000 11D92 22865+ MVC 0(10,R3),T415V3
011D64 DF09 3000 C0BB 00000 11D83 22866+ EDMK 0(10,R3),T415V1+3
22867+*
011D6A 06FB 22868 BCTR R15,R11
22869 TSIMRET
011D6C 58F0 C0D8 11DA0 22870+ L R15,=A(SAVETST) R15 := current save area
011D70 58DF 0004 00004 22871+ L R13,4(R15) get old save area back
011D74 98EC D00C 0000C 22872+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
011D78 07FE 22873+ BR 14 RETURN 02000000
22874 *
011D80 22875 T415V1 DS 1D
011D88 22876 T415V2 DS 10C
011D92 4020202020202020 22877 T415V3 DC C' ',7X'20',X'21',X'20'
22878 TSIMEND
011DA0 22879+ LTORG
011DA0 00000458 22880 =A(SAVETST)
011DA4 075BCD15 22881 =F'123456789'
11DA8 22882+T415TEND EQU *
22883 *
22884 * Test 42x -- decimal add/mul/div ==========================
22885 *
PAGE 419
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
22886 * Test 420 -- AP m,m (10d) ---------------------------------
22887 *
22888 TSIMBEG T420,700,30,7,C'AP m,m (10d)'
22889+*
0037E4 22890+TDSCDAT CSECT
0037E8 22891+ DS 0D
22892+*
0037E8 00011DA8 22893+T420TDSC DC A(T420) // TENTRY
0037EC 000000FC 22894+ DC A(T420TEND-T420) // TLENGTH
0037F0 000002BC 22895+ DC F'700' // TLRCNT
0037F4 0000001E 22896+ DC F'30' // TIGCNT
0037F8 00000007 22897+ DC F'7' // TLTYPE
00197F 22898+TEXT CSECT
00197F E3F4F2F0 22899+SPTR2019 DC C'T420'
0037FC 22900+TDSCDAT CSECT
0037FC 22901+ DS 0F
0037FC 0400197F 22902+ DC AL1(L'SPTR2019),AL3(SPTR2019)
001983 22903+TEXT CSECT
001983 C1D740946B94404D 22904+SPTR2020 DC C'AP m,m (10d)'
003800 22905+TDSCDAT CSECT
003800 22906+ DS 0F
003800 0C001983 22907+ DC AL1(L'SPTR2020),AL3(SPTR2020)
22908+*
004C28 22909+TDSCTBL CSECT
04C28 22910+T420TPTR EQU *
004C28 000037E8 22911+ DC A(T420TDSC) enabled test
22912+*
011DA8 22913+TCODE CSECT
011DA8 22914+ DS 0D ensure double word alignment for test
011DA8 22915+T420 DS 0H 01650000
011DA8 90EC D00C 0000C 22916+ STM 14,12,12(13) SAVE REGISTERS 02950000
011DAC 18CF 22917+ LR R12,R15 base register := entry address
11DA8 22918+ USING T420,R12 declare code base register
011DAE 41B0 C01E 11DC6 22919+ LA R11,T420L load loop target to R11
011DB2 58F0 C0F8 11EA0 22920+ L R15,=A(SAVETST) R15 := current save area
011DB6 50DF 0004 00004 22921+ ST R13,4(R15) set back pointer in current save area
011DBA 182D 22922+ LR R2,R13 remember callers save area
011DBC 18DF 22923+ LR R13,R15 setup current save area
011DBE 50D2 0008 00008 22924+ ST R13,8(R2) set forw pointer in callers save area
00000 22925+ USING TDSC,R1 declare TDSC base register
011DC2 58F0 1008 00008 22926+ L R15,TLRCNT load local repeat count to R15
22927+*
22928 *
22929 * value range *-999999999: start at -999999999, add 66666660
22930 *
011DC6 D204 C0E8 C0F2 11E90 11E9A 22931 T420L MVC T420V1,T420V3
22932 REPINS AP,(T420V1,T420V2) repeat: AP T420V1,T420V2
22933+*
22934+* build from sublist &ALIST a comma separated string &ARGS
22935+*
22936+*
22937+*
22938+*
22939+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
22940+* this allows to transfer the repeat count from last TDSCGEN call
PAGE 420
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
22941+*
22942+*
22943+*
22944+* write a comment indicating what REPINS does (in case NOGEN in effect)
22945+*
22946+*,// REPINS: do 30 times:
22947+*
22948+* MNOTE requires that ' is doubled for expanded variables
22949+* thus build &MASTR as a copy of '&ARGS with ' doubled
22950+*
22951+*
22952+*,// AP T420V1,T420V2
22953+*
22954+* finally generate code: &ICNT copies of &CODE &ARGS
22955+*
011DCC FA44 C0E8 C0ED 11E90 11E95 22956+ AP T420V1,T420V2
011DD2 FA44 C0E8 C0ED 11E90 11E95 22957+ AP T420V1,T420V2
011DD8 FA44 C0E8 C0ED 11E90 11E95 22958+ AP T420V1,T420V2
011DDE FA44 C0E8 C0ED 11E90 11E95 22959+ AP T420V1,T420V2
011DE4 FA44 C0E8 C0ED 11E90 11E95 22960+ AP T420V1,T420V2
011DEA FA44 C0E8 C0ED 11E90 11E95 22961+ AP T420V1,T420V2
011DF0 FA44 C0E8 C0ED 11E90 11E95 22962+ AP T420V1,T420V2
011DF6 FA44 C0E8 C0ED 11E90 11E95 22963+ AP T420V1,T420V2
011DFC FA44 C0E8 C0ED 11E90 11E95 22964+ AP T420V1,T420V2
011E02 FA44 C0E8 C0ED 11E90 11E95 22965+ AP T420V1,T420V2
011E08 FA44 C0E8 C0ED 11E90 11E95 22966+ AP T420V1,T420V2
011E0E FA44 C0E8 C0ED 11E90 11E95 22967+ AP T420V1,T420V2
011E14 FA44 C0E8 C0ED 11E90 11E95 22968+ AP T420V1,T420V2
011E1A FA44 C0E8 C0ED 11E90 11E95 22969+ AP T420V1,T420V2
011E20 FA44 C0E8 C0ED 11E90 11E95 22970+ AP T420V1,T420V2
011E26 FA44 C0E8 C0ED 11E90 11E95 22971+ AP T420V1,T420V2
011E2C FA44 C0E8 C0ED 11E90 11E95 22972+ AP T420V1,T420V2
011E32 FA44 C0E8 C0ED 11E90 11E95 22973+ AP T420V1,T420V2
011E38 FA44 C0E8 C0ED 11E90 11E95 22974+ AP T420V1,T420V2
011E3E FA44 C0E8 C0ED 11E90 11E95 22975+ AP T420V1,T420V2
011E44 FA44 C0E8 C0ED 11E90 11E95 22976+ AP T420V1,T420V2
011E4A FA44 C0E8 C0ED 11E90 11E95 22977+ AP T420V1,T420V2
011E50 FA44 C0E8 C0ED 11E90 11E95 22978+ AP T420V1,T420V2
011E56 FA44 C0E8 C0ED 11E90 11E95 22979+ AP T420V1,T420V2
011E5C FA44 C0E8 C0ED 11E90 11E95 22980+ AP T420V1,T420V2
011E62 FA44 C0E8 C0ED 11E90 11E95 22981+ AP T420V1,T420V2
011E68 FA44 C0E8 C0ED 11E90 11E95 22982+ AP T420V1,T420V2
011E6E FA44 C0E8 C0ED 11E90 11E95 22983+ AP T420V1,T420V2
011E74 FA44 C0E8 C0ED 11E90 11E95 22984+ AP T420V1,T420V2
011E7A FA44 C0E8 C0ED 11E90 11E95 22985+ AP T420V1,T420V2
22986+*
011E80 06FB 22987 BCTR R15,R11
22988 TSIMRET
011E82 58F0 C0F8 11EA0 22989+ L R15,=A(SAVETST) R15 := current save area
011E86 58DF 0004 00004 22990+ L R13,4(R15) get old save area back
011E8A 98EC D00C 0000C 22991+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
011E8E 07FE 22992+ BR 14 RETURN 02000000
22993 *
011E90 000000000C 22994 T420V1 DC PL5'0' accululator
011E95 066666660C 22995 T420V2 DC PL5'66666660' increment value
PAGE 421
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
011E9A 999999999D 22996 T420V3 DC PL5'-999999999' initial value
22997 TSIMEND
011EA0 22998+ LTORG
011EA0 00000458 22999 =A(SAVETST)
11EA4 23000+T420TEND EQU *
23001 *
23002 * Test 421 -- AP m,m (30d) ---------------------------------
23003 *
23004 TSIMBEG T421,700,30,8,C'AP m,m (30d)'
23005+*
003804 23006+TDSCDAT CSECT
003808 23007+ DS 0D
23008+*
003808 00011EA8 23009+T421TDSC DC A(T421) // TENTRY
00380C 0000011C 23010+ DC A(T421TEND-T421) // TLENGTH
003810 000002BC 23011+ DC F'700' // TLRCNT
003814 0000001E 23012+ DC F'30' // TIGCNT
003818 00000008 23013+ DC F'8' // TLTYPE
00198F 23014+TEXT CSECT
00198F E3F4F2F1 23015+SPTR2031 DC C'T421'
00381C 23016+TDSCDAT CSECT
00381C 23017+ DS 0F
00381C 0400198F 23018+ DC AL1(L'SPTR2031),AL3(SPTR2031)
001993 23019+TEXT CSECT
001993 C1D740946B94404D 23020+SPTR2032 DC C'AP m,m (30d)'
003820 23021+TDSCDAT CSECT
003820 23022+ DS 0F
003820 0C001993 23023+ DC AL1(L'SPTR2032),AL3(SPTR2032)
23024+*
004C2C 23025+TDSCTBL CSECT
04C2C 23026+T421TPTR EQU *
004C2C 00003808 23027+ DC A(T421TDSC) enabled test
23028+*
011EA4 23029+TCODE CSECT
011EA8 23030+ DS 0D ensure double word alignment for test
011EA8 23031+T421 DS 0H 01650000
011EA8 90EC D00C 0000C 23032+ STM 14,12,12(13) SAVE REGISTERS 02950000
011EAC 18CF 23033+ LR R12,R15 base register := entry address
11EA8 23034+ USING T421,R12 declare code base register
011EAE 41B0 C01E 11EC6 23035+ LA R11,T421L load loop target to R11
011EB2 58F0 C118 11FC0 23036+ L R15,=A(SAVETST) R15 := current save area
011EB6 50DF 0004 00004 23037+ ST R13,4(R15) set back pointer in current save area
011EBA 182D 23038+ LR R2,R13 remember callers save area
011EBC 18DF 23039+ LR R13,R15 setup current save area
011EBE 50D2 0008 00008 23040+ ST R13,8(R2) set forw pointer in callers save area
00000 23041+ USING TDSC,R1 declare TDSC base register
011EC2 58F0 1008 00008 23042+ L R15,TLRCNT load local repeat count to R15
23043+*
23044 *
011EC6 D20E C0E8 C106 11F90 11FAE 23045 T421L MVC T421V1,T421V3
23046 REPINS AP,(T421V1,T421V2) repeat: AP T421V1,T421V2
23047+*
23048+* build from sublist &ALIST a comma separated string &ARGS
23049+*
23050+*
PAGE 422
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
23051+*
23052+*
23053+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
23054+* this allows to transfer the repeat count from last TDSCGEN call
23055+*
23056+*
23057+*
23058+* write a comment indicating what REPINS does (in case NOGEN in effect)
23059+*
23060+*,// REPINS: do 30 times:
23061+*
23062+* MNOTE requires that ' is doubled for expanded variables
23063+* thus build &MASTR as a copy of '&ARGS with ' doubled
23064+*
23065+*
23066+*,// AP T421V1,T421V2
23067+*
23068+* finally generate code: &ICNT copies of &CODE &ARGS
23069+*
011ECC FAEE C0E8 C0F7 11F90 11F9F 23070+ AP T421V1,T421V2
011ED2 FAEE C0E8 C0F7 11F90 11F9F 23071+ AP T421V1,T421V2
011ED8 FAEE C0E8 C0F7 11F90 11F9F 23072+ AP T421V1,T421V2
011EDE FAEE C0E8 C0F7 11F90 11F9F 23073+ AP T421V1,T421V2
011EE4 FAEE C0E8 C0F7 11F90 11F9F 23074+ AP T421V1,T421V2
011EEA FAEE C0E8 C0F7 11F90 11F9F 23075+ AP T421V1,T421V2
011EF0 FAEE C0E8 C0F7 11F90 11F9F 23076+ AP T421V1,T421V2
011EF6 FAEE C0E8 C0F7 11F90 11F9F 23077+ AP T421V1,T421V2
011EFC FAEE C0E8 C0F7 11F90 11F9F 23078+ AP T421V1,T421V2
011F02 FAEE C0E8 C0F7 11F90 11F9F 23079+ AP T421V1,T421V2
011F08 FAEE C0E8 C0F7 11F90 11F9F 23080+ AP T421V1,T421V2
011F0E FAEE C0E8 C0F7 11F90 11F9F 23081+ AP T421V1,T421V2
011F14 FAEE C0E8 C0F7 11F90 11F9F 23082+ AP T421V1,T421V2
011F1A FAEE C0E8 C0F7 11F90 11F9F 23083+ AP T421V1,T421V2
011F20 FAEE C0E8 C0F7 11F90 11F9F 23084+ AP T421V1,T421V2
011F26 FAEE C0E8 C0F7 11F90 11F9F 23085+ AP T421V1,T421V2
011F2C FAEE C0E8 C0F7 11F90 11F9F 23086+ AP T421V1,T421V2
011F32 FAEE C0E8 C0F7 11F90 11F9F 23087+ AP T421V1,T421V2
011F38 FAEE C0E8 C0F7 11F90 11F9F 23088+ AP T421V1,T421V2
011F3E FAEE C0E8 C0F7 11F90 11F9F 23089+ AP T421V1,T421V2
011F44 FAEE C0E8 C0F7 11F90 11F9F 23090+ AP T421V1,T421V2
011F4A FAEE C0E8 C0F7 11F90 11F9F 23091+ AP T421V1,T421V2
011F50 FAEE C0E8 C0F7 11F90 11F9F 23092+ AP T421V1,T421V2
011F56 FAEE C0E8 C0F7 11F90 11F9F 23093+ AP T421V1,T421V2
011F5C FAEE C0E8 C0F7 11F90 11F9F 23094+ AP T421V1,T421V2
011F62 FAEE C0E8 C0F7 11F90 11F9F 23095+ AP T421V1,T421V2
011F68 FAEE C0E8 C0F7 11F90 11F9F 23096+ AP T421V1,T421V2
011F6E FAEE C0E8 C0F7 11F90 11F9F 23097+ AP T421V1,T421V2
011F74 FAEE C0E8 C0F7 11F90 11F9F 23098+ AP T421V1,T421V2
011F7A FAEE C0E8 C0F7 11F90 11F9F 23099+ AP T421V1,T421V2
23100+*
011F80 06FB 23101 BCTR R15,R11
23102 TSIMRET
011F82 58F0 C118 11FC0 23103+ L R15,=A(SAVETST) R15 := current save area
011F86 58DF 0004 00004 23104+ L R13,4(R15) get old save area back
011F8A 98EC D00C 0000C 23105+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
PAGE 423
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
011F8E 07FE 23106+ BR 14 RETURN 02000000
23107 *
011F90 0000000000000000 23108 T421V1 DC PL15'0' accululator
011F9F 0000012345678901 23109 T421V2 DC PL15'123456789012345678901234' incr (24 sign.dig)
011FAE 0123456789012345 23110 T421V3 DC PL15'1234567890123456789012345678' init (28 sign.dig)
23111 TSIMEND
011FC0 23112+ LTORG
011FC0 00000458 23113 =A(SAVETST)
11FC4 23114+T421TEND EQU *
23115 *
23116 * Test 422 -- SP m,m (10d) ---------------------------------
23117 *
23118 TSIMBEG T422,700,30,7,C'SP m,m (10d)'
23119+*
003824 23120+TDSCDAT CSECT
003828 23121+ DS 0D
23122+*
003828 00011FC8 23123+T422TDSC DC A(T422) // TENTRY
00382C 000000FC 23124+ DC A(T422TEND-T422) // TLENGTH
003830 000002BC 23125+ DC F'700' // TLRCNT
003834 0000001E 23126+ DC F'30' // TIGCNT
003838 00000007 23127+ DC F'7' // TLTYPE
00199F 23128+TEXT CSECT
00199F E3F4F2F2 23129+SPTR2043 DC C'T422'
00383C 23130+TDSCDAT CSECT
00383C 23131+ DS 0F
00383C 0400199F 23132+ DC AL1(L'SPTR2043),AL3(SPTR2043)
0019A3 23133+TEXT CSECT
0019A3 E2D740946B94404D 23134+SPTR2044 DC C'SP m,m (10d)'
003840 23135+TDSCDAT CSECT
003840 23136+ DS 0F
003840 0C0019A3 23137+ DC AL1(L'SPTR2044),AL3(SPTR2044)
23138+*
004C30 23139+TDSCTBL CSECT
04C30 23140+T422TPTR EQU *
004C30 00003828 23141+ DC A(T422TDSC) enabled test
23142+*
011FC4 23143+TCODE CSECT
011FC8 23144+ DS 0D ensure double word alignment for test
011FC8 23145+T422 DS 0H 01650000
011FC8 90EC D00C 0000C 23146+ STM 14,12,12(13) SAVE REGISTERS 02950000
011FCC 18CF 23147+ LR R12,R15 base register := entry address
11FC8 23148+ USING T422,R12 declare code base register
011FCE 41B0 C01E 11FE6 23149+ LA R11,T422L load loop target to R11
011FD2 58F0 C0F8 120C0 23150+ L R15,=A(SAVETST) R15 := current save area
011FD6 50DF 0004 00004 23151+ ST R13,4(R15) set back pointer in current save area
011FDA 182D 23152+ LR R2,R13 remember callers save area
011FDC 18DF 23153+ LR R13,R15 setup current save area
011FDE 50D2 0008 00008 23154+ ST R13,8(R2) set forw pointer in callers save area
00000 23155+ USING TDSC,R1 declare TDSC base register
011FE2 58F0 1008 00008 23156+ L R15,TLRCNT load local repeat count to R15
23157+*
23158 *
23159 * value range *-999999999: start at +999999999, sub 66666660
23160 *
PAGE 424
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
011FE6 D204 C0E8 C0F2 120B0 120BA 23161 T422L MVC T422V1,T422V3
23162 REPINS SP,(T422V1,T422V2) repeat: SP T422V1,T422V2
23163+*
23164+* build from sublist &ALIST a comma separated string &ARGS
23165+*
23166+*
23167+*
23168+*
23169+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
23170+* this allows to transfer the repeat count from last TDSCGEN call
23171+*
23172+*
23173+*
23174+* write a comment indicating what REPINS does (in case NOGEN in effect)
23175+*
23176+*,// REPINS: do 30 times:
23177+*
23178+* MNOTE requires that ' is doubled for expanded variables
23179+* thus build &MASTR as a copy of '&ARGS with ' doubled
23180+*
23181+*
23182+*,// SP T422V1,T422V2
23183+*
23184+* finally generate code: &ICNT copies of &CODE &ARGS
23185+*
011FEC FB44 C0E8 C0ED 120B0 120B5 23186+ SP T422V1,T422V2
011FF2 FB44 C0E8 C0ED 120B0 120B5 23187+ SP T422V1,T422V2
011FF8 FB44 C0E8 C0ED 120B0 120B5 23188+ SP T422V1,T422V2
011FFE FB44 C0E8 C0ED 120B0 120B5 23189+ SP T422V1,T422V2
012004 FB44 C0E8 C0ED 120B0 120B5 23190+ SP T422V1,T422V2
01200A FB44 C0E8 C0ED 120B0 120B5 23191+ SP T422V1,T422V2
012010 FB44 C0E8 C0ED 120B0 120B5 23192+ SP T422V1,T422V2
012016 FB44 C0E8 C0ED 120B0 120B5 23193+ SP T422V1,T422V2
01201C FB44 C0E8 C0ED 120B0 120B5 23194+ SP T422V1,T422V2
012022 FB44 C0E8 C0ED 120B0 120B5 23195+ SP T422V1,T422V2
012028 FB44 C0E8 C0ED 120B0 120B5 23196+ SP T422V1,T422V2
01202E FB44 C0E8 C0ED 120B0 120B5 23197+ SP T422V1,T422V2
012034 FB44 C0E8 C0ED 120B0 120B5 23198+ SP T422V1,T422V2
01203A FB44 C0E8 C0ED 120B0 120B5 23199+ SP T422V1,T422V2
012040 FB44 C0E8 C0ED 120B0 120B5 23200+ SP T422V1,T422V2
012046 FB44 C0E8 C0ED 120B0 120B5 23201+ SP T422V1,T422V2
01204C FB44 C0E8 C0ED 120B0 120B5 23202+ SP T422V1,T422V2
012052 FB44 C0E8 C0ED 120B0 120B5 23203+ SP T422V1,T422V2
012058 FB44 C0E8 C0ED 120B0 120B5 23204+ SP T422V1,T422V2
01205E FB44 C0E8 C0ED 120B0 120B5 23205+ SP T422V1,T422V2
012064 FB44 C0E8 C0ED 120B0 120B5 23206+ SP T422V1,T422V2
01206A FB44 C0E8 C0ED 120B0 120B5 23207+ SP T422V1,T422V2
012070 FB44 C0E8 C0ED 120B0 120B5 23208+ SP T422V1,T422V2
012076 FB44 C0E8 C0ED 120B0 120B5 23209+ SP T422V1,T422V2
01207C FB44 C0E8 C0ED 120B0 120B5 23210+ SP T422V1,T422V2
012082 FB44 C0E8 C0ED 120B0 120B5 23211+ SP T422V1,T422V2
012088 FB44 C0E8 C0ED 120B0 120B5 23212+ SP T422V1,T422V2
01208E FB44 C0E8 C0ED 120B0 120B5 23213+ SP T422V1,T422V2
012094 FB44 C0E8 C0ED 120B0 120B5 23214+ SP T422V1,T422V2
01209A FB44 C0E8 C0ED 120B0 120B5 23215+ SP T422V1,T422V2
PAGE 425
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
23216+*
0120A0 06FB 23217 BCTR R15,R11
23218 TSIMRET
0120A2 58F0 C0F8 120C0 23219+ L R15,=A(SAVETST) R15 := current save area
0120A6 58DF 0004 00004 23220+ L R13,4(R15) get old save area back
0120AA 98EC D00C 0000C 23221+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0120AE 07FE 23222+ BR 14 RETURN 02000000
23223 *
0120B0 000000000C 23224 T422V1 DC PL5'0' accululator
0120B5 066666660C 23225 T422V2 DC PL5'66666660' increment value
0120BA 999999999C 23226 T422V3 DC PL5'999999999' initial value
23227 TSIMEND
0120C0 23228+ LTORG
0120C0 00000458 23229 =A(SAVETST)
120C4 23230+T422TEND EQU *
23231 *
23232 * Test 423 -- SP m,m (30d) ---------------------------------
23233 *
23234 TSIMBEG T423,700,30,8,C'SP m,m (30d)'
23235+*
003844 23236+TDSCDAT CSECT
003848 23237+ DS 0D
23238+*
003848 000120C8 23239+T423TDSC DC A(T423) // TENTRY
00384C 0000011C 23240+ DC A(T423TEND-T423) // TLENGTH
003850 000002BC 23241+ DC F'700' // TLRCNT
003854 0000001E 23242+ DC F'30' // TIGCNT
003858 00000008 23243+ DC F'8' // TLTYPE
0019AF 23244+TEXT CSECT
0019AF E3F4F2F3 23245+SPTR2055 DC C'T423'
00385C 23246+TDSCDAT CSECT
00385C 23247+ DS 0F
00385C 040019AF 23248+ DC AL1(L'SPTR2055),AL3(SPTR2055)
0019B3 23249+TEXT CSECT
0019B3 E2D740946B94404D 23250+SPTR2056 DC C'SP m,m (30d)'
003860 23251+TDSCDAT CSECT
003860 23252+ DS 0F
003860 0C0019B3 23253+ DC AL1(L'SPTR2056),AL3(SPTR2056)
23254+*
004C34 23255+TDSCTBL CSECT
04C34 23256+T423TPTR EQU *
004C34 00003848 23257+ DC A(T423TDSC) enabled test
23258+*
0120C4 23259+TCODE CSECT
0120C8 23260+ DS 0D ensure double word alignment for test
0120C8 23261+T423 DS 0H 01650000
0120C8 90EC D00C 0000C 23262+ STM 14,12,12(13) SAVE REGISTERS 02950000
0120CC 18CF 23263+ LR R12,R15 base register := entry address
120C8 23264+ USING T423,R12 declare code base register
0120CE 41B0 C01E 120E6 23265+ LA R11,T423L load loop target to R11
0120D2 58F0 C118 121E0 23266+ L R15,=A(SAVETST) R15 := current save area
0120D6 50DF 0004 00004 23267+ ST R13,4(R15) set back pointer in current save area
0120DA 182D 23268+ LR R2,R13 remember callers save area
0120DC 18DF 23269+ LR R13,R15 setup current save area
0120DE 50D2 0008 00008 23270+ ST R13,8(R2) set forw pointer in callers save area
PAGE 426
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00000 23271+ USING TDSC,R1 declare TDSC base register
0120E2 58F0 1008 00008 23272+ L R15,TLRCNT load local repeat count to R15
23273+*
23274 *
0120E6 D20E C0E8 C106 121B0 121CE 23275 T423L MVC T423V1,T423V3
23276 REPINS SP,(T423V1,T423V2) repeat: SP T423V1,T423V2
23277+*
23278+* build from sublist &ALIST a comma separated string &ARGS
23279+*
23280+*
23281+*
23282+*
23283+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
23284+* this allows to transfer the repeat count from last TDSCGEN call
23285+*
23286+*
23287+*
23288+* write a comment indicating what REPINS does (in case NOGEN in effect)
23289+*
23290+*,// REPINS: do 30 times:
23291+*
23292+* MNOTE requires that ' is doubled for expanded variables
23293+* thus build &MASTR as a copy of '&ARGS with ' doubled
23294+*
23295+*
23296+*,// SP T423V1,T423V2
23297+*
23298+* finally generate code: &ICNT copies of &CODE &ARGS
23299+*
0120EC FBEE C0E8 C0F7 121B0 121BF 23300+ SP T423V1,T423V2
0120F2 FBEE C0E8 C0F7 121B0 121BF 23301+ SP T423V1,T423V2
0120F8 FBEE C0E8 C0F7 121B0 121BF 23302+ SP T423V1,T423V2
0120FE FBEE C0E8 C0F7 121B0 121BF 23303+ SP T423V1,T423V2
012104 FBEE C0E8 C0F7 121B0 121BF 23304+ SP T423V1,T423V2
01210A FBEE C0E8 C0F7 121B0 121BF 23305+ SP T423V1,T423V2
012110 FBEE C0E8 C0F7 121B0 121BF 23306+ SP T423V1,T423V2
012116 FBEE C0E8 C0F7 121B0 121BF 23307+ SP T423V1,T423V2
01211C FBEE C0E8 C0F7 121B0 121BF 23308+ SP T423V1,T423V2
012122 FBEE C0E8 C0F7 121B0 121BF 23309+ SP T423V1,T423V2
012128 FBEE C0E8 C0F7 121B0 121BF 23310+ SP T423V1,T423V2
01212E FBEE C0E8 C0F7 121B0 121BF 23311+ SP T423V1,T423V2
012134 FBEE C0E8 C0F7 121B0 121BF 23312+ SP T423V1,T423V2
01213A FBEE C0E8 C0F7 121B0 121BF 23313+ SP T423V1,T423V2
012140 FBEE C0E8 C0F7 121B0 121BF 23314+ SP T423V1,T423V2
012146 FBEE C0E8 C0F7 121B0 121BF 23315+ SP T423V1,T423V2
01214C FBEE C0E8 C0F7 121B0 121BF 23316+ SP T423V1,T423V2
012152 FBEE C0E8 C0F7 121B0 121BF 23317+ SP T423V1,T423V2
012158 FBEE C0E8 C0F7 121B0 121BF 23318+ SP T423V1,T423V2
01215E FBEE C0E8 C0F7 121B0 121BF 23319+ SP T423V1,T423V2
012164 FBEE C0E8 C0F7 121B0 121BF 23320+ SP T423V1,T423V2
01216A FBEE C0E8 C0F7 121B0 121BF 23321+ SP T423V1,T423V2
012170 FBEE C0E8 C0F7 121B0 121BF 23322+ SP T423V1,T423V2
012176 FBEE C0E8 C0F7 121B0 121BF 23323+ SP T423V1,T423V2
01217C FBEE C0E8 C0F7 121B0 121BF 23324+ SP T423V1,T423V2
012182 FBEE C0E8 C0F7 121B0 121BF 23325+ SP T423V1,T423V2
PAGE 427
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012188 FBEE C0E8 C0F7 121B0 121BF 23326+ SP T423V1,T423V2
01218E FBEE C0E8 C0F7 121B0 121BF 23327+ SP T423V1,T423V2
012194 FBEE C0E8 C0F7 121B0 121BF 23328+ SP T423V1,T423V2
01219A FBEE C0E8 C0F7 121B0 121BF 23329+ SP T423V1,T423V2
23330+*
0121A0 06FB 23331 BCTR R15,R11
23332 TSIMRET
0121A2 58F0 C118 121E0 23333+ L R15,=A(SAVETST) R15 := current save area
0121A6 58DF 0004 00004 23334+ L R13,4(R15) get old save area back
0121AA 98EC D00C 0000C 23335+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0121AE 07FE 23336+ BR 14 RETURN 02000000
23337 *
0121B0 0000000000000000 23338 T423V1 DC PL15'0' accululator
0121BF 0000012345678901 23339 T423V2 DC PL15'123456789012345678901234' decr (24 sign.dig)
0121CE 0123456789012345 23340 T423V3 DC PL15'1234567890123456789012345678' init (28 sign.dig)
23341 TSIMEND
0121E0 23342+ LTORG
0121E0 00000458 23343 =A(SAVETST)
121E4 23344+T423TEND EQU *
23345 *
23346 * Test 424 -- MP m,m (10d) ---------------------------------
23347 *
23348 TSIMBEG T424,900,20,7,C'MP m,m (10d)'
23349+*
003864 23350+TDSCDAT CSECT
003868 23351+ DS 0D
23352+*
003868 000121E8 23353+T424TDSC DC A(T424) // TENTRY
00386C 000000BC 23354+ DC A(T424TEND-T424) // TLENGTH
003870 00000384 23355+ DC F'900' // TLRCNT
003874 00000014 23356+ DC F'20' // TIGCNT
003878 00000007 23357+ DC F'7' // TLTYPE
0019BF 23358+TEXT CSECT
0019BF E3F4F2F4 23359+SPTR2067 DC C'T424'
00387C 23360+TDSCDAT CSECT
00387C 23361+ DS 0F
00387C 040019BF 23362+ DC AL1(L'SPTR2067),AL3(SPTR2067)
0019C3 23363+TEXT CSECT
0019C3 D4D740946B94404D 23364+SPTR2068 DC C'MP m,m (10d)'
003880 23365+TDSCDAT CSECT
003880 23366+ DS 0F
003880 0C0019C3 23367+ DC AL1(L'SPTR2068),AL3(SPTR2068)
23368+*
004C38 23369+TDSCTBL CSECT
04C38 23370+T424TPTR EQU *
004C38 00003868 23371+ DC A(T424TDSC) enabled test
23372+*
0121E4 23373+TCODE CSECT
0121E8 23374+ DS 0D ensure double word alignment for test
0121E8 23375+T424 DS 0H 01650000
0121E8 90EC D00C 0000C 23376+ STM 14,12,12(13) SAVE REGISTERS 02950000
0121EC 18CF 23377+ LR R12,R15 base register := entry address
121E8 23378+ USING T424,R12 declare code base register
0121EE 41B0 C01E 12206 23379+ LA R11,T424L load loop target to R11
0121F2 58F0 C0B8 122A0 23380+ L R15,=A(SAVETST) R15 := current save area
PAGE 428
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0121F6 50DF 0004 00004 23381+ ST R13,4(R15) set back pointer in current save area
0121FA 182D 23382+ LR R2,R13 remember callers save area
0121FC 18DF 23383+ LR R13,R15 setup current save area
0121FE 50D2 0008 00008 23384+ ST R13,8(R2) set forw pointer in callers save area
00000 23385+ USING TDSC,R1 declare TDSC base register
012202 58F0 1008 00008 23386+ L R15,TLRCNT load local repeat count to R15
23387+*
23388 *
012206 D204 C0AC C0B2 12294 1229A 23389 T424L MVC T424V1,T424V3
23390 REPINS MP,(T424V1,T424V2) repeat: MP T424V1,T424V2
23391+*
23392+* build from sublist &ALIST a comma separated string &ARGS
23393+*
23394+*
23395+*
23396+*
23397+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
23398+* this allows to transfer the repeat count from last TDSCGEN call
23399+*
23400+*
23401+*
23402+* write a comment indicating what REPINS does (in case NOGEN in effect)
23403+*
23404+*,// REPINS: do 20 times:
23405+*
23406+* MNOTE requires that ' is doubled for expanded variables
23407+* thus build &MASTR as a copy of '&ARGS with ' doubled
23408+*
23409+*
23410+*,// MP T424V1,T424V2
23411+*
23412+* finally generate code: &ICNT copies of &CODE &ARGS
23413+*
01220C FC40 C0AC C0B1 12294 12299 23414+ MP T424V1,T424V2
012212 FC40 C0AC C0B1 12294 12299 23415+ MP T424V1,T424V2
012218 FC40 C0AC C0B1 12294 12299 23416+ MP T424V1,T424V2
01221E FC40 C0AC C0B1 12294 12299 23417+ MP T424V1,T424V2
012224 FC40 C0AC C0B1 12294 12299 23418+ MP T424V1,T424V2
01222A FC40 C0AC C0B1 12294 12299 23419+ MP T424V1,T424V2
012230 FC40 C0AC C0B1 12294 12299 23420+ MP T424V1,T424V2
012236 FC40 C0AC C0B1 12294 12299 23421+ MP T424V1,T424V2
01223C FC40 C0AC C0B1 12294 12299 23422+ MP T424V1,T424V2
012242 FC40 C0AC C0B1 12294 12299 23423+ MP T424V1,T424V2
012248 FC40 C0AC C0B1 12294 12299 23424+ MP T424V1,T424V2
01224E FC40 C0AC C0B1 12294 12299 23425+ MP T424V1,T424V2
012254 FC40 C0AC C0B1 12294 12299 23426+ MP T424V1,T424V2
01225A FC40 C0AC C0B1 12294 12299 23427+ MP T424V1,T424V2
012260 FC40 C0AC C0B1 12294 12299 23428+ MP T424V1,T424V2
012266 FC40 C0AC C0B1 12294 12299 23429+ MP T424V1,T424V2
01226C FC40 C0AC C0B1 12294 12299 23430+ MP T424V1,T424V2
012272 FC40 C0AC C0B1 12294 12299 23431+ MP T424V1,T424V2
012278 FC40 C0AC C0B1 12294 12299 23432+ MP T424V1,T424V2
01227E FC40 C0AC C0B1 12294 12299 23433+ MP T424V1,T424V2
23434+*
012284 06FB 23435 BCTR R15,R11
PAGE 429
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
23436 TSIMRET
012286 58F0 C0B8 122A0 23437+ L R15,=A(SAVETST) R15 := current save area
01228A 58DF 0004 00004 23438+ L R13,4(R15) get old save area back
01228E 98EC D00C 0000C 23439+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012292 07FE 23440+ BR 14 RETURN 02000000
23441 *
012294 000000000C 23442 T424V1 DC PL5'0'
012299 2C 23443 T424V2 DC PL1'2'
01229A 000000001C 23444 T424V3 DC PL5'1'
23445 TSIMEND
0122A0 23446+ LTORG
0122A0 00000458 23447 =A(SAVETST)
122A4 23448+T424TEND EQU *
23449 *
23450 * Test 425 -- MP m,m (30d) ---------------------------------
23451 *
23452 TSIMBEG T425,900,20,8,C'MP m,m (30d)'
23453+*
003884 23454+TDSCDAT CSECT
003888 23455+ DS 0D
23456+*
003888 000122A8 23457+T425TDSC DC A(T425) // TENTRY
00388C 000000D4 23458+ DC A(T425TEND-T425) // TLENGTH
003890 00000384 23459+ DC F'900' // TLRCNT
003894 00000014 23460+ DC F'20' // TIGCNT
003898 00000008 23461+ DC F'8' // TLTYPE
0019CF 23462+TEXT CSECT
0019CF E3F4F2F5 23463+SPTR2079 DC C'T425'
00389C 23464+TDSCDAT CSECT
00389C 23465+ DS 0F
00389C 040019CF 23466+ DC AL1(L'SPTR2079),AL3(SPTR2079)
0019D3 23467+TEXT CSECT
0019D3 D4D740946B94404D 23468+SPTR2080 DC C'MP m,m (30d)'
0038A0 23469+TDSCDAT CSECT
0038A0 23470+ DS 0F
0038A0 0C0019D3 23471+ DC AL1(L'SPTR2080),AL3(SPTR2080)
23472+*
004C3C 23473+TDSCTBL CSECT
04C3C 23474+T425TPTR EQU *
004C3C 00003888 23475+ DC A(T425TDSC) enabled test
23476+*
0122A4 23477+TCODE CSECT
0122A8 23478+ DS 0D ensure double word alignment for test
0122A8 23479+T425 DS 0H 01650000
0122A8 90EC D00C 0000C 23480+ STM 14,12,12(13) SAVE REGISTERS 02950000
0122AC 18CF 23481+ LR R12,R15 base register := entry address
122A8 23482+ USING T425,R12 declare code base register
0122AE 41B0 C01E 122C6 23483+ LA R11,T425L load loop target to R11
0122B2 58F0 C0D0 12378 23484+ L R15,=A(SAVETST) R15 := current save area
0122B6 50DF 0004 00004 23485+ ST R13,4(R15) set back pointer in current save area
0122BA 182D 23486+ LR R2,R13 remember callers save area
0122BC 18DF 23487+ LR R13,R15 setup current save area
0122BE 50D2 0008 00008 23488+ ST R13,8(R2) set forw pointer in callers save area
00000 23489+ USING TDSC,R1 declare TDSC base register
0122C2 58F0 1008 00008 23490+ L R15,TLRCNT load local repeat count to R15
PAGE 430
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
23491+*
23492 *
0122C6 D20E C0AC C0BC 12354 12364 23493 T425L MVC T425V1,T425V3
23494 REPINS MP,(T425V1,T425V2) repeat: MP T425V1,T425V2
23495+*
23496+* build from sublist &ALIST a comma separated string &ARGS
23497+*
23498+*
23499+*
23500+*
23501+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
23502+* this allows to transfer the repeat count from last TDSCGEN call
23503+*
23504+*
23505+*
23506+* write a comment indicating what REPINS does (in case NOGEN in effect)
23507+*
23508+*,// REPINS: do 20 times:
23509+*
23510+* MNOTE requires that ' is doubled for expanded variables
23511+* thus build &MASTR as a copy of '&ARGS with ' doubled
23512+*
23513+*
23514+*,// MP T425V1,T425V2
23515+*
23516+* finally generate code: &ICNT copies of &CODE &ARGS
23517+*
0122CC FCE0 C0AC C0BB 12354 12363 23518+ MP T425V1,T425V2
0122D2 FCE0 C0AC C0BB 12354 12363 23519+ MP T425V1,T425V2
0122D8 FCE0 C0AC C0BB 12354 12363 23520+ MP T425V1,T425V2
0122DE FCE0 C0AC C0BB 12354 12363 23521+ MP T425V1,T425V2
0122E4 FCE0 C0AC C0BB 12354 12363 23522+ MP T425V1,T425V2
0122EA FCE0 C0AC C0BB 12354 12363 23523+ MP T425V1,T425V2
0122F0 FCE0 C0AC C0BB 12354 12363 23524+ MP T425V1,T425V2
0122F6 FCE0 C0AC C0BB 12354 12363 23525+ MP T425V1,T425V2
0122FC FCE0 C0AC C0BB 12354 12363 23526+ MP T425V1,T425V2
012302 FCE0 C0AC C0BB 12354 12363 23527+ MP T425V1,T425V2
012308 FCE0 C0AC C0BB 12354 12363 23528+ MP T425V1,T425V2
01230E FCE0 C0AC C0BB 12354 12363 23529+ MP T425V1,T425V2
012314 FCE0 C0AC C0BB 12354 12363 23530+ MP T425V1,T425V2
01231A FCE0 C0AC C0BB 12354 12363 23531+ MP T425V1,T425V2
012320 FCE0 C0AC C0BB 12354 12363 23532+ MP T425V1,T425V2
012326 FCE0 C0AC C0BB 12354 12363 23533+ MP T425V1,T425V2
01232C FCE0 C0AC C0BB 12354 12363 23534+ MP T425V1,T425V2
012332 FCE0 C0AC C0BB 12354 12363 23535+ MP T425V1,T425V2
012338 FCE0 C0AC C0BB 12354 12363 23536+ MP T425V1,T425V2
01233E FCE0 C0AC C0BB 12354 12363 23537+ MP T425V1,T425V2
23538+*
012344 06FB 23539 BCTR R15,R11
23540 TSIMRET
012346 58F0 C0D0 12378 23541+ L R15,=A(SAVETST) R15 := current save area
01234A 58DF 0004 00004 23542+ L R13,4(R15) get old save area back
01234E 98EC D00C 0000C 23543+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012352 07FE 23544+ BR 14 RETURN 02000000
23545 *
PAGE 431
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012354 0000000000000000 23546 T425V1 DC PL15'0'
012363 9D 23547 T425V2 DC PL1'-9'
012364 0000000000000000 23548 T425V3 DC PL15'1'
23549 TSIMEND
012378 23550+ LTORG
012378 00000458 23551 =A(SAVETST)
1237C 23552+T425TEND EQU *
23553 *
23554 * Test 426 -- DP m,m (10d) ---------------------------------
23555 *
23556 TSIMBEG T426,1000,10,1,C'MVC;DP m,m (10d)'
23557+*
0038A4 23558+TDSCDAT CSECT
0038A8 23559+ DS 0D
23560+*
0038A8 00012380 23561+T426TDSC DC A(T426) // TENTRY
0038AC 000000E4 23562+ DC A(T426TEND-T426) // TLENGTH
0038B0 000003E8 23563+ DC F'1000' // TLRCNT
0038B4 0000000A 23564+ DC F'10' // TIGCNT
0038B8 00000001 23565+ DC F'1' // TLTYPE
0019DF 23566+TEXT CSECT
0019DF E3F4F2F6 23567+SPTR2091 DC C'T426'
0038BC 23568+TDSCDAT CSECT
0038BC 23569+ DS 0F
0038BC 040019DF 23570+ DC AL1(L'SPTR2091),AL3(SPTR2091)
0019E3 23571+TEXT CSECT
0019E3 D4E5C35EC4D74094 23572+SPTR2092 DC C'MVC;DP m,m (10d)'
0038C0 23573+TDSCDAT CSECT
0038C0 23574+ DS 0F
0038C0 100019E3 23575+ DC AL1(L'SPTR2092),AL3(SPTR2092)
23576+*
004C40 23577+TDSCTBL CSECT
04C40 23578+T426TPTR EQU *
004C40 000038A8 23579+ DC A(T426TDSC) enabled test
23580+*
01237C 23581+TCODE CSECT
012380 23582+ DS 0D ensure double word alignment for test
012380 23583+T426 DS 0H 01650000
012380 90EC D00C 0000C 23584+ STM 14,12,12(13) SAVE REGISTERS 02950000
012384 18CF 23585+ LR R12,R15 base register := entry address
12380 23586+ USING T426,R12 declare code base register
012386 41B0 C01E 1239E 23587+ LA R11,T426L load loop target to R11
01238A 58F0 C0E0 12460 23588+ L R15,=A(SAVETST) R15 := current save area
01238E 50DF 0004 00004 23589+ ST R13,4(R15) set back pointer in current save area
012392 182D 23590+ LR R2,R13 remember callers save area
012394 18DF 23591+ LR R13,R15 setup current save area
012396 50D2 0008 00008 23592+ ST R13,8(R2) set forw pointer in callers save area
00000 23593+ USING TDSC,R1 declare TDSC base register
01239A 58F0 1008 00008 23594+ L R15,TLRCNT load local repeat count to R15
23595+*
23596 *
01239E D204 C0A6 C0AD 12426 1242D 23597 T426L MVC T426V1,T426V10
0123A4 FD41 C0A6 C0AB 12426 1242B 23598 DP T426V1,T426V2
0123AA D204 C0A6 C0B2 12426 12432 23599 MVC T426V1,T426V11
0123B0 FD41 C0A6 C0AB 12426 1242B 23600 DP T426V1,T426V2
PAGE 432
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0123B6 D204 C0A6 C0B7 12426 12437 23601 MVC T426V1,T426V12
0123BC FD41 C0A6 C0AB 12426 1242B 23602 DP T426V1,T426V2
0123C2 D204 C0A6 C0BC 12426 1243C 23603 MVC T426V1,T426V13
0123C8 FD41 C0A6 C0AB 12426 1242B 23604 DP T426V1,T426V2
0123CE D204 C0A6 C0C1 12426 12441 23605 MVC T426V1,T426V14
0123D4 FD41 C0A6 C0AB 12426 1242B 23606 DP T426V1,T426V2
0123DA D204 C0A6 C0C6 12426 12446 23607 MVC T426V1,T426V15
0123E0 FD41 C0A6 C0AB 12426 1242B 23608 DP T426V1,T426V2
0123E6 D204 C0A6 C0CB 12426 1244B 23609 MVC T426V1,T426V16
0123EC FD41 C0A6 C0AB 12426 1242B 23610 DP T426V1,T426V2
0123F2 D204 C0A6 C0D0 12426 12450 23611 MVC T426V1,T426V17
0123F8 FD41 C0A6 C0AB 12426 1242B 23612 DP T426V1,T426V2
0123FE D204 C0A6 C0D5 12426 12455 23613 MVC T426V1,T426V18
012404 FD41 C0A6 C0AB 12426 1242B 23614 DP T426V1,T426V2
01240A D204 C0A6 C0DA 12426 1245A 23615 MVC T426V1,T426V19
012410 FD41 C0A6 C0AB 12426 1242B 23616 DP T426V1,T426V2
012416 06FB 23617 BCTR R15,R11
23618 TSIMRET
012418 58F0 C0E0 12460 23619+ L R15,=A(SAVETST) R15 := current save area
01241C 58DF 0004 00004 23620+ L R13,4(R15) get old save area back
012420 98EC D00C 0000C 23621+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012424 07FE 23622+ BR 14 RETURN 02000000
23623 *
012426 000000000C 23624 T426V1 DC PL5'0'
01242B 017C 23625 T426V2 DC PL2'17'
01242D 000987654C 23626 T426V10 DC PL5'987654'
012432 000876543C 23627 T426V11 DC PL5'876543'
012437 000765432C 23628 T426V12 DC PL5'765432'
01243C 000654321C 23629 T426V13 DC PL5'654321'
012441 000543210C 23630 T426V14 DC PL5'543210'
012446 000432109C 23631 T426V15 DC PL5'432109'
01244B 000321098C 23632 T426V16 DC PL5'321098'
012450 000210987C 23633 T426V17 DC PL5'210987'
012455 000109876C 23634 T426V18 DC PL5'109876'
01245A 000098765C 23635 T426V19 DC PL5'98765'
23636 TSIMEND
012460 23637+ LTORG
012460 00000458 23638 =A(SAVETST)
12464 23639+T426TEND EQU *
23640 *
23641 * Test 427 -- DP m,m (30d) ---------------------------------
23642 *
23643 TSIMBEG T427,500,10,1,C'MVC;DP m,m (30d)'
23644+*
0038C4 23645+TDSCDAT CSECT
0038C8 23646+ DS 0D
23647+*
0038C8 00012468 23648+T427TDSC DC A(T427) // TENTRY
0038CC 00000154 23649+ DC A(T427TEND-T427) // TLENGTH
0038D0 000001F4 23650+ DC F'500' // TLRCNT
0038D4 0000000A 23651+ DC F'10' // TIGCNT
0038D8 00000001 23652+ DC F'1' // TLTYPE
0019F3 23653+TEXT CSECT
0019F3 E3F4F2F7 23654+SPTR2100 DC C'T427'
0038DC 23655+TDSCDAT CSECT
PAGE 433
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0038DC 23656+ DS 0F
0038DC 040019F3 23657+ DC AL1(L'SPTR2100),AL3(SPTR2100)
0019F7 23658+TEXT CSECT
0019F7 D4E5C35EC4D74094 23659+SPTR2101 DC C'MVC;DP m,m (30d)'
0038E0 23660+TDSCDAT CSECT
0038E0 23661+ DS 0F
0038E0 100019F7 23662+ DC AL1(L'SPTR2101),AL3(SPTR2101)
23663+*
004C44 23664+TDSCTBL CSECT
04C44 23665+T427TPTR EQU *
004C44 000038C8 23666+ DC A(T427TDSC) enabled test
23667+*
012464 23668+TCODE CSECT
012468 23669+ DS 0D ensure double word alignment for test
012468 23670+T427 DS 0H 01650000
012468 90EC D00C 0000C 23671+ STM 14,12,12(13) SAVE REGISTERS 02950000
01246C 18CF 23672+ LR R12,R15 base register := entry address
12468 23673+ USING T427,R12 declare code base register
01246E 41B0 C01E 12486 23674+ LA R11,T427L load loop target to R11
012472 58F0 C150 125B8 23675+ L R15,=A(SAVETST) R15 := current save area
012476 50DF 0004 00004 23676+ ST R13,4(R15) set back pointer in current save area
01247A 182D 23677+ LR R2,R13 remember callers save area
01247C 18DF 23678+ LR R13,R15 setup current save area
01247E 50D2 0008 00008 23679+ ST R13,8(R2) set forw pointer in callers save area
00000 23680+ USING TDSC,R1 declare TDSC base register
012482 58F0 1008 00008 23681+ L R15,TLRCNT load local repeat count to R15
23682+*
23683 *
012486 D20E C0A6 C0B7 1250E 1251F 23684 T427L MVC T427V1,T427V10
01248C FDE1 C0A6 C0B5 1250E 1251D 23685 DP T427V1,T427V2
012492 D20E C0A6 C0C6 1250E 1252E 23686 MVC T427V1,T427V11
012498 FDE1 C0A6 C0B5 1250E 1251D 23687 DP T427V1,T427V2
01249E D20E C0A6 C0D5 1250E 1253D 23688 MVC T427V1,T427V12
0124A4 FDE1 C0A6 C0B5 1250E 1251D 23689 DP T427V1,T427V2
0124AA D20E C0A6 C0E4 1250E 1254C 23690 MVC T427V1,T427V13
0124B0 FDE1 C0A6 C0B5 1250E 1251D 23691 DP T427V1,T427V2
0124B6 D20E C0A6 C0F3 1250E 1255B 23692 MVC T427V1,T427V14
0124BC FDE1 C0A6 C0B5 1250E 1251D 23693 DP T427V1,T427V2
0124C2 D20E C0A6 C102 1250E 1256A 23694 MVC T427V1,T427V15
0124C8 FDE1 C0A6 C0B5 1250E 1251D 23695 DP T427V1,T427V2
0124CE D20E C0A6 C111 1250E 12579 23696 MVC T427V1,T427V16
0124D4 FDE1 C0A6 C0B5 1250E 1251D 23697 DP T427V1,T427V2
0124DA D20E C0A6 C120 1250E 12588 23698 MVC T427V1,T427V17
0124E0 FDE1 C0A6 C0B5 1250E 1251D 23699 DP T427V1,T427V2
0124E6 D20E C0A6 C12F 1250E 12597 23700 MVC T427V1,T427V18
0124EC FDE1 C0A6 C0B5 1250E 1251D 23701 DP T427V1,T427V2
0124F2 D20E C0A6 C13E 1250E 125A6 23702 MVC T427V1,T427V19
0124F8 FDE1 C0A6 C0B5 1250E 1251D 23703 DP T427V1,T427V2
0124FE 06FB 23704 BCTR R15,R11
23705 TSIMRET
012500 58F0 C150 125B8 23706+ L R15,=A(SAVETST) R15 := current save area
012504 58DF 0004 00004 23707+ L R13,4(R15) get old save area back
012508 98EC D00C 0000C 23708+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01250C 07FE 23709+ BR 14 RETURN 02000000
23710 *
PAGE 434
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01250E 0000000000000000 23711 T427V1 DC PL15'0'
01251D 177C 23712 T427V2 DC PL2'177'
01251F 0009876543210987 23713 T427V10 DC PL15'98765432109876543210987654'
01252E 0008765432109876 23714 T427V11 DC PL15'87654321098765432109876543'
01253D 0007654321098765 23715 T427V12 DC PL15'76543210987654321098765432'
01254C 0006543210987654 23716 T427V13 DC PL15'65432109876543210987654321'
01255B 0005432109876543 23717 T427V14 DC PL15'54321098765432109876543210'
01256A 0004321098765432 23718 T427V15 DC PL15'43210987654321098765432109'
012579 0003210987654321 23719 T427V16 DC PL15'32109876543210987654321098'
012588 0002109876543210 23720 T427V17 DC PL15'21098765432109876543210987'
012597 0001098765432109 23721 T427V18 DC PL15'10987654321098765432109876'
0125A6 0000987654321098 23722 T427V19 DC PL15'9876543210987654321098765'
23723 TSIMEND
0125B8 23724+ LTORG
0125B8 00000458 23725 =A(SAVETST)
125BC 23726+T427TEND EQU *
23727 *
23728 * Test 43x -- decimal compare ==============================
23729 *
23730 * Test 430 -- CP m,m (10d) ---------------------------------
23731 *
23732 TSIMBEG T430,1000,30,1,C'CP m,m (10d)'
23733+*
0038E4 23734+TDSCDAT CSECT
0038E8 23735+ DS 0D
23736+*
0038E8 000125C0 23737+T430TDSC DC A(T430) // TENTRY
0038EC 000000F4 23738+ DC A(T430TEND-T430) // TLENGTH
0038F0 000003E8 23739+ DC F'1000' // TLRCNT
0038F4 0000001E 23740+ DC F'30' // TIGCNT
0038F8 00000001 23741+ DC F'1' // TLTYPE
001A07 23742+TEXT CSECT
001A07 E3F4F3F0 23743+SPTR2109 DC C'T430'
0038FC 23744+TDSCDAT CSECT
0038FC 23745+ DS 0F
0038FC 04001A07 23746+ DC AL1(L'SPTR2109),AL3(SPTR2109)
001A0B 23747+TEXT CSECT
001A0B C3D740946B94404D 23748+SPTR2110 DC C'CP m,m (10d)'
003900 23749+TDSCDAT CSECT
003900 23750+ DS 0F
003900 0C001A0B 23751+ DC AL1(L'SPTR2110),AL3(SPTR2110)
23752+*
004C48 23753+TDSCTBL CSECT
04C48 23754+T430TPTR EQU *
004C48 000038E8 23755+ DC A(T430TDSC) enabled test
23756+*
0125BC 23757+TCODE CSECT
0125C0 23758+ DS 0D ensure double word alignment for test
0125C0 23759+T430 DS 0H 01650000
0125C0 90EC D00C 0000C 23760+ STM 14,12,12(13) SAVE REGISTERS 02950000
0125C4 18CF 23761+ LR R12,R15 base register := entry address
125C0 23762+ USING T430,R12 declare code base register
0125C6 41B0 C01E 125DE 23763+ LA R11,T430L load loop target to R11
0125CA 58F0 C0F0 126B0 23764+ L R15,=A(SAVETST) R15 := current save area
0125CE 50DF 0004 00004 23765+ ST R13,4(R15) set back pointer in current save area
PAGE 435
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0125D2 182D 23766+ LR R2,R13 remember callers save area
0125D4 18DF 23767+ LR R13,R15 setup current save area
0125D6 50D2 0008 00008 23768+ ST R13,8(R2) set forw pointer in callers save area
00000 23769+ USING TDSC,R1 declare TDSC base register
0125DA 58F0 1008 00008 23770+ L R15,TLRCNT load local repeat count to R15
23771+*
23772 *
23773 T430L REPINS CP,(T430V1,T430V2) repeat: CP T430V1,T430V2
23774+*
23775+* build from sublist &ALIST a comma separated string &ARGS
23776+*
23777+*
23778+*
23779+*
23780+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
23781+* this allows to transfer the repeat count from last TDSCGEN call
23782+*
23783+*
125DE 23784+T430L EQU *
23785+*
23786+* write a comment indicating what REPINS does (in case NOGEN in effect)
23787+*
23788+*,// REPINS: do 30 times:
23789+*
23790+* MNOTE requires that ' is doubled for expanded variables
23791+* thus build &MASTR as a copy of '&ARGS with ' doubled
23792+*
23793+*
23794+*,// CP T430V1,T430V2
23795+*
23796+* finally generate code: &ICNT copies of &CODE &ARGS
23797+*
0125DE F944 C0E2 C0E7 126A2 126A7 23798+ CP T430V1,T430V2
0125E4 F944 C0E2 C0E7 126A2 126A7 23799+ CP T430V1,T430V2
0125EA F944 C0E2 C0E7 126A2 126A7 23800+ CP T430V1,T430V2
0125F0 F944 C0E2 C0E7 126A2 126A7 23801+ CP T430V1,T430V2
0125F6 F944 C0E2 C0E7 126A2 126A7 23802+ CP T430V1,T430V2
0125FC F944 C0E2 C0E7 126A2 126A7 23803+ CP T430V1,T430V2
012602 F944 C0E2 C0E7 126A2 126A7 23804+ CP T430V1,T430V2
012608 F944 C0E2 C0E7 126A2 126A7 23805+ CP T430V1,T430V2
01260E F944 C0E2 C0E7 126A2 126A7 23806+ CP T430V1,T430V2
012614 F944 C0E2 C0E7 126A2 126A7 23807+ CP T430V1,T430V2
01261A F944 C0E2 C0E7 126A2 126A7 23808+ CP T430V1,T430V2
012620 F944 C0E2 C0E7 126A2 126A7 23809+ CP T430V1,T430V2
012626 F944 C0E2 C0E7 126A2 126A7 23810+ CP T430V1,T430V2
01262C F944 C0E2 C0E7 126A2 126A7 23811+ CP T430V1,T430V2
012632 F944 C0E2 C0E7 126A2 126A7 23812+ CP T430V1,T430V2
012638 F944 C0E2 C0E7 126A2 126A7 23813+ CP T430V1,T430V2
01263E F944 C0E2 C0E7 126A2 126A7 23814+ CP T430V1,T430V2
012644 F944 C0E2 C0E7 126A2 126A7 23815+ CP T430V1,T430V2
01264A F944 C0E2 C0E7 126A2 126A7 23816+ CP T430V1,T430V2
012650 F944 C0E2 C0E7 126A2 126A7 23817+ CP T430V1,T430V2
012656 F944 C0E2 C0E7 126A2 126A7 23818+ CP T430V1,T430V2
01265C F944 C0E2 C0E7 126A2 126A7 23819+ CP T430V1,T430V2
012662 F944 C0E2 C0E7 126A2 126A7 23820+ CP T430V1,T430V2
PAGE 436
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012668 F944 C0E2 C0E7 126A2 126A7 23821+ CP T430V1,T430V2
01266E F944 C0E2 C0E7 126A2 126A7 23822+ CP T430V1,T430V2
012674 F944 C0E2 C0E7 126A2 126A7 23823+ CP T430V1,T430V2
01267A F944 C0E2 C0E7 126A2 126A7 23824+ CP T430V1,T430V2
012680 F944 C0E2 C0E7 126A2 126A7 23825+ CP T430V1,T430V2
012686 F944 C0E2 C0E7 126A2 126A7 23826+ CP T430V1,T430V2
01268C F944 C0E2 C0E7 126A2 126A7 23827+ CP T430V1,T430V2
23828+*
012692 06FB 23829 BCTR R15,R11
23830 TSIMRET
012694 58F0 C0F0 126B0 23831+ L R15,=A(SAVETST) R15 := current save area
012698 58DF 0004 00004 23832+ L R13,4(R15) get old save area back
01269C 98EC D00C 0000C 23833+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0126A0 07FE 23834+ BR 14 RETURN 02000000
23835 *
0126A2 999999999C 23836 T430V1 DC PL5'999999999'
0126A7 999999998C 23837 T430V2 DC PL5'999999998'
23838 TSIMEND
0126B0 23839+ LTORG
0126B0 00000458 23840 =A(SAVETST)
126B4 23841+T430TEND EQU *
23842 *
23843 * Test 431 -- CP m,m (30d) ---------------------------------
23844 *
23845 TSIMBEG T431,1000,30,1,C'CP m,m (30d)'
23846+*
003904 23847+TDSCDAT CSECT
003908 23848+ DS 0D
23849+*
003908 000126B8 23850+T431TDSC DC A(T431) // TENTRY
00390C 00000104 23851+ DC A(T431TEND-T431) // TLENGTH
003910 000003E8 23852+ DC F'1000' // TLRCNT
003914 0000001E 23853+ DC F'30' // TIGCNT
003918 00000001 23854+ DC F'1' // TLTYPE
001A17 23855+TEXT CSECT
001A17 E3F4F3F1 23856+SPTR2121 DC C'T431'
00391C 23857+TDSCDAT CSECT
00391C 23858+ DS 0F
00391C 04001A17 23859+ DC AL1(L'SPTR2121),AL3(SPTR2121)
001A1B 23860+TEXT CSECT
001A1B C3D740946B94404D 23861+SPTR2122 DC C'CP m,m (30d)'
003920 23862+TDSCDAT CSECT
003920 23863+ DS 0F
003920 0C001A1B 23864+ DC AL1(L'SPTR2122),AL3(SPTR2122)
23865+*
004C4C 23866+TDSCTBL CSECT
04C4C 23867+T431TPTR EQU *
004C4C 00003908 23868+ DC A(T431TDSC) enabled test
23869+*
0126B4 23870+TCODE CSECT
0126B8 23871+ DS 0D ensure double word alignment for test
0126B8 23872+T431 DS 0H 01650000
0126B8 90EC D00C 0000C 23873+ STM 14,12,12(13) SAVE REGISTERS 02950000
0126BC 18CF 23874+ LR R12,R15 base register := entry address
126B8 23875+ USING T431,R12 declare code base register
PAGE 437
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0126BE 41B0 C01E 126D6 23876+ LA R11,T431L load loop target to R11
0126C2 58F0 C100 127B8 23877+ L R15,=A(SAVETST) R15 := current save area
0126C6 50DF 0004 00004 23878+ ST R13,4(R15) set back pointer in current save area
0126CA 182D 23879+ LR R2,R13 remember callers save area
0126CC 18DF 23880+ LR R13,R15 setup current save area
0126CE 50D2 0008 00008 23881+ ST R13,8(R2) set forw pointer in callers save area
00000 23882+ USING TDSC,R1 declare TDSC base register
0126D2 58F0 1008 00008 23883+ L R15,TLRCNT load local repeat count to R15
23884+*
23885 *
23886 T431L REPINS CP,(T431V1,T431V2) repeat: CP T431V1,T431V2
23887+*
23888+* build from sublist &ALIST a comma separated string &ARGS
23889+*
23890+*
23891+*
23892+*
23893+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
23894+* this allows to transfer the repeat count from last TDSCGEN call
23895+*
23896+*
126D6 23897+T431L EQU *
23898+*
23899+* write a comment indicating what REPINS does (in case NOGEN in effect)
23900+*
23901+*,// REPINS: do 30 times:
23902+*
23903+* MNOTE requires that ' is doubled for expanded variables
23904+* thus build &MASTR as a copy of '&ARGS with ' doubled
23905+*
23906+*
23907+*,// CP T431V1,T431V2
23908+*
23909+* finally generate code: &ICNT copies of &CODE &ARGS
23910+*
0126D6 F9EE C0E2 C0F1 1279A 127A9 23911+ CP T431V1,T431V2
0126DC F9EE C0E2 C0F1 1279A 127A9 23912+ CP T431V1,T431V2
0126E2 F9EE C0E2 C0F1 1279A 127A9 23913+ CP T431V1,T431V2
0126E8 F9EE C0E2 C0F1 1279A 127A9 23914+ CP T431V1,T431V2
0126EE F9EE C0E2 C0F1 1279A 127A9 23915+ CP T431V1,T431V2
0126F4 F9EE C0E2 C0F1 1279A 127A9 23916+ CP T431V1,T431V2
0126FA F9EE C0E2 C0F1 1279A 127A9 23917+ CP T431V1,T431V2
012700 F9EE C0E2 C0F1 1279A 127A9 23918+ CP T431V1,T431V2
012706 F9EE C0E2 C0F1 1279A 127A9 23919+ CP T431V1,T431V2
01270C F9EE C0E2 C0F1 1279A 127A9 23920+ CP T431V1,T431V2
012712 F9EE C0E2 C0F1 1279A 127A9 23921+ CP T431V1,T431V2
012718 F9EE C0E2 C0F1 1279A 127A9 23922+ CP T431V1,T431V2
01271E F9EE C0E2 C0F1 1279A 127A9 23923+ CP T431V1,T431V2
012724 F9EE C0E2 C0F1 1279A 127A9 23924+ CP T431V1,T431V2
01272A F9EE C0E2 C0F1 1279A 127A9 23925+ CP T431V1,T431V2
012730 F9EE C0E2 C0F1 1279A 127A9 23926+ CP T431V1,T431V2
012736 F9EE C0E2 C0F1 1279A 127A9 23927+ CP T431V1,T431V2
01273C F9EE C0E2 C0F1 1279A 127A9 23928+ CP T431V1,T431V2
012742 F9EE C0E2 C0F1 1279A 127A9 23929+ CP T431V1,T431V2
012748 F9EE C0E2 C0F1 1279A 127A9 23930+ CP T431V1,T431V2
PAGE 438
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01274E F9EE C0E2 C0F1 1279A 127A9 23931+ CP T431V1,T431V2
012754 F9EE C0E2 C0F1 1279A 127A9 23932+ CP T431V1,T431V2
01275A F9EE C0E2 C0F1 1279A 127A9 23933+ CP T431V1,T431V2
012760 F9EE C0E2 C0F1 1279A 127A9 23934+ CP T431V1,T431V2
012766 F9EE C0E2 C0F1 1279A 127A9 23935+ CP T431V1,T431V2
01276C F9EE C0E2 C0F1 1279A 127A9 23936+ CP T431V1,T431V2
012772 F9EE C0E2 C0F1 1279A 127A9 23937+ CP T431V1,T431V2
012778 F9EE C0E2 C0F1 1279A 127A9 23938+ CP T431V1,T431V2
01277E F9EE C0E2 C0F1 1279A 127A9 23939+ CP T431V1,T431V2
012784 F9EE C0E2 C0F1 1279A 127A9 23940+ CP T431V1,T431V2
23941+*
01278A 06FB 23942 BCTR R15,R11
23943 TSIMRET
01278C 58F0 C100 127B8 23944+ L R15,=A(SAVETST) R15 := current save area
012790 58DF 0004 00004 23945+ L R13,4(R15) get old save area back
012794 98EC D00C 0000C 23946+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012798 07FE 23947+ BR 14 RETURN 02000000
23948 *
01279A 0123456789012345 23949 T431V1 DC PL15'1234567890123456789012345678'
0127A9 0123456789012345 23950 T431V2 DC PL15'1234567890123456789012345677'
23951 TSIMEND
0127B8 23952+ LTORG
0127B8 00000458 23953 =A(SAVETST)
127BC 23954+T431TEND EQU *
23955 *
23956 * Test 44x -- ZAP,SRP ======================================
23957 *
23958 *
23959 * Test 440 -- ZAP m,m (10d,10d) ----------------------------
23960 *
23961 TSIMBEG T440,1600,30,1,C'ZAP m,m (10d,10d)'
23962+*
003924 23963+TDSCDAT CSECT
003928 23964+ DS 0D
23965+*
003928 000127C0 23966+T440TDSC DC A(T440) // TENTRY
00392C 000000F4 23967+ DC A(T440TEND-T440) // TLENGTH
003930 00000640 23968+ DC F'1600' // TLRCNT
003934 0000001E 23969+ DC F'30' // TIGCNT
003938 00000001 23970+ DC F'1' // TLTYPE
001A27 23971+TEXT CSECT
001A27 E3F4F4F0 23972+SPTR2133 DC C'T440'
00393C 23973+TDSCDAT CSECT
00393C 23974+ DS 0F
00393C 04001A27 23975+ DC AL1(L'SPTR2133),AL3(SPTR2133)
001A2B 23976+TEXT CSECT
001A2B E9C1D740946B9440 23977+SPTR2134 DC C'ZAP m,m (10d,10d)'
003940 23978+TDSCDAT CSECT
003940 23979+ DS 0F
003940 11001A2B 23980+ DC AL1(L'SPTR2134),AL3(SPTR2134)
23981+*
004C50 23982+TDSCTBL CSECT
04C50 23983+T440TPTR EQU *
004C50 00003928 23984+ DC A(T440TDSC) enabled test
23985+*
PAGE 439
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0127BC 23986+TCODE CSECT
0127C0 23987+ DS 0D ensure double word alignment for test
0127C0 23988+T440 DS 0H 01650000
0127C0 90EC D00C 0000C 23989+ STM 14,12,12(13) SAVE REGISTERS 02950000
0127C4 18CF 23990+ LR R12,R15 base register := entry address
127C0 23991+ USING T440,R12 declare code base register
0127C6 41B0 C01E 127DE 23992+ LA R11,T440L load loop target to R11
0127CA 58F0 C0F0 128B0 23993+ L R15,=A(SAVETST) R15 := current save area
0127CE 50DF 0004 00004 23994+ ST R13,4(R15) set back pointer in current save area
0127D2 182D 23995+ LR R2,R13 remember callers save area
0127D4 18DF 23996+ LR R13,R15 setup current save area
0127D6 50D2 0008 00008 23997+ ST R13,8(R2) set forw pointer in callers save area
00000 23998+ USING TDSC,R1 declare TDSC base register
0127DA 58F0 1008 00008 23999+ L R15,TLRCNT load local repeat count to R15
24000+*
24001 *
24002 T440L REPINS ZAP,(T440V1,T440V2) repeat: ZAP T440V1,T440V2
24003+*
24004+* build from sublist &ALIST a comma separated string &ARGS
24005+*
24006+*
24007+*
24008+*
24009+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
24010+* this allows to transfer the repeat count from last TDSCGEN call
24011+*
24012+*
127DE 24013+T440L EQU *
24014+*
24015+* write a comment indicating what REPINS does (in case NOGEN in effect)
24016+*
24017+*,// REPINS: do 30 times:
24018+*
24019+* MNOTE requires that ' is doubled for expanded variables
24020+* thus build &MASTR as a copy of '&ARGS with ' doubled
24021+*
24022+*
24023+*,// ZAP T440V1,T440V2
24024+*
24025+* finally generate code: &ICNT copies of &CODE &ARGS
24026+*
0127DE F844 C0E2 C0E7 128A2 128A7 24027+ ZAP T440V1,T440V2
0127E4 F844 C0E2 C0E7 128A2 128A7 24028+ ZAP T440V1,T440V2
0127EA F844 C0E2 C0E7 128A2 128A7 24029+ ZAP T440V1,T440V2
0127F0 F844 C0E2 C0E7 128A2 128A7 24030+ ZAP T440V1,T440V2
0127F6 F844 C0E2 C0E7 128A2 128A7 24031+ ZAP T440V1,T440V2
0127FC F844 C0E2 C0E7 128A2 128A7 24032+ ZAP T440V1,T440V2
012802 F844 C0E2 C0E7 128A2 128A7 24033+ ZAP T440V1,T440V2
012808 F844 C0E2 C0E7 128A2 128A7 24034+ ZAP T440V1,T440V2
01280E F844 C0E2 C0E7 128A2 128A7 24035+ ZAP T440V1,T440V2
012814 F844 C0E2 C0E7 128A2 128A7 24036+ ZAP T440V1,T440V2
01281A F844 C0E2 C0E7 128A2 128A7 24037+ ZAP T440V1,T440V2
012820 F844 C0E2 C0E7 128A2 128A7 24038+ ZAP T440V1,T440V2
012826 F844 C0E2 C0E7 128A2 128A7 24039+ ZAP T440V1,T440V2
01282C F844 C0E2 C0E7 128A2 128A7 24040+ ZAP T440V1,T440V2
PAGE 440
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012832 F844 C0E2 C0E7 128A2 128A7 24041+ ZAP T440V1,T440V2
012838 F844 C0E2 C0E7 128A2 128A7 24042+ ZAP T440V1,T440V2
01283E F844 C0E2 C0E7 128A2 128A7 24043+ ZAP T440V1,T440V2
012844 F844 C0E2 C0E7 128A2 128A7 24044+ ZAP T440V1,T440V2
01284A F844 C0E2 C0E7 128A2 128A7 24045+ ZAP T440V1,T440V2
012850 F844 C0E2 C0E7 128A2 128A7 24046+ ZAP T440V1,T440V2
012856 F844 C0E2 C0E7 128A2 128A7 24047+ ZAP T440V1,T440V2
01285C F844 C0E2 C0E7 128A2 128A7 24048+ ZAP T440V1,T440V2
012862 F844 C0E2 C0E7 128A2 128A7 24049+ ZAP T440V1,T440V2
012868 F844 C0E2 C0E7 128A2 128A7 24050+ ZAP T440V1,T440V2
01286E F844 C0E2 C0E7 128A2 128A7 24051+ ZAP T440V1,T440V2
012874 F844 C0E2 C0E7 128A2 128A7 24052+ ZAP T440V1,T440V2
01287A F844 C0E2 C0E7 128A2 128A7 24053+ ZAP T440V1,T440V2
012880 F844 C0E2 C0E7 128A2 128A7 24054+ ZAP T440V1,T440V2
012886 F844 C0E2 C0E7 128A2 128A7 24055+ ZAP T440V1,T440V2
01288C F844 C0E2 C0E7 128A2 128A7 24056+ ZAP T440V1,T440V2
24057+*
012892 06FB 24058 BCTR R15,R11
24059 TSIMRET
012894 58F0 C0F0 128B0 24060+ L R15,=A(SAVETST) R15 := current save area
012898 58DF 0004 00004 24061+ L R13,4(R15) get old save area back
01289C 98EC D00C 0000C 24062+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0128A0 07FE 24063+ BR 14 RETURN 02000000
24064 *
0128A2 000000000C 24065 T440V1 DC PL5'0'
0128A7 999999999C 24066 T440V2 DC PL5'999999999'
24067 TSIMEND
0128B0 24068+ LTORG
0128B0 00000458 24069 =A(SAVETST)
128B4 24070+T440TEND EQU *
24071 *
24072 * Test 441 -- ZAP m,m (30d,30d) ----------------------------
24073 *
24074 TSIMBEG T441,1600,30,1,C'ZAP m,m (30d,30d)'
24075+*
003944 24076+TDSCDAT CSECT
003948 24077+ DS 0D
24078+*
003948 000128B8 24079+T441TDSC DC A(T441) // TENTRY
00394C 00000104 24080+ DC A(T441TEND-T441) // TLENGTH
003950 00000640 24081+ DC F'1600' // TLRCNT
003954 0000001E 24082+ DC F'30' // TIGCNT
003958 00000001 24083+ DC F'1' // TLTYPE
001A3C 24084+TEXT CSECT
001A3C E3F4F4F1 24085+SPTR2145 DC C'T441'
00395C 24086+TDSCDAT CSECT
00395C 24087+ DS 0F
00395C 04001A3C 24088+ DC AL1(L'SPTR2145),AL3(SPTR2145)
001A40 24089+TEXT CSECT
001A40 E9C1D740946B9440 24090+SPTR2146 DC C'ZAP m,m (30d,30d)'
003960 24091+TDSCDAT CSECT
003960 24092+ DS 0F
003960 11001A40 24093+ DC AL1(L'SPTR2146),AL3(SPTR2146)
24094+*
004C54 24095+TDSCTBL CSECT
PAGE 441
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
04C54 24096+T441TPTR EQU *
004C54 00003948 24097+ DC A(T441TDSC) enabled test
24098+*
0128B4 24099+TCODE CSECT
0128B8 24100+ DS 0D ensure double word alignment for test
0128B8 24101+T441 DS 0H 01650000
0128B8 90EC D00C 0000C 24102+ STM 14,12,12(13) SAVE REGISTERS 02950000
0128BC 18CF 24103+ LR R12,R15 base register := entry address
128B8 24104+ USING T441,R12 declare code base register
0128BE 41B0 C01E 128D6 24105+ LA R11,T441L load loop target to R11
0128C2 58F0 C100 129B8 24106+ L R15,=A(SAVETST) R15 := current save area
0128C6 50DF 0004 00004 24107+ ST R13,4(R15) set back pointer in current save area
0128CA 182D 24108+ LR R2,R13 remember callers save area
0128CC 18DF 24109+ LR R13,R15 setup current save area
0128CE 50D2 0008 00008 24110+ ST R13,8(R2) set forw pointer in callers save area
00000 24111+ USING TDSC,R1 declare TDSC base register
0128D2 58F0 1008 00008 24112+ L R15,TLRCNT load local repeat count to R15
24113+*
24114 *
24115 T441L REPINS ZAP,(T441V1,T441V2) repeat: ZAP T441V1,T441V2
24116+*
24117+* build from sublist &ALIST a comma separated string &ARGS
24118+*
24119+*
24120+*
24121+*
24122+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
24123+* this allows to transfer the repeat count from last TDSCGEN call
24124+*
24125+*
128D6 24126+T441L EQU *
24127+*
24128+* write a comment indicating what REPINS does (in case NOGEN in effect)
24129+*
24130+*,// REPINS: do 30 times:
24131+*
24132+* MNOTE requires that ' is doubled for expanded variables
24133+* thus build &MASTR as a copy of '&ARGS with ' doubled
24134+*
24135+*
24136+*,// ZAP T441V1,T441V2
24137+*
24138+* finally generate code: &ICNT copies of &CODE &ARGS
24139+*
0128D6 F8EE C0E2 C0F1 1299A 129A9 24140+ ZAP T441V1,T441V2
0128DC F8EE C0E2 C0F1 1299A 129A9 24141+ ZAP T441V1,T441V2
0128E2 F8EE C0E2 C0F1 1299A 129A9 24142+ ZAP T441V1,T441V2
0128E8 F8EE C0E2 C0F1 1299A 129A9 24143+ ZAP T441V1,T441V2
0128EE F8EE C0E2 C0F1 1299A 129A9 24144+ ZAP T441V1,T441V2
0128F4 F8EE C0E2 C0F1 1299A 129A9 24145+ ZAP T441V1,T441V2
0128FA F8EE C0E2 C0F1 1299A 129A9 24146+ ZAP T441V1,T441V2
012900 F8EE C0E2 C0F1 1299A 129A9 24147+ ZAP T441V1,T441V2
012906 F8EE C0E2 C0F1 1299A 129A9 24148+ ZAP T441V1,T441V2
01290C F8EE C0E2 C0F1 1299A 129A9 24149+ ZAP T441V1,T441V2
012912 F8EE C0E2 C0F1 1299A 129A9 24150+ ZAP T441V1,T441V2
PAGE 442
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012918 F8EE C0E2 C0F1 1299A 129A9 24151+ ZAP T441V1,T441V2
01291E F8EE C0E2 C0F1 1299A 129A9 24152+ ZAP T441V1,T441V2
012924 F8EE C0E2 C0F1 1299A 129A9 24153+ ZAP T441V1,T441V2
01292A F8EE C0E2 C0F1 1299A 129A9 24154+ ZAP T441V1,T441V2
012930 F8EE C0E2 C0F1 1299A 129A9 24155+ ZAP T441V1,T441V2
012936 F8EE C0E2 C0F1 1299A 129A9 24156+ ZAP T441V1,T441V2
01293C F8EE C0E2 C0F1 1299A 129A9 24157+ ZAP T441V1,T441V2
012942 F8EE C0E2 C0F1 1299A 129A9 24158+ ZAP T441V1,T441V2
012948 F8EE C0E2 C0F1 1299A 129A9 24159+ ZAP T441V1,T441V2
01294E F8EE C0E2 C0F1 1299A 129A9 24160+ ZAP T441V1,T441V2
012954 F8EE C0E2 C0F1 1299A 129A9 24161+ ZAP T441V1,T441V2
01295A F8EE C0E2 C0F1 1299A 129A9 24162+ ZAP T441V1,T441V2
012960 F8EE C0E2 C0F1 1299A 129A9 24163+ ZAP T441V1,T441V2
012966 F8EE C0E2 C0F1 1299A 129A9 24164+ ZAP T441V1,T441V2
01296C F8EE C0E2 C0F1 1299A 129A9 24165+ ZAP T441V1,T441V2
012972 F8EE C0E2 C0F1 1299A 129A9 24166+ ZAP T441V1,T441V2
012978 F8EE C0E2 C0F1 1299A 129A9 24167+ ZAP T441V1,T441V2
01297E F8EE C0E2 C0F1 1299A 129A9 24168+ ZAP T441V1,T441V2
012984 F8EE C0E2 C0F1 1299A 129A9 24169+ ZAP T441V1,T441V2
24170+*
01298A 06FB 24171 BCTR R15,R11
24172 TSIMRET
01298C 58F0 C100 129B8 24173+ L R15,=A(SAVETST) R15 := current save area
012990 58DF 0004 00004 24174+ L R13,4(R15) get old save area back
012994 98EC D00C 0000C 24175+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012998 07FE 24176+ BR 14 RETURN 02000000
24177 *
01299A 0000000000000000 24178 T441V1 DC PL15'0'
0129A9 0123456789012345 24179 T441V2 DC PL15'1234567890123456789012345677'
24180 TSIMEND
0129B8 24181+ LTORG
0129B8 00000458 24182 =A(SAVETST)
129BC 24183+T441TEND EQU *
24184 *
24185 * Test 442 -- ZAP m,m (10d,30d) ----------------------------
24186 *
24187 TSIMBEG T442,1600,30,1,C'ZAP m,m (10d,30d)'
24188+*
003964 24189+TDSCDAT CSECT
003968 24190+ DS 0D
24191+*
003968 000129C0 24192+T442TDSC DC A(T442) // TENTRY
00396C 000000FC 24193+ DC A(T442TEND-T442) // TLENGTH
003970 00000640 24194+ DC F'1600' // TLRCNT
003974 0000001E 24195+ DC F'30' // TIGCNT
003978 00000001 24196+ DC F'1' // TLTYPE
001A51 24197+TEXT CSECT
001A51 E3F4F4F2 24198+SPTR2157 DC C'T442'
00397C 24199+TDSCDAT CSECT
00397C 24200+ DS 0F
00397C 04001A51 24201+ DC AL1(L'SPTR2157),AL3(SPTR2157)
001A55 24202+TEXT CSECT
001A55 E9C1D740946B9440 24203+SPTR2158 DC C'ZAP m,m (10d,30d)'
003980 24204+TDSCDAT CSECT
003980 24205+ DS 0F
PAGE 443
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003980 11001A55 24206+ DC AL1(L'SPTR2158),AL3(SPTR2158)
24207+*
004C58 24208+TDSCTBL CSECT
04C58 24209+T442TPTR EQU *
004C58 00003968 24210+ DC A(T442TDSC) enabled test
24211+*
0129BC 24212+TCODE CSECT
0129C0 24213+ DS 0D ensure double word alignment for test
0129C0 24214+T442 DS 0H 01650000
0129C0 90EC D00C 0000C 24215+ STM 14,12,12(13) SAVE REGISTERS 02950000
0129C4 18CF 24216+ LR R12,R15 base register := entry address
129C0 24217+ USING T442,R12 declare code base register
0129C6 41B0 C01E 129DE 24218+ LA R11,T442L load loop target to R11
0129CA 58F0 C0F8 12AB8 24219+ L R15,=A(SAVETST) R15 := current save area
0129CE 50DF 0004 00004 24220+ ST R13,4(R15) set back pointer in current save area
0129D2 182D 24221+ LR R2,R13 remember callers save area
0129D4 18DF 24222+ LR R13,R15 setup current save area
0129D6 50D2 0008 00008 24223+ ST R13,8(R2) set forw pointer in callers save area
00000 24224+ USING TDSC,R1 declare TDSC base register
0129DA 58F0 1008 00008 24225+ L R15,TLRCNT load local repeat count to R15
24226+*
24227 *
24228 T442L REPINS ZAP,(T442V1,T442V2) repeat: ZAP T442V1,T442V2
24229+*
24230+* build from sublist &ALIST a comma separated string &ARGS
24231+*
24232+*
24233+*
24234+*
24235+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
24236+* this allows to transfer the repeat count from last TDSCGEN call
24237+*
24238+*
129DE 24239+T442L EQU *
24240+*
24241+* write a comment indicating what REPINS does (in case NOGEN in effect)
24242+*
24243+*,// REPINS: do 30 times:
24244+*
24245+* MNOTE requires that ' is doubled for expanded variables
24246+* thus build &MASTR as a copy of '&ARGS with ' doubled
24247+*
24248+*
24249+*,// ZAP T442V1,T442V2
24250+*
24251+* finally generate code: &ICNT copies of &CODE &ARGS
24252+*
0129DE F84E C0E2 C0E7 12AA2 12AA7 24253+ ZAP T442V1,T442V2
0129E4 F84E C0E2 C0E7 12AA2 12AA7 24254+ ZAP T442V1,T442V2
0129EA F84E C0E2 C0E7 12AA2 12AA7 24255+ ZAP T442V1,T442V2
0129F0 F84E C0E2 C0E7 12AA2 12AA7 24256+ ZAP T442V1,T442V2
0129F6 F84E C0E2 C0E7 12AA2 12AA7 24257+ ZAP T442V1,T442V2
0129FC F84E C0E2 C0E7 12AA2 12AA7 24258+ ZAP T442V1,T442V2
012A02 F84E C0E2 C0E7 12AA2 12AA7 24259+ ZAP T442V1,T442V2
012A08 F84E C0E2 C0E7 12AA2 12AA7 24260+ ZAP T442V1,T442V2
PAGE 444
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012A0E F84E C0E2 C0E7 12AA2 12AA7 24261+ ZAP T442V1,T442V2
012A14 F84E C0E2 C0E7 12AA2 12AA7 24262+ ZAP T442V1,T442V2
012A1A F84E C0E2 C0E7 12AA2 12AA7 24263+ ZAP T442V1,T442V2
012A20 F84E C0E2 C0E7 12AA2 12AA7 24264+ ZAP T442V1,T442V2
012A26 F84E C0E2 C0E7 12AA2 12AA7 24265+ ZAP T442V1,T442V2
012A2C F84E C0E2 C0E7 12AA2 12AA7 24266+ ZAP T442V1,T442V2
012A32 F84E C0E2 C0E7 12AA2 12AA7 24267+ ZAP T442V1,T442V2
012A38 F84E C0E2 C0E7 12AA2 12AA7 24268+ ZAP T442V1,T442V2
012A3E F84E C0E2 C0E7 12AA2 12AA7 24269+ ZAP T442V1,T442V2
012A44 F84E C0E2 C0E7 12AA2 12AA7 24270+ ZAP T442V1,T442V2
012A4A F84E C0E2 C0E7 12AA2 12AA7 24271+ ZAP T442V1,T442V2
012A50 F84E C0E2 C0E7 12AA2 12AA7 24272+ ZAP T442V1,T442V2
012A56 F84E C0E2 C0E7 12AA2 12AA7 24273+ ZAP T442V1,T442V2
012A5C F84E C0E2 C0E7 12AA2 12AA7 24274+ ZAP T442V1,T442V2
012A62 F84E C0E2 C0E7 12AA2 12AA7 24275+ ZAP T442V1,T442V2
012A68 F84E C0E2 C0E7 12AA2 12AA7 24276+ ZAP T442V1,T442V2
012A6E F84E C0E2 C0E7 12AA2 12AA7 24277+ ZAP T442V1,T442V2
012A74 F84E C0E2 C0E7 12AA2 12AA7 24278+ ZAP T442V1,T442V2
012A7A F84E C0E2 C0E7 12AA2 12AA7 24279+ ZAP T442V1,T442V2
012A80 F84E C0E2 C0E7 12AA2 12AA7 24280+ ZAP T442V1,T442V2
012A86 F84E C0E2 C0E7 12AA2 12AA7 24281+ ZAP T442V1,T442V2
012A8C F84E C0E2 C0E7 12AA2 12AA7 24282+ ZAP T442V1,T442V2
24283+*
012A92 06FB 24284 BCTR R15,R11
24285 TSIMRET
012A94 58F0 C0F8 12AB8 24286+ L R15,=A(SAVETST) R15 := current save area
012A98 58DF 0004 00004 24287+ L R13,4(R15) get old save area back
012A9C 98EC D00C 0000C 24288+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012AA0 07FE 24289+ BR 14 RETURN 02000000
24290 *
012AA2 000000000C 24291 T442V1 DC PL5'0'
012AA7 0000000000000000 24292 T442V2 DC PL15'999999999'
24293 TSIMEND
012AB8 24294+ LTORG
012AB8 00000458 24295 =A(SAVETST)
12ABC 24296+T442TEND EQU *
24297 *
24298 * Test 443 -- ZAP m,m (30d,10d) ----------------------------
24299 *
24300 TSIMBEG T443,1600,30,1,C'ZAP m,m (30d,10d)'
24301+*
003984 24302+TDSCDAT CSECT
003988 24303+ DS 0D
24304+*
003988 00012AC0 24305+T443TDSC DC A(T443) // TENTRY
00398C 000000FC 24306+ DC A(T443TEND-T443) // TLENGTH
003990 00000640 24307+ DC F'1600' // TLRCNT
003994 0000001E 24308+ DC F'30' // TIGCNT
003998 00000001 24309+ DC F'1' // TLTYPE
001A66 24310+TEXT CSECT
001A66 E3F4F4F3 24311+SPTR2169 DC C'T443'
00399C 24312+TDSCDAT CSECT
00399C 24313+ DS 0F
00399C 04001A66 24314+ DC AL1(L'SPTR2169),AL3(SPTR2169)
001A6A 24315+TEXT CSECT
PAGE 445
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001A6A E9C1D740946B9440 24316+SPTR2170 DC C'ZAP m,m (30d,10d)'
0039A0 24317+TDSCDAT CSECT
0039A0 24318+ DS 0F
0039A0 11001A6A 24319+ DC AL1(L'SPTR2170),AL3(SPTR2170)
24320+*
004C5C 24321+TDSCTBL CSECT
04C5C 24322+T443TPTR EQU *
004C5C 00003988 24323+ DC A(T443TDSC) enabled test
24324+*
012ABC 24325+TCODE CSECT
012AC0 24326+ DS 0D ensure double word alignment for test
012AC0 24327+T443 DS 0H 01650000
012AC0 90EC D00C 0000C 24328+ STM 14,12,12(13) SAVE REGISTERS 02950000
012AC4 18CF 24329+ LR R12,R15 base register := entry address
12AC0 24330+ USING T443,R12 declare code base register
012AC6 41B0 C01E 12ADE 24331+ LA R11,T443L load loop target to R11
012ACA 58F0 C0F8 12BB8 24332+ L R15,=A(SAVETST) R15 := current save area
012ACE 50DF 0004 00004 24333+ ST R13,4(R15) set back pointer in current save area
012AD2 182D 24334+ LR R2,R13 remember callers save area
012AD4 18DF 24335+ LR R13,R15 setup current save area
012AD6 50D2 0008 00008 24336+ ST R13,8(R2) set forw pointer in callers save area
00000 24337+ USING TDSC,R1 declare TDSC base register
012ADA 58F0 1008 00008 24338+ L R15,TLRCNT load local repeat count to R15
24339+*
24340 *
24341 T443L REPINS ZAP,(T443V1,T443V2) repeat: ZAP T443V1,T443V2
24342+*
24343+* build from sublist &ALIST a comma separated string &ARGS
24344+*
24345+*
24346+*
24347+*
24348+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
24349+* this allows to transfer the repeat count from last TDSCGEN call
24350+*
24351+*
12ADE 24352+T443L EQU *
24353+*
24354+* write a comment indicating what REPINS does (in case NOGEN in effect)
24355+*
24356+*,// REPINS: do 30 times:
24357+*
24358+* MNOTE requires that ' is doubled for expanded variables
24359+* thus build &MASTR as a copy of '&ARGS with ' doubled
24360+*
24361+*
24362+*,// ZAP T443V1,T443V2
24363+*
24364+* finally generate code: &ICNT copies of &CODE &ARGS
24365+*
012ADE F8E4 C0E2 C0F1 12BA2 12BB1 24366+ ZAP T443V1,T443V2
012AE4 F8E4 C0E2 C0F1 12BA2 12BB1 24367+ ZAP T443V1,T443V2
012AEA F8E4 C0E2 C0F1 12BA2 12BB1 24368+ ZAP T443V1,T443V2
012AF0 F8E4 C0E2 C0F1 12BA2 12BB1 24369+ ZAP T443V1,T443V2
012AF6 F8E4 C0E2 C0F1 12BA2 12BB1 24370+ ZAP T443V1,T443V2
PAGE 446
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012AFC F8E4 C0E2 C0F1 12BA2 12BB1 24371+ ZAP T443V1,T443V2
012B02 F8E4 C0E2 C0F1 12BA2 12BB1 24372+ ZAP T443V1,T443V2
012B08 F8E4 C0E2 C0F1 12BA2 12BB1 24373+ ZAP T443V1,T443V2
012B0E F8E4 C0E2 C0F1 12BA2 12BB1 24374+ ZAP T443V1,T443V2
012B14 F8E4 C0E2 C0F1 12BA2 12BB1 24375+ ZAP T443V1,T443V2
012B1A F8E4 C0E2 C0F1 12BA2 12BB1 24376+ ZAP T443V1,T443V2
012B20 F8E4 C0E2 C0F1 12BA2 12BB1 24377+ ZAP T443V1,T443V2
012B26 F8E4 C0E2 C0F1 12BA2 12BB1 24378+ ZAP T443V1,T443V2
012B2C F8E4 C0E2 C0F1 12BA2 12BB1 24379+ ZAP T443V1,T443V2
012B32 F8E4 C0E2 C0F1 12BA2 12BB1 24380+ ZAP T443V1,T443V2
012B38 F8E4 C0E2 C0F1 12BA2 12BB1 24381+ ZAP T443V1,T443V2
012B3E F8E4 C0E2 C0F1 12BA2 12BB1 24382+ ZAP T443V1,T443V2
012B44 F8E4 C0E2 C0F1 12BA2 12BB1 24383+ ZAP T443V1,T443V2
012B4A F8E4 C0E2 C0F1 12BA2 12BB1 24384+ ZAP T443V1,T443V2
012B50 F8E4 C0E2 C0F1 12BA2 12BB1 24385+ ZAP T443V1,T443V2
012B56 F8E4 C0E2 C0F1 12BA2 12BB1 24386+ ZAP T443V1,T443V2
012B5C F8E4 C0E2 C0F1 12BA2 12BB1 24387+ ZAP T443V1,T443V2
012B62 F8E4 C0E2 C0F1 12BA2 12BB1 24388+ ZAP T443V1,T443V2
012B68 F8E4 C0E2 C0F1 12BA2 12BB1 24389+ ZAP T443V1,T443V2
012B6E F8E4 C0E2 C0F1 12BA2 12BB1 24390+ ZAP T443V1,T443V2
012B74 F8E4 C0E2 C0F1 12BA2 12BB1 24391+ ZAP T443V1,T443V2
012B7A F8E4 C0E2 C0F1 12BA2 12BB1 24392+ ZAP T443V1,T443V2
012B80 F8E4 C0E2 C0F1 12BA2 12BB1 24393+ ZAP T443V1,T443V2
012B86 F8E4 C0E2 C0F1 12BA2 12BB1 24394+ ZAP T443V1,T443V2
012B8C F8E4 C0E2 C0F1 12BA2 12BB1 24395+ ZAP T443V1,T443V2
24396+*
012B92 06FB 24397 BCTR R15,R11
24398 TSIMRET
012B94 58F0 C0F8 12BB8 24399+ L R15,=A(SAVETST) R15 := current save area
012B98 58DF 0004 00004 24400+ L R13,4(R15) get old save area back
012B9C 98EC D00C 0000C 24401+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012BA0 07FE 24402+ BR 14 RETURN 02000000
24403 *
012BA2 0000000000000000 24404 T443V1 DC PL15'0'
012BB1 999999999C 24405 T443V2 DC PL5'999999999'
24406 TSIMEND
012BB8 24407+ LTORG
012BB8 00000458 24408 =A(SAVETST)
12BBC 24409+T443TEND EQU *
24410 *
24411 * Test 445 -- SRP m,i,i (30d,<<) -------------------------
24412 *
24413 TSIMBEG T445,1600,25,8,C'SRP m,i,i (30d,<<)'
24414+*
0039A4 24415+TDSCDAT CSECT
0039A8 24416+ DS 0D
24417+*
0039A8 00012BC0 24418+T445TDSC DC A(T445) // TENTRY
0039AC 000000EC 24419+ DC A(T445TEND-T445) // TLENGTH
0039B0 00000640 24420+ DC F'1600' // TLRCNT
0039B4 00000019 24421+ DC F'25' // TIGCNT
0039B8 00000008 24422+ DC F'8' // TLTYPE
001A7B 24423+TEXT CSECT
001A7B E3F4F4F5 24424+SPTR2181 DC C'T445'
0039BC 24425+TDSCDAT CSECT
PAGE 447
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0039BC 24426+ DS 0F
0039BC 04001A7B 24427+ DC AL1(L'SPTR2181),AL3(SPTR2181)
001A7F 24428+TEXT CSECT
001A7F E2D9D740946B896B 24429+SPTR2182 DC C'SRP m,i,i (30d,<<)'
0039C0 24430+TDSCDAT CSECT
0039C0 24431+ DS 0F
0039C0 12001A7F 24432+ DC AL1(L'SPTR2182),AL3(SPTR2182)
24433+*
004C60 24434+TDSCTBL CSECT
04C60 24435+T445TPTR EQU *
004C60 000039A8 24436+ DC A(T445TDSC) enabled test
24437+*
012BBC 24438+TCODE CSECT
012BC0 24439+ DS 0D ensure double word alignment for test
012BC0 24440+T445 DS 0H 01650000
012BC0 90EC D00C 0000C 24441+ STM 14,12,12(13) SAVE REGISTERS 02950000
012BC4 18CF 24442+ LR R12,R15 base register := entry address
12BC0 24443+ USING T445,R12 declare code base register
012BC6 41B0 C01E 12BDE 24444+ LA R11,T445L load loop target to R11
012BCA 58F0 C0E8 12CA8 24445+ L R15,=A(SAVETST) R15 := current save area
012BCE 50DF 0004 00004 24446+ ST R13,4(R15) set back pointer in current save area
012BD2 182D 24447+ LR R2,R13 remember callers save area
012BD4 18DF 24448+ LR R13,R15 setup current save area
012BD6 50D2 0008 00008 24449+ ST R13,8(R2) set forw pointer in callers save area
00000 24450+ USING TDSC,R1 declare TDSC base register
012BDA 58F0 1008 00008 24451+ L R15,TLRCNT load local repeat count to R15
24452+*
24453 *
012BDE D20E C0CA C0D9 12C8A 12C99 24454 T445L MVC T445V1,T445V2
24455 REPINS SRP,(T445V1,1,0) repeat: SRP T445V1,1,0
24456+*
24457+* build from sublist &ALIST a comma separated string &ARGS
24458+*
24459+*
24460+*
24461+*
24462+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
24463+* this allows to transfer the repeat count from last TDSCGEN call
24464+*
24465+*
24466+*
24467+* write a comment indicating what REPINS does (in case NOGEN in effect)
24468+*
24469+*,// REPINS: do 25 times:
24470+*
24471+* MNOTE requires that ' is doubled for expanded variables
24472+* thus build &MASTR as a copy of '&ARGS with ' doubled
24473+*
24474+*
24475+*,// SRP T445V1,1,0
24476+*
24477+* finally generate code: &ICNT copies of &CODE &ARGS
24478+*
012BE4 F0E0 C0CA 0001 12C8A 00001 24479+ SRP T445V1,1,0
012BEA F0E0 C0CA 0001 12C8A 00001 24480+ SRP T445V1,1,0
PAGE 448
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012BF0 F0E0 C0CA 0001 12C8A 00001 24481+ SRP T445V1,1,0
012BF6 F0E0 C0CA 0001 12C8A 00001 24482+ SRP T445V1,1,0
012BFC F0E0 C0CA 0001 12C8A 00001 24483+ SRP T445V1,1,0
012C02 F0E0 C0CA 0001 12C8A 00001 24484+ SRP T445V1,1,0
012C08 F0E0 C0CA 0001 12C8A 00001 24485+ SRP T445V1,1,0
012C0E F0E0 C0CA 0001 12C8A 00001 24486+ SRP T445V1,1,0
012C14 F0E0 C0CA 0001 12C8A 00001 24487+ SRP T445V1,1,0
012C1A F0E0 C0CA 0001 12C8A 00001 24488+ SRP T445V1,1,0
012C20 F0E0 C0CA 0001 12C8A 00001 24489+ SRP T445V1,1,0
012C26 F0E0 C0CA 0001 12C8A 00001 24490+ SRP T445V1,1,0
012C2C F0E0 C0CA 0001 12C8A 00001 24491+ SRP T445V1,1,0
012C32 F0E0 C0CA 0001 12C8A 00001 24492+ SRP T445V1,1,0
012C38 F0E0 C0CA 0001 12C8A 00001 24493+ SRP T445V1,1,0
012C3E F0E0 C0CA 0001 12C8A 00001 24494+ SRP T445V1,1,0
012C44 F0E0 C0CA 0001 12C8A 00001 24495+ SRP T445V1,1,0
012C4A F0E0 C0CA 0001 12C8A 00001 24496+ SRP T445V1,1,0
012C50 F0E0 C0CA 0001 12C8A 00001 24497+ SRP T445V1,1,0
012C56 F0E0 C0CA 0001 12C8A 00001 24498+ SRP T445V1,1,0
012C5C F0E0 C0CA 0001 12C8A 00001 24499+ SRP T445V1,1,0
012C62 F0E0 C0CA 0001 12C8A 00001 24500+ SRP T445V1,1,0
012C68 F0E0 C0CA 0001 12C8A 00001 24501+ SRP T445V1,1,0
012C6E F0E0 C0CA 0001 12C8A 00001 24502+ SRP T445V1,1,0
012C74 F0E0 C0CA 0001 12C8A 00001 24503+ SRP T445V1,1,0
24504+*
012C7A 06FB 24505 BCTR R15,R11
24506 TSIMRET
012C7C 58F0 C0E8 12CA8 24507+ L R15,=A(SAVETST) R15 := current save area
012C80 58DF 0004 00004 24508+ L R13,4(R15) get old save area back
012C84 98EC D00C 0000C 24509+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012C88 07FE 24510+ BR 14 RETURN 02000000
24511 *
012C8A 0000000000000000 24512 T445V1 DC PL15'0'
012C99 0000000000000000 24513 T445V2 DC PL15'1'
24514 TSIMEND
012CA8 24515+ LTORG
012CA8 00000458 24516 =A(SAVETST)
12CAC 24517+T445TEND EQU *
24518 *
24519 * Test 446 -- SRP m,i,i (30d,>>) ---------------------------
24520 *
24521 TSIMBEG T446,1000,25,8,C'SRP m,i,i (30d,>>)'
24522+*
0039C4 24523+TDSCDAT CSECT
0039C8 24524+ DS 0D
24525+*
0039C8 00012CB0 24526+T446TDSC DC A(T446) // TENTRY
0039CC 000000EC 24527+ DC A(T446TEND-T446) // TLENGTH
0039D0 000003E8 24528+ DC F'1000' // TLRCNT
0039D4 00000019 24529+ DC F'25' // TIGCNT
0039D8 00000008 24530+ DC F'8' // TLTYPE
001A91 24531+TEXT CSECT
001A91 E3F4F4F6 24532+SPTR2193 DC C'T446'
0039DC 24533+TDSCDAT CSECT
0039DC 24534+ DS 0F
0039DC 04001A91 24535+ DC AL1(L'SPTR2193),AL3(SPTR2193)
PAGE 449
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001A95 24536+TEXT CSECT
001A95 E2D9D740946B896B 24537+SPTR2194 DC C'SRP m,i,i (30d,>>)'
0039E0 24538+TDSCDAT CSECT
0039E0 24539+ DS 0F
0039E0 12001A95 24540+ DC AL1(L'SPTR2194),AL3(SPTR2194)
24541+*
004C64 24542+TDSCTBL CSECT
04C64 24543+T446TPTR EQU *
004C64 000039C8 24544+ DC A(T446TDSC) enabled test
24545+*
012CAC 24546+TCODE CSECT
012CB0 24547+ DS 0D ensure double word alignment for test
012CB0 24548+T446 DS 0H 01650000
012CB0 90EC D00C 0000C 24549+ STM 14,12,12(13) SAVE REGISTERS 02950000
012CB4 18CF 24550+ LR R12,R15 base register := entry address
12CB0 24551+ USING T446,R12 declare code base register
012CB6 41B0 C01E 12CCE 24552+ LA R11,T446L load loop target to R11
012CBA 58F0 C0E8 12D98 24553+ L R15,=A(SAVETST) R15 := current save area
012CBE 50DF 0004 00004 24554+ ST R13,4(R15) set back pointer in current save area
012CC2 182D 24555+ LR R2,R13 remember callers save area
012CC4 18DF 24556+ LR R13,R15 setup current save area
012CC6 50D2 0008 00008 24557+ ST R13,8(R2) set forw pointer in callers save area
00000 24558+ USING TDSC,R1 declare TDSC base register
012CCA 58F0 1008 00008 24559+ L R15,TLRCNT load local repeat count to R15
24560+*
24561 *
012CCE D20E C0CA C0D9 12D7A 12D89 24562 T446L MVC T446V1,T446V2
24563 REPINS SRP,(T446V1,64-1,5) repeat: SRP T446V1,64-1,5
24564+*
24565+* build from sublist &ALIST a comma separated string &ARGS
24566+*
24567+*
24568+*
24569+*
24570+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
24571+* this allows to transfer the repeat count from last TDSCGEN call
24572+*
24573+*
24574+*
24575+* write a comment indicating what REPINS does (in case NOGEN in effect)
24576+*
24577+*,// REPINS: do 25 times:
24578+*
24579+* MNOTE requires that ' is doubled for expanded variables
24580+* thus build &MASTR as a copy of '&ARGS with ' doubled
24581+*
24582+*
24583+*,// SRP T446V1,64-1,5
24584+*
24585+* finally generate code: &ICNT copies of &CODE &ARGS
24586+*
012CD4 F0E5 C0CA 003F 12D7A 0003F 24587+ SRP T446V1,64-1,5
012CDA F0E5 C0CA 003F 12D7A 0003F 24588+ SRP T446V1,64-1,5
012CE0 F0E5 C0CA 003F 12D7A 0003F 24589+ SRP T446V1,64-1,5
012CE6 F0E5 C0CA 003F 12D7A 0003F 24590+ SRP T446V1,64-1,5
PAGE 450
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012CEC F0E5 C0CA 003F 12D7A 0003F 24591+ SRP T446V1,64-1,5
012CF2 F0E5 C0CA 003F 12D7A 0003F 24592+ SRP T446V1,64-1,5
012CF8 F0E5 C0CA 003F 12D7A 0003F 24593+ SRP T446V1,64-1,5
012CFE F0E5 C0CA 003F 12D7A 0003F 24594+ SRP T446V1,64-1,5
012D04 F0E5 C0CA 003F 12D7A 0003F 24595+ SRP T446V1,64-1,5
012D0A F0E5 C0CA 003F 12D7A 0003F 24596+ SRP T446V1,64-1,5
012D10 F0E5 C0CA 003F 12D7A 0003F 24597+ SRP T446V1,64-1,5
012D16 F0E5 C0CA 003F 12D7A 0003F 24598+ SRP T446V1,64-1,5
012D1C F0E5 C0CA 003F 12D7A 0003F 24599+ SRP T446V1,64-1,5
012D22 F0E5 C0CA 003F 12D7A 0003F 24600+ SRP T446V1,64-1,5
012D28 F0E5 C0CA 003F 12D7A 0003F 24601+ SRP T446V1,64-1,5
012D2E F0E5 C0CA 003F 12D7A 0003F 24602+ SRP T446V1,64-1,5
012D34 F0E5 C0CA 003F 12D7A 0003F 24603+ SRP T446V1,64-1,5
012D3A F0E5 C0CA 003F 12D7A 0003F 24604+ SRP T446V1,64-1,5
012D40 F0E5 C0CA 003F 12D7A 0003F 24605+ SRP T446V1,64-1,5
012D46 F0E5 C0CA 003F 12D7A 0003F 24606+ SRP T446V1,64-1,5
012D4C F0E5 C0CA 003F 12D7A 0003F 24607+ SRP T446V1,64-1,5
012D52 F0E5 C0CA 003F 12D7A 0003F 24608+ SRP T446V1,64-1,5
012D58 F0E5 C0CA 003F 12D7A 0003F 24609+ SRP T446V1,64-1,5
012D5E F0E5 C0CA 003F 12D7A 0003F 24610+ SRP T446V1,64-1,5
012D64 F0E5 C0CA 003F 12D7A 0003F 24611+ SRP T446V1,64-1,5
24612+*
012D6A 06FB 24613 BCTR R15,R11
24614 TSIMRET
012D6C 58F0 C0E8 12D98 24615+ L R15,=A(SAVETST) R15 := current save area
012D70 58DF 0004 00004 24616+ L R13,4(R15) get old save area back
012D74 98EC D00C 0000C 24617+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012D78 07FE 24618+ BR 14 RETURN 02000000
24619 *
012D7A 0000000000000000 24620 T446V1 DC PL15'0'
012D89 0001919191919191 24621 T446V2 DC PL15'19191919191919191919191919'
24622 TSIMEND
012D98 24623+ LTORG
012D98 00000458 24624 =A(SAVETST)
12D9C 24625+T446TEND EQU *
24626 *
24627 * Test 450 -- MVO m,m (10d) --------------------------------
24628 *
24629 TSIMBEG T450,5000,20,1,C'MVO m,m (10d)'
24630+*
0039E4 24631+TDSCDAT CSECT
0039E8 24632+ DS 0D
24633+*
0039E8 00012DA0 24634+T450TDSC DC A(T450) // TENTRY
0039EC 000000B4 24635+ DC A(T450TEND-T450) // TLENGTH
0039F0 00001388 24636+ DC F'5000' // TLRCNT
0039F4 00000014 24637+ DC F'20' // TIGCNT
0039F8 00000001 24638+ DC F'1' // TLTYPE
001AA7 24639+TEXT CSECT
001AA7 E3F4F5F0 24640+SPTR2205 DC C'T450'
0039FC 24641+TDSCDAT CSECT
0039FC 24642+ DS 0F
0039FC 04001AA7 24643+ DC AL1(L'SPTR2205),AL3(SPTR2205)
001AAB 24644+TEXT CSECT
001AAB D4E5D640946B9440 24645+SPTR2206 DC C'MVO m,m (10d)'
PAGE 451
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003A00 24646+TDSCDAT CSECT
003A00 24647+ DS 0F
003A00 0D001AAB 24648+ DC AL1(L'SPTR2206),AL3(SPTR2206)
24649+*
004C68 24650+TDSCTBL CSECT
04C68 24651+T450TPTR EQU *
004C68 000039E8 24652+ DC A(T450TDSC) enabled test
24653+*
012D9C 24654+TCODE CSECT
012DA0 24655+ DS 0D ensure double word alignment for test
012DA0 24656+T450 DS 0H 01650000
012DA0 90EC D00C 0000C 24657+ STM 14,12,12(13) SAVE REGISTERS 02950000
012DA4 18CF 24658+ LR R12,R15 base register := entry address
12DA0 24659+ USING T450,R12 declare code base register
012DA6 41B0 C01E 12DBE 24660+ LA R11,T450L load loop target to R11
012DAA 58F0 C0B0 12E50 24661+ L R15,=A(SAVETST) R15 := current save area
012DAE 50DF 0004 00004 24662+ ST R13,4(R15) set back pointer in current save area
012DB2 182D 24663+ LR R2,R13 remember callers save area
012DB4 18DF 24664+ LR R13,R15 setup current save area
012DB6 50D2 0008 00008 24665+ ST R13,8(R2) set forw pointer in callers save area
00000 24666+ USING TDSC,R1 declare TDSC base register
012DBA 58F0 1008 00008 24667+ L R15,TLRCNT load local repeat count to R15
24668+*
24669 *
24670 T450L REPINS MVO,(T450V1,T450V2) repeat: MVO T450V1,T450V2
24671+*
24672+* build from sublist &ALIST a comma separated string &ARGS
24673+*
24674+*
24675+*
24676+*
24677+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
24678+* this allows to transfer the repeat count from last TDSCGEN call
24679+*
24680+*
12DBE 24681+T450L EQU *
24682+*
24683+* write a comment indicating what REPINS does (in case NOGEN in effect)
24684+*
24685+*,// REPINS: do 20 times:
24686+*
24687+* MNOTE requires that ' is doubled for expanded variables
24688+* thus build &MASTR as a copy of '&ARGS with ' doubled
24689+*
24690+*
24691+*,// MVO T450V1,T450V2
24692+*
24693+* finally generate code: &ICNT copies of &CODE &ARGS
24694+*
012DBE F144 C0A6 C0AB 12E46 12E4B 24695+ MVO T450V1,T450V2
012DC4 F144 C0A6 C0AB 12E46 12E4B 24696+ MVO T450V1,T450V2
012DCA F144 C0A6 C0AB 12E46 12E4B 24697+ MVO T450V1,T450V2
012DD0 F144 C0A6 C0AB 12E46 12E4B 24698+ MVO T450V1,T450V2
012DD6 F144 C0A6 C0AB 12E46 12E4B 24699+ MVO T450V1,T450V2
012DDC F144 C0A6 C0AB 12E46 12E4B 24700+ MVO T450V1,T450V2
PAGE 452
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012DE2 F144 C0A6 C0AB 12E46 12E4B 24701+ MVO T450V1,T450V2
012DE8 F144 C0A6 C0AB 12E46 12E4B 24702+ MVO T450V1,T450V2
012DEE F144 C0A6 C0AB 12E46 12E4B 24703+ MVO T450V1,T450V2
012DF4 F144 C0A6 C0AB 12E46 12E4B 24704+ MVO T450V1,T450V2
012DFA F144 C0A6 C0AB 12E46 12E4B 24705+ MVO T450V1,T450V2
012E00 F144 C0A6 C0AB 12E46 12E4B 24706+ MVO T450V1,T450V2
012E06 F144 C0A6 C0AB 12E46 12E4B 24707+ MVO T450V1,T450V2
012E0C F144 C0A6 C0AB 12E46 12E4B 24708+ MVO T450V1,T450V2
012E12 F144 C0A6 C0AB 12E46 12E4B 24709+ MVO T450V1,T450V2
012E18 F144 C0A6 C0AB 12E46 12E4B 24710+ MVO T450V1,T450V2
012E1E F144 C0A6 C0AB 12E46 12E4B 24711+ MVO T450V1,T450V2
012E24 F144 C0A6 C0AB 12E46 12E4B 24712+ MVO T450V1,T450V2
012E2A F144 C0A6 C0AB 12E46 12E4B 24713+ MVO T450V1,T450V2
012E30 F144 C0A6 C0AB 12E46 12E4B 24714+ MVO T450V1,T450V2
24715+*
012E36 06FB 24716 BCTR R15,R11
24717 TSIMRET
012E38 58F0 C0B0 12E50 24718+ L R15,=A(SAVETST) R15 := current save area
012E3C 58DF 0004 00004 24719+ L R13,4(R15) get old save area back
012E40 98EC D00C 0000C 24720+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012E44 07FE 24721+ BR 14 RETURN 02000000
24722 *
012E46 000000123C 24723 T450V1 DC PL5'123'
012E4B 000004567C 24724 T450V2 DC PL5'4567'
24725 TSIMEND
012E50 24726+ LTORG
012E50 00000458 24727 =A(SAVETST)
12E54 24728+T450TEND EQU *
24729 *
24730 * Test 451 -- MVO m,m (30d) --------------------------------
24731 *
24732 TSIMBEG T451,2000,20,1,C'MVO m,m (30d)'
24733+*
003A04 24734+TDSCDAT CSECT
003A08 24735+ DS 0D
24736+*
003A08 00012E58 24737+T451TDSC DC A(T451) // TENTRY
003A0C 000000CC 24738+ DC A(T451TEND-T451) // TLENGTH
003A10 000007D0 24739+ DC F'2000' // TLRCNT
003A14 00000014 24740+ DC F'20' // TIGCNT
003A18 00000001 24741+ DC F'1' // TLTYPE
001AB8 24742+TEXT CSECT
001AB8 E3F4F5F1 24743+SPTR2217 DC C'T451'
003A1C 24744+TDSCDAT CSECT
003A1C 24745+ DS 0F
003A1C 04001AB8 24746+ DC AL1(L'SPTR2217),AL3(SPTR2217)
001ABC 24747+TEXT CSECT
001ABC D4E5D640946B9440 24748+SPTR2218 DC C'MVO m,m (30d)'
003A20 24749+TDSCDAT CSECT
003A20 24750+ DS 0F
003A20 0D001ABC 24751+ DC AL1(L'SPTR2218),AL3(SPTR2218)
24752+*
004C6C 24753+TDSCTBL CSECT
04C6C 24754+T451TPTR EQU *
004C6C 00003A08 24755+ DC A(T451TDSC) enabled test
PAGE 453
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
24756+*
012E54 24757+TCODE CSECT
012E58 24758+ DS 0D ensure double word alignment for test
012E58 24759+T451 DS 0H 01650000
012E58 90EC D00C 0000C 24760+ STM 14,12,12(13) SAVE REGISTERS 02950000
012E5C 18CF 24761+ LR R12,R15 base register := entry address
12E58 24762+ USING T451,R12 declare code base register
012E5E 41B0 C01E 12E76 24763+ LA R11,T451L load loop target to R11
012E62 58F0 C0C8 12F20 24764+ L R15,=A(SAVETST) R15 := current save area
012E66 50DF 0004 00004 24765+ ST R13,4(R15) set back pointer in current save area
012E6A 182D 24766+ LR R2,R13 remember callers save area
012E6C 18DF 24767+ LR R13,R15 setup current save area
012E6E 50D2 0008 00008 24768+ ST R13,8(R2) set forw pointer in callers save area
00000 24769+ USING TDSC,R1 declare TDSC base register
012E72 58F0 1008 00008 24770+ L R15,TLRCNT load local repeat count to R15
24771+*
24772 *
24773 T451L REPINS MVO,(T451V1,T451V2) repeat: MVO T451V1,T451V2
24774+*
24775+* build from sublist &ALIST a comma separated string &ARGS
24776+*
24777+*
24778+*
24779+*
24780+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
24781+* this allows to transfer the repeat count from last TDSCGEN call
24782+*
24783+*
12E76 24784+T451L EQU *
24785+*
24786+* write a comment indicating what REPINS does (in case NOGEN in effect)
24787+*
24788+*,// REPINS: do 20 times:
24789+*
24790+* MNOTE requires that ' is doubled for expanded variables
24791+* thus build &MASTR as a copy of '&ARGS with ' doubled
24792+*
24793+*
24794+*,// MVO T451V1,T451V2
24795+*
24796+* finally generate code: &ICNT copies of &CODE &ARGS
24797+*
012E76 F1EE C0A6 C0B5 12EFE 12F0D 24798+ MVO T451V1,T451V2
012E7C F1EE C0A6 C0B5 12EFE 12F0D 24799+ MVO T451V1,T451V2
012E82 F1EE C0A6 C0B5 12EFE 12F0D 24800+ MVO T451V1,T451V2
012E88 F1EE C0A6 C0B5 12EFE 12F0D 24801+ MVO T451V1,T451V2
012E8E F1EE C0A6 C0B5 12EFE 12F0D 24802+ MVO T451V1,T451V2
012E94 F1EE C0A6 C0B5 12EFE 12F0D 24803+ MVO T451V1,T451V2
012E9A F1EE C0A6 C0B5 12EFE 12F0D 24804+ MVO T451V1,T451V2
012EA0 F1EE C0A6 C0B5 12EFE 12F0D 24805+ MVO T451V1,T451V2
012EA6 F1EE C0A6 C0B5 12EFE 12F0D 24806+ MVO T451V1,T451V2
012EAC F1EE C0A6 C0B5 12EFE 12F0D 24807+ MVO T451V1,T451V2
012EB2 F1EE C0A6 C0B5 12EFE 12F0D 24808+ MVO T451V1,T451V2
012EB8 F1EE C0A6 C0B5 12EFE 12F0D 24809+ MVO T451V1,T451V2
012EBE F1EE C0A6 C0B5 12EFE 12F0D 24810+ MVO T451V1,T451V2
PAGE 454
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012EC4 F1EE C0A6 C0B5 12EFE 12F0D 24811+ MVO T451V1,T451V2
012ECA F1EE C0A6 C0B5 12EFE 12F0D 24812+ MVO T451V1,T451V2
012ED0 F1EE C0A6 C0B5 12EFE 12F0D 24813+ MVO T451V1,T451V2
012ED6 F1EE C0A6 C0B5 12EFE 12F0D 24814+ MVO T451V1,T451V2
012EDC F1EE C0A6 C0B5 12EFE 12F0D 24815+ MVO T451V1,T451V2
012EE2 F1EE C0A6 C0B5 12EFE 12F0D 24816+ MVO T451V1,T451V2
012EE8 F1EE C0A6 C0B5 12EFE 12F0D 24817+ MVO T451V1,T451V2
24818+*
012EEE 06FB 24819 BCTR R15,R11
24820 TSIMRET
012EF0 58F0 C0C8 12F20 24821+ L R15,=A(SAVETST) R15 := current save area
012EF4 58DF 0004 00004 24822+ L R13,4(R15) get old save area back
012EF8 98EC D00C 0000C 24823+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
012EFC 07FE 24824+ BR 14 RETURN 02000000
24825 *
012EFE 0000000000000000 24826 T451V1 DC PL15'123'
012F0D 0001919191919191 24827 T451V2 DC PL15'19191919191919191919191919'
24828 TSIMEND
012F20 24829+ LTORG
012F20 00000458 24830 =A(SAVETST)
12F24 24831+T451TEND EQU *
24832 *
24833 * Test 5xx -- floating point ====================================
24834 *
24835 * Test 50x -- short float load/store =======================
24836 *
24837 * Test 500 -- LER R,R --------------------------------------
24838 *
24839 TSIMBEG T500,10000,100,1,C'LER R,R'
24840+*
003A24 24841+TDSCDAT CSECT
003A28 24842+ DS 0D
24843+*
003A28 00012F28 24844+T500TDSC DC A(T500) // TENTRY
003A2C 00000108 24845+ DC A(T500TEND-T500) // TLENGTH
003A30 00002710 24846+ DC F'10000' // TLRCNT
003A34 00000064 24847+ DC F'100' // TIGCNT
003A38 00000001 24848+ DC F'1' // TLTYPE
001AC9 24849+TEXT CSECT
001AC9 E3F5F0F0 24850+SPTR2229 DC C'T500'
003A3C 24851+TDSCDAT CSECT
003A3C 24852+ DS 0F
003A3C 04001AC9 24853+ DC AL1(L'SPTR2229),AL3(SPTR2229)
001ACD 24854+TEXT CSECT
001ACD D3C5D940D96BD9 24855+SPTR2230 DC C'LER R,R'
003A40 24856+TDSCDAT CSECT
003A40 24857+ DS 0F
003A40 07001ACD 24858+ DC AL1(L'SPTR2230),AL3(SPTR2230)
24859+*
004C70 24860+TDSCTBL CSECT
04C70 24861+T500TPTR EQU *
004C70 00003A28 24862+ DC A(T500TDSC) enabled test
24863+*
012F24 24864+TCODE CSECT
012F28 24865+ DS 0D ensure double word alignment for test
PAGE 455
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012F28 24866+T500 DS 0H 01650000
012F28 90EC D00C 0000C 24867+ STM 14,12,12(13) SAVE REGISTERS 02950000
012F2C 18CF 24868+ LR R12,R15 base register := entry address
12F28 24869+ USING T500,R12 declare code base register
012F2E 41B0 C022 12F4A 24870+ LA R11,T500L load loop target to R11
012F32 58F0 C100 13028 24871+ L R15,=A(SAVETST) R15 := current save area
012F36 50DF 0004 00004 24872+ ST R13,4(R15) set back pointer in current save area
012F3A 182D 24873+ LR R2,R13 remember callers save area
012F3C 18DF 24874+ LR R13,R15 setup current save area
012F3E 50D2 0008 00008 24875+ ST R13,8(R2) set forw pointer in callers save area
00000 24876+ USING TDSC,R1 declare TDSC base register
012F42 58F0 1008 00008 24877+ L R15,TLRCNT load local repeat count to R15
24878+*
24879 *
012F46 7820 C104 1302C 24880 LE FR2,=E'1.1'
24881 T500L REPINS LER,(FR0,FR2) repeat: LER FR0,FR2
24882+*
24883+* build from sublist &ALIST a comma separated string &ARGS
24884+*
24885+*
24886+*
24887+*
24888+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
24889+* this allows to transfer the repeat count from last TDSCGEN call
24890+*
24891+*
12F4A 24892+T500L EQU *
24893+*
24894+* write a comment indicating what REPINS does (in case NOGEN in effect)
24895+*
24896+*,// REPINS: do 100 times:
24897+*
24898+* MNOTE requires that ' is doubled for expanded variables
24899+* thus build &MASTR as a copy of '&ARGS with ' doubled
24900+*
24901+*
24902+*,// LER FR0,FR2
24903+*
24904+* finally generate code: &ICNT copies of &CODE &ARGS
24905+*
012F4A 3802 24906+ LER FR0,FR2
012F4C 3802 24907+ LER FR0,FR2
012F4E 3802 24908+ LER FR0,FR2
012F50 3802 24909+ LER FR0,FR2
012F52 3802 24910+ LER FR0,FR2
012F54 3802 24911+ LER FR0,FR2
012F56 3802 24912+ LER FR0,FR2
012F58 3802 24913+ LER FR0,FR2
012F5A 3802 24914+ LER FR0,FR2
012F5C 3802 24915+ LER FR0,FR2
012F5E 3802 24916+ LER FR0,FR2
012F60 3802 24917+ LER FR0,FR2
012F62 3802 24918+ LER FR0,FR2
012F64 3802 24919+ LER FR0,FR2
012F66 3802 24920+ LER FR0,FR2
PAGE 456
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012F68 3802 24921+ LER FR0,FR2
012F6A 3802 24922+ LER FR0,FR2
012F6C 3802 24923+ LER FR0,FR2
012F6E 3802 24924+ LER FR0,FR2
012F70 3802 24925+ LER FR0,FR2
012F72 3802 24926+ LER FR0,FR2
012F74 3802 24927+ LER FR0,FR2
012F76 3802 24928+ LER FR0,FR2
012F78 3802 24929+ LER FR0,FR2
012F7A 3802 24930+ LER FR0,FR2
012F7C 3802 24931+ LER FR0,FR2
012F7E 3802 24932+ LER FR0,FR2
012F80 3802 24933+ LER FR0,FR2
012F82 3802 24934+ LER FR0,FR2
012F84 3802 24935+ LER FR0,FR2
012F86 3802 24936+ LER FR0,FR2
012F88 3802 24937+ LER FR0,FR2
012F8A 3802 24938+ LER FR0,FR2
012F8C 3802 24939+ LER FR0,FR2
012F8E 3802 24940+ LER FR0,FR2
012F90 3802 24941+ LER FR0,FR2
012F92 3802 24942+ LER FR0,FR2
012F94 3802 24943+ LER FR0,FR2
012F96 3802 24944+ LER FR0,FR2
012F98 3802 24945+ LER FR0,FR2
012F9A 3802 24946+ LER FR0,FR2
012F9C 3802 24947+ LER FR0,FR2
012F9E 3802 24948+ LER FR0,FR2
012FA0 3802 24949+ LER FR0,FR2
012FA2 3802 24950+ LER FR0,FR2
012FA4 3802 24951+ LER FR0,FR2
012FA6 3802 24952+ LER FR0,FR2
012FA8 3802 24953+ LER FR0,FR2
012FAA 3802 24954+ LER FR0,FR2
012FAC 3802 24955+ LER FR0,FR2
012FAE 3802 24956+ LER FR0,FR2
012FB0 3802 24957+ LER FR0,FR2
012FB2 3802 24958+ LER FR0,FR2
012FB4 3802 24959+ LER FR0,FR2
012FB6 3802 24960+ LER FR0,FR2
012FB8 3802 24961+ LER FR0,FR2
012FBA 3802 24962+ LER FR0,FR2
012FBC 3802 24963+ LER FR0,FR2
012FBE 3802 24964+ LER FR0,FR2
012FC0 3802 24965+ LER FR0,FR2
012FC2 3802 24966+ LER FR0,FR2
012FC4 3802 24967+ LER FR0,FR2
012FC6 3802 24968+ LER FR0,FR2
012FC8 3802 24969+ LER FR0,FR2
012FCA 3802 24970+ LER FR0,FR2
012FCC 3802 24971+ LER FR0,FR2
012FCE 3802 24972+ LER FR0,FR2
012FD0 3802 24973+ LER FR0,FR2
012FD2 3802 24974+ LER FR0,FR2
012FD4 3802 24975+ LER FR0,FR2
PAGE 457
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
012FD6 3802 24976+ LER FR0,FR2
012FD8 3802 24977+ LER FR0,FR2
012FDA 3802 24978+ LER FR0,FR2
012FDC 3802 24979+ LER FR0,FR2
012FDE 3802 24980+ LER FR0,FR2
012FE0 3802 24981+ LER FR0,FR2
012FE2 3802 24982+ LER FR0,FR2
012FE4 3802 24983+ LER FR0,FR2
012FE6 3802 24984+ LER FR0,FR2
012FE8 3802 24985+ LER FR0,FR2
012FEA 3802 24986+ LER FR0,FR2
012FEC 3802 24987+ LER FR0,FR2
012FEE 3802 24988+ LER FR0,FR2
012FF0 3802 24989+ LER FR0,FR2
012FF2 3802 24990+ LER FR0,FR2
012FF4 3802 24991+ LER FR0,FR2
012FF6 3802 24992+ LER FR0,FR2
012FF8 3802 24993+ LER FR0,FR2
012FFA 3802 24994+ LER FR0,FR2
012FFC 3802 24995+ LER FR0,FR2
012FFE 3802 24996+ LER FR0,FR2
013000 3802 24997+ LER FR0,FR2
013002 3802 24998+ LER FR0,FR2
013004 3802 24999+ LER FR0,FR2
013006 3802 25000+ LER FR0,FR2
013008 3802 25001+ LER FR0,FR2
01300A 3802 25002+ LER FR0,FR2
01300C 3802 25003+ LER FR0,FR2
01300E 3802 25004+ LER FR0,FR2
013010 3802 25005+ LER FR0,FR2
25006+*
013012 06FB 25007 BCTR R15,R11
25008 TSIMRET
013014 58F0 C100 13028 25009+ L R15,=A(SAVETST) R15 := current save area
013018 58DF 0004 00004 25010+ L R13,4(R15) get old save area back
01301C 98EC D00C 0000C 25011+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013020 07FE 25012+ BR 14 RETURN 02000000
25013 TSIMEND
013028 25014+ LTORG
013028 00000458 25015 =A(SAVETST)
01302C 4111999A 25016 =E'1.1'
13030 25017+T500TEND EQU *
25018 *
25019 * Test 501 -- LE R,m ---------------------------------------
25020 *
25021 TSIMBEG T501,10000,50,1,C'LE R,m'
25022+*
003A44 25023+TDSCDAT CSECT
003A48 25024+ DS 0D
25025+*
003A48 00013030 25026+T501TDSC DC A(T501) // TENTRY
003A4C 00000100 25027+ DC A(T501TEND-T501) // TLENGTH
003A50 00002710 25028+ DC F'10000' // TLRCNT
003A54 00000032 25029+ DC F'50' // TIGCNT
003A58 00000001 25030+ DC F'1' // TLTYPE
PAGE 458
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001AD4 25031+TEXT CSECT
001AD4 E3F5F0F1 25032+SPTR2241 DC C'T501'
003A5C 25033+TDSCDAT CSECT
003A5C 25034+ DS 0F
003A5C 04001AD4 25035+ DC AL1(L'SPTR2241),AL3(SPTR2241)
001AD8 25036+TEXT CSECT
001AD8 D3C540D96B94 25037+SPTR2242 DC C'LE R,m'
003A60 25038+TDSCDAT CSECT
003A60 25039+ DS 0F
003A60 06001AD8 25040+ DC AL1(L'SPTR2242),AL3(SPTR2242)
25041+*
004C74 25042+TDSCTBL CSECT
04C74 25043+T501TPTR EQU *
004C74 00003A48 25044+ DC A(T501TDSC) enabled test
25045+*
013030 25046+TCODE CSECT
013030 25047+ DS 0D ensure double word alignment for test
013030 25048+T501 DS 0H 01650000
013030 90EC D00C 0000C 25049+ STM 14,12,12(13) SAVE REGISTERS 02950000
013034 18CF 25050+ LR R12,R15 base register := entry address
13030 25051+ USING T501,R12 declare code base register
013036 41B0 C01E 1304E 25052+ LA R11,T501L load loop target to R11
01303A 58F0 C0F8 13128 25053+ L R15,=A(SAVETST) R15 := current save area
01303E 50DF 0004 00004 25054+ ST R13,4(R15) set back pointer in current save area
013042 182D 25055+ LR R2,R13 remember callers save area
013044 18DF 25056+ LR R13,R15 setup current save area
013046 50D2 0008 00008 25057+ ST R13,8(R2) set forw pointer in callers save area
00000 25058+ USING TDSC,R1 declare TDSC base register
01304A 58F0 1008 00008 25059+ L R15,TLRCNT load local repeat count to R15
25060+*
25061 *
25062 T501L REPINS LE,(FR0,=E'1.0') repeat: LE FR0,=E'1.0'
25063+*
25064+* build from sublist &ALIST a comma separated string &ARGS
25065+*
25066+*
25067+*
25068+*
25069+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
25070+* this allows to transfer the repeat count from last TDSCGEN call
25071+*
25072+*
1304E 25073+T501L EQU *
25074+*
25075+* write a comment indicating what REPINS does (in case NOGEN in effect)
25076+*
25077+*,// REPINS: do 50 times:
25078+*
25079+* MNOTE requires that ' is doubled for expanded variables
25080+* thus build &MASTR as a copy of '&ARGS with ' doubled
25081+*
25082+*
25083+*,// LE FR0,=E'1.0'
25084+*
25085+* finally generate code: &ICNT copies of &CODE &ARGS
PAGE 459
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
25086+*
01304E 7800 C0FC 1312C 25087+ LE FR0,=E'1.0'
013052 7800 C0FC 1312C 25088+ LE FR0,=E'1.0'
013056 7800 C0FC 1312C 25089+ LE FR0,=E'1.0'
01305A 7800 C0FC 1312C 25090+ LE FR0,=E'1.0'
01305E 7800 C0FC 1312C 25091+ LE FR0,=E'1.0'
013062 7800 C0FC 1312C 25092+ LE FR0,=E'1.0'
013066 7800 C0FC 1312C 25093+ LE FR0,=E'1.0'
01306A 7800 C0FC 1312C 25094+ LE FR0,=E'1.0'
01306E 7800 C0FC 1312C 25095+ LE FR0,=E'1.0'
013072 7800 C0FC 1312C 25096+ LE FR0,=E'1.0'
013076 7800 C0FC 1312C 25097+ LE FR0,=E'1.0'
01307A 7800 C0FC 1312C 25098+ LE FR0,=E'1.0'
01307E 7800 C0FC 1312C 25099+ LE FR0,=E'1.0'
013082 7800 C0FC 1312C 25100+ LE FR0,=E'1.0'
013086 7800 C0FC 1312C 25101+ LE FR0,=E'1.0'
01308A 7800 C0FC 1312C 25102+ LE FR0,=E'1.0'
01308E 7800 C0FC 1312C 25103+ LE FR0,=E'1.0'
013092 7800 C0FC 1312C 25104+ LE FR0,=E'1.0'
013096 7800 C0FC 1312C 25105+ LE FR0,=E'1.0'
01309A 7800 C0FC 1312C 25106+ LE FR0,=E'1.0'
01309E 7800 C0FC 1312C 25107+ LE FR0,=E'1.0'
0130A2 7800 C0FC 1312C 25108+ LE FR0,=E'1.0'
0130A6 7800 C0FC 1312C 25109+ LE FR0,=E'1.0'
0130AA 7800 C0FC 1312C 25110+ LE FR0,=E'1.0'
0130AE 7800 C0FC 1312C 25111+ LE FR0,=E'1.0'
0130B2 7800 C0FC 1312C 25112+ LE FR0,=E'1.0'
0130B6 7800 C0FC 1312C 25113+ LE FR0,=E'1.0'
0130BA 7800 C0FC 1312C 25114+ LE FR0,=E'1.0'
0130BE 7800 C0FC 1312C 25115+ LE FR0,=E'1.0'
0130C2 7800 C0FC 1312C 25116+ LE FR0,=E'1.0'
0130C6 7800 C0FC 1312C 25117+ LE FR0,=E'1.0'
0130CA 7800 C0FC 1312C 25118+ LE FR0,=E'1.0'
0130CE 7800 C0FC 1312C 25119+ LE FR0,=E'1.0'
0130D2 7800 C0FC 1312C 25120+ LE FR0,=E'1.0'
0130D6 7800 C0FC 1312C 25121+ LE FR0,=E'1.0'
0130DA 7800 C0FC 1312C 25122+ LE FR0,=E'1.0'
0130DE 7800 C0FC 1312C 25123+ LE FR0,=E'1.0'
0130E2 7800 C0FC 1312C 25124+ LE FR0,=E'1.0'
0130E6 7800 C0FC 1312C 25125+ LE FR0,=E'1.0'
0130EA 7800 C0FC 1312C 25126+ LE FR0,=E'1.0'
0130EE 7800 C0FC 1312C 25127+ LE FR0,=E'1.0'
0130F2 7800 C0FC 1312C 25128+ LE FR0,=E'1.0'
0130F6 7800 C0FC 1312C 25129+ LE FR0,=E'1.0'
0130FA 7800 C0FC 1312C 25130+ LE FR0,=E'1.0'
0130FE 7800 C0FC 1312C 25131+ LE FR0,=E'1.0'
013102 7800 C0FC 1312C 25132+ LE FR0,=E'1.0'
013106 7800 C0FC 1312C 25133+ LE FR0,=E'1.0'
01310A 7800 C0FC 1312C 25134+ LE FR0,=E'1.0'
01310E 7800 C0FC 1312C 25135+ LE FR0,=E'1.0'
013112 7800 C0FC 1312C 25136+ LE FR0,=E'1.0'
25137+*
013116 06FB 25138 BCTR R15,R11
25139 TSIMRET
013118 58F0 C0F8 13128 25140+ L R15,=A(SAVETST) R15 := current save area
PAGE 460
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01311C 58DF 0004 00004 25141+ L R13,4(R15) get old save area back
013120 98EC D00C 0000C 25142+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013124 07FE 25143+ BR 14 RETURN 02000000
25144 TSIMEND
013128 25145+ LTORG
013128 00000458 25146 =A(SAVETST)
01312C 41100000 25147 =E'1.0'
13130 25148+T501TEND EQU *
25149 *
25150 * Test 502 -- LE R,m (unal) --------------------------------
25151 *
25152 TSIMBEG T502,10000,50,1,C'LE R,m (unal)'
25153+*
003A64 25154+TDSCDAT CSECT
003A68 25155+ DS 0D
25156+*
003A68 00013130 25157+T502TDSC DC A(T502) // TENTRY
003A6C 0000010C 25158+ DC A(T502TEND-T502) // TLENGTH
003A70 00002710 25159+ DC F'10000' // TLRCNT
003A74 00000032 25160+ DC F'50' // TIGCNT
003A78 00000001 25161+ DC F'1' // TLTYPE
001ADE 25162+TEXT CSECT
001ADE E3F5F0F2 25163+SPTR2253 DC C'T502'
003A7C 25164+TDSCDAT CSECT
003A7C 25165+ DS 0F
003A7C 04001ADE 25166+ DC AL1(L'SPTR2253),AL3(SPTR2253)
001AE2 25167+TEXT CSECT
001AE2 D3C540D96B94404D 25168+SPTR2254 DC C'LE R,m (unal)'
003A80 25169+TDSCDAT CSECT
003A80 25170+ DS 0F
003A80 0D001AE2 25171+ DC AL1(L'SPTR2254),AL3(SPTR2254)
25172+*
004C78 25173+TDSCTBL CSECT
04C78 25174+T502TPTR EQU *
004C78 00003A68 25175+ DC A(T502TDSC) enabled test
25176+*
013130 25177+TCODE CSECT
013130 25178+ DS 0D ensure double word alignment for test
013130 25179+T502 DS 0H 01650000
013130 90EC D00C 0000C 25180+ STM 14,12,12(13) SAVE REGISTERS 02950000
013134 18CF 25181+ LR R12,R15 base register := entry address
13130 25182+ USING T502,R12 declare code base register
013136 41B0 C022 13152 25183+ LA R11,T502L load loop target to R11
01313A 58F0 C108 13238 25184+ L R15,=A(SAVETST) R15 := current save area
01313E 50DF 0004 00004 25185+ ST R13,4(R15) set back pointer in current save area
013142 182D 25186+ LR R2,R13 remember callers save area
013144 18DF 25187+ LR R13,R15 setup current save area
013146 50D2 0008 00008 25188+ ST R13,8(R2) set forw pointer in callers save area
00000 25189+ USING TDSC,R1 declare TDSC base register
01314A 58F0 1008 00008 25190+ L R15,TLRCNT load local repeat count to R15
25191+*
25192 *
01314E 4130 C0FC 1322C 25193 LA R3,T502V
25194 T502L REPINS LE,(FR0,1(R3)) repeat: LE FR0,1(R3)'
25195+*
PAGE 461
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
25196+* build from sublist &ALIST a comma separated string &ARGS
25197+*
25198+*
25199+*
25200+*
25201+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
25202+* this allows to transfer the repeat count from last TDSCGEN call
25203+*
25204+*
13152 25205+T502L EQU *
25206+*
25207+* write a comment indicating what REPINS does (in case NOGEN in effect)
25208+*
25209+*,// REPINS: do 50 times:
25210+*
25211+* MNOTE requires that ' is doubled for expanded variables
25212+* thus build &MASTR as a copy of '&ARGS with ' doubled
25213+*
25214+*
25215+*,// LE FR0,1(R3)
25216+*
25217+* finally generate code: &ICNT copies of &CODE &ARGS
25218+*
013152 7803 0001 00001 25219+ LE FR0,1(R3)
013156 7803 0001 00001 25220+ LE FR0,1(R3)
01315A 7803 0001 00001 25221+ LE FR0,1(R3)
01315E 7803 0001 00001 25222+ LE FR0,1(R3)
013162 7803 0001 00001 25223+ LE FR0,1(R3)
013166 7803 0001 00001 25224+ LE FR0,1(R3)
01316A 7803 0001 00001 25225+ LE FR0,1(R3)
01316E 7803 0001 00001 25226+ LE FR0,1(R3)
013172 7803 0001 00001 25227+ LE FR0,1(R3)
013176 7803 0001 00001 25228+ LE FR0,1(R3)
01317A 7803 0001 00001 25229+ LE FR0,1(R3)
01317E 7803 0001 00001 25230+ LE FR0,1(R3)
013182 7803 0001 00001 25231+ LE FR0,1(R3)
013186 7803 0001 00001 25232+ LE FR0,1(R3)
01318A 7803 0001 00001 25233+ LE FR0,1(R3)
01318E 7803 0001 00001 25234+ LE FR0,1(R3)
013192 7803 0001 00001 25235+ LE FR0,1(R3)
013196 7803 0001 00001 25236+ LE FR0,1(R3)
01319A 7803 0001 00001 25237+ LE FR0,1(R3)
01319E 7803 0001 00001 25238+ LE FR0,1(R3)
0131A2 7803 0001 00001 25239+ LE FR0,1(R3)
0131A6 7803 0001 00001 25240+ LE FR0,1(R3)
0131AA 7803 0001 00001 25241+ LE FR0,1(R3)
0131AE 7803 0001 00001 25242+ LE FR0,1(R3)
0131B2 7803 0001 00001 25243+ LE FR0,1(R3)
0131B6 7803 0001 00001 25244+ LE FR0,1(R3)
0131BA 7803 0001 00001 25245+ LE FR0,1(R3)
0131BE 7803 0001 00001 25246+ LE FR0,1(R3)
0131C2 7803 0001 00001 25247+ LE FR0,1(R3)
0131C6 7803 0001 00001 25248+ LE FR0,1(R3)
0131CA 7803 0001 00001 25249+ LE FR0,1(R3)
0131CE 7803 0001 00001 25250+ LE FR0,1(R3)
PAGE 462
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0131D2 7803 0001 00001 25251+ LE FR0,1(R3)
0131D6 7803 0001 00001 25252+ LE FR0,1(R3)
0131DA 7803 0001 00001 25253+ LE FR0,1(R3)
0131DE 7803 0001 00001 25254+ LE FR0,1(R3)
0131E2 7803 0001 00001 25255+ LE FR0,1(R3)
0131E6 7803 0001 00001 25256+ LE FR0,1(R3)
0131EA 7803 0001 00001 25257+ LE FR0,1(R3)
0131EE 7803 0001 00001 25258+ LE FR0,1(R3)
0131F2 7803 0001 00001 25259+ LE FR0,1(R3)
0131F6 7803 0001 00001 25260+ LE FR0,1(R3)
0131FA 7803 0001 00001 25261+ LE FR0,1(R3)
0131FE 7803 0001 00001 25262+ LE FR0,1(R3)
013202 7803 0001 00001 25263+ LE FR0,1(R3)
013206 7803 0001 00001 25264+ LE FR0,1(R3)
01320A 7803 0001 00001 25265+ LE FR0,1(R3)
01320E 7803 0001 00001 25266+ LE FR0,1(R3)
013212 7803 0001 00001 25267+ LE FR0,1(R3)
013216 7803 0001 00001 25268+ LE FR0,1(R3)
25269+*
01321A 06FB 25270 BCTR R15,R11
25271 TSIMRET
01321C 58F0 C108 13238 25272+ L R15,=A(SAVETST) R15 := current save area
013220 58DF 0004 00004 25273+ L R13,4(R15) get old save area back
013224 98EC D00C 0000C 25274+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013228 07FE 25275+ BR 14 RETURN 02000000
25276 *
01322C 25277 DS 0E
01322C 4E4E4E4E4E4E4E4E 25278 T502V DC 2X'4E4E4E4E' target for unaligned load
25279 TSIMEND
013238 25280+ LTORG
013238 00000458 25281 =A(SAVETST)
1323C 25282+T502TEND EQU *
25283 *
25284 * Test 503 -- LTER R,R -------------------------------------
25285 *
25286 TSIMBEG T503,10000,100,1,C'LTER R,R'
25287+*
003A84 25288+TDSCDAT CSECT
003A88 25289+ DS 0D
25290+*
003A88 00013240 25291+T503TDSC DC A(T503) // TENTRY
003A8C 00000108 25292+ DC A(T503TEND-T503) // TLENGTH
003A90 00002710 25293+ DC F'10000' // TLRCNT
003A94 00000064 25294+ DC F'100' // TIGCNT
003A98 00000001 25295+ DC F'1' // TLTYPE
001AEF 25296+TEXT CSECT
001AEF E3F5F0F3 25297+SPTR2265 DC C'T503'
003A9C 25298+TDSCDAT CSECT
003A9C 25299+ DS 0F
003A9C 04001AEF 25300+ DC AL1(L'SPTR2265),AL3(SPTR2265)
001AF3 25301+TEXT CSECT
001AF3 D3E3C5D940D96BD9 25302+SPTR2266 DC C'LTER R,R'
003AA0 25303+TDSCDAT CSECT
003AA0 25304+ DS 0F
003AA0 08001AF3 25305+ DC AL1(L'SPTR2266),AL3(SPTR2266)
PAGE 463
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
25306+*
004C7C 25307+TDSCTBL CSECT
04C7C 25308+T503TPTR EQU *
004C7C 00003A88 25309+ DC A(T503TDSC) enabled test
25310+*
01323C 25311+TCODE CSECT
013240 25312+ DS 0D ensure double word alignment for test
013240 25313+T503 DS 0H 01650000
013240 90EC D00C 0000C 25314+ STM 14,12,12(13) SAVE REGISTERS 02950000
013244 18CF 25315+ LR R12,R15 base register := entry address
13240 25316+ USING T503,R12 declare code base register
013246 41B0 C022 13262 25317+ LA R11,T503L load loop target to R11
01324A 58F0 C100 13340 25318+ L R15,=A(SAVETST) R15 := current save area
01324E 50DF 0004 00004 25319+ ST R13,4(R15) set back pointer in current save area
013252 182D 25320+ LR R2,R13 remember callers save area
013254 18DF 25321+ LR R13,R15 setup current save area
013256 50D2 0008 00008 25322+ ST R13,8(R2) set forw pointer in callers save area
00000 25323+ USING TDSC,R1 declare TDSC base register
01325A 58F0 1008 00008 25324+ L R15,TLRCNT load local repeat count to R15
25325+*
25326 *
01325E 7820 C104 13344 25327 LE FR2,=E'1.0'
25328 T503L REPINS LTER,(FR0,FR2) repeat: LTER FR0,FR2
25329+*
25330+* build from sublist &ALIST a comma separated string &ARGS
25331+*
25332+*
25333+*
25334+*
25335+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
25336+* this allows to transfer the repeat count from last TDSCGEN call
25337+*
25338+*
13262 25339+T503L EQU *
25340+*
25341+* write a comment indicating what REPINS does (in case NOGEN in effect)
25342+*
25343+*,// REPINS: do 100 times:
25344+*
25345+* MNOTE requires that ' is doubled for expanded variables
25346+* thus build &MASTR as a copy of '&ARGS with ' doubled
25347+*
25348+*
25349+*,// LTER FR0,FR2
25350+*
25351+* finally generate code: &ICNT copies of &CODE &ARGS
25352+*
013262 3202 25353+ LTER FR0,FR2
013264 3202 25354+ LTER FR0,FR2
013266 3202 25355+ LTER FR0,FR2
013268 3202 25356+ LTER FR0,FR2
01326A 3202 25357+ LTER FR0,FR2
01326C 3202 25358+ LTER FR0,FR2
01326E 3202 25359+ LTER FR0,FR2
013270 3202 25360+ LTER FR0,FR2
PAGE 464
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013272 3202 25361+ LTER FR0,FR2
013274 3202 25362+ LTER FR0,FR2
013276 3202 25363+ LTER FR0,FR2
013278 3202 25364+ LTER FR0,FR2
01327A 3202 25365+ LTER FR0,FR2
01327C 3202 25366+ LTER FR0,FR2
01327E 3202 25367+ LTER FR0,FR2
013280 3202 25368+ LTER FR0,FR2
013282 3202 25369+ LTER FR0,FR2
013284 3202 25370+ LTER FR0,FR2
013286 3202 25371+ LTER FR0,FR2
013288 3202 25372+ LTER FR0,FR2
01328A 3202 25373+ LTER FR0,FR2
01328C 3202 25374+ LTER FR0,FR2
01328E 3202 25375+ LTER FR0,FR2
013290 3202 25376+ LTER FR0,FR2
013292 3202 25377+ LTER FR0,FR2
013294 3202 25378+ LTER FR0,FR2
013296 3202 25379+ LTER FR0,FR2
013298 3202 25380+ LTER FR0,FR2
01329A 3202 25381+ LTER FR0,FR2
01329C 3202 25382+ LTER FR0,FR2
01329E 3202 25383+ LTER FR0,FR2
0132A0 3202 25384+ LTER FR0,FR2
0132A2 3202 25385+ LTER FR0,FR2
0132A4 3202 25386+ LTER FR0,FR2
0132A6 3202 25387+ LTER FR0,FR2
0132A8 3202 25388+ LTER FR0,FR2
0132AA 3202 25389+ LTER FR0,FR2
0132AC 3202 25390+ LTER FR0,FR2
0132AE 3202 25391+ LTER FR0,FR2
0132B0 3202 25392+ LTER FR0,FR2
0132B2 3202 25393+ LTER FR0,FR2
0132B4 3202 25394+ LTER FR0,FR2
0132B6 3202 25395+ LTER FR0,FR2
0132B8 3202 25396+ LTER FR0,FR2
0132BA 3202 25397+ LTER FR0,FR2
0132BC 3202 25398+ LTER FR0,FR2
0132BE 3202 25399+ LTER FR0,FR2
0132C0 3202 25400+ LTER FR0,FR2
0132C2 3202 25401+ LTER FR0,FR2
0132C4 3202 25402+ LTER FR0,FR2
0132C6 3202 25403+ LTER FR0,FR2
0132C8 3202 25404+ LTER FR0,FR2
0132CA 3202 25405+ LTER FR0,FR2
0132CC 3202 25406+ LTER FR0,FR2
0132CE 3202 25407+ LTER FR0,FR2
0132D0 3202 25408+ LTER FR0,FR2
0132D2 3202 25409+ LTER FR0,FR2
0132D4 3202 25410+ LTER FR0,FR2
0132D6 3202 25411+ LTER FR0,FR2
0132D8 3202 25412+ LTER FR0,FR2
0132DA 3202 25413+ LTER FR0,FR2
0132DC 3202 25414+ LTER FR0,FR2
0132DE 3202 25415+ LTER FR0,FR2
PAGE 465
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0132E0 3202 25416+ LTER FR0,FR2
0132E2 3202 25417+ LTER FR0,FR2
0132E4 3202 25418+ LTER FR0,FR2
0132E6 3202 25419+ LTER FR0,FR2
0132E8 3202 25420+ LTER FR0,FR2
0132EA 3202 25421+ LTER FR0,FR2
0132EC 3202 25422+ LTER FR0,FR2
0132EE 3202 25423+ LTER FR0,FR2
0132F0 3202 25424+ LTER FR0,FR2
0132F2 3202 25425+ LTER FR0,FR2
0132F4 3202 25426+ LTER FR0,FR2
0132F6 3202 25427+ LTER FR0,FR2
0132F8 3202 25428+ LTER FR0,FR2
0132FA 3202 25429+ LTER FR0,FR2
0132FC 3202 25430+ LTER FR0,FR2
0132FE 3202 25431+ LTER FR0,FR2
013300 3202 25432+ LTER FR0,FR2
013302 3202 25433+ LTER FR0,FR2
013304 3202 25434+ LTER FR0,FR2
013306 3202 25435+ LTER FR0,FR2
013308 3202 25436+ LTER FR0,FR2
01330A 3202 25437+ LTER FR0,FR2
01330C 3202 25438+ LTER FR0,FR2
01330E 3202 25439+ LTER FR0,FR2
013310 3202 25440+ LTER FR0,FR2
013312 3202 25441+ LTER FR0,FR2
013314 3202 25442+ LTER FR0,FR2
013316 3202 25443+ LTER FR0,FR2
013318 3202 25444+ LTER FR0,FR2
01331A 3202 25445+ LTER FR0,FR2
01331C 3202 25446+ LTER FR0,FR2
01331E 3202 25447+ LTER FR0,FR2
013320 3202 25448+ LTER FR0,FR2
013322 3202 25449+ LTER FR0,FR2
013324 3202 25450+ LTER FR0,FR2
013326 3202 25451+ LTER FR0,FR2
013328 3202 25452+ LTER FR0,FR2
25453+*
01332A 06FB 25454 BCTR R15,R11
25455 TSIMRET
01332C 58F0 C100 13340 25456+ L R15,=A(SAVETST) R15 := current save area
013330 58DF 0004 00004 25457+ L R13,4(R15) get old save area back
013334 98EC D00C 0000C 25458+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013338 07FE 25459+ BR 14 RETURN 02000000
25460 TSIMEND
013340 25461+ LTORG
013340 00000458 25462 =A(SAVETST)
013344 41100000 25463 =E'1.0'
13348 25464+T503TEND EQU *
25465 *
25466 * Test 504 -- LCER R,R -------------------------------------
25467 *
25468 TSIMBEG T504,10000,100,1,C'LCER R,R'
25469+*
003AA4 25470+TDSCDAT CSECT
PAGE 466
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003AA8 25471+ DS 0D
25472+*
003AA8 00013348 25473+T504TDSC DC A(T504) // TENTRY
003AAC 00000108 25474+ DC A(T504TEND-T504) // TLENGTH
003AB0 00002710 25475+ DC F'10000' // TLRCNT
003AB4 00000064 25476+ DC F'100' // TIGCNT
003AB8 00000001 25477+ DC F'1' // TLTYPE
001AFB 25478+TEXT CSECT
001AFB E3F5F0F4 25479+SPTR2277 DC C'T504'
003ABC 25480+TDSCDAT CSECT
003ABC 25481+ DS 0F
003ABC 04001AFB 25482+ DC AL1(L'SPTR2277),AL3(SPTR2277)
001AFF 25483+TEXT CSECT
001AFF D3C3C5D940D96BD9 25484+SPTR2278 DC C'LCER R,R'
003AC0 25485+TDSCDAT CSECT
003AC0 25486+ DS 0F
003AC0 08001AFF 25487+ DC AL1(L'SPTR2278),AL3(SPTR2278)
25488+*
004C80 25489+TDSCTBL CSECT
04C80 25490+T504TPTR EQU *
004C80 00003AA8 25491+ DC A(T504TDSC) enabled test
25492+*
013348 25493+TCODE CSECT
013348 25494+ DS 0D ensure double word alignment for test
013348 25495+T504 DS 0H 01650000
013348 90EC D00C 0000C 25496+ STM 14,12,12(13) SAVE REGISTERS 02950000
01334C 18CF 25497+ LR R12,R15 base register := entry address
13348 25498+ USING T504,R12 declare code base register
01334E 41B0 C022 1336A 25499+ LA R11,T504L load loop target to R11
013352 58F0 C100 13448 25500+ L R15,=A(SAVETST) R15 := current save area
013356 50DF 0004 00004 25501+ ST R13,4(R15) set back pointer in current save area
01335A 182D 25502+ LR R2,R13 remember callers save area
01335C 18DF 25503+ LR R13,R15 setup current save area
01335E 50D2 0008 00008 25504+ ST R13,8(R2) set forw pointer in callers save area
00000 25505+ USING TDSC,R1 declare TDSC base register
013362 58F0 1008 00008 25506+ L R15,TLRCNT load local repeat count to R15
25507+*
25508 *
013366 7820 C104 1344C 25509 LE FR2,=E'1.0'
25510 T504L REPINS LCER,(FR0,FR2) repeat: LCER FR0,FR2
25511+*
25512+* build from sublist &ALIST a comma separated string &ARGS
25513+*
25514+*
25515+*
25516+*
25517+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
25518+* this allows to transfer the repeat count from last TDSCGEN call
25519+*
25520+*
1336A 25521+T504L EQU *
25522+*
25523+* write a comment indicating what REPINS does (in case NOGEN in effect)
25524+*
25525+*,// REPINS: do 100 times:
PAGE 467
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
25526+*
25527+* MNOTE requires that ' is doubled for expanded variables
25528+* thus build &MASTR as a copy of '&ARGS with ' doubled
25529+*
25530+*
25531+*,// LCER FR0,FR2
25532+*
25533+* finally generate code: &ICNT copies of &CODE &ARGS
25534+*
01336A 3302 25535+ LCER FR0,FR2
01336C 3302 25536+ LCER FR0,FR2
01336E 3302 25537+ LCER FR0,FR2
013370 3302 25538+ LCER FR0,FR2
013372 3302 25539+ LCER FR0,FR2
013374 3302 25540+ LCER FR0,FR2
013376 3302 25541+ LCER FR0,FR2
013378 3302 25542+ LCER FR0,FR2
01337A 3302 25543+ LCER FR0,FR2
01337C 3302 25544+ LCER FR0,FR2
01337E 3302 25545+ LCER FR0,FR2
013380 3302 25546+ LCER FR0,FR2
013382 3302 25547+ LCER FR0,FR2
013384 3302 25548+ LCER FR0,FR2
013386 3302 25549+ LCER FR0,FR2
013388 3302 25550+ LCER FR0,FR2
01338A 3302 25551+ LCER FR0,FR2
01338C 3302 25552+ LCER FR0,FR2
01338E 3302 25553+ LCER FR0,FR2
013390 3302 25554+ LCER FR0,FR2
013392 3302 25555+ LCER FR0,FR2
013394 3302 25556+ LCER FR0,FR2
013396 3302 25557+ LCER FR0,FR2
013398 3302 25558+ LCER FR0,FR2
01339A 3302 25559+ LCER FR0,FR2
01339C 3302 25560+ LCER FR0,FR2
01339E 3302 25561+ LCER FR0,FR2
0133A0 3302 25562+ LCER FR0,FR2
0133A2 3302 25563+ LCER FR0,FR2
0133A4 3302 25564+ LCER FR0,FR2
0133A6 3302 25565+ LCER FR0,FR2
0133A8 3302 25566+ LCER FR0,FR2
0133AA 3302 25567+ LCER FR0,FR2
0133AC 3302 25568+ LCER FR0,FR2
0133AE 3302 25569+ LCER FR0,FR2
0133B0 3302 25570+ LCER FR0,FR2
0133B2 3302 25571+ LCER FR0,FR2
0133B4 3302 25572+ LCER FR0,FR2
0133B6 3302 25573+ LCER FR0,FR2
0133B8 3302 25574+ LCER FR0,FR2
0133BA 3302 25575+ LCER FR0,FR2
0133BC 3302 25576+ LCER FR0,FR2
0133BE 3302 25577+ LCER FR0,FR2
0133C0 3302 25578+ LCER FR0,FR2
0133C2 3302 25579+ LCER FR0,FR2
0133C4 3302 25580+ LCER FR0,FR2
PAGE 468
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0133C6 3302 25581+ LCER FR0,FR2
0133C8 3302 25582+ LCER FR0,FR2
0133CA 3302 25583+ LCER FR0,FR2
0133CC 3302 25584+ LCER FR0,FR2
0133CE 3302 25585+ LCER FR0,FR2
0133D0 3302 25586+ LCER FR0,FR2
0133D2 3302 25587+ LCER FR0,FR2
0133D4 3302 25588+ LCER FR0,FR2
0133D6 3302 25589+ LCER FR0,FR2
0133D8 3302 25590+ LCER FR0,FR2
0133DA 3302 25591+ LCER FR0,FR2
0133DC 3302 25592+ LCER FR0,FR2
0133DE 3302 25593+ LCER FR0,FR2
0133E0 3302 25594+ LCER FR0,FR2
0133E2 3302 25595+ LCER FR0,FR2
0133E4 3302 25596+ LCER FR0,FR2
0133E6 3302 25597+ LCER FR0,FR2
0133E8 3302 25598+ LCER FR0,FR2
0133EA 3302 25599+ LCER FR0,FR2
0133EC 3302 25600+ LCER FR0,FR2
0133EE 3302 25601+ LCER FR0,FR2
0133F0 3302 25602+ LCER FR0,FR2
0133F2 3302 25603+ LCER FR0,FR2
0133F4 3302 25604+ LCER FR0,FR2
0133F6 3302 25605+ LCER FR0,FR2
0133F8 3302 25606+ LCER FR0,FR2
0133FA 3302 25607+ LCER FR0,FR2
0133FC 3302 25608+ LCER FR0,FR2
0133FE 3302 25609+ LCER FR0,FR2
013400 3302 25610+ LCER FR0,FR2
013402 3302 25611+ LCER FR0,FR2
013404 3302 25612+ LCER FR0,FR2
013406 3302 25613+ LCER FR0,FR2
013408 3302 25614+ LCER FR0,FR2
01340A 3302 25615+ LCER FR0,FR2
01340C 3302 25616+ LCER FR0,FR2
01340E 3302 25617+ LCER FR0,FR2
013410 3302 25618+ LCER FR0,FR2
013412 3302 25619+ LCER FR0,FR2
013414 3302 25620+ LCER FR0,FR2
013416 3302 25621+ LCER FR0,FR2
013418 3302 25622+ LCER FR0,FR2
01341A 3302 25623+ LCER FR0,FR2
01341C 3302 25624+ LCER FR0,FR2
01341E 3302 25625+ LCER FR0,FR2
013420 3302 25626+ LCER FR0,FR2
013422 3302 25627+ LCER FR0,FR2
013424 3302 25628+ LCER FR0,FR2
013426 3302 25629+ LCER FR0,FR2
013428 3302 25630+ LCER FR0,FR2
01342A 3302 25631+ LCER FR0,FR2
01342C 3302 25632+ LCER FR0,FR2
01342E 3302 25633+ LCER FR0,FR2
013430 3302 25634+ LCER FR0,FR2
25635+*
PAGE 469
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013432 06FB 25636 BCTR R15,R11
25637 TSIMRET
013434 58F0 C100 13448 25638+ L R15,=A(SAVETST) R15 := current save area
013438 58DF 0004 00004 25639+ L R13,4(R15) get old save area back
01343C 98EC D00C 0000C 25640+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013440 07FE 25641+ BR 14 RETURN 02000000
25642 TSIMEND
013448 25643+ LTORG
013448 00000458 25644 =A(SAVETST)
01344C 41100000 25645 =E'1.0'
13450 25646+T504TEND EQU *
25647 *
25648 * Test 505 -- LNER R,R -------------------------------------
25649 *
25650 TSIMBEG T505,10000,100,1,C'LNER R,R'
25651+*
003AC4 25652+TDSCDAT CSECT
003AC8 25653+ DS 0D
25654+*
003AC8 00013450 25655+T505TDSC DC A(T505) // TENTRY
003ACC 00000108 25656+ DC A(T505TEND-T505) // TLENGTH
003AD0 00002710 25657+ DC F'10000' // TLRCNT
003AD4 00000064 25658+ DC F'100' // TIGCNT
003AD8 00000001 25659+ DC F'1' // TLTYPE
001B07 25660+TEXT CSECT
001B07 E3F5F0F5 25661+SPTR2289 DC C'T505'
003ADC 25662+TDSCDAT CSECT
003ADC 25663+ DS 0F
003ADC 04001B07 25664+ DC AL1(L'SPTR2289),AL3(SPTR2289)
001B0B 25665+TEXT CSECT
001B0B D3D5C5D940D96BD9 25666+SPTR2290 DC C'LNER R,R'
003AE0 25667+TDSCDAT CSECT
003AE0 25668+ DS 0F
003AE0 08001B0B 25669+ DC AL1(L'SPTR2290),AL3(SPTR2290)
25670+*
004C84 25671+TDSCTBL CSECT
04C84 25672+T505TPTR EQU *
004C84 00003AC8 25673+ DC A(T505TDSC) enabled test
25674+*
013450 25675+TCODE CSECT
013450 25676+ DS 0D ensure double word alignment for test
013450 25677+T505 DS 0H 01650000
013450 90EC D00C 0000C 25678+ STM 14,12,12(13) SAVE REGISTERS 02950000
013454 18CF 25679+ LR R12,R15 base register := entry address
13450 25680+ USING T505,R12 declare code base register
013456 41B0 C022 13472 25681+ LA R11,T505L load loop target to R11
01345A 58F0 C100 13550 25682+ L R15,=A(SAVETST) R15 := current save area
01345E 50DF 0004 00004 25683+ ST R13,4(R15) set back pointer in current save area
013462 182D 25684+ LR R2,R13 remember callers save area
013464 18DF 25685+ LR R13,R15 setup current save area
013466 50D2 0008 00008 25686+ ST R13,8(R2) set forw pointer in callers save area
00000 25687+ USING TDSC,R1 declare TDSC base register
01346A 58F0 1008 00008 25688+ L R15,TLRCNT load local repeat count to R15
25689+*
25690 *
PAGE 470
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01346E 7820 C104 13554 25691 LE FR2,=E'1.0'
25692 T505L REPINS LNER,(FR0,FR2) repeat: LNER FR0,FR2
25693+*
25694+* build from sublist &ALIST a comma separated string &ARGS
25695+*
25696+*
25697+*
25698+*
25699+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
25700+* this allows to transfer the repeat count from last TDSCGEN call
25701+*
25702+*
13472 25703+T505L EQU *
25704+*
25705+* write a comment indicating what REPINS does (in case NOGEN in effect)
25706+*
25707+*,// REPINS: do 100 times:
25708+*
25709+* MNOTE requires that ' is doubled for expanded variables
25710+* thus build &MASTR as a copy of '&ARGS with ' doubled
25711+*
25712+*
25713+*,// LNER FR0,FR2
25714+*
25715+* finally generate code: &ICNT copies of &CODE &ARGS
25716+*
013472 3102 25717+ LNER FR0,FR2
013474 3102 25718+ LNER FR0,FR2
013476 3102 25719+ LNER FR0,FR2
013478 3102 25720+ LNER FR0,FR2
01347A 3102 25721+ LNER FR0,FR2
01347C 3102 25722+ LNER FR0,FR2
01347E 3102 25723+ LNER FR0,FR2
013480 3102 25724+ LNER FR0,FR2
013482 3102 25725+ LNER FR0,FR2
013484 3102 25726+ LNER FR0,FR2
013486 3102 25727+ LNER FR0,FR2
013488 3102 25728+ LNER FR0,FR2
01348A 3102 25729+ LNER FR0,FR2
01348C 3102 25730+ LNER FR0,FR2
01348E 3102 25731+ LNER FR0,FR2
013490 3102 25732+ LNER FR0,FR2
013492 3102 25733+ LNER FR0,FR2
013494 3102 25734+ LNER FR0,FR2
013496 3102 25735+ LNER FR0,FR2
013498 3102 25736+ LNER FR0,FR2
01349A 3102 25737+ LNER FR0,FR2
01349C 3102 25738+ LNER FR0,FR2
01349E 3102 25739+ LNER FR0,FR2
0134A0 3102 25740+ LNER FR0,FR2
0134A2 3102 25741+ LNER FR0,FR2
0134A4 3102 25742+ LNER FR0,FR2
0134A6 3102 25743+ LNER FR0,FR2
0134A8 3102 25744+ LNER FR0,FR2
0134AA 3102 25745+ LNER FR0,FR2
PAGE 471
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0134AC 3102 25746+ LNER FR0,FR2
0134AE 3102 25747+ LNER FR0,FR2
0134B0 3102 25748+ LNER FR0,FR2
0134B2 3102 25749+ LNER FR0,FR2
0134B4 3102 25750+ LNER FR0,FR2
0134B6 3102 25751+ LNER FR0,FR2
0134B8 3102 25752+ LNER FR0,FR2
0134BA 3102 25753+ LNER FR0,FR2
0134BC 3102 25754+ LNER FR0,FR2
0134BE 3102 25755+ LNER FR0,FR2
0134C0 3102 25756+ LNER FR0,FR2
0134C2 3102 25757+ LNER FR0,FR2
0134C4 3102 25758+ LNER FR0,FR2
0134C6 3102 25759+ LNER FR0,FR2
0134C8 3102 25760+ LNER FR0,FR2
0134CA 3102 25761+ LNER FR0,FR2
0134CC 3102 25762+ LNER FR0,FR2
0134CE 3102 25763+ LNER FR0,FR2
0134D0 3102 25764+ LNER FR0,FR2
0134D2 3102 25765+ LNER FR0,FR2
0134D4 3102 25766+ LNER FR0,FR2
0134D6 3102 25767+ LNER FR0,FR2
0134D8 3102 25768+ LNER FR0,FR2
0134DA 3102 25769+ LNER FR0,FR2
0134DC 3102 25770+ LNER FR0,FR2
0134DE 3102 25771+ LNER FR0,FR2
0134E0 3102 25772+ LNER FR0,FR2
0134E2 3102 25773+ LNER FR0,FR2
0134E4 3102 25774+ LNER FR0,FR2
0134E6 3102 25775+ LNER FR0,FR2
0134E8 3102 25776+ LNER FR0,FR2
0134EA 3102 25777+ LNER FR0,FR2
0134EC 3102 25778+ LNER FR0,FR2
0134EE 3102 25779+ LNER FR0,FR2
0134F0 3102 25780+ LNER FR0,FR2
0134F2 3102 25781+ LNER FR0,FR2
0134F4 3102 25782+ LNER FR0,FR2
0134F6 3102 25783+ LNER FR0,FR2
0134F8 3102 25784+ LNER FR0,FR2
0134FA 3102 25785+ LNER FR0,FR2
0134FC 3102 25786+ LNER FR0,FR2
0134FE 3102 25787+ LNER FR0,FR2
013500 3102 25788+ LNER FR0,FR2
013502 3102 25789+ LNER FR0,FR2
013504 3102 25790+ LNER FR0,FR2
013506 3102 25791+ LNER FR0,FR2
013508 3102 25792+ LNER FR0,FR2
01350A 3102 25793+ LNER FR0,FR2
01350C 3102 25794+ LNER FR0,FR2
01350E 3102 25795+ LNER FR0,FR2
013510 3102 25796+ LNER FR0,FR2
013512 3102 25797+ LNER FR0,FR2
013514 3102 25798+ LNER FR0,FR2
013516 3102 25799+ LNER FR0,FR2
013518 3102 25800+ LNER FR0,FR2
PAGE 472
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01351A 3102 25801+ LNER FR0,FR2
01351C 3102 25802+ LNER FR0,FR2
01351E 3102 25803+ LNER FR0,FR2
013520 3102 25804+ LNER FR0,FR2
013522 3102 25805+ LNER FR0,FR2
013524 3102 25806+ LNER FR0,FR2
013526 3102 25807+ LNER FR0,FR2
013528 3102 25808+ LNER FR0,FR2
01352A 3102 25809+ LNER FR0,FR2
01352C 3102 25810+ LNER FR0,FR2
01352E 3102 25811+ LNER FR0,FR2
013530 3102 25812+ LNER FR0,FR2
013532 3102 25813+ LNER FR0,FR2
013534 3102 25814+ LNER FR0,FR2
013536 3102 25815+ LNER FR0,FR2
013538 3102 25816+ LNER FR0,FR2
25817+*
01353A 06FB 25818 BCTR R15,R11
25819 TSIMRET
01353C 58F0 C100 13550 25820+ L R15,=A(SAVETST) R15 := current save area
013540 58DF 0004 00004 25821+ L R13,4(R15) get old save area back
013544 98EC D00C 0000C 25822+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013548 07FE 25823+ BR 14 RETURN 02000000
25824 TSIMEND
013550 25825+ LTORG
013550 00000458 25826 =A(SAVETST)
013554 41100000 25827 =E'1.0'
13558 25828+T505TEND EQU *
25829 *
25830 * Test 506 -- LPER R,R -------------------------------------
25831 *
25832 TSIMBEG T506,9000,100,1,C'LPER R,R'
25833+*
003AE4 25834+TDSCDAT CSECT
003AE8 25835+ DS 0D
25836+*
003AE8 00013558 25837+T506TDSC DC A(T506) // TENTRY
003AEC 00000108 25838+ DC A(T506TEND-T506) // TLENGTH
003AF0 00002328 25839+ DC F'9000' // TLRCNT
003AF4 00000064 25840+ DC F'100' // TIGCNT
003AF8 00000001 25841+ DC F'1' // TLTYPE
001B13 25842+TEXT CSECT
001B13 E3F5F0F6 25843+SPTR2301 DC C'T506'
003AFC 25844+TDSCDAT CSECT
003AFC 25845+ DS 0F
003AFC 04001B13 25846+ DC AL1(L'SPTR2301),AL3(SPTR2301)
001B17 25847+TEXT CSECT
001B17 D3D7C5D940D96BD9 25848+SPTR2302 DC C'LPER R,R'
003B00 25849+TDSCDAT CSECT
003B00 25850+ DS 0F
003B00 08001B17 25851+ DC AL1(L'SPTR2302),AL3(SPTR2302)
25852+*
004C88 25853+TDSCTBL CSECT
04C88 25854+T506TPTR EQU *
004C88 00003AE8 25855+ DC A(T506TDSC) enabled test
PAGE 473
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
25856+*
013558 25857+TCODE CSECT
013558 25858+ DS 0D ensure double word alignment for test
013558 25859+T506 DS 0H 01650000
013558 90EC D00C 0000C 25860+ STM 14,12,12(13) SAVE REGISTERS 02950000
01355C 18CF 25861+ LR R12,R15 base register := entry address
13558 25862+ USING T506,R12 declare code base register
01355E 41B0 C022 1357A 25863+ LA R11,T506L load loop target to R11
013562 58F0 C100 13658 25864+ L R15,=A(SAVETST) R15 := current save area
013566 50DF 0004 00004 25865+ ST R13,4(R15) set back pointer in current save area
01356A 182D 25866+ LR R2,R13 remember callers save area
01356C 18DF 25867+ LR R13,R15 setup current save area
01356E 50D2 0008 00008 25868+ ST R13,8(R2) set forw pointer in callers save area
00000 25869+ USING TDSC,R1 declare TDSC base register
013572 58F0 1008 00008 25870+ L R15,TLRCNT load local repeat count to R15
25871+*
25872 *
013576 7820 C104 1365C 25873 LE FR2,=E'-1.0'
25874 T506L REPINS LPER,(FR0,FR2) repeat: LPER FR0,FR2
25875+*
25876+* build from sublist &ALIST a comma separated string &ARGS
25877+*
25878+*
25879+*
25880+*
25881+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
25882+* this allows to transfer the repeat count from last TDSCGEN call
25883+*
25884+*
1357A 25885+T506L EQU *
25886+*
25887+* write a comment indicating what REPINS does (in case NOGEN in effect)
25888+*
25889+*,// REPINS: do 100 times:
25890+*
25891+* MNOTE requires that ' is doubled for expanded variables
25892+* thus build &MASTR as a copy of '&ARGS with ' doubled
25893+*
25894+*
25895+*,// LPER FR0,FR2
25896+*
25897+* finally generate code: &ICNT copies of &CODE &ARGS
25898+*
01357A 3002 25899+ LPER FR0,FR2
01357C 3002 25900+ LPER FR0,FR2
01357E 3002 25901+ LPER FR0,FR2
013580 3002 25902+ LPER FR0,FR2
013582 3002 25903+ LPER FR0,FR2
013584 3002 25904+ LPER FR0,FR2
013586 3002 25905+ LPER FR0,FR2
013588 3002 25906+ LPER FR0,FR2
01358A 3002 25907+ LPER FR0,FR2
01358C 3002 25908+ LPER FR0,FR2
01358E 3002 25909+ LPER FR0,FR2
013590 3002 25910+ LPER FR0,FR2
PAGE 474
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013592 3002 25911+ LPER FR0,FR2
013594 3002 25912+ LPER FR0,FR2
013596 3002 25913+ LPER FR0,FR2
013598 3002 25914+ LPER FR0,FR2
01359A 3002 25915+ LPER FR0,FR2
01359C 3002 25916+ LPER FR0,FR2
01359E 3002 25917+ LPER FR0,FR2
0135A0 3002 25918+ LPER FR0,FR2
0135A2 3002 25919+ LPER FR0,FR2
0135A4 3002 25920+ LPER FR0,FR2
0135A6 3002 25921+ LPER FR0,FR2
0135A8 3002 25922+ LPER FR0,FR2
0135AA 3002 25923+ LPER FR0,FR2
0135AC 3002 25924+ LPER FR0,FR2
0135AE 3002 25925+ LPER FR0,FR2
0135B0 3002 25926+ LPER FR0,FR2
0135B2 3002 25927+ LPER FR0,FR2
0135B4 3002 25928+ LPER FR0,FR2
0135B6 3002 25929+ LPER FR0,FR2
0135B8 3002 25930+ LPER FR0,FR2
0135BA 3002 25931+ LPER FR0,FR2
0135BC 3002 25932+ LPER FR0,FR2
0135BE 3002 25933+ LPER FR0,FR2
0135C0 3002 25934+ LPER FR0,FR2
0135C2 3002 25935+ LPER FR0,FR2
0135C4 3002 25936+ LPER FR0,FR2
0135C6 3002 25937+ LPER FR0,FR2
0135C8 3002 25938+ LPER FR0,FR2
0135CA 3002 25939+ LPER FR0,FR2
0135CC 3002 25940+ LPER FR0,FR2
0135CE 3002 25941+ LPER FR0,FR2
0135D0 3002 25942+ LPER FR0,FR2
0135D2 3002 25943+ LPER FR0,FR2
0135D4 3002 25944+ LPER FR0,FR2
0135D6 3002 25945+ LPER FR0,FR2
0135D8 3002 25946+ LPER FR0,FR2
0135DA 3002 25947+ LPER FR0,FR2
0135DC 3002 25948+ LPER FR0,FR2
0135DE 3002 25949+ LPER FR0,FR2
0135E0 3002 25950+ LPER FR0,FR2
0135E2 3002 25951+ LPER FR0,FR2
0135E4 3002 25952+ LPER FR0,FR2
0135E6 3002 25953+ LPER FR0,FR2
0135E8 3002 25954+ LPER FR0,FR2
0135EA 3002 25955+ LPER FR0,FR2
0135EC 3002 25956+ LPER FR0,FR2
0135EE 3002 25957+ LPER FR0,FR2
0135F0 3002 25958+ LPER FR0,FR2
0135F2 3002 25959+ LPER FR0,FR2
0135F4 3002 25960+ LPER FR0,FR2
0135F6 3002 25961+ LPER FR0,FR2
0135F8 3002 25962+ LPER FR0,FR2
0135FA 3002 25963+ LPER FR0,FR2
0135FC 3002 25964+ LPER FR0,FR2
0135FE 3002 25965+ LPER FR0,FR2
PAGE 475
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013600 3002 25966+ LPER FR0,FR2
013602 3002 25967+ LPER FR0,FR2
013604 3002 25968+ LPER FR0,FR2
013606 3002 25969+ LPER FR0,FR2
013608 3002 25970+ LPER FR0,FR2
01360A 3002 25971+ LPER FR0,FR2
01360C 3002 25972+ LPER FR0,FR2
01360E 3002 25973+ LPER FR0,FR2
013610 3002 25974+ LPER FR0,FR2
013612 3002 25975+ LPER FR0,FR2
013614 3002 25976+ LPER FR0,FR2
013616 3002 25977+ LPER FR0,FR2
013618 3002 25978+ LPER FR0,FR2
01361A 3002 25979+ LPER FR0,FR2
01361C 3002 25980+ LPER FR0,FR2
01361E 3002 25981+ LPER FR0,FR2
013620 3002 25982+ LPER FR0,FR2
013622 3002 25983+ LPER FR0,FR2
013624 3002 25984+ LPER FR0,FR2
013626 3002 25985+ LPER FR0,FR2
013628 3002 25986+ LPER FR0,FR2
01362A 3002 25987+ LPER FR0,FR2
01362C 3002 25988+ LPER FR0,FR2
01362E 3002 25989+ LPER FR0,FR2
013630 3002 25990+ LPER FR0,FR2
013632 3002 25991+ LPER FR0,FR2
013634 3002 25992+ LPER FR0,FR2
013636 3002 25993+ LPER FR0,FR2
013638 3002 25994+ LPER FR0,FR2
01363A 3002 25995+ LPER FR0,FR2
01363C 3002 25996+ LPER FR0,FR2
01363E 3002 25997+ LPER FR0,FR2
013640 3002 25998+ LPER FR0,FR2
25999+*
013642 06FB 26000 BCTR R15,R11
26001 TSIMRET
013644 58F0 C100 13658 26002+ L R15,=A(SAVETST) R15 := current save area
013648 58DF 0004 00004 26003+ L R13,4(R15) get old save area back
01364C 98EC D00C 0000C 26004+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013650 07FE 26005+ BR 14 RETURN 02000000
26006 TSIMEND
013658 26007+ LTORG
013658 00000458 26008 =A(SAVETST)
01365C C1100000 26009 =E'-1.0'
13660 26010+T506TEND EQU *
26011 *
26012 * Test 507 -- LRER R,R -------------------------------------
26013 *
26014 TSIMBEG T507,8000,100,1,C'LRER R,R'
26015+*
003B04 26016+TDSCDAT CSECT
003B08 26017+ DS 0D
26018+*
003B08 00013660 26019+T507TDSC DC A(T507) // TENTRY
003B0C 0000010C 26020+ DC A(T507TEND-T507) // TLENGTH
PAGE 476
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003B10 00001F40 26021+ DC F'8000' // TLRCNT
003B14 00000064 26022+ DC F'100' // TIGCNT
003B18 00000001 26023+ DC F'1' // TLTYPE
001B1F 26024+TEXT CSECT
001B1F E3F5F0F7 26025+SPTR2313 DC C'T507'
003B1C 26026+TDSCDAT CSECT
003B1C 26027+ DS 0F
003B1C 04001B1F 26028+ DC AL1(L'SPTR2313),AL3(SPTR2313)
001B23 26029+TEXT CSECT
001B23 D3D9C5D940D96BD9 26030+SPTR2314 DC C'LRER R,R'
003B20 26031+TDSCDAT CSECT
003B20 26032+ DS 0F
003B20 08001B23 26033+ DC AL1(L'SPTR2314),AL3(SPTR2314)
26034+*
004C8C 26035+TDSCTBL CSECT
04C8C 26036+T507TPTR EQU *
004C8C 00003B08 26037+ DC A(T507TDSC) enabled test
26038+*
013660 26039+TCODE CSECT
013660 26040+ DS 0D ensure double word alignment for test
013660 26041+T507 DS 0H 01650000
013660 90EC D00C 0000C 26042+ STM 14,12,12(13) SAVE REGISTERS 02950000
013664 18CF 26043+ LR R12,R15 base register := entry address
13660 26044+ USING T507,R12 declare code base register
013666 41B0 C022 13682 26045+ LA R11,T507L load loop target to R11
01366A 58F0 C108 13768 26046+ L R15,=A(SAVETST) R15 := current save area
01366E 50DF 0004 00004 26047+ ST R13,4(R15) set back pointer in current save area
013672 182D 26048+ LR R2,R13 remember callers save area
013674 18DF 26049+ LR R13,R15 setup current save area
013676 50D2 0008 00008 26050+ ST R13,8(R2) set forw pointer in callers save area
00000 26051+ USING TDSC,R1 declare TDSC base register
01367A 58F0 1008 00008 26052+ L R15,TLRCNT load local repeat count to R15
26053+*
26054 *
01367E 6820 C100 13760 26055 LD FR2,=D'1.1'
26056 T507L REPINS LRER,(FR0,FR2) repeat: LRER FR0,FR2
26057+*
26058+* build from sublist &ALIST a comma separated string &ARGS
26059+*
26060+*
26061+*
26062+*
26063+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
26064+* this allows to transfer the repeat count from last TDSCGEN call
26065+*
26066+*
13682 26067+T507L EQU *
26068+*
26069+* write a comment indicating what REPINS does (in case NOGEN in effect)
26070+*
26071+*,// REPINS: do 100 times:
26072+*
26073+* MNOTE requires that ' is doubled for expanded variables
26074+* thus build &MASTR as a copy of '&ARGS with ' doubled
26075+*
PAGE 477
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
26076+*
26077+*,// LRER FR0,FR2
26078+*
26079+* finally generate code: &ICNT copies of &CODE &ARGS
26080+*
013682 3502 26081+ LRER FR0,FR2
013684 3502 26082+ LRER FR0,FR2
013686 3502 26083+ LRER FR0,FR2
013688 3502 26084+ LRER FR0,FR2
01368A 3502 26085+ LRER FR0,FR2
01368C 3502 26086+ LRER FR0,FR2
01368E 3502 26087+ LRER FR0,FR2
013690 3502 26088+ LRER FR0,FR2
013692 3502 26089+ LRER FR0,FR2
013694 3502 26090+ LRER FR0,FR2
013696 3502 26091+ LRER FR0,FR2
013698 3502 26092+ LRER FR0,FR2
01369A 3502 26093+ LRER FR0,FR2
01369C 3502 26094+ LRER FR0,FR2
01369E 3502 26095+ LRER FR0,FR2
0136A0 3502 26096+ LRER FR0,FR2
0136A2 3502 26097+ LRER FR0,FR2
0136A4 3502 26098+ LRER FR0,FR2
0136A6 3502 26099+ LRER FR0,FR2
0136A8 3502 26100+ LRER FR0,FR2
0136AA 3502 26101+ LRER FR0,FR2
0136AC 3502 26102+ LRER FR0,FR2
0136AE 3502 26103+ LRER FR0,FR2
0136B0 3502 26104+ LRER FR0,FR2
0136B2 3502 26105+ LRER FR0,FR2
0136B4 3502 26106+ LRER FR0,FR2
0136B6 3502 26107+ LRER FR0,FR2
0136B8 3502 26108+ LRER FR0,FR2
0136BA 3502 26109+ LRER FR0,FR2
0136BC 3502 26110+ LRER FR0,FR2
0136BE 3502 26111+ LRER FR0,FR2
0136C0 3502 26112+ LRER FR0,FR2
0136C2 3502 26113+ LRER FR0,FR2
0136C4 3502 26114+ LRER FR0,FR2
0136C6 3502 26115+ LRER FR0,FR2
0136C8 3502 26116+ LRER FR0,FR2
0136CA 3502 26117+ LRER FR0,FR2
0136CC 3502 26118+ LRER FR0,FR2
0136CE 3502 26119+ LRER FR0,FR2
0136D0 3502 26120+ LRER FR0,FR2
0136D2 3502 26121+ LRER FR0,FR2
0136D4 3502 26122+ LRER FR0,FR2
0136D6 3502 26123+ LRER FR0,FR2
0136D8 3502 26124+ LRER FR0,FR2
0136DA 3502 26125+ LRER FR0,FR2
0136DC 3502 26126+ LRER FR0,FR2
0136DE 3502 26127+ LRER FR0,FR2
0136E0 3502 26128+ LRER FR0,FR2
0136E2 3502 26129+ LRER FR0,FR2
0136E4 3502 26130+ LRER FR0,FR2
PAGE 478
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0136E6 3502 26131+ LRER FR0,FR2
0136E8 3502 26132+ LRER FR0,FR2
0136EA 3502 26133+ LRER FR0,FR2
0136EC 3502 26134+ LRER FR0,FR2
0136EE 3502 26135+ LRER FR0,FR2
0136F0 3502 26136+ LRER FR0,FR2
0136F2 3502 26137+ LRER FR0,FR2
0136F4 3502 26138+ LRER FR0,FR2
0136F6 3502 26139+ LRER FR0,FR2
0136F8 3502 26140+ LRER FR0,FR2
0136FA 3502 26141+ LRER FR0,FR2
0136FC 3502 26142+ LRER FR0,FR2
0136FE 3502 26143+ LRER FR0,FR2
013700 3502 26144+ LRER FR0,FR2
013702 3502 26145+ LRER FR0,FR2
013704 3502 26146+ LRER FR0,FR2
013706 3502 26147+ LRER FR0,FR2
013708 3502 26148+ LRER FR0,FR2
01370A 3502 26149+ LRER FR0,FR2
01370C 3502 26150+ LRER FR0,FR2
01370E 3502 26151+ LRER FR0,FR2
013710 3502 26152+ LRER FR0,FR2
013712 3502 26153+ LRER FR0,FR2
013714 3502 26154+ LRER FR0,FR2
013716 3502 26155+ LRER FR0,FR2
013718 3502 26156+ LRER FR0,FR2
01371A 3502 26157+ LRER FR0,FR2
01371C 3502 26158+ LRER FR0,FR2
01371E 3502 26159+ LRER FR0,FR2
013720 3502 26160+ LRER FR0,FR2
013722 3502 26161+ LRER FR0,FR2
013724 3502 26162+ LRER FR0,FR2
013726 3502 26163+ LRER FR0,FR2
013728 3502 26164+ LRER FR0,FR2
01372A 3502 26165+ LRER FR0,FR2
01372C 3502 26166+ LRER FR0,FR2
01372E 3502 26167+ LRER FR0,FR2
013730 3502 26168+ LRER FR0,FR2
013732 3502 26169+ LRER FR0,FR2
013734 3502 26170+ LRER FR0,FR2
013736 3502 26171+ LRER FR0,FR2
013738 3502 26172+ LRER FR0,FR2
01373A 3502 26173+ LRER FR0,FR2
01373C 3502 26174+ LRER FR0,FR2
01373E 3502 26175+ LRER FR0,FR2
013740 3502 26176+ LRER FR0,FR2
013742 3502 26177+ LRER FR0,FR2
013744 3502 26178+ LRER FR0,FR2
013746 3502 26179+ LRER FR0,FR2
013748 3502 26180+ LRER FR0,FR2
26181+*
01374A 06FB 26182 BCTR R15,R11
26183 TSIMRET
01374C 58F0 C108 13768 26184+ L R15,=A(SAVETST) R15 := current save area
013750 58DF 0004 00004 26185+ L R13,4(R15) get old save area back
PAGE 479
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013754 98EC D00C 0000C 26186+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013758 07FE 26187+ BR 14 RETURN 02000000
26188 TSIMEND
013760 26189+ LTORG
013760 411199999999999A 26190 =D'1.1'
013768 00000458 26191 =A(SAVETST)
1376C 26192+T507TEND EQU *
26193 *
26194 * Test 508 -- STE R,m --------------------------------------
26195 *
26196 TSIMBEG T508,10000,50,1,C'STE R,m'
26197+*
003B24 26198+TDSCDAT CSECT
003B28 26199+ DS 0D
26200+*
003B28 00013770 26201+T508TDSC DC A(T508) // TENTRY
003B2C 00000104 26202+ DC A(T508TEND-T508) // TLENGTH
003B30 00002710 26203+ DC F'10000' // TLRCNT
003B34 00000032 26204+ DC F'50' // TIGCNT
003B38 00000001 26205+ DC F'1' // TLTYPE
001B2B 26206+TEXT CSECT
001B2B E3F5F0F8 26207+SPTR2325 DC C'T508'
003B3C 26208+TDSCDAT CSECT
003B3C 26209+ DS 0F
003B3C 04001B2B 26210+ DC AL1(L'SPTR2325),AL3(SPTR2325)
001B2F 26211+TEXT CSECT
001B2F E2E3C540D96B94 26212+SPTR2326 DC C'STE R,m'
003B40 26213+TDSCDAT CSECT
003B40 26214+ DS 0F
003B40 07001B2F 26215+ DC AL1(L'SPTR2326),AL3(SPTR2326)
26216+*
004C90 26217+TDSCTBL CSECT
04C90 26218+T508TPTR EQU *
004C90 00003B28 26219+ DC A(T508TDSC) enabled test
26220+*
01376C 26221+TCODE CSECT
013770 26222+ DS 0D ensure double word alignment for test
013770 26223+T508 DS 0H 01650000
013770 90EC D00C 0000C 26224+ STM 14,12,12(13) SAVE REGISTERS 02950000
013774 18CF 26225+ LR R12,R15 base register := entry address
13770 26226+ USING T508,R12 declare code base register
013776 41B0 C01E 1378E 26227+ LA R11,T508L load loop target to R11
01377A 58F0 C100 13870 26228+ L R15,=A(SAVETST) R15 := current save area
01377E 50DF 0004 00004 26229+ ST R13,4(R15) set back pointer in current save area
013782 182D 26230+ LR R2,R13 remember callers save area
013784 18DF 26231+ LR R13,R15 setup current save area
013786 50D2 0008 00008 26232+ ST R13,8(R2) set forw pointer in callers save area
00000 26233+ USING TDSC,R1 declare TDSC base register
01378A 58F0 1008 00008 26234+ L R15,TLRCNT load local repeat count to R15
26235+*
26236 *
26237 T508L REPINS STE,(FR0,T508V) repeat: STE FR0,T508V'
26238+*
26239+* build from sublist &ALIST a comma separated string &ARGS
26240+*
PAGE 480
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
26241+*
26242+*
26243+*
26244+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
26245+* this allows to transfer the repeat count from last TDSCGEN call
26246+*
26247+*
1378E 26248+T508L EQU *
26249+*
26250+* write a comment indicating what REPINS does (in case NOGEN in effect)
26251+*
26252+*,// REPINS: do 50 times:
26253+*
26254+* MNOTE requires that ' is doubled for expanded variables
26255+* thus build &MASTR as a copy of '&ARGS with ' doubled
26256+*
26257+*
26258+*,// STE FR0,T508V
26259+*
26260+* finally generate code: &ICNT copies of &CODE &ARGS
26261+*
01378E 7000 C0F8 13868 26262+ STE FR0,T508V
013792 7000 C0F8 13868 26263+ STE FR0,T508V
013796 7000 C0F8 13868 26264+ STE FR0,T508V
01379A 7000 C0F8 13868 26265+ STE FR0,T508V
01379E 7000 C0F8 13868 26266+ STE FR0,T508V
0137A2 7000 C0F8 13868 26267+ STE FR0,T508V
0137A6 7000 C0F8 13868 26268+ STE FR0,T508V
0137AA 7000 C0F8 13868 26269+ STE FR0,T508V
0137AE 7000 C0F8 13868 26270+ STE FR0,T508V
0137B2 7000 C0F8 13868 26271+ STE FR0,T508V
0137B6 7000 C0F8 13868 26272+ STE FR0,T508V
0137BA 7000 C0F8 13868 26273+ STE FR0,T508V
0137BE 7000 C0F8 13868 26274+ STE FR0,T508V
0137C2 7000 C0F8 13868 26275+ STE FR0,T508V
0137C6 7000 C0F8 13868 26276+ STE FR0,T508V
0137CA 7000 C0F8 13868 26277+ STE FR0,T508V
0137CE 7000 C0F8 13868 26278+ STE FR0,T508V
0137D2 7000 C0F8 13868 26279+ STE FR0,T508V
0137D6 7000 C0F8 13868 26280+ STE FR0,T508V
0137DA 7000 C0F8 13868 26281+ STE FR0,T508V
0137DE 7000 C0F8 13868 26282+ STE FR0,T508V
0137E2 7000 C0F8 13868 26283+ STE FR0,T508V
0137E6 7000 C0F8 13868 26284+ STE FR0,T508V
0137EA 7000 C0F8 13868 26285+ STE FR0,T508V
0137EE 7000 C0F8 13868 26286+ STE FR0,T508V
0137F2 7000 C0F8 13868 26287+ STE FR0,T508V
0137F6 7000 C0F8 13868 26288+ STE FR0,T508V
0137FA 7000 C0F8 13868 26289+ STE FR0,T508V
0137FE 7000 C0F8 13868 26290+ STE FR0,T508V
013802 7000 C0F8 13868 26291+ STE FR0,T508V
013806 7000 C0F8 13868 26292+ STE FR0,T508V
01380A 7000 C0F8 13868 26293+ STE FR0,T508V
01380E 7000 C0F8 13868 26294+ STE FR0,T508V
013812 7000 C0F8 13868 26295+ STE FR0,T508V
PAGE 481
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013816 7000 C0F8 13868 26296+ STE FR0,T508V
01381A 7000 C0F8 13868 26297+ STE FR0,T508V
01381E 7000 C0F8 13868 26298+ STE FR0,T508V
013822 7000 C0F8 13868 26299+ STE FR0,T508V
013826 7000 C0F8 13868 26300+ STE FR0,T508V
01382A 7000 C0F8 13868 26301+ STE FR0,T508V
01382E 7000 C0F8 13868 26302+ STE FR0,T508V
013832 7000 C0F8 13868 26303+ STE FR0,T508V
013836 7000 C0F8 13868 26304+ STE FR0,T508V
01383A 7000 C0F8 13868 26305+ STE FR0,T508V
01383E 7000 C0F8 13868 26306+ STE FR0,T508V
013842 7000 C0F8 13868 26307+ STE FR0,T508V
013846 7000 C0F8 13868 26308+ STE FR0,T508V
01384A 7000 C0F8 13868 26309+ STE FR0,T508V
01384E 7000 C0F8 13868 26310+ STE FR0,T508V
013852 7000 C0F8 13868 26311+ STE FR0,T508V
26312+*
013856 06FB 26313 BCTR R15,R11
26314 TSIMRET
013858 58F0 C100 13870 26315+ L R15,=A(SAVETST) R15 := current save area
01385C 58DF 0004 00004 26316+ L R13,4(R15) get old save area back
013860 98EC D00C 0000C 26317+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013864 07FE 26318+ BR 14 RETURN 02000000
26319 *
013868 26320 T508V DS 1E
26321 TSIMEND
013870 26322+ LTORG
013870 00000458 26323 =A(SAVETST)
13874 26324+T508TEND EQU *
26325 *
26326 * Test 509 -- STE R,m (unal) -------------------------------
26327 *
26328 TSIMBEG T509,10000,50,1,C'STE R,m (unal)'
26329+*
003B44 26330+TDSCDAT CSECT
003B48 26331+ DS 0D
26332+*
003B48 00013878 26333+T509TDSC DC A(T509) // TENTRY
003B4C 0000010C 26334+ DC A(T509TEND-T509) // TLENGTH
003B50 00002710 26335+ DC F'10000' // TLRCNT
003B54 00000032 26336+ DC F'50' // TIGCNT
003B58 00000001 26337+ DC F'1' // TLTYPE
001B36 26338+TEXT CSECT
001B36 E3F5F0F9 26339+SPTR2337 DC C'T509'
003B5C 26340+TDSCDAT CSECT
003B5C 26341+ DS 0F
003B5C 04001B36 26342+ DC AL1(L'SPTR2337),AL3(SPTR2337)
001B3A 26343+TEXT CSECT
001B3A E2E3C540D96B9440 26344+SPTR2338 DC C'STE R,m (unal)'
003B60 26345+TDSCDAT CSECT
003B60 26346+ DS 0F
003B60 0E001B3A 26347+ DC AL1(L'SPTR2338),AL3(SPTR2338)
26348+*
004C94 26349+TDSCTBL CSECT
04C94 26350+T509TPTR EQU *
PAGE 482
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004C94 00003B48 26351+ DC A(T509TDSC) enabled test
26352+*
013874 26353+TCODE CSECT
013878 26354+ DS 0D ensure double word alignment for test
013878 26355+T509 DS 0H 01650000
013878 90EC D00C 0000C 26356+ STM 14,12,12(13) SAVE REGISTERS 02950000
01387C 18CF 26357+ LR R12,R15 base register := entry address
13878 26358+ USING T509,R12 declare code base register
01387E 41B0 C022 1389A 26359+ LA R11,T509L load loop target to R11
013882 58F0 C108 13980 26360+ L R15,=A(SAVETST) R15 := current save area
013886 50DF 0004 00004 26361+ ST R13,4(R15) set back pointer in current save area
01388A 182D 26362+ LR R2,R13 remember callers save area
01388C 18DF 26363+ LR R13,R15 setup current save area
01388E 50D2 0008 00008 26364+ ST R13,8(R2) set forw pointer in callers save area
00000 26365+ USING TDSC,R1 declare TDSC base register
013892 58F0 1008 00008 26366+ L R15,TLRCNT load local repeat count to R15
26367+*
26368 *
013896 4130 C0FC 13974 26369 LA R3,T509V
26370 T509L REPINS STE,(FR0,1(R3)) repeat: STE FR0,1(R3)'
26371+*
26372+* build from sublist &ALIST a comma separated string &ARGS
26373+*
26374+*
26375+*
26376+*
26377+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
26378+* this allows to transfer the repeat count from last TDSCGEN call
26379+*
26380+*
1389A 26381+T509L EQU *
26382+*
26383+* write a comment indicating what REPINS does (in case NOGEN in effect)
26384+*
26385+*,// REPINS: do 50 times:
26386+*
26387+* MNOTE requires that ' is doubled for expanded variables
26388+* thus build &MASTR as a copy of '&ARGS with ' doubled
26389+*
26390+*
26391+*,// STE FR0,1(R3)
26392+*
26393+* finally generate code: &ICNT copies of &CODE &ARGS
26394+*
01389A 7003 0001 00001 26395+ STE FR0,1(R3)
01389E 7003 0001 00001 26396+ STE FR0,1(R3)
0138A2 7003 0001 00001 26397+ STE FR0,1(R3)
0138A6 7003 0001 00001 26398+ STE FR0,1(R3)
0138AA 7003 0001 00001 26399+ STE FR0,1(R3)
0138AE 7003 0001 00001 26400+ STE FR0,1(R3)
0138B2 7003 0001 00001 26401+ STE FR0,1(R3)
0138B6 7003 0001 00001 26402+ STE FR0,1(R3)
0138BA 7003 0001 00001 26403+ STE FR0,1(R3)
0138BE 7003 0001 00001 26404+ STE FR0,1(R3)
0138C2 7003 0001 00001 26405+ STE FR0,1(R3)
PAGE 483
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0138C6 7003 0001 00001 26406+ STE FR0,1(R3)
0138CA 7003 0001 00001 26407+ STE FR0,1(R3)
0138CE 7003 0001 00001 26408+ STE FR0,1(R3)
0138D2 7003 0001 00001 26409+ STE FR0,1(R3)
0138D6 7003 0001 00001 26410+ STE FR0,1(R3)
0138DA 7003 0001 00001 26411+ STE FR0,1(R3)
0138DE 7003 0001 00001 26412+ STE FR0,1(R3)
0138E2 7003 0001 00001 26413+ STE FR0,1(R3)
0138E6 7003 0001 00001 26414+ STE FR0,1(R3)
0138EA 7003 0001 00001 26415+ STE FR0,1(R3)
0138EE 7003 0001 00001 26416+ STE FR0,1(R3)
0138F2 7003 0001 00001 26417+ STE FR0,1(R3)
0138F6 7003 0001 00001 26418+ STE FR0,1(R3)
0138FA 7003 0001 00001 26419+ STE FR0,1(R3)
0138FE 7003 0001 00001 26420+ STE FR0,1(R3)
013902 7003 0001 00001 26421+ STE FR0,1(R3)
013906 7003 0001 00001 26422+ STE FR0,1(R3)
01390A 7003 0001 00001 26423+ STE FR0,1(R3)
01390E 7003 0001 00001 26424+ STE FR0,1(R3)
013912 7003 0001 00001 26425+ STE FR0,1(R3)
013916 7003 0001 00001 26426+ STE FR0,1(R3)
01391A 7003 0001 00001 26427+ STE FR0,1(R3)
01391E 7003 0001 00001 26428+ STE FR0,1(R3)
013922 7003 0001 00001 26429+ STE FR0,1(R3)
013926 7003 0001 00001 26430+ STE FR0,1(R3)
01392A 7003 0001 00001 26431+ STE FR0,1(R3)
01392E 7003 0001 00001 26432+ STE FR0,1(R3)
013932 7003 0001 00001 26433+ STE FR0,1(R3)
013936 7003 0001 00001 26434+ STE FR0,1(R3)
01393A 7003 0001 00001 26435+ STE FR0,1(R3)
01393E 7003 0001 00001 26436+ STE FR0,1(R3)
013942 7003 0001 00001 26437+ STE FR0,1(R3)
013946 7003 0001 00001 26438+ STE FR0,1(R3)
01394A 7003 0001 00001 26439+ STE FR0,1(R3)
01394E 7003 0001 00001 26440+ STE FR0,1(R3)
013952 7003 0001 00001 26441+ STE FR0,1(R3)
013956 7003 0001 00001 26442+ STE FR0,1(R3)
01395A 7003 0001 00001 26443+ STE FR0,1(R3)
01395E 7003 0001 00001 26444+ STE FR0,1(R3)
26445+*
013962 06FB 26446 BCTR R15,R11
26447 TSIMRET
013964 58F0 C108 13980 26448+ L R15,=A(SAVETST) R15 := current save area
013968 58DF 0004 00004 26449+ L R13,4(R15) get old save area back
01396C 98EC D00C 0000C 26450+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013970 07FE 26451+ BR 14 RETURN 02000000
26452 *
013974 26453 T509V DS 2E
26454 TSIMEND
013980 26455+ LTORG
013980 00000458 26456 =A(SAVETST)
13984 26457+T509TEND EQU *
26458 *
26459 * Test 51x -- short float arithmetic =======================
26460 *
PAGE 484
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
26461 * Test 510 -- AER R,R --------------------------------------
26462 *
26463 TSIMBEG T510,8000,50,1,C'AER R,R'
26464+*
003B64 26465+TDSCDAT CSECT
003B68 26466+ DS 0D
26467+*
003B68 00013988 26468+T510TDSC DC A(T510) // TENTRY
003B6C 000000A0 26469+ DC A(T510TEND-T510) // TLENGTH
003B70 00001F40 26470+ DC F'8000' // TLRCNT
003B74 00000032 26471+ DC F'50' // TIGCNT
003B78 00000001 26472+ DC F'1' // TLTYPE
001B48 26473+TEXT CSECT
001B48 E3F5F1F0 26474+SPTR2349 DC C'T510'
003B7C 26475+TDSCDAT CSECT
003B7C 26476+ DS 0F
003B7C 04001B48 26477+ DC AL1(L'SPTR2349),AL3(SPTR2349)
001B4C 26478+TEXT CSECT
001B4C C1C5D940D96BD9 26479+SPTR2350 DC C'AER R,R'
003B80 26480+TDSCDAT CSECT
003B80 26481+ DS 0F
003B80 07001B4C 26482+ DC AL1(L'SPTR2350),AL3(SPTR2350)
26483+*
004C98 26484+TDSCTBL CSECT
04C98 26485+T510TPTR EQU *
004C98 00003B68 26486+ DC A(T510TDSC) enabled test
26487+*
013984 26488+TCODE CSECT
013988 26489+ DS 0D ensure double word alignment for test
013988 26490+T510 DS 0H 01650000
013988 90EC D00C 0000C 26491+ STM 14,12,12(13) SAVE REGISTERS 02950000
01398C 18CF 26492+ LR R12,R15 base register := entry address
13988 26493+ USING T510,R12 declare code base register
01398E 41B0 C024 139AC 26494+ LA R11,T510L load loop target to R11
013992 58F0 C098 13A20 26495+ L R15,=A(SAVETST) R15 := current save area
013996 50DF 0004 00004 26496+ ST R13,4(R15) set back pointer in current save area
01399A 182D 26497+ LR R2,R13 remember callers save area
01399C 18DF 26498+ LR R13,R15 setup current save area
01399E 50D2 0008 00008 26499+ ST R13,8(R2) set forw pointer in callers save area
00000 26500+ USING TDSC,R1 declare TDSC base register
0139A2 58F0 1008 00008 26501+ L R15,TLRCNT load local repeat count to R15
26502+*
26503 *
0139A6 3B00 26504 SER FR0,FR0
0139A8 7820 C09C 13A24 26505 LE FR2,=E'1.1'
26506 T510L REPINS AER,(FR0,FR2) repeat: AER FR0,FR2
26507+*
26508+* build from sublist &ALIST a comma separated string &ARGS
26509+*
26510+*
26511+*
26512+*
26513+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
26514+* this allows to transfer the repeat count from last TDSCGEN call
26515+*
PAGE 485
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
26516+*
139AC 26517+T510L EQU *
26518+*
26519+* write a comment indicating what REPINS does (in case NOGEN in effect)
26520+*
26521+*,// REPINS: do 50 times:
26522+*
26523+* MNOTE requires that ' is doubled for expanded variables
26524+* thus build &MASTR as a copy of '&ARGS with ' doubled
26525+*
26526+*
26527+*,// AER FR0,FR2
26528+*
26529+* finally generate code: &ICNT copies of &CODE &ARGS
26530+*
0139AC 3A02 26531+ AER FR0,FR2
0139AE 3A02 26532+ AER FR0,FR2
0139B0 3A02 26533+ AER FR0,FR2
0139B2 3A02 26534+ AER FR0,FR2
0139B4 3A02 26535+ AER FR0,FR2
0139B6 3A02 26536+ AER FR0,FR2
0139B8 3A02 26537+ AER FR0,FR2
0139BA 3A02 26538+ AER FR0,FR2
0139BC 3A02 26539+ AER FR0,FR2
0139BE 3A02 26540+ AER FR0,FR2
0139C0 3A02 26541+ AER FR0,FR2
0139C2 3A02 26542+ AER FR0,FR2
0139C4 3A02 26543+ AER FR0,FR2
0139C6 3A02 26544+ AER FR0,FR2
0139C8 3A02 26545+ AER FR0,FR2
0139CA 3A02 26546+ AER FR0,FR2
0139CC 3A02 26547+ AER FR0,FR2
0139CE 3A02 26548+ AER FR0,FR2
0139D0 3A02 26549+ AER FR0,FR2
0139D2 3A02 26550+ AER FR0,FR2
0139D4 3A02 26551+ AER FR0,FR2
0139D6 3A02 26552+ AER FR0,FR2
0139D8 3A02 26553+ AER FR0,FR2
0139DA 3A02 26554+ AER FR0,FR2
0139DC 3A02 26555+ AER FR0,FR2
0139DE 3A02 26556+ AER FR0,FR2
0139E0 3A02 26557+ AER FR0,FR2
0139E2 3A02 26558+ AER FR0,FR2
0139E4 3A02 26559+ AER FR0,FR2
0139E6 3A02 26560+ AER FR0,FR2
0139E8 3A02 26561+ AER FR0,FR2
0139EA 3A02 26562+ AER FR0,FR2
0139EC 3A02 26563+ AER FR0,FR2
0139EE 3A02 26564+ AER FR0,FR2
0139F0 3A02 26565+ AER FR0,FR2
0139F2 3A02 26566+ AER FR0,FR2
0139F4 3A02 26567+ AER FR0,FR2
0139F6 3A02 26568+ AER FR0,FR2
0139F8 3A02 26569+ AER FR0,FR2
0139FA 3A02 26570+ AER FR0,FR2
PAGE 486
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0139FC 3A02 26571+ AER FR0,FR2
0139FE 3A02 26572+ AER FR0,FR2
013A00 3A02 26573+ AER FR0,FR2
013A02 3A02 26574+ AER FR0,FR2
013A04 3A02 26575+ AER FR0,FR2
013A06 3A02 26576+ AER FR0,FR2
013A08 3A02 26577+ AER FR0,FR2
013A0A 3A02 26578+ AER FR0,FR2
013A0C 3A02 26579+ AER FR0,FR2
013A0E 3A02 26580+ AER FR0,FR2
26581+*
013A10 06FB 26582 BCTR R15,R11
26583 TSIMRET
013A12 58F0 C098 13A20 26584+ L R15,=A(SAVETST) R15 := current save area
013A16 58DF 0004 00004 26585+ L R13,4(R15) get old save area back
013A1A 98EC D00C 0000C 26586+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013A1E 07FE 26587+ BR 14 RETURN 02000000
26588 TSIMEND
013A20 26589+ LTORG
013A20 00000458 26590 =A(SAVETST)
013A24 4111999A 26591 =E'1.1'
13A28 26592+T510TEND EQU *
26593 *
26594 * Test 511 -- AE R,m ---------------------------------------
26595 *
26596 TSIMBEG T511,6000,50,1,C'AE R,m'
26597+*
003B84 26598+TDSCDAT CSECT
003B88 26599+ DS 0D
26600+*
003B88 00013A28 26601+T511TDSC DC A(T511) // TENTRY
003B8C 00000100 26602+ DC A(T511TEND-T511) // TLENGTH
003B90 00001770 26603+ DC F'6000' // TLRCNT
003B94 00000032 26604+ DC F'50' // TIGCNT
003B98 00000001 26605+ DC F'1' // TLTYPE
001B53 26606+TEXT CSECT
001B53 E3F5F1F1 26607+SPTR2361 DC C'T511'
003B9C 26608+TDSCDAT CSECT
003B9C 26609+ DS 0F
003B9C 04001B53 26610+ DC AL1(L'SPTR2361),AL3(SPTR2361)
001B57 26611+TEXT CSECT
001B57 C1C540D96B94 26612+SPTR2362 DC C'AE R,m'
003BA0 26613+TDSCDAT CSECT
003BA0 26614+ DS 0F
003BA0 06001B57 26615+ DC AL1(L'SPTR2362),AL3(SPTR2362)
26616+*
004C9C 26617+TDSCTBL CSECT
04C9C 26618+T511TPTR EQU *
004C9C 00003B88 26619+ DC A(T511TDSC) enabled test
26620+*
013A28 26621+TCODE CSECT
013A28 26622+ DS 0D ensure double word alignment for test
013A28 26623+T511 DS 0H 01650000
013A28 90EC D00C 0000C 26624+ STM 14,12,12(13) SAVE REGISTERS 02950000
013A2C 18CF 26625+ LR R12,R15 base register := entry address
PAGE 487
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
13A28 26626+ USING T511,R12 declare code base register
013A2E 41B0 C020 13A48 26627+ LA R11,T511L load loop target to R11
013A32 58F0 C0F8 13B20 26628+ L R15,=A(SAVETST) R15 := current save area
013A36 50DF 0004 00004 26629+ ST R13,4(R15) set back pointer in current save area
013A3A 182D 26630+ LR R2,R13 remember callers save area
013A3C 18DF 26631+ LR R13,R15 setup current save area
013A3E 50D2 0008 00008 26632+ ST R13,8(R2) set forw pointer in callers save area
00000 26633+ USING TDSC,R1 declare TDSC base register
013A42 58F0 1008 00008 26634+ L R15,TLRCNT load local repeat count to R15
26635+*
26636 *
013A46 3B00 26637 SER FR0,FR0
26638 T511L REPINS AE,(FR0,=E'1.1') repeat: AE FR0,=E'1.1'
26639+*
26640+* build from sublist &ALIST a comma separated string &ARGS
26641+*
26642+*
26643+*
26644+*
26645+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
26646+* this allows to transfer the repeat count from last TDSCGEN call
26647+*
26648+*
13A48 26649+T511L EQU *
26650+*
26651+* write a comment indicating what REPINS does (in case NOGEN in effect)
26652+*
26653+*,// REPINS: do 50 times:
26654+*
26655+* MNOTE requires that ' is doubled for expanded variables
26656+* thus build &MASTR as a copy of '&ARGS with ' doubled
26657+*
26658+*
26659+*,// AE FR0,=E'1.1'
26660+*
26661+* finally generate code: &ICNT copies of &CODE &ARGS
26662+*
013A48 7A00 C0FC 13B24 26663+ AE FR0,=E'1.1'
013A4C 7A00 C0FC 13B24 26664+ AE FR0,=E'1.1'
013A50 7A00 C0FC 13B24 26665+ AE FR0,=E'1.1'
013A54 7A00 C0FC 13B24 26666+ AE FR0,=E'1.1'
013A58 7A00 C0FC 13B24 26667+ AE FR0,=E'1.1'
013A5C 7A00 C0FC 13B24 26668+ AE FR0,=E'1.1'
013A60 7A00 C0FC 13B24 26669+ AE FR0,=E'1.1'
013A64 7A00 C0FC 13B24 26670+ AE FR0,=E'1.1'
013A68 7A00 C0FC 13B24 26671+ AE FR0,=E'1.1'
013A6C 7A00 C0FC 13B24 26672+ AE FR0,=E'1.1'
013A70 7A00 C0FC 13B24 26673+ AE FR0,=E'1.1'
013A74 7A00 C0FC 13B24 26674+ AE FR0,=E'1.1'
013A78 7A00 C0FC 13B24 26675+ AE FR0,=E'1.1'
013A7C 7A00 C0FC 13B24 26676+ AE FR0,=E'1.1'
013A80 7A00 C0FC 13B24 26677+ AE FR0,=E'1.1'
013A84 7A00 C0FC 13B24 26678+ AE FR0,=E'1.1'
013A88 7A00 C0FC 13B24 26679+ AE FR0,=E'1.1'
013A8C 7A00 C0FC 13B24 26680+ AE FR0,=E'1.1'
PAGE 488
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013A90 7A00 C0FC 13B24 26681+ AE FR0,=E'1.1'
013A94 7A00 C0FC 13B24 26682+ AE FR0,=E'1.1'
013A98 7A00 C0FC 13B24 26683+ AE FR0,=E'1.1'
013A9C 7A00 C0FC 13B24 26684+ AE FR0,=E'1.1'
013AA0 7A00 C0FC 13B24 26685+ AE FR0,=E'1.1'
013AA4 7A00 C0FC 13B24 26686+ AE FR0,=E'1.1'
013AA8 7A00 C0FC 13B24 26687+ AE FR0,=E'1.1'
013AAC 7A00 C0FC 13B24 26688+ AE FR0,=E'1.1'
013AB0 7A00 C0FC 13B24 26689+ AE FR0,=E'1.1'
013AB4 7A00 C0FC 13B24 26690+ AE FR0,=E'1.1'
013AB8 7A00 C0FC 13B24 26691+ AE FR0,=E'1.1'
013ABC 7A00 C0FC 13B24 26692+ AE FR0,=E'1.1'
013AC0 7A00 C0FC 13B24 26693+ AE FR0,=E'1.1'
013AC4 7A00 C0FC 13B24 26694+ AE FR0,=E'1.1'
013AC8 7A00 C0FC 13B24 26695+ AE FR0,=E'1.1'
013ACC 7A00 C0FC 13B24 26696+ AE FR0,=E'1.1'
013AD0 7A00 C0FC 13B24 26697+ AE FR0,=E'1.1'
013AD4 7A00 C0FC 13B24 26698+ AE FR0,=E'1.1'
013AD8 7A00 C0FC 13B24 26699+ AE FR0,=E'1.1'
013ADC 7A00 C0FC 13B24 26700+ AE FR0,=E'1.1'
013AE0 7A00 C0FC 13B24 26701+ AE FR0,=E'1.1'
013AE4 7A00 C0FC 13B24 26702+ AE FR0,=E'1.1'
013AE8 7A00 C0FC 13B24 26703+ AE FR0,=E'1.1'
013AEC 7A00 C0FC 13B24 26704+ AE FR0,=E'1.1'
013AF0 7A00 C0FC 13B24 26705+ AE FR0,=E'1.1'
013AF4 7A00 C0FC 13B24 26706+ AE FR0,=E'1.1'
013AF8 7A00 C0FC 13B24 26707+ AE FR0,=E'1.1'
013AFC 7A00 C0FC 13B24 26708+ AE FR0,=E'1.1'
013B00 7A00 C0FC 13B24 26709+ AE FR0,=E'1.1'
013B04 7A00 C0FC 13B24 26710+ AE FR0,=E'1.1'
013B08 7A00 C0FC 13B24 26711+ AE FR0,=E'1.1'
013B0C 7A00 C0FC 13B24 26712+ AE FR0,=E'1.1'
26713+*
013B10 06FB 26714 BCTR R15,R11
26715 TSIMRET
013B12 58F0 C0F8 13B20 26716+ L R15,=A(SAVETST) R15 := current save area
013B16 58DF 0004 00004 26717+ L R13,4(R15) get old save area back
013B1A 98EC D00C 0000C 26718+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013B1E 07FE 26719+ BR 14 RETURN 02000000
26720 TSIMEND
013B20 26721+ LTORG
013B20 00000458 26722 =A(SAVETST)
013B24 4111999A 26723 =E'1.1'
13B28 26724+T511TEND EQU *
26725 *
26726 * Test 512 -- SER R,R --------------------------------------
26727 *
26728 TSIMBEG T512,8000,50,1,C'SER R,R'
26729+*
003BA4 26730+TDSCDAT CSECT
003BA8 26731+ DS 0D
26732+*
003BA8 00013B28 26733+T512TDSC DC A(T512) // TENTRY
003BAC 000000A0 26734+ DC A(T512TEND-T512) // TLENGTH
003BB0 00001F40 26735+ DC F'8000' // TLRCNT
PAGE 489
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003BB4 00000032 26736+ DC F'50' // TIGCNT
003BB8 00000001 26737+ DC F'1' // TLTYPE
001B5D 26738+TEXT CSECT
001B5D E3F5F1F2 26739+SPTR2373 DC C'T512'
003BBC 26740+TDSCDAT CSECT
003BBC 26741+ DS 0F
003BBC 04001B5D 26742+ DC AL1(L'SPTR2373),AL3(SPTR2373)
001B61 26743+TEXT CSECT
001B61 E2C5D940D96BD9 26744+SPTR2374 DC C'SER R,R'
003BC0 26745+TDSCDAT CSECT
003BC0 26746+ DS 0F
003BC0 07001B61 26747+ DC AL1(L'SPTR2374),AL3(SPTR2374)
26748+*
004CA0 26749+TDSCTBL CSECT
04CA0 26750+T512TPTR EQU *
004CA0 00003BA8 26751+ DC A(T512TDSC) enabled test
26752+*
013B28 26753+TCODE CSECT
013B28 26754+ DS 0D ensure double word alignment for test
013B28 26755+T512 DS 0H 01650000
013B28 90EC D00C 0000C 26756+ STM 14,12,12(13) SAVE REGISTERS 02950000
013B2C 18CF 26757+ LR R12,R15 base register := entry address
13B28 26758+ USING T512,R12 declare code base register
013B2E 41B0 C024 13B4C 26759+ LA R11,T512L load loop target to R11
013B32 58F0 C098 13BC0 26760+ L R15,=A(SAVETST) R15 := current save area
013B36 50DF 0004 00004 26761+ ST R13,4(R15) set back pointer in current save area
013B3A 182D 26762+ LR R2,R13 remember callers save area
013B3C 18DF 26763+ LR R13,R15 setup current save area
013B3E 50D2 0008 00008 26764+ ST R13,8(R2) set forw pointer in callers save area
00000 26765+ USING TDSC,R1 declare TDSC base register
013B42 58F0 1008 00008 26766+ L R15,TLRCNT load local repeat count to R15
26767+*
26768 *
013B46 3B00 26769 SER FR0,FR0
013B48 7820 C09C 13BC4 26770 LE FR2,=E'1.1'
26771 T512L REPINS SER,(FR0,FR2) repeat: SER FR0,FR2
26772+*
26773+* build from sublist &ALIST a comma separated string &ARGS
26774+*
26775+*
26776+*
26777+*
26778+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
26779+* this allows to transfer the repeat count from last TDSCGEN call
26780+*
26781+*
13B4C 26782+T512L EQU *
26783+*
26784+* write a comment indicating what REPINS does (in case NOGEN in effect)
26785+*
26786+*,// REPINS: do 50 times:
26787+*
26788+* MNOTE requires that ' is doubled for expanded variables
26789+* thus build &MASTR as a copy of '&ARGS with ' doubled
26790+*
PAGE 490
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
26791+*
26792+*,// SER FR0,FR2
26793+*
26794+* finally generate code: &ICNT copies of &CODE &ARGS
26795+*
013B4C 3B02 26796+ SER FR0,FR2
013B4E 3B02 26797+ SER FR0,FR2
013B50 3B02 26798+ SER FR0,FR2
013B52 3B02 26799+ SER FR0,FR2
013B54 3B02 26800+ SER FR0,FR2
013B56 3B02 26801+ SER FR0,FR2
013B58 3B02 26802+ SER FR0,FR2
013B5A 3B02 26803+ SER FR0,FR2
013B5C 3B02 26804+ SER FR0,FR2
013B5E 3B02 26805+ SER FR0,FR2
013B60 3B02 26806+ SER FR0,FR2
013B62 3B02 26807+ SER FR0,FR2
013B64 3B02 26808+ SER FR0,FR2
013B66 3B02 26809+ SER FR0,FR2
013B68 3B02 26810+ SER FR0,FR2
013B6A 3B02 26811+ SER FR0,FR2
013B6C 3B02 26812+ SER FR0,FR2
013B6E 3B02 26813+ SER FR0,FR2
013B70 3B02 26814+ SER FR0,FR2
013B72 3B02 26815+ SER FR0,FR2
013B74 3B02 26816+ SER FR0,FR2
013B76 3B02 26817+ SER FR0,FR2
013B78 3B02 26818+ SER FR0,FR2
013B7A 3B02 26819+ SER FR0,FR2
013B7C 3B02 26820+ SER FR0,FR2
013B7E 3B02 26821+ SER FR0,FR2
013B80 3B02 26822+ SER FR0,FR2
013B82 3B02 26823+ SER FR0,FR2
013B84 3B02 26824+ SER FR0,FR2
013B86 3B02 26825+ SER FR0,FR2
013B88 3B02 26826+ SER FR0,FR2
013B8A 3B02 26827+ SER FR0,FR2
013B8C 3B02 26828+ SER FR0,FR2
013B8E 3B02 26829+ SER FR0,FR2
013B90 3B02 26830+ SER FR0,FR2
013B92 3B02 26831+ SER FR0,FR2
013B94 3B02 26832+ SER FR0,FR2
013B96 3B02 26833+ SER FR0,FR2
013B98 3B02 26834+ SER FR0,FR2
013B9A 3B02 26835+ SER FR0,FR2
013B9C 3B02 26836+ SER FR0,FR2
013B9E 3B02 26837+ SER FR0,FR2
013BA0 3B02 26838+ SER FR0,FR2
013BA2 3B02 26839+ SER FR0,FR2
013BA4 3B02 26840+ SER FR0,FR2
013BA6 3B02 26841+ SER FR0,FR2
013BA8 3B02 26842+ SER FR0,FR2
013BAA 3B02 26843+ SER FR0,FR2
013BAC 3B02 26844+ SER FR0,FR2
013BAE 3B02 26845+ SER FR0,FR2
PAGE 491
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
26846+*
013BB0 06FB 26847 BCTR R15,R11
26848 TSIMRET
013BB2 58F0 C098 13BC0 26849+ L R15,=A(SAVETST) R15 := current save area
013BB6 58DF 0004 00004 26850+ L R13,4(R15) get old save area back
013BBA 98EC D00C 0000C 26851+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013BBE 07FE 26852+ BR 14 RETURN 02000000
26853 TSIMEND
013BC0 26854+ LTORG
013BC0 00000458 26855 =A(SAVETST)
013BC4 4111999A 26856 =E'1.1'
13BC8 26857+T512TEND EQU *
26858 *
26859 * Test 513 -- SE R,m ---------------------------------------
26860 *
26861 TSIMBEG T513,6000,50,1,C'SE R,m'
26862+*
003BC4 26863+TDSCDAT CSECT
003BC8 26864+ DS 0D
26865+*
003BC8 00013BC8 26866+T513TDSC DC A(T513) // TENTRY
003BCC 00000100 26867+ DC A(T513TEND-T513) // TLENGTH
003BD0 00001770 26868+ DC F'6000' // TLRCNT
003BD4 00000032 26869+ DC F'50' // TIGCNT
003BD8 00000001 26870+ DC F'1' // TLTYPE
001B68 26871+TEXT CSECT
001B68 E3F5F1F3 26872+SPTR2385 DC C'T513'
003BDC 26873+TDSCDAT CSECT
003BDC 26874+ DS 0F
003BDC 04001B68 26875+ DC AL1(L'SPTR2385),AL3(SPTR2385)
001B6C 26876+TEXT CSECT
001B6C E2C540D96B94 26877+SPTR2386 DC C'SE R,m'
003BE0 26878+TDSCDAT CSECT
003BE0 26879+ DS 0F
003BE0 06001B6C 26880+ DC AL1(L'SPTR2386),AL3(SPTR2386)
26881+*
004CA4 26882+TDSCTBL CSECT
04CA4 26883+T513TPTR EQU *
004CA4 00003BC8 26884+ DC A(T513TDSC) enabled test
26885+*
013BC8 26886+TCODE CSECT
013BC8 26887+ DS 0D ensure double word alignment for test
013BC8 26888+T513 DS 0H 01650000
013BC8 90EC D00C 0000C 26889+ STM 14,12,12(13) SAVE REGISTERS 02950000
013BCC 18CF 26890+ LR R12,R15 base register := entry address
13BC8 26891+ USING T513,R12 declare code base register
013BCE 41B0 C020 13BE8 26892+ LA R11,T513L load loop target to R11
013BD2 58F0 C0F8 13CC0 26893+ L R15,=A(SAVETST) R15 := current save area
013BD6 50DF 0004 00004 26894+ ST R13,4(R15) set back pointer in current save area
013BDA 182D 26895+ LR R2,R13 remember callers save area
013BDC 18DF 26896+ LR R13,R15 setup current save area
013BDE 50D2 0008 00008 26897+ ST R13,8(R2) set forw pointer in callers save area
00000 26898+ USING TDSC,R1 declare TDSC base register
013BE2 58F0 1008 00008 26899+ L R15,TLRCNT load local repeat count to R15
26900+*
PAGE 492
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
26901 *
013BE6 3B00 26902 SER FR0,FR0
26903 T513L REPINS SE,(FR0,=E'1.1') repeat: SE FR0,=E'1.1'
26904+*
26905+* build from sublist &ALIST a comma separated string &ARGS
26906+*
26907+*
26908+*
26909+*
26910+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
26911+* this allows to transfer the repeat count from last TDSCGEN call
26912+*
26913+*
13BE8 26914+T513L EQU *
26915+*
26916+* write a comment indicating what REPINS does (in case NOGEN in effect)
26917+*
26918+*,// REPINS: do 50 times:
26919+*
26920+* MNOTE requires that ' is doubled for expanded variables
26921+* thus build &MASTR as a copy of '&ARGS with ' doubled
26922+*
26923+*
26924+*,// SE FR0,=E'1.1'
26925+*
26926+* finally generate code: &ICNT copies of &CODE &ARGS
26927+*
013BE8 7B00 C0FC 13CC4 26928+ SE FR0,=E'1.1'
013BEC 7B00 C0FC 13CC4 26929+ SE FR0,=E'1.1'
013BF0 7B00 C0FC 13CC4 26930+ SE FR0,=E'1.1'
013BF4 7B00 C0FC 13CC4 26931+ SE FR0,=E'1.1'
013BF8 7B00 C0FC 13CC4 26932+ SE FR0,=E'1.1'
013BFC 7B00 C0FC 13CC4 26933+ SE FR0,=E'1.1'
013C00 7B00 C0FC 13CC4 26934+ SE FR0,=E'1.1'
013C04 7B00 C0FC 13CC4 26935+ SE FR0,=E'1.1'
013C08 7B00 C0FC 13CC4 26936+ SE FR0,=E'1.1'
013C0C 7B00 C0FC 13CC4 26937+ SE FR0,=E'1.1'
013C10 7B00 C0FC 13CC4 26938+ SE FR0,=E'1.1'
013C14 7B00 C0FC 13CC4 26939+ SE FR0,=E'1.1'
013C18 7B00 C0FC 13CC4 26940+ SE FR0,=E'1.1'
013C1C 7B00 C0FC 13CC4 26941+ SE FR0,=E'1.1'
013C20 7B00 C0FC 13CC4 26942+ SE FR0,=E'1.1'
013C24 7B00 C0FC 13CC4 26943+ SE FR0,=E'1.1'
013C28 7B00 C0FC 13CC4 26944+ SE FR0,=E'1.1'
013C2C 7B00 C0FC 13CC4 26945+ SE FR0,=E'1.1'
013C30 7B00 C0FC 13CC4 26946+ SE FR0,=E'1.1'
013C34 7B00 C0FC 13CC4 26947+ SE FR0,=E'1.1'
013C38 7B00 C0FC 13CC4 26948+ SE FR0,=E'1.1'
013C3C 7B00 C0FC 13CC4 26949+ SE FR0,=E'1.1'
013C40 7B00 C0FC 13CC4 26950+ SE FR0,=E'1.1'
013C44 7B00 C0FC 13CC4 26951+ SE FR0,=E'1.1'
013C48 7B00 C0FC 13CC4 26952+ SE FR0,=E'1.1'
013C4C 7B00 C0FC 13CC4 26953+ SE FR0,=E'1.1'
013C50 7B00 C0FC 13CC4 26954+ SE FR0,=E'1.1'
013C54 7B00 C0FC 13CC4 26955+ SE FR0,=E'1.1'
PAGE 493
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013C58 7B00 C0FC 13CC4 26956+ SE FR0,=E'1.1'
013C5C 7B00 C0FC 13CC4 26957+ SE FR0,=E'1.1'
013C60 7B00 C0FC 13CC4 26958+ SE FR0,=E'1.1'
013C64 7B00 C0FC 13CC4 26959+ SE FR0,=E'1.1'
013C68 7B00 C0FC 13CC4 26960+ SE FR0,=E'1.1'
013C6C 7B00 C0FC 13CC4 26961+ SE FR0,=E'1.1'
013C70 7B00 C0FC 13CC4 26962+ SE FR0,=E'1.1'
013C74 7B00 C0FC 13CC4 26963+ SE FR0,=E'1.1'
013C78 7B00 C0FC 13CC4 26964+ SE FR0,=E'1.1'
013C7C 7B00 C0FC 13CC4 26965+ SE FR0,=E'1.1'
013C80 7B00 C0FC 13CC4 26966+ SE FR0,=E'1.1'
013C84 7B00 C0FC 13CC4 26967+ SE FR0,=E'1.1'
013C88 7B00 C0FC 13CC4 26968+ SE FR0,=E'1.1'
013C8C 7B00 C0FC 13CC4 26969+ SE FR0,=E'1.1'
013C90 7B00 C0FC 13CC4 26970+ SE FR0,=E'1.1'
013C94 7B00 C0FC 13CC4 26971+ SE FR0,=E'1.1'
013C98 7B00 C0FC 13CC4 26972+ SE FR0,=E'1.1'
013C9C 7B00 C0FC 13CC4 26973+ SE FR0,=E'1.1'
013CA0 7B00 C0FC 13CC4 26974+ SE FR0,=E'1.1'
013CA4 7B00 C0FC 13CC4 26975+ SE FR0,=E'1.1'
013CA8 7B00 C0FC 13CC4 26976+ SE FR0,=E'1.1'
013CAC 7B00 C0FC 13CC4 26977+ SE FR0,=E'1.1'
26978+*
013CB0 06FB 26979 BCTR R15,R11
26980 TSIMRET
013CB2 58F0 C0F8 13CC0 26981+ L R15,=A(SAVETST) R15 := current save area
013CB6 58DF 0004 00004 26982+ L R13,4(R15) get old save area back
013CBA 98EC D00C 0000C 26983+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013CBE 07FE 26984+ BR 14 RETURN 02000000
26985 TSIMEND
013CC0 26986+ LTORG
013CC0 00000458 26987 =A(SAVETST)
013CC4 4111999A 26988 =E'1.1'
13CC8 26989+T513TEND EQU *
26990 *
26991 * Test 514 -- MER R,R --------------------------------------
26992 *
26993 TSIMBEG T514,10000,50,9,C'MER R,R'
26994+*
003BE4 26995+TDSCDAT CSECT
003BE8 26996+ DS 0D
26997+*
003BE8 00013CC8 26998+T514TDSC DC A(T514) // TENTRY
003BEC 000000AC 26999+ DC A(T514TEND-T514) // TLENGTH
003BF0 00002710 27000+ DC F'10000' // TLRCNT
003BF4 00000032 27001+ DC F'50' // TIGCNT
003BF8 00000009 27002+ DC F'9' // TLTYPE
001B72 27003+TEXT CSECT
001B72 E3F5F1F4 27004+SPTR2397 DC C'T514'
003BFC 27005+TDSCDAT CSECT
003BFC 27006+ DS 0F
003BFC 04001B72 27007+ DC AL1(L'SPTR2397),AL3(SPTR2397)
001B76 27008+TEXT CSECT
001B76 D4C5D940D96BD9 27009+SPTR2398 DC C'MER R,R'
003C00 27010+TDSCDAT CSECT
PAGE 494
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003C00 27011+ DS 0F
003C00 07001B76 27012+ DC AL1(L'SPTR2398),AL3(SPTR2398)
27013+*
004CA8 27014+TDSCTBL CSECT
04CA8 27015+T514TPTR EQU *
004CA8 00003BE8 27016+ DC A(T514TDSC) enabled test
27017+*
013CC8 27018+TCODE CSECT
013CC8 27019+ DS 0D ensure double word alignment for test
013CC8 27020+T514 DS 0H 01650000
013CC8 90EC D00C 0000C 27021+ STM 14,12,12(13) SAVE REGISTERS 02950000
013CCC 18CF 27022+ LR R12,R15 base register := entry address
13CC8 27023+ USING T514,R12 declare code base register
013CCE 41B0 C022 13CEA 27024+ LA R11,T514L load loop target to R11
013CD2 58F0 C0A0 13D68 27025+ L R15,=A(SAVETST) R15 := current save area
013CD6 50DF 0004 00004 27026+ ST R13,4(R15) set back pointer in current save area
013CDA 182D 27027+ LR R2,R13 remember callers save area
013CDC 18DF 27028+ LR R13,R15 setup current save area
013CDE 50D2 0008 00008 27029+ ST R13,8(R2) set forw pointer in callers save area
00000 27030+ USING TDSC,R1 declare TDSC base register
013CE2 58F0 1008 00008 27031+ L R15,TLRCNT load local repeat count to R15
27032+*
27033 * inner loop logic:
27034 * load FR0 with 1.0
27035 * multiply 50 times by 1.1
27036 *
013CE6 7820 C0A4 13D6C 27037 LE FR2,=E'1.1'
013CEA 7800 C0A8 13D70 27038 T514L LE FR0,=E'1.0'
27039 REPINS MER,(FR0,FR2) repeat: MER FR0,FR2
27040+*
27041+* build from sublist &ALIST a comma separated string &ARGS
27042+*
27043+*
27044+*
27045+*
27046+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
27047+* this allows to transfer the repeat count from last TDSCGEN call
27048+*
27049+*
27050+*
27051+* write a comment indicating what REPINS does (in case NOGEN in effect)
27052+*
27053+*,// REPINS: do 50 times:
27054+*
27055+* MNOTE requires that ' is doubled for expanded variables
27056+* thus build &MASTR as a copy of '&ARGS with ' doubled
27057+*
27058+*
27059+*,// MER FR0,FR2
27060+*
27061+* finally generate code: &ICNT copies of &CODE &ARGS
27062+*
013CEE 3C02 27063+ MER FR0,FR2
013CF0 3C02 27064+ MER FR0,FR2
013CF2 3C02 27065+ MER FR0,FR2
PAGE 495
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013CF4 3C02 27066+ MER FR0,FR2
013CF6 3C02 27067+ MER FR0,FR2
013CF8 3C02 27068+ MER FR0,FR2
013CFA 3C02 27069+ MER FR0,FR2
013CFC 3C02 27070+ MER FR0,FR2
013CFE 3C02 27071+ MER FR0,FR2
013D00 3C02 27072+ MER FR0,FR2
013D02 3C02 27073+ MER FR0,FR2
013D04 3C02 27074+ MER FR0,FR2
013D06 3C02 27075+ MER FR0,FR2
013D08 3C02 27076+ MER FR0,FR2
013D0A 3C02 27077+ MER FR0,FR2
013D0C 3C02 27078+ MER FR0,FR2
013D0E 3C02 27079+ MER FR0,FR2
013D10 3C02 27080+ MER FR0,FR2
013D12 3C02 27081+ MER FR0,FR2
013D14 3C02 27082+ MER FR0,FR2
013D16 3C02 27083+ MER FR0,FR2
013D18 3C02 27084+ MER FR0,FR2
013D1A 3C02 27085+ MER FR0,FR2
013D1C 3C02 27086+ MER FR0,FR2
013D1E 3C02 27087+ MER FR0,FR2
013D20 3C02 27088+ MER FR0,FR2
013D22 3C02 27089+ MER FR0,FR2
013D24 3C02 27090+ MER FR0,FR2
013D26 3C02 27091+ MER FR0,FR2
013D28 3C02 27092+ MER FR0,FR2
013D2A 3C02 27093+ MER FR0,FR2
013D2C 3C02 27094+ MER FR0,FR2
013D2E 3C02 27095+ MER FR0,FR2
013D30 3C02 27096+ MER FR0,FR2
013D32 3C02 27097+ MER FR0,FR2
013D34 3C02 27098+ MER FR0,FR2
013D36 3C02 27099+ MER FR0,FR2
013D38 3C02 27100+ MER FR0,FR2
013D3A 3C02 27101+ MER FR0,FR2
013D3C 3C02 27102+ MER FR0,FR2
013D3E 3C02 27103+ MER FR0,FR2
013D40 3C02 27104+ MER FR0,FR2
013D42 3C02 27105+ MER FR0,FR2
013D44 3C02 27106+ MER FR0,FR2
013D46 3C02 27107+ MER FR0,FR2
013D48 3C02 27108+ MER FR0,FR2
013D4A 3C02 27109+ MER FR0,FR2
013D4C 3C02 27110+ MER FR0,FR2
013D4E 3C02 27111+ MER FR0,FR2
013D50 3C02 27112+ MER FR0,FR2
27113+*
013D52 06FB 27114 BCTR R15,R11
27115 TSIMRET
013D54 58F0 C0A0 13D68 27116+ L R15,=A(SAVETST) R15 := current save area
013D58 58DF 0004 00004 27117+ L R13,4(R15) get old save area back
013D5C 98EC D00C 0000C 27118+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013D60 07FE 27119+ BR 14 RETURN 02000000
27120 TSIMEND
PAGE 496
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013D68 27121+ LTORG
013D68 00000458 27122 =A(SAVETST)
013D6C 4111999A 27123 =E'1.1'
013D70 41100000 27124 =E'1.0'
13D74 27125+T514TEND EQU *
27126 *
27127 * Test 515 -- ME R,m --------------------------------------
27128 *
27129 TSIMBEG T515,6500,50,9,C'ME R,m'
27130+*
003C04 27131+TDSCDAT CSECT
003C08 27132+ DS 0D
27133+*
003C08 00013D78 27134+T515TDSC DC A(T515) // TENTRY
003C0C 0000010C 27135+ DC A(T515TEND-T515) // TLENGTH
003C10 00001964 27136+ DC F'6500' // TLRCNT
003C14 00000032 27137+ DC F'50' // TIGCNT
003C18 00000009 27138+ DC F'9' // TLTYPE
001B7D 27139+TEXT CSECT
001B7D E3F5F1F5 27140+SPTR2409 DC C'T515'
003C1C 27141+TDSCDAT CSECT
003C1C 27142+ DS 0F
003C1C 04001B7D 27143+ DC AL1(L'SPTR2409),AL3(SPTR2409)
001B81 27144+TEXT CSECT
001B81 D4C540D96B94 27145+SPTR2410 DC C'ME R,m'
003C20 27146+TDSCDAT CSECT
003C20 27147+ DS 0F
003C20 06001B81 27148+ DC AL1(L'SPTR2410),AL3(SPTR2410)
27149+*
004CAC 27150+TDSCTBL CSECT
04CAC 27151+T515TPTR EQU *
004CAC 00003C08 27152+ DC A(T515TDSC) enabled test
27153+*
013D74 27154+TCODE CSECT
013D78 27155+ DS 0D ensure double word alignment for test
013D78 27156+T515 DS 0H 01650000
013D78 90EC D00C 0000C 27157+ STM 14,12,12(13) SAVE REGISTERS 02950000
013D7C 18CF 27158+ LR R12,R15 base register := entry address
13D78 27159+ USING T515,R12 declare code base register
013D7E 41B0 C01E 13D96 27160+ LA R11,T515L load loop target to R11
013D82 58F0 C100 13E78 27161+ L R15,=A(SAVETST) R15 := current save area
013D86 50DF 0004 00004 27162+ ST R13,4(R15) set back pointer in current save area
013D8A 182D 27163+ LR R2,R13 remember callers save area
013D8C 18DF 27164+ LR R13,R15 setup current save area
013D8E 50D2 0008 00008 27165+ ST R13,8(R2) set forw pointer in callers save area
00000 27166+ USING TDSC,R1 declare TDSC base register
013D92 58F0 1008 00008 27167+ L R15,TLRCNT load local repeat count to R15
27168+*
27169 * inner loop logic:
27170 * load FR0 with 1.0
27171 * multiply 50 times by 1.1
27172 *
013D96 7800 C104 13E7C 27173 T515L LE FR0,=E'1.0'
27174 REPINS ME,(FR0,=E'1.1') repeat: ME FR0,=E'1.1'
27175+*
PAGE 497
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
27176+* build from sublist &ALIST a comma separated string &ARGS
27177+*
27178+*
27179+*
27180+*
27181+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
27182+* this allows to transfer the repeat count from last TDSCGEN call
27183+*
27184+*
27185+*
27186+* write a comment indicating what REPINS does (in case NOGEN in effect)
27187+*
27188+*,// REPINS: do 50 times:
27189+*
27190+* MNOTE requires that ' is doubled for expanded variables
27191+* thus build &MASTR as a copy of '&ARGS with ' doubled
27192+*
27193+*
27194+*,// ME FR0,=E'1.1'
27195+*
27196+* finally generate code: &ICNT copies of &CODE &ARGS
27197+*
013D9A 7C00 C108 13E80 27198+ ME FR0,=E'1.1'
013D9E 7C00 C108 13E80 27199+ ME FR0,=E'1.1'
013DA2 7C00 C108 13E80 27200+ ME FR0,=E'1.1'
013DA6 7C00 C108 13E80 27201+ ME FR0,=E'1.1'
013DAA 7C00 C108 13E80 27202+ ME FR0,=E'1.1'
013DAE 7C00 C108 13E80 27203+ ME FR0,=E'1.1'
013DB2 7C00 C108 13E80 27204+ ME FR0,=E'1.1'
013DB6 7C00 C108 13E80 27205+ ME FR0,=E'1.1'
013DBA 7C00 C108 13E80 27206+ ME FR0,=E'1.1'
013DBE 7C00 C108 13E80 27207+ ME FR0,=E'1.1'
013DC2 7C00 C108 13E80 27208+ ME FR0,=E'1.1'
013DC6 7C00 C108 13E80 27209+ ME FR0,=E'1.1'
013DCA 7C00 C108 13E80 27210+ ME FR0,=E'1.1'
013DCE 7C00 C108 13E80 27211+ ME FR0,=E'1.1'
013DD2 7C00 C108 13E80 27212+ ME FR0,=E'1.1'
013DD6 7C00 C108 13E80 27213+ ME FR0,=E'1.1'
013DDA 7C00 C108 13E80 27214+ ME FR0,=E'1.1'
013DDE 7C00 C108 13E80 27215+ ME FR0,=E'1.1'
013DE2 7C00 C108 13E80 27216+ ME FR0,=E'1.1'
013DE6 7C00 C108 13E80 27217+ ME FR0,=E'1.1'
013DEA 7C00 C108 13E80 27218+ ME FR0,=E'1.1'
013DEE 7C00 C108 13E80 27219+ ME FR0,=E'1.1'
013DF2 7C00 C108 13E80 27220+ ME FR0,=E'1.1'
013DF6 7C00 C108 13E80 27221+ ME FR0,=E'1.1'
013DFA 7C00 C108 13E80 27222+ ME FR0,=E'1.1'
013DFE 7C00 C108 13E80 27223+ ME FR0,=E'1.1'
013E02 7C00 C108 13E80 27224+ ME FR0,=E'1.1'
013E06 7C00 C108 13E80 27225+ ME FR0,=E'1.1'
013E0A 7C00 C108 13E80 27226+ ME FR0,=E'1.1'
013E0E 7C00 C108 13E80 27227+ ME FR0,=E'1.1'
013E12 7C00 C108 13E80 27228+ ME FR0,=E'1.1'
013E16 7C00 C108 13E80 27229+ ME FR0,=E'1.1'
013E1A 7C00 C108 13E80 27230+ ME FR0,=E'1.1'
PAGE 498
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013E1E 7C00 C108 13E80 27231+ ME FR0,=E'1.1'
013E22 7C00 C108 13E80 27232+ ME FR0,=E'1.1'
013E26 7C00 C108 13E80 27233+ ME FR0,=E'1.1'
013E2A 7C00 C108 13E80 27234+ ME FR0,=E'1.1'
013E2E 7C00 C108 13E80 27235+ ME FR0,=E'1.1'
013E32 7C00 C108 13E80 27236+ ME FR0,=E'1.1'
013E36 7C00 C108 13E80 27237+ ME FR0,=E'1.1'
013E3A 7C00 C108 13E80 27238+ ME FR0,=E'1.1'
013E3E 7C00 C108 13E80 27239+ ME FR0,=E'1.1'
013E42 7C00 C108 13E80 27240+ ME FR0,=E'1.1'
013E46 7C00 C108 13E80 27241+ ME FR0,=E'1.1'
013E4A 7C00 C108 13E80 27242+ ME FR0,=E'1.1'
013E4E 7C00 C108 13E80 27243+ ME FR0,=E'1.1'
013E52 7C00 C108 13E80 27244+ ME FR0,=E'1.1'
013E56 7C00 C108 13E80 27245+ ME FR0,=E'1.1'
013E5A 7C00 C108 13E80 27246+ ME FR0,=E'1.1'
013E5E 7C00 C108 13E80 27247+ ME FR0,=E'1.1'
27248+*
013E62 06FB 27249 BCTR R15,R11
27250 TSIMRET
013E64 58F0 C100 13E78 27251+ L R15,=A(SAVETST) R15 := current save area
013E68 58DF 0004 00004 27252+ L R13,4(R15) get old save area back
013E6C 98EC D00C 0000C 27253+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013E70 07FE 27254+ BR 14 RETURN 02000000
27255 TSIMEND
013E78 27256+ LTORG
013E78 00000458 27257 =A(SAVETST)
013E7C 41100000 27258 =E'1.0'
013E80 4111999A 27259 =E'1.1'
13E84 27260+T515TEND EQU *
27261 *
27262 * Test 516 -- DER R,R --------------------------------------
27263 *
27264 TSIMBEG T516,5000,50,9,C'DER R,R'
27265+*
003C24 27266+TDSCDAT CSECT
003C28 27267+ DS 0D
27268+*
003C28 00013E88 27269+T516TDSC DC A(T516) // TENTRY
003C2C 000000AC 27270+ DC A(T516TEND-T516) // TLENGTH
003C30 00001388 27271+ DC F'5000' // TLRCNT
003C34 00000032 27272+ DC F'50' // TIGCNT
003C38 00000009 27273+ DC F'9' // TLTYPE
001B87 27274+TEXT CSECT
001B87 E3F5F1F6 27275+SPTR2421 DC C'T516'
003C3C 27276+TDSCDAT CSECT
003C3C 27277+ DS 0F
003C3C 04001B87 27278+ DC AL1(L'SPTR2421),AL3(SPTR2421)
001B8B 27279+TEXT CSECT
001B8B C4C5D940D96BD9 27280+SPTR2422 DC C'DER R,R'
003C40 27281+TDSCDAT CSECT
003C40 27282+ DS 0F
003C40 07001B8B 27283+ DC AL1(L'SPTR2422),AL3(SPTR2422)
27284+*
004CB0 27285+TDSCTBL CSECT
PAGE 499
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
04CB0 27286+T516TPTR EQU *
004CB0 00003C28 27287+ DC A(T516TDSC) enabled test
27288+*
013E84 27289+TCODE CSECT
013E88 27290+ DS 0D ensure double word alignment for test
013E88 27291+T516 DS 0H 01650000
013E88 90EC D00C 0000C 27292+ STM 14,12,12(13) SAVE REGISTERS 02950000
013E8C 18CF 27293+ LR R12,R15 base register := entry address
13E88 27294+ USING T516,R12 declare code base register
013E8E 41B0 C022 13EAA 27295+ LA R11,T516L load loop target to R11
013E92 58F0 C0A0 13F28 27296+ L R15,=A(SAVETST) R15 := current save area
013E96 50DF 0004 00004 27297+ ST R13,4(R15) set back pointer in current save area
013E9A 182D 27298+ LR R2,R13 remember callers save area
013E9C 18DF 27299+ LR R13,R15 setup current save area
013E9E 50D2 0008 00008 27300+ ST R13,8(R2) set forw pointer in callers save area
00000 27301+ USING TDSC,R1 declare TDSC base register
013EA2 58F0 1008 00008 27302+ L R15,TLRCNT load local repeat count to R15
27303+*
27304 * inner loop logic:
27305 * load FR0 with 1.0
27306 * divide 50 times by 1.1
27307 *
013EA6 7820 C0A4 13F2C 27308 LE FR2,=E'1.1'
013EAA 7800 C0A8 13F30 27309 T516L LE FR0,=E'1.0'
27310 REPINS DER,(FR0,FR2) repeat: DER FR0,FR2
27311+*
27312+* build from sublist &ALIST a comma separated string &ARGS
27313+*
27314+*
27315+*
27316+*
27317+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
27318+* this allows to transfer the repeat count from last TDSCGEN call
27319+*
27320+*
27321+*
27322+* write a comment indicating what REPINS does (in case NOGEN in effect)
27323+*
27324+*,// REPINS: do 50 times:
27325+*
27326+* MNOTE requires that ' is doubled for expanded variables
27327+* thus build &MASTR as a copy of '&ARGS with ' doubled
27328+*
27329+*
27330+*,// DER FR0,FR2
27331+*
27332+* finally generate code: &ICNT copies of &CODE &ARGS
27333+*
013EAE 3D02 27334+ DER FR0,FR2
013EB0 3D02 27335+ DER FR0,FR2
013EB2 3D02 27336+ DER FR0,FR2
013EB4 3D02 27337+ DER FR0,FR2
013EB6 3D02 27338+ DER FR0,FR2
013EB8 3D02 27339+ DER FR0,FR2
013EBA 3D02 27340+ DER FR0,FR2
PAGE 500
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013EBC 3D02 27341+ DER FR0,FR2
013EBE 3D02 27342+ DER FR0,FR2
013EC0 3D02 27343+ DER FR0,FR2
013EC2 3D02 27344+ DER FR0,FR2
013EC4 3D02 27345+ DER FR0,FR2
013EC6 3D02 27346+ DER FR0,FR2
013EC8 3D02 27347+ DER FR0,FR2
013ECA 3D02 27348+ DER FR0,FR2
013ECC 3D02 27349+ DER FR0,FR2
013ECE 3D02 27350+ DER FR0,FR2
013ED0 3D02 27351+ DER FR0,FR2
013ED2 3D02 27352+ DER FR0,FR2
013ED4 3D02 27353+ DER FR0,FR2
013ED6 3D02 27354+ DER FR0,FR2
013ED8 3D02 27355+ DER FR0,FR2
013EDA 3D02 27356+ DER FR0,FR2
013EDC 3D02 27357+ DER FR0,FR2
013EDE 3D02 27358+ DER FR0,FR2
013EE0 3D02 27359+ DER FR0,FR2
013EE2 3D02 27360+ DER FR0,FR2
013EE4 3D02 27361+ DER FR0,FR2
013EE6 3D02 27362+ DER FR0,FR2
013EE8 3D02 27363+ DER FR0,FR2
013EEA 3D02 27364+ DER FR0,FR2
013EEC 3D02 27365+ DER FR0,FR2
013EEE 3D02 27366+ DER FR0,FR2
013EF0 3D02 27367+ DER FR0,FR2
013EF2 3D02 27368+ DER FR0,FR2
013EF4 3D02 27369+ DER FR0,FR2
013EF6 3D02 27370+ DER FR0,FR2
013EF8 3D02 27371+ DER FR0,FR2
013EFA 3D02 27372+ DER FR0,FR2
013EFC 3D02 27373+ DER FR0,FR2
013EFE 3D02 27374+ DER FR0,FR2
013F00 3D02 27375+ DER FR0,FR2
013F02 3D02 27376+ DER FR0,FR2
013F04 3D02 27377+ DER FR0,FR2
013F06 3D02 27378+ DER FR0,FR2
013F08 3D02 27379+ DER FR0,FR2
013F0A 3D02 27380+ DER FR0,FR2
013F0C 3D02 27381+ DER FR0,FR2
013F0E 3D02 27382+ DER FR0,FR2
013F10 3D02 27383+ DER FR0,FR2
27384+*
013F12 06FB 27385 BCTR R15,R11
27386 TSIMRET
013F14 58F0 C0A0 13F28 27387+ L R15,=A(SAVETST) R15 := current save area
013F18 58DF 0004 00004 27388+ L R13,4(R15) get old save area back
013F1C 98EC D00C 0000C 27389+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
013F20 07FE 27390+ BR 14 RETURN 02000000
27391 TSIMEND
013F28 27392+ LTORG
013F28 00000458 27393 =A(SAVETST)
013F2C 4111999A 27394 =E'1.1'
013F30 41100000 27395 =E'1.0'
PAGE 501
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
13F34 27396+T516TEND EQU *
27397 *
27398 * Test 517 -- DE R,m ---------------------------------------
27399 * inner loop logic:
27400 * load FR0 with 1.0
27401 * divide 50 times by 1.1
27402 *
27403 TSIMBEG T517,4000,50,9,C'DE R,m'
27404+*
003C44 27405+TDSCDAT CSECT
003C48 27406+ DS 0D
27407+*
003C48 00013F38 27408+T517TDSC DC A(T517) // TENTRY
003C4C 0000010C 27409+ DC A(T517TEND-T517) // TLENGTH
003C50 00000FA0 27410+ DC F'4000' // TLRCNT
003C54 00000032 27411+ DC F'50' // TIGCNT
003C58 00000009 27412+ DC F'9' // TLTYPE
001B92 27413+TEXT CSECT
001B92 E3F5F1F7 27414+SPTR2433 DC C'T517'
003C5C 27415+TDSCDAT CSECT
003C5C 27416+ DS 0F
003C5C 04001B92 27417+ DC AL1(L'SPTR2433),AL3(SPTR2433)
001B96 27418+TEXT CSECT
001B96 C4C540D96B94 27419+SPTR2434 DC C'DE R,m'
003C60 27420+TDSCDAT CSECT
003C60 27421+ DS 0F
003C60 06001B96 27422+ DC AL1(L'SPTR2434),AL3(SPTR2434)
27423+*
004CB4 27424+TDSCTBL CSECT
04CB4 27425+T517TPTR EQU *
004CB4 00003C48 27426+ DC A(T517TDSC) enabled test
27427+*
013F34 27428+TCODE CSECT
013F38 27429+ DS 0D ensure double word alignment for test
013F38 27430+T517 DS 0H 01650000
013F38 90EC D00C 0000C 27431+ STM 14,12,12(13) SAVE REGISTERS 02950000
013F3C 18CF 27432+ LR R12,R15 base register := entry address
13F38 27433+ USING T517,R12 declare code base register
013F3E 41B0 C01E 13F56 27434+ LA R11,T517L load loop target to R11
013F42 58F0 C100 14038 27435+ L R15,=A(SAVETST) R15 := current save area
013F46 50DF 0004 00004 27436+ ST R13,4(R15) set back pointer in current save area
013F4A 182D 27437+ LR R2,R13 remember callers save area
013F4C 18DF 27438+ LR R13,R15 setup current save area
013F4E 50D2 0008 00008 27439+ ST R13,8(R2) set forw pointer in callers save area
00000 27440+ USING TDSC,R1 declare TDSC base register
013F52 58F0 1008 00008 27441+ L R15,TLRCNT load local repeat count to R15
27442+*
27443 *
013F56 7800 C104 1403C 27444 T517L LE FR0,=E'1.0'
27445 REPINS DE,(FR0,=E'1.1') repeat: DE FR0,=E'1.1'
27446+*
27447+* build from sublist &ALIST a comma separated string &ARGS
27448+*
27449+*
27450+*
PAGE 502
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
27451+*
27452+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
27453+* this allows to transfer the repeat count from last TDSCGEN call
27454+*
27455+*
27456+*
27457+* write a comment indicating what REPINS does (in case NOGEN in effect)
27458+*
27459+*,// REPINS: do 50 times:
27460+*
27461+* MNOTE requires that ' is doubled for expanded variables
27462+* thus build &MASTR as a copy of '&ARGS with ' doubled
27463+*
27464+*
27465+*,// DE FR0,=E'1.1'
27466+*
27467+* finally generate code: &ICNT copies of &CODE &ARGS
27468+*
013F5A 7D00 C108 14040 27469+ DE FR0,=E'1.1'
013F5E 7D00 C108 14040 27470+ DE FR0,=E'1.1'
013F62 7D00 C108 14040 27471+ DE FR0,=E'1.1'
013F66 7D00 C108 14040 27472+ DE FR0,=E'1.1'
013F6A 7D00 C108 14040 27473+ DE FR0,=E'1.1'
013F6E 7D00 C108 14040 27474+ DE FR0,=E'1.1'
013F72 7D00 C108 14040 27475+ DE FR0,=E'1.1'
013F76 7D00 C108 14040 27476+ DE FR0,=E'1.1'
013F7A 7D00 C108 14040 27477+ DE FR0,=E'1.1'
013F7E 7D00 C108 14040 27478+ DE FR0,=E'1.1'
013F82 7D00 C108 14040 27479+ DE FR0,=E'1.1'
013F86 7D00 C108 14040 27480+ DE FR0,=E'1.1'
013F8A 7D00 C108 14040 27481+ DE FR0,=E'1.1'
013F8E 7D00 C108 14040 27482+ DE FR0,=E'1.1'
013F92 7D00 C108 14040 27483+ DE FR0,=E'1.1'
013F96 7D00 C108 14040 27484+ DE FR0,=E'1.1'
013F9A 7D00 C108 14040 27485+ DE FR0,=E'1.1'
013F9E 7D00 C108 14040 27486+ DE FR0,=E'1.1'
013FA2 7D00 C108 14040 27487+ DE FR0,=E'1.1'
013FA6 7D00 C108 14040 27488+ DE FR0,=E'1.1'
013FAA 7D00 C108 14040 27489+ DE FR0,=E'1.1'
013FAE 7D00 C108 14040 27490+ DE FR0,=E'1.1'
013FB2 7D00 C108 14040 27491+ DE FR0,=E'1.1'
013FB6 7D00 C108 14040 27492+ DE FR0,=E'1.1'
013FBA 7D00 C108 14040 27493+ DE FR0,=E'1.1'
013FBE 7D00 C108 14040 27494+ DE FR0,=E'1.1'
013FC2 7D00 C108 14040 27495+ DE FR0,=E'1.1'
013FC6 7D00 C108 14040 27496+ DE FR0,=E'1.1'
013FCA 7D00 C108 14040 27497+ DE FR0,=E'1.1'
013FCE 7D00 C108 14040 27498+ DE FR0,=E'1.1'
013FD2 7D00 C108 14040 27499+ DE FR0,=E'1.1'
013FD6 7D00 C108 14040 27500+ DE FR0,=E'1.1'
013FDA 7D00 C108 14040 27501+ DE FR0,=E'1.1'
013FDE 7D00 C108 14040 27502+ DE FR0,=E'1.1'
013FE2 7D00 C108 14040 27503+ DE FR0,=E'1.1'
013FE6 7D00 C108 14040 27504+ DE FR0,=E'1.1'
013FEA 7D00 C108 14040 27505+ DE FR0,=E'1.1'
PAGE 503
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
013FEE 7D00 C108 14040 27506+ DE FR0,=E'1.1'
013FF2 7D00 C108 14040 27507+ DE FR0,=E'1.1'
013FF6 7D00 C108 14040 27508+ DE FR0,=E'1.1'
013FFA 7D00 C108 14040 27509+ DE FR0,=E'1.1'
013FFE 7D00 C108 14040 27510+ DE FR0,=E'1.1'
014002 7D00 C108 14040 27511+ DE FR0,=E'1.1'
014006 7D00 C108 14040 27512+ DE FR0,=E'1.1'
01400A 7D00 C108 14040 27513+ DE FR0,=E'1.1'
01400E 7D00 C108 14040 27514+ DE FR0,=E'1.1'
014012 7D00 C108 14040 27515+ DE FR0,=E'1.1'
014016 7D00 C108 14040 27516+ DE FR0,=E'1.1'
01401A 7D00 C108 14040 27517+ DE FR0,=E'1.1'
01401E 7D00 C108 14040 27518+ DE FR0,=E'1.1'
27519+*
014022 06FB 27520 BCTR R15,R11
27521 TSIMRET
014024 58F0 C100 14038 27522+ L R15,=A(SAVETST) R15 := current save area
014028 58DF 0004 00004 27523+ L R13,4(R15) get old save area back
01402C 98EC D00C 0000C 27524+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014030 07FE 27525+ BR 14 RETURN 02000000
27526 TSIMEND
014038 27527+ LTORG
014038 00000458 27528 =A(SAVETST)
01403C 41100000 27529 =E'1.0'
014040 4111999A 27530 =E'1.1'
14044 27531+T517TEND EQU *
27532 *
27533 * Test 52x -- short float auxiliary ========================
27534 *
27535 * Test 520 -- CER R,R --------------------------------------
27536 *
27537 TSIMBEG T520,10000,50,1,C'CER R,R'
27538+*
003C64 27539+TDSCDAT CSECT
003C68 27540+ DS 0D
27541+*
003C68 00014048 27542+T520TDSC DC A(T520) // TENTRY
003C6C 000000AC 27543+ DC A(T520TEND-T520) // TLENGTH
003C70 00002710 27544+ DC F'10000' // TLRCNT
003C74 00000032 27545+ DC F'50' // TIGCNT
003C78 00000001 27546+ DC F'1' // TLTYPE
001B9C 27547+TEXT CSECT
001B9C E3F5F2F0 27548+SPTR2445 DC C'T520'
003C7C 27549+TDSCDAT CSECT
003C7C 27550+ DS 0F
003C7C 04001B9C 27551+ DC AL1(L'SPTR2445),AL3(SPTR2445)
001BA0 27552+TEXT CSECT
001BA0 C3C5D940D96BD9 27553+SPTR2446 DC C'CER R,R'
003C80 27554+TDSCDAT CSECT
003C80 27555+ DS 0F
003C80 07001BA0 27556+ DC AL1(L'SPTR2446),AL3(SPTR2446)
27557+*
004CB8 27558+TDSCTBL CSECT
04CB8 27559+T520TPTR EQU *
004CB8 00003C68 27560+ DC A(T520TDSC) enabled test
PAGE 504
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
27561+*
014044 27562+TCODE CSECT
014048 27563+ DS 0D ensure double word alignment for test
014048 27564+T520 DS 0H 01650000
014048 90EC D00C 0000C 27565+ STM 14,12,12(13) SAVE REGISTERS 02950000
01404C 18CF 27566+ LR R12,R15 base register := entry address
14048 27567+ USING T520,R12 declare code base register
01404E 41B0 C026 1406E 27568+ LA R11,T520L load loop target to R11
014052 58F0 C0A0 140E8 27569+ L R15,=A(SAVETST) R15 := current save area
014056 50DF 0004 00004 27570+ ST R13,4(R15) set back pointer in current save area
01405A 182D 27571+ LR R2,R13 remember callers save area
01405C 18DF 27572+ LR R13,R15 setup current save area
01405E 50D2 0008 00008 27573+ ST R13,8(R2) set forw pointer in callers save area
00000 27574+ USING TDSC,R1 declare TDSC base register
014062 58F0 1008 00008 27575+ L R15,TLRCNT load local repeat count to R15
27576+*
27577 *
014066 7800 C0A4 140EC 27578 LE FR0,=E'1.0'
01406A 7820 C0A8 140F0 27579 LE FR2,=E'1.1'
27580 T520L REPINS CER,(FR0,FR2) repeat: CER FR0,FR2
27581+*
27582+* build from sublist &ALIST a comma separated string &ARGS
27583+*
27584+*
27585+*
27586+*
27587+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
27588+* this allows to transfer the repeat count from last TDSCGEN call
27589+*
27590+*
1406E 27591+T520L EQU *
27592+*
27593+* write a comment indicating what REPINS does (in case NOGEN in effect)
27594+*
27595+*,// REPINS: do 50 times:
27596+*
27597+* MNOTE requires that ' is doubled for expanded variables
27598+* thus build &MASTR as a copy of '&ARGS with ' doubled
27599+*
27600+*
27601+*,// CER FR0,FR2
27602+*
27603+* finally generate code: &ICNT copies of &CODE &ARGS
27604+*
01406E 3902 27605+ CER FR0,FR2
014070 3902 27606+ CER FR0,FR2
014072 3902 27607+ CER FR0,FR2
014074 3902 27608+ CER FR0,FR2
014076 3902 27609+ CER FR0,FR2
014078 3902 27610+ CER FR0,FR2
01407A 3902 27611+ CER FR0,FR2
01407C 3902 27612+ CER FR0,FR2
01407E 3902 27613+ CER FR0,FR2
014080 3902 27614+ CER FR0,FR2
014082 3902 27615+ CER FR0,FR2
PAGE 505
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014084 3902 27616+ CER FR0,FR2
014086 3902 27617+ CER FR0,FR2
014088 3902 27618+ CER FR0,FR2
01408A 3902 27619+ CER FR0,FR2
01408C 3902 27620+ CER FR0,FR2
01408E 3902 27621+ CER FR0,FR2
014090 3902 27622+ CER FR0,FR2
014092 3902 27623+ CER FR0,FR2
014094 3902 27624+ CER FR0,FR2
014096 3902 27625+ CER FR0,FR2
014098 3902 27626+ CER FR0,FR2
01409A 3902 27627+ CER FR0,FR2
01409C 3902 27628+ CER FR0,FR2
01409E 3902 27629+ CER FR0,FR2
0140A0 3902 27630+ CER FR0,FR2
0140A2 3902 27631+ CER FR0,FR2
0140A4 3902 27632+ CER FR0,FR2
0140A6 3902 27633+ CER FR0,FR2
0140A8 3902 27634+ CER FR0,FR2
0140AA 3902 27635+ CER FR0,FR2
0140AC 3902 27636+ CER FR0,FR2
0140AE 3902 27637+ CER FR0,FR2
0140B0 3902 27638+ CER FR0,FR2
0140B2 3902 27639+ CER FR0,FR2
0140B4 3902 27640+ CER FR0,FR2
0140B6 3902 27641+ CER FR0,FR2
0140B8 3902 27642+ CER FR0,FR2
0140BA 3902 27643+ CER FR0,FR2
0140BC 3902 27644+ CER FR0,FR2
0140BE 3902 27645+ CER FR0,FR2
0140C0 3902 27646+ CER FR0,FR2
0140C2 3902 27647+ CER FR0,FR2
0140C4 3902 27648+ CER FR0,FR2
0140C6 3902 27649+ CER FR0,FR2
0140C8 3902 27650+ CER FR0,FR2
0140CA 3902 27651+ CER FR0,FR2
0140CC 3902 27652+ CER FR0,FR2
0140CE 3902 27653+ CER FR0,FR2
0140D0 3902 27654+ CER FR0,FR2
27655+*
0140D2 06FB 27656 BCTR R15,R11
27657 TSIMRET
0140D4 58F0 C0A0 140E8 27658+ L R15,=A(SAVETST) R15 := current save area
0140D8 58DF 0004 00004 27659+ L R13,4(R15) get old save area back
0140DC 98EC D00C 0000C 27660+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0140E0 07FE 27661+ BR 14 RETURN 02000000
27662 TSIMEND
0140E8 27663+ LTORG
0140E8 00000458 27664 =A(SAVETST)
0140EC 41100000 27665 =E'1.0'
0140F0 4111999A 27666 =E'1.1'
140F4 27667+T520TEND EQU *
27668 *
27669 * Test 521 -- CE R,m ---------------------------------------
27670 *
PAGE 506
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
27671 TSIMBEG T521,6000,50,1,C'CE R,m'
27672+*
003C84 27673+TDSCDAT CSECT
003C88 27674+ DS 0D
27675+*
003C88 000140F8 27676+T521TDSC DC A(T521) // TENTRY
003C8C 0000010C 27677+ DC A(T521TEND-T521) // TLENGTH
003C90 00001770 27678+ DC F'6000' // TLRCNT
003C94 00000032 27679+ DC F'50' // TIGCNT
003C98 00000001 27680+ DC F'1' // TLTYPE
001BA7 27681+TEXT CSECT
001BA7 E3F5F2F1 27682+SPTR2457 DC C'T521'
003C9C 27683+TDSCDAT CSECT
003C9C 27684+ DS 0F
003C9C 04001BA7 27685+ DC AL1(L'SPTR2457),AL3(SPTR2457)
001BAB 27686+TEXT CSECT
001BAB C3C540D96B94 27687+SPTR2458 DC C'CE R,m'
003CA0 27688+TDSCDAT CSECT
003CA0 27689+ DS 0F
003CA0 06001BAB 27690+ DC AL1(L'SPTR2458),AL3(SPTR2458)
27691+*
004CBC 27692+TDSCTBL CSECT
04CBC 27693+T521TPTR EQU *
004CBC 00003C88 27694+ DC A(T521TDSC) enabled test
27695+*
0140F4 27696+TCODE CSECT
0140F8 27697+ DS 0D ensure double word alignment for test
0140F8 27698+T521 DS 0H 01650000
0140F8 90EC D00C 0000C 27699+ STM 14,12,12(13) SAVE REGISTERS 02950000
0140FC 18CF 27700+ LR R12,R15 base register := entry address
140F8 27701+ USING T521,R12 declare code base register
0140FE 41B0 C022 1411A 27702+ LA R11,T521L load loop target to R11
014102 58F0 C100 141F8 27703+ L R15,=A(SAVETST) R15 := current save area
014106 50DF 0004 00004 27704+ ST R13,4(R15) set back pointer in current save area
01410A 182D 27705+ LR R2,R13 remember callers save area
01410C 18DF 27706+ LR R13,R15 setup current save area
01410E 50D2 0008 00008 27707+ ST R13,8(R2) set forw pointer in callers save area
00000 27708+ USING TDSC,R1 declare TDSC base register
014112 58F0 1008 00008 27709+ L R15,TLRCNT load local repeat count to R15
27710+*
27711 *
014116 7800 C104 141FC 27712 LE FR0,=E'1.0'
27713 T521L REPINS CE,(FR0,=E'1.1') repeat: CE FR0,=E'1.1'
27714+*
27715+* build from sublist &ALIST a comma separated string &ARGS
27716+*
27717+*
27718+*
27719+*
27720+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
27721+* this allows to transfer the repeat count from last TDSCGEN call
27722+*
27723+*
1411A 27724+T521L EQU *
27725+*
PAGE 507
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
27726+* write a comment indicating what REPINS does (in case NOGEN in effect)
27727+*
27728+*,// REPINS: do 50 times:
27729+*
27730+* MNOTE requires that ' is doubled for expanded variables
27731+* thus build &MASTR as a copy of '&ARGS with ' doubled
27732+*
27733+*
27734+*,// CE FR0,=E'1.1'
27735+*
27736+* finally generate code: &ICNT copies of &CODE &ARGS
27737+*
01411A 7900 C108 14200 27738+ CE FR0,=E'1.1'
01411E 7900 C108 14200 27739+ CE FR0,=E'1.1'
014122 7900 C108 14200 27740+ CE FR0,=E'1.1'
014126 7900 C108 14200 27741+ CE FR0,=E'1.1'
01412A 7900 C108 14200 27742+ CE FR0,=E'1.1'
01412E 7900 C108 14200 27743+ CE FR0,=E'1.1'
014132 7900 C108 14200 27744+ CE FR0,=E'1.1'
014136 7900 C108 14200 27745+ CE FR0,=E'1.1'
01413A 7900 C108 14200 27746+ CE FR0,=E'1.1'
01413E 7900 C108 14200 27747+ CE FR0,=E'1.1'
014142 7900 C108 14200 27748+ CE FR0,=E'1.1'
014146 7900 C108 14200 27749+ CE FR0,=E'1.1'
01414A 7900 C108 14200 27750+ CE FR0,=E'1.1'
01414E 7900 C108 14200 27751+ CE FR0,=E'1.1'
014152 7900 C108 14200 27752+ CE FR0,=E'1.1'
014156 7900 C108 14200 27753+ CE FR0,=E'1.1'
01415A 7900 C108 14200 27754+ CE FR0,=E'1.1'
01415E 7900 C108 14200 27755+ CE FR0,=E'1.1'
014162 7900 C108 14200 27756+ CE FR0,=E'1.1'
014166 7900 C108 14200 27757+ CE FR0,=E'1.1'
01416A 7900 C108 14200 27758+ CE FR0,=E'1.1'
01416E 7900 C108 14200 27759+ CE FR0,=E'1.1'
014172 7900 C108 14200 27760+ CE FR0,=E'1.1'
014176 7900 C108 14200 27761+ CE FR0,=E'1.1'
01417A 7900 C108 14200 27762+ CE FR0,=E'1.1'
01417E 7900 C108 14200 27763+ CE FR0,=E'1.1'
014182 7900 C108 14200 27764+ CE FR0,=E'1.1'
014186 7900 C108 14200 27765+ CE FR0,=E'1.1'
01418A 7900 C108 14200 27766+ CE FR0,=E'1.1'
01418E 7900 C108 14200 27767+ CE FR0,=E'1.1'
014192 7900 C108 14200 27768+ CE FR0,=E'1.1'
014196 7900 C108 14200 27769+ CE FR0,=E'1.1'
01419A 7900 C108 14200 27770+ CE FR0,=E'1.1'
01419E 7900 C108 14200 27771+ CE FR0,=E'1.1'
0141A2 7900 C108 14200 27772+ CE FR0,=E'1.1'
0141A6 7900 C108 14200 27773+ CE FR0,=E'1.1'
0141AA 7900 C108 14200 27774+ CE FR0,=E'1.1'
0141AE 7900 C108 14200 27775+ CE FR0,=E'1.1'
0141B2 7900 C108 14200 27776+ CE FR0,=E'1.1'
0141B6 7900 C108 14200 27777+ CE FR0,=E'1.1'
0141BA 7900 C108 14200 27778+ CE FR0,=E'1.1'
0141BE 7900 C108 14200 27779+ CE FR0,=E'1.1'
0141C2 7900 C108 14200 27780+ CE FR0,=E'1.1'
PAGE 508
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0141C6 7900 C108 14200 27781+ CE FR0,=E'1.1'
0141CA 7900 C108 14200 27782+ CE FR0,=E'1.1'
0141CE 7900 C108 14200 27783+ CE FR0,=E'1.1'
0141D2 7900 C108 14200 27784+ CE FR0,=E'1.1'
0141D6 7900 C108 14200 27785+ CE FR0,=E'1.1'
0141DA 7900 C108 14200 27786+ CE FR0,=E'1.1'
0141DE 7900 C108 14200 27787+ CE FR0,=E'1.1'
27788+*
0141E2 06FB 27789 BCTR R15,R11
27790 TSIMRET
0141E4 58F0 C100 141F8 27791+ L R15,=A(SAVETST) R15 := current save area
0141E8 58DF 0004 00004 27792+ L R13,4(R15) get old save area back
0141EC 98EC D00C 0000C 27793+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0141F0 07FE 27794+ BR 14 RETURN 02000000
27795 TSIMEND
0141F8 27796+ LTORG
0141F8 00000458 27797 =A(SAVETST)
0141FC 41100000 27798 =E'1.0'
014200 4111999A 27799 =E'1.1'
14204 27800+T521TEND EQU *
27801 *
27802 * Test 522 -- AUR R,R --------------------------------------
27803 *
27804 TSIMBEG T522,10000,50,9,C'AUR R,R'
27805+*
003CA4 27806+TDSCDAT CSECT
003CA8 27807+ DS 0D
27808+*
003CA8 00014208 27809+T522TDSC DC A(T522) // TENTRY
003CAC 000000A8 27810+ DC A(T522TEND-T522) // TLENGTH
003CB0 00002710 27811+ DC F'10000' // TLRCNT
003CB4 00000032 27812+ DC F'50' // TIGCNT
003CB8 00000009 27813+ DC F'9' // TLTYPE
001BB1 27814+TEXT CSECT
001BB1 E3F5F2F2 27815+SPTR2469 DC C'T522'
003CBC 27816+TDSCDAT CSECT
003CBC 27817+ DS 0F
003CBC 04001BB1 27818+ DC AL1(L'SPTR2469),AL3(SPTR2469)
001BB5 27819+TEXT CSECT
001BB5 C1E4D940D96BD9 27820+SPTR2470 DC C'AUR R,R'
003CC0 27821+TDSCDAT CSECT
003CC0 27822+ DS 0F
003CC0 07001BB5 27823+ DC AL1(L'SPTR2470),AL3(SPTR2470)
27824+*
004CC0 27825+TDSCTBL CSECT
04CC0 27826+T522TPTR EQU *
004CC0 00003CA8 27827+ DC A(T522TDSC) enabled test
27828+*
014204 27829+TCODE CSECT
014208 27830+ DS 0D ensure double word alignment for test
014208 27831+T522 DS 0H 01650000
014208 90EC D00C 0000C 27832+ STM 14,12,12(13) SAVE REGISTERS 02950000
01420C 18CF 27833+ LR R12,R15 base register := entry address
14208 27834+ USING T522,R12 declare code base register
01420E 41B0 C022 1422A 27835+ LA R11,T522L load loop target to R11
PAGE 509
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014212 58F0 C0A0 142A8 27836+ L R15,=A(SAVETST) R15 := current save area
014216 50DF 0004 00004 27837+ ST R13,4(R15) set back pointer in current save area
01421A 182D 27838+ LR R2,R13 remember callers save area
01421C 18DF 27839+ LR R13,R15 setup current save area
01421E 50D2 0008 00008 27840+ ST R13,8(R2) set forw pointer in callers save area
00000 27841+ USING TDSC,R1 declare TDSC base register
014222 58F0 1008 00008 27842+ L R15,TLRCNT load local repeat count to R15
27843+*
27844 *
014226 7820 C09C 142A4 27845 LE FR2,T522V
01422A 7800 C0A4 142AC 27846 T522L LE FR0,=E'1234.1'
27847 REPINS AUR,(FR0,FR2) repeat: AUR FR0,FR2
27848+*
27849+* build from sublist &ALIST a comma separated string &ARGS
27850+*
27851+*
27852+*
27853+*
27854+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
27855+* this allows to transfer the repeat count from last TDSCGEN call
27856+*
27857+*
27858+*
27859+* write a comment indicating what REPINS does (in case NOGEN in effect)
27860+*
27861+*,// REPINS: do 50 times:
27862+*
27863+* MNOTE requires that ' is doubled for expanded variables
27864+* thus build &MASTR as a copy of '&ARGS with ' doubled
27865+*
27866+*
27867+*,// AUR FR0,FR2
27868+*
27869+* finally generate code: &ICNT copies of &CODE &ARGS
27870+*
01422E 3E02 27871+ AUR FR0,FR2
014230 3E02 27872+ AUR FR0,FR2
014232 3E02 27873+ AUR FR0,FR2
014234 3E02 27874+ AUR FR0,FR2
014236 3E02 27875+ AUR FR0,FR2
014238 3E02 27876+ AUR FR0,FR2
01423A 3E02 27877+ AUR FR0,FR2
01423C 3E02 27878+ AUR FR0,FR2
01423E 3E02 27879+ AUR FR0,FR2
014240 3E02 27880+ AUR FR0,FR2
014242 3E02 27881+ AUR FR0,FR2
014244 3E02 27882+ AUR FR0,FR2
014246 3E02 27883+ AUR FR0,FR2
014248 3E02 27884+ AUR FR0,FR2
01424A 3E02 27885+ AUR FR0,FR2
01424C 3E02 27886+ AUR FR0,FR2
01424E 3E02 27887+ AUR FR0,FR2
014250 3E02 27888+ AUR FR0,FR2
014252 3E02 27889+ AUR FR0,FR2
014254 3E02 27890+ AUR FR0,FR2
PAGE 510
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014256 3E02 27891+ AUR FR0,FR2
014258 3E02 27892+ AUR FR0,FR2
01425A 3E02 27893+ AUR FR0,FR2
01425C 3E02 27894+ AUR FR0,FR2
01425E 3E02 27895+ AUR FR0,FR2
014260 3E02 27896+ AUR FR0,FR2
014262 3E02 27897+ AUR FR0,FR2
014264 3E02 27898+ AUR FR0,FR2
014266 3E02 27899+ AUR FR0,FR2
014268 3E02 27900+ AUR FR0,FR2
01426A 3E02 27901+ AUR FR0,FR2
01426C 3E02 27902+ AUR FR0,FR2
01426E 3E02 27903+ AUR FR0,FR2
014270 3E02 27904+ AUR FR0,FR2
014272 3E02 27905+ AUR FR0,FR2
014274 3E02 27906+ AUR FR0,FR2
014276 3E02 27907+ AUR FR0,FR2
014278 3E02 27908+ AUR FR0,FR2
01427A 3E02 27909+ AUR FR0,FR2
01427C 3E02 27910+ AUR FR0,FR2
01427E 3E02 27911+ AUR FR0,FR2
014280 3E02 27912+ AUR FR0,FR2
014282 3E02 27913+ AUR FR0,FR2
014284 3E02 27914+ AUR FR0,FR2
014286 3E02 27915+ AUR FR0,FR2
014288 3E02 27916+ AUR FR0,FR2
01428A 3E02 27917+ AUR FR0,FR2
01428C 3E02 27918+ AUR FR0,FR2
01428E 3E02 27919+ AUR FR0,FR2
014290 3E02 27920+ AUR FR0,FR2
27921+*
014292 06FB 27922 BCTR R15,R11
27923 TSIMRET
014294 58F0 C0A0 142A8 27924+ L R15,=A(SAVETST) R15 := current save area
014298 58DF 0004 00004 27925+ L R13,4(R15) get old save area back
01429C 98EC D00C 0000C 27926+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0142A0 07FE 27927+ BR 14 RETURN 02000000
27928 *
0142A4 27929 DS 0E
0142A4 27930 T522V DS X'4E000001'
27931 TSIMEND
0142A8 27932+ LTORG
0142A8 00000458 27933 =A(SAVETST)
0142AC 434D219A 27934 =E'1234.1'
142B0 27935+T522TEND EQU *
27936 *
27937 * Test 523 -- HER R,R --------------------------------------
27938 *
27939 TSIMBEG T523,16000,50,9,C'HER R,R'
27940+*
003CC4 27941+TDSCDAT CSECT
003CC8 27942+ DS 0D
27943+*
003CC8 000142B0 27944+T523TDSC DC A(T523) // TENTRY
003CCC 000000A0 27945+ DC A(T523TEND-T523) // TLENGTH
PAGE 511
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003CD0 00003E80 27946+ DC F'16000' // TLRCNT
003CD4 00000032 27947+ DC F'50' // TIGCNT
003CD8 00000009 27948+ DC F'9' // TLTYPE
001BBC 27949+TEXT CSECT
001BBC E3F5F2F3 27950+SPTR2481 DC C'T523'
003CDC 27951+TDSCDAT CSECT
003CDC 27952+ DS 0F
003CDC 04001BBC 27953+ DC AL1(L'SPTR2481),AL3(SPTR2481)
001BC0 27954+TEXT CSECT
001BC0 C8C5D940D96BD9 27955+SPTR2482 DC C'HER R,R'
003CE0 27956+TDSCDAT CSECT
003CE0 27957+ DS 0F
003CE0 07001BC0 27958+ DC AL1(L'SPTR2482),AL3(SPTR2482)
27959+*
004CC4 27960+TDSCTBL CSECT
04CC4 27961+T523TPTR EQU *
004CC4 00003CC8 27962+ DC A(T523TDSC) enabled test
27963+*
0142B0 27964+TCODE CSECT
0142B0 27965+ DS 0D ensure double word alignment for test
0142B0 27966+T523 DS 0H 01650000
0142B0 90EC D00C 0000C 27967+ STM 14,12,12(13) SAVE REGISTERS 02950000
0142B4 18CF 27968+ LR R12,R15 base register := entry address
142B0 27969+ USING T523,R12 declare code base register
0142B6 41B0 C01E 142CE 27970+ LA R11,T523L load loop target to R11
0142BA 58F0 C098 14348 27971+ L R15,=A(SAVETST) R15 := current save area
0142BE 50DF 0004 00004 27972+ ST R13,4(R15) set back pointer in current save area
0142C2 182D 27973+ LR R2,R13 remember callers save area
0142C4 18DF 27974+ LR R13,R15 setup current save area
0142C6 50D2 0008 00008 27975+ ST R13,8(R2) set forw pointer in callers save area
00000 27976+ USING TDSC,R1 declare TDSC base register
0142CA 58F0 1008 00008 27977+ L R15,TLRCNT load local repeat count to R15
27978+*
27979 * inner loop logic:
27980 * load FR0 with 1111111111.
27981 * 'half' it 50 times
27982 *
0142CE 7800 C09C 1434C 27983 T523L LE FR0,=E'1111111111.0'
27984 REPINS HER,(FR0,FR0) repeat: HER FR0,FR0
27985+*
27986+* build from sublist &ALIST a comma separated string &ARGS
27987+*
27988+*
27989+*
27990+*
27991+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
27992+* this allows to transfer the repeat count from last TDSCGEN call
27993+*
27994+*
27995+*
27996+* write a comment indicating what REPINS does (in case NOGEN in effect)
27997+*
27998+*,// REPINS: do 50 times:
27999+*
28000+* MNOTE requires that ' is doubled for expanded variables
PAGE 512
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
28001+* thus build &MASTR as a copy of '&ARGS with ' doubled
28002+*
28003+*
28004+*,// HER FR0,FR0
28005+*
28006+* finally generate code: &ICNT copies of &CODE &ARGS
28007+*
0142D2 3400 28008+ HER FR0,FR0
0142D4 3400 28009+ HER FR0,FR0
0142D6 3400 28010+ HER FR0,FR0
0142D8 3400 28011+ HER FR0,FR0
0142DA 3400 28012+ HER FR0,FR0
0142DC 3400 28013+ HER FR0,FR0
0142DE 3400 28014+ HER FR0,FR0
0142E0 3400 28015+ HER FR0,FR0
0142E2 3400 28016+ HER FR0,FR0
0142E4 3400 28017+ HER FR0,FR0
0142E6 3400 28018+ HER FR0,FR0
0142E8 3400 28019+ HER FR0,FR0
0142EA 3400 28020+ HER FR0,FR0
0142EC 3400 28021+ HER FR0,FR0
0142EE 3400 28022+ HER FR0,FR0
0142F0 3400 28023+ HER FR0,FR0
0142F2 3400 28024+ HER FR0,FR0
0142F4 3400 28025+ HER FR0,FR0
0142F6 3400 28026+ HER FR0,FR0
0142F8 3400 28027+ HER FR0,FR0
0142FA 3400 28028+ HER FR0,FR0
0142FC 3400 28029+ HER FR0,FR0
0142FE 3400 28030+ HER FR0,FR0
014300 3400 28031+ HER FR0,FR0
014302 3400 28032+ HER FR0,FR0
014304 3400 28033+ HER FR0,FR0
014306 3400 28034+ HER FR0,FR0
014308 3400 28035+ HER FR0,FR0
01430A 3400 28036+ HER FR0,FR0
01430C 3400 28037+ HER FR0,FR0
01430E 3400 28038+ HER FR0,FR0
014310 3400 28039+ HER FR0,FR0
014312 3400 28040+ HER FR0,FR0
014314 3400 28041+ HER FR0,FR0
014316 3400 28042+ HER FR0,FR0
014318 3400 28043+ HER FR0,FR0
01431A 3400 28044+ HER FR0,FR0
01431C 3400 28045+ HER FR0,FR0
01431E 3400 28046+ HER FR0,FR0
014320 3400 28047+ HER FR0,FR0
014322 3400 28048+ HER FR0,FR0
014324 3400 28049+ HER FR0,FR0
014326 3400 28050+ HER FR0,FR0
014328 3400 28051+ HER FR0,FR0
01432A 3400 28052+ HER FR0,FR0
01432C 3400 28053+ HER FR0,FR0
01432E 3400 28054+ HER FR0,FR0
014330 3400 28055+ HER FR0,FR0
PAGE 513
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014332 3400 28056+ HER FR0,FR0
014334 3400 28057+ HER FR0,FR0
28058+*
014336 06FB 28059 BCTR R15,R11
28060 TSIMRET
014338 58F0 C098 14348 28061+ L R15,=A(SAVETST) R15 := current save area
01433C 58DF 0004 00004 28062+ L R13,4(R15) get old save area back
014340 98EC D00C 0000C 28063+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014344 07FE 28064+ BR 14 RETURN 02000000
28065 TSIMEND
014348 28066+ LTORG
014348 00000458 28067 =A(SAVETST)
01434C 48423A36 28068 =E'1111111111.0'
14350 28069+T523TEND EQU *
28070 *
28071 * Test 53x -- long float load/store ========================
28072 *
28073 * Test 530 -- LDR R,R --------------------------------------
28074 *
28075 TSIMBEG T530,9000,100,1,C'LDR R,R'
28076+*
003CE4 28077+TDSCDAT CSECT
003CE8 28078+ DS 0D
28079+*
003CE8 00014350 28080+T530TDSC DC A(T530) // TENTRY
003CEC 0000010C 28081+ DC A(T530TEND-T530) // TLENGTH
003CF0 00002328 28082+ DC F'9000' // TLRCNT
003CF4 00000064 28083+ DC F'100' // TIGCNT
003CF8 00000001 28084+ DC F'1' // TLTYPE
001BC7 28085+TEXT CSECT
001BC7 E3F5F3F0 28086+SPTR2493 DC C'T530'
003CFC 28087+TDSCDAT CSECT
003CFC 28088+ DS 0F
003CFC 04001BC7 28089+ DC AL1(L'SPTR2493),AL3(SPTR2493)
001BCB 28090+TEXT CSECT
001BCB D3C4D940D96BD9 28091+SPTR2494 DC C'LDR R,R'
003D00 28092+TDSCDAT CSECT
003D00 28093+ DS 0F
003D00 07001BCB 28094+ DC AL1(L'SPTR2494),AL3(SPTR2494)
28095+*
004CC8 28096+TDSCTBL CSECT
04CC8 28097+T530TPTR EQU *
004CC8 00003CE8 28098+ DC A(T530TDSC) enabled test
28099+*
014350 28100+TCODE CSECT
014350 28101+ DS 0D ensure double word alignment for test
014350 28102+T530 DS 0H 01650000
014350 90EC D00C 0000C 28103+ STM 14,12,12(13) SAVE REGISTERS 02950000
014354 18CF 28104+ LR R12,R15 base register := entry address
14350 28105+ USING T530,R12 declare code base register
014356 41B0 C022 14372 28106+ LA R11,T530L load loop target to R11
01435A 58F0 C108 14458 28107+ L R15,=A(SAVETST) R15 := current save area
01435E 50DF 0004 00004 28108+ ST R13,4(R15) set back pointer in current save area
014362 182D 28109+ LR R2,R13 remember callers save area
014364 18DF 28110+ LR R13,R15 setup current save area
PAGE 514
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014366 50D2 0008 00008 28111+ ST R13,8(R2) set forw pointer in callers save area
00000 28112+ USING TDSC,R1 declare TDSC base register
01436A 58F0 1008 00008 28113+ L R15,TLRCNT load local repeat count to R15
28114+*
28115 *
01436E 6820 C100 14450 28116 LD FR2,=D'1.1'
28117 T530L REPINS LDR,(FR0,FR2) repeat: LDR FR0,FR2
28118+*
28119+* build from sublist &ALIST a comma separated string &ARGS
28120+*
28121+*
28122+*
28123+*
28124+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
28125+* this allows to transfer the repeat count from last TDSCGEN call
28126+*
28127+*
14372 28128+T530L EQU *
28129+*
28130+* write a comment indicating what REPINS does (in case NOGEN in effect)
28131+*
28132+*,// REPINS: do 100 times:
28133+*
28134+* MNOTE requires that ' is doubled for expanded variables
28135+* thus build &MASTR as a copy of '&ARGS with ' doubled
28136+*
28137+*
28138+*,// LDR FR0,FR2
28139+*
28140+* finally generate code: &ICNT copies of &CODE &ARGS
28141+*
014372 2802 28142+ LDR FR0,FR2
014374 2802 28143+ LDR FR0,FR2
014376 2802 28144+ LDR FR0,FR2
014378 2802 28145+ LDR FR0,FR2
01437A 2802 28146+ LDR FR0,FR2
01437C 2802 28147+ LDR FR0,FR2
01437E 2802 28148+ LDR FR0,FR2
014380 2802 28149+ LDR FR0,FR2
014382 2802 28150+ LDR FR0,FR2
014384 2802 28151+ LDR FR0,FR2
014386 2802 28152+ LDR FR0,FR2
014388 2802 28153+ LDR FR0,FR2
01438A 2802 28154+ LDR FR0,FR2
01438C 2802 28155+ LDR FR0,FR2
01438E 2802 28156+ LDR FR0,FR2
014390 2802 28157+ LDR FR0,FR2
014392 2802 28158+ LDR FR0,FR2
014394 2802 28159+ LDR FR0,FR2
014396 2802 28160+ LDR FR0,FR2
014398 2802 28161+ LDR FR0,FR2
01439A 2802 28162+ LDR FR0,FR2
01439C 2802 28163+ LDR FR0,FR2
01439E 2802 28164+ LDR FR0,FR2
0143A0 2802 28165+ LDR FR0,FR2
PAGE 515
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0143A2 2802 28166+ LDR FR0,FR2
0143A4 2802 28167+ LDR FR0,FR2
0143A6 2802 28168+ LDR FR0,FR2
0143A8 2802 28169+ LDR FR0,FR2
0143AA 2802 28170+ LDR FR0,FR2
0143AC 2802 28171+ LDR FR0,FR2
0143AE 2802 28172+ LDR FR0,FR2
0143B0 2802 28173+ LDR FR0,FR2
0143B2 2802 28174+ LDR FR0,FR2
0143B4 2802 28175+ LDR FR0,FR2
0143B6 2802 28176+ LDR FR0,FR2
0143B8 2802 28177+ LDR FR0,FR2
0143BA 2802 28178+ LDR FR0,FR2
0143BC 2802 28179+ LDR FR0,FR2
0143BE 2802 28180+ LDR FR0,FR2
0143C0 2802 28181+ LDR FR0,FR2
0143C2 2802 28182+ LDR FR0,FR2
0143C4 2802 28183+ LDR FR0,FR2
0143C6 2802 28184+ LDR FR0,FR2
0143C8 2802 28185+ LDR FR0,FR2
0143CA 2802 28186+ LDR FR0,FR2
0143CC 2802 28187+ LDR FR0,FR2
0143CE 2802 28188+ LDR FR0,FR2
0143D0 2802 28189+ LDR FR0,FR2
0143D2 2802 28190+ LDR FR0,FR2
0143D4 2802 28191+ LDR FR0,FR2
0143D6 2802 28192+ LDR FR0,FR2
0143D8 2802 28193+ LDR FR0,FR2
0143DA 2802 28194+ LDR FR0,FR2
0143DC 2802 28195+ LDR FR0,FR2
0143DE 2802 28196+ LDR FR0,FR2
0143E0 2802 28197+ LDR FR0,FR2
0143E2 2802 28198+ LDR FR0,FR2
0143E4 2802 28199+ LDR FR0,FR2
0143E6 2802 28200+ LDR FR0,FR2
0143E8 2802 28201+ LDR FR0,FR2
0143EA 2802 28202+ LDR FR0,FR2
0143EC 2802 28203+ LDR FR0,FR2
0143EE 2802 28204+ LDR FR0,FR2
0143F0 2802 28205+ LDR FR0,FR2
0143F2 2802 28206+ LDR FR0,FR2
0143F4 2802 28207+ LDR FR0,FR2
0143F6 2802 28208+ LDR FR0,FR2
0143F8 2802 28209+ LDR FR0,FR2
0143FA 2802 28210+ LDR FR0,FR2
0143FC 2802 28211+ LDR FR0,FR2
0143FE 2802 28212+ LDR FR0,FR2
014400 2802 28213+ LDR FR0,FR2
014402 2802 28214+ LDR FR0,FR2
014404 2802 28215+ LDR FR0,FR2
014406 2802 28216+ LDR FR0,FR2
014408 2802 28217+ LDR FR0,FR2
01440A 2802 28218+ LDR FR0,FR2
01440C 2802 28219+ LDR FR0,FR2
01440E 2802 28220+ LDR FR0,FR2
PAGE 516
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014410 2802 28221+ LDR FR0,FR2
014412 2802 28222+ LDR FR0,FR2
014414 2802 28223+ LDR FR0,FR2
014416 2802 28224+ LDR FR0,FR2
014418 2802 28225+ LDR FR0,FR2
01441A 2802 28226+ LDR FR0,FR2
01441C 2802 28227+ LDR FR0,FR2
01441E 2802 28228+ LDR FR0,FR2
014420 2802 28229+ LDR FR0,FR2
014422 2802 28230+ LDR FR0,FR2
014424 2802 28231+ LDR FR0,FR2
014426 2802 28232+ LDR FR0,FR2
014428 2802 28233+ LDR FR0,FR2
01442A 2802 28234+ LDR FR0,FR2
01442C 2802 28235+ LDR FR0,FR2
01442E 2802 28236+ LDR FR0,FR2
014430 2802 28237+ LDR FR0,FR2
014432 2802 28238+ LDR FR0,FR2
014434 2802 28239+ LDR FR0,FR2
014436 2802 28240+ LDR FR0,FR2
014438 2802 28241+ LDR FR0,FR2
28242+*
01443A 06FB 28243 BCTR R15,R11
28244 TSIMRET
01443C 58F0 C108 14458 28245+ L R15,=A(SAVETST) R15 := current save area
014440 58DF 0004 00004 28246+ L R13,4(R15) get old save area back
014444 98EC D00C 0000C 28247+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014448 07FE 28248+ BR 14 RETURN 02000000
28249 TSIMEND
014450 28250+ LTORG
014450 411199999999999A 28251 =D'1.1'
014458 00000458 28252 =A(SAVETST)
1445C 28253+T530TEND EQU *
28254 *
28255 * Test 531 -- LD R,m ---------------------------------------
28256 *
28257 TSIMBEG T531,10000,50,1,C'LD R,m'
28258+*
003D04 28259+TDSCDAT CSECT
003D08 28260+ DS 0D
28261+*
003D08 00014460 28262+T531TDSC DC A(T531) // TENTRY
003D0C 00000104 28263+ DC A(T531TEND-T531) // TLENGTH
003D10 00002710 28264+ DC F'10000' // TLRCNT
003D14 00000032 28265+ DC F'50' // TIGCNT
003D18 00000001 28266+ DC F'1' // TLTYPE
001BD2 28267+TEXT CSECT
001BD2 E3F5F3F1 28268+SPTR2505 DC C'T531'
003D1C 28269+TDSCDAT CSECT
003D1C 28270+ DS 0F
003D1C 04001BD2 28271+ DC AL1(L'SPTR2505),AL3(SPTR2505)
001BD6 28272+TEXT CSECT
001BD6 D3C440D96B94 28273+SPTR2506 DC C'LD R,m'
003D20 28274+TDSCDAT CSECT
003D20 28275+ DS 0F
PAGE 517
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003D20 06001BD6 28276+ DC AL1(L'SPTR2506),AL3(SPTR2506)
28277+*
004CCC 28278+TDSCTBL CSECT
04CCC 28279+T531TPTR EQU *
004CCC 00003D08 28280+ DC A(T531TDSC) enabled test
28281+*
01445C 28282+TCODE CSECT
014460 28283+ DS 0D ensure double word alignment for test
014460 28284+T531 DS 0H 01650000
014460 90EC D00C 0000C 28285+ STM 14,12,12(13) SAVE REGISTERS 02950000
014464 18CF 28286+ LR R12,R15 base register := entry address
14460 28287+ USING T531,R12 declare code base register
014466 41B0 C01E 1447E 28288+ LA R11,T531L load loop target to R11
01446A 58F0 C100 14560 28289+ L R15,=A(SAVETST) R15 := current save area
01446E 50DF 0004 00004 28290+ ST R13,4(R15) set back pointer in current save area
014472 182D 28291+ LR R2,R13 remember callers save area
014474 18DF 28292+ LR R13,R15 setup current save area
014476 50D2 0008 00008 28293+ ST R13,8(R2) set forw pointer in callers save area
00000 28294+ USING TDSC,R1 declare TDSC base register
01447A 58F0 1008 00008 28295+ L R15,TLRCNT load local repeat count to R15
28296+*
28297 *
28298 T531L REPINS LD,(FR0,=D'1.0') repeat: LD FR0,=D'1.0'
28299+*
28300+* build from sublist &ALIST a comma separated string &ARGS
28301+*
28302+*
28303+*
28304+*
28305+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
28306+* this allows to transfer the repeat count from last TDSCGEN call
28307+*
28308+*
1447E 28309+T531L EQU *
28310+*
28311+* write a comment indicating what REPINS does (in case NOGEN in effect)
28312+*
28313+*,// REPINS: do 50 times:
28314+*
28315+* MNOTE requires that ' is doubled for expanded variables
28316+* thus build &MASTR as a copy of '&ARGS with ' doubled
28317+*
28318+*
28319+*,// LD FR0,=D'1.0'
28320+*
28321+* finally generate code: &ICNT copies of &CODE &ARGS
28322+*
01447E 6800 C0F8 14558 28323+ LD FR0,=D'1.0'
014482 6800 C0F8 14558 28324+ LD FR0,=D'1.0'
014486 6800 C0F8 14558 28325+ LD FR0,=D'1.0'
01448A 6800 C0F8 14558 28326+ LD FR0,=D'1.0'
01448E 6800 C0F8 14558 28327+ LD FR0,=D'1.0'
014492 6800 C0F8 14558 28328+ LD FR0,=D'1.0'
014496 6800 C0F8 14558 28329+ LD FR0,=D'1.0'
01449A 6800 C0F8 14558 28330+ LD FR0,=D'1.0'
PAGE 518
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01449E 6800 C0F8 14558 28331+ LD FR0,=D'1.0'
0144A2 6800 C0F8 14558 28332+ LD FR0,=D'1.0'
0144A6 6800 C0F8 14558 28333+ LD FR0,=D'1.0'
0144AA 6800 C0F8 14558 28334+ LD FR0,=D'1.0'
0144AE 6800 C0F8 14558 28335+ LD FR0,=D'1.0'
0144B2 6800 C0F8 14558 28336+ LD FR0,=D'1.0'
0144B6 6800 C0F8 14558 28337+ LD FR0,=D'1.0'
0144BA 6800 C0F8 14558 28338+ LD FR0,=D'1.0'
0144BE 6800 C0F8 14558 28339+ LD FR0,=D'1.0'
0144C2 6800 C0F8 14558 28340+ LD FR0,=D'1.0'
0144C6 6800 C0F8 14558 28341+ LD FR0,=D'1.0'
0144CA 6800 C0F8 14558 28342+ LD FR0,=D'1.0'
0144CE 6800 C0F8 14558 28343+ LD FR0,=D'1.0'
0144D2 6800 C0F8 14558 28344+ LD FR0,=D'1.0'
0144D6 6800 C0F8 14558 28345+ LD FR0,=D'1.0'
0144DA 6800 C0F8 14558 28346+ LD FR0,=D'1.0'
0144DE 6800 C0F8 14558 28347+ LD FR0,=D'1.0'
0144E2 6800 C0F8 14558 28348+ LD FR0,=D'1.0'
0144E6 6800 C0F8 14558 28349+ LD FR0,=D'1.0'
0144EA 6800 C0F8 14558 28350+ LD FR0,=D'1.0'
0144EE 6800 C0F8 14558 28351+ LD FR0,=D'1.0'
0144F2 6800 C0F8 14558 28352+ LD FR0,=D'1.0'
0144F6 6800 C0F8 14558 28353+ LD FR0,=D'1.0'
0144FA 6800 C0F8 14558 28354+ LD FR0,=D'1.0'
0144FE 6800 C0F8 14558 28355+ LD FR0,=D'1.0'
014502 6800 C0F8 14558 28356+ LD FR0,=D'1.0'
014506 6800 C0F8 14558 28357+ LD FR0,=D'1.0'
01450A 6800 C0F8 14558 28358+ LD FR0,=D'1.0'
01450E 6800 C0F8 14558 28359+ LD FR0,=D'1.0'
014512 6800 C0F8 14558 28360+ LD FR0,=D'1.0'
014516 6800 C0F8 14558 28361+ LD FR0,=D'1.0'
01451A 6800 C0F8 14558 28362+ LD FR0,=D'1.0'
01451E 6800 C0F8 14558 28363+ LD FR0,=D'1.0'
014522 6800 C0F8 14558 28364+ LD FR0,=D'1.0'
014526 6800 C0F8 14558 28365+ LD FR0,=D'1.0'
01452A 6800 C0F8 14558 28366+ LD FR0,=D'1.0'
01452E 6800 C0F8 14558 28367+ LD FR0,=D'1.0'
014532 6800 C0F8 14558 28368+ LD FR0,=D'1.0'
014536 6800 C0F8 14558 28369+ LD FR0,=D'1.0'
01453A 6800 C0F8 14558 28370+ LD FR0,=D'1.0'
01453E 6800 C0F8 14558 28371+ LD FR0,=D'1.0'
014542 6800 C0F8 14558 28372+ LD FR0,=D'1.0'
28373+*
014546 06FB 28374 BCTR R15,R11
28375 TSIMRET
014548 58F0 C100 14560 28376+ L R15,=A(SAVETST) R15 := current save area
01454C 58DF 0004 00004 28377+ L R13,4(R15) get old save area back
014550 98EC D00C 0000C 28378+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014554 07FE 28379+ BR 14 RETURN 02000000
28380 TSIMEND
014558 28381+ LTORG
014558 4110000000000000 28382 =D'1.0'
014560 00000458 28383 =A(SAVETST)
14564 28384+T531TEND EQU *
28385 *
PAGE 519
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
28386 * Test 532 -- LD R,m (unal) --------------------------------
28387 *
28388 TSIMBEG T532,10000,50,1,C'LD R,m (unal)'
28389+*
003D24 28390+TDSCDAT CSECT
003D28 28391+ DS 0D
28392+*
003D28 00014568 28393+T532TDSC DC A(T532) // TENTRY
003D2C 00000114 28394+ DC A(T532TEND-T532) // TLENGTH
003D30 00002710 28395+ DC F'10000' // TLRCNT
003D34 00000032 28396+ DC F'50' // TIGCNT
003D38 00000001 28397+ DC F'1' // TLTYPE
001BDC 28398+TEXT CSECT
001BDC E3F5F3F2 28399+SPTR2517 DC C'T532'
003D3C 28400+TDSCDAT CSECT
003D3C 28401+ DS 0F
003D3C 04001BDC 28402+ DC AL1(L'SPTR2517),AL3(SPTR2517)
001BE0 28403+TEXT CSECT
001BE0 D3C440D96B94404D 28404+SPTR2518 DC C'LD R,m (unal)'
003D40 28405+TDSCDAT CSECT
003D40 28406+ DS 0F
003D40 0D001BE0 28407+ DC AL1(L'SPTR2518),AL3(SPTR2518)
28408+*
004CD0 28409+TDSCTBL CSECT
04CD0 28410+T532TPTR EQU *
004CD0 00003D28 28411+ DC A(T532TDSC) enabled test
28412+*
014564 28413+TCODE CSECT
014568 28414+ DS 0D ensure double word alignment for test
014568 28415+T532 DS 0H 01650000
014568 90EC D00C 0000C 28416+ STM 14,12,12(13) SAVE REGISTERS 02950000
01456C 18CF 28417+ LR R12,R15 base register := entry address
14568 28418+ USING T532,R12 declare code base register
01456E 41B0 C022 1458A 28419+ LA R11,T532L load loop target to R11
014572 58F0 C110 14678 28420+ L R15,=A(SAVETST) R15 := current save area
014576 50DF 0004 00004 28421+ ST R13,4(R15) set back pointer in current save area
01457A 182D 28422+ LR R2,R13 remember callers save area
01457C 18DF 28423+ LR R13,R15 setup current save area
01457E 50D2 0008 00008 28424+ ST R13,8(R2) set forw pointer in callers save area
00000 28425+ USING TDSC,R1 declare TDSC base register
014582 58F0 1008 00008 28426+ L R15,TLRCNT load local repeat count to R15
28427+*
28428 *
014586 4130 C100 14668 28429 LA R3,T532V
28430 T532L REPINS LD,(FR0,1(R3)) repeat: LD FR0,1(R3)'
28431+*
28432+* build from sublist &ALIST a comma separated string &ARGS
28433+*
28434+*
28435+*
28436+*
28437+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
28438+* this allows to transfer the repeat count from last TDSCGEN call
28439+*
28440+*
PAGE 520
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
1458A 28441+T532L EQU *
28442+*
28443+* write a comment indicating what REPINS does (in case NOGEN in effect)
28444+*
28445+*,// REPINS: do 50 times:
28446+*
28447+* MNOTE requires that ' is doubled for expanded variables
28448+* thus build &MASTR as a copy of '&ARGS with ' doubled
28449+*
28450+*
28451+*,// LD FR0,1(R3)
28452+*
28453+* finally generate code: &ICNT copies of &CODE &ARGS
28454+*
01458A 6803 0001 00001 28455+ LD FR0,1(R3)
01458E 6803 0001 00001 28456+ LD FR0,1(R3)
014592 6803 0001 00001 28457+ LD FR0,1(R3)
014596 6803 0001 00001 28458+ LD FR0,1(R3)
01459A 6803 0001 00001 28459+ LD FR0,1(R3)
01459E 6803 0001 00001 28460+ LD FR0,1(R3)
0145A2 6803 0001 00001 28461+ LD FR0,1(R3)
0145A6 6803 0001 00001 28462+ LD FR0,1(R3)
0145AA 6803 0001 00001 28463+ LD FR0,1(R3)
0145AE 6803 0001 00001 28464+ LD FR0,1(R3)
0145B2 6803 0001 00001 28465+ LD FR0,1(R3)
0145B6 6803 0001 00001 28466+ LD FR0,1(R3)
0145BA 6803 0001 00001 28467+ LD FR0,1(R3)
0145BE 6803 0001 00001 28468+ LD FR0,1(R3)
0145C2 6803 0001 00001 28469+ LD FR0,1(R3)
0145C6 6803 0001 00001 28470+ LD FR0,1(R3)
0145CA 6803 0001 00001 28471+ LD FR0,1(R3)
0145CE 6803 0001 00001 28472+ LD FR0,1(R3)
0145D2 6803 0001 00001 28473+ LD FR0,1(R3)
0145D6 6803 0001 00001 28474+ LD FR0,1(R3)
0145DA 6803 0001 00001 28475+ LD FR0,1(R3)
0145DE 6803 0001 00001 28476+ LD FR0,1(R3)
0145E2 6803 0001 00001 28477+ LD FR0,1(R3)
0145E6 6803 0001 00001 28478+ LD FR0,1(R3)
0145EA 6803 0001 00001 28479+ LD FR0,1(R3)
0145EE 6803 0001 00001 28480+ LD FR0,1(R3)
0145F2 6803 0001 00001 28481+ LD FR0,1(R3)
0145F6 6803 0001 00001 28482+ LD FR0,1(R3)
0145FA 6803 0001 00001 28483+ LD FR0,1(R3)
0145FE 6803 0001 00001 28484+ LD FR0,1(R3)
014602 6803 0001 00001 28485+ LD FR0,1(R3)
014606 6803 0001 00001 28486+ LD FR0,1(R3)
01460A 6803 0001 00001 28487+ LD FR0,1(R3)
01460E 6803 0001 00001 28488+ LD FR0,1(R3)
014612 6803 0001 00001 28489+ LD FR0,1(R3)
014616 6803 0001 00001 28490+ LD FR0,1(R3)
01461A 6803 0001 00001 28491+ LD FR0,1(R3)
01461E 6803 0001 00001 28492+ LD FR0,1(R3)
014622 6803 0001 00001 28493+ LD FR0,1(R3)
014626 6803 0001 00001 28494+ LD FR0,1(R3)
01462A 6803 0001 00001 28495+ LD FR0,1(R3)
PAGE 521
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01462E 6803 0001 00001 28496+ LD FR0,1(R3)
014632 6803 0001 00001 28497+ LD FR0,1(R3)
014636 6803 0001 00001 28498+ LD FR0,1(R3)
01463A 6803 0001 00001 28499+ LD FR0,1(R3)
01463E 6803 0001 00001 28500+ LD FR0,1(R3)
014642 6803 0001 00001 28501+ LD FR0,1(R3)
014646 6803 0001 00001 28502+ LD FR0,1(R3)
01464A 6803 0001 00001 28503+ LD FR0,1(R3)
01464E 6803 0001 00001 28504+ LD FR0,1(R3)
28505+*
014652 06FB 28506 BCTR R15,R11
28507 TSIMRET
014654 58F0 C110 14678 28508+ L R15,=A(SAVETST) R15 := current save area
014658 58DF 0004 00004 28509+ L R13,4(R15) get old save area back
01465C 98EC D00C 0000C 28510+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014660 07FE 28511+ BR 14 RETURN 02000000
28512 *
014668 28513 DS 0D
014668 4E4E4E4E4E4E4E4E 28514 T532V DC 3X'4E4E4E4E' target for unaligned load
28515 TSIMEND
014678 28516+ LTORG
014678 00000458 28517 =A(SAVETST)
1467C 28518+T532TEND EQU *
28519 *
28520 * Test 533 -- LTDR R,R -------------------------------------
28521 *
28522 TSIMBEG T533,10000,100,1,C'LTDR R,R'
28523+*
003D44 28524+TDSCDAT CSECT
003D48 28525+ DS 0D
28526+*
003D48 00014680 28527+T533TDSC DC A(T533) // TENTRY
003D4C 0000010C 28528+ DC A(T533TEND-T533) // TLENGTH
003D50 00002710 28529+ DC F'10000' // TLRCNT
003D54 00000064 28530+ DC F'100' // TIGCNT
003D58 00000001 28531+ DC F'1' // TLTYPE
001BED 28532+TEXT CSECT
001BED E3F5F3F3 28533+SPTR2529 DC C'T533'
003D5C 28534+TDSCDAT CSECT
003D5C 28535+ DS 0F
003D5C 04001BED 28536+ DC AL1(L'SPTR2529),AL3(SPTR2529)
001BF1 28537+TEXT CSECT
001BF1 D3E3C4D940D96BD9 28538+SPTR2530 DC C'LTDR R,R'
003D60 28539+TDSCDAT CSECT
003D60 28540+ DS 0F
003D60 08001BF1 28541+ DC AL1(L'SPTR2530),AL3(SPTR2530)
28542+*
004CD4 28543+TDSCTBL CSECT
04CD4 28544+T533TPTR EQU *
004CD4 00003D48 28545+ DC A(T533TDSC) enabled test
28546+*
01467C 28547+TCODE CSECT
014680 28548+ DS 0D ensure double word alignment for test
014680 28549+T533 DS 0H 01650000
014680 90EC D00C 0000C 28550+ STM 14,12,12(13) SAVE REGISTERS 02950000
PAGE 522
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014684 18CF 28551+ LR R12,R15 base register := entry address
14680 28552+ USING T533,R12 declare code base register
014686 41B0 C022 146A2 28553+ LA R11,T533L load loop target to R11
01468A 58F0 C108 14788 28554+ L R15,=A(SAVETST) R15 := current save area
01468E 50DF 0004 00004 28555+ ST R13,4(R15) set back pointer in current save area
014692 182D 28556+ LR R2,R13 remember callers save area
014694 18DF 28557+ LR R13,R15 setup current save area
014696 50D2 0008 00008 28558+ ST R13,8(R2) set forw pointer in callers save area
00000 28559+ USING TDSC,R1 declare TDSC base register
01469A 58F0 1008 00008 28560+ L R15,TLRCNT load local repeat count to R15
28561+*
28562 *
01469E 6820 C100 14780 28563 LD FR2,=D'1.0'
28564 T533L REPINS LTDR,(FR0,FR2) repeat: LTDR FR0,FR2
28565+*
28566+* build from sublist &ALIST a comma separated string &ARGS
28567+*
28568+*
28569+*
28570+*
28571+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
28572+* this allows to transfer the repeat count from last TDSCGEN call
28573+*
28574+*
146A2 28575+T533L EQU *
28576+*
28577+* write a comment indicating what REPINS does (in case NOGEN in effect)
28578+*
28579+*,// REPINS: do 100 times:
28580+*
28581+* MNOTE requires that ' is doubled for expanded variables
28582+* thus build &MASTR as a copy of '&ARGS with ' doubled
28583+*
28584+*
28585+*,// LTDR FR0,FR2
28586+*
28587+* finally generate code: &ICNT copies of &CODE &ARGS
28588+*
0146A2 2202 28589+ LTDR FR0,FR2
0146A4 2202 28590+ LTDR FR0,FR2
0146A6 2202 28591+ LTDR FR0,FR2
0146A8 2202 28592+ LTDR FR0,FR2
0146AA 2202 28593+ LTDR FR0,FR2
0146AC 2202 28594+ LTDR FR0,FR2
0146AE 2202 28595+ LTDR FR0,FR2
0146B0 2202 28596+ LTDR FR0,FR2
0146B2 2202 28597+ LTDR FR0,FR2
0146B4 2202 28598+ LTDR FR0,FR2
0146B6 2202 28599+ LTDR FR0,FR2
0146B8 2202 28600+ LTDR FR0,FR2
0146BA 2202 28601+ LTDR FR0,FR2
0146BC 2202 28602+ LTDR FR0,FR2
0146BE 2202 28603+ LTDR FR0,FR2
0146C0 2202 28604+ LTDR FR0,FR2
0146C2 2202 28605+ LTDR FR0,FR2
PAGE 523
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0146C4 2202 28606+ LTDR FR0,FR2
0146C6 2202 28607+ LTDR FR0,FR2
0146C8 2202 28608+ LTDR FR0,FR2
0146CA 2202 28609+ LTDR FR0,FR2
0146CC 2202 28610+ LTDR FR0,FR2
0146CE 2202 28611+ LTDR FR0,FR2
0146D0 2202 28612+ LTDR FR0,FR2
0146D2 2202 28613+ LTDR FR0,FR2
0146D4 2202 28614+ LTDR FR0,FR2
0146D6 2202 28615+ LTDR FR0,FR2
0146D8 2202 28616+ LTDR FR0,FR2
0146DA 2202 28617+ LTDR FR0,FR2
0146DC 2202 28618+ LTDR FR0,FR2
0146DE 2202 28619+ LTDR FR0,FR2
0146E0 2202 28620+ LTDR FR0,FR2
0146E2 2202 28621+ LTDR FR0,FR2
0146E4 2202 28622+ LTDR FR0,FR2
0146E6 2202 28623+ LTDR FR0,FR2
0146E8 2202 28624+ LTDR FR0,FR2
0146EA 2202 28625+ LTDR FR0,FR2
0146EC 2202 28626+ LTDR FR0,FR2
0146EE 2202 28627+ LTDR FR0,FR2
0146F0 2202 28628+ LTDR FR0,FR2
0146F2 2202 28629+ LTDR FR0,FR2
0146F4 2202 28630+ LTDR FR0,FR2
0146F6 2202 28631+ LTDR FR0,FR2
0146F8 2202 28632+ LTDR FR0,FR2
0146FA 2202 28633+ LTDR FR0,FR2
0146FC 2202 28634+ LTDR FR0,FR2
0146FE 2202 28635+ LTDR FR0,FR2
014700 2202 28636+ LTDR FR0,FR2
014702 2202 28637+ LTDR FR0,FR2
014704 2202 28638+ LTDR FR0,FR2
014706 2202 28639+ LTDR FR0,FR2
014708 2202 28640+ LTDR FR0,FR2
01470A 2202 28641+ LTDR FR0,FR2
01470C 2202 28642+ LTDR FR0,FR2
01470E 2202 28643+ LTDR FR0,FR2
014710 2202 28644+ LTDR FR0,FR2
014712 2202 28645+ LTDR FR0,FR2
014714 2202 28646+ LTDR FR0,FR2
014716 2202 28647+ LTDR FR0,FR2
014718 2202 28648+ LTDR FR0,FR2
01471A 2202 28649+ LTDR FR0,FR2
01471C 2202 28650+ LTDR FR0,FR2
01471E 2202 28651+ LTDR FR0,FR2
014720 2202 28652+ LTDR FR0,FR2
014722 2202 28653+ LTDR FR0,FR2
014724 2202 28654+ LTDR FR0,FR2
014726 2202 28655+ LTDR FR0,FR2
014728 2202 28656+ LTDR FR0,FR2
01472A 2202 28657+ LTDR FR0,FR2
01472C 2202 28658+ LTDR FR0,FR2
01472E 2202 28659+ LTDR FR0,FR2
014730 2202 28660+ LTDR FR0,FR2
PAGE 524
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014732 2202 28661+ LTDR FR0,FR2
014734 2202 28662+ LTDR FR0,FR2
014736 2202 28663+ LTDR FR0,FR2
014738 2202 28664+ LTDR FR0,FR2
01473A 2202 28665+ LTDR FR0,FR2
01473C 2202 28666+ LTDR FR0,FR2
01473E 2202 28667+ LTDR FR0,FR2
014740 2202 28668+ LTDR FR0,FR2
014742 2202 28669+ LTDR FR0,FR2
014744 2202 28670+ LTDR FR0,FR2
014746 2202 28671+ LTDR FR0,FR2
014748 2202 28672+ LTDR FR0,FR2
01474A 2202 28673+ LTDR FR0,FR2
01474C 2202 28674+ LTDR FR0,FR2
01474E 2202 28675+ LTDR FR0,FR2
014750 2202 28676+ LTDR FR0,FR2
014752 2202 28677+ LTDR FR0,FR2
014754 2202 28678+ LTDR FR0,FR2
014756 2202 28679+ LTDR FR0,FR2
014758 2202 28680+ LTDR FR0,FR2
01475A 2202 28681+ LTDR FR0,FR2
01475C 2202 28682+ LTDR FR0,FR2
01475E 2202 28683+ LTDR FR0,FR2
014760 2202 28684+ LTDR FR0,FR2
014762 2202 28685+ LTDR FR0,FR2
014764 2202 28686+ LTDR FR0,FR2
014766 2202 28687+ LTDR FR0,FR2
014768 2202 28688+ LTDR FR0,FR2
28689+*
01476A 06FB 28690 BCTR R15,R11
28691 TSIMRET
01476C 58F0 C108 14788 28692+ L R15,=A(SAVETST) R15 := current save area
014770 58DF 0004 00004 28693+ L R13,4(R15) get old save area back
014774 98EC D00C 0000C 28694+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014778 07FE 28695+ BR 14 RETURN 02000000
28696 TSIMEND
014780 28697+ LTORG
014780 4110000000000000 28698 =D'1.0'
014788 00000458 28699 =A(SAVETST)
1478C 28700+T533TEND EQU *
28701 *
28702 * Test 534 -- LCDR R,R -------------------------------------
28703 *
28704 TSIMBEG T534,10000,100,1,C'LCDR R,R'
28705+*
003D64 28706+TDSCDAT CSECT
003D68 28707+ DS 0D
28708+*
003D68 00014790 28709+T534TDSC DC A(T534) // TENTRY
003D6C 0000010C 28710+ DC A(T534TEND-T534) // TLENGTH
003D70 00002710 28711+ DC F'10000' // TLRCNT
003D74 00000064 28712+ DC F'100' // TIGCNT
003D78 00000001 28713+ DC F'1' // TLTYPE
001BF9 28714+TEXT CSECT
001BF9 E3F5F3F4 28715+SPTR2541 DC C'T534'
PAGE 525
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003D7C 28716+TDSCDAT CSECT
003D7C 28717+ DS 0F
003D7C 04001BF9 28718+ DC AL1(L'SPTR2541),AL3(SPTR2541)
001BFD 28719+TEXT CSECT
001BFD D3C3C4D940D96BD9 28720+SPTR2542 DC C'LCDR R,R'
003D80 28721+TDSCDAT CSECT
003D80 28722+ DS 0F
003D80 08001BFD 28723+ DC AL1(L'SPTR2542),AL3(SPTR2542)
28724+*
004CD8 28725+TDSCTBL CSECT
04CD8 28726+T534TPTR EQU *
004CD8 00003D68 28727+ DC A(T534TDSC) enabled test
28728+*
01478C 28729+TCODE CSECT
014790 28730+ DS 0D ensure double word alignment for test
014790 28731+T534 DS 0H 01650000
014790 90EC D00C 0000C 28732+ STM 14,12,12(13) SAVE REGISTERS 02950000
014794 18CF 28733+ LR R12,R15 base register := entry address
14790 28734+ USING T534,R12 declare code base register
014796 41B0 C022 147B2 28735+ LA R11,T534L load loop target to R11
01479A 58F0 C108 14898 28736+ L R15,=A(SAVETST) R15 := current save area
01479E 50DF 0004 00004 28737+ ST R13,4(R15) set back pointer in current save area
0147A2 182D 28738+ LR R2,R13 remember callers save area
0147A4 18DF 28739+ LR R13,R15 setup current save area
0147A6 50D2 0008 00008 28740+ ST R13,8(R2) set forw pointer in callers save area
00000 28741+ USING TDSC,R1 declare TDSC base register
0147AA 58F0 1008 00008 28742+ L R15,TLRCNT load local repeat count to R15
28743+*
28744 *
0147AE 6820 C100 14890 28745 LD FR2,=D'1.0'
28746 T534L REPINS LCDR,(FR0,FR2) repeat: LCDR FR0,FR2
28747+*
28748+* build from sublist &ALIST a comma separated string &ARGS
28749+*
28750+*
28751+*
28752+*
28753+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
28754+* this allows to transfer the repeat count from last TDSCGEN call
28755+*
28756+*
147B2 28757+T534L EQU *
28758+*
28759+* write a comment indicating what REPINS does (in case NOGEN in effect)
28760+*
28761+*,// REPINS: do 100 times:
28762+*
28763+* MNOTE requires that ' is doubled for expanded variables
28764+* thus build &MASTR as a copy of '&ARGS with ' doubled
28765+*
28766+*
28767+*,// LCDR FR0,FR2
28768+*
28769+* finally generate code: &ICNT copies of &CODE &ARGS
28770+*
PAGE 526
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0147B2 2302 28771+ LCDR FR0,FR2
0147B4 2302 28772+ LCDR FR0,FR2
0147B6 2302 28773+ LCDR FR0,FR2
0147B8 2302 28774+ LCDR FR0,FR2
0147BA 2302 28775+ LCDR FR0,FR2
0147BC 2302 28776+ LCDR FR0,FR2
0147BE 2302 28777+ LCDR FR0,FR2
0147C0 2302 28778+ LCDR FR0,FR2
0147C2 2302 28779+ LCDR FR0,FR2
0147C4 2302 28780+ LCDR FR0,FR2
0147C6 2302 28781+ LCDR FR0,FR2
0147C8 2302 28782+ LCDR FR0,FR2
0147CA 2302 28783+ LCDR FR0,FR2
0147CC 2302 28784+ LCDR FR0,FR2
0147CE 2302 28785+ LCDR FR0,FR2
0147D0 2302 28786+ LCDR FR0,FR2
0147D2 2302 28787+ LCDR FR0,FR2
0147D4 2302 28788+ LCDR FR0,FR2
0147D6 2302 28789+ LCDR FR0,FR2
0147D8 2302 28790+ LCDR FR0,FR2
0147DA 2302 28791+ LCDR FR0,FR2
0147DC 2302 28792+ LCDR FR0,FR2
0147DE 2302 28793+ LCDR FR0,FR2
0147E0 2302 28794+ LCDR FR0,FR2
0147E2 2302 28795+ LCDR FR0,FR2
0147E4 2302 28796+ LCDR FR0,FR2
0147E6 2302 28797+ LCDR FR0,FR2
0147E8 2302 28798+ LCDR FR0,FR2
0147EA 2302 28799+ LCDR FR0,FR2
0147EC 2302 28800+ LCDR FR0,FR2
0147EE 2302 28801+ LCDR FR0,FR2
0147F0 2302 28802+ LCDR FR0,FR2
0147F2 2302 28803+ LCDR FR0,FR2
0147F4 2302 28804+ LCDR FR0,FR2
0147F6 2302 28805+ LCDR FR0,FR2
0147F8 2302 28806+ LCDR FR0,FR2
0147FA 2302 28807+ LCDR FR0,FR2
0147FC 2302 28808+ LCDR FR0,FR2
0147FE 2302 28809+ LCDR FR0,FR2
014800 2302 28810+ LCDR FR0,FR2
014802 2302 28811+ LCDR FR0,FR2
014804 2302 28812+ LCDR FR0,FR2
014806 2302 28813+ LCDR FR0,FR2
014808 2302 28814+ LCDR FR0,FR2
01480A 2302 28815+ LCDR FR0,FR2
01480C 2302 28816+ LCDR FR0,FR2
01480E 2302 28817+ LCDR FR0,FR2
014810 2302 28818+ LCDR FR0,FR2
014812 2302 28819+ LCDR FR0,FR2
014814 2302 28820+ LCDR FR0,FR2
014816 2302 28821+ LCDR FR0,FR2
014818 2302 28822+ LCDR FR0,FR2
01481A 2302 28823+ LCDR FR0,FR2
01481C 2302 28824+ LCDR FR0,FR2
01481E 2302 28825+ LCDR FR0,FR2
PAGE 527
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014820 2302 28826+ LCDR FR0,FR2
014822 2302 28827+ LCDR FR0,FR2
014824 2302 28828+ LCDR FR0,FR2
014826 2302 28829+ LCDR FR0,FR2
014828 2302 28830+ LCDR FR0,FR2
01482A 2302 28831+ LCDR FR0,FR2
01482C 2302 28832+ LCDR FR0,FR2
01482E 2302 28833+ LCDR FR0,FR2
014830 2302 28834+ LCDR FR0,FR2
014832 2302 28835+ LCDR FR0,FR2
014834 2302 28836+ LCDR FR0,FR2
014836 2302 28837+ LCDR FR0,FR2
014838 2302 28838+ LCDR FR0,FR2
01483A 2302 28839+ LCDR FR0,FR2
01483C 2302 28840+ LCDR FR0,FR2
01483E 2302 28841+ LCDR FR0,FR2
014840 2302 28842+ LCDR FR0,FR2
014842 2302 28843+ LCDR FR0,FR2
014844 2302 28844+ LCDR FR0,FR2
014846 2302 28845+ LCDR FR0,FR2
014848 2302 28846+ LCDR FR0,FR2
01484A 2302 28847+ LCDR FR0,FR2
01484C 2302 28848+ LCDR FR0,FR2
01484E 2302 28849+ LCDR FR0,FR2
014850 2302 28850+ LCDR FR0,FR2
014852 2302 28851+ LCDR FR0,FR2
014854 2302 28852+ LCDR FR0,FR2
014856 2302 28853+ LCDR FR0,FR2
014858 2302 28854+ LCDR FR0,FR2
01485A 2302 28855+ LCDR FR0,FR2
01485C 2302 28856+ LCDR FR0,FR2
01485E 2302 28857+ LCDR FR0,FR2
014860 2302 28858+ LCDR FR0,FR2
014862 2302 28859+ LCDR FR0,FR2
014864 2302 28860+ LCDR FR0,FR2
014866 2302 28861+ LCDR FR0,FR2
014868 2302 28862+ LCDR FR0,FR2
01486A 2302 28863+ LCDR FR0,FR2
01486C 2302 28864+ LCDR FR0,FR2
01486E 2302 28865+ LCDR FR0,FR2
014870 2302 28866+ LCDR FR0,FR2
014872 2302 28867+ LCDR FR0,FR2
014874 2302 28868+ LCDR FR0,FR2
014876 2302 28869+ LCDR FR0,FR2
014878 2302 28870+ LCDR FR0,FR2
28871+*
01487A 06FB 28872 BCTR R15,R11
28873 TSIMRET
01487C 58F0 C108 14898 28874+ L R15,=A(SAVETST) R15 := current save area
014880 58DF 0004 00004 28875+ L R13,4(R15) get old save area back
014884 98EC D00C 0000C 28876+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014888 07FE 28877+ BR 14 RETURN 02000000
28878 TSIMEND
014890 28879+ LTORG
014890 4110000000000000 28880 =D'1.0'
PAGE 528
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014898 00000458 28881 =A(SAVETST)
1489C 28882+T534TEND EQU *
28883 *
28884 * Test 535 -- LNDR R,R -------------------------------------
28885 *
28886 TSIMBEG T535,10000,100,1,C'LNDR R,R'
28887+*
003D84 28888+TDSCDAT CSECT
003D88 28889+ DS 0D
28890+*
003D88 000148A0 28891+T535TDSC DC A(T535) // TENTRY
003D8C 0000010C 28892+ DC A(T535TEND-T535) // TLENGTH
003D90 00002710 28893+ DC F'10000' // TLRCNT
003D94 00000064 28894+ DC F'100' // TIGCNT
003D98 00000001 28895+ DC F'1' // TLTYPE
001C05 28896+TEXT CSECT
001C05 E3F5F3F5 28897+SPTR2553 DC C'T535'
003D9C 28898+TDSCDAT CSECT
003D9C 28899+ DS 0F
003D9C 04001C05 28900+ DC AL1(L'SPTR2553),AL3(SPTR2553)
001C09 28901+TEXT CSECT
001C09 D3D5C4D940D96BD9 28902+SPTR2554 DC C'LNDR R,R'
003DA0 28903+TDSCDAT CSECT
003DA0 28904+ DS 0F
003DA0 08001C09 28905+ DC AL1(L'SPTR2554),AL3(SPTR2554)
28906+*
004CDC 28907+TDSCTBL CSECT
04CDC 28908+T535TPTR EQU *
004CDC 00003D88 28909+ DC A(T535TDSC) enabled test
28910+*
01489C 28911+TCODE CSECT
0148A0 28912+ DS 0D ensure double word alignment for test
0148A0 28913+T535 DS 0H 01650000
0148A0 90EC D00C 0000C 28914+ STM 14,12,12(13) SAVE REGISTERS 02950000
0148A4 18CF 28915+ LR R12,R15 base register := entry address
148A0 28916+ USING T535,R12 declare code base register
0148A6 41B0 C022 148C2 28917+ LA R11,T535L load loop target to R11
0148AA 58F0 C108 149A8 28918+ L R15,=A(SAVETST) R15 := current save area
0148AE 50DF 0004 00004 28919+ ST R13,4(R15) set back pointer in current save area
0148B2 182D 28920+ LR R2,R13 remember callers save area
0148B4 18DF 28921+ LR R13,R15 setup current save area
0148B6 50D2 0008 00008 28922+ ST R13,8(R2) set forw pointer in callers save area
00000 28923+ USING TDSC,R1 declare TDSC base register
0148BA 58F0 1008 00008 28924+ L R15,TLRCNT load local repeat count to R15
28925+*
28926 *
0148BE 6820 C100 149A0 28927 LD FR2,=D'1.0'
28928 T535L REPINS LNDR,(FR0,FR2) repeat: LNDR FR0,FR2
28929+*
28930+* build from sublist &ALIST a comma separated string &ARGS
28931+*
28932+*
28933+*
28934+*
28935+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
PAGE 529
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
28936+* this allows to transfer the repeat count from last TDSCGEN call
28937+*
28938+*
148C2 28939+T535L EQU *
28940+*
28941+* write a comment indicating what REPINS does (in case NOGEN in effect)
28942+*
28943+*,// REPINS: do 100 times:
28944+*
28945+* MNOTE requires that ' is doubled for expanded variables
28946+* thus build &MASTR as a copy of '&ARGS with ' doubled
28947+*
28948+*
28949+*,// LNDR FR0,FR2
28950+*
28951+* finally generate code: &ICNT copies of &CODE &ARGS
28952+*
0148C2 2102 28953+ LNDR FR0,FR2
0148C4 2102 28954+ LNDR FR0,FR2
0148C6 2102 28955+ LNDR FR0,FR2
0148C8 2102 28956+ LNDR FR0,FR2
0148CA 2102 28957+ LNDR FR0,FR2
0148CC 2102 28958+ LNDR FR0,FR2
0148CE 2102 28959+ LNDR FR0,FR2
0148D0 2102 28960+ LNDR FR0,FR2
0148D2 2102 28961+ LNDR FR0,FR2
0148D4 2102 28962+ LNDR FR0,FR2
0148D6 2102 28963+ LNDR FR0,FR2
0148D8 2102 28964+ LNDR FR0,FR2
0148DA 2102 28965+ LNDR FR0,FR2
0148DC 2102 28966+ LNDR FR0,FR2
0148DE 2102 28967+ LNDR FR0,FR2
0148E0 2102 28968+ LNDR FR0,FR2
0148E2 2102 28969+ LNDR FR0,FR2
0148E4 2102 28970+ LNDR FR0,FR2
0148E6 2102 28971+ LNDR FR0,FR2
0148E8 2102 28972+ LNDR FR0,FR2
0148EA 2102 28973+ LNDR FR0,FR2
0148EC 2102 28974+ LNDR FR0,FR2
0148EE 2102 28975+ LNDR FR0,FR2
0148F0 2102 28976+ LNDR FR0,FR2
0148F2 2102 28977+ LNDR FR0,FR2
0148F4 2102 28978+ LNDR FR0,FR2
0148F6 2102 28979+ LNDR FR0,FR2
0148F8 2102 28980+ LNDR FR0,FR2
0148FA 2102 28981+ LNDR FR0,FR2
0148FC 2102 28982+ LNDR FR0,FR2
0148FE 2102 28983+ LNDR FR0,FR2
014900 2102 28984+ LNDR FR0,FR2
014902 2102 28985+ LNDR FR0,FR2
014904 2102 28986+ LNDR FR0,FR2
014906 2102 28987+ LNDR FR0,FR2
014908 2102 28988+ LNDR FR0,FR2
01490A 2102 28989+ LNDR FR0,FR2
01490C 2102 28990+ LNDR FR0,FR2
PAGE 530
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01490E 2102 28991+ LNDR FR0,FR2
014910 2102 28992+ LNDR FR0,FR2
014912 2102 28993+ LNDR FR0,FR2
014914 2102 28994+ LNDR FR0,FR2
014916 2102 28995+ LNDR FR0,FR2
014918 2102 28996+ LNDR FR0,FR2
01491A 2102 28997+ LNDR FR0,FR2
01491C 2102 28998+ LNDR FR0,FR2
01491E 2102 28999+ LNDR FR0,FR2
014920 2102 29000+ LNDR FR0,FR2
014922 2102 29001+ LNDR FR0,FR2
014924 2102 29002+ LNDR FR0,FR2
014926 2102 29003+ LNDR FR0,FR2
014928 2102 29004+ LNDR FR0,FR2
01492A 2102 29005+ LNDR FR0,FR2
01492C 2102 29006+ LNDR FR0,FR2
01492E 2102 29007+ LNDR FR0,FR2
014930 2102 29008+ LNDR FR0,FR2
014932 2102 29009+ LNDR FR0,FR2
014934 2102 29010+ LNDR FR0,FR2
014936 2102 29011+ LNDR FR0,FR2
014938 2102 29012+ LNDR FR0,FR2
01493A 2102 29013+ LNDR FR0,FR2
01493C 2102 29014+ LNDR FR0,FR2
01493E 2102 29015+ LNDR FR0,FR2
014940 2102 29016+ LNDR FR0,FR2
014942 2102 29017+ LNDR FR0,FR2
014944 2102 29018+ LNDR FR0,FR2
014946 2102 29019+ LNDR FR0,FR2
014948 2102 29020+ LNDR FR0,FR2
01494A 2102 29021+ LNDR FR0,FR2
01494C 2102 29022+ LNDR FR0,FR2
01494E 2102 29023+ LNDR FR0,FR2
014950 2102 29024+ LNDR FR0,FR2
014952 2102 29025+ LNDR FR0,FR2
014954 2102 29026+ LNDR FR0,FR2
014956 2102 29027+ LNDR FR0,FR2
014958 2102 29028+ LNDR FR0,FR2
01495A 2102 29029+ LNDR FR0,FR2
01495C 2102 29030+ LNDR FR0,FR2
01495E 2102 29031+ LNDR FR0,FR2
014960 2102 29032+ LNDR FR0,FR2
014962 2102 29033+ LNDR FR0,FR2
014964 2102 29034+ LNDR FR0,FR2
014966 2102 29035+ LNDR FR0,FR2
014968 2102 29036+ LNDR FR0,FR2
01496A 2102 29037+ LNDR FR0,FR2
01496C 2102 29038+ LNDR FR0,FR2
01496E 2102 29039+ LNDR FR0,FR2
014970 2102 29040+ LNDR FR0,FR2
014972 2102 29041+ LNDR FR0,FR2
014974 2102 29042+ LNDR FR0,FR2
014976 2102 29043+ LNDR FR0,FR2
014978 2102 29044+ LNDR FR0,FR2
01497A 2102 29045+ LNDR FR0,FR2
PAGE 531
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01497C 2102 29046+ LNDR FR0,FR2
01497E 2102 29047+ LNDR FR0,FR2
014980 2102 29048+ LNDR FR0,FR2
014982 2102 29049+ LNDR FR0,FR2
014984 2102 29050+ LNDR FR0,FR2
014986 2102 29051+ LNDR FR0,FR2
014988 2102 29052+ LNDR FR0,FR2
29053+*
01498A 06FB 29054 BCTR R15,R11
29055 TSIMRET
01498C 58F0 C108 149A8 29056+ L R15,=A(SAVETST) R15 := current save area
014990 58DF 0004 00004 29057+ L R13,4(R15) get old save area back
014994 98EC D00C 0000C 29058+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014998 07FE 29059+ BR 14 RETURN 02000000
29060 TSIMEND
0149A0 29061+ LTORG
0149A0 4110000000000000 29062 =D'1.0'
0149A8 00000458 29063 =A(SAVETST)
149AC 29064+T535TEND EQU *
29065 *
29066 * Test 536 -- LPDR R,R -------------------------------------
29067 *
29068 TSIMBEG T536,10000,100,1,C'LPDR R,R'
29069+*
003DA4 29070+TDSCDAT CSECT
003DA8 29071+ DS 0D
29072+*
003DA8 000149B0 29073+T536TDSC DC A(T536) // TENTRY
003DAC 0000010C 29074+ DC A(T536TEND-T536) // TLENGTH
003DB0 00002710 29075+ DC F'10000' // TLRCNT
003DB4 00000064 29076+ DC F'100' // TIGCNT
003DB8 00000001 29077+ DC F'1' // TLTYPE
001C11 29078+TEXT CSECT
001C11 E3F5F3F6 29079+SPTR2565 DC C'T536'
003DBC 29080+TDSCDAT CSECT
003DBC 29081+ DS 0F
003DBC 04001C11 29082+ DC AL1(L'SPTR2565),AL3(SPTR2565)
001C15 29083+TEXT CSECT
001C15 D3D7C4D940D96BD9 29084+SPTR2566 DC C'LPDR R,R'
003DC0 29085+TDSCDAT CSECT
003DC0 29086+ DS 0F
003DC0 08001C15 29087+ DC AL1(L'SPTR2566),AL3(SPTR2566)
29088+*
004CE0 29089+TDSCTBL CSECT
04CE0 29090+T536TPTR EQU *
004CE0 00003DA8 29091+ DC A(T536TDSC) enabled test
29092+*
0149AC 29093+TCODE CSECT
0149B0 29094+ DS 0D ensure double word alignment for test
0149B0 29095+T536 DS 0H 01650000
0149B0 90EC D00C 0000C 29096+ STM 14,12,12(13) SAVE REGISTERS 02950000
0149B4 18CF 29097+ LR R12,R15 base register := entry address
149B0 29098+ USING T536,R12 declare code base register
0149B6 41B0 C022 149D2 29099+ LA R11,T536L load loop target to R11
0149BA 58F0 C108 14AB8 29100+ L R15,=A(SAVETST) R15 := current save area
PAGE 532
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0149BE 50DF 0004 00004 29101+ ST R13,4(R15) set back pointer in current save area
0149C2 182D 29102+ LR R2,R13 remember callers save area
0149C4 18DF 29103+ LR R13,R15 setup current save area
0149C6 50D2 0008 00008 29104+ ST R13,8(R2) set forw pointer in callers save area
00000 29105+ USING TDSC,R1 declare TDSC base register
0149CA 58F0 1008 00008 29106+ L R15,TLRCNT load local repeat count to R15
29107+*
29108 *
0149CE 6820 C100 14AB0 29109 LD FR2,=D'-1.0'
29110 T536L REPINS LPDR,(FR0,FR2) repeat: LPDR FR0,FR2
29111+*
29112+* build from sublist &ALIST a comma separated string &ARGS
29113+*
29114+*
29115+*
29116+*
29117+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
29118+* this allows to transfer the repeat count from last TDSCGEN call
29119+*
29120+*
149D2 29121+T536L EQU *
29122+*
29123+* write a comment indicating what REPINS does (in case NOGEN in effect)
29124+*
29125+*,// REPINS: do 100 times:
29126+*
29127+* MNOTE requires that ' is doubled for expanded variables
29128+* thus build &MASTR as a copy of '&ARGS with ' doubled
29129+*
29130+*
29131+*,// LPDR FR0,FR2
29132+*
29133+* finally generate code: &ICNT copies of &CODE &ARGS
29134+*
0149D2 2002 29135+ LPDR FR0,FR2
0149D4 2002 29136+ LPDR FR0,FR2
0149D6 2002 29137+ LPDR FR0,FR2
0149D8 2002 29138+ LPDR FR0,FR2
0149DA 2002 29139+ LPDR FR0,FR2
0149DC 2002 29140+ LPDR FR0,FR2
0149DE 2002 29141+ LPDR FR0,FR2
0149E0 2002 29142+ LPDR FR0,FR2
0149E2 2002 29143+ LPDR FR0,FR2
0149E4 2002 29144+ LPDR FR0,FR2
0149E6 2002 29145+ LPDR FR0,FR2
0149E8 2002 29146+ LPDR FR0,FR2
0149EA 2002 29147+ LPDR FR0,FR2
0149EC 2002 29148+ LPDR FR0,FR2
0149EE 2002 29149+ LPDR FR0,FR2
0149F0 2002 29150+ LPDR FR0,FR2
0149F2 2002 29151+ LPDR FR0,FR2
0149F4 2002 29152+ LPDR FR0,FR2
0149F6 2002 29153+ LPDR FR0,FR2
0149F8 2002 29154+ LPDR FR0,FR2
0149FA 2002 29155+ LPDR FR0,FR2
PAGE 533
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0149FC 2002 29156+ LPDR FR0,FR2
0149FE 2002 29157+ LPDR FR0,FR2
014A00 2002 29158+ LPDR FR0,FR2
014A02 2002 29159+ LPDR FR0,FR2
014A04 2002 29160+ LPDR FR0,FR2
014A06 2002 29161+ LPDR FR0,FR2
014A08 2002 29162+ LPDR FR0,FR2
014A0A 2002 29163+ LPDR FR0,FR2
014A0C 2002 29164+ LPDR FR0,FR2
014A0E 2002 29165+ LPDR FR0,FR2
014A10 2002 29166+ LPDR FR0,FR2
014A12 2002 29167+ LPDR FR0,FR2
014A14 2002 29168+ LPDR FR0,FR2
014A16 2002 29169+ LPDR FR0,FR2
014A18 2002 29170+ LPDR FR0,FR2
014A1A 2002 29171+ LPDR FR0,FR2
014A1C 2002 29172+ LPDR FR0,FR2
014A1E 2002 29173+ LPDR FR0,FR2
014A20 2002 29174+ LPDR FR0,FR2
014A22 2002 29175+ LPDR FR0,FR2
014A24 2002 29176+ LPDR FR0,FR2
014A26 2002 29177+ LPDR FR0,FR2
014A28 2002 29178+ LPDR FR0,FR2
014A2A 2002 29179+ LPDR FR0,FR2
014A2C 2002 29180+ LPDR FR0,FR2
014A2E 2002 29181+ LPDR FR0,FR2
014A30 2002 29182+ LPDR FR0,FR2
014A32 2002 29183+ LPDR FR0,FR2
014A34 2002 29184+ LPDR FR0,FR2
014A36 2002 29185+ LPDR FR0,FR2
014A38 2002 29186+ LPDR FR0,FR2
014A3A 2002 29187+ LPDR FR0,FR2
014A3C 2002 29188+ LPDR FR0,FR2
014A3E 2002 29189+ LPDR FR0,FR2
014A40 2002 29190+ LPDR FR0,FR2
014A42 2002 29191+ LPDR FR0,FR2
014A44 2002 29192+ LPDR FR0,FR2
014A46 2002 29193+ LPDR FR0,FR2
014A48 2002 29194+ LPDR FR0,FR2
014A4A 2002 29195+ LPDR FR0,FR2
014A4C 2002 29196+ LPDR FR0,FR2
014A4E 2002 29197+ LPDR FR0,FR2
014A50 2002 29198+ LPDR FR0,FR2
014A52 2002 29199+ LPDR FR0,FR2
014A54 2002 29200+ LPDR FR0,FR2
014A56 2002 29201+ LPDR FR0,FR2
014A58 2002 29202+ LPDR FR0,FR2
014A5A 2002 29203+ LPDR FR0,FR2
014A5C 2002 29204+ LPDR FR0,FR2
014A5E 2002 29205+ LPDR FR0,FR2
014A60 2002 29206+ LPDR FR0,FR2
014A62 2002 29207+ LPDR FR0,FR2
014A64 2002 29208+ LPDR FR0,FR2
014A66 2002 29209+ LPDR FR0,FR2
014A68 2002 29210+ LPDR FR0,FR2
PAGE 534
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014A6A 2002 29211+ LPDR FR0,FR2
014A6C 2002 29212+ LPDR FR0,FR2
014A6E 2002 29213+ LPDR FR0,FR2
014A70 2002 29214+ LPDR FR0,FR2
014A72 2002 29215+ LPDR FR0,FR2
014A74 2002 29216+ LPDR FR0,FR2
014A76 2002 29217+ LPDR FR0,FR2
014A78 2002 29218+ LPDR FR0,FR2
014A7A 2002 29219+ LPDR FR0,FR2
014A7C 2002 29220+ LPDR FR0,FR2
014A7E 2002 29221+ LPDR FR0,FR2
014A80 2002 29222+ LPDR FR0,FR2
014A82 2002 29223+ LPDR FR0,FR2
014A84 2002 29224+ LPDR FR0,FR2
014A86 2002 29225+ LPDR FR0,FR2
014A88 2002 29226+ LPDR FR0,FR2
014A8A 2002 29227+ LPDR FR0,FR2
014A8C 2002 29228+ LPDR FR0,FR2
014A8E 2002 29229+ LPDR FR0,FR2
014A90 2002 29230+ LPDR FR0,FR2
014A92 2002 29231+ LPDR FR0,FR2
014A94 2002 29232+ LPDR FR0,FR2
014A96 2002 29233+ LPDR FR0,FR2
014A98 2002 29234+ LPDR FR0,FR2
29235+*
014A9A 06FB 29236 BCTR R15,R11
29237 TSIMRET
014A9C 58F0 C108 14AB8 29238+ L R15,=A(SAVETST) R15 := current save area
014AA0 58DF 0004 00004 29239+ L R13,4(R15) get old save area back
014AA4 98EC D00C 0000C 29240+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014AA8 07FE 29241+ BR 14 RETURN 02000000
29242 TSIMEND
014AB0 29243+ LTORG
014AB0 C110000000000000 29244 =D'-1.0'
014AB8 00000458 29245 =A(SAVETST)
14ABC 29246+T536TEND EQU *
29247 *
29248 * Test 537 -- LRDR R,R -------------------------------------
29249 *
29250 TSIMBEG T537,7000,100,1,C'LRDR R,R'
29251+*
003DC4 29252+TDSCDAT CSECT
003DC8 29253+ DS 0D
29254+*
003DC8 00014AC0 29255+T537TDSC DC A(T537) // TENTRY
003DCC 00000114 29256+ DC A(T537TEND-T537) // TLENGTH
003DD0 00001B58 29257+ DC F'7000' // TLRCNT
003DD4 00000064 29258+ DC F'100' // TIGCNT
003DD8 00000001 29259+ DC F'1' // TLTYPE
001C1D 29260+TEXT CSECT
001C1D E3F5F3F7 29261+SPTR2577 DC C'T537'
003DDC 29262+TDSCDAT CSECT
003DDC 29263+ DS 0F
003DDC 04001C1D 29264+ DC AL1(L'SPTR2577),AL3(SPTR2577)
001C21 29265+TEXT CSECT
PAGE 535
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001C21 D3D9C4D940D96BD9 29266+SPTR2578 DC C'LRDR R,R'
003DE0 29267+TDSCDAT CSECT
003DE0 29268+ DS 0F
003DE0 08001C21 29269+ DC AL1(L'SPTR2578),AL3(SPTR2578)
29270+*
004CE4 29271+TDSCTBL CSECT
04CE4 29272+T537TPTR EQU *
004CE4 00003DC8 29273+ DC A(T537TDSC) enabled test
29274+*
014ABC 29275+TCODE CSECT
014AC0 29276+ DS 0D ensure double word alignment for test
014AC0 29277+T537 DS 0H 01650000
014AC0 90EC D00C 0000C 29278+ STM 14,12,12(13) SAVE REGISTERS 02950000
014AC4 18CF 29279+ LR R12,R15 base register := entry address
14AC0 29280+ USING T537,R12 declare code base register
014AC6 41B0 C026 14AE6 29281+ LA R11,T537L load loop target to R11
014ACA 58F0 C110 14BD0 29282+ L R15,=A(SAVETST) R15 := current save area
014ACE 50DF 0004 00004 29283+ ST R13,4(R15) set back pointer in current save area
014AD2 182D 29284+ LR R2,R13 remember callers save area
014AD4 18DF 29285+ LR R13,R15 setup current save area
014AD6 50D2 0008 00008 29286+ ST R13,8(R2) set forw pointer in callers save area
00000 29287+ USING TDSC,R1 declare TDSC base register
014ADA 58F0 1008 00008 29288+ L R15,TLRCNT load local repeat count to R15
29289+*
29290 *
014ADE 6840 C100 14BC0 29291 LD FR4,T537V1
014AE2 6860 C108 14BC8 29292 LD FR6,T537V1+8
29293 T537L REPINS LRDR,(FR0,FR4) repeat: LRDR FR0,FR4
29294+*
29295+* build from sublist &ALIST a comma separated string &ARGS
29296+*
29297+*
29298+*
29299+*
29300+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
29301+* this allows to transfer the repeat count from last TDSCGEN call
29302+*
29303+*
14AE6 29304+T537L EQU *
29305+*
29306+* write a comment indicating what REPINS does (in case NOGEN in effect)
29307+*
29308+*,// REPINS: do 100 times:
29309+*
29310+* MNOTE requires that ' is doubled for expanded variables
29311+* thus build &MASTR as a copy of '&ARGS with ' doubled
29312+*
29313+*
29314+*,// LRDR FR0,FR4
29315+*
29316+* finally generate code: &ICNT copies of &CODE &ARGS
29317+*
014AE6 2504 29318+ LRDR FR0,FR4
014AE8 2504 29319+ LRDR FR0,FR4
014AEA 2504 29320+ LRDR FR0,FR4
PAGE 536
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014AEC 2504 29321+ LRDR FR0,FR4
014AEE 2504 29322+ LRDR FR0,FR4
014AF0 2504 29323+ LRDR FR0,FR4
014AF2 2504 29324+ LRDR FR0,FR4
014AF4 2504 29325+ LRDR FR0,FR4
014AF6 2504 29326+ LRDR FR0,FR4
014AF8 2504 29327+ LRDR FR0,FR4
014AFA 2504 29328+ LRDR FR0,FR4
014AFC 2504 29329+ LRDR FR0,FR4
014AFE 2504 29330+ LRDR FR0,FR4
014B00 2504 29331+ LRDR FR0,FR4
014B02 2504 29332+ LRDR FR0,FR4
014B04 2504 29333+ LRDR FR0,FR4
014B06 2504 29334+ LRDR FR0,FR4
014B08 2504 29335+ LRDR FR0,FR4
014B0A 2504 29336+ LRDR FR0,FR4
014B0C 2504 29337+ LRDR FR0,FR4
014B0E 2504 29338+ LRDR FR0,FR4
014B10 2504 29339+ LRDR FR0,FR4
014B12 2504 29340+ LRDR FR0,FR4
014B14 2504 29341+ LRDR FR0,FR4
014B16 2504 29342+ LRDR FR0,FR4
014B18 2504 29343+ LRDR FR0,FR4
014B1A 2504 29344+ LRDR FR0,FR4
014B1C 2504 29345+ LRDR FR0,FR4
014B1E 2504 29346+ LRDR FR0,FR4
014B20 2504 29347+ LRDR FR0,FR4
014B22 2504 29348+ LRDR FR0,FR4
014B24 2504 29349+ LRDR FR0,FR4
014B26 2504 29350+ LRDR FR0,FR4
014B28 2504 29351+ LRDR FR0,FR4
014B2A 2504 29352+ LRDR FR0,FR4
014B2C 2504 29353+ LRDR FR0,FR4
014B2E 2504 29354+ LRDR FR0,FR4
014B30 2504 29355+ LRDR FR0,FR4
014B32 2504 29356+ LRDR FR0,FR4
014B34 2504 29357+ LRDR FR0,FR4
014B36 2504 29358+ LRDR FR0,FR4
014B38 2504 29359+ LRDR FR0,FR4
014B3A 2504 29360+ LRDR FR0,FR4
014B3C 2504 29361+ LRDR FR0,FR4
014B3E 2504 29362+ LRDR FR0,FR4
014B40 2504 29363+ LRDR FR0,FR4
014B42 2504 29364+ LRDR FR0,FR4
014B44 2504 29365+ LRDR FR0,FR4
014B46 2504 29366+ LRDR FR0,FR4
014B48 2504 29367+ LRDR FR0,FR4
014B4A 2504 29368+ LRDR FR0,FR4
014B4C 2504 29369+ LRDR FR0,FR4
014B4E 2504 29370+ LRDR FR0,FR4
014B50 2504 29371+ LRDR FR0,FR4
014B52 2504 29372+ LRDR FR0,FR4
014B54 2504 29373+ LRDR FR0,FR4
014B56 2504 29374+ LRDR FR0,FR4
014B58 2504 29375+ LRDR FR0,FR4
PAGE 537
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014B5A 2504 29376+ LRDR FR0,FR4
014B5C 2504 29377+ LRDR FR0,FR4
014B5E 2504 29378+ LRDR FR0,FR4
014B60 2504 29379+ LRDR FR0,FR4
014B62 2504 29380+ LRDR FR0,FR4
014B64 2504 29381+ LRDR FR0,FR4
014B66 2504 29382+ LRDR FR0,FR4
014B68 2504 29383+ LRDR FR0,FR4
014B6A 2504 29384+ LRDR FR0,FR4
014B6C 2504 29385+ LRDR FR0,FR4
014B6E 2504 29386+ LRDR FR0,FR4
014B70 2504 29387+ LRDR FR0,FR4
014B72 2504 29388+ LRDR FR0,FR4
014B74 2504 29389+ LRDR FR0,FR4
014B76 2504 29390+ LRDR FR0,FR4
014B78 2504 29391+ LRDR FR0,FR4
014B7A 2504 29392+ LRDR FR0,FR4
014B7C 2504 29393+ LRDR FR0,FR4
014B7E 2504 29394+ LRDR FR0,FR4
014B80 2504 29395+ LRDR FR0,FR4
014B82 2504 29396+ LRDR FR0,FR4
014B84 2504 29397+ LRDR FR0,FR4
014B86 2504 29398+ LRDR FR0,FR4
014B88 2504 29399+ LRDR FR0,FR4
014B8A 2504 29400+ LRDR FR0,FR4
014B8C 2504 29401+ LRDR FR0,FR4
014B8E 2504 29402+ LRDR FR0,FR4
014B90 2504 29403+ LRDR FR0,FR4
014B92 2504 29404+ LRDR FR0,FR4
014B94 2504 29405+ LRDR FR0,FR4
014B96 2504 29406+ LRDR FR0,FR4
014B98 2504 29407+ LRDR FR0,FR4
014B9A 2504 29408+ LRDR FR0,FR4
014B9C 2504 29409+ LRDR FR0,FR4
014B9E 2504 29410+ LRDR FR0,FR4
014BA0 2504 29411+ LRDR FR0,FR4
014BA2 2504 29412+ LRDR FR0,FR4
014BA4 2504 29413+ LRDR FR0,FR4
014BA6 2504 29414+ LRDR FR0,FR4
014BA8 2504 29415+ LRDR FR0,FR4
014BAA 2504 29416+ LRDR FR0,FR4
014BAC 2504 29417+ LRDR FR0,FR4
29418+*
014BAE 06FB 29419 BCTR R15,R11
29420 TSIMRET
014BB0 58F0 C110 14BD0 29421+ L R15,=A(SAVETST) R15 := current save area
014BB4 58DF 0004 00004 29422+ L R13,4(R15) get old save area back
014BB8 98EC D00C 0000C 29423+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014BBC 07FE 29424+ BR 14 RETURN 02000000
014BBE 0000
014BC0 4111999999999999 29425 T537V1 DC L'1.1'
29426 TSIMEND
014BD0 29427+ LTORG
014BD0 00000458 29428 =A(SAVETST)
14BD4 29429+T537TEND EQU *
PAGE 538
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
29430 *
29431 * Test 538 -- STD R,m --------------------------------------
29432 *
29433 TSIMBEG T538,10000,50,1,C'STD R,m'
29434+*
003DE4 29435+TDSCDAT CSECT
003DE8 29436+ DS 0D
29437+*
003DE8 00014BD8 29438+T538TDSC DC A(T538) // TENTRY
003DEC 00000104 29439+ DC A(T538TEND-T538) // TLENGTH
003DF0 00002710 29440+ DC F'10000' // TLRCNT
003DF4 00000032 29441+ DC F'50' // TIGCNT
003DF8 00000001 29442+ DC F'1' // TLTYPE
001C29 29443+TEXT CSECT
001C29 E3F5F3F8 29444+SPTR2589 DC C'T538'
003DFC 29445+TDSCDAT CSECT
003DFC 29446+ DS 0F
003DFC 04001C29 29447+ DC AL1(L'SPTR2589),AL3(SPTR2589)
001C2D 29448+TEXT CSECT
001C2D E2E3C440D96B94 29449+SPTR2590 DC C'STD R,m'
003E00 29450+TDSCDAT CSECT
003E00 29451+ DS 0F
003E00 07001C2D 29452+ DC AL1(L'SPTR2590),AL3(SPTR2590)
29453+*
004CE8 29454+TDSCTBL CSECT
04CE8 29455+T538TPTR EQU *
004CE8 00003DE8 29456+ DC A(T538TDSC) enabled test
29457+*
014BD4 29458+TCODE CSECT
014BD8 29459+ DS 0D ensure double word alignment for test
014BD8 29460+T538 DS 0H 01650000
014BD8 90EC D00C 0000C 29461+ STM 14,12,12(13) SAVE REGISTERS 02950000
014BDC 18CF 29462+ LR R12,R15 base register := entry address
14BD8 29463+ USING T538,R12 declare code base register
014BDE 41B0 C01E 14BF6 29464+ LA R11,T538L load loop target to R11
014BE2 58F0 C100 14CD8 29465+ L R15,=A(SAVETST) R15 := current save area
014BE6 50DF 0004 00004 29466+ ST R13,4(R15) set back pointer in current save area
014BEA 182D 29467+ LR R2,R13 remember callers save area
014BEC 18DF 29468+ LR R13,R15 setup current save area
014BEE 50D2 0008 00008 29469+ ST R13,8(R2) set forw pointer in callers save area
00000 29470+ USING TDSC,R1 declare TDSC base register
014BF2 58F0 1008 00008 29471+ L R15,TLRCNT load local repeat count to R15
29472+*
29473 *
29474 T538L REPINS STD,(FR0,T538V) repeat: STD FR0,T538V'
29475+*
29476+* build from sublist &ALIST a comma separated string &ARGS
29477+*
29478+*
29479+*
29480+*
29481+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
29482+* this allows to transfer the repeat count from last TDSCGEN call
29483+*
29484+*
PAGE 539
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
14BF6 29485+T538L EQU *
29486+*
29487+* write a comment indicating what REPINS does (in case NOGEN in effect)
29488+*
29489+*,// REPINS: do 50 times:
29490+*
29491+* MNOTE requires that ' is doubled for expanded variables
29492+* thus build &MASTR as a copy of '&ARGS with ' doubled
29493+*
29494+*
29495+*,// STD FR0,T538V
29496+*
29497+* finally generate code: &ICNT copies of &CODE &ARGS
29498+*
014BF6 6000 C0F8 14CD0 29499+ STD FR0,T538V
014BFA 6000 C0F8 14CD0 29500+ STD FR0,T538V
014BFE 6000 C0F8 14CD0 29501+ STD FR0,T538V
014C02 6000 C0F8 14CD0 29502+ STD FR0,T538V
014C06 6000 C0F8 14CD0 29503+ STD FR0,T538V
014C0A 6000 C0F8 14CD0 29504+ STD FR0,T538V
014C0E 6000 C0F8 14CD0 29505+ STD FR0,T538V
014C12 6000 C0F8 14CD0 29506+ STD FR0,T538V
014C16 6000 C0F8 14CD0 29507+ STD FR0,T538V
014C1A 6000 C0F8 14CD0 29508+ STD FR0,T538V
014C1E 6000 C0F8 14CD0 29509+ STD FR0,T538V
014C22 6000 C0F8 14CD0 29510+ STD FR0,T538V
014C26 6000 C0F8 14CD0 29511+ STD FR0,T538V
014C2A 6000 C0F8 14CD0 29512+ STD FR0,T538V
014C2E 6000 C0F8 14CD0 29513+ STD FR0,T538V
014C32 6000 C0F8 14CD0 29514+ STD FR0,T538V
014C36 6000 C0F8 14CD0 29515+ STD FR0,T538V
014C3A 6000 C0F8 14CD0 29516+ STD FR0,T538V
014C3E 6000 C0F8 14CD0 29517+ STD FR0,T538V
014C42 6000 C0F8 14CD0 29518+ STD FR0,T538V
014C46 6000 C0F8 14CD0 29519+ STD FR0,T538V
014C4A 6000 C0F8 14CD0 29520+ STD FR0,T538V
014C4E 6000 C0F8 14CD0 29521+ STD FR0,T538V
014C52 6000 C0F8 14CD0 29522+ STD FR0,T538V
014C56 6000 C0F8 14CD0 29523+ STD FR0,T538V
014C5A 6000 C0F8 14CD0 29524+ STD FR0,T538V
014C5E 6000 C0F8 14CD0 29525+ STD FR0,T538V
014C62 6000 C0F8 14CD0 29526+ STD FR0,T538V
014C66 6000 C0F8 14CD0 29527+ STD FR0,T538V
014C6A 6000 C0F8 14CD0 29528+ STD FR0,T538V
014C6E 6000 C0F8 14CD0 29529+ STD FR0,T538V
014C72 6000 C0F8 14CD0 29530+ STD FR0,T538V
014C76 6000 C0F8 14CD0 29531+ STD FR0,T538V
014C7A 6000 C0F8 14CD0 29532+ STD FR0,T538V
014C7E 6000 C0F8 14CD0 29533+ STD FR0,T538V
014C82 6000 C0F8 14CD0 29534+ STD FR0,T538V
014C86 6000 C0F8 14CD0 29535+ STD FR0,T538V
014C8A 6000 C0F8 14CD0 29536+ STD FR0,T538V
014C8E 6000 C0F8 14CD0 29537+ STD FR0,T538V
014C92 6000 C0F8 14CD0 29538+ STD FR0,T538V
014C96 6000 C0F8 14CD0 29539+ STD FR0,T538V
PAGE 540
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014C9A 6000 C0F8 14CD0 29540+ STD FR0,T538V
014C9E 6000 C0F8 14CD0 29541+ STD FR0,T538V
014CA2 6000 C0F8 14CD0 29542+ STD FR0,T538V
014CA6 6000 C0F8 14CD0 29543+ STD FR0,T538V
014CAA 6000 C0F8 14CD0 29544+ STD FR0,T538V
014CAE 6000 C0F8 14CD0 29545+ STD FR0,T538V
014CB2 6000 C0F8 14CD0 29546+ STD FR0,T538V
014CB6 6000 C0F8 14CD0 29547+ STD FR0,T538V
014CBA 6000 C0F8 14CD0 29548+ STD FR0,T538V
29549+*
014CBE 06FB 29550 BCTR R15,R11
29551 TSIMRET
014CC0 58F0 C100 14CD8 29552+ L R15,=A(SAVETST) R15 := current save area
014CC4 58DF 0004 00004 29553+ L R13,4(R15) get old save area back
014CC8 98EC D00C 0000C 29554+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014CCC 07FE 29555+ BR 14 RETURN 02000000
29556 *
014CD0 29557 T538V DS 1D
29558 TSIMEND
014CD8 29559+ LTORG
014CD8 00000458 29560 =A(SAVETST)
14CDC 29561+T538TEND EQU *
29562 *
29563 * Test 539 -- STD R,m (unal) -------------------------------
29564 *
29565 TSIMBEG T539,10000,50,1,C'STD R,m (unal)'
29566+*
003E04 29567+TDSCDAT CSECT
003E08 29568+ DS 0D
29569+*
003E08 00014CE0 29570+T539TDSC DC A(T539) // TENTRY
003E0C 00000114 29571+ DC A(T539TEND-T539) // TLENGTH
003E10 00002710 29572+ DC F'10000' // TLRCNT
003E14 00000032 29573+ DC F'50' // TIGCNT
003E18 00000001 29574+ DC F'1' // TLTYPE
001C34 29575+TEXT CSECT
001C34 E3F5F3F9 29576+SPTR2601 DC C'T539'
003E1C 29577+TDSCDAT CSECT
003E1C 29578+ DS 0F
003E1C 04001C34 29579+ DC AL1(L'SPTR2601),AL3(SPTR2601)
001C38 29580+TEXT CSECT
001C38 E2E3C440D96B9440 29581+SPTR2602 DC C'STD R,m (unal)'
003E20 29582+TDSCDAT CSECT
003E20 29583+ DS 0F
003E20 0E001C38 29584+ DC AL1(L'SPTR2602),AL3(SPTR2602)
29585+*
004CEC 29586+TDSCTBL CSECT
04CEC 29587+T539TPTR EQU *
004CEC 00003E08 29588+ DC A(T539TDSC) enabled test
29589+*
014CDC 29590+TCODE CSECT
014CE0 29591+ DS 0D ensure double word alignment for test
014CE0 29592+T539 DS 0H 01650000
014CE0 90EC D00C 0000C 29593+ STM 14,12,12(13) SAVE REGISTERS 02950000
014CE4 18CF 29594+ LR R12,R15 base register := entry address
PAGE 541
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
14CE0 29595+ USING T539,R12 declare code base register
014CE6 41B0 C022 14D02 29596+ LA R11,T539L load loop target to R11
014CEA 58F0 C110 14DF0 29597+ L R15,=A(SAVETST) R15 := current save area
014CEE 50DF 0004 00004 29598+ ST R13,4(R15) set back pointer in current save area
014CF2 182D 29599+ LR R2,R13 remember callers save area
014CF4 18DF 29600+ LR R13,R15 setup current save area
014CF6 50D2 0008 00008 29601+ ST R13,8(R2) set forw pointer in callers save area
00000 29602+ USING TDSC,R1 declare TDSC base register
014CFA 58F0 1008 00008 29603+ L R15,TLRCNT load local repeat count to R15
29604+*
29605 *
014CFE 4130 C100 14DE0 29606 LA R3,T539V
29607 T539L REPINS STD,(FR0,1(R3)) repeat: STD FR0,1(R3)'
29608+*
29609+* build from sublist &ALIST a comma separated string &ARGS
29610+*
29611+*
29612+*
29613+*
29614+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
29615+* this allows to transfer the repeat count from last TDSCGEN call
29616+*
29617+*
14D02 29618+T539L EQU *
29619+*
29620+* write a comment indicating what REPINS does (in case NOGEN in effect)
29621+*
29622+*,// REPINS: do 50 times:
29623+*
29624+* MNOTE requires that ' is doubled for expanded variables
29625+* thus build &MASTR as a copy of '&ARGS with ' doubled
29626+*
29627+*
29628+*,// STD FR0,1(R3)
29629+*
29630+* finally generate code: &ICNT copies of &CODE &ARGS
29631+*
014D02 6003 0001 00001 29632+ STD FR0,1(R3)
014D06 6003 0001 00001 29633+ STD FR0,1(R3)
014D0A 6003 0001 00001 29634+ STD FR0,1(R3)
014D0E 6003 0001 00001 29635+ STD FR0,1(R3)
014D12 6003 0001 00001 29636+ STD FR0,1(R3)
014D16 6003 0001 00001 29637+ STD FR0,1(R3)
014D1A 6003 0001 00001 29638+ STD FR0,1(R3)
014D1E 6003 0001 00001 29639+ STD FR0,1(R3)
014D22 6003 0001 00001 29640+ STD FR0,1(R3)
014D26 6003 0001 00001 29641+ STD FR0,1(R3)
014D2A 6003 0001 00001 29642+ STD FR0,1(R3)
014D2E 6003 0001 00001 29643+ STD FR0,1(R3)
014D32 6003 0001 00001 29644+ STD FR0,1(R3)
014D36 6003 0001 00001 29645+ STD FR0,1(R3)
014D3A 6003 0001 00001 29646+ STD FR0,1(R3)
014D3E 6003 0001 00001 29647+ STD FR0,1(R3)
014D42 6003 0001 00001 29648+ STD FR0,1(R3)
014D46 6003 0001 00001 29649+ STD FR0,1(R3)
PAGE 542
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014D4A 6003 0001 00001 29650+ STD FR0,1(R3)
014D4E 6003 0001 00001 29651+ STD FR0,1(R3)
014D52 6003 0001 00001 29652+ STD FR0,1(R3)
014D56 6003 0001 00001 29653+ STD FR0,1(R3)
014D5A 6003 0001 00001 29654+ STD FR0,1(R3)
014D5E 6003 0001 00001 29655+ STD FR0,1(R3)
014D62 6003 0001 00001 29656+ STD FR0,1(R3)
014D66 6003 0001 00001 29657+ STD FR0,1(R3)
014D6A 6003 0001 00001 29658+ STD FR0,1(R3)
014D6E 6003 0001 00001 29659+ STD FR0,1(R3)
014D72 6003 0001 00001 29660+ STD FR0,1(R3)
014D76 6003 0001 00001 29661+ STD FR0,1(R3)
014D7A 6003 0001 00001 29662+ STD FR0,1(R3)
014D7E 6003 0001 00001 29663+ STD FR0,1(R3)
014D82 6003 0001 00001 29664+ STD FR0,1(R3)
014D86 6003 0001 00001 29665+ STD FR0,1(R3)
014D8A 6003 0001 00001 29666+ STD FR0,1(R3)
014D8E 6003 0001 00001 29667+ STD FR0,1(R3)
014D92 6003 0001 00001 29668+ STD FR0,1(R3)
014D96 6003 0001 00001 29669+ STD FR0,1(R3)
014D9A 6003 0001 00001 29670+ STD FR0,1(R3)
014D9E 6003 0001 00001 29671+ STD FR0,1(R3)
014DA2 6003 0001 00001 29672+ STD FR0,1(R3)
014DA6 6003 0001 00001 29673+ STD FR0,1(R3)
014DAA 6003 0001 00001 29674+ STD FR0,1(R3)
014DAE 6003 0001 00001 29675+ STD FR0,1(R3)
014DB2 6003 0001 00001 29676+ STD FR0,1(R3)
014DB6 6003 0001 00001 29677+ STD FR0,1(R3)
014DBA 6003 0001 00001 29678+ STD FR0,1(R3)
014DBE 6003 0001 00001 29679+ STD FR0,1(R3)
014DC2 6003 0001 00001 29680+ STD FR0,1(R3)
014DC6 6003 0001 00001 29681+ STD FR0,1(R3)
29682+*
014DCA 06FB 29683 BCTR R15,R11
29684 TSIMRET
014DCC 58F0 C110 14DF0 29685+ L R15,=A(SAVETST) R15 := current save area
014DD0 58DF 0004 00004 29686+ L R13,4(R15) get old save area back
014DD4 98EC D00C 0000C 29687+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014DD8 07FE 29688+ BR 14 RETURN 02000000
29689 *
014DE0 29690 T539V DS 2D
29691 TSIMEND
014DF0 29692+ LTORG
014DF0 00000458 29693 =A(SAVETST)
14DF4 29694+T539TEND EQU *
29695 *
29696 * Test 54x -- long float arithmetic ========================
29697 *
29698 * Test 540 -- ADR R,R --------------------------------------
29699 *
29700 TSIMBEG T540,7000,50,1,C'ADR R,R'
29701+*
003E24 29702+TDSCDAT CSECT
003E28 29703+ DS 0D
29704+*
PAGE 543
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003E28 00014DF8 29705+T540TDSC DC A(T540) // TENTRY
003E2C 000000A4 29706+ DC A(T540TEND-T540) // TLENGTH
003E30 00001B58 29707+ DC F'7000' // TLRCNT
003E34 00000032 29708+ DC F'50' // TIGCNT
003E38 00000001 29709+ DC F'1' // TLTYPE
001C46 29710+TEXT CSECT
001C46 E3F5F4F0 29711+SPTR2613 DC C'T540'
003E3C 29712+TDSCDAT CSECT
003E3C 29713+ DS 0F
003E3C 04001C46 29714+ DC AL1(L'SPTR2613),AL3(SPTR2613)
001C4A 29715+TEXT CSECT
001C4A C1C4D940D96BD9 29716+SPTR2614 DC C'ADR R,R'
003E40 29717+TDSCDAT CSECT
003E40 29718+ DS 0F
003E40 07001C4A 29719+ DC AL1(L'SPTR2614),AL3(SPTR2614)
29720+*
004CF0 29721+TDSCTBL CSECT
04CF0 29722+T540TPTR EQU *
004CF0 00003E28 29723+ DC A(T540TDSC) enabled test
29724+*
014DF4 29725+TCODE CSECT
014DF8 29726+ DS 0D ensure double word alignment for test
014DF8 29727+T540 DS 0H 01650000
014DF8 90EC D00C 0000C 29728+ STM 14,12,12(13) SAVE REGISTERS 02950000
014DFC 18CF 29729+ LR R12,R15 base register := entry address
14DF8 29730+ USING T540,R12 declare code base register
014DFE 41B0 C024 14E1C 29731+ LA R11,T540L load loop target to R11
014E02 58F0 C0A0 14E98 29732+ L R15,=A(SAVETST) R15 := current save area
014E06 50DF 0004 00004 29733+ ST R13,4(R15) set back pointer in current save area
014E0A 182D 29734+ LR R2,R13 remember callers save area
014E0C 18DF 29735+ LR R13,R15 setup current save area
014E0E 50D2 0008 00008 29736+ ST R13,8(R2) set forw pointer in callers save area
00000 29737+ USING TDSC,R1 declare TDSC base register
014E12 58F0 1008 00008 29738+ L R15,TLRCNT load local repeat count to R15
29739+*
29740 *
014E16 2B00 29741 SDR FR0,FR0
014E18 6820 C098 14E90 29742 LD FR2,=D'1.1'
29743 T540L REPINS ADR,(FR0,FR2) repeat: ADR FR0,FR2
29744+*
29745+* build from sublist &ALIST a comma separated string &ARGS
29746+*
29747+*
29748+*
29749+*
29750+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
29751+* this allows to transfer the repeat count from last TDSCGEN call
29752+*
29753+*
14E1C 29754+T540L EQU *
29755+*
29756+* write a comment indicating what REPINS does (in case NOGEN in effect)
29757+*
29758+*,// REPINS: do 50 times:
29759+*
PAGE 544
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
29760+* MNOTE requires that ' is doubled for expanded variables
29761+* thus build &MASTR as a copy of '&ARGS with ' doubled
29762+*
29763+*
29764+*,// ADR FR0,FR2
29765+*
29766+* finally generate code: &ICNT copies of &CODE &ARGS
29767+*
014E1C 2A02 29768+ ADR FR0,FR2
014E1E 2A02 29769+ ADR FR0,FR2
014E20 2A02 29770+ ADR FR0,FR2
014E22 2A02 29771+ ADR FR0,FR2
014E24 2A02 29772+ ADR FR0,FR2
014E26 2A02 29773+ ADR FR0,FR2
014E28 2A02 29774+ ADR FR0,FR2
014E2A 2A02 29775+ ADR FR0,FR2
014E2C 2A02 29776+ ADR FR0,FR2
014E2E 2A02 29777+ ADR FR0,FR2
014E30 2A02 29778+ ADR FR0,FR2
014E32 2A02 29779+ ADR FR0,FR2
014E34 2A02 29780+ ADR FR0,FR2
014E36 2A02 29781+ ADR FR0,FR2
014E38 2A02 29782+ ADR FR0,FR2
014E3A 2A02 29783+ ADR FR0,FR2
014E3C 2A02 29784+ ADR FR0,FR2
014E3E 2A02 29785+ ADR FR0,FR2
014E40 2A02 29786+ ADR FR0,FR2
014E42 2A02 29787+ ADR FR0,FR2
014E44 2A02 29788+ ADR FR0,FR2
014E46 2A02 29789+ ADR FR0,FR2
014E48 2A02 29790+ ADR FR0,FR2
014E4A 2A02 29791+ ADR FR0,FR2
014E4C 2A02 29792+ ADR FR0,FR2
014E4E 2A02 29793+ ADR FR0,FR2
014E50 2A02 29794+ ADR FR0,FR2
014E52 2A02 29795+ ADR FR0,FR2
014E54 2A02 29796+ ADR FR0,FR2
014E56 2A02 29797+ ADR FR0,FR2
014E58 2A02 29798+ ADR FR0,FR2
014E5A 2A02 29799+ ADR FR0,FR2
014E5C 2A02 29800+ ADR FR0,FR2
014E5E 2A02 29801+ ADR FR0,FR2
014E60 2A02 29802+ ADR FR0,FR2
014E62 2A02 29803+ ADR FR0,FR2
014E64 2A02 29804+ ADR FR0,FR2
014E66 2A02 29805+ ADR FR0,FR2
014E68 2A02 29806+ ADR FR0,FR2
014E6A 2A02 29807+ ADR FR0,FR2
014E6C 2A02 29808+ ADR FR0,FR2
014E6E 2A02 29809+ ADR FR0,FR2
014E70 2A02 29810+ ADR FR0,FR2
014E72 2A02 29811+ ADR FR0,FR2
014E74 2A02 29812+ ADR FR0,FR2
014E76 2A02 29813+ ADR FR0,FR2
014E78 2A02 29814+ ADR FR0,FR2
PAGE 545
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014E7A 2A02 29815+ ADR FR0,FR2
014E7C 2A02 29816+ ADR FR0,FR2
014E7E 2A02 29817+ ADR FR0,FR2
29818+*
014E80 06FB 29819 BCTR R15,R11
29820 TSIMRET
014E82 58F0 C0A0 14E98 29821+ L R15,=A(SAVETST) R15 := current save area
014E86 58DF 0004 00004 29822+ L R13,4(R15) get old save area back
014E8A 98EC D00C 0000C 29823+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014E8E 07FE 29824+ BR 14 RETURN 02000000
29825 TSIMEND
014E90 29826+ LTORG
014E90 411199999999999A 29827 =D'1.1'
014E98 00000458 29828 =A(SAVETST)
14E9C 29829+T540TEND EQU *
29830 *
29831 * Test 541 -- AD R,m ---------------------------------------
29832 *
29833 TSIMBEG T541,5500,50,1,C'AD R,m'
29834+*
003E44 29835+TDSCDAT CSECT
003E48 29836+ DS 0D
29837+*
003E48 00014EA0 29838+T541TDSC DC A(T541) // TENTRY
003E4C 00000104 29839+ DC A(T541TEND-T541) // TLENGTH
003E50 0000157C 29840+ DC F'5500' // TLRCNT
003E54 00000032 29841+ DC F'50' // TIGCNT
003E58 00000001 29842+ DC F'1' // TLTYPE
001C51 29843+TEXT CSECT
001C51 E3F5F4F1 29844+SPTR2625 DC C'T541'
003E5C 29845+TDSCDAT CSECT
003E5C 29846+ DS 0F
003E5C 04001C51 29847+ DC AL1(L'SPTR2625),AL3(SPTR2625)
001C55 29848+TEXT CSECT
001C55 C1C440D96B94 29849+SPTR2626 DC C'AD R,m'
003E60 29850+TDSCDAT CSECT
003E60 29851+ DS 0F
003E60 06001C55 29852+ DC AL1(L'SPTR2626),AL3(SPTR2626)
29853+*
004CF4 29854+TDSCTBL CSECT
04CF4 29855+T541TPTR EQU *
004CF4 00003E48 29856+ DC A(T541TDSC) enabled test
29857+*
014E9C 29858+TCODE CSECT
014EA0 29859+ DS 0D ensure double word alignment for test
014EA0 29860+T541 DS 0H 01650000
014EA0 90EC D00C 0000C 29861+ STM 14,12,12(13) SAVE REGISTERS 02950000
014EA4 18CF 29862+ LR R12,R15 base register := entry address
14EA0 29863+ USING T541,R12 declare code base register
014EA6 41B0 C020 14EC0 29864+ LA R11,T541L load loop target to R11
014EAA 58F0 C100 14FA0 29865+ L R15,=A(SAVETST) R15 := current save area
014EAE 50DF 0004 00004 29866+ ST R13,4(R15) set back pointer in current save area
014EB2 182D 29867+ LR R2,R13 remember callers save area
014EB4 18DF 29868+ LR R13,R15 setup current save area
014EB6 50D2 0008 00008 29869+ ST R13,8(R2) set forw pointer in callers save area
PAGE 546
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00000 29870+ USING TDSC,R1 declare TDSC base register
014EBA 58F0 1008 00008 29871+ L R15,TLRCNT load local repeat count to R15
29872+*
29873 *
014EBE 2B00 29874 SDR FR0,FR0
29875 T541L REPINS AD,(FR0,=D'1.1') repeat: AD FR0,=D'1.1'
29876+*
29877+* build from sublist &ALIST a comma separated string &ARGS
29878+*
29879+*
29880+*
29881+*
29882+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
29883+* this allows to transfer the repeat count from last TDSCGEN call
29884+*
29885+*
14EC0 29886+T541L EQU *
29887+*
29888+* write a comment indicating what REPINS does (in case NOGEN in effect)
29889+*
29890+*,// REPINS: do 50 times:
29891+*
29892+* MNOTE requires that ' is doubled for expanded variables
29893+* thus build &MASTR as a copy of '&ARGS with ' doubled
29894+*
29895+*
29896+*,// AD FR0,=D'1.1'
29897+*
29898+* finally generate code: &ICNT copies of &CODE &ARGS
29899+*
014EC0 6A00 C0F8 14F98 29900+ AD FR0,=D'1.1'
014EC4 6A00 C0F8 14F98 29901+ AD FR0,=D'1.1'
014EC8 6A00 C0F8 14F98 29902+ AD FR0,=D'1.1'
014ECC 6A00 C0F8 14F98 29903+ AD FR0,=D'1.1'
014ED0 6A00 C0F8 14F98 29904+ AD FR0,=D'1.1'
014ED4 6A00 C0F8 14F98 29905+ AD FR0,=D'1.1'
014ED8 6A00 C0F8 14F98 29906+ AD FR0,=D'1.1'
014EDC 6A00 C0F8 14F98 29907+ AD FR0,=D'1.1'
014EE0 6A00 C0F8 14F98 29908+ AD FR0,=D'1.1'
014EE4 6A00 C0F8 14F98 29909+ AD FR0,=D'1.1'
014EE8 6A00 C0F8 14F98 29910+ AD FR0,=D'1.1'
014EEC 6A00 C0F8 14F98 29911+ AD FR0,=D'1.1'
014EF0 6A00 C0F8 14F98 29912+ AD FR0,=D'1.1'
014EF4 6A00 C0F8 14F98 29913+ AD FR0,=D'1.1'
014EF8 6A00 C0F8 14F98 29914+ AD FR0,=D'1.1'
014EFC 6A00 C0F8 14F98 29915+ AD FR0,=D'1.1'
014F00 6A00 C0F8 14F98 29916+ AD FR0,=D'1.1'
014F04 6A00 C0F8 14F98 29917+ AD FR0,=D'1.1'
014F08 6A00 C0F8 14F98 29918+ AD FR0,=D'1.1'
014F0C 6A00 C0F8 14F98 29919+ AD FR0,=D'1.1'
014F10 6A00 C0F8 14F98 29920+ AD FR0,=D'1.1'
014F14 6A00 C0F8 14F98 29921+ AD FR0,=D'1.1'
014F18 6A00 C0F8 14F98 29922+ AD FR0,=D'1.1'
014F1C 6A00 C0F8 14F98 29923+ AD FR0,=D'1.1'
014F20 6A00 C0F8 14F98 29924+ AD FR0,=D'1.1'
PAGE 547
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014F24 6A00 C0F8 14F98 29925+ AD FR0,=D'1.1'
014F28 6A00 C0F8 14F98 29926+ AD FR0,=D'1.1'
014F2C 6A00 C0F8 14F98 29927+ AD FR0,=D'1.1'
014F30 6A00 C0F8 14F98 29928+ AD FR0,=D'1.1'
014F34 6A00 C0F8 14F98 29929+ AD FR0,=D'1.1'
014F38 6A00 C0F8 14F98 29930+ AD FR0,=D'1.1'
014F3C 6A00 C0F8 14F98 29931+ AD FR0,=D'1.1'
014F40 6A00 C0F8 14F98 29932+ AD FR0,=D'1.1'
014F44 6A00 C0F8 14F98 29933+ AD FR0,=D'1.1'
014F48 6A00 C0F8 14F98 29934+ AD FR0,=D'1.1'
014F4C 6A00 C0F8 14F98 29935+ AD FR0,=D'1.1'
014F50 6A00 C0F8 14F98 29936+ AD FR0,=D'1.1'
014F54 6A00 C0F8 14F98 29937+ AD FR0,=D'1.1'
014F58 6A00 C0F8 14F98 29938+ AD FR0,=D'1.1'
014F5C 6A00 C0F8 14F98 29939+ AD FR0,=D'1.1'
014F60 6A00 C0F8 14F98 29940+ AD FR0,=D'1.1'
014F64 6A00 C0F8 14F98 29941+ AD FR0,=D'1.1'
014F68 6A00 C0F8 14F98 29942+ AD FR0,=D'1.1'
014F6C 6A00 C0F8 14F98 29943+ AD FR0,=D'1.1'
014F70 6A00 C0F8 14F98 29944+ AD FR0,=D'1.1'
014F74 6A00 C0F8 14F98 29945+ AD FR0,=D'1.1'
014F78 6A00 C0F8 14F98 29946+ AD FR0,=D'1.1'
014F7C 6A00 C0F8 14F98 29947+ AD FR0,=D'1.1'
014F80 6A00 C0F8 14F98 29948+ AD FR0,=D'1.1'
014F84 6A00 C0F8 14F98 29949+ AD FR0,=D'1.1'
29950+*
014F88 06FB 29951 BCTR R15,R11
29952 TSIMRET
014F8A 58F0 C100 14FA0 29953+ L R15,=A(SAVETST) R15 := current save area
014F8E 58DF 0004 00004 29954+ L R13,4(R15) get old save area back
014F92 98EC D00C 0000C 29955+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
014F96 07FE 29956+ BR 14 RETURN 02000000
29957 TSIMEND
014F98 29958+ LTORG
014F98 411199999999999A 29959 =D'1.1'
014FA0 00000458 29960 =A(SAVETST)
14FA4 29961+T541TEND EQU *
29962 *
29963 * Test 542 -- SDR R,R --------------------------------------
29964 *
29965 TSIMBEG T542,7000,50,1,C'SDR R,R'
29966+*
003E64 29967+TDSCDAT CSECT
003E68 29968+ DS 0D
29969+*
003E68 00014FA8 29970+T542TDSC DC A(T542) // TENTRY
003E6C 000000A4 29971+ DC A(T542TEND-T542) // TLENGTH
003E70 00001B58 29972+ DC F'7000' // TLRCNT
003E74 00000032 29973+ DC F'50' // TIGCNT
003E78 00000001 29974+ DC F'1' // TLTYPE
001C5B 29975+TEXT CSECT
001C5B E3F5F4F2 29976+SPTR2637 DC C'T542'
003E7C 29977+TDSCDAT CSECT
003E7C 29978+ DS 0F
003E7C 04001C5B 29979+ DC AL1(L'SPTR2637),AL3(SPTR2637)
PAGE 548
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001C5F 29980+TEXT CSECT
001C5F E2C4D940D96BD9 29981+SPTR2638 DC C'SDR R,R'
003E80 29982+TDSCDAT CSECT
003E80 29983+ DS 0F
003E80 07001C5F 29984+ DC AL1(L'SPTR2638),AL3(SPTR2638)
29985+*
004CF8 29986+TDSCTBL CSECT
04CF8 29987+T542TPTR EQU *
004CF8 00003E68 29988+ DC A(T542TDSC) enabled test
29989+*
014FA4 29990+TCODE CSECT
014FA8 29991+ DS 0D ensure double word alignment for test
014FA8 29992+T542 DS 0H 01650000
014FA8 90EC D00C 0000C 29993+ STM 14,12,12(13) SAVE REGISTERS 02950000
014FAC 18CF 29994+ LR R12,R15 base register := entry address
14FA8 29995+ USING T542,R12 declare code base register
014FAE 41B0 C024 14FCC 29996+ LA R11,T542L load loop target to R11
014FB2 58F0 C0A0 15048 29997+ L R15,=A(SAVETST) R15 := current save area
014FB6 50DF 0004 00004 29998+ ST R13,4(R15) set back pointer in current save area
014FBA 182D 29999+ LR R2,R13 remember callers save area
014FBC 18DF 30000+ LR R13,R15 setup current save area
014FBE 50D2 0008 00008 30001+ ST R13,8(R2) set forw pointer in callers save area
00000 30002+ USING TDSC,R1 declare TDSC base register
014FC2 58F0 1008 00008 30003+ L R15,TLRCNT load local repeat count to R15
30004+*
30005 *
014FC6 2B00 30006 SDR FR0,FR0
014FC8 6820 C098 15040 30007 LD FR2,=D'1.1'
30008 T542L REPINS SDR,(FR0,FR2) repeat: SDR FR0,FR2
30009+*
30010+* build from sublist &ALIST a comma separated string &ARGS
30011+*
30012+*
30013+*
30014+*
30015+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
30016+* this allows to transfer the repeat count from last TDSCGEN call
30017+*
30018+*
14FCC 30019+T542L EQU *
30020+*
30021+* write a comment indicating what REPINS does (in case NOGEN in effect)
30022+*
30023+*,// REPINS: do 50 times:
30024+*
30025+* MNOTE requires that ' is doubled for expanded variables
30026+* thus build &MASTR as a copy of '&ARGS with ' doubled
30027+*
30028+*
30029+*,// SDR FR0,FR2
30030+*
30031+* finally generate code: &ICNT copies of &CODE &ARGS
30032+*
014FCC 2B02 30033+ SDR FR0,FR2
014FCE 2B02 30034+ SDR FR0,FR2
PAGE 549
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
014FD0 2B02 30035+ SDR FR0,FR2
014FD2 2B02 30036+ SDR FR0,FR2
014FD4 2B02 30037+ SDR FR0,FR2
014FD6 2B02 30038+ SDR FR0,FR2
014FD8 2B02 30039+ SDR FR0,FR2
014FDA 2B02 30040+ SDR FR0,FR2
014FDC 2B02 30041+ SDR FR0,FR2
014FDE 2B02 30042+ SDR FR0,FR2
014FE0 2B02 30043+ SDR FR0,FR2
014FE2 2B02 30044+ SDR FR0,FR2
014FE4 2B02 30045+ SDR FR0,FR2
014FE6 2B02 30046+ SDR FR0,FR2
014FE8 2B02 30047+ SDR FR0,FR2
014FEA 2B02 30048+ SDR FR0,FR2
014FEC 2B02 30049+ SDR FR0,FR2
014FEE 2B02 30050+ SDR FR0,FR2
014FF0 2B02 30051+ SDR FR0,FR2
014FF2 2B02 30052+ SDR FR0,FR2
014FF4 2B02 30053+ SDR FR0,FR2
014FF6 2B02 30054+ SDR FR0,FR2
014FF8 2B02 30055+ SDR FR0,FR2
014FFA 2B02 30056+ SDR FR0,FR2
014FFC 2B02 30057+ SDR FR0,FR2
014FFE 2B02 30058+ SDR FR0,FR2
015000 2B02 30059+ SDR FR0,FR2
015002 2B02 30060+ SDR FR0,FR2
015004 2B02 30061+ SDR FR0,FR2
015006 2B02 30062+ SDR FR0,FR2
015008 2B02 30063+ SDR FR0,FR2
01500A 2B02 30064+ SDR FR0,FR2
01500C 2B02 30065+ SDR FR0,FR2
01500E 2B02 30066+ SDR FR0,FR2
015010 2B02 30067+ SDR FR0,FR2
015012 2B02 30068+ SDR FR0,FR2
015014 2B02 30069+ SDR FR0,FR2
015016 2B02 30070+ SDR FR0,FR2
015018 2B02 30071+ SDR FR0,FR2
01501A 2B02 30072+ SDR FR0,FR2
01501C 2B02 30073+ SDR FR0,FR2
01501E 2B02 30074+ SDR FR0,FR2
015020 2B02 30075+ SDR FR0,FR2
015022 2B02 30076+ SDR FR0,FR2
015024 2B02 30077+ SDR FR0,FR2
015026 2B02 30078+ SDR FR0,FR2
015028 2B02 30079+ SDR FR0,FR2
01502A 2B02 30080+ SDR FR0,FR2
01502C 2B02 30081+ SDR FR0,FR2
01502E 2B02 30082+ SDR FR0,FR2
30083+*
015030 06FB 30084 BCTR R15,R11
30085 TSIMRET
015032 58F0 C0A0 15048 30086+ L R15,=A(SAVETST) R15 := current save area
015036 58DF 0004 00004 30087+ L R13,4(R15) get old save area back
01503A 98EC D00C 0000C 30088+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01503E 07FE 30089+ BR 14 RETURN 02000000
PAGE 550
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
30090 TSIMEND
015040 30091+ LTORG
015040 411199999999999A 30092 =D'1.1'
015048 00000458 30093 =A(SAVETST)
1504C 30094+T542TEND EQU *
30095 *
30096 * Test 543 -- SD R,m ---------------------------------------
30097 *
30098 TSIMBEG T543,5500,50,1,C'SD R,m'
30099+*
003E84 30100+TDSCDAT CSECT
003E88 30101+ DS 0D
30102+*
003E88 00015050 30103+T543TDSC DC A(T543) // TENTRY
003E8C 00000104 30104+ DC A(T543TEND-T543) // TLENGTH
003E90 0000157C 30105+ DC F'5500' // TLRCNT
003E94 00000032 30106+ DC F'50' // TIGCNT
003E98 00000001 30107+ DC F'1' // TLTYPE
001C66 30108+TEXT CSECT
001C66 E3F5F4F3 30109+SPTR2649 DC C'T543'
003E9C 30110+TDSCDAT CSECT
003E9C 30111+ DS 0F
003E9C 04001C66 30112+ DC AL1(L'SPTR2649),AL3(SPTR2649)
001C6A 30113+TEXT CSECT
001C6A E2C440D96B94 30114+SPTR2650 DC C'SD R,m'
003EA0 30115+TDSCDAT CSECT
003EA0 30116+ DS 0F
003EA0 06001C6A 30117+ DC AL1(L'SPTR2650),AL3(SPTR2650)
30118+*
004CFC 30119+TDSCTBL CSECT
04CFC 30120+T543TPTR EQU *
004CFC 00003E88 30121+ DC A(T543TDSC) enabled test
30122+*
01504C 30123+TCODE CSECT
015050 30124+ DS 0D ensure double word alignment for test
015050 30125+T543 DS 0H 01650000
015050 90EC D00C 0000C 30126+ STM 14,12,12(13) SAVE REGISTERS 02950000
015054 18CF 30127+ LR R12,R15 base register := entry address
15050 30128+ USING T543,R12 declare code base register
015056 41B0 C020 15070 30129+ LA R11,T543L load loop target to R11
01505A 58F0 C100 15150 30130+ L R15,=A(SAVETST) R15 := current save area
01505E 50DF 0004 00004 30131+ ST R13,4(R15) set back pointer in current save area
015062 182D 30132+ LR R2,R13 remember callers save area
015064 18DF 30133+ LR R13,R15 setup current save area
015066 50D2 0008 00008 30134+ ST R13,8(R2) set forw pointer in callers save area
00000 30135+ USING TDSC,R1 declare TDSC base register
01506A 58F0 1008 00008 30136+ L R15,TLRCNT load local repeat count to R15
30137+*
30138 *
01506E 2B00 30139 SDR FR0,FR0
30140 T543L REPINS SD,(FR0,=D'1.1') repeat: SD FR0,=D'1.1'
30141+*
30142+* build from sublist &ALIST a comma separated string &ARGS
30143+*
30144+*
PAGE 551
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
30145+*
30146+*
30147+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
30148+* this allows to transfer the repeat count from last TDSCGEN call
30149+*
30150+*
15070 30151+T543L EQU *
30152+*
30153+* write a comment indicating what REPINS does (in case NOGEN in effect)
30154+*
30155+*,// REPINS: do 50 times:
30156+*
30157+* MNOTE requires that ' is doubled for expanded variables
30158+* thus build &MASTR as a copy of '&ARGS with ' doubled
30159+*
30160+*
30161+*,// SD FR0,=D'1.1'
30162+*
30163+* finally generate code: &ICNT copies of &CODE &ARGS
30164+*
015070 6B00 C0F8 15148 30165+ SD FR0,=D'1.1'
015074 6B00 C0F8 15148 30166+ SD FR0,=D'1.1'
015078 6B00 C0F8 15148 30167+ SD FR0,=D'1.1'
01507C 6B00 C0F8 15148 30168+ SD FR0,=D'1.1'
015080 6B00 C0F8 15148 30169+ SD FR0,=D'1.1'
015084 6B00 C0F8 15148 30170+ SD FR0,=D'1.1'
015088 6B00 C0F8 15148 30171+ SD FR0,=D'1.1'
01508C 6B00 C0F8 15148 30172+ SD FR0,=D'1.1'
015090 6B00 C0F8 15148 30173+ SD FR0,=D'1.1'
015094 6B00 C0F8 15148 30174+ SD FR0,=D'1.1'
015098 6B00 C0F8 15148 30175+ SD FR0,=D'1.1'
01509C 6B00 C0F8 15148 30176+ SD FR0,=D'1.1'
0150A0 6B00 C0F8 15148 30177+ SD FR0,=D'1.1'
0150A4 6B00 C0F8 15148 30178+ SD FR0,=D'1.1'
0150A8 6B00 C0F8 15148 30179+ SD FR0,=D'1.1'
0150AC 6B00 C0F8 15148 30180+ SD FR0,=D'1.1'
0150B0 6B00 C0F8 15148 30181+ SD FR0,=D'1.1'
0150B4 6B00 C0F8 15148 30182+ SD FR0,=D'1.1'
0150B8 6B00 C0F8 15148 30183+ SD FR0,=D'1.1'
0150BC 6B00 C0F8 15148 30184+ SD FR0,=D'1.1'
0150C0 6B00 C0F8 15148 30185+ SD FR0,=D'1.1'
0150C4 6B00 C0F8 15148 30186+ SD FR0,=D'1.1'
0150C8 6B00 C0F8 15148 30187+ SD FR0,=D'1.1'
0150CC 6B00 C0F8 15148 30188+ SD FR0,=D'1.1'
0150D0 6B00 C0F8 15148 30189+ SD FR0,=D'1.1'
0150D4 6B00 C0F8 15148 30190+ SD FR0,=D'1.1'
0150D8 6B00 C0F8 15148 30191+ SD FR0,=D'1.1'
0150DC 6B00 C0F8 15148 30192+ SD FR0,=D'1.1'
0150E0 6B00 C0F8 15148 30193+ SD FR0,=D'1.1'
0150E4 6B00 C0F8 15148 30194+ SD FR0,=D'1.1'
0150E8 6B00 C0F8 15148 30195+ SD FR0,=D'1.1'
0150EC 6B00 C0F8 15148 30196+ SD FR0,=D'1.1'
0150F0 6B00 C0F8 15148 30197+ SD FR0,=D'1.1'
0150F4 6B00 C0F8 15148 30198+ SD FR0,=D'1.1'
0150F8 6B00 C0F8 15148 30199+ SD FR0,=D'1.1'
PAGE 552
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0150FC 6B00 C0F8 15148 30200+ SD FR0,=D'1.1'
015100 6B00 C0F8 15148 30201+ SD FR0,=D'1.1'
015104 6B00 C0F8 15148 30202+ SD FR0,=D'1.1'
015108 6B00 C0F8 15148 30203+ SD FR0,=D'1.1'
01510C 6B00 C0F8 15148 30204+ SD FR0,=D'1.1'
015110 6B00 C0F8 15148 30205+ SD FR0,=D'1.1'
015114 6B00 C0F8 15148 30206+ SD FR0,=D'1.1'
015118 6B00 C0F8 15148 30207+ SD FR0,=D'1.1'
01511C 6B00 C0F8 15148 30208+ SD FR0,=D'1.1'
015120 6B00 C0F8 15148 30209+ SD FR0,=D'1.1'
015124 6B00 C0F8 15148 30210+ SD FR0,=D'1.1'
015128 6B00 C0F8 15148 30211+ SD FR0,=D'1.1'
01512C 6B00 C0F8 15148 30212+ SD FR0,=D'1.1'
015130 6B00 C0F8 15148 30213+ SD FR0,=D'1.1'
015134 6B00 C0F8 15148 30214+ SD FR0,=D'1.1'
30215+*
015138 06FB 30216 BCTR R15,R11
30217 TSIMRET
01513A 58F0 C100 15150 30218+ L R15,=A(SAVETST) R15 := current save area
01513E 58DF 0004 00004 30219+ L R13,4(R15) get old save area back
015142 98EC D00C 0000C 30220+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
015146 07FE 30221+ BR 14 RETURN 02000000
30222 TSIMEND
015148 30223+ LTORG
015148 411199999999999A 30224 =D'1.1'
015150 00000458 30225 =A(SAVETST)
15154 30226+T543TEND EQU *
30227 *
30228 * Test 544 -- MDR R,R --------------------------------------
30229 *
30230 TSIMBEG T544,6000,50,10,C'MDR R,R'
30231+*
003EA4 30232+TDSCDAT CSECT
003EA8 30233+ DS 0D
30234+*
003EA8 00015158 30235+T544TDSC DC A(T544) // TENTRY
003EAC 000000B4 30236+ DC A(T544TEND-T544) // TLENGTH
003EB0 00001770 30237+ DC F'6000' // TLRCNT
003EB4 00000032 30238+ DC F'50' // TIGCNT
003EB8 0000000A 30239+ DC F'10' // TLTYPE
001C70 30240+TEXT CSECT
001C70 E3F5F4F4 30241+SPTR2661 DC C'T544'
003EBC 30242+TDSCDAT CSECT
003EBC 30243+ DS 0F
003EBC 04001C70 30244+ DC AL1(L'SPTR2661),AL3(SPTR2661)
001C74 30245+TEXT CSECT
001C74 D4C4D940D96BD9 30246+SPTR2662 DC C'MDR R,R'
003EC0 30247+TDSCDAT CSECT
003EC0 30248+ DS 0F
003EC0 07001C74 30249+ DC AL1(L'SPTR2662),AL3(SPTR2662)
30250+*
004D00 30251+TDSCTBL CSECT
04D00 30252+T544TPTR EQU *
004D00 00003EA8 30253+ DC A(T544TDSC) enabled test
30254+*
PAGE 553
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015154 30255+TCODE CSECT
015158 30256+ DS 0D ensure double word alignment for test
015158 30257+T544 DS 0H 01650000
015158 90EC D00C 0000C 30258+ STM 14,12,12(13) SAVE REGISTERS 02950000
01515C 18CF 30259+ LR R12,R15 base register := entry address
15158 30260+ USING T544,R12 declare code base register
01515E 41B0 C022 1517A 30261+ LA R11,T544L load loop target to R11
015162 58F0 C0B0 15208 30262+ L R15,=A(SAVETST) R15 := current save area
015166 50DF 0004 00004 30263+ ST R13,4(R15) set back pointer in current save area
01516A 182D 30264+ LR R2,R13 remember callers save area
01516C 18DF 30265+ LR R13,R15 setup current save area
01516E 50D2 0008 00008 30266+ ST R13,8(R2) set forw pointer in callers save area
00000 30267+ USING TDSC,R1 declare TDSC base register
015172 58F0 1008 00008 30268+ L R15,TLRCNT load local repeat count to R15
30269+*
30270 * inner loop logic:
30271 * load FR0 with 1.0
30272 * multiply 50 times by 1.1
30273 *
015176 6820 C0A0 151F8 30274 LD FR2,=D'1.1'
01517A 6800 C0A8 15200 30275 T544L LD FR0,=D'1.0'
30276 REPINS MDR,(FR0,FR2) repeat: MDR FR0,FR2
30277+*
30278+* build from sublist &ALIST a comma separated string &ARGS
30279+*
30280+*
30281+*
30282+*
30283+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
30284+* this allows to transfer the repeat count from last TDSCGEN call
30285+*
30286+*
30287+*
30288+* write a comment indicating what REPINS does (in case NOGEN in effect)
30289+*
30290+*,// REPINS: do 50 times:
30291+*
30292+* MNOTE requires that ' is doubled for expanded variables
30293+* thus build &MASTR as a copy of '&ARGS with ' doubled
30294+*
30295+*
30296+*,// MDR FR0,FR2
30297+*
30298+* finally generate code: &ICNT copies of &CODE &ARGS
30299+*
01517E 2C02 30300+ MDR FR0,FR2
015180 2C02 30301+ MDR FR0,FR2
015182 2C02 30302+ MDR FR0,FR2
015184 2C02 30303+ MDR FR0,FR2
015186 2C02 30304+ MDR FR0,FR2
015188 2C02 30305+ MDR FR0,FR2
01518A 2C02 30306+ MDR FR0,FR2
01518C 2C02 30307+ MDR FR0,FR2
01518E 2C02 30308+ MDR FR0,FR2
015190 2C02 30309+ MDR FR0,FR2
PAGE 554
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015192 2C02 30310+ MDR FR0,FR2
015194 2C02 30311+ MDR FR0,FR2
015196 2C02 30312+ MDR FR0,FR2
015198 2C02 30313+ MDR FR0,FR2
01519A 2C02 30314+ MDR FR0,FR2
01519C 2C02 30315+ MDR FR0,FR2
01519E 2C02 30316+ MDR FR0,FR2
0151A0 2C02 30317+ MDR FR0,FR2
0151A2 2C02 30318+ MDR FR0,FR2
0151A4 2C02 30319+ MDR FR0,FR2
0151A6 2C02 30320+ MDR FR0,FR2
0151A8 2C02 30321+ MDR FR0,FR2
0151AA 2C02 30322+ MDR FR0,FR2
0151AC 2C02 30323+ MDR FR0,FR2
0151AE 2C02 30324+ MDR FR0,FR2
0151B0 2C02 30325+ MDR FR0,FR2
0151B2 2C02 30326+ MDR FR0,FR2
0151B4 2C02 30327+ MDR FR0,FR2
0151B6 2C02 30328+ MDR FR0,FR2
0151B8 2C02 30329+ MDR FR0,FR2
0151BA 2C02 30330+ MDR FR0,FR2
0151BC 2C02 30331+ MDR FR0,FR2
0151BE 2C02 30332+ MDR FR0,FR2
0151C0 2C02 30333+ MDR FR0,FR2
0151C2 2C02 30334+ MDR FR0,FR2
0151C4 2C02 30335+ MDR FR0,FR2
0151C6 2C02 30336+ MDR FR0,FR2
0151C8 2C02 30337+ MDR FR0,FR2
0151CA 2C02 30338+ MDR FR0,FR2
0151CC 2C02 30339+ MDR FR0,FR2
0151CE 2C02 30340+ MDR FR0,FR2
0151D0 2C02 30341+ MDR FR0,FR2
0151D2 2C02 30342+ MDR FR0,FR2
0151D4 2C02 30343+ MDR FR0,FR2
0151D6 2C02 30344+ MDR FR0,FR2
0151D8 2C02 30345+ MDR FR0,FR2
0151DA 2C02 30346+ MDR FR0,FR2
0151DC 2C02 30347+ MDR FR0,FR2
0151DE 2C02 30348+ MDR FR0,FR2
0151E0 2C02 30349+ MDR FR0,FR2
30350+*
0151E2 06FB 30351 BCTR R15,R11
30352 TSIMRET
0151E4 58F0 C0B0 15208 30353+ L R15,=A(SAVETST) R15 := current save area
0151E8 58DF 0004 00004 30354+ L R13,4(R15) get old save area back
0151EC 98EC D00C 0000C 30355+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0151F0 07FE 30356+ BR 14 RETURN 02000000
30357 TSIMEND
0151F8 30358+ LTORG
0151F8 411199999999999A 30359 =D'1.1'
015200 4110000000000000 30360 =D'1.0'
015208 00000458 30361 =A(SAVETST)
1520C 30362+T544TEND EQU *
30363 *
30364 * Test 545 -- MD R,m ---------------------------------------
PAGE 555
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
30365 *
30366 TSIMBEG T545,4500,50,10,C'MD R,m'
30367+*
003EC4 30368+TDSCDAT CSECT
003EC8 30369+ DS 0D
30370+*
003EC8 00015210 30371+T545TDSC DC A(T545) // TENTRY
003ECC 00000114 30372+ DC A(T545TEND-T545) // TLENGTH
003ED0 00001194 30373+ DC F'4500' // TLRCNT
003ED4 00000032 30374+ DC F'50' // TIGCNT
003ED8 0000000A 30375+ DC F'10' // TLTYPE
001C7B 30376+TEXT CSECT
001C7B E3F5F4F5 30377+SPTR2673 DC C'T545'
003EDC 30378+TDSCDAT CSECT
003EDC 30379+ DS 0F
003EDC 04001C7B 30380+ DC AL1(L'SPTR2673),AL3(SPTR2673)
001C7F 30381+TEXT CSECT
001C7F D4C440D96B94 30382+SPTR2674 DC C'MD R,m'
003EE0 30383+TDSCDAT CSECT
003EE0 30384+ DS 0F
003EE0 06001C7F 30385+ DC AL1(L'SPTR2674),AL3(SPTR2674)
30386+*
004D04 30387+TDSCTBL CSECT
04D04 30388+T545TPTR EQU *
004D04 00003EC8 30389+ DC A(T545TDSC) enabled test
30390+*
01520C 30391+TCODE CSECT
015210 30392+ DS 0D ensure double word alignment for test
015210 30393+T545 DS 0H 01650000
015210 90EC D00C 0000C 30394+ STM 14,12,12(13) SAVE REGISTERS 02950000
015214 18CF 30395+ LR R12,R15 base register := entry address
15210 30396+ USING T545,R12 declare code base register
015216 41B0 C01E 1522E 30397+ LA R11,T545L load loop target to R11
01521A 58F0 C110 15320 30398+ L R15,=A(SAVETST) R15 := current save area
01521E 50DF 0004 00004 30399+ ST R13,4(R15) set back pointer in current save area
015222 182D 30400+ LR R2,R13 remember callers save area
015224 18DF 30401+ LR R13,R15 setup current save area
015226 50D2 0008 00008 30402+ ST R13,8(R2) set forw pointer in callers save area
00000 30403+ USING TDSC,R1 declare TDSC base register
01522A 58F0 1008 00008 30404+ L R15,TLRCNT load local repeat count to R15
30405+*
30406 * inner loop logic:
30407 * load FR0 with 1.0
30408 * multiply 50 times by 1.1
30409 *
01522E 6800 C100 15310 30410 T545L LD FR0,=D'1.0'
30411 REPINS MD,(FR0,=D'1.1') repeat: MD FR0,=D'1.1'
30412+*
30413+* build from sublist &ALIST a comma separated string &ARGS
30414+*
30415+*
30416+*
30417+*
30418+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
30419+* this allows to transfer the repeat count from last TDSCGEN call
PAGE 556
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
30420+*
30421+*
30422+*
30423+* write a comment indicating what REPINS does (in case NOGEN in effect)
30424+*
30425+*,// REPINS: do 50 times:
30426+*
30427+* MNOTE requires that ' is doubled for expanded variables
30428+* thus build &MASTR as a copy of '&ARGS with ' doubled
30429+*
30430+*
30431+*,// MD FR0,=D'1.1'
30432+*
30433+* finally generate code: &ICNT copies of &CODE &ARGS
30434+*
015232 6C00 C108 15318 30435+ MD FR0,=D'1.1'
015236 6C00 C108 15318 30436+ MD FR0,=D'1.1'
01523A 6C00 C108 15318 30437+ MD FR0,=D'1.1'
01523E 6C00 C108 15318 30438+ MD FR0,=D'1.1'
015242 6C00 C108 15318 30439+ MD FR0,=D'1.1'
015246 6C00 C108 15318 30440+ MD FR0,=D'1.1'
01524A 6C00 C108 15318 30441+ MD FR0,=D'1.1'
01524E 6C00 C108 15318 30442+ MD FR0,=D'1.1'
015252 6C00 C108 15318 30443+ MD FR0,=D'1.1'
015256 6C00 C108 15318 30444+ MD FR0,=D'1.1'
01525A 6C00 C108 15318 30445+ MD FR0,=D'1.1'
01525E 6C00 C108 15318 30446+ MD FR0,=D'1.1'
015262 6C00 C108 15318 30447+ MD FR0,=D'1.1'
015266 6C00 C108 15318 30448+ MD FR0,=D'1.1'
01526A 6C00 C108 15318 30449+ MD FR0,=D'1.1'
01526E 6C00 C108 15318 30450+ MD FR0,=D'1.1'
015272 6C00 C108 15318 30451+ MD FR0,=D'1.1'
015276 6C00 C108 15318 30452+ MD FR0,=D'1.1'
01527A 6C00 C108 15318 30453+ MD FR0,=D'1.1'
01527E 6C00 C108 15318 30454+ MD FR0,=D'1.1'
015282 6C00 C108 15318 30455+ MD FR0,=D'1.1'
015286 6C00 C108 15318 30456+ MD FR0,=D'1.1'
01528A 6C00 C108 15318 30457+ MD FR0,=D'1.1'
01528E 6C00 C108 15318 30458+ MD FR0,=D'1.1'
015292 6C00 C108 15318 30459+ MD FR0,=D'1.1'
015296 6C00 C108 15318 30460+ MD FR0,=D'1.1'
01529A 6C00 C108 15318 30461+ MD FR0,=D'1.1'
01529E 6C00 C108 15318 30462+ MD FR0,=D'1.1'
0152A2 6C00 C108 15318 30463+ MD FR0,=D'1.1'
0152A6 6C00 C108 15318 30464+ MD FR0,=D'1.1'
0152AA 6C00 C108 15318 30465+ MD FR0,=D'1.1'
0152AE 6C00 C108 15318 30466+ MD FR0,=D'1.1'
0152B2 6C00 C108 15318 30467+ MD FR0,=D'1.1'
0152B6 6C00 C108 15318 30468+ MD FR0,=D'1.1'
0152BA 6C00 C108 15318 30469+ MD FR0,=D'1.1'
0152BE 6C00 C108 15318 30470+ MD FR0,=D'1.1'
0152C2 6C00 C108 15318 30471+ MD FR0,=D'1.1'
0152C6 6C00 C108 15318 30472+ MD FR0,=D'1.1'
0152CA 6C00 C108 15318 30473+ MD FR0,=D'1.1'
0152CE 6C00 C108 15318 30474+ MD FR0,=D'1.1'
PAGE 557
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0152D2 6C00 C108 15318 30475+ MD FR0,=D'1.1'
0152D6 6C00 C108 15318 30476+ MD FR0,=D'1.1'
0152DA 6C00 C108 15318 30477+ MD FR0,=D'1.1'
0152DE 6C00 C108 15318 30478+ MD FR0,=D'1.1'
0152E2 6C00 C108 15318 30479+ MD FR0,=D'1.1'
0152E6 6C00 C108 15318 30480+ MD FR0,=D'1.1'
0152EA 6C00 C108 15318 30481+ MD FR0,=D'1.1'
0152EE 6C00 C108 15318 30482+ MD FR0,=D'1.1'
0152F2 6C00 C108 15318 30483+ MD FR0,=D'1.1'
0152F6 6C00 C108 15318 30484+ MD FR0,=D'1.1'
30485+*
0152FA 06FB 30486 BCTR R15,R11
30487 TSIMRET
0152FC 58F0 C110 15320 30488+ L R15,=A(SAVETST) R15 := current save area
015300 58DF 0004 00004 30489+ L R13,4(R15) get old save area back
015304 98EC D00C 0000C 30490+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
015308 07FE 30491+ BR 14 RETURN 02000000
30492 TSIMEND
015310 30493+ LTORG
015310 4110000000000000 30494 =D'1.0'
015318 411199999999999A 30495 =D'1.1'
015320 00000458 30496 =A(SAVETST)
15324 30497+T545TEND EQU *
30498 *
30499 * Test 546 -- DDR R,R --------------------------------------
30500 *
30501 TSIMBEG T546,700,50,10,C'DDR R,R'
30502+*
003EE4 30503+TDSCDAT CSECT
003EE8 30504+ DS 0D
30505+*
003EE8 00015328 30506+T546TDSC DC A(T546) // TENTRY
003EEC 000000B4 30507+ DC A(T546TEND-T546) // TLENGTH
003EF0 000002BC 30508+ DC F'700' // TLRCNT
003EF4 00000032 30509+ DC F'50' // TIGCNT
003EF8 0000000A 30510+ DC F'10' // TLTYPE
001C85 30511+TEXT CSECT
001C85 E3F5F4F6 30512+SPTR2685 DC C'T546'
003EFC 30513+TDSCDAT CSECT
003EFC 30514+ DS 0F
003EFC 04001C85 30515+ DC AL1(L'SPTR2685),AL3(SPTR2685)
001C89 30516+TEXT CSECT
001C89 C4C4D940D96BD9 30517+SPTR2686 DC C'DDR R,R'
003F00 30518+TDSCDAT CSECT
003F00 30519+ DS 0F
003F00 07001C89 30520+ DC AL1(L'SPTR2686),AL3(SPTR2686)
30521+*
004D08 30522+TDSCTBL CSECT
04D08 30523+T546TPTR EQU *
004D08 00003EE8 30524+ DC A(T546TDSC) enabled test
30525+*
015324 30526+TCODE CSECT
015328 30527+ DS 0D ensure double word alignment for test
015328 30528+T546 DS 0H 01650000
015328 90EC D00C 0000C 30529+ STM 14,12,12(13) SAVE REGISTERS 02950000
PAGE 558
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01532C 18CF 30530+ LR R12,R15 base register := entry address
15328 30531+ USING T546,R12 declare code base register
01532E 41B0 C022 1534A 30532+ LA R11,T546L load loop target to R11
015332 58F0 C0B0 153D8 30533+ L R15,=A(SAVETST) R15 := current save area
015336 50DF 0004 00004 30534+ ST R13,4(R15) set back pointer in current save area
01533A 182D 30535+ LR R2,R13 remember callers save area
01533C 18DF 30536+ LR R13,R15 setup current save area
01533E 50D2 0008 00008 30537+ ST R13,8(R2) set forw pointer in callers save area
00000 30538+ USING TDSC,R1 declare TDSC base register
015342 58F0 1008 00008 30539+ L R15,TLRCNT load local repeat count to R15
30540+*
30541 * inner loop logic:
30542 * load FR0 with 1.0
30543 * divide 50 times by 1.1
30544 *
015346 6820 C0A0 153C8 30545 LD FR2,=D'1.1'
01534A 6800 C0A8 153D0 30546 T546L LD FR0,=D'1.0'
30547 REPINS DDR,(FR0,FR2) repeat: DDR FR0,FR2
30548+*
30549+* build from sublist &ALIST a comma separated string &ARGS
30550+*
30551+*
30552+*
30553+*
30554+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
30555+* this allows to transfer the repeat count from last TDSCGEN call
30556+*
30557+*
30558+*
30559+* write a comment indicating what REPINS does (in case NOGEN in effect)
30560+*
30561+*,// REPINS: do 50 times:
30562+*
30563+* MNOTE requires that ' is doubled for expanded variables
30564+* thus build &MASTR as a copy of '&ARGS with ' doubled
30565+*
30566+*
30567+*,// DDR FR0,FR2
30568+*
30569+* finally generate code: &ICNT copies of &CODE &ARGS
30570+*
01534E 2D02 30571+ DDR FR0,FR2
015350 2D02 30572+ DDR FR0,FR2
015352 2D02 30573+ DDR FR0,FR2
015354 2D02 30574+ DDR FR0,FR2
015356 2D02 30575+ DDR FR0,FR2
015358 2D02 30576+ DDR FR0,FR2
01535A 2D02 30577+ DDR FR0,FR2
01535C 2D02 30578+ DDR FR0,FR2
01535E 2D02 30579+ DDR FR0,FR2
015360 2D02 30580+ DDR FR0,FR2
015362 2D02 30581+ DDR FR0,FR2
015364 2D02 30582+ DDR FR0,FR2
015366 2D02 30583+ DDR FR0,FR2
015368 2D02 30584+ DDR FR0,FR2
PAGE 559
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01536A 2D02 30585+ DDR FR0,FR2
01536C 2D02 30586+ DDR FR0,FR2
01536E 2D02 30587+ DDR FR0,FR2
015370 2D02 30588+ DDR FR0,FR2
015372 2D02 30589+ DDR FR0,FR2
015374 2D02 30590+ DDR FR0,FR2
015376 2D02 30591+ DDR FR0,FR2
015378 2D02 30592+ DDR FR0,FR2
01537A 2D02 30593+ DDR FR0,FR2
01537C 2D02 30594+ DDR FR0,FR2
01537E 2D02 30595+ DDR FR0,FR2
015380 2D02 30596+ DDR FR0,FR2
015382 2D02 30597+ DDR FR0,FR2
015384 2D02 30598+ DDR FR0,FR2
015386 2D02 30599+ DDR FR0,FR2
015388 2D02 30600+ DDR FR0,FR2
01538A 2D02 30601+ DDR FR0,FR2
01538C 2D02 30602+ DDR FR0,FR2
01538E 2D02 30603+ DDR FR0,FR2
015390 2D02 30604+ DDR FR0,FR2
015392 2D02 30605+ DDR FR0,FR2
015394 2D02 30606+ DDR FR0,FR2
015396 2D02 30607+ DDR FR0,FR2
015398 2D02 30608+ DDR FR0,FR2
01539A 2D02 30609+ DDR FR0,FR2
01539C 2D02 30610+ DDR FR0,FR2
01539E 2D02 30611+ DDR FR0,FR2
0153A0 2D02 30612+ DDR FR0,FR2
0153A2 2D02 30613+ DDR FR0,FR2
0153A4 2D02 30614+ DDR FR0,FR2
0153A6 2D02 30615+ DDR FR0,FR2
0153A8 2D02 30616+ DDR FR0,FR2
0153AA 2D02 30617+ DDR FR0,FR2
0153AC 2D02 30618+ DDR FR0,FR2
0153AE 2D02 30619+ DDR FR0,FR2
0153B0 2D02 30620+ DDR FR0,FR2
30621+*
0153B2 06FB 30622 BCTR R15,R11
30623 TSIMRET
0153B4 58F0 C0B0 153D8 30624+ L R15,=A(SAVETST) R15 := current save area
0153B8 58DF 0004 00004 30625+ L R13,4(R15) get old save area back
0153BC 98EC D00C 0000C 30626+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0153C0 07FE 30627+ BR 14 RETURN 02000000
30628 TSIMEND
0153C8 30629+ LTORG
0153C8 411199999999999A 30630 =D'1.1'
0153D0 4110000000000000 30631 =D'1.0'
0153D8 00000458 30632 =A(SAVETST)
153DC 30633+T546TEND EQU *
30634 *
30635 * Test 547 -- DD R,m ---------------------------------------
30636 *
30637 TSIMBEG T547,700,50,10,C'DD R,m'
30638+*
003F04 30639+TDSCDAT CSECT
PAGE 560
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003F08 30640+ DS 0D
30641+*
003F08 000153E0 30642+T547TDSC DC A(T547) // TENTRY
003F0C 00000114 30643+ DC A(T547TEND-T547) // TLENGTH
003F10 000002BC 30644+ DC F'700' // TLRCNT
003F14 00000032 30645+ DC F'50' // TIGCNT
003F18 0000000A 30646+ DC F'10' // TLTYPE
001C90 30647+TEXT CSECT
001C90 E3F5F4F7 30648+SPTR2697 DC C'T547'
003F1C 30649+TDSCDAT CSECT
003F1C 30650+ DS 0F
003F1C 04001C90 30651+ DC AL1(L'SPTR2697),AL3(SPTR2697)
001C94 30652+TEXT CSECT
001C94 C4C440D96B94 30653+SPTR2698 DC C'DD R,m'
003F20 30654+TDSCDAT CSECT
003F20 30655+ DS 0F
003F20 06001C94 30656+ DC AL1(L'SPTR2698),AL3(SPTR2698)
30657+*
004D0C 30658+TDSCTBL CSECT
04D0C 30659+T547TPTR EQU *
004D0C 00003F08 30660+ DC A(T547TDSC) enabled test
30661+*
0153DC 30662+TCODE CSECT
0153E0 30663+ DS 0D ensure double word alignment for test
0153E0 30664+T547 DS 0H 01650000
0153E0 90EC D00C 0000C 30665+ STM 14,12,12(13) SAVE REGISTERS 02950000
0153E4 18CF 30666+ LR R12,R15 base register := entry address
153E0 30667+ USING T547,R12 declare code base register
0153E6 41B0 C01E 153FE 30668+ LA R11,T547L load loop target to R11
0153EA 58F0 C110 154F0 30669+ L R15,=A(SAVETST) R15 := current save area
0153EE 50DF 0004 00004 30670+ ST R13,4(R15) set back pointer in current save area
0153F2 182D 30671+ LR R2,R13 remember callers save area
0153F4 18DF 30672+ LR R13,R15 setup current save area
0153F6 50D2 0008 00008 30673+ ST R13,8(R2) set forw pointer in callers save area
00000 30674+ USING TDSC,R1 declare TDSC base register
0153FA 58F0 1008 00008 30675+ L R15,TLRCNT load local repeat count to R15
30676+*
30677 * inner loop logic:
30678 * load FR0 with 1.0
30679 * divide 50 times by 1.1
30680 *
0153FE 6800 C100 154E0 30681 T547L LD FR0,=D'1.0'
30682 REPINS DD,(FR0,=D'1.1') repeat: DD FR0,=D'1.1'
30683+*
30684+* build from sublist &ALIST a comma separated string &ARGS
30685+*
30686+*
30687+*
30688+*
30689+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
30690+* this allows to transfer the repeat count from last TDSCGEN call
30691+*
30692+*
30693+*
30694+* write a comment indicating what REPINS does (in case NOGEN in effect)
PAGE 561
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
30695+*
30696+*,// REPINS: do 50 times:
30697+*
30698+* MNOTE requires that ' is doubled for expanded variables
30699+* thus build &MASTR as a copy of '&ARGS with ' doubled
30700+*
30701+*
30702+*,// DD FR0,=D'1.1'
30703+*
30704+* finally generate code: &ICNT copies of &CODE &ARGS
30705+*
015402 6D00 C108 154E8 30706+ DD FR0,=D'1.1'
015406 6D00 C108 154E8 30707+ DD FR0,=D'1.1'
01540A 6D00 C108 154E8 30708+ DD FR0,=D'1.1'
01540E 6D00 C108 154E8 30709+ DD FR0,=D'1.1'
015412 6D00 C108 154E8 30710+ DD FR0,=D'1.1'
015416 6D00 C108 154E8 30711+ DD FR0,=D'1.1'
01541A 6D00 C108 154E8 30712+ DD FR0,=D'1.1'
01541E 6D00 C108 154E8 30713+ DD FR0,=D'1.1'
015422 6D00 C108 154E8 30714+ DD FR0,=D'1.1'
015426 6D00 C108 154E8 30715+ DD FR0,=D'1.1'
01542A 6D00 C108 154E8 30716+ DD FR0,=D'1.1'
01542E 6D00 C108 154E8 30717+ DD FR0,=D'1.1'
015432 6D00 C108 154E8 30718+ DD FR0,=D'1.1'
015436 6D00 C108 154E8 30719+ DD FR0,=D'1.1'
01543A 6D00 C108 154E8 30720+ DD FR0,=D'1.1'
01543E 6D00 C108 154E8 30721+ DD FR0,=D'1.1'
015442 6D00 C108 154E8 30722+ DD FR0,=D'1.1'
015446 6D00 C108 154E8 30723+ DD FR0,=D'1.1'
01544A 6D00 C108 154E8 30724+ DD FR0,=D'1.1'
01544E 6D00 C108 154E8 30725+ DD FR0,=D'1.1'
015452 6D00 C108 154E8 30726+ DD FR0,=D'1.1'
015456 6D00 C108 154E8 30727+ DD FR0,=D'1.1'
01545A 6D00 C108 154E8 30728+ DD FR0,=D'1.1'
01545E 6D00 C108 154E8 30729+ DD FR0,=D'1.1'
015462 6D00 C108 154E8 30730+ DD FR0,=D'1.1'
015466 6D00 C108 154E8 30731+ DD FR0,=D'1.1'
01546A 6D00 C108 154E8 30732+ DD FR0,=D'1.1'
01546E 6D00 C108 154E8 30733+ DD FR0,=D'1.1'
015472 6D00 C108 154E8 30734+ DD FR0,=D'1.1'
015476 6D00 C108 154E8 30735+ DD FR0,=D'1.1'
01547A 6D00 C108 154E8 30736+ DD FR0,=D'1.1'
01547E 6D00 C108 154E8 30737+ DD FR0,=D'1.1'
015482 6D00 C108 154E8 30738+ DD FR0,=D'1.1'
015486 6D00 C108 154E8 30739+ DD FR0,=D'1.1'
01548A 6D00 C108 154E8 30740+ DD FR0,=D'1.1'
01548E 6D00 C108 154E8 30741+ DD FR0,=D'1.1'
015492 6D00 C108 154E8 30742+ DD FR0,=D'1.1'
015496 6D00 C108 154E8 30743+ DD FR0,=D'1.1'
01549A 6D00 C108 154E8 30744+ DD FR0,=D'1.1'
01549E 6D00 C108 154E8 30745+ DD FR0,=D'1.1'
0154A2 6D00 C108 154E8 30746+ DD FR0,=D'1.1'
0154A6 6D00 C108 154E8 30747+ DD FR0,=D'1.1'
0154AA 6D00 C108 154E8 30748+ DD FR0,=D'1.1'
0154AE 6D00 C108 154E8 30749+ DD FR0,=D'1.1'
PAGE 562
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0154B2 6D00 C108 154E8 30750+ DD FR0,=D'1.1'
0154B6 6D00 C108 154E8 30751+ DD FR0,=D'1.1'
0154BA 6D00 C108 154E8 30752+ DD FR0,=D'1.1'
0154BE 6D00 C108 154E8 30753+ DD FR0,=D'1.1'
0154C2 6D00 C108 154E8 30754+ DD FR0,=D'1.1'
0154C6 6D00 C108 154E8 30755+ DD FR0,=D'1.1'
30756+*
0154CA 06FB 30757 BCTR R15,R11
30758 TSIMRET
0154CC 58F0 C110 154F0 30759+ L R15,=A(SAVETST) R15 := current save area
0154D0 58DF 0004 00004 30760+ L R13,4(R15) get old save area back
0154D4 98EC D00C 0000C 30761+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0154D8 07FE 30762+ BR 14 RETURN 02000000
30763 TSIMEND
0154E0 30764+ LTORG
0154E0 4110000000000000 30765 =D'1.0'
0154E8 411199999999999A 30766 =D'1.1'
0154F0 00000458 30767 =A(SAVETST)
154F4 30768+T547TEND EQU *
30769 *
30770 * Test 55x -- long float auxiliary =========================
30771 *
30772 * Test 550 -- CDR R,R --------------------------------------
30773 *
30774 TSIMBEG T550,8000,50,1,C'CDR R,R'
30775+*
003F24 30776+TDSCDAT CSECT
003F28 30777+ DS 0D
30778+*
003F28 000154F8 30779+T550TDSC DC A(T550) // TENTRY
003F2C 000000B4 30780+ DC A(T550TEND-T550) // TLENGTH
003F30 00001F40 30781+ DC F'8000' // TLRCNT
003F34 00000032 30782+ DC F'50' // TIGCNT
003F38 00000001 30783+ DC F'1' // TLTYPE
001C9A 30784+TEXT CSECT
001C9A E3F5F5F0 30785+SPTR2709 DC C'T550'
003F3C 30786+TDSCDAT CSECT
003F3C 30787+ DS 0F
003F3C 04001C9A 30788+ DC AL1(L'SPTR2709),AL3(SPTR2709)
001C9E 30789+TEXT CSECT
001C9E C3C4D940D96BD9 30790+SPTR2710 DC C'CDR R,R'
003F40 30791+TDSCDAT CSECT
003F40 30792+ DS 0F
003F40 07001C9E 30793+ DC AL1(L'SPTR2710),AL3(SPTR2710)
30794+*
004D10 30795+TDSCTBL CSECT
04D10 30796+T550TPTR EQU *
004D10 00003F28 30797+ DC A(T550TDSC) enabled test
30798+*
0154F4 30799+TCODE CSECT
0154F8 30800+ DS 0D ensure double word alignment for test
0154F8 30801+T550 DS 0H 01650000
0154F8 90EC D00C 0000C 30802+ STM 14,12,12(13) SAVE REGISTERS 02950000
0154FC 18CF 30803+ LR R12,R15 base register := entry address
154F8 30804+ USING T550,R12 declare code base register
PAGE 563
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0154FE 41B0 C026 1551E 30805+ LA R11,T550L load loop target to R11
015502 58F0 C0B0 155A8 30806+ L R15,=A(SAVETST) R15 := current save area
015506 50DF 0004 00004 30807+ ST R13,4(R15) set back pointer in current save area
01550A 182D 30808+ LR R2,R13 remember callers save area
01550C 18DF 30809+ LR R13,R15 setup current save area
01550E 50D2 0008 00008 30810+ ST R13,8(R2) set forw pointer in callers save area
00000 30811+ USING TDSC,R1 declare TDSC base register
015512 58F0 1008 00008 30812+ L R15,TLRCNT load local repeat count to R15
30813+*
30814 *
015516 6800 C0A0 15598 30815 LD FR0,=D'1.0'
01551A 6820 C0A8 155A0 30816 LD FR2,=D'1.1'
30817 T550L REPINS CDR,(FR0,FR2) repeat: CDR FR0,FR2
30818+*
30819+* build from sublist &ALIST a comma separated string &ARGS
30820+*
30821+*
30822+*
30823+*
30824+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
30825+* this allows to transfer the repeat count from last TDSCGEN call
30826+*
30827+*
1551E 30828+T550L EQU *
30829+*
30830+* write a comment indicating what REPINS does (in case NOGEN in effect)
30831+*
30832+*,// REPINS: do 50 times:
30833+*
30834+* MNOTE requires that ' is doubled for expanded variables
30835+* thus build &MASTR as a copy of '&ARGS with ' doubled
30836+*
30837+*
30838+*,// CDR FR0,FR2
30839+*
30840+* finally generate code: &ICNT copies of &CODE &ARGS
30841+*
01551E 2902 30842+ CDR FR0,FR2
015520 2902 30843+ CDR FR0,FR2
015522 2902 30844+ CDR FR0,FR2
015524 2902 30845+ CDR FR0,FR2
015526 2902 30846+ CDR FR0,FR2
015528 2902 30847+ CDR FR0,FR2
01552A 2902 30848+ CDR FR0,FR2
01552C 2902 30849+ CDR FR0,FR2
01552E 2902 30850+ CDR FR0,FR2
015530 2902 30851+ CDR FR0,FR2
015532 2902 30852+ CDR FR0,FR2
015534 2902 30853+ CDR FR0,FR2
015536 2902 30854+ CDR FR0,FR2
015538 2902 30855+ CDR FR0,FR2
01553A 2902 30856+ CDR FR0,FR2
01553C 2902 30857+ CDR FR0,FR2
01553E 2902 30858+ CDR FR0,FR2
015540 2902 30859+ CDR FR0,FR2
PAGE 564
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015542 2902 30860+ CDR FR0,FR2
015544 2902 30861+ CDR FR0,FR2
015546 2902 30862+ CDR FR0,FR2
015548 2902 30863+ CDR FR0,FR2
01554A 2902 30864+ CDR FR0,FR2
01554C 2902 30865+ CDR FR0,FR2
01554E 2902 30866+ CDR FR0,FR2
015550 2902 30867+ CDR FR0,FR2
015552 2902 30868+ CDR FR0,FR2
015554 2902 30869+ CDR FR0,FR2
015556 2902 30870+ CDR FR0,FR2
015558 2902 30871+ CDR FR0,FR2
01555A 2902 30872+ CDR FR0,FR2
01555C 2902 30873+ CDR FR0,FR2
01555E 2902 30874+ CDR FR0,FR2
015560 2902 30875+ CDR FR0,FR2
015562 2902 30876+ CDR FR0,FR2
015564 2902 30877+ CDR FR0,FR2
015566 2902 30878+ CDR FR0,FR2
015568 2902 30879+ CDR FR0,FR2
01556A 2902 30880+ CDR FR0,FR2
01556C 2902 30881+ CDR FR0,FR2
01556E 2902 30882+ CDR FR0,FR2
015570 2902 30883+ CDR FR0,FR2
015572 2902 30884+ CDR FR0,FR2
015574 2902 30885+ CDR FR0,FR2
015576 2902 30886+ CDR FR0,FR2
015578 2902 30887+ CDR FR0,FR2
01557A 2902 30888+ CDR FR0,FR2
01557C 2902 30889+ CDR FR0,FR2
01557E 2902 30890+ CDR FR0,FR2
015580 2902 30891+ CDR FR0,FR2
30892+*
015582 06FB 30893 BCTR R15,R11
30894 TSIMRET
015584 58F0 C0B0 155A8 30895+ L R15,=A(SAVETST) R15 := current save area
015588 58DF 0004 00004 30896+ L R13,4(R15) get old save area back
01558C 98EC D00C 0000C 30897+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
015590 07FE 30898+ BR 14 RETURN 02000000
30899 TSIMEND
015598 30900+ LTORG
015598 4110000000000000 30901 =D'1.0'
0155A0 411199999999999A 30902 =D'1.1'
0155A8 00000458 30903 =A(SAVETST)
155AC 30904+T550TEND EQU *
30905 *
30906 * Test 551 -- CD R,m ---------------------------------------
30907 *
30908 TSIMBEG T551,6000,50,1,C'CD R,m'
30909+*
003F44 30910+TDSCDAT CSECT
003F48 30911+ DS 0D
30912+*
003F48 000155B0 30913+T551TDSC DC A(T551) // TENTRY
003F4C 00000114 30914+ DC A(T551TEND-T551) // TLENGTH
PAGE 565
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003F50 00001770 30915+ DC F'6000' // TLRCNT
003F54 00000032 30916+ DC F'50' // TIGCNT
003F58 00000001 30917+ DC F'1' // TLTYPE
001CA5 30918+TEXT CSECT
001CA5 E3F5F5F1 30919+SPTR2721 DC C'T551'
003F5C 30920+TDSCDAT CSECT
003F5C 30921+ DS 0F
003F5C 04001CA5 30922+ DC AL1(L'SPTR2721),AL3(SPTR2721)
001CA9 30923+TEXT CSECT
001CA9 C3C440D96B94 30924+SPTR2722 DC C'CD R,m'
003F60 30925+TDSCDAT CSECT
003F60 30926+ DS 0F
003F60 06001CA9 30927+ DC AL1(L'SPTR2722),AL3(SPTR2722)
30928+*
004D14 30929+TDSCTBL CSECT
04D14 30930+T551TPTR EQU *
004D14 00003F48 30931+ DC A(T551TDSC) enabled test
30932+*
0155AC 30933+TCODE CSECT
0155B0 30934+ DS 0D ensure double word alignment for test
0155B0 30935+T551 DS 0H 01650000
0155B0 90EC D00C 0000C 30936+ STM 14,12,12(13) SAVE REGISTERS 02950000
0155B4 18CF 30937+ LR R12,R15 base register := entry address
155B0 30938+ USING T551,R12 declare code base register
0155B6 41B0 C022 155D2 30939+ LA R11,T551L load loop target to R11
0155BA 58F0 C110 156C0 30940+ L R15,=A(SAVETST) R15 := current save area
0155BE 50DF 0004 00004 30941+ ST R13,4(R15) set back pointer in current save area
0155C2 182D 30942+ LR R2,R13 remember callers save area
0155C4 18DF 30943+ LR R13,R15 setup current save area
0155C6 50D2 0008 00008 30944+ ST R13,8(R2) set forw pointer in callers save area
00000 30945+ USING TDSC,R1 declare TDSC base register
0155CA 58F0 1008 00008 30946+ L R15,TLRCNT load local repeat count to R15
30947+*
30948 *
0155CE 6800 C100 156B0 30949 LD FR0,=D'1.0'
30950 T551L REPINS CD,(FR0,=D'1.1') repeat: CD FR0,=D'1.1'
30951+*
30952+* build from sublist &ALIST a comma separated string &ARGS
30953+*
30954+*
30955+*
30956+*
30957+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
30958+* this allows to transfer the repeat count from last TDSCGEN call
30959+*
30960+*
155D2 30961+T551L EQU *
30962+*
30963+* write a comment indicating what REPINS does (in case NOGEN in effect)
30964+*
30965+*,// REPINS: do 50 times:
30966+*
30967+* MNOTE requires that ' is doubled for expanded variables
30968+* thus build &MASTR as a copy of '&ARGS with ' doubled
30969+*
PAGE 566
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
30970+*
30971+*,// CD FR0,=D'1.1'
30972+*
30973+* finally generate code: &ICNT copies of &CODE &ARGS
30974+*
0155D2 6900 C108 156B8 30975+ CD FR0,=D'1.1'
0155D6 6900 C108 156B8 30976+ CD FR0,=D'1.1'
0155DA 6900 C108 156B8 30977+ CD FR0,=D'1.1'
0155DE 6900 C108 156B8 30978+ CD FR0,=D'1.1'
0155E2 6900 C108 156B8 30979+ CD FR0,=D'1.1'
0155E6 6900 C108 156B8 30980+ CD FR0,=D'1.1'
0155EA 6900 C108 156B8 30981+ CD FR0,=D'1.1'
0155EE 6900 C108 156B8 30982+ CD FR0,=D'1.1'
0155F2 6900 C108 156B8 30983+ CD FR0,=D'1.1'
0155F6 6900 C108 156B8 30984+ CD FR0,=D'1.1'
0155FA 6900 C108 156B8 30985+ CD FR0,=D'1.1'
0155FE 6900 C108 156B8 30986+ CD FR0,=D'1.1'
015602 6900 C108 156B8 30987+ CD FR0,=D'1.1'
015606 6900 C108 156B8 30988+ CD FR0,=D'1.1'
01560A 6900 C108 156B8 30989+ CD FR0,=D'1.1'
01560E 6900 C108 156B8 30990+ CD FR0,=D'1.1'
015612 6900 C108 156B8 30991+ CD FR0,=D'1.1'
015616 6900 C108 156B8 30992+ CD FR0,=D'1.1'
01561A 6900 C108 156B8 30993+ CD FR0,=D'1.1'
01561E 6900 C108 156B8 30994+ CD FR0,=D'1.1'
015622 6900 C108 156B8 30995+ CD FR0,=D'1.1'
015626 6900 C108 156B8 30996+ CD FR0,=D'1.1'
01562A 6900 C108 156B8 30997+ CD FR0,=D'1.1'
01562E 6900 C108 156B8 30998+ CD FR0,=D'1.1'
015632 6900 C108 156B8 30999+ CD FR0,=D'1.1'
015636 6900 C108 156B8 31000+ CD FR0,=D'1.1'
01563A 6900 C108 156B8 31001+ CD FR0,=D'1.1'
01563E 6900 C108 156B8 31002+ CD FR0,=D'1.1'
015642 6900 C108 156B8 31003+ CD FR0,=D'1.1'
015646 6900 C108 156B8 31004+ CD FR0,=D'1.1'
01564A 6900 C108 156B8 31005+ CD FR0,=D'1.1'
01564E 6900 C108 156B8 31006+ CD FR0,=D'1.1'
015652 6900 C108 156B8 31007+ CD FR0,=D'1.1'
015656 6900 C108 156B8 31008+ CD FR0,=D'1.1'
01565A 6900 C108 156B8 31009+ CD FR0,=D'1.1'
01565E 6900 C108 156B8 31010+ CD FR0,=D'1.1'
015662 6900 C108 156B8 31011+ CD FR0,=D'1.1'
015666 6900 C108 156B8 31012+ CD FR0,=D'1.1'
01566A 6900 C108 156B8 31013+ CD FR0,=D'1.1'
01566E 6900 C108 156B8 31014+ CD FR0,=D'1.1'
015672 6900 C108 156B8 31015+ CD FR0,=D'1.1'
015676 6900 C108 156B8 31016+ CD FR0,=D'1.1'
01567A 6900 C108 156B8 31017+ CD FR0,=D'1.1'
01567E 6900 C108 156B8 31018+ CD FR0,=D'1.1'
015682 6900 C108 156B8 31019+ CD FR0,=D'1.1'
015686 6900 C108 156B8 31020+ CD FR0,=D'1.1'
01568A 6900 C108 156B8 31021+ CD FR0,=D'1.1'
01568E 6900 C108 156B8 31022+ CD FR0,=D'1.1'
015692 6900 C108 156B8 31023+ CD FR0,=D'1.1'
015696 6900 C108 156B8 31024+ CD FR0,=D'1.1'
PAGE 567
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
31025+*
01569A 06FB 31026 BCTR R15,R11
31027 TSIMRET
01569C 58F0 C110 156C0 31028+ L R15,=A(SAVETST) R15 := current save area
0156A0 58DF 0004 00004 31029+ L R13,4(R15) get old save area back
0156A4 98EC D00C 0000C 31030+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0156A8 07FE 31031+ BR 14 RETURN 02000000
31032 TSIMEND
0156B0 31033+ LTORG
0156B0 4110000000000000 31034 =D'1.0'
0156B8 411199999999999A 31035 =D'1.1'
0156C0 00000458 31036 =A(SAVETST)
156C4 31037+T551TEND EQU *
31038 *
31039 * Test 552 -- AWR R,R --------------------------------------
31040 *
31041 TSIMBEG T552,8000,50,10,C'AWR R,R'
31042+*
003F64 31043+TDSCDAT CSECT
003F68 31044+ DS 0D
31045+*
003F68 000156C8 31046+T552TDSC DC A(T552) // TENTRY
003F6C 000000B4 31047+ DC A(T552TEND-T552) // TLENGTH
003F70 00001F40 31048+ DC F'8000' // TLRCNT
003F74 00000032 31049+ DC F'50' // TIGCNT
003F78 0000000A 31050+ DC F'10' // TLTYPE
001CAF 31051+TEXT CSECT
001CAF E3F5F5F2 31052+SPTR2733 DC C'T552'
003F7C 31053+TDSCDAT CSECT
003F7C 31054+ DS 0F
003F7C 04001CAF 31055+ DC AL1(L'SPTR2733),AL3(SPTR2733)
001CB3 31056+TEXT CSECT
001CB3 C1E6D940D96BD9 31057+SPTR2734 DC C'AWR R,R'
003F80 31058+TDSCDAT CSECT
003F80 31059+ DS 0F
003F80 07001CB3 31060+ DC AL1(L'SPTR2734),AL3(SPTR2734)
31061+*
004D18 31062+TDSCTBL CSECT
04D18 31063+T552TPTR EQU *
004D18 00003F68 31064+ DC A(T552TDSC) enabled test
31065+*
0156C4 31066+TCODE CSECT
0156C8 31067+ DS 0D ensure double word alignment for test
0156C8 31068+T552 DS 0H 01650000
0156C8 90EC D00C 0000C 31069+ STM 14,12,12(13) SAVE REGISTERS 02950000
0156CC 18CF 31070+ LR R12,R15 base register := entry address
156C8 31071+ USING T552,R12 declare code base register
0156CE 41B0 C022 156EA 31072+ LA R11,T552L load loop target to R11
0156D2 58F0 C0B0 15778 31073+ L R15,=A(SAVETST) R15 := current save area
0156D6 50DF 0004 00004 31074+ ST R13,4(R15) set back pointer in current save area
0156DA 182D 31075+ LR R2,R13 remember callers save area
0156DC 18DF 31076+ LR R13,R15 setup current save area
0156DE 50D2 0008 00008 31077+ ST R13,8(R2) set forw pointer in callers save area
00000 31078+ USING TDSC,R1 declare TDSC base register
0156E2 58F0 1008 00008 31079+ L R15,TLRCNT load local repeat count to R15
PAGE 568
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
31080+*
31081 *
0156E6 6820 C0A0 15768 31082 LD FR2,T552V
0156EA 6800 C0A8 15770 31083 T552L LD FR0,=D'1234.1'
31084 REPINS AWR,(FR0,FR2) repeat: AWR FR0,FR2
31085+*
31086+* build from sublist &ALIST a comma separated string &ARGS
31087+*
31088+*
31089+*
31090+*
31091+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
31092+* this allows to transfer the repeat count from last TDSCGEN call
31093+*
31094+*
31095+*
31096+* write a comment indicating what REPINS does (in case NOGEN in effect)
31097+*
31098+*,// REPINS: do 50 times:
31099+*
31100+* MNOTE requires that ' is doubled for expanded variables
31101+* thus build &MASTR as a copy of '&ARGS with ' doubled
31102+*
31103+*
31104+*,// AWR FR0,FR2
31105+*
31106+* finally generate code: &ICNT copies of &CODE &ARGS
31107+*
0156EE 2E02 31108+ AWR FR0,FR2
0156F0 2E02 31109+ AWR FR0,FR2
0156F2 2E02 31110+ AWR FR0,FR2
0156F4 2E02 31111+ AWR FR0,FR2
0156F6 2E02 31112+ AWR FR0,FR2
0156F8 2E02 31113+ AWR FR0,FR2
0156FA 2E02 31114+ AWR FR0,FR2
0156FC 2E02 31115+ AWR FR0,FR2
0156FE 2E02 31116+ AWR FR0,FR2
015700 2E02 31117+ AWR FR0,FR2
015702 2E02 31118+ AWR FR0,FR2
015704 2E02 31119+ AWR FR0,FR2
015706 2E02 31120+ AWR FR0,FR2
015708 2E02 31121+ AWR FR0,FR2
01570A 2E02 31122+ AWR FR0,FR2
01570C 2E02 31123+ AWR FR0,FR2
01570E 2E02 31124+ AWR FR0,FR2
015710 2E02 31125+ AWR FR0,FR2
015712 2E02 31126+ AWR FR0,FR2
015714 2E02 31127+ AWR FR0,FR2
015716 2E02 31128+ AWR FR0,FR2
015718 2E02 31129+ AWR FR0,FR2
01571A 2E02 31130+ AWR FR0,FR2
01571C 2E02 31131+ AWR FR0,FR2
01571E 2E02 31132+ AWR FR0,FR2
015720 2E02 31133+ AWR FR0,FR2
015722 2E02 31134+ AWR FR0,FR2
PAGE 569
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015724 2E02 31135+ AWR FR0,FR2
015726 2E02 31136+ AWR FR0,FR2
015728 2E02 31137+ AWR FR0,FR2
01572A 2E02 31138+ AWR FR0,FR2
01572C 2E02 31139+ AWR FR0,FR2
01572E 2E02 31140+ AWR FR0,FR2
015730 2E02 31141+ AWR FR0,FR2
015732 2E02 31142+ AWR FR0,FR2
015734 2E02 31143+ AWR FR0,FR2
015736 2E02 31144+ AWR FR0,FR2
015738 2E02 31145+ AWR FR0,FR2
01573A 2E02 31146+ AWR FR0,FR2
01573C 2E02 31147+ AWR FR0,FR2
01573E 2E02 31148+ AWR FR0,FR2
015740 2E02 31149+ AWR FR0,FR2
015742 2E02 31150+ AWR FR0,FR2
015744 2E02 31151+ AWR FR0,FR2
015746 2E02 31152+ AWR FR0,FR2
015748 2E02 31153+ AWR FR0,FR2
01574A 2E02 31154+ AWR FR0,FR2
01574C 2E02 31155+ AWR FR0,FR2
01574E 2E02 31156+ AWR FR0,FR2
015750 2E02 31157+ AWR FR0,FR2
31158+*
015752 06FB 31159 BCTR R15,R11
31160 TSIMRET
015754 58F0 C0B0 15778 31161+ L R15,=A(SAVETST) R15 := current save area
015758 58DF 0004 00004 31162+ L R13,4(R15) get old save area back
01575C 98EC D00C 0000C 31163+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
015760 07FE 31164+ BR 14 RETURN 02000000
015768 31165 DS 0D
015768 31166 T552V DS X'4E000000',X'00000001'
31167 TSIMEND
015770 31168+ LTORG
015770 434D21999999999A 31169 =D'1234.1'
015778 00000458 31170 =A(SAVETST)
1577C 31171+T552TEND EQU *
31172 *
31173 * Test 553 -- HDR R,R --------------------------------------
31174 *
31175 TSIMBEG T553,13000,50,10,C'HDR R,R'
31176+*
003F84 31177+TDSCDAT CSECT
003F88 31178+ DS 0D
31179+*
003F88 00015780 31180+T553TDSC DC A(T553) // TENTRY
003F8C 000000A4 31181+ DC A(T553TEND-T553) // TLENGTH
003F90 000032C8 31182+ DC F'13000' // TLRCNT
003F94 00000032 31183+ DC F'50' // TIGCNT
003F98 0000000A 31184+ DC F'10' // TLTYPE
001CBA 31185+TEXT CSECT
001CBA E3F5F5F3 31186+SPTR2745 DC C'T553'
003F9C 31187+TDSCDAT CSECT
003F9C 31188+ DS 0F
003F9C 04001CBA 31189+ DC AL1(L'SPTR2745),AL3(SPTR2745)
PAGE 570
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001CBE 31190+TEXT CSECT
001CBE C8C4D940D96BD9 31191+SPTR2746 DC C'HDR R,R'
003FA0 31192+TDSCDAT CSECT
003FA0 31193+ DS 0F
003FA0 07001CBE 31194+ DC AL1(L'SPTR2746),AL3(SPTR2746)
31195+*
004D1C 31196+TDSCTBL CSECT
04D1C 31197+T553TPTR EQU *
004D1C 00003F88 31198+ DC A(T553TDSC) enabled test
31199+*
01577C 31200+TCODE CSECT
015780 31201+ DS 0D ensure double word alignment for test
015780 31202+T553 DS 0H 01650000
015780 90EC D00C 0000C 31203+ STM 14,12,12(13) SAVE REGISTERS 02950000
015784 18CF 31204+ LR R12,R15 base register := entry address
15780 31205+ USING T553,R12 declare code base register
015786 41B0 C01E 1579E 31206+ LA R11,T553L load loop target to R11
01578A 58F0 C0A0 15820 31207+ L R15,=A(SAVETST) R15 := current save area
01578E 50DF 0004 00004 31208+ ST R13,4(R15) set back pointer in current save area
015792 182D 31209+ LR R2,R13 remember callers save area
015794 18DF 31210+ LR R13,R15 setup current save area
015796 50D2 0008 00008 31211+ ST R13,8(R2) set forw pointer in callers save area
00000 31212+ USING TDSC,R1 declare TDSC base register
01579A 58F0 1008 00008 31213+ L R15,TLRCNT load local repeat count to R15
31214+*
31215 * inner loop logic:
31216 * load FR0 with 1111111111.
31217 * 'half' it 50 times
31218 *
01579E 6800 C098 15818 31219 T553L LD FR0,=D'1111111111.0'
31220 REPINS HDR,(FR0,FR0) repeat: HDR FR0,FR0
31221+*
31222+* build from sublist &ALIST a comma separated string &ARGS
31223+*
31224+*
31225+*
31226+*
31227+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
31228+* this allows to transfer the repeat count from last TDSCGEN call
31229+*
31230+*
31231+*
31232+* write a comment indicating what REPINS does (in case NOGEN in effect)
31233+*
31234+*,// REPINS: do 50 times:
31235+*
31236+* MNOTE requires that ' is doubled for expanded variables
31237+* thus build &MASTR as a copy of '&ARGS with ' doubled
31238+*
31239+*
31240+*,// HDR FR0,FR0
31241+*
31242+* finally generate code: &ICNT copies of &CODE &ARGS
31243+*
0157A2 2400 31244+ HDR FR0,FR0
PAGE 571
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0157A4 2400 31245+ HDR FR0,FR0
0157A6 2400 31246+ HDR FR0,FR0
0157A8 2400 31247+ HDR FR0,FR0
0157AA 2400 31248+ HDR FR0,FR0
0157AC 2400 31249+ HDR FR0,FR0
0157AE 2400 31250+ HDR FR0,FR0
0157B0 2400 31251+ HDR FR0,FR0
0157B2 2400 31252+ HDR FR0,FR0
0157B4 2400 31253+ HDR FR0,FR0
0157B6 2400 31254+ HDR FR0,FR0
0157B8 2400 31255+ HDR FR0,FR0
0157BA 2400 31256+ HDR FR0,FR0
0157BC 2400 31257+ HDR FR0,FR0
0157BE 2400 31258+ HDR FR0,FR0
0157C0 2400 31259+ HDR FR0,FR0
0157C2 2400 31260+ HDR FR0,FR0
0157C4 2400 31261+ HDR FR0,FR0
0157C6 2400 31262+ HDR FR0,FR0
0157C8 2400 31263+ HDR FR0,FR0
0157CA 2400 31264+ HDR FR0,FR0
0157CC 2400 31265+ HDR FR0,FR0
0157CE 2400 31266+ HDR FR0,FR0
0157D0 2400 31267+ HDR FR0,FR0
0157D2 2400 31268+ HDR FR0,FR0
0157D4 2400 31269+ HDR FR0,FR0
0157D6 2400 31270+ HDR FR0,FR0
0157D8 2400 31271+ HDR FR0,FR0
0157DA 2400 31272+ HDR FR0,FR0
0157DC 2400 31273+ HDR FR0,FR0
0157DE 2400 31274+ HDR FR0,FR0
0157E0 2400 31275+ HDR FR0,FR0
0157E2 2400 31276+ HDR FR0,FR0
0157E4 2400 31277+ HDR FR0,FR0
0157E6 2400 31278+ HDR FR0,FR0
0157E8 2400 31279+ HDR FR0,FR0
0157EA 2400 31280+ HDR FR0,FR0
0157EC 2400 31281+ HDR FR0,FR0
0157EE 2400 31282+ HDR FR0,FR0
0157F0 2400 31283+ HDR FR0,FR0
0157F2 2400 31284+ HDR FR0,FR0
0157F4 2400 31285+ HDR FR0,FR0
0157F6 2400 31286+ HDR FR0,FR0
0157F8 2400 31287+ HDR FR0,FR0
0157FA 2400 31288+ HDR FR0,FR0
0157FC 2400 31289+ HDR FR0,FR0
0157FE 2400 31290+ HDR FR0,FR0
015800 2400 31291+ HDR FR0,FR0
015802 2400 31292+ HDR FR0,FR0
015804 2400 31293+ HDR FR0,FR0
31294+*
015806 06FB 31295 BCTR R15,R11
31296 TSIMRET
015808 58F0 C0A0 15820 31297+ L R15,=A(SAVETST) R15 := current save area
01580C 58DF 0004 00004 31298+ L R13,4(R15) get old save area back
015810 98EC D00C 0000C 31299+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
PAGE 572
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015814 07FE 31300+ BR 14 RETURN 02000000
31301 TSIMEND
015818 31302+ LTORG
015818 48423A35C7000000 31303 =D'1111111111.0'
015820 00000458 31304 =A(SAVETST)
15824 31305+T553TEND EQU *
31306 *
31307 * Test 56x -- extended float arithmetic ====================
31308 *
31309 * Test 560 -- AXR R,R --------------------------------------
31310 *
31311 TSIMBEG T560,4000,50,1,C'AXR R,R'
31312+*
003FA4 31313+TDSCDAT CSECT
003FA8 31314+ DS 0D
31315+*
003FA8 00015828 31316+T560TDSC DC A(T560) // TENTRY
003FAC 000000B4 31317+ DC A(T560TEND-T560) // TLENGTH
003FB0 00000FA0 31318+ DC F'4000' // TLRCNT
003FB4 00000032 31319+ DC F'50' // TIGCNT
003FB8 00000001 31320+ DC F'1' // TLTYPE
001CC5 31321+TEXT CSECT
001CC5 E3F5F6F0 31322+SPTR2757 DC C'T560'
003FBC 31323+TDSCDAT CSECT
003FBC 31324+ DS 0F
003FBC 04001CC5 31325+ DC AL1(L'SPTR2757),AL3(SPTR2757)
001CC9 31326+TEXT CSECT
001CC9 C1E7D940D96BD9 31327+SPTR2758 DC C'AXR R,R'
003FC0 31328+TDSCDAT CSECT
003FC0 31329+ DS 0F
003FC0 07001CC9 31330+ DC AL1(L'SPTR2758),AL3(SPTR2758)
31331+*
004D20 31332+TDSCTBL CSECT
04D20 31333+T560TPTR EQU *
004D20 00003FA8 31334+ DC A(T560TDSC) enabled test
31335+*
015824 31336+TCODE CSECT
015828 31337+ DS 0D ensure double word alignment for test
015828 31338+T560 DS 0H 01650000
015828 90EC D00C 0000C 31339+ STM 14,12,12(13) SAVE REGISTERS 02950000
01582C 18CF 31340+ LR R12,R15 base register := entry address
15828 31341+ USING T560,R12 declare code base register
01582E 41B0 C02A 15852 31342+ LA R11,T560L load loop target to R11
015832 58F0 C0B0 158D8 31343+ L R15,=A(SAVETST) R15 := current save area
015836 50DF 0004 00004 31344+ ST R13,4(R15) set back pointer in current save area
01583A 182D 31345+ LR R2,R13 remember callers save area
01583C 18DF 31346+ LR R13,R15 setup current save area
01583E 50D2 0008 00008 31347+ ST R13,8(R2) set forw pointer in callers save area
00000 31348+ USING TDSC,R1 declare TDSC base register
015842 58F0 1008 00008 31349+ L R15,TLRCNT load local repeat count to R15
31350+*
31351 *
015846 2B00 31352 SDR FR0,FR0
015848 2820 31353 LDR FR2,FR0
01584A 6840 C0A0 158C8 31354 LD FR4,T560V1
PAGE 573
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01584E 6860 C0A8 158D0 31355 LD FR6,T560V1+8
31356 T560L REPINS AXR,(FR0,FR4) repeat: AXR FR0,FR4
31357+*
31358+* build from sublist &ALIST a comma separated string &ARGS
31359+*
31360+*
31361+*
31362+*
31363+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
31364+* this allows to transfer the repeat count from last TDSCGEN call
31365+*
31366+*
15852 31367+T560L EQU *
31368+*
31369+* write a comment indicating what REPINS does (in case NOGEN in effect)
31370+*
31371+*,// REPINS: do 50 times:
31372+*
31373+* MNOTE requires that ' is doubled for expanded variables
31374+* thus build &MASTR as a copy of '&ARGS with ' doubled
31375+*
31376+*
31377+*,// AXR FR0,FR4
31378+*
31379+* finally generate code: &ICNT copies of &CODE &ARGS
31380+*
015852 3604 31381+ AXR FR0,FR4
015854 3604 31382+ AXR FR0,FR4
015856 3604 31383+ AXR FR0,FR4
015858 3604 31384+ AXR FR0,FR4
01585A 3604 31385+ AXR FR0,FR4
01585C 3604 31386+ AXR FR0,FR4
01585E 3604 31387+ AXR FR0,FR4
015860 3604 31388+ AXR FR0,FR4
015862 3604 31389+ AXR FR0,FR4
015864 3604 31390+ AXR FR0,FR4
015866 3604 31391+ AXR FR0,FR4
015868 3604 31392+ AXR FR0,FR4
01586A 3604 31393+ AXR FR0,FR4
01586C 3604 31394+ AXR FR0,FR4
01586E 3604 31395+ AXR FR0,FR4
015870 3604 31396+ AXR FR0,FR4
015872 3604 31397+ AXR FR0,FR4
015874 3604 31398+ AXR FR0,FR4
015876 3604 31399+ AXR FR0,FR4
015878 3604 31400+ AXR FR0,FR4
01587A 3604 31401+ AXR FR0,FR4
01587C 3604 31402+ AXR FR0,FR4
01587E 3604 31403+ AXR FR0,FR4
015880 3604 31404+ AXR FR0,FR4
015882 3604 31405+ AXR FR0,FR4
015884 3604 31406+ AXR FR0,FR4
015886 3604 31407+ AXR FR0,FR4
015888 3604 31408+ AXR FR0,FR4
01588A 3604 31409+ AXR FR0,FR4
PAGE 574
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01588C 3604 31410+ AXR FR0,FR4
01588E 3604 31411+ AXR FR0,FR4
015890 3604 31412+ AXR FR0,FR4
015892 3604 31413+ AXR FR0,FR4
015894 3604 31414+ AXR FR0,FR4
015896 3604 31415+ AXR FR0,FR4
015898 3604 31416+ AXR FR0,FR4
01589A 3604 31417+ AXR FR0,FR4
01589C 3604 31418+ AXR FR0,FR4
01589E 3604 31419+ AXR FR0,FR4
0158A0 3604 31420+ AXR FR0,FR4
0158A2 3604 31421+ AXR FR0,FR4
0158A4 3604 31422+ AXR FR0,FR4
0158A6 3604 31423+ AXR FR0,FR4
0158A8 3604 31424+ AXR FR0,FR4
0158AA 3604 31425+ AXR FR0,FR4
0158AC 3604 31426+ AXR FR0,FR4
0158AE 3604 31427+ AXR FR0,FR4
0158B0 3604 31428+ AXR FR0,FR4
0158B2 3604 31429+ AXR FR0,FR4
0158B4 3604 31430+ AXR FR0,FR4
31431+*
0158B6 06FB 31432 BCTR R15,R11
31433 TSIMRET
0158B8 58F0 C0B0 158D8 31434+ L R15,=A(SAVETST) R15 := current save area
0158BC 58DF 0004 00004 31435+ L R13,4(R15) get old save area back
0158C0 98EC D00C 0000C 31436+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0158C4 07FE 31437+ BR 14 RETURN 02000000
31438 *
0158C6 0000
0158C8 4111999999999999 31439 T560V1 DC L'1.1'
31440 TSIMEND
0158D8 31441+ LTORG
0158D8 00000458 31442 =A(SAVETST)
158DC 31443+T560TEND EQU *
31444 *
31445 * Test 561 -- MXR R,R --------------------------------------
31446 *
31447 TSIMBEG T561,3300,50,11,C'MXR R,R'
31448+*
003FC4 31449+TDSCDAT CSECT
003FC8 31450+ DS 0D
31451+*
003FC8 000158E0 31452+T561TDSC DC A(T561) // TENTRY
003FCC 000000CC 31453+ DC A(T561TEND-T561) // TLENGTH
003FD0 00000CE4 31454+ DC F'3300' // TLRCNT
003FD4 00000032 31455+ DC F'50' // TIGCNT
003FD8 0000000B 31456+ DC F'11' // TLTYPE
001CD0 31457+TEXT CSECT
001CD0 E3F5F6F1 31458+SPTR2769 DC C'T561'
003FDC 31459+TDSCDAT CSECT
003FDC 31460+ DS 0F
003FDC 04001CD0 31461+ DC AL1(L'SPTR2769),AL3(SPTR2769)
001CD4 31462+TEXT CSECT
001CD4 D4E7D940D96BD9 31463+SPTR2770 DC C'MXR R,R'
PAGE 575
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
003FE0 31464+TDSCDAT CSECT
003FE0 31465+ DS 0F
003FE0 07001CD4 31466+ DC AL1(L'SPTR2770),AL3(SPTR2770)
31467+*
004D24 31468+TDSCTBL CSECT
04D24 31469+T561TPTR EQU *
004D24 00003FC8 31470+ DC A(T561TDSC) enabled test
31471+*
0158DC 31472+TCODE CSECT
0158E0 31473+ DS 0D ensure double word alignment for test
0158E0 31474+T561 DS 0H 01650000
0158E0 90EC D00C 0000C 31475+ STM 14,12,12(13) SAVE REGISTERS 02950000
0158E4 18CF 31476+ LR R12,R15 base register := entry address
158E0 31477+ USING T561,R12 declare code base register
0158E6 41B0 C026 15906 31478+ LA R11,T561L load loop target to R11
0158EA 58F0 C0C8 159A8 31479+ L R15,=A(SAVETST) R15 := current save area
0158EE 50DF 0004 00004 31480+ ST R13,4(R15) set back pointer in current save area
0158F2 182D 31481+ LR R2,R13 remember callers save area
0158F4 18DF 31482+ LR R13,R15 setup current save area
0158F6 50D2 0008 00008 31483+ ST R13,8(R2) set forw pointer in callers save area
00000 31484+ USING TDSC,R1 declare TDSC base register
0158FA 58F0 1008 00008 31485+ L R15,TLRCNT load local repeat count to R15
31486+*
31487 *
0158FE 6840 C0B8 15998 31488 LD FR4,T561V2
015902 6860 C0C0 159A0 31489 LD FR6,T561V2+8
015906 6800 C0A8 15988 31490 T561L LD FR0,T561V1
01590A 6820 C0B0 15990 31491 LD FR2,T561V1+8
31492 REPINS MXR,(FR0,FR4) repeat: MXR FR0,FR4
31493+*
31494+* build from sublist &ALIST a comma separated string &ARGS
31495+*
31496+*
31497+*
31498+*
31499+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
31500+* this allows to transfer the repeat count from last TDSCGEN call
31501+*
31502+*
31503+*
31504+* write a comment indicating what REPINS does (in case NOGEN in effect)
31505+*
31506+*,// REPINS: do 50 times:
31507+*
31508+* MNOTE requires that ' is doubled for expanded variables
31509+* thus build &MASTR as a copy of '&ARGS with ' doubled
31510+*
31511+*
31512+*,// MXR FR0,FR4
31513+*
31514+* finally generate code: &ICNT copies of &CODE &ARGS
31515+*
01590E 2604 31516+ MXR FR0,FR4
015910 2604 31517+ MXR FR0,FR4
015912 2604 31518+ MXR FR0,FR4
PAGE 576
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015914 2604 31519+ MXR FR0,FR4
015916 2604 31520+ MXR FR0,FR4
015918 2604 31521+ MXR FR0,FR4
01591A 2604 31522+ MXR FR0,FR4
01591C 2604 31523+ MXR FR0,FR4
01591E 2604 31524+ MXR FR0,FR4
015920 2604 31525+ MXR FR0,FR4
015922 2604 31526+ MXR FR0,FR4
015924 2604 31527+ MXR FR0,FR4
015926 2604 31528+ MXR FR0,FR4
015928 2604 31529+ MXR FR0,FR4
01592A 2604 31530+ MXR FR0,FR4
01592C 2604 31531+ MXR FR0,FR4
01592E 2604 31532+ MXR FR0,FR4
015930 2604 31533+ MXR FR0,FR4
015932 2604 31534+ MXR FR0,FR4
015934 2604 31535+ MXR FR0,FR4
015936 2604 31536+ MXR FR0,FR4
015938 2604 31537+ MXR FR0,FR4
01593A 2604 31538+ MXR FR0,FR4
01593C 2604 31539+ MXR FR0,FR4
01593E 2604 31540+ MXR FR0,FR4
015940 2604 31541+ MXR FR0,FR4
015942 2604 31542+ MXR FR0,FR4
015944 2604 31543+ MXR FR0,FR4
015946 2604 31544+ MXR FR0,FR4
015948 2604 31545+ MXR FR0,FR4
01594A 2604 31546+ MXR FR0,FR4
01594C 2604 31547+ MXR FR0,FR4
01594E 2604 31548+ MXR FR0,FR4
015950 2604 31549+ MXR FR0,FR4
015952 2604 31550+ MXR FR0,FR4
015954 2604 31551+ MXR FR0,FR4
015956 2604 31552+ MXR FR0,FR4
015958 2604 31553+ MXR FR0,FR4
01595A 2604 31554+ MXR FR0,FR4
01595C 2604 31555+ MXR FR0,FR4
01595E 2604 31556+ MXR FR0,FR4
015960 2604 31557+ MXR FR0,FR4
015962 2604 31558+ MXR FR0,FR4
015964 2604 31559+ MXR FR0,FR4
015966 2604 31560+ MXR FR0,FR4
015968 2604 31561+ MXR FR0,FR4
01596A 2604 31562+ MXR FR0,FR4
01596C 2604 31563+ MXR FR0,FR4
01596E 2604 31564+ MXR FR0,FR4
015970 2604 31565+ MXR FR0,FR4
31566+*
015972 06FB 31567 BCTR R15,R11
31568 TSIMRET
015974 58F0 C0C8 159A8 31569+ L R15,=A(SAVETST) R15 := current save area
015978 58DF 0004 00004 31570+ L R13,4(R15) get old save area back
01597C 98EC D00C 0000C 31571+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
015980 07FE 31572+ BR 14 RETURN 02000000
31573 *
PAGE 577
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015982 000000000000
015988 4110000000000000 31574 T561V1 DC L'1.0'
015998 4111999999999999 31575 T561V2 DC L'1.1'
31576 TSIMEND
0159A8 31577+ LTORG
0159A8 00000458 31578 =A(SAVETST)
159AC 31579+T561TEND EQU *
31580 *
31581 * Test 6xx -- miscellaneous instructions ========================
31582 *
31583 * Test 600 -- STCK m ---------------------------------------
31584 *
31585 TSIMBEG T600,1000,10,1,C'STCK m'
31586+*
003FE4 31587+TDSCDAT CSECT
003FE8 31588+ DS 0D
31589+*
003FE8 000159B0 31590+T600TDSC DC A(T600) // TENTRY
003FEC 0000007C 31591+ DC A(T600TEND-T600) // TLENGTH
003FF0 000003E8 31592+ DC F'1000' // TLRCNT
003FF4 0000000A 31593+ DC F'10' // TIGCNT
003FF8 00000001 31594+ DC F'1' // TLTYPE
001CDB 31595+TEXT CSECT
001CDB E3F6F0F0 31596+SPTR2781 DC C'T600'
003FFC 31597+TDSCDAT CSECT
003FFC 31598+ DS 0F
003FFC 04001CDB 31599+ DC AL1(L'SPTR2781),AL3(SPTR2781)
001CDF 31600+TEXT CSECT
001CDF E2E3C3D24094 31601+SPTR2782 DC C'STCK m'
004000 31602+TDSCDAT CSECT
004000 31603+ DS 0F
004000 06001CDF 31604+ DC AL1(L'SPTR2782),AL3(SPTR2782)
31605+*
004D28 31606+TDSCTBL CSECT
04D28 31607+T600TPTR EQU *
004D28 00003FE8 31608+ DC A(T600TDSC) enabled test
31609+*
0159AC 31610+TCODE CSECT
0159B0 31611+ DS 0D ensure double word alignment for test
0159B0 31612+T600 DS 0H 01650000
0159B0 90EC D00C 0000C 31613+ STM 14,12,12(13) SAVE REGISTERS 02950000
0159B4 18CF 31614+ LR R12,R15 base register := entry address
159B0 31615+ USING T600,R12 declare code base register
0159B6 41B0 C01E 159CE 31616+ LA R11,T600L load loop target to R11
0159BA 58F0 C078 15A28 31617+ L R15,=A(SAVETST) R15 := current save area
0159BE 50DF 0004 00004 31618+ ST R13,4(R15) set back pointer in current save area
0159C2 182D 31619+ LR R2,R13 remember callers save area
0159C4 18DF 31620+ LR R13,R15 setup current save area
0159C6 50D2 0008 00008 31621+ ST R13,8(R2) set forw pointer in callers save area
00000 31622+ USING TDSC,R1 declare TDSC base register
0159CA 58F0 1008 00008 31623+ L R15,TLRCNT load local repeat count to R15
31624+*
31625 *
31626 T600L REPINS STCK,(T600V) repeat: STCK T600V
31627+*
PAGE 578
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
31628+* build from sublist &ALIST a comma separated string &ARGS
31629+*
31630+*
31631+*
31632+*
31633+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
31634+* this allows to transfer the repeat count from last TDSCGEN call
31635+*
31636+*
159CE 31637+T600L EQU *
31638+*
31639+* write a comment indicating what REPINS does (in case NOGEN in effect)
31640+*
31641+*,// REPINS: do 10 times:
31642+*
31643+* MNOTE requires that ' is doubled for expanded variables
31644+* thus build &MASTR as a copy of '&ARGS with ' doubled
31645+*
31646+*
31647+*,// STCK T600V
31648+*
31649+* finally generate code: &ICNT copies of &CODE &ARGS
31650+*
0159CE B205 C058 15A08 31651+ STCK T600V
0159D2 B205 C058 15A08 31652+ STCK T600V
0159D6 B205 C058 15A08 31653+ STCK T600V
0159DA B205 C058 15A08 31654+ STCK T600V
0159DE B205 C058 15A08 31655+ STCK T600V
0159E2 B205 C058 15A08 31656+ STCK T600V
0159E6 B205 C058 15A08 31657+ STCK T600V
0159EA B205 C058 15A08 31658+ STCK T600V
0159EE B205 C058 15A08 31659+ STCK T600V
0159F2 B205 C058 15A08 31660+ STCK T600V
31661+*
0159F6 06FB 31662 BCTR R15,R11
31663 TSIMRET
0159F8 58F0 C078 15A28 31664+ L R15,=A(SAVETST) R15 := current save area
0159FC 58DF 0004 00004 31665+ L R13,4(R15) get old save area back
015A00 98EC D00C 0000C 31666+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
015A04 07FE 31667+ BR 14 RETURN 02000000
31668 *
015A08 31669 DS 0D
015A08 31670 T600V DS 2L
31671 TSIMEND
015A28 31672+ LTORG
015A28 00000458 31673 =A(SAVETST)
15A2C 31674+T600TEND EQU *
31675 *
31676 * Test 601 -- SPM R ----------------------------------------
31677 *
31678 TSIMBEG T601,19000,100,1,C'SPM R'
31679+*
004004 31680+TDSCDAT CSECT
004008 31681+ DS 0D
31682+*
PAGE 579
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004008 00015A30 31683+T601TDSC DC A(T601) // TENTRY
00400C 000000FC 31684+ DC A(T601TEND-T601) // TLENGTH
004010 00004A38 31685+ DC F'19000' // TLRCNT
004014 00000064 31686+ DC F'100' // TIGCNT
004018 00000001 31687+ DC F'1' // TLTYPE
001CE5 31688+TEXT CSECT
001CE5 E3F6F0F1 31689+SPTR2793 DC C'T601'
00401C 31690+TDSCDAT CSECT
00401C 31691+ DS 0F
00401C 04001CE5 31692+ DC AL1(L'SPTR2793),AL3(SPTR2793)
001CE9 31693+TEXT CSECT
001CE9 E2D7D440D9 31694+SPTR2794 DC C'SPM R'
004020 31695+TDSCDAT CSECT
004020 31696+ DS 0F
004020 05001CE9 31697+ DC AL1(L'SPTR2794),AL3(SPTR2794)
31698+*
004D2C 31699+TDSCTBL CSECT
04D2C 31700+T601TPTR EQU *
004D2C 00004008 31701+ DC A(T601TDSC) enabled test
31702+*
015A2C 31703+TCODE CSECT
015A30 31704+ DS 0D ensure double word alignment for test
015A30 31705+T601 DS 0H 01650000
015A30 90EC D00C 0000C 31706+ STM 14,12,12(13) SAVE REGISTERS 02950000
015A34 18CF 31707+ LR R12,R15 base register := entry address
15A30 31708+ USING T601,R12 declare code base register
015A36 41B0 C020 15A50 31709+ LA R11,T601L load loop target to R11
015A3A 58F0 C0F8 15B28 31710+ L R15,=A(SAVETST) R15 := current save area
015A3E 50DF 0004 00004 31711+ ST R13,4(R15) set back pointer in current save area
015A42 182D 31712+ LR R2,R13 remember callers save area
015A44 18DF 31713+ LR R13,R15 setup current save area
015A46 50D2 0008 00008 31714+ ST R13,8(R2) set forw pointer in callers save area
00000 31715+ USING TDSC,R1 declare TDSC base register
015A4A 58F0 1008 00008 31716+ L R15,TLRCNT load local repeat count to R15
31717+*
31718 *
015A4E 0520 31719 BALR R2,0 get prog mask to R2
31720 T601L REPINS SPM,R2 repeat: SPM R2
31721+*
31722+* build from sublist &ALIST a comma separated string &ARGS
31723+*
31724+*
31725+*
31726+*
31727+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
31728+* this allows to transfer the repeat count from last TDSCGEN call
31729+*
31730+*
15A50 31731+T601L EQU *
31732+*
31733+* write a comment indicating what REPINS does (in case NOGEN in effect)
31734+*
31735+*,// REPINS: do 100 times:
31736+*
31737+* MNOTE requires that ' is doubled for expanded variables
PAGE 580
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
31738+* thus build &MASTR as a copy of '&ARGS with ' doubled
31739+*
31740+*
31741+*,// SPM R2
31742+*
31743+* finally generate code: &ICNT copies of &CODE &ARGS
31744+*
015A50 0420 31745+ SPM R2
015A52 0420 31746+ SPM R2
015A54 0420 31747+ SPM R2
015A56 0420 31748+ SPM R2
015A58 0420 31749+ SPM R2
015A5A 0420 31750+ SPM R2
015A5C 0420 31751+ SPM R2
015A5E 0420 31752+ SPM R2
015A60 0420 31753+ SPM R2
015A62 0420 31754+ SPM R2
015A64 0420 31755+ SPM R2
015A66 0420 31756+ SPM R2
015A68 0420 31757+ SPM R2
015A6A 0420 31758+ SPM R2
015A6C 0420 31759+ SPM R2
015A6E 0420 31760+ SPM R2
015A70 0420 31761+ SPM R2
015A72 0420 31762+ SPM R2
015A74 0420 31763+ SPM R2
015A76 0420 31764+ SPM R2
015A78 0420 31765+ SPM R2
015A7A 0420 31766+ SPM R2
015A7C 0420 31767+ SPM R2
015A7E 0420 31768+ SPM R2
015A80 0420 31769+ SPM R2
015A82 0420 31770+ SPM R2
015A84 0420 31771+ SPM R2
015A86 0420 31772+ SPM R2
015A88 0420 31773+ SPM R2
015A8A 0420 31774+ SPM R2
015A8C 0420 31775+ SPM R2
015A8E 0420 31776+ SPM R2
015A90 0420 31777+ SPM R2
015A92 0420 31778+ SPM R2
015A94 0420 31779+ SPM R2
015A96 0420 31780+ SPM R2
015A98 0420 31781+ SPM R2
015A9A 0420 31782+ SPM R2
015A9C 0420 31783+ SPM R2
015A9E 0420 31784+ SPM R2
015AA0 0420 31785+ SPM R2
015AA2 0420 31786+ SPM R2
015AA4 0420 31787+ SPM R2
015AA6 0420 31788+ SPM R2
015AA8 0420 31789+ SPM R2
015AAA 0420 31790+ SPM R2
015AAC 0420 31791+ SPM R2
015AAE 0420 31792+ SPM R2
PAGE 581
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015AB0 0420 31793+ SPM R2
015AB2 0420 31794+ SPM R2
015AB4 0420 31795+ SPM R2
015AB6 0420 31796+ SPM R2
015AB8 0420 31797+ SPM R2
015ABA 0420 31798+ SPM R2
015ABC 0420 31799+ SPM R2
015ABE 0420 31800+ SPM R2
015AC0 0420 31801+ SPM R2
015AC2 0420 31802+ SPM R2
015AC4 0420 31803+ SPM R2
015AC6 0420 31804+ SPM R2
015AC8 0420 31805+ SPM R2
015ACA 0420 31806+ SPM R2
015ACC 0420 31807+ SPM R2
015ACE 0420 31808+ SPM R2
015AD0 0420 31809+ SPM R2
015AD2 0420 31810+ SPM R2
015AD4 0420 31811+ SPM R2
015AD6 0420 31812+ SPM R2
015AD8 0420 31813+ SPM R2
015ADA 0420 31814+ SPM R2
015ADC 0420 31815+ SPM R2
015ADE 0420 31816+ SPM R2
015AE0 0420 31817+ SPM R2
015AE2 0420 31818+ SPM R2
015AE4 0420 31819+ SPM R2
015AE6 0420 31820+ SPM R2
015AE8 0420 31821+ SPM R2
015AEA 0420 31822+ SPM R2
015AEC 0420 31823+ SPM R2
015AEE 0420 31824+ SPM R2
015AF0 0420 31825+ SPM R2
015AF2 0420 31826+ SPM R2
015AF4 0420 31827+ SPM R2
015AF6 0420 31828+ SPM R2
015AF8 0420 31829+ SPM R2
015AFA 0420 31830+ SPM R2
015AFC 0420 31831+ SPM R2
015AFE 0420 31832+ SPM R2
015B00 0420 31833+ SPM R2
015B02 0420 31834+ SPM R2
015B04 0420 31835+ SPM R2
015B06 0420 31836+ SPM R2
015B08 0420 31837+ SPM R2
015B0A 0420 31838+ SPM R2
015B0C 0420 31839+ SPM R2
015B0E 0420 31840+ SPM R2
015B10 0420 31841+ SPM R2
015B12 0420 31842+ SPM R2
015B14 0420 31843+ SPM R2
015B16 0420 31844+ SPM R2
31845+*
015B18 06FB 31846 BCTR R15,R11
31847 TSIMRET
PAGE 582
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015B1A 58F0 C0F8 15B28 31848+ L R15,=A(SAVETST) R15 := current save area
015B1E 58DF 0004 00004 31849+ L R13,4(R15) get old save area back
015B22 98EC D00C 0000C 31850+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
015B26 07FE 31851+ BR 14 RETURN 02000000
31852 TSIMEND
015B28 31853+ LTORG
015B28 00000458 31854 =A(SAVETST)
15B2C 31855+T601TEND EQU *
31856 *
31857 * Test 610 -- EX R,i (with TM) -----------------------------
31858 *
31859 TSIMBEG T610,3500,50,1,C'EX R,i (with TM)'
31860+*
004024 31861+TDSCDAT CSECT
004028 31862+ DS 0D
31863+*
004028 00015B30 31864+T610TDSC DC A(T610) // TENTRY
00402C 00000104 31865+ DC A(T610TEND-T610) // TLENGTH
004030 00000DAC 31866+ DC F'3500' // TLRCNT
004034 00000032 31867+ DC F'50' // TIGCNT
004038 00000001 31868+ DC F'1' // TLTYPE
001CEE 31869+TEXT CSECT
001CEE E3F6F1F0 31870+SPTR2805 DC C'T610'
00403C 31871+TDSCDAT CSECT
00403C 31872+ DS 0F
00403C 04001CEE 31873+ DC AL1(L'SPTR2805),AL3(SPTR2805)
001CF2 31874+TEXT CSECT
001CF2 C5E740D96B89404D 31875+SPTR2806 DC C'EX R,i (with TM)'
004040 31876+TDSCDAT CSECT
004040 31877+ DS 0F
004040 10001CF2 31878+ DC AL1(L'SPTR2806),AL3(SPTR2806)
31879+*
004D30 31880+TDSCTBL CSECT
04D30 31881+T610TPTR EQU *
004D30 00004028 31882+ DC A(T610TDSC) enabled test
31883+*
015B2C 31884+TCODE CSECT
015B30 31885+ DS 0D ensure double word alignment for test
015B30 31886+T610 DS 0H 01650000
015B30 90EC D00C 0000C 31887+ STM 14,12,12(13) SAVE REGISTERS 02950000
015B34 18CF 31888+ LR R12,R15 base register := entry address
15B30 31889+ USING T610,R12 declare code base register
015B36 41B0 C022 15B52 31890+ LA R11,T610L load loop target to R11
015B3A 58F0 C100 15C30 31891+ L R15,=A(SAVETST) R15 := current save area
015B3E 50DF 0004 00004 31892+ ST R13,4(R15) set back pointer in current save area
015B42 182D 31893+ LR R2,R13 remember callers save area
015B44 18DF 31894+ LR R13,R15 setup current save area
015B46 50D2 0008 00008 31895+ ST R13,8(R2) set forw pointer in callers save area
00000 31896+ USING TDSC,R1 declare TDSC base register
015B4A 58F0 1008 00008 31897+ L R15,TLRCNT load local repeat count to R15
31898+*
31899 *
015B4E 4120 0001 00001 31900 LA R2,X'01'
31901 T610L REPINS EX,(R2,T610I) repeat: EX R2,T610I
31902+*
PAGE 583
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
31903+* build from sublist &ALIST a comma separated string &ARGS
31904+*
31905+*
31906+*
31907+*
31908+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
31909+* this allows to transfer the repeat count from last TDSCGEN call
31910+*
31911+*
15B52 31912+T610L EQU *
31913+*
31914+* write a comment indicating what REPINS does (in case NOGEN in effect)
31915+*
31916+*,// REPINS: do 50 times:
31917+*
31918+* MNOTE requires that ' is doubled for expanded variables
31919+* thus build &MASTR as a copy of '&ARGS with ' doubled
31920+*
31921+*
31922+*,// EX R2,T610I
31923+*
31924+* finally generate code: &ICNT copies of &CODE &ARGS
31925+*
015B52 4420 C0FA 15C2A 31926+ EX R2,T610I
015B56 4420 C0FA 15C2A 31927+ EX R2,T610I
015B5A 4420 C0FA 15C2A 31928+ EX R2,T610I
015B5E 4420 C0FA 15C2A 31929+ EX R2,T610I
015B62 4420 C0FA 15C2A 31930+ EX R2,T610I
015B66 4420 C0FA 15C2A 31931+ EX R2,T610I
015B6A 4420 C0FA 15C2A 31932+ EX R2,T610I
015B6E 4420 C0FA 15C2A 31933+ EX R2,T610I
015B72 4420 C0FA 15C2A 31934+ EX R2,T610I
015B76 4420 C0FA 15C2A 31935+ EX R2,T610I
015B7A 4420 C0FA 15C2A 31936+ EX R2,T610I
015B7E 4420 C0FA 15C2A 31937+ EX R2,T610I
015B82 4420 C0FA 15C2A 31938+ EX R2,T610I
015B86 4420 C0FA 15C2A 31939+ EX R2,T610I
015B8A 4420 C0FA 15C2A 31940+ EX R2,T610I
015B8E 4420 C0FA 15C2A 31941+ EX R2,T610I
015B92 4420 C0FA 15C2A 31942+ EX R2,T610I
015B96 4420 C0FA 15C2A 31943+ EX R2,T610I
015B9A 4420 C0FA 15C2A 31944+ EX R2,T610I
015B9E 4420 C0FA 15C2A 31945+ EX R2,T610I
015BA2 4420 C0FA 15C2A 31946+ EX R2,T610I
015BA6 4420 C0FA 15C2A 31947+ EX R2,T610I
015BAA 4420 C0FA 15C2A 31948+ EX R2,T610I
015BAE 4420 C0FA 15C2A 31949+ EX R2,T610I
015BB2 4420 C0FA 15C2A 31950+ EX R2,T610I
015BB6 4420 C0FA 15C2A 31951+ EX R2,T610I
015BBA 4420 C0FA 15C2A 31952+ EX R2,T610I
015BBE 4420 C0FA 15C2A 31953+ EX R2,T610I
015BC2 4420 C0FA 15C2A 31954+ EX R2,T610I
015BC6 4420 C0FA 15C2A 31955+ EX R2,T610I
015BCA 4420 C0FA 15C2A 31956+ EX R2,T610I
015BCE 4420 C0FA 15C2A 31957+ EX R2,T610I
PAGE 584
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015BD2 4420 C0FA 15C2A 31958+ EX R2,T610I
015BD6 4420 C0FA 15C2A 31959+ EX R2,T610I
015BDA 4420 C0FA 15C2A 31960+ EX R2,T610I
015BDE 4420 C0FA 15C2A 31961+ EX R2,T610I
015BE2 4420 C0FA 15C2A 31962+ EX R2,T610I
015BE6 4420 C0FA 15C2A 31963+ EX R2,T610I
015BEA 4420 C0FA 15C2A 31964+ EX R2,T610I
015BEE 4420 C0FA 15C2A 31965+ EX R2,T610I
015BF2 4420 C0FA 15C2A 31966+ EX R2,T610I
015BF6 4420 C0FA 15C2A 31967+ EX R2,T610I
015BFA 4420 C0FA 15C2A 31968+ EX R2,T610I
015BFE 4420 C0FA 15C2A 31969+ EX R2,T610I
015C02 4420 C0FA 15C2A 31970+ EX R2,T610I
015C06 4420 C0FA 15C2A 31971+ EX R2,T610I
015C0A 4420 C0FA 15C2A 31972+ EX R2,T610I
015C0E 4420 C0FA 15C2A 31973+ EX R2,T610I
015C12 4420 C0FA 15C2A 31974+ EX R2,T610I
015C16 4420 C0FA 15C2A 31975+ EX R2,T610I
31976+*
015C1A 06FB 31977 BCTR R15,R11
31978 TSIMRET
015C1C 58F0 C100 15C30 31979+ L R15,=A(SAVETST) R15 := current save area
015C20 58DF 0004 00004 31980+ L R13,4(R15) get old save area back
015C24 98EC D00C 0000C 31981+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
015C28 07FE 31982+ BR 14 RETURN 02000000
31983 *
015C2A 9100 C0FE 15C2E 31984 T610I TM T610V,X'00' executed via EX
015C2E 01 31985 T610V DC X'01' target for TM instruction
31986 TSIMEND
015C30 31987+ LTORG
015C30 00000458 31988 =A(SAVETST)
15C34 31989+T610TEND EQU *
31990 *
31991 * Test 611 -- EX R,i (with XI) -----------------------------
31992 *
31993 TSIMBEG T611,3500,50,1,C'EX R,i (with XI)'
31994+*
004044 31995+TDSCDAT CSECT
004048 31996+ DS 0D
31997+*
004048 00015C38 31998+T611TDSC DC A(T611) // TENTRY
00404C 00000104 31999+ DC A(T611TEND-T611) // TLENGTH
004050 00000DAC 32000+ DC F'3500' // TLRCNT
004054 00000032 32001+ DC F'50' // TIGCNT
004058 00000001 32002+ DC F'1' // TLTYPE
001D02 32003+TEXT CSECT
001D02 E3F6F1F1 32004+SPTR2817 DC C'T611'
00405C 32005+TDSCDAT CSECT
00405C 32006+ DS 0F
00405C 04001D02 32007+ DC AL1(L'SPTR2817),AL3(SPTR2817)
001D06 32008+TEXT CSECT
001D06 C5E740D96B89404D 32009+SPTR2818 DC C'EX R,i (with XI)'
004060 32010+TDSCDAT CSECT
004060 32011+ DS 0F
004060 10001D06 32012+ DC AL1(L'SPTR2818),AL3(SPTR2818)
PAGE 585
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
32013+*
004D34 32014+TDSCTBL CSECT
04D34 32015+T611TPTR EQU *
004D34 00004048 32016+ DC A(T611TDSC) enabled test
32017+*
015C34 32018+TCODE CSECT
015C38 32019+ DS 0D ensure double word alignment for test
015C38 32020+T611 DS 0H 01650000
015C38 90EC D00C 0000C 32021+ STM 14,12,12(13) SAVE REGISTERS 02950000
015C3C 18CF 32022+ LR R12,R15 base register := entry address
15C38 32023+ USING T611,R12 declare code base register
015C3E 41B0 C022 15C5A 32024+ LA R11,T611L load loop target to R11
015C42 58F0 C100 15D38 32025+ L R15,=A(SAVETST) R15 := current save area
015C46 50DF 0004 00004 32026+ ST R13,4(R15) set back pointer in current save area
015C4A 182D 32027+ LR R2,R13 remember callers save area
015C4C 18DF 32028+ LR R13,R15 setup current save area
015C4E 50D2 0008 00008 32029+ ST R13,8(R2) set forw pointer in callers save area
00000 32030+ USING TDSC,R1 declare TDSC base register
015C52 58F0 1008 00008 32031+ L R15,TLRCNT load local repeat count to R15
32032+*
32033 *
015C56 4120 0003 00003 32034 LA R2,X'03'
32035 T611L REPINS EX,(R2,T611I) repeat: EX R2,T611I
32036+*
32037+* build from sublist &ALIST a comma separated string &ARGS
32038+*
32039+*
32040+*
32041+*
32042+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
32043+* this allows to transfer the repeat count from last TDSCGEN call
32044+*
32045+*
15C5A 32046+T611L EQU *
32047+*
32048+* write a comment indicating what REPINS does (in case NOGEN in effect)
32049+*
32050+*,// REPINS: do 50 times:
32051+*
32052+* MNOTE requires that ' is doubled for expanded variables
32053+* thus build &MASTR as a copy of '&ARGS with ' doubled
32054+*
32055+*
32056+*,// EX R2,T611I
32057+*
32058+* finally generate code: &ICNT copies of &CODE &ARGS
32059+*
015C5A 4420 C0FA 15D32 32060+ EX R2,T611I
015C5E 4420 C0FA 15D32 32061+ EX R2,T611I
015C62 4420 C0FA 15D32 32062+ EX R2,T611I
015C66 4420 C0FA 15D32 32063+ EX R2,T611I
015C6A 4420 C0FA 15D32 32064+ EX R2,T611I
015C6E 4420 C0FA 15D32 32065+ EX R2,T611I
015C72 4420 C0FA 15D32 32066+ EX R2,T611I
015C76 4420 C0FA 15D32 32067+ EX R2,T611I
PAGE 586
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015C7A 4420 C0FA 15D32 32068+ EX R2,T611I
015C7E 4420 C0FA 15D32 32069+ EX R2,T611I
015C82 4420 C0FA 15D32 32070+ EX R2,T611I
015C86 4420 C0FA 15D32 32071+ EX R2,T611I
015C8A 4420 C0FA 15D32 32072+ EX R2,T611I
015C8E 4420 C0FA 15D32 32073+ EX R2,T611I
015C92 4420 C0FA 15D32 32074+ EX R2,T611I
015C96 4420 C0FA 15D32 32075+ EX R2,T611I
015C9A 4420 C0FA 15D32 32076+ EX R2,T611I
015C9E 4420 C0FA 15D32 32077+ EX R2,T611I
015CA2 4420 C0FA 15D32 32078+ EX R2,T611I
015CA6 4420 C0FA 15D32 32079+ EX R2,T611I
015CAA 4420 C0FA 15D32 32080+ EX R2,T611I
015CAE 4420 C0FA 15D32 32081+ EX R2,T611I
015CB2 4420 C0FA 15D32 32082+ EX R2,T611I
015CB6 4420 C0FA 15D32 32083+ EX R2,T611I
015CBA 4420 C0FA 15D32 32084+ EX R2,T611I
015CBE 4420 C0FA 15D32 32085+ EX R2,T611I
015CC2 4420 C0FA 15D32 32086+ EX R2,T611I
015CC6 4420 C0FA 15D32 32087+ EX R2,T611I
015CCA 4420 C0FA 15D32 32088+ EX R2,T611I
015CCE 4420 C0FA 15D32 32089+ EX R2,T611I
015CD2 4420 C0FA 15D32 32090+ EX R2,T611I
015CD6 4420 C0FA 15D32 32091+ EX R2,T611I
015CDA 4420 C0FA 15D32 32092+ EX R2,T611I
015CDE 4420 C0FA 15D32 32093+ EX R2,T611I
015CE2 4420 C0FA 15D32 32094+ EX R2,T611I
015CE6 4420 C0FA 15D32 32095+ EX R2,T611I
015CEA 4420 C0FA 15D32 32096+ EX R2,T611I
015CEE 4420 C0FA 15D32 32097+ EX R2,T611I
015CF2 4420 C0FA 15D32 32098+ EX R2,T611I
015CF6 4420 C0FA 15D32 32099+ EX R2,T611I
015CFA 4420 C0FA 15D32 32100+ EX R2,T611I
015CFE 4420 C0FA 15D32 32101+ EX R2,T611I
015D02 4420 C0FA 15D32 32102+ EX R2,T611I
015D06 4420 C0FA 15D32 32103+ EX R2,T611I
015D0A 4420 C0FA 15D32 32104+ EX R2,T611I
015D0E 4420 C0FA 15D32 32105+ EX R2,T611I
015D12 4420 C0FA 15D32 32106+ EX R2,T611I
015D16 4420 C0FA 15D32 32107+ EX R2,T611I
015D1A 4420 C0FA 15D32 32108+ EX R2,T611I
015D1E 4420 C0FA 15D32 32109+ EX R2,T611I
32110+*
015D22 06FB 32111 BCTR R15,R11
32112 TSIMRET
015D24 58F0 C100 15D38 32113+ L R15,=A(SAVETST) R15 := current save area
015D28 58DF 0004 00004 32114+ L R13,4(R15) get old save area back
015D2C 98EC D00C 0000C 32115+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
015D30 07FE 32116+ BR 14 RETURN 02000000
32117 *
015D32 9700 C0FE 15D36 32118 T611I XI T611V,X'00' executed via EX
015D36 F1 32119 T611V DC X'F1' target for XI instruction
32120 TSIMEND
015D38 32121+ LTORG
015D38 00000458 32122 =A(SAVETST)
PAGE 587
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
15D3C 32123+T611TEND EQU *
32124 *
32125 * Test 620 -- TS m (zero) ----------------------------------
32126 *
32127 TSIMBEG T620,2300,50,1,C'MVI;TS m (zero)'
32128+*
004064 32129+TDSCDAT CSECT
004068 32130+ DS 0D
32131+*
004068 00015D40 32132+T620TDSC DC A(T620) // TENTRY
00406C 000001C4 32133+ DC A(T620TEND-T620) // TLENGTH
004070 000008FC 32134+ DC F'2300' // TLRCNT
004074 00000032 32135+ DC F'50' // TIGCNT
004078 00000001 32136+ DC F'1' // TLTYPE
001D16 32137+TEXT CSECT
001D16 E3F6F2F0 32138+SPTR2829 DC C'T620'
00407C 32139+TDSCDAT CSECT
00407C 32140+ DS 0F
00407C 04001D16 32141+ DC AL1(L'SPTR2829),AL3(SPTR2829)
001D1A 32142+TEXT CSECT
001D1A D4E5C95EE3E24094 32143+SPTR2830 DC C'MVI;TS m (zero)'
004080 32144+TDSCDAT CSECT
004080 32145+ DS 0F
004080 0F001D1A 32146+ DC AL1(L'SPTR2830),AL3(SPTR2830)
32147+*
004D38 32148+TDSCTBL CSECT
04D38 32149+T620TPTR EQU *
004D38 00004068 32150+ DC A(T620TDSC) enabled test
32151+*
015D3C 32152+TCODE CSECT
015D40 32153+ DS 0D ensure double word alignment for test
015D40 32154+T620 DS 0H 01650000
015D40 90EC D00C 0000C 32155+ STM 14,12,12(13) SAVE REGISTERS 02950000
015D44 18CF 32156+ LR R12,R15 base register := entry address
15D40 32157+ USING T620,R12 declare code base register
015D46 41B0 C01E 15D5E 32158+ LA R11,T620L load loop target to R11
015D4A 58F0 C1C0 15F00 32159+ L R15,=A(SAVETST) R15 := current save area
015D4E 50DF 0004 00004 32160+ ST R13,4(R15) set back pointer in current save area
015D52 182D 32161+ LR R2,R13 remember callers save area
015D54 18DF 32162+ LR R13,R15 setup current save area
015D56 50D2 0008 00008 32163+ ST R13,8(R2) set forw pointer in callers save area
00000 32164+ USING TDSC,R1 declare TDSC base register
015D5A 58F0 1008 00008 32165+ L R15,TLRCNT load local repeat count to R15
32166+*
32167 *
32168 * use sequence
32169 * MVI T620V,X'00' set byte to all zeros
32170 * TS T620V test and set
32171 *
32172 T620L REPINSN MVI,(T620V,X'00'),TS,(T620V)
32173+*
32174+* build from sublist &ALIST* a comma separated string &ARGS*
32175+*
32176+*
32177+*
PAGE 588
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
32178+*
32179+*
32180+*
15D5E 32181+T620L EQU *
32182+*
32183+*
32184+* write a comment indicating what REPINSN does (if NOGEN in effect)
32185+*
32186+*,// REPINSN: do 50 times:
32187+*
32188+* MNOTE requires that ' is doubled for expanded variables
32189+* thus build &MASTR as a copy of '&ARGS with ' doubled
32190+*
32191+*
32192+*,// MVI T620V,X'00'
32193+*
32194+* MNOTE requires that ' is doubled for expanded variables
32195+* thus build &MASTR as a copy of '&ARGS with ' doubled
32196+*
32197+*
32198+*,// TS T620V
32199+*
32200+* finally generate code: &ICNT copies of &CO1 ...
32201+*
015D5E 9200 C1BE 15EFE 32202+ MVI T620V,X'00'
015D62 9300 C1BE 15EFE 32203+ TS T620V
015D66 9200 C1BE 15EFE 32204+ MVI T620V,X'00'
015D6A 9300 C1BE 15EFE 32205+ TS T620V
015D6E 9200 C1BE 15EFE 32206+ MVI T620V,X'00'
015D72 9300 C1BE 15EFE 32207+ TS T620V
015D76 9200 C1BE 15EFE 32208+ MVI T620V,X'00'
015D7A 9300 C1BE 15EFE 32209+ TS T620V
015D7E 9200 C1BE 15EFE 32210+ MVI T620V,X'00'
015D82 9300 C1BE 15EFE 32211+ TS T620V
015D86 9200 C1BE 15EFE 32212+ MVI T620V,X'00'
015D8A 9300 C1BE 15EFE 32213+ TS T620V
015D8E 9200 C1BE 15EFE 32214+ MVI T620V,X'00'
015D92 9300 C1BE 15EFE 32215+ TS T620V
015D96 9200 C1BE 15EFE 32216+ MVI T620V,X'00'
015D9A 9300 C1BE 15EFE 32217+ TS T620V
015D9E 9200 C1BE 15EFE 32218+ MVI T620V,X'00'
015DA2 9300 C1BE 15EFE 32219+ TS T620V
015DA6 9200 C1BE 15EFE 32220+ MVI T620V,X'00'
015DAA 9300 C1BE 15EFE 32221+ TS T620V
015DAE 9200 C1BE 15EFE 32222+ MVI T620V,X'00'
015DB2 9300 C1BE 15EFE 32223+ TS T620V
015DB6 9200 C1BE 15EFE 32224+ MVI T620V,X'00'
015DBA 9300 C1BE 15EFE 32225+ TS T620V
015DBE 9200 C1BE 15EFE 32226+ MVI T620V,X'00'
015DC2 9300 C1BE 15EFE 32227+ TS T620V
015DC6 9200 C1BE 15EFE 32228+ MVI T620V,X'00'
015DCA 9300 C1BE 15EFE 32229+ TS T620V
015DCE 9200 C1BE 15EFE 32230+ MVI T620V,X'00'
015DD2 9300 C1BE 15EFE 32231+ TS T620V
015DD6 9200 C1BE 15EFE 32232+ MVI T620V,X'00'
PAGE 589
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015DDA 9300 C1BE 15EFE 32233+ TS T620V
015DDE 9200 C1BE 15EFE 32234+ MVI T620V,X'00'
015DE2 9300 C1BE 15EFE 32235+ TS T620V
015DE6 9200 C1BE 15EFE 32236+ MVI T620V,X'00'
015DEA 9300 C1BE 15EFE 32237+ TS T620V
015DEE 9200 C1BE 15EFE 32238+ MVI T620V,X'00'
015DF2 9300 C1BE 15EFE 32239+ TS T620V
015DF6 9200 C1BE 15EFE 32240+ MVI T620V,X'00'
015DFA 9300 C1BE 15EFE 32241+ TS T620V
015DFE 9200 C1BE 15EFE 32242+ MVI T620V,X'00'
015E02 9300 C1BE 15EFE 32243+ TS T620V
015E06 9200 C1BE 15EFE 32244+ MVI T620V,X'00'
015E0A 9300 C1BE 15EFE 32245+ TS T620V
015E0E 9200 C1BE 15EFE 32246+ MVI T620V,X'00'
015E12 9300 C1BE 15EFE 32247+ TS T620V
015E16 9200 C1BE 15EFE 32248+ MVI T620V,X'00'
015E1A 9300 C1BE 15EFE 32249+ TS T620V
015E1E 9200 C1BE 15EFE 32250+ MVI T620V,X'00'
015E22 9300 C1BE 15EFE 32251+ TS T620V
015E26 9200 C1BE 15EFE 32252+ MVI T620V,X'00'
015E2A 9300 C1BE 15EFE 32253+ TS T620V
015E2E 9200 C1BE 15EFE 32254+ MVI T620V,X'00'
015E32 9300 C1BE 15EFE 32255+ TS T620V
015E36 9200 C1BE 15EFE 32256+ MVI T620V,X'00'
015E3A 9300 C1BE 15EFE 32257+ TS T620V
015E3E 9200 C1BE 15EFE 32258+ MVI T620V,X'00'
015E42 9300 C1BE 15EFE 32259+ TS T620V
015E46 9200 C1BE 15EFE 32260+ MVI T620V,X'00'
015E4A 9300 C1BE 15EFE 32261+ TS T620V
015E4E 9200 C1BE 15EFE 32262+ MVI T620V,X'00'
015E52 9300 C1BE 15EFE 32263+ TS T620V
015E56 9200 C1BE 15EFE 32264+ MVI T620V,X'00'
015E5A 9300 C1BE 15EFE 32265+ TS T620V
015E5E 9200 C1BE 15EFE 32266+ MVI T620V,X'00'
015E62 9300 C1BE 15EFE 32267+ TS T620V
015E66 9200 C1BE 15EFE 32268+ MVI T620V,X'00'
015E6A 9300 C1BE 15EFE 32269+ TS T620V
015E6E 9200 C1BE 15EFE 32270+ MVI T620V,X'00'
015E72 9300 C1BE 15EFE 32271+ TS T620V
015E76 9200 C1BE 15EFE 32272+ MVI T620V,X'00'
015E7A 9300 C1BE 15EFE 32273+ TS T620V
015E7E 9200 C1BE 15EFE 32274+ MVI T620V,X'00'
015E82 9300 C1BE 15EFE 32275+ TS T620V
015E86 9200 C1BE 15EFE 32276+ MVI T620V,X'00'
015E8A 9300 C1BE 15EFE 32277+ TS T620V
015E8E 9200 C1BE 15EFE 32278+ MVI T620V,X'00'
015E92 9300 C1BE 15EFE 32279+ TS T620V
015E96 9200 C1BE 15EFE 32280+ MVI T620V,X'00'
015E9A 9300 C1BE 15EFE 32281+ TS T620V
015E9E 9200 C1BE 15EFE 32282+ MVI T620V,X'00'
015EA2 9300 C1BE 15EFE 32283+ TS T620V
015EA6 9200 C1BE 15EFE 32284+ MVI T620V,X'00'
015EAA 9300 C1BE 15EFE 32285+ TS T620V
015EAE 9200 C1BE 15EFE 32286+ MVI T620V,X'00'
015EB2 9300 C1BE 15EFE 32287+ TS T620V
PAGE 590
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015EB6 9200 C1BE 15EFE 32288+ MVI T620V,X'00'
015EBA 9300 C1BE 15EFE 32289+ TS T620V
015EBE 9200 C1BE 15EFE 32290+ MVI T620V,X'00'
015EC2 9300 C1BE 15EFE 32291+ TS T620V
015EC6 9200 C1BE 15EFE 32292+ MVI T620V,X'00'
015ECA 9300 C1BE 15EFE 32293+ TS T620V
015ECE 9200 C1BE 15EFE 32294+ MVI T620V,X'00'
015ED2 9300 C1BE 15EFE 32295+ TS T620V
015ED6 9200 C1BE 15EFE 32296+ MVI T620V,X'00'
015EDA 9300 C1BE 15EFE 32297+ TS T620V
015EDE 9200 C1BE 15EFE 32298+ MVI T620V,X'00'
015EE2 9300 C1BE 15EFE 32299+ TS T620V
015EE6 9200 C1BE 15EFE 32300+ MVI T620V,X'00'
015EEA 9300 C1BE 15EFE 32301+ TS T620V
32302+*
015EEE 06FB 32303 BCTR R15,R11
32304 TSIMRET
015EF0 58F0 C1C0 15F00 32305+ L R15,=A(SAVETST) R15 := current save area
015EF4 58DF 0004 00004 32306+ L R13,4(R15) get old save area back
015EF8 98EC D00C 0000C 32307+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
015EFC 07FE 32308+ BR 14 RETURN 02000000
32309 *
015EFE 00 32310 T620V DC X'00' target for TS instruction
32311 TSIMEND
015F00 32312+ LTORG
015F00 00000458 32313 =A(SAVETST)
15F04 32314+T620TEND EQU *
32315 *
32316 * Test 621 -- TS m (ones) ----------------------------------
32317 *
32318 TSIMBEG T621,500,50,1,C'MVI;TS m (ones)'
32319+*
004084 32320+TDSCDAT CSECT
004088 32321+ DS 0D
32322+*
004088 00015F08 32323+T621TDSC DC A(T621) // TENTRY
00408C 000001C4 32324+ DC A(T621TEND-T621) // TLENGTH
004090 000001F4 32325+ DC F'500' // TLRCNT
004094 00000032 32326+ DC F'50' // TIGCNT
004098 00000001 32327+ DC F'1' // TLTYPE
001D29 32328+TEXT CSECT
001D29 E3F6F2F1 32329+SPTR2843 DC C'T621'
00409C 32330+TDSCDAT CSECT
00409C 32331+ DS 0F
00409C 04001D29 32332+ DC AL1(L'SPTR2843),AL3(SPTR2843)
001D2D 32333+TEXT CSECT
001D2D D4E5C95EE3E24094 32334+SPTR2844 DC C'MVI;TS m (ones)'
0040A0 32335+TDSCDAT CSECT
0040A0 32336+ DS 0F
0040A0 0F001D2D 32337+ DC AL1(L'SPTR2844),AL3(SPTR2844)
32338+*
004D3C 32339+TDSCTBL CSECT
04D3C 32340+T621TPTR EQU *
004D3C 00004088 32341+ DC A(T621TDSC) enabled test
32342+*
PAGE 591
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015F04 32343+TCODE CSECT
015F08 32344+ DS 0D ensure double word alignment for test
015F08 32345+T621 DS 0H 01650000
015F08 90EC D00C 0000C 32346+ STM 14,12,12(13) SAVE REGISTERS 02950000
015F0C 18CF 32347+ LR R12,R15 base register := entry address
15F08 32348+ USING T621,R12 declare code base register
015F0E 41B0 C01E 15F26 32349+ LA R11,T621L load loop target to R11
015F12 58F0 C1C0 160C8 32350+ L R15,=A(SAVETST) R15 := current save area
015F16 50DF 0004 00004 32351+ ST R13,4(R15) set back pointer in current save area
015F1A 182D 32352+ LR R2,R13 remember callers save area
015F1C 18DF 32353+ LR R13,R15 setup current save area
015F1E 50D2 0008 00008 32354+ ST R13,8(R2) set forw pointer in callers save area
00000 32355+ USING TDSC,R1 declare TDSC base register
015F22 58F0 1008 00008 32356+ L R15,TLRCNT load local repeat count to R15
32357+*
32358 *
32359 * use sequence
32360 * MVI T621V,X'FF' set byte to all zeros
32361 * TS T621V test and set
32362 *
32363 T621L REPINSN MVI,(T621V,X'FF'),TS,(T621V)
32364+*
32365+* build from sublist &ALIST* a comma separated string &ARGS*
32366+*
32367+*
32368+*
32369+*
32370+*
32371+*
15F26 32372+T621L EQU *
32373+*
32374+*
32375+* write a comment indicating what REPINSN does (if NOGEN in effect)
32376+*
32377+*,// REPINSN: do 50 times:
32378+*
32379+* MNOTE requires that ' is doubled for expanded variables
32380+* thus build &MASTR as a copy of '&ARGS with ' doubled
32381+*
32382+*
32383+*,// MVI T621V,X'FF'
32384+*
32385+* MNOTE requires that ' is doubled for expanded variables
32386+* thus build &MASTR as a copy of '&ARGS with ' doubled
32387+*
32388+*
32389+*,// TS T621V
32390+*
32391+* finally generate code: &ICNT copies of &CO1 ...
32392+*
015F26 92FF C1BE 160C6 32393+ MVI T621V,X'FF'
015F2A 9300 C1BE 160C6 32394+ TS T621V
015F2E 92FF C1BE 160C6 32395+ MVI T621V,X'FF'
015F32 9300 C1BE 160C6 32396+ TS T621V
015F36 92FF C1BE 160C6 32397+ MVI T621V,X'FF'
PAGE 592
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
015F3A 9300 C1BE 160C6 32398+ TS T621V
015F3E 92FF C1BE 160C6 32399+ MVI T621V,X'FF'
015F42 9300 C1BE 160C6 32400+ TS T621V
015F46 92FF C1BE 160C6 32401+ MVI T621V,X'FF'
015F4A 9300 C1BE 160C6 32402+ TS T621V
015F4E 92FF C1BE 160C6 32403+ MVI T621V,X'FF'
015F52 9300 C1BE 160C6 32404+ TS T621V
015F56 92FF C1BE 160C6 32405+ MVI T621V,X'FF'
015F5A 9300 C1BE 160C6 32406+ TS T621V
015F5E 92FF C1BE 160C6 32407+ MVI T621V,X'FF'
015F62 9300 C1BE 160C6 32408+ TS T621V
015F66 92FF C1BE 160C6 32409+ MVI T621V,X'FF'
015F6A 9300 C1BE 160C6 32410+ TS T621V
015F6E 92FF C1BE 160C6 32411+ MVI T621V,X'FF'
015F72 9300 C1BE 160C6 32412+ TS T621V
015F76 92FF C1BE 160C6 32413+ MVI T621V,X'FF'
015F7A 9300 C1BE 160C6 32414+ TS T621V
015F7E 92FF C1BE 160C6 32415+ MVI T621V,X'FF'
015F82 9300 C1BE 160C6 32416+ TS T621V
015F86 92FF C1BE 160C6 32417+ MVI T621V,X'FF'
015F8A 9300 C1BE 160C6 32418+ TS T621V
015F8E 92FF C1BE 160C6 32419+ MVI T621V,X'FF'
015F92 9300 C1BE 160C6 32420+ TS T621V
015F96 92FF C1BE 160C6 32421+ MVI T621V,X'FF'
015F9A 9300 C1BE 160C6 32422+ TS T621V
015F9E 92FF C1BE 160C6 32423+ MVI T621V,X'FF'
015FA2 9300 C1BE 160C6 32424+ TS T621V
015FA6 92FF C1BE 160C6 32425+ MVI T621V,X'FF'
015FAA 9300 C1BE 160C6 32426+ TS T621V
015FAE 92FF C1BE 160C6 32427+ MVI T621V,X'FF'
015FB2 9300 C1BE 160C6 32428+ TS T621V
015FB6 92FF C1BE 160C6 32429+ MVI T621V,X'FF'
015FBA 9300 C1BE 160C6 32430+ TS T621V
015FBE 92FF C1BE 160C6 32431+ MVI T621V,X'FF'
015FC2 9300 C1BE 160C6 32432+ TS T621V
015FC6 92FF C1BE 160C6 32433+ MVI T621V,X'FF'
015FCA 9300 C1BE 160C6 32434+ TS T621V
015FCE 92FF C1BE 160C6 32435+ MVI T621V,X'FF'
015FD2 9300 C1BE 160C6 32436+ TS T621V
015FD6 92FF C1BE 160C6 32437+ MVI T621V,X'FF'
015FDA 9300 C1BE 160C6 32438+ TS T621V
015FDE 92FF C1BE 160C6 32439+ MVI T621V,X'FF'
015FE2 9300 C1BE 160C6 32440+ TS T621V
015FE6 92FF C1BE 160C6 32441+ MVI T621V,X'FF'
015FEA 9300 C1BE 160C6 32442+ TS T621V
015FEE 92FF C1BE 160C6 32443+ MVI T621V,X'FF'
015FF2 9300 C1BE 160C6 32444+ TS T621V
015FF6 92FF C1BE 160C6 32445+ MVI T621V,X'FF'
015FFA 9300 C1BE 160C6 32446+ TS T621V
015FFE 92FF C1BE 160C6 32447+ MVI T621V,X'FF'
016002 9300 C1BE 160C6 32448+ TS T621V
016006 92FF C1BE 160C6 32449+ MVI T621V,X'FF'
01600A 9300 C1BE 160C6 32450+ TS T621V
01600E 92FF C1BE 160C6 32451+ MVI T621V,X'FF'
016012 9300 C1BE 160C6 32452+ TS T621V
PAGE 593
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016016 92FF C1BE 160C6 32453+ MVI T621V,X'FF'
01601A 9300 C1BE 160C6 32454+ TS T621V
01601E 92FF C1BE 160C6 32455+ MVI T621V,X'FF'
016022 9300 C1BE 160C6 32456+ TS T621V
016026 92FF C1BE 160C6 32457+ MVI T621V,X'FF'
01602A 9300 C1BE 160C6 32458+ TS T621V
01602E 92FF C1BE 160C6 32459+ MVI T621V,X'FF'
016032 9300 C1BE 160C6 32460+ TS T621V
016036 92FF C1BE 160C6 32461+ MVI T621V,X'FF'
01603A 9300 C1BE 160C6 32462+ TS T621V
01603E 92FF C1BE 160C6 32463+ MVI T621V,X'FF'
016042 9300 C1BE 160C6 32464+ TS T621V
016046 92FF C1BE 160C6 32465+ MVI T621V,X'FF'
01604A 9300 C1BE 160C6 32466+ TS T621V
01604E 92FF C1BE 160C6 32467+ MVI T621V,X'FF'
016052 9300 C1BE 160C6 32468+ TS T621V
016056 92FF C1BE 160C6 32469+ MVI T621V,X'FF'
01605A 9300 C1BE 160C6 32470+ TS T621V
01605E 92FF C1BE 160C6 32471+ MVI T621V,X'FF'
016062 9300 C1BE 160C6 32472+ TS T621V
016066 92FF C1BE 160C6 32473+ MVI T621V,X'FF'
01606A 9300 C1BE 160C6 32474+ TS T621V
01606E 92FF C1BE 160C6 32475+ MVI T621V,X'FF'
016072 9300 C1BE 160C6 32476+ TS T621V
016076 92FF C1BE 160C6 32477+ MVI T621V,X'FF'
01607A 9300 C1BE 160C6 32478+ TS T621V
01607E 92FF C1BE 160C6 32479+ MVI T621V,X'FF'
016082 9300 C1BE 160C6 32480+ TS T621V
016086 92FF C1BE 160C6 32481+ MVI T621V,X'FF'
01608A 9300 C1BE 160C6 32482+ TS T621V
01608E 92FF C1BE 160C6 32483+ MVI T621V,X'FF'
016092 9300 C1BE 160C6 32484+ TS T621V
016096 92FF C1BE 160C6 32485+ MVI T621V,X'FF'
01609A 9300 C1BE 160C6 32486+ TS T621V
01609E 92FF C1BE 160C6 32487+ MVI T621V,X'FF'
0160A2 9300 C1BE 160C6 32488+ TS T621V
0160A6 92FF C1BE 160C6 32489+ MVI T621V,X'FF'
0160AA 9300 C1BE 160C6 32490+ TS T621V
0160AE 92FF C1BE 160C6 32491+ MVI T621V,X'FF'
0160B2 9300 C1BE 160C6 32492+ TS T621V
32493+*
0160B6 06FB 32494 BCTR R15,R11
32495 TSIMRET
0160B8 58F0 C1C0 160C8 32496+ L R15,=A(SAVETST) R15 := current save area
0160BC 58DF 0004 00004 32497+ L R13,4(R15) get old save area back
0160C0 98EC D00C 0000C 32498+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0160C4 07FE 32499+ BR 14 RETURN 02000000
32500 *
0160C6 FF 32501 T621V DC X'FF' target for TS instruction
32502 TSIMEND
0160C8 32503+ LTORG
0160C8 00000458 32504 =A(SAVETST)
160CC 32505+T621TEND EQU *
32506 *
32507 * Test 7xx -- mix sequence ======================================
PAGE 594
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
32508 *
32509 * Test 700 -- Mix Int RR basic -----------------------------
32510 *
32511 TSIMBEG T700,20000,40,1,C'mix int RR basic'
32512+*
0040A4 32513+TDSCDAT CSECT
0040A8 32514+ DS 0D
32515+*
0040A8 000160D0 32516+T700TDSC DC A(T700) // TENTRY
0040AC 000000A4 32517+ DC A(T700TEND-T700) // TLENGTH
0040B0 00004E20 32518+ DC F'20000' // TLRCNT
0040B4 00000028 32519+ DC F'40' // TIGCNT
0040B8 00000001 32520+ DC F'1' // TLTYPE
001D3C 32521+TEXT CSECT
001D3C E3F7F0F0 32522+SPTR2857 DC C'T700'
0040BC 32523+TDSCDAT CSECT
0040BC 32524+ DS 0F
0040BC 04001D3C 32525+ DC AL1(L'SPTR2857),AL3(SPTR2857)
001D40 32526+TEXT CSECT
001D40 9489A7408995A340 32527+SPTR2858 DC C'mix int RR basic'
0040C0 32528+TDSCDAT CSECT
0040C0 32529+ DS 0F
0040C0 10001D40 32530+ DC AL1(L'SPTR2858),AL3(SPTR2858)
32531+*
004D40 32532+TDSCTBL CSECT
04D40 32533+T700TPTR EQU *
004D40 000040A8 32534+ DC A(T700TDSC) enabled test
32535+*
0160CC 32536+TCODE CSECT
0160D0 32537+ DS 0D ensure double word alignment for test
0160D0 32538+T700 DS 0H 01650000
0160D0 90EC D00C 0000C 32539+ STM 14,12,12(13) SAVE REGISTERS 02950000
0160D4 18CF 32540+ LR R12,R15 base register := entry address
160D0 32541+ USING T700,R12 declare code base register
0160D6 41B0 C01E 160EE 32542+ LA R11,T700L load loop target to R11
0160DA 58F0 C0A0 16170 32543+ L R15,=A(SAVETST) R15 := current save area
0160DE 50DF 0004 00004 32544+ ST R13,4(R15) set back pointer in current save area
0160E2 182D 32545+ LR R2,R13 remember callers save area
0160E4 18DF 32546+ LR R13,R15 setup current save area
0160E6 50D2 0008 00008 32547+ ST R13,8(R2) set forw pointer in callers save area
00000 32548+ USING TDSC,R1 declare TDSC base register
0160EA 58F0 1008 00008 32549+ L R15,TLRCNT load local repeat count to R15
32550+*
32551 *
160EE 32552 T700L EQU *
0160EE 4120 0001 00001 32553 LA R2,1 R2 :=00000001 FIN 01
0160F2 1832 32554 LR R3,R2 R3 :=00000001 02
0160F4 8B30 0008 00008 32555 SLA R3,8 R3 :=00000100 FIN 03
0160F8 1744 32556 XR R4,R4 R4 :=00000000 04
0160FA 1643 32557 OR R4,R3 R4 :=00000100 05
0160FC 0640 32558 BCTR R4,0 R4 :=000000FF FIN 06
0160FE 1354 32559 LCR R5,R4 R5 :=FFFFFF01 07
016100 8950 0002 00002 32560 SLL R5,2 R5 :=FFFFFC04 FIN 08
016104 1065 32561 LPR R6,R5 R6 :=000003FC 09
016106 1A61 32562 AR R6,R1 R6 :=000003FD 10
PAGE 595
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016108 1961 32563 CR R6,R1 != 11
01610A 4780 C094 16164 32564 BE T700BAD 12
01610E 1173 32565 LNR R7,R3 R7 :=FFFFFF00 13
016110 1476 32566 NR R7,R6 R7 :=00000300 14
016112 8A70 0002 00002 32567 SRA R7,2 R7 :=000000C0 15
016116 1B74 32568 SR R7,R4 R7 :=FFFFFFC1 16
016118 1283 32569 LTR R8,R3 R8 :=00000100 17
01611A 8880 0001 00001 32570 SRL R8,1 R8 :=00000080 18
01611E 1E83 32571 ALR R8,R3 R8 :=00000180 19
016120 1F87 32572 SLR R8,R7 R8 :=000001BF 20
016122 1583 32573 CLR R8,R3 != 21
016124 4780 C094 16164 32574 BE T700BAD 22
016128 4190 025A 0025A 32575 LA R9,602 R9 :=0000025A 23
01612C 1794 32576 XR R9,R4 R9 :=000002A5 FIN 24
01612E 12A9 32577 LTR R10,R9 R10:=000002A5 25
016130 1AA9 32578 AR R10,R9 R10:=000004FF 26
016132 16A5 32579 OR R10,R5 R10:=FFFFFCFF 27
016134 106A 32580 LPR R6,R10 R6 :=00000301 28
016136 1E64 32581 ALR R6,R4 R6 :=00000400 29
016138 8B60 0001 00001 32582 SLA R6,1 R6 :=00000800 30
01613C 1B69 32583 SR R6,R9 R6 :=0000055B 31
01613E 0660 32584 BCTR R6,0 R6 :=0000055A 32
016140 1465 32585 NR R6,R5 R6 :=00000400 33
016142 8A60 0005 00005 32586 SRA R6,5 R6 :=00000020 34
016146 1964 32587 CR R6,R4 != 35
016148 1176 32588 LNR R7,R6 R7 :=FFFFFFC0 36
01614A 8970 0002 00002 32589 SLL R7,2 R7 :=FFFFFF00 37
01614E 1F72 32590 SLR R7,R2 R7 :=FFFFFEFF 38
016150 1387 32591 LCR R8,R7 R8 :=00000101 39
016152 1583 32592 CLR R8,R3 != 40
016154 06FB 32593 BCTR R15,R11
32594 TSIMRET
016156 58F0 C0A0 16170 32595+ L R15,=A(SAVETST) R15 := current save area
01615A 58DF 0004 00004 32596+ L R13,4(R15) get old save area back
01615E 98EC D00C 0000C 32597+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016162 07FE 32598+ BR 14 RETURN 02000000
32599 *
016164 32600 DS 0H
32601 T700BAD ABEND 60
016164 32602+T700BAD DS 0H 00400002
016164 4110 003C 0003C 32603+ LA 1,60 LOAD PARAMETER REG 1 01900002
016168 0A0D 32604+ SVC 13 LINK TO ABEND ROUTINE 02050002
32605 TSIMEND
016170 32606+ LTORG
016170 00000458 32607 =A(SAVETST)
16174 32608+T700TEND EQU *
32609 *
32610 * Test 701 -- Mix Int RX -----------------------------------
32611 *
32612 TSIMBEG T701,22000,21,1,C'mix int RX'
32613+*
0040C4 32614+TDSCDAT CSECT
0040C8 32615+ DS 0D
32616+*
0040C8 00016178 32617+T701TDSC DC A(T701) // TENTRY
PAGE 596
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0040CC 000000CC 32618+ DC A(T701TEND-T701) // TLENGTH
0040D0 000055F0 32619+ DC F'22000' // TLRCNT
0040D4 00000015 32620+ DC F'21' // TIGCNT
0040D8 00000001 32621+ DC F'1' // TLTYPE
001D50 32622+TEXT CSECT
001D50 E3F7F0F1 32623+SPTR2868 DC C'T701'
0040DC 32624+TDSCDAT CSECT
0040DC 32625+ DS 0F
0040DC 04001D50 32626+ DC AL1(L'SPTR2868),AL3(SPTR2868)
001D54 32627+TEXT CSECT
001D54 9489A7408995A340 32628+SPTR2869 DC C'mix int RX'
0040E0 32629+TDSCDAT CSECT
0040E0 32630+ DS 0F
0040E0 0A001D54 32631+ DC AL1(L'SPTR2869),AL3(SPTR2869)
32632+*
004D44 32633+TDSCTBL CSECT
04D44 32634+T701TPTR EQU *
004D44 000040C8 32635+ DC A(T701TDSC) enabled test
32636+*
016174 32637+TCODE CSECT
016178 32638+ DS 0D ensure double word alignment for test
016178 32639+T701 DS 0H 01650000
016178 90EC D00C 0000C 32640+ STM 14,12,12(13) SAVE REGISTERS 02950000
01617C 18CF 32641+ LR R12,R15 base register := entry address
16178 32642+ USING T701,R12 declare code base register
01617E 41B0 C01E 16196 32643+ LA R11,T701L load loop target to R11
016182 58F0 C0C8 16240 32644+ L R15,=A(SAVETST) R15 := current save area
016186 50DF 0004 00004 32645+ ST R13,4(R15) set back pointer in current save area
01618A 182D 32646+ LR R2,R13 remember callers save area
01618C 18DF 32647+ LR R13,R15 setup current save area
01618E 50D2 0008 00008 32648+ ST R13,8(R2) set forw pointer in callers save area
00000 32649+ USING TDSC,R1 declare TDSC base register
016192 58F0 1008 00008 32650+ L R15,TLRCNT load local repeat count to R15
32651+*
32652 *
16196 32653 T701L EQU *
016196 5820 C084 161FC 32654 L R2,T701F1 R2 :=00000072 01
01619A 5A20 C088 16200 32655 A R2,T701F2 R2 :=00010072 02
01619E 5420 C08C 16204 32656 N R2,T701F3 R2 :=00010042 03
0161A2 4B20 C0BC 16234 32657 SH R2,T701H1 R2 :=00010041 04
0161A6 4C20 C0BE 16236 32658 MH R2,T701H2 R2 :=00020082 05
0161AA 4A20 C0C0 16238 32659 AH R2,T701H3 R2 :=00020182 06
0161AE 4920 C0C0 16238 32660 CH R2,T701H3 07
0161B2 5E20 C090 16208 32661 AL R2,T701F4 R2 :=00020180 08
0161B6 5B20 C094 1620C 32662 S R2,T701F5 R2 :=0002017F 09
0161BA 5620 C098 16210 32663 O R2,T701F6 R2 :=0013817F 10
0161BE 4020 C0C2 1623A 32664 STH R2,T701VH1 11
0161C2 5020 C0B0 16228 32665 ST R2,T701VF1+4 12
0161C6 5720 C09C 16214 32666 X R2,T701F7 R2 :=00030178 13
0161CA 5920 C098 16210 32667 C R2,T701F6 14
0161CE 9845 C0AC 16224 32668 LM R4,R5,T701VF1 R5 :=0013817F (1278335) 15
0161D2 5C40 C0A0 16218 32669 M R4,T701F8 R5 := (157235205) 16
0161D6 5D40 C0A4 1621C 32670 D R4,T701F9 R5 := (9249129) 17
0161DA 9045 C0B4 1622C 32671 STM R4,R5,T701VF2 18
0161DE 4860 C0C2 1623A 32672 LH R6,T701VH1 R6 :=FFFF817F 19
PAGE 597
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0161E2 5F60 C0A8 16220 32673 SL R6,T701F10 R6 :=0000017F 20
0161E6 5560 C0A4 1621C 32674 CL R6,T701F9 21
0161EA 06FB 32675 BCTR R15,R11
32676 TSIMRET
0161EC 58F0 C0C8 16240 32677+ L R15,=A(SAVETST) R15 := current save area
0161F0 58DF 0004 00004 32678+ L R13,4(R15) get old save area back
0161F4 98EC D00C 0000C 32679+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0161F8 07FE 32680+ BR 14 RETURN 02000000
32681 *
0161FC 32682 DS 0F
0161FC 00000072 32683 T701F1 DC X'00000072'
016200 00010000 32684 T701F2 DC X'00010000'
016204 FFFFFF4F 32685 T701F3 DC X'FFFFFF4F'
016208 FFFFFFFE 32686 T701F4 DC X'FFFFFFFE'
01620C 00000001 32687 T701F5 DC X'00000001'
016210 00118000 32688 T701F6 DC X'00118000'
016214 00100007 32689 T701F7 DC X'00100007'
016218 0000007B 32690 T701F8 DC F'123'
01621C 00000011 32691 T701F9 DC F'17'
016220 FFFF8000 32692 T701F10 DC X'FFFF8000'
016224 0000000000000000 32693 T701VF1 DC 2F'0'
01622C 32694 T701VF2 DS 2F
016234 32695 DS 0H
016234 0001 32696 T701H1 DC X'0001'
016236 0002 32697 T701H2 DC X'0002'
016238 0100 32698 T701H3 DC X'0100'
01623A 32699 T701VH1 DS 1H
32700 TSIMEND
016240 32701+ LTORG
016240 00000458 32702 =A(SAVETST)
16244 32703+T701TEND EQU *
32704 *
32705 * Test 702 -- Mix Int RX (far) -----------------------------
32706 *
32707 TSIMBEG T702,22000,21,1,C'mix int RX (far)'
32708+*
0040E4 32709+TDSCDAT CSECT
0040E8 32710+ DS 0D
32711+*
0040E8 00016248 32712+T702TDSC DC A(T702) // TENTRY
0040EC 00000090 32713+ DC A(T702TEND-T702) // TLENGTH
0040F0 000055F0 32714+ DC F'22000' // TLRCNT
0040F4 00000015 32715+ DC F'21' // TIGCNT
0040F8 00000001 32716+ DC F'1' // TLTYPE
001D5E 32717+TEXT CSECT
001D5E E3F7F0F2 32718+SPTR2877 DC C'T702'
0040FC 32719+TDSCDAT CSECT
0040FC 32720+ DS 0F
0040FC 04001D5E 32721+ DC AL1(L'SPTR2877),AL3(SPTR2877)
001D62 32722+TEXT CSECT
001D62 9489A7408995A340 32723+SPTR2878 DC C'mix int RX (far)'
004100 32724+TDSCDAT CSECT
004100 32725+ DS 0F
004100 10001D62 32726+ DC AL1(L'SPTR2878),AL3(SPTR2878)
32727+*
PAGE 598
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004D48 32728+TDSCTBL CSECT
04D48 32729+T702TPTR EQU *
004D48 000040E8 32730+ DC A(T702TDSC) enabled test
32731+*
016244 32732+TCODE CSECT
016248 32733+ DS 0D ensure double word alignment for test
016248 32734+T702 DS 0H 01650000
016248 90EC D00C 0000C 32735+ STM 14,12,12(13) SAVE REGISTERS 02950000
01624C 18CF 32736+ LR R12,R15 base register := entry address
16248 32737+ USING T702,R12 declare code base register
01624E 41B0 C022 1626A 32738+ LA R11,T702L load loop target to R11
016252 58F0 C088 162D0 32739+ L R15,=A(SAVETST) R15 := current save area
016256 50DF 0004 00004 32740+ ST R13,4(R15) set back pointer in current save area
01625A 182D 32741+ LR R2,R13 remember callers save area
01625C 18DF 32742+ LR R13,R15 setup current save area
01625E 50D2 0008 00008 32743+ ST R13,8(R2) set forw pointer in callers save area
00000 32744+ USING TDSC,R1 declare TDSC base register
016262 58F0 1008 00008 32745+ L R15,TLRCNT load local repeat count to R15
32746+*
32747 *
016266 58A0 C08C 162D4 32748 L R10,=A(T702CS) load base for data
1626A 32749 T702L EQU *
180B0 32750 USING T702CS,R10
01626A 5820 A000 180B0 32751 L R2,T702F1 R2 :=00000072
01626E 5A20 A004 180B4 32752 A R2,T702F2 R2 :=00010072
016272 5420 A008 180B8 32753 N R2,T702F3 R2 :=00010042
016276 4B20 A038 180E8 32754 SH R2,T702H1 R2 :=00010041
01627A 4C20 A03A 180EA 32755 MH R2,T702H2 R2 :=00020082
01627E 4A20 A03C 180EC 32756 AH R2,T702H3 R2 :=00020182
016282 4920 A03C 180EC 32757 CH R2,T702H3
016286 5E20 A00C 180BC 32758 AL R2,T702F4 R2 :=00020180
01628A 5B20 A010 180C0 32759 S R2,T702F5 R2 :=0002017F
01628E 5620 A014 180C4 32760 O R2,T702F6 R2 :=0013817F
016292 4020 A03E 180EE 32761 STH R2,T702VH1
016296 5020 A02C 180DC 32762 ST R2,T702VF1+4
01629A 5720 A018 180C8 32763 X R2,T702F7 R2 :=00030178
01629E 5920 A014 180C4 32764 C R2,T702F6
0162A2 9845 A028 180D8 32765 LM R4,R5,T702VF1 R5 :=0013817F (1278335)
0162A6 5C40 A01C 180CC 32766 M R4,T702F8 R5 := (157235205)
0162AA 5D40 A020 180D0 32767 D R4,T702F9 R5 := (9249129)
0162AE 9045 A030 180E0 32768 STM R4,R5,T702VF2
0162B2 4860 A03E 180EE 32769 LH R6,T702VH1 R6 :=FFFF817F
0162B6 5F60 A024 180D4 32770 SL R6,T702F10 R6 :=0000017F
0162BA 5560 A020 180D0 32771 CL R6,T702F9
32772 DROP R10
0162BE 06FB 32773 BCTR R15,R11
32774 TSIMRET
0162C0 58F0 C088 162D0 32775+ L R15,=A(SAVETST) R15 := current save area
0162C4 58DF 0004 00004 32776+ L R13,4(R15) get old save area back
0162C8 98EC D00C 0000C 32777+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0162CC 07FE 32778+ BR 14 RETURN 02000000
32779 *
32780 TSIMEND
0162D0 32781+ LTORG
0162D0 00000458 32782 =A(SAVETST)
PAGE 599
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0162D4 000180B0 32783 =A(T702CS)
162D8 32784+T702TEND EQU *
32785 *
0180B0 32786 T702CS CSECT
0180B0 32787 DS 0F
0180B0 00000072 32788 T702F1 DC X'00000072'
0180B4 00010000 32789 T702F2 DC X'00010000'
0180B8 FFFFFF4F 32790 T702F3 DC X'FFFFFF4F'
0180BC FFFFFFFE 32791 T702F4 DC X'FFFFFFFE'
0180C0 00000001 32792 T702F5 DC X'00000001'
0180C4 00118000 32793 T702F6 DC X'00118000'
0180C8 00100007 32794 T702F7 DC X'00100007'
0180CC 0000007B 32795 T702F8 DC F'123'
0180D0 00000011 32796 T702F9 DC F'17'
0180D4 FFFF8000 32797 T702F10 DC X'FFFF8000'
0180D8 0000000000000000 32798 T702VF1 DC 2F'0'
0180E0 32799 T702VF2 DS 2F
0180E8 32800 DS 0H
0180E8 0001 32801 T702H1 DC X'0001'
0180EA 0002 32802 T702H2 DC X'0002'
0180EC 0100 32803 T702H3 DC X'0100'
0180EE 32804 T702VH1 DS 1H
000DEE 32805 MAIN CSECT
32806 *
32807 * Test 703 -- Mix Int RR noopt -----------------------------
32808 * uses R14 as seed, all register values depend on initial R14
32809 * uses R2 as output, stored after the loop in memory
32810 * to ensure that optimizers, as in z/PDT, can't remove code
32811 *
32812 TSIMBEG T703,20000,40,1,C'mix int RR noopt'
32813+*
004104 32814+TDSCDAT CSECT
004108 32815+ DS 0D
32816+*
004108 000162D8 32817+T703TDSC DC A(T703) // TENTRY
00410C 000000AC 32818+ DC A(T703TEND-T703) // TLENGTH
004110 00004E20 32819+ DC F'20000' // TLRCNT
004114 00000028 32820+ DC F'40' // TIGCNT
004118 00000001 32821+ DC F'1' // TLTYPE
001D72 32822+TEXT CSECT
001D72 E3F7F0F3 32823+SPTR2886 DC C'T703'
00411C 32824+TDSCDAT CSECT
00411C 32825+ DS 0F
00411C 04001D72 32826+ DC AL1(L'SPTR2886),AL3(SPTR2886)
001D76 32827+TEXT CSECT
001D76 9489A7408995A340 32828+SPTR2887 DC C'mix int RR noopt'
004120 32829+TDSCDAT CSECT
004120 32830+ DS 0F
004120 10001D76 32831+ DC AL1(L'SPTR2887),AL3(SPTR2887)
32832+*
004D4C 32833+TDSCTBL CSECT
04D4C 32834+T703TPTR EQU *
004D4C 00004108 32835+ DC A(T703TDSC) enabled test
32836+*
0162D8 32837+TCODE CSECT
PAGE 600
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0162D8 32838+ DS 0D ensure double word alignment for test
0162D8 32839+T703 DS 0H 01650000
0162D8 90EC D00C 0000C 32840+ STM 14,12,12(13) SAVE REGISTERS 02950000
0162DC 18CF 32841+ LR R12,R15 base register := entry address
162D8 32842+ USING T703,R12 declare code base register
0162DE 41B0 C01E 162F6 32843+ LA R11,T703L load loop target to R11
0162E2 58F0 C0A8 16380 32844+ L R15,=A(SAVETST) R15 := current save area
0162E6 50DF 0004 00004 32845+ ST R13,4(R15) set back pointer in current save area
0162EA 182D 32846+ LR R2,R13 remember callers save area
0162EC 18DF 32847+ LR R13,R15 setup current save area
0162EE 50D2 0008 00008 32848+ ST R13,8(R2) set forw pointer in callers save area
00000 32849+ USING TDSC,R1 declare TDSC base register
0162F2 58F0 1008 00008 32850+ L R15,TLRCNT load local repeat count to R15
32851+*
32852 *
162F6 32853 T703L EQU *
0162F6 183E 32854 LR R3,R14 R3 :=R14 01 U 03
0162F8 4140 00FF 000FF 32855 LA R4,255 R4 :=000000FF 02 U 03
0162FC 1E34 32856 ALR R3,R4 R3 :=R14 + 0xFF 03 U 06
0162FE 125E 32857 LTR R5,R14 R5 :=R14 04 U 05
016300 1F54 32858 SLR R5,R4 R5 :=R14 - 0xFF 05 U 16
016302 1063 32859 LPR R6,R3 R6 :=abs(R14+0xFF) 06 U 07
016304 0660 32860 BCTR R6,0 R6 :=abs(R14+0xFF)-1 07 U 08
016306 1376 32861 LCR R7,R6 R7 :=-(abs(R14+0xFF)-1) 08 U 09
016308 1474 32862 NR R7,R4 R7 :=f(R14) & 0xFF 09 U 10
01630A 1A74 32863 AR R7,R4 R7 :=f(R14)&0xFF+0xFF 10 U 11
01630C 1974 32864 CR R7,R4 != 11 U 12
01630E 4780 C09A 16372 32865 BE T703BAD 12
016312 8B70 0001 00001 32866 SLA R7,1 R7 :=2*f(R14) 10 bit 13 U 14
016316 1B74 32867 SR R7,R4 R7 :=f(R14) 10 bit 14 U 15
016318 8970 0004 00004 32868 SLL R7,4 R7 :=f(R14) 14 bit 15 U 18
01631C 8A50 0001 00001 32869 SRA R5,1 R5 :=(R14-0xFF)/2 16 U 17
016320 175E 32870 XR R5,R14 R5 :=f(R14) 17 U 18
016322 1657 32871 OR R5,R7 R5 :=f(R14) 18 U 19
016324 1185 32872 LNR R8,R5 R8 :=f(R14) 19 U 20
016326 8880 000C 0000C 32873 SRL R8,12 R8 :=f(R14) 20 bit 20 U 24
01632A 153E 32874 CLR R3,R14 != 21 U 22
01632C 4780 C09A 16372 32875 BE T703BAD 22
016330 8B40 0004 00004 32876 SLA R4,4 R4 :=00000FF0 23 U 24
016334 1784 32877 XR R8,R4 R8 :=f(R14) 20 bit 24 U 25
016336 1A84 32878 AR R8,R4 R8 :=f(R14) 20 bit 25 U 28
016338 1097 32879 LPR R9,R7 R9 :=f(R14) 14 bit 26 U 27
01633A 1B94 32880 SR R9,R4 R9 :=f(R14) 14 bit 27 U 28
01633C 1698 32881 OR R9,R8 R9 :=f(R14) 20 bit 28 U 29
01633E 0690 32882 BCTR R9,0 R9 :=f(R14) 20 bit 29 U 30
016340 8990 0001 00001 32883 SLL R9,1 R9 :=f(R14) 21 bit 30 U 31
016344 1494 32884 NR R9,R4 R9 :=f(R14) 12 bit 31 U 32
016346 8A90 0002 00002 32885 SRA R9,2 R9 :=f(R14) 10 bit 32 U 33
01634A 1E94 32886 ALR R9,R4 R9 :=f(R14) 13 bit 33 U 36
01634C 12A4 32887 LTR R10,R4 R10:=0000FF0 34 U 35
01634E 88A0 0002 00002 32888 SRL R10,2 R10:=00003FA 35 U 36
016352 17A9 32889 XR R10,R9 R10:=f(R14) 13 bit 36 U 37
016354 06A0 32890 BCTR R10,0 R10:=f(R14) 13 bit 37 U 38
016356 8AA0 0001 00001 32891 SRA R10,1 R10:=f(R14) 12 bit 38 U 39
01635A 1EA8 32892 ALR R10,R8 R10:=f(R14) 20 bit 39 U 40
PAGE 601
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01635C 1F2A 32893 SLR R2,R10 40 U ->
01635E 06FB 32894 BCTR R15,R11
016360 5020 C0A0 16378 32895 ST R2,T703RES store after loop, prevent optimize
32896 TSIMRET
016364 58F0 C0A8 16380 32897+ L R15,=A(SAVETST) R15 := current save area
016368 58DF 0004 00004 32898+ L R13,4(R15) get old save area back
01636C 98EC D00C 0000C 32899+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016370 07FE 32900+ BR 14 RETURN 02000000
32901 *
016372 32902 DS 0H
32903 T703BAD ABEND 60
016372 32904+T703BAD DS 0H 00400002
016372 4110 003C 0003C 32905+ LA 1,60 LOAD PARAMETER REG 1 01900002
016376 0A0D 32906+ SVC 13 LINK TO ABEND ROUTINE 02050002
016378 32907 DS 0F
016378 00000000 32908 T703RES DC F'0'
32909 *
32910 TSIMEND
016380 32911+ LTORG
016380 00000458 32912 =A(SAVETST)
16384 32913+T703TEND EQU *
32914 *
32915 * Test 9xx -- auxiliary tests ===================================
32916 *
32917 * Test 90x -- LR R,R count tests ===========================
32918 *
32919 * Test 900 -- LR R,R (ig=1) --------------------------------
32920 *
32921 TSIMBEG T900,450000,1,1,C'LR R,R (ig=1)'
32922+*
004124 32923+TDSCDAT CSECT
004128 32924+ DS 0D
32925+*
004128 00016388 32926+T900TDSC DC A(T900) // TENTRY
00412C 00000034 32927+ DC A(T900TEND-T900) // TLENGTH
004130 0006DDD0 32928+ DC F'450000' // TLRCNT
004134 00000001 32929+ DC F'1' // TIGCNT
004138 00000001 32930+ DC F'1' // TLTYPE
001D86 32931+TEXT CSECT
001D86 E3F9F0F0 32932+SPTR2897 DC C'T900'
00413C 32933+TDSCDAT CSECT
00413C 32934+ DS 0F
00413C 04001D86 32935+ DC AL1(L'SPTR2897),AL3(SPTR2897)
001D8A 32936+TEXT CSECT
001D8A D3D940D96BD9404D 32937+SPTR2898 DC C'LR R,R (ig=1)'
004140 32938+TDSCDAT CSECT
004140 32939+ DS 0F
004140 0D001D8A 32940+ DC AL1(L'SPTR2898),AL3(SPTR2898)
32941+*
004D50 32942+TDSCTBL CSECT
04D50 32943+T900TPTR EQU *
004D50 00004128 32944+ DC A(T900TDSC) enabled test
32945+*
016384 32946+TCODE CSECT
016388 32947+ DS 0D ensure double word alignment for test
PAGE 602
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016388 32948+T900 DS 0H 01650000
016388 90EC D00C 0000C 32949+ STM 14,12,12(13) SAVE REGISTERS 02950000
01638C 18CF 32950+ LR R12,R15 base register := entry address
16388 32951+ USING T900,R12 declare code base register
01638E 41B0 C01E 163A6 32952+ LA R11,T900L load loop target to R11
016392 58F0 C030 163B8 32953+ L R15,=A(SAVETST) R15 := current save area
016396 50DF 0004 00004 32954+ ST R13,4(R15) set back pointer in current save area
01639A 182D 32955+ LR R2,R13 remember callers save area
01639C 18DF 32956+ LR R13,R15 setup current save area
01639E 50D2 0008 00008 32957+ ST R13,8(R2) set forw pointer in callers save area
00000 32958+ USING TDSC,R1 declare TDSC base register
0163A2 58F0 1008 00008 32959+ L R15,TLRCNT load local repeat count to R15
32960+*
32961 *
32962 T900L REPINS LR,(R2,R1) repeat: LR R2,R1
32963+*
32964+* build from sublist &ALIST a comma separated string &ARGS
32965+*
32966+*
32967+*
32968+*
32969+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
32970+* this allows to transfer the repeat count from last TDSCGEN call
32971+*
32972+*
163A6 32973+T900L EQU *
32974+*
32975+* write a comment indicating what REPINS does (in case NOGEN in effect)
32976+*
32977+*,// REPINS: do 1 times:
32978+*
32979+* MNOTE requires that ' is doubled for expanded variables
32980+* thus build &MASTR as a copy of '&ARGS with ' doubled
32981+*
32982+*
32983+*,// LR R2,R1
32984+*
32985+* finally generate code: &ICNT copies of &CODE &ARGS
32986+*
0163A6 1821 32987+ LR R2,R1
32988+*
0163A8 06FB 32989 BCTR R15,R11
32990 TSIMRET
0163AA 58F0 C030 163B8 32991+ L R15,=A(SAVETST) R15 := current save area
0163AE 58DF 0004 00004 32992+ L R13,4(R15) get old save area back
0163B2 98EC D00C 0000C 32993+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0163B6 07FE 32994+ BR 14 RETURN 02000000
32995 TSIMEND
0163B8 32996+ LTORG
0163B8 00000458 32997 =A(SAVETST)
163BC 32998+T900TEND EQU *
32999 *
33000 * Test 901 -- LR R,R (ig=2) --------------------------------
33001 *
33002 TSIMBEG T901,400000,2,1,C'LR R,R (ig=2)',DIS=1
PAGE 603
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
33003+*
004144 33004+TDSCDAT CSECT
004148 33005+ DS 0D
33006+*
004148 000163C0 33007+T901TDSC DC A(T901) // TENTRY
00414C 0000003C 33008+ DC A(T901TEND-T901) // TLENGTH
004150 00061A80 33009+ DC F'400000' // TLRCNT
004154 00000002 33010+ DC F'2' // TIGCNT
004158 00000001 33011+ DC F'1' // TLTYPE
001D97 33012+TEXT CSECT
001D97 E3F9F0F1 33013+SPTR2909 DC C'T901'
00415C 33014+TDSCDAT CSECT
00415C 33015+ DS 0F
00415C 04001D97 33016+ DC AL1(L'SPTR2909),AL3(SPTR2909)
001D9B 33017+TEXT CSECT
001D9B D3D940D96BD9404D 33018+SPTR2910 DC C'LR R,R (ig=2)'
004160 33019+TDSCDAT CSECT
004160 33020+ DS 0F
004160 0D001D9B 33021+ DC AL1(L'SPTR2910),AL3(SPTR2910)
33022+*
004D54 33023+TDSCTBL CSECT
04D54 33024+T901TPTR EQU *
004D54 01004148 33025+ DC X'01',AL3(T901TDSC) disabled test
33026+*
0163BC 33027+TCODE CSECT
0163C0 33028+ DS 0D ensure double word alignment for test
0163C0 33029+T901 DS 0H 01650000
0163C0 90EC D00C 0000C 33030+ STM 14,12,12(13) SAVE REGISTERS 02950000
0163C4 18CF 33031+ LR R12,R15 base register := entry address
163C0 33032+ USING T901,R12 declare code base register
0163C6 41B0 C01E 163DE 33033+ LA R11,T901L load loop target to R11
0163CA 58F0 C038 163F8 33034+ L R15,=A(SAVETST) R15 := current save area
0163CE 50DF 0004 00004 33035+ ST R13,4(R15) set back pointer in current save area
0163D2 182D 33036+ LR R2,R13 remember callers save area
0163D4 18DF 33037+ LR R13,R15 setup current save area
0163D6 50D2 0008 00008 33038+ ST R13,8(R2) set forw pointer in callers save area
00000 33039+ USING TDSC,R1 declare TDSC base register
0163DA 58F0 1008 00008 33040+ L R15,TLRCNT load local repeat count to R15
33041+*
33042 *
33043 T901L REPINS LR,(R2,R1) repeat: LR R2,R1
33044+*
33045+* build from sublist &ALIST a comma separated string &ARGS
33046+*
33047+*
33048+*
33049+*
33050+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33051+* this allows to transfer the repeat count from last TDSCGEN call
33052+*
33053+*
163DE 33054+T901L EQU *
33055+*
33056+* write a comment indicating what REPINS does (in case NOGEN in effect)
33057+*
PAGE 604
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
33058+*,// REPINS: do 2 times:
33059+*
33060+* MNOTE requires that ' is doubled for expanded variables
33061+* thus build &MASTR as a copy of '&ARGS with ' doubled
33062+*
33063+*
33064+*,// LR R2,R1
33065+*
33066+* finally generate code: &ICNT copies of &CODE &ARGS
33067+*
0163DE 1821 33068+ LR R2,R1
0163E0 1821 33069+ LR R2,R1
33070+*
0163E2 06FB 33071 BCTR R15,R11
33072 TSIMRET
0163E4 58F0 C038 163F8 33073+ L R15,=A(SAVETST) R15 := current save area
0163E8 58DF 0004 00004 33074+ L R13,4(R15) get old save area back
0163EC 98EC D00C 0000C 33075+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0163F0 07FE 33076+ BR 14 RETURN 02000000
33077 TSIMEND
0163F8 33078+ LTORG
0163F8 00000458 33079 =A(SAVETST)
163FC 33080+T901TEND EQU *
33081 *
33082 * Test 902 -- LR R,R (ig=3) --------------------------------
33083 *
33084 TSIMBEG T902,400000,3,1,C'LR R,R (ig=3)',DIS=1
33085+*
004164 33086+TDSCDAT CSECT
004168 33087+ DS 0D
33088+*
004168 00016400 33089+T902TDSC DC A(T902) // TENTRY
00416C 0000003C 33090+ DC A(T902TEND-T902) // TLENGTH
004170 00061A80 33091+ DC F'400000' // TLRCNT
004174 00000003 33092+ DC F'3' // TIGCNT
004178 00000001 33093+ DC F'1' // TLTYPE
001DA8 33094+TEXT CSECT
001DA8 E3F9F0F2 33095+SPTR2921 DC C'T902'
00417C 33096+TDSCDAT CSECT
00417C 33097+ DS 0F
00417C 04001DA8 33098+ DC AL1(L'SPTR2921),AL3(SPTR2921)
001DAC 33099+TEXT CSECT
001DAC D3D940D96BD9404D 33100+SPTR2922 DC C'LR R,R (ig=3)'
004180 33101+TDSCDAT CSECT
004180 33102+ DS 0F
004180 0D001DAC 33103+ DC AL1(L'SPTR2922),AL3(SPTR2922)
33104+*
004D58 33105+TDSCTBL CSECT
04D58 33106+T902TPTR EQU *
004D58 01004168 33107+ DC X'01',AL3(T902TDSC) disabled test
33108+*
0163FC 33109+TCODE CSECT
016400 33110+ DS 0D ensure double word alignment for test
016400 33111+T902 DS 0H 01650000
016400 90EC D00C 0000C 33112+ STM 14,12,12(13) SAVE REGISTERS 02950000
PAGE 605
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016404 18CF 33113+ LR R12,R15 base register := entry address
16400 33114+ USING T902,R12 declare code base register
016406 41B0 C01E 1641E 33115+ LA R11,T902L load loop target to R11
01640A 58F0 C038 16438 33116+ L R15,=A(SAVETST) R15 := current save area
01640E 50DF 0004 00004 33117+ ST R13,4(R15) set back pointer in current save area
016412 182D 33118+ LR R2,R13 remember callers save area
016414 18DF 33119+ LR R13,R15 setup current save area
016416 50D2 0008 00008 33120+ ST R13,8(R2) set forw pointer in callers save area
00000 33121+ USING TDSC,R1 declare TDSC base register
01641A 58F0 1008 00008 33122+ L R15,TLRCNT load local repeat count to R15
33123+*
33124 *
33125 T902L REPINS LR,(R2,R1) repeat: LR R2,R1
33126+*
33127+* build from sublist &ALIST a comma separated string &ARGS
33128+*
33129+*
33130+*
33131+*
33132+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33133+* this allows to transfer the repeat count from last TDSCGEN call
33134+*
33135+*
1641E 33136+T902L EQU *
33137+*
33138+* write a comment indicating what REPINS does (in case NOGEN in effect)
33139+*
33140+*,// REPINS: do 3 times:
33141+*
33142+* MNOTE requires that ' is doubled for expanded variables
33143+* thus build &MASTR as a copy of '&ARGS with ' doubled
33144+*
33145+*
33146+*,// LR R2,R1
33147+*
33148+* finally generate code: &ICNT copies of &CODE &ARGS
33149+*
01641E 1821 33150+ LR R2,R1
016420 1821 33151+ LR R2,R1
016422 1821 33152+ LR R2,R1
33153+*
016424 06FB 33154 BCTR R15,R11
33155 TSIMRET
016426 58F0 C038 16438 33156+ L R15,=A(SAVETST) R15 := current save area
01642A 58DF 0004 00004 33157+ L R13,4(R15) get old save area back
01642E 98EC D00C 0000C 33158+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016432 07FE 33159+ BR 14 RETURN 02000000
33160 TSIMEND
016438 33161+ LTORG
016438 00000458 33162 =A(SAVETST)
1643C 33163+T902TEND EQU *
33164 *
33165 * Test 903 -- LR R,R (ig=4) --------------------------------
33166 *
33167 TSIMBEG T903,200000,4,1,C'LR R,R (ig=4)',DIS=1
PAGE 606
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
33168+*
004184 33169+TDSCDAT CSECT
004188 33170+ DS 0D
33171+*
004188 00016440 33172+T903TDSC DC A(T903) // TENTRY
00418C 0000003C 33173+ DC A(T903TEND-T903) // TLENGTH
004190 00030D40 33174+ DC F'200000' // TLRCNT
004194 00000004 33175+ DC F'4' // TIGCNT
004198 00000001 33176+ DC F'1' // TLTYPE
001DB9 33177+TEXT CSECT
001DB9 E3F9F0F3 33178+SPTR2933 DC C'T903'
00419C 33179+TDSCDAT CSECT
00419C 33180+ DS 0F
00419C 04001DB9 33181+ DC AL1(L'SPTR2933),AL3(SPTR2933)
001DBD 33182+TEXT CSECT
001DBD D3D940D96BD9404D 33183+SPTR2934 DC C'LR R,R (ig=4)'
0041A0 33184+TDSCDAT CSECT
0041A0 33185+ DS 0F
0041A0 0D001DBD 33186+ DC AL1(L'SPTR2934),AL3(SPTR2934)
33187+*
004D5C 33188+TDSCTBL CSECT
04D5C 33189+T903TPTR EQU *
004D5C 01004188 33190+ DC X'01',AL3(T903TDSC) disabled test
33191+*
01643C 33192+TCODE CSECT
016440 33193+ DS 0D ensure double word alignment for test
016440 33194+T903 DS 0H 01650000
016440 90EC D00C 0000C 33195+ STM 14,12,12(13) SAVE REGISTERS 02950000
016444 18CF 33196+ LR R12,R15 base register := entry address
16440 33197+ USING T903,R12 declare code base register
016446 41B0 C01E 1645E 33198+ LA R11,T903L load loop target to R11
01644A 58F0 C038 16478 33199+ L R15,=A(SAVETST) R15 := current save area
01644E 50DF 0004 00004 33200+ ST R13,4(R15) set back pointer in current save area
016452 182D 33201+ LR R2,R13 remember callers save area
016454 18DF 33202+ LR R13,R15 setup current save area
016456 50D2 0008 00008 33203+ ST R13,8(R2) set forw pointer in callers save area
00000 33204+ USING TDSC,R1 declare TDSC base register
01645A 58F0 1008 00008 33205+ L R15,TLRCNT load local repeat count to R15
33206+*
33207 *
33208 T903L REPINS LR,(R2,R1) repeat: LR R2,R1
33209+*
33210+* build from sublist &ALIST a comma separated string &ARGS
33211+*
33212+*
33213+*
33214+*
33215+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33216+* this allows to transfer the repeat count from last TDSCGEN call
33217+*
33218+*
1645E 33219+T903L EQU *
33220+*
33221+* write a comment indicating what REPINS does (in case NOGEN in effect)
33222+*
PAGE 607
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
33223+*,// REPINS: do 4 times:
33224+*
33225+* MNOTE requires that ' is doubled for expanded variables
33226+* thus build &MASTR as a copy of '&ARGS with ' doubled
33227+*
33228+*
33229+*,// LR R2,R1
33230+*
33231+* finally generate code: &ICNT copies of &CODE &ARGS
33232+*
01645E 1821 33233+ LR R2,R1
016460 1821 33234+ LR R2,R1
016462 1821 33235+ LR R2,R1
016464 1821 33236+ LR R2,R1
33237+*
016466 06FB 33238 BCTR R15,R11
33239 TSIMRET
016468 58F0 C038 16478 33240+ L R15,=A(SAVETST) R15 := current save area
01646C 58DF 0004 00004 33241+ L R13,4(R15) get old save area back
016470 98EC D00C 0000C 33242+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016474 07FE 33243+ BR 14 RETURN 02000000
33244 TSIMEND
016478 33245+ LTORG
016478 00000458 33246 =A(SAVETST)
1647C 33247+T903TEND EQU *
33248 *
33249 * Test 904 -- LR R,R (ig=5) --------------------------------
33250 *
33251 TSIMBEG T904,150000,5,1,C'LR R,R (ig=5)',DIS=1
33252+*
0041A4 33253+TDSCDAT CSECT
0041A8 33254+ DS 0D
33255+*
0041A8 00016480 33256+T904TDSC DC A(T904) // TENTRY
0041AC 0000003C 33257+ DC A(T904TEND-T904) // TLENGTH
0041B0 000249F0 33258+ DC F'150000' // TLRCNT
0041B4 00000005 33259+ DC F'5' // TIGCNT
0041B8 00000001 33260+ DC F'1' // TLTYPE
001DCA 33261+TEXT CSECT
001DCA E3F9F0F4 33262+SPTR2945 DC C'T904'
0041BC 33263+TDSCDAT CSECT
0041BC 33264+ DS 0F
0041BC 04001DCA 33265+ DC AL1(L'SPTR2945),AL3(SPTR2945)
001DCE 33266+TEXT CSECT
001DCE D3D940D96BD9404D 33267+SPTR2946 DC C'LR R,R (ig=5)'
0041C0 33268+TDSCDAT CSECT
0041C0 33269+ DS 0F
0041C0 0D001DCE 33270+ DC AL1(L'SPTR2946),AL3(SPTR2946)
33271+*
004D60 33272+TDSCTBL CSECT
04D60 33273+T904TPTR EQU *
004D60 010041A8 33274+ DC X'01',AL3(T904TDSC) disabled test
33275+*
01647C 33276+TCODE CSECT
016480 33277+ DS 0D ensure double word alignment for test
PAGE 608
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016480 33278+T904 DS 0H 01650000
016480 90EC D00C 0000C 33279+ STM 14,12,12(13) SAVE REGISTERS 02950000
016484 18CF 33280+ LR R12,R15 base register := entry address
16480 33281+ USING T904,R12 declare code base register
016486 41B0 C01E 1649E 33282+ LA R11,T904L load loop target to R11
01648A 58F0 C038 164B8 33283+ L R15,=A(SAVETST) R15 := current save area
01648E 50DF 0004 00004 33284+ ST R13,4(R15) set back pointer in current save area
016492 182D 33285+ LR R2,R13 remember callers save area
016494 18DF 33286+ LR R13,R15 setup current save area
016496 50D2 0008 00008 33287+ ST R13,8(R2) set forw pointer in callers save area
00000 33288+ USING TDSC,R1 declare TDSC base register
01649A 58F0 1008 00008 33289+ L R15,TLRCNT load local repeat count to R15
33290+*
33291 *
33292 T904L REPINS LR,(R2,R1) repeat: LR R2,R1
33293+*
33294+* build from sublist &ALIST a comma separated string &ARGS
33295+*
33296+*
33297+*
33298+*
33299+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33300+* this allows to transfer the repeat count from last TDSCGEN call
33301+*
33302+*
1649E 33303+T904L EQU *
33304+*
33305+* write a comment indicating what REPINS does (in case NOGEN in effect)
33306+*
33307+*,// REPINS: do 5 times:
33308+*
33309+* MNOTE requires that ' is doubled for expanded variables
33310+* thus build &MASTR as a copy of '&ARGS with ' doubled
33311+*
33312+*
33313+*,// LR R2,R1
33314+*
33315+* finally generate code: &ICNT copies of &CODE &ARGS
33316+*
01649E 1821 33317+ LR R2,R1
0164A0 1821 33318+ LR R2,R1
0164A2 1821 33319+ LR R2,R1
0164A4 1821 33320+ LR R2,R1
0164A6 1821 33321+ LR R2,R1
33322+*
0164A8 06FB 33323 BCTR R15,R11
33324 TSIMRET
0164AA 58F0 C038 164B8 33325+ L R15,=A(SAVETST) R15 := current save area
0164AE 58DF 0004 00004 33326+ L R13,4(R15) get old save area back
0164B2 98EC D00C 0000C 33327+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0164B6 07FE 33328+ BR 14 RETURN 02000000
33329 TSIMEND
0164B8 33330+ LTORG
0164B8 00000458 33331 =A(SAVETST)
164BC 33332+T904TEND EQU *
PAGE 609
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
33333 *
33334 * Test 905 -- LR R,R (ig=6) --------------------------------
33335 *
33336 TSIMBEG T905,150000,6,1,C'LR R,R (ig=6)',DIS=1
33337+*
0041C4 33338+TDSCDAT CSECT
0041C8 33339+ DS 0D
33340+*
0041C8 000164C0 33341+T905TDSC DC A(T905) // TENTRY
0041CC 00000044 33342+ DC A(T905TEND-T905) // TLENGTH
0041D0 000249F0 33343+ DC F'150000' // TLRCNT
0041D4 00000006 33344+ DC F'6' // TIGCNT
0041D8 00000001 33345+ DC F'1' // TLTYPE
001DDB 33346+TEXT CSECT
001DDB E3F9F0F5 33347+SPTR2957 DC C'T905'
0041DC 33348+TDSCDAT CSECT
0041DC 33349+ DS 0F
0041DC 04001DDB 33350+ DC AL1(L'SPTR2957),AL3(SPTR2957)
001DDF 33351+TEXT CSECT
001DDF D3D940D96BD9404D 33352+SPTR2958 DC C'LR R,R (ig=6)'
0041E0 33353+TDSCDAT CSECT
0041E0 33354+ DS 0F
0041E0 0D001DDF 33355+ DC AL1(L'SPTR2958),AL3(SPTR2958)
33356+*
004D64 33357+TDSCTBL CSECT
04D64 33358+T905TPTR EQU *
004D64 010041C8 33359+ DC X'01',AL3(T905TDSC) disabled test
33360+*
0164BC 33361+TCODE CSECT
0164C0 33362+ DS 0D ensure double word alignment for test
0164C0 33363+T905 DS 0H 01650000
0164C0 90EC D00C 0000C 33364+ STM 14,12,12(13) SAVE REGISTERS 02950000
0164C4 18CF 33365+ LR R12,R15 base register := entry address
164C0 33366+ USING T905,R12 declare code base register
0164C6 41B0 C01E 164DE 33367+ LA R11,T905L load loop target to R11
0164CA 58F0 C040 16500 33368+ L R15,=A(SAVETST) R15 := current save area
0164CE 50DF 0004 00004 33369+ ST R13,4(R15) set back pointer in current save area
0164D2 182D 33370+ LR R2,R13 remember callers save area
0164D4 18DF 33371+ LR R13,R15 setup current save area
0164D6 50D2 0008 00008 33372+ ST R13,8(R2) set forw pointer in callers save area
00000 33373+ USING TDSC,R1 declare TDSC base register
0164DA 58F0 1008 00008 33374+ L R15,TLRCNT load local repeat count to R15
33375+*
33376 *
33377 T905L REPINS LR,(R2,R1) repeat: LR R2,R1
33378+*
33379+* build from sublist &ALIST a comma separated string &ARGS
33380+*
33381+*
33382+*
33383+*
33384+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33385+* this allows to transfer the repeat count from last TDSCGEN call
33386+*
33387+*
PAGE 610
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
164DE 33388+T905L EQU *
33389+*
33390+* write a comment indicating what REPINS does (in case NOGEN in effect)
33391+*
33392+*,// REPINS: do 6 times:
33393+*
33394+* MNOTE requires that ' is doubled for expanded variables
33395+* thus build &MASTR as a copy of '&ARGS with ' doubled
33396+*
33397+*
33398+*,// LR R2,R1
33399+*
33400+* finally generate code: &ICNT copies of &CODE &ARGS
33401+*
0164DE 1821 33402+ LR R2,R1
0164E0 1821 33403+ LR R2,R1
0164E2 1821 33404+ LR R2,R1
0164E4 1821 33405+ LR R2,R1
0164E6 1821 33406+ LR R2,R1
0164E8 1821 33407+ LR R2,R1
33408+*
0164EA 06FB 33409 BCTR R15,R11
33410 TSIMRET
0164EC 58F0 C040 16500 33411+ L R15,=A(SAVETST) R15 := current save area
0164F0 58DF 0004 00004 33412+ L R13,4(R15) get old save area back
0164F4 98EC D00C 0000C 33413+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0164F8 07FE 33414+ BR 14 RETURN 02000000
33415 TSIMEND
016500 33416+ LTORG
016500 00000458 33417 =A(SAVETST)
16504 33418+T905TEND EQU *
33419 *
33420 * Test 906 -- LR R,R (ig=7) --------------------------------
33421 *
33422 TSIMBEG T906,150000,7,1,C'LR R,R (ig=7)',DIS=1
33423+*
0041E4 33424+TDSCDAT CSECT
0041E8 33425+ DS 0D
33426+*
0041E8 00016508 33427+T906TDSC DC A(T906) // TENTRY
0041EC 00000044 33428+ DC A(T906TEND-T906) // TLENGTH
0041F0 000249F0 33429+ DC F'150000' // TLRCNT
0041F4 00000007 33430+ DC F'7' // TIGCNT
0041F8 00000001 33431+ DC F'1' // TLTYPE
001DEC 33432+TEXT CSECT
001DEC E3F9F0F6 33433+SPTR2969 DC C'T906'
0041FC 33434+TDSCDAT CSECT
0041FC 33435+ DS 0F
0041FC 04001DEC 33436+ DC AL1(L'SPTR2969),AL3(SPTR2969)
001DF0 33437+TEXT CSECT
001DF0 D3D940D96BD9404D 33438+SPTR2970 DC C'LR R,R (ig=7)'
004200 33439+TDSCDAT CSECT
004200 33440+ DS 0F
004200 0D001DF0 33441+ DC AL1(L'SPTR2970),AL3(SPTR2970)
33442+*
PAGE 611
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004D68 33443+TDSCTBL CSECT
04D68 33444+T906TPTR EQU *
004D68 010041E8 33445+ DC X'01',AL3(T906TDSC) disabled test
33446+*
016504 33447+TCODE CSECT
016508 33448+ DS 0D ensure double word alignment for test
016508 33449+T906 DS 0H 01650000
016508 90EC D00C 0000C 33450+ STM 14,12,12(13) SAVE REGISTERS 02950000
01650C 18CF 33451+ LR R12,R15 base register := entry address
16508 33452+ USING T906,R12 declare code base register
01650E 41B0 C01E 16526 33453+ LA R11,T906L load loop target to R11
016512 58F0 C040 16548 33454+ L R15,=A(SAVETST) R15 := current save area
016516 50DF 0004 00004 33455+ ST R13,4(R15) set back pointer in current save area
01651A 182D 33456+ LR R2,R13 remember callers save area
01651C 18DF 33457+ LR R13,R15 setup current save area
01651E 50D2 0008 00008 33458+ ST R13,8(R2) set forw pointer in callers save area
00000 33459+ USING TDSC,R1 declare TDSC base register
016522 58F0 1008 00008 33460+ L R15,TLRCNT load local repeat count to R15
33461+*
33462 *
33463 T906L REPINS LR,(R2,R1) repeat: LR R2,R1
33464+*
33465+* build from sublist &ALIST a comma separated string &ARGS
33466+*
33467+*
33468+*
33469+*
33470+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33471+* this allows to transfer the repeat count from last TDSCGEN call
33472+*
33473+*
16526 33474+T906L EQU *
33475+*
33476+* write a comment indicating what REPINS does (in case NOGEN in effect)
33477+*
33478+*,// REPINS: do 7 times:
33479+*
33480+* MNOTE requires that ' is doubled for expanded variables
33481+* thus build &MASTR as a copy of '&ARGS with ' doubled
33482+*
33483+*
33484+*,// LR R2,R1
33485+*
33486+* finally generate code: &ICNT copies of &CODE &ARGS
33487+*
016526 1821 33488+ LR R2,R1
016528 1821 33489+ LR R2,R1
01652A 1821 33490+ LR R2,R1
01652C 1821 33491+ LR R2,R1
01652E 1821 33492+ LR R2,R1
016530 1821 33493+ LR R2,R1
016532 1821 33494+ LR R2,R1
33495+*
016534 06FB 33496 BCTR R15,R11
33497 TSIMRET
PAGE 612
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016536 58F0 C040 16548 33498+ L R15,=A(SAVETST) R15 := current save area
01653A 58DF 0004 00004 33499+ L R13,4(R15) get old save area back
01653E 98EC D00C 0000C 33500+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016542 07FE 33501+ BR 14 RETURN 02000000
33502 TSIMEND
016548 33503+ LTORG
016548 00000458 33504 =A(SAVETST)
1654C 33505+T906TEND EQU *
33506 *
33507 * Test 907 -- LR R,R (ig=8) --------------------------------
33508 *
33509 TSIMBEG T907,150000,8,1,C'LR R,R (ig=8)',DIS=1
33510+*
004204 33511+TDSCDAT CSECT
004208 33512+ DS 0D
33513+*
004208 00016550 33514+T907TDSC DC A(T907) // TENTRY
00420C 00000044 33515+ DC A(T907TEND-T907) // TLENGTH
004210 000249F0 33516+ DC F'150000' // TLRCNT
004214 00000008 33517+ DC F'8' // TIGCNT
004218 00000001 33518+ DC F'1' // TLTYPE
001DFD 33519+TEXT CSECT
001DFD E3F9F0F7 33520+SPTR2981 DC C'T907'
00421C 33521+TDSCDAT CSECT
00421C 33522+ DS 0F
00421C 04001DFD 33523+ DC AL1(L'SPTR2981),AL3(SPTR2981)
001E01 33524+TEXT CSECT
001E01 D3D940D96BD9404D 33525+SPTR2982 DC C'LR R,R (ig=8)'
004220 33526+TDSCDAT CSECT
004220 33527+ DS 0F
004220 0D001E01 33528+ DC AL1(L'SPTR2982),AL3(SPTR2982)
33529+*
004D6C 33530+TDSCTBL CSECT
04D6C 33531+T907TPTR EQU *
004D6C 01004208 33532+ DC X'01',AL3(T907TDSC) disabled test
33533+*
01654C 33534+TCODE CSECT
016550 33535+ DS 0D ensure double word alignment for test
016550 33536+T907 DS 0H 01650000
016550 90EC D00C 0000C 33537+ STM 14,12,12(13) SAVE REGISTERS 02950000
016554 18CF 33538+ LR R12,R15 base register := entry address
16550 33539+ USING T907,R12 declare code base register
016556 41B0 C01E 1656E 33540+ LA R11,T907L load loop target to R11
01655A 58F0 C040 16590 33541+ L R15,=A(SAVETST) R15 := current save area
01655E 50DF 0004 00004 33542+ ST R13,4(R15) set back pointer in current save area
016562 182D 33543+ LR R2,R13 remember callers save area
016564 18DF 33544+ LR R13,R15 setup current save area
016566 50D2 0008 00008 33545+ ST R13,8(R2) set forw pointer in callers save area
00000 33546+ USING TDSC,R1 declare TDSC base register
01656A 58F0 1008 00008 33547+ L R15,TLRCNT load local repeat count to R15
33548+*
33549 *
33550 T907L REPINS LR,(R2,R1) repeat: LR R2,R1
33551+*
33552+* build from sublist &ALIST a comma separated string &ARGS
PAGE 613
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
33553+*
33554+*
33555+*
33556+*
33557+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33558+* this allows to transfer the repeat count from last TDSCGEN call
33559+*
33560+*
1656E 33561+T907L EQU *
33562+*
33563+* write a comment indicating what REPINS does (in case NOGEN in effect)
33564+*
33565+*,// REPINS: do 8 times:
33566+*
33567+* MNOTE requires that ' is doubled for expanded variables
33568+* thus build &MASTR as a copy of '&ARGS with ' doubled
33569+*
33570+*
33571+*,// LR R2,R1
33572+*
33573+* finally generate code: &ICNT copies of &CODE &ARGS
33574+*
01656E 1821 33575+ LR R2,R1
016570 1821 33576+ LR R2,R1
016572 1821 33577+ LR R2,R1
016574 1821 33578+ LR R2,R1
016576 1821 33579+ LR R2,R1
016578 1821 33580+ LR R2,R1
01657A 1821 33581+ LR R2,R1
01657C 1821 33582+ LR R2,R1
33583+*
01657E 06FB 33584 BCTR R15,R11
33585 TSIMRET
016580 58F0 C040 16590 33586+ L R15,=A(SAVETST) R15 := current save area
016584 58DF 0004 00004 33587+ L R13,4(R15) get old save area back
016588 98EC D00C 0000C 33588+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01658C 07FE 33589+ BR 14 RETURN 02000000
33590 TSIMEND
016590 33591+ LTORG
016590 00000458 33592 =A(SAVETST)
16594 33593+T907TEND EQU *
33594 *
33595 * Test 908 -- LR R,R (ig=9) --------------------------------
33596 *
33597 TSIMBEG T908,150000,9,1,C'LR R,R (ig=9)',DIS=1
33598+*
004224 33599+TDSCDAT CSECT
004228 33600+ DS 0D
33601+*
004228 00016598 33602+T908TDSC DC A(T908) // TENTRY
00422C 00000044 33603+ DC A(T908TEND-T908) // TLENGTH
004230 000249F0 33604+ DC F'150000' // TLRCNT
004234 00000009 33605+ DC F'9' // TIGCNT
004238 00000001 33606+ DC F'1' // TLTYPE
001E0E 33607+TEXT CSECT
PAGE 614
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001E0E E3F9F0F8 33608+SPTR2993 DC C'T908'
00423C 33609+TDSCDAT CSECT
00423C 33610+ DS 0F
00423C 04001E0E 33611+ DC AL1(L'SPTR2993),AL3(SPTR2993)
001E12 33612+TEXT CSECT
001E12 D3D940D96BD9404D 33613+SPTR2994 DC C'LR R,R (ig=9)'
004240 33614+TDSCDAT CSECT
004240 33615+ DS 0F
004240 0D001E12 33616+ DC AL1(L'SPTR2994),AL3(SPTR2994)
33617+*
004D70 33618+TDSCTBL CSECT
04D70 33619+T908TPTR EQU *
004D70 01004228 33620+ DC X'01',AL3(T908TDSC) disabled test
33621+*
016594 33622+TCODE CSECT
016598 33623+ DS 0D ensure double word alignment for test
016598 33624+T908 DS 0H 01650000
016598 90EC D00C 0000C 33625+ STM 14,12,12(13) SAVE REGISTERS 02950000
01659C 18CF 33626+ LR R12,R15 base register := entry address
16598 33627+ USING T908,R12 declare code base register
01659E 41B0 C01E 165B6 33628+ LA R11,T908L load loop target to R11
0165A2 58F0 C040 165D8 33629+ L R15,=A(SAVETST) R15 := current save area
0165A6 50DF 0004 00004 33630+ ST R13,4(R15) set back pointer in current save area
0165AA 182D 33631+ LR R2,R13 remember callers save area
0165AC 18DF 33632+ LR R13,R15 setup current save area
0165AE 50D2 0008 00008 33633+ ST R13,8(R2) set forw pointer in callers save area
00000 33634+ USING TDSC,R1 declare TDSC base register
0165B2 58F0 1008 00008 33635+ L R15,TLRCNT load local repeat count to R15
33636+*
33637 *
33638 T908L REPINS LR,(R2,R1) repeat: LR R2,R1
33639+*
33640+* build from sublist &ALIST a comma separated string &ARGS
33641+*
33642+*
33643+*
33644+*
33645+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33646+* this allows to transfer the repeat count from last TDSCGEN call
33647+*
33648+*
165B6 33649+T908L EQU *
33650+*
33651+* write a comment indicating what REPINS does (in case NOGEN in effect)
33652+*
33653+*,// REPINS: do 9 times:
33654+*
33655+* MNOTE requires that ' is doubled for expanded variables
33656+* thus build &MASTR as a copy of '&ARGS with ' doubled
33657+*
33658+*
33659+*,// LR R2,R1
33660+*
33661+* finally generate code: &ICNT copies of &CODE &ARGS
33662+*
PAGE 615
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0165B6 1821 33663+ LR R2,R1
0165B8 1821 33664+ LR R2,R1
0165BA 1821 33665+ LR R2,R1
0165BC 1821 33666+ LR R2,R1
0165BE 1821 33667+ LR R2,R1
0165C0 1821 33668+ LR R2,R1
0165C2 1821 33669+ LR R2,R1
0165C4 1821 33670+ LR R2,R1
0165C6 1821 33671+ LR R2,R1
33672+*
0165C8 06FB 33673 BCTR R15,R11
33674 TSIMRET
0165CA 58F0 C040 165D8 33675+ L R15,=A(SAVETST) R15 := current save area
0165CE 58DF 0004 00004 33676+ L R13,4(R15) get old save area back
0165D2 98EC D00C 0000C 33677+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0165D6 07FE 33678+ BR 14 RETURN 02000000
33679 TSIMEND
0165D8 33680+ LTORG
0165D8 00000458 33681 =A(SAVETST)
165DC 33682+T908TEND EQU *
33683 *
33684 * Test 909 -- LR R,R (ig=10) -------------------------------
33685 *
33686 TSIMBEG T909,150000,10,1,C'LR R,R (ig=10)',DIS=1
33687+*
004244 33688+TDSCDAT CSECT
004248 33689+ DS 0D
33690+*
004248 000165E0 33691+T909TDSC DC A(T909) // TENTRY
00424C 0000004C 33692+ DC A(T909TEND-T909) // TLENGTH
004250 000249F0 33693+ DC F'150000' // TLRCNT
004254 0000000A 33694+ DC F'10' // TIGCNT
004258 00000001 33695+ DC F'1' // TLTYPE
001E1F 33696+TEXT CSECT
001E1F E3F9F0F9 33697+SPTR3005 DC C'T909'
00425C 33698+TDSCDAT CSECT
00425C 33699+ DS 0F
00425C 04001E1F 33700+ DC AL1(L'SPTR3005),AL3(SPTR3005)
001E23 33701+TEXT CSECT
001E23 D3D940D96BD9404D 33702+SPTR3006 DC C'LR R,R (ig=10)'
004260 33703+TDSCDAT CSECT
004260 33704+ DS 0F
004260 0E001E23 33705+ DC AL1(L'SPTR3006),AL3(SPTR3006)
33706+*
004D74 33707+TDSCTBL CSECT
04D74 33708+T909TPTR EQU *
004D74 01004248 33709+ DC X'01',AL3(T909TDSC) disabled test
33710+*
0165DC 33711+TCODE CSECT
0165E0 33712+ DS 0D ensure double word alignment for test
0165E0 33713+T909 DS 0H 01650000
0165E0 90EC D00C 0000C 33714+ STM 14,12,12(13) SAVE REGISTERS 02950000
0165E4 18CF 33715+ LR R12,R15 base register := entry address
165E0 33716+ USING T909,R12 declare code base register
0165E6 41B0 C01E 165FE 33717+ LA R11,T909L load loop target to R11
PAGE 616
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0165EA 58F0 C048 16628 33718+ L R15,=A(SAVETST) R15 := current save area
0165EE 50DF 0004 00004 33719+ ST R13,4(R15) set back pointer in current save area
0165F2 182D 33720+ LR R2,R13 remember callers save area
0165F4 18DF 33721+ LR R13,R15 setup current save area
0165F6 50D2 0008 00008 33722+ ST R13,8(R2) set forw pointer in callers save area
00000 33723+ USING TDSC,R1 declare TDSC base register
0165FA 58F0 1008 00008 33724+ L R15,TLRCNT load local repeat count to R15
33725+*
33726 *
33727 T909L REPINS LR,(R2,R1) repeat: LR R2,R1
33728+*
33729+* build from sublist &ALIST a comma separated string &ARGS
33730+*
33731+*
33732+*
33733+*
33734+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33735+* this allows to transfer the repeat count from last TDSCGEN call
33736+*
33737+*
165FE 33738+T909L EQU *
33739+*
33740+* write a comment indicating what REPINS does (in case NOGEN in effect)
33741+*
33742+*,// REPINS: do 10 times:
33743+*
33744+* MNOTE requires that ' is doubled for expanded variables
33745+* thus build &MASTR as a copy of '&ARGS with ' doubled
33746+*
33747+*
33748+*,// LR R2,R1
33749+*
33750+* finally generate code: &ICNT copies of &CODE &ARGS
33751+*
0165FE 1821 33752+ LR R2,R1
016600 1821 33753+ LR R2,R1
016602 1821 33754+ LR R2,R1
016604 1821 33755+ LR R2,R1
016606 1821 33756+ LR R2,R1
016608 1821 33757+ LR R2,R1
01660A 1821 33758+ LR R2,R1
01660C 1821 33759+ LR R2,R1
01660E 1821 33760+ LR R2,R1
016610 1821 33761+ LR R2,R1
33762+*
016612 06FB 33763 BCTR R15,R11
33764 TSIMRET
016614 58F0 C048 16628 33765+ L R15,=A(SAVETST) R15 := current save area
016618 58DF 0004 00004 33766+ L R13,4(R15) get old save area back
01661C 98EC D00C 0000C 33767+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016620 07FE 33768+ BR 14 RETURN 02000000
33769 TSIMEND
016628 33770+ LTORG
016628 00000458 33771 =A(SAVETST)
1662C 33772+T909TEND EQU *
PAGE 617
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
33773 *
33774 * Test 910 -- LR R,R (ig=12) -------------------------------
33775 *
33776 TSIMBEG T910,120000,12,1,C'LR R,R (ig=12)',DIS=1
33777+*
004264 33778+TDSCDAT CSECT
004268 33779+ DS 0D
33780+*
004268 00016630 33781+T910TDSC DC A(T910) // TENTRY
00426C 0000004C 33782+ DC A(T910TEND-T910) // TLENGTH
004270 0001D4C0 33783+ DC F'120000' // TLRCNT
004274 0000000C 33784+ DC F'12' // TIGCNT
004278 00000001 33785+ DC F'1' // TLTYPE
001E31 33786+TEXT CSECT
001E31 E3F9F1F0 33787+SPTR3017 DC C'T910'
00427C 33788+TDSCDAT CSECT
00427C 33789+ DS 0F
00427C 04001E31 33790+ DC AL1(L'SPTR3017),AL3(SPTR3017)
001E35 33791+TEXT CSECT
001E35 D3D940D96BD9404D 33792+SPTR3018 DC C'LR R,R (ig=12)'
004280 33793+TDSCDAT CSECT
004280 33794+ DS 0F
004280 0E001E35 33795+ DC AL1(L'SPTR3018),AL3(SPTR3018)
33796+*
004D78 33797+TDSCTBL CSECT
04D78 33798+T910TPTR EQU *
004D78 01004268 33799+ DC X'01',AL3(T910TDSC) disabled test
33800+*
01662C 33801+TCODE CSECT
016630 33802+ DS 0D ensure double word alignment for test
016630 33803+T910 DS 0H 01650000
016630 90EC D00C 0000C 33804+ STM 14,12,12(13) SAVE REGISTERS 02950000
016634 18CF 33805+ LR R12,R15 base register := entry address
16630 33806+ USING T910,R12 declare code base register
016636 41B0 C01E 1664E 33807+ LA R11,T910L load loop target to R11
01663A 58F0 C048 16678 33808+ L R15,=A(SAVETST) R15 := current save area
01663E 50DF 0004 00004 33809+ ST R13,4(R15) set back pointer in current save area
016642 182D 33810+ LR R2,R13 remember callers save area
016644 18DF 33811+ LR R13,R15 setup current save area
016646 50D2 0008 00008 33812+ ST R13,8(R2) set forw pointer in callers save area
00000 33813+ USING TDSC,R1 declare TDSC base register
01664A 58F0 1008 00008 33814+ L R15,TLRCNT load local repeat count to R15
33815+*
33816 *
33817 T910L REPINS LR,(R2,R1) repeat: LR R2,R1
33818+*
33819+* build from sublist &ALIST a comma separated string &ARGS
33820+*
33821+*
33822+*
33823+*
33824+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33825+* this allows to transfer the repeat count from last TDSCGEN call
33826+*
33827+*
PAGE 618
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
1664E 33828+T910L EQU *
33829+*
33830+* write a comment indicating what REPINS does (in case NOGEN in effect)
33831+*
33832+*,// REPINS: do 12 times:
33833+*
33834+* MNOTE requires that ' is doubled for expanded variables
33835+* thus build &MASTR as a copy of '&ARGS with ' doubled
33836+*
33837+*
33838+*,// LR R2,R1
33839+*
33840+* finally generate code: &ICNT copies of &CODE &ARGS
33841+*
01664E 1821 33842+ LR R2,R1
016650 1821 33843+ LR R2,R1
016652 1821 33844+ LR R2,R1
016654 1821 33845+ LR R2,R1
016656 1821 33846+ LR R2,R1
016658 1821 33847+ LR R2,R1
01665A 1821 33848+ LR R2,R1
01665C 1821 33849+ LR R2,R1
01665E 1821 33850+ LR R2,R1
016660 1821 33851+ LR R2,R1
016662 1821 33852+ LR R2,R1
016664 1821 33853+ LR R2,R1
33854+*
016666 06FB 33855 BCTR R15,R11
33856 TSIMRET
016668 58F0 C048 16678 33857+ L R15,=A(SAVETST) R15 := current save area
01666C 58DF 0004 00004 33858+ L R13,4(R15) get old save area back
016670 98EC D00C 0000C 33859+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016674 07FE 33860+ BR 14 RETURN 02000000
33861 TSIMEND
016678 33862+ LTORG
016678 00000458 33863 =A(SAVETST)
1667C 33864+T910TEND EQU *
33865 *
33866 * Test 911 -- LR R,R (ig=18) -------------------------------
33867 *
33868 TSIMBEG T911,90000,18,1,C'LR R,R (ig=18)',DIS=1
33869+*
004284 33870+TDSCDAT CSECT
004288 33871+ DS 0D
33872+*
004288 00016680 33873+T911TDSC DC A(T911) // TENTRY
00428C 0000005C 33874+ DC A(T911TEND-T911) // TLENGTH
004290 00015F90 33875+ DC F'90000' // TLRCNT
004294 00000012 33876+ DC F'18' // TIGCNT
004298 00000001 33877+ DC F'1' // TLTYPE
001E43 33878+TEXT CSECT
001E43 E3F9F1F1 33879+SPTR3029 DC C'T911'
00429C 33880+TDSCDAT CSECT
00429C 33881+ DS 0F
00429C 04001E43 33882+ DC AL1(L'SPTR3029),AL3(SPTR3029)
PAGE 619
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001E47 33883+TEXT CSECT
001E47 D3D940D96BD9404D 33884+SPTR3030 DC C'LR R,R (ig=18)'
0042A0 33885+TDSCDAT CSECT
0042A0 33886+ DS 0F
0042A0 0E001E47 33887+ DC AL1(L'SPTR3030),AL3(SPTR3030)
33888+*
004D7C 33889+TDSCTBL CSECT
04D7C 33890+T911TPTR EQU *
004D7C 01004288 33891+ DC X'01',AL3(T911TDSC) disabled test
33892+*
01667C 33893+TCODE CSECT
016680 33894+ DS 0D ensure double word alignment for test
016680 33895+T911 DS 0H 01650000
016680 90EC D00C 0000C 33896+ STM 14,12,12(13) SAVE REGISTERS 02950000
016684 18CF 33897+ LR R12,R15 base register := entry address
16680 33898+ USING T911,R12 declare code base register
016686 41B0 C01E 1669E 33899+ LA R11,T911L load loop target to R11
01668A 58F0 C058 166D8 33900+ L R15,=A(SAVETST) R15 := current save area
01668E 50DF 0004 00004 33901+ ST R13,4(R15) set back pointer in current save area
016692 182D 33902+ LR R2,R13 remember callers save area
016694 18DF 33903+ LR R13,R15 setup current save area
016696 50D2 0008 00008 33904+ ST R13,8(R2) set forw pointer in callers save area
00000 33905+ USING TDSC,R1 declare TDSC base register
01669A 58F0 1008 00008 33906+ L R15,TLRCNT load local repeat count to R15
33907+*
33908 *
33909 T911L REPINS LR,(R2,R1) repeat: LR R2,R1
33910+*
33911+* build from sublist &ALIST a comma separated string &ARGS
33912+*
33913+*
33914+*
33915+*
33916+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
33917+* this allows to transfer the repeat count from last TDSCGEN call
33918+*
33919+*
1669E 33920+T911L EQU *
33921+*
33922+* write a comment indicating what REPINS does (in case NOGEN in effect)
33923+*
33924+*,// REPINS: do 18 times:
33925+*
33926+* MNOTE requires that ' is doubled for expanded variables
33927+* thus build &MASTR as a copy of '&ARGS with ' doubled
33928+*
33929+*
33930+*,// LR R2,R1
33931+*
33932+* finally generate code: &ICNT copies of &CODE &ARGS
33933+*
01669E 1821 33934+ LR R2,R1
0166A0 1821 33935+ LR R2,R1
0166A2 1821 33936+ LR R2,R1
0166A4 1821 33937+ LR R2,R1
PAGE 620
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0166A6 1821 33938+ LR R2,R1
0166A8 1821 33939+ LR R2,R1
0166AA 1821 33940+ LR R2,R1
0166AC 1821 33941+ LR R2,R1
0166AE 1821 33942+ LR R2,R1
0166B0 1821 33943+ LR R2,R1
0166B2 1821 33944+ LR R2,R1
0166B4 1821 33945+ LR R2,R1
0166B6 1821 33946+ LR R2,R1
0166B8 1821 33947+ LR R2,R1
0166BA 1821 33948+ LR R2,R1
0166BC 1821 33949+ LR R2,R1
0166BE 1821 33950+ LR R2,R1
0166C0 1821 33951+ LR R2,R1
33952+*
0166C2 06FB 33953 BCTR R15,R11
33954 TSIMRET
0166C4 58F0 C058 166D8 33955+ L R15,=A(SAVETST) R15 := current save area
0166C8 58DF 0004 00004 33956+ L R13,4(R15) get old save area back
0166CC 98EC D00C 0000C 33957+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0166D0 07FE 33958+ BR 14 RETURN 02000000
33959 TSIMEND
0166D8 33960+ LTORG
0166D8 00000458 33961 =A(SAVETST)
166DC 33962+T911TEND EQU *
33963 *
33964 * Test 912 -- LR R,R (ig=25) -------------------------------
33965 *
33966 TSIMBEG T912,70000,25,1,C'LR R,R (ig=25)',DIS=1
33967+*
0042A4 33968+TDSCDAT CSECT
0042A8 33969+ DS 0D
33970+*
0042A8 000166E0 33971+T912TDSC DC A(T912) // TENTRY
0042AC 00000064 33972+ DC A(T912TEND-T912) // TLENGTH
0042B0 00011170 33973+ DC F'70000' // TLRCNT
0042B4 00000019 33974+ DC F'25' // TIGCNT
0042B8 00000001 33975+ DC F'1' // TLTYPE
001E55 33976+TEXT CSECT
001E55 E3F9F1F2 33977+SPTR3041 DC C'T912'
0042BC 33978+TDSCDAT CSECT
0042BC 33979+ DS 0F
0042BC 04001E55 33980+ DC AL1(L'SPTR3041),AL3(SPTR3041)
001E59 33981+TEXT CSECT
001E59 D3D940D96BD9404D 33982+SPTR3042 DC C'LR R,R (ig=25)'
0042C0 33983+TDSCDAT CSECT
0042C0 33984+ DS 0F
0042C0 0E001E59 33985+ DC AL1(L'SPTR3042),AL3(SPTR3042)
33986+*
004D80 33987+TDSCTBL CSECT
04D80 33988+T912TPTR EQU *
004D80 010042A8 33989+ DC X'01',AL3(T912TDSC) disabled test
33990+*
0166DC 33991+TCODE CSECT
0166E0 33992+ DS 0D ensure double word alignment for test
PAGE 621
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0166E0 33993+T912 DS 0H 01650000
0166E0 90EC D00C 0000C 33994+ STM 14,12,12(13) SAVE REGISTERS 02950000
0166E4 18CF 33995+ LR R12,R15 base register := entry address
166E0 33996+ USING T912,R12 declare code base register
0166E6 41B0 C01E 166FE 33997+ LA R11,T912L load loop target to R11
0166EA 58F0 C060 16740 33998+ L R15,=A(SAVETST) R15 := current save area
0166EE 50DF 0004 00004 33999+ ST R13,4(R15) set back pointer in current save area
0166F2 182D 34000+ LR R2,R13 remember callers save area
0166F4 18DF 34001+ LR R13,R15 setup current save area
0166F6 50D2 0008 00008 34002+ ST R13,8(R2) set forw pointer in callers save area
00000 34003+ USING TDSC,R1 declare TDSC base register
0166FA 58F0 1008 00008 34004+ L R15,TLRCNT load local repeat count to R15
34005+*
34006 *
34007 T912L REPINS LR,(R2,R1) repeat: LR R2,R1
34008+*
34009+* build from sublist &ALIST a comma separated string &ARGS
34010+*
34011+*
34012+*
34013+*
34014+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
34015+* this allows to transfer the repeat count from last TDSCGEN call
34016+*
34017+*
166FE 34018+T912L EQU *
34019+*
34020+* write a comment indicating what REPINS does (in case NOGEN in effect)
34021+*
34022+*,// REPINS: do 25 times:
34023+*
34024+* MNOTE requires that ' is doubled for expanded variables
34025+* thus build &MASTR as a copy of '&ARGS with ' doubled
34026+*
34027+*
34028+*,// LR R2,R1
34029+*
34030+* finally generate code: &ICNT copies of &CODE &ARGS
34031+*
0166FE 1821 34032+ LR R2,R1
016700 1821 34033+ LR R2,R1
016702 1821 34034+ LR R2,R1
016704 1821 34035+ LR R2,R1
016706 1821 34036+ LR R2,R1
016708 1821 34037+ LR R2,R1
01670A 1821 34038+ LR R2,R1
01670C 1821 34039+ LR R2,R1
01670E 1821 34040+ LR R2,R1
016710 1821 34041+ LR R2,R1
016712 1821 34042+ LR R2,R1
016714 1821 34043+ LR R2,R1
016716 1821 34044+ LR R2,R1
016718 1821 34045+ LR R2,R1
01671A 1821 34046+ LR R2,R1
01671C 1821 34047+ LR R2,R1
PAGE 622
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01671E 1821 34048+ LR R2,R1
016720 1821 34049+ LR R2,R1
016722 1821 34050+ LR R2,R1
016724 1821 34051+ LR R2,R1
016726 1821 34052+ LR R2,R1
016728 1821 34053+ LR R2,R1
01672A 1821 34054+ LR R2,R1
01672C 1821 34055+ LR R2,R1
01672E 1821 34056+ LR R2,R1
34057+*
016730 06FB 34058 BCTR R15,R11
34059 TSIMRET
016732 58F0 C060 16740 34060+ L R15,=A(SAVETST) R15 := current save area
016736 58DF 0004 00004 34061+ L R13,4(R15) get old save area back
01673A 98EC D00C 0000C 34062+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01673E 07FE 34063+ BR 14 RETURN 02000000
34064 TSIMEND
016740 34065+ LTORG
016740 00000458 34066 =A(SAVETST)
16744 34067+T912TEND EQU *
34068 *
34069 * Test 913 -- LR R,R (ig=36) -------------------------------
34070 *
34071 TSIMBEG T913,50000,36,1,C'LR R,R (ig=36)',DIS=1
34072+*
0042C4 34073+TDSCDAT CSECT
0042C8 34074+ DS 0D
34075+*
0042C8 00016748 34076+T913TDSC DC A(T913) // TENTRY
0042CC 0000007C 34077+ DC A(T913TEND-T913) // TLENGTH
0042D0 0000C350 34078+ DC F'50000' // TLRCNT
0042D4 00000024 34079+ DC F'36' // TIGCNT
0042D8 00000001 34080+ DC F'1' // TLTYPE
001E67 34081+TEXT CSECT
001E67 E3F9F1F3 34082+SPTR3053 DC C'T913'
0042DC 34083+TDSCDAT CSECT
0042DC 34084+ DS 0F
0042DC 04001E67 34085+ DC AL1(L'SPTR3053),AL3(SPTR3053)
001E6B 34086+TEXT CSECT
001E6B D3D940D96BD9404D 34087+SPTR3054 DC C'LR R,R (ig=36)'
0042E0 34088+TDSCDAT CSECT
0042E0 34089+ DS 0F
0042E0 0E001E6B 34090+ DC AL1(L'SPTR3054),AL3(SPTR3054)
34091+*
004D84 34092+TDSCTBL CSECT
04D84 34093+T913TPTR EQU *
004D84 010042C8 34094+ DC X'01',AL3(T913TDSC) disabled test
34095+*
016744 34096+TCODE CSECT
016748 34097+ DS 0D ensure double word alignment for test
016748 34098+T913 DS 0H 01650000
016748 90EC D00C 0000C 34099+ STM 14,12,12(13) SAVE REGISTERS 02950000
01674C 18CF 34100+ LR R12,R15 base register := entry address
16748 34101+ USING T913,R12 declare code base register
01674E 41B0 C01E 16766 34102+ LA R11,T913L load loop target to R11
PAGE 623
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016752 58F0 C078 167C0 34103+ L R15,=A(SAVETST) R15 := current save area
016756 50DF 0004 00004 34104+ ST R13,4(R15) set back pointer in current save area
01675A 182D 34105+ LR R2,R13 remember callers save area
01675C 18DF 34106+ LR R13,R15 setup current save area
01675E 50D2 0008 00008 34107+ ST R13,8(R2) set forw pointer in callers save area
00000 34108+ USING TDSC,R1 declare TDSC base register
016762 58F0 1008 00008 34109+ L R15,TLRCNT load local repeat count to R15
34110+*
34111 *
34112 T913L REPINS LR,(R2,R1) repeat: LR R2,R1
34113+*
34114+* build from sublist &ALIST a comma separated string &ARGS
34115+*
34116+*
34117+*
34118+*
34119+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
34120+* this allows to transfer the repeat count from last TDSCGEN call
34121+*
34122+*
16766 34123+T913L EQU *
34124+*
34125+* write a comment indicating what REPINS does (in case NOGEN in effect)
34126+*
34127+*,// REPINS: do 36 times:
34128+*
34129+* MNOTE requires that ' is doubled for expanded variables
34130+* thus build &MASTR as a copy of '&ARGS with ' doubled
34131+*
34132+*
34133+*,// LR R2,R1
34134+*
34135+* finally generate code: &ICNT copies of &CODE &ARGS
34136+*
016766 1821 34137+ LR R2,R1
016768 1821 34138+ LR R2,R1
01676A 1821 34139+ LR R2,R1
01676C 1821 34140+ LR R2,R1
01676E 1821 34141+ LR R2,R1
016770 1821 34142+ LR R2,R1
016772 1821 34143+ LR R2,R1
016774 1821 34144+ LR R2,R1
016776 1821 34145+ LR R2,R1
016778 1821 34146+ LR R2,R1
01677A 1821 34147+ LR R2,R1
01677C 1821 34148+ LR R2,R1
01677E 1821 34149+ LR R2,R1
016780 1821 34150+ LR R2,R1
016782 1821 34151+ LR R2,R1
016784 1821 34152+ LR R2,R1
016786 1821 34153+ LR R2,R1
016788 1821 34154+ LR R2,R1
01678A 1821 34155+ LR R2,R1
01678C 1821 34156+ LR R2,R1
01678E 1821 34157+ LR R2,R1
PAGE 624
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016790 1821 34158+ LR R2,R1
016792 1821 34159+ LR R2,R1
016794 1821 34160+ LR R2,R1
016796 1821 34161+ LR R2,R1
016798 1821 34162+ LR R2,R1
01679A 1821 34163+ LR R2,R1
01679C 1821 34164+ LR R2,R1
01679E 1821 34165+ LR R2,R1
0167A0 1821 34166+ LR R2,R1
0167A2 1821 34167+ LR R2,R1
0167A4 1821 34168+ LR R2,R1
0167A6 1821 34169+ LR R2,R1
0167A8 1821 34170+ LR R2,R1
0167AA 1821 34171+ LR R2,R1
0167AC 1821 34172+ LR R2,R1
34173+*
0167AE 06FB 34174 BCTR R15,R11
34175 TSIMRET
0167B0 58F0 C078 167C0 34176+ L R15,=A(SAVETST) R15 := current save area
0167B4 58DF 0004 00004 34177+ L R13,4(R15) get old save area back
0167B8 98EC D00C 0000C 34178+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0167BC 07FE 34179+ BR 14 RETURN 02000000
34180 TSIMEND
0167C0 34181+ LTORG
0167C0 00000458 34182 =A(SAVETST)
167C4 34183+T913TEND EQU *
34184 *
34185 * Test 914 -- LR R,R (ig=50) -------------------------------
34186 *
34187 TSIMBEG T914,45000,50,1,C'LR R,R (ig=50)',DIS=1
34188+*
0042E4 34189+TDSCDAT CSECT
0042E8 34190+ DS 0D
34191+*
0042E8 000167C8 34192+T914TDSC DC A(T914) // TENTRY
0042EC 0000009C 34193+ DC A(T914TEND-T914) // TLENGTH
0042F0 0000AFC8 34194+ DC F'45000' // TLRCNT
0042F4 00000032 34195+ DC F'50' // TIGCNT
0042F8 00000001 34196+ DC F'1' // TLTYPE
001E79 34197+TEXT CSECT
001E79 E3F9F1F4 34198+SPTR3065 DC C'T914'
0042FC 34199+TDSCDAT CSECT
0042FC 34200+ DS 0F
0042FC 04001E79 34201+ DC AL1(L'SPTR3065),AL3(SPTR3065)
001E7D 34202+TEXT CSECT
001E7D D3D940D96BD9404D 34203+SPTR3066 DC C'LR R,R (ig=50)'
004300 34204+TDSCDAT CSECT
004300 34205+ DS 0F
004300 0E001E7D 34206+ DC AL1(L'SPTR3066),AL3(SPTR3066)
34207+*
004D88 34208+TDSCTBL CSECT
04D88 34209+T914TPTR EQU *
004D88 010042E8 34210+ DC X'01',AL3(T914TDSC) disabled test
34211+*
0167C4 34212+TCODE CSECT
PAGE 625
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0167C8 34213+ DS 0D ensure double word alignment for test
0167C8 34214+T914 DS 0H 01650000
0167C8 90EC D00C 0000C 34215+ STM 14,12,12(13) SAVE REGISTERS 02950000
0167CC 18CF 34216+ LR R12,R15 base register := entry address
167C8 34217+ USING T914,R12 declare code base register
0167CE 41B0 C01E 167E6 34218+ LA R11,T914L load loop target to R11
0167D2 58F0 C098 16860 34219+ L R15,=A(SAVETST) R15 := current save area
0167D6 50DF 0004 00004 34220+ ST R13,4(R15) set back pointer in current save area
0167DA 182D 34221+ LR R2,R13 remember callers save area
0167DC 18DF 34222+ LR R13,R15 setup current save area
0167DE 50D2 0008 00008 34223+ ST R13,8(R2) set forw pointer in callers save area
00000 34224+ USING TDSC,R1 declare TDSC base register
0167E2 58F0 1008 00008 34225+ L R15,TLRCNT load local repeat count to R15
34226+*
34227 *
34228 T914L REPINS LR,(R2,R1) repeat: LR R2,R1
34229+*
34230+* build from sublist &ALIST a comma separated string &ARGS
34231+*
34232+*
34233+*
34234+*
34235+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
34236+* this allows to transfer the repeat count from last TDSCGEN call
34237+*
34238+*
167E6 34239+T914L EQU *
34240+*
34241+* write a comment indicating what REPINS does (in case NOGEN in effect)
34242+*
34243+*,// REPINS: do 50 times:
34244+*
34245+* MNOTE requires that ' is doubled for expanded variables
34246+* thus build &MASTR as a copy of '&ARGS with ' doubled
34247+*
34248+*
34249+*,// LR R2,R1
34250+*
34251+* finally generate code: &ICNT copies of &CODE &ARGS
34252+*
0167E6 1821 34253+ LR R2,R1
0167E8 1821 34254+ LR R2,R1
0167EA 1821 34255+ LR R2,R1
0167EC 1821 34256+ LR R2,R1
0167EE 1821 34257+ LR R2,R1
0167F0 1821 34258+ LR R2,R1
0167F2 1821 34259+ LR R2,R1
0167F4 1821 34260+ LR R2,R1
0167F6 1821 34261+ LR R2,R1
0167F8 1821 34262+ LR R2,R1
0167FA 1821 34263+ LR R2,R1
0167FC 1821 34264+ LR R2,R1
0167FE 1821 34265+ LR R2,R1
016800 1821 34266+ LR R2,R1
016802 1821 34267+ LR R2,R1
PAGE 626
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016804 1821 34268+ LR R2,R1
016806 1821 34269+ LR R2,R1
016808 1821 34270+ LR R2,R1
01680A 1821 34271+ LR R2,R1
01680C 1821 34272+ LR R2,R1
01680E 1821 34273+ LR R2,R1
016810 1821 34274+ LR R2,R1
016812 1821 34275+ LR R2,R1
016814 1821 34276+ LR R2,R1
016816 1821 34277+ LR R2,R1
016818 1821 34278+ LR R2,R1
01681A 1821 34279+ LR R2,R1
01681C 1821 34280+ LR R2,R1
01681E 1821 34281+ LR R2,R1
016820 1821 34282+ LR R2,R1
016822 1821 34283+ LR R2,R1
016824 1821 34284+ LR R2,R1
016826 1821 34285+ LR R2,R1
016828 1821 34286+ LR R2,R1
01682A 1821 34287+ LR R2,R1
01682C 1821 34288+ LR R2,R1
01682E 1821 34289+ LR R2,R1
016830 1821 34290+ LR R2,R1
016832 1821 34291+ LR R2,R1
016834 1821 34292+ LR R2,R1
016836 1821 34293+ LR R2,R1
016838 1821 34294+ LR R2,R1
01683A 1821 34295+ LR R2,R1
01683C 1821 34296+ LR R2,R1
01683E 1821 34297+ LR R2,R1
016840 1821 34298+ LR R2,R1
016842 1821 34299+ LR R2,R1
016844 1821 34300+ LR R2,R1
016846 1821 34301+ LR R2,R1
016848 1821 34302+ LR R2,R1
34303+*
01684A 06FB 34304 BCTR R15,R11
34305 TSIMRET
01684C 58F0 C098 16860 34306+ L R15,=A(SAVETST) R15 := current save area
016850 58DF 0004 00004 34307+ L R13,4(R15) get old save area back
016854 98EC D00C 0000C 34308+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016858 07FE 34309+ BR 14 RETURN 02000000
34310 TSIMEND
016860 34311+ LTORG
016860 00000458 34312 =A(SAVETST)
16864 34313+T914TEND EQU *
34314 *
34315 * Test 915 -- LR R,R (ig=72) -------------------------------
34316 *
34317 TSIMBEG T915,30000,72,1,C'LR R,R (ig=72)',DIS=1
34318+*
004304 34319+TDSCDAT CSECT
004308 34320+ DS 0D
34321+*
004308 00016868 34322+T915TDSC DC A(T915) // TENTRY
PAGE 627
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00430C 000000C4 34323+ DC A(T915TEND-T915) // TLENGTH
004310 00007530 34324+ DC F'30000' // TLRCNT
004314 00000048 34325+ DC F'72' // TIGCNT
004318 00000001 34326+ DC F'1' // TLTYPE
001E8B 34327+TEXT CSECT
001E8B E3F9F1F5 34328+SPTR3077 DC C'T915'
00431C 34329+TDSCDAT CSECT
00431C 34330+ DS 0F
00431C 04001E8B 34331+ DC AL1(L'SPTR3077),AL3(SPTR3077)
001E8F 34332+TEXT CSECT
001E8F D3D940D96BD9404D 34333+SPTR3078 DC C'LR R,R (ig=72)'
004320 34334+TDSCDAT CSECT
004320 34335+ DS 0F
004320 0E001E8F 34336+ DC AL1(L'SPTR3078),AL3(SPTR3078)
34337+*
004D8C 34338+TDSCTBL CSECT
04D8C 34339+T915TPTR EQU *
004D8C 01004308 34340+ DC X'01',AL3(T915TDSC) disabled test
34341+*
016864 34342+TCODE CSECT
016868 34343+ DS 0D ensure double word alignment for test
016868 34344+T915 DS 0H 01650000
016868 90EC D00C 0000C 34345+ STM 14,12,12(13) SAVE REGISTERS 02950000
01686C 18CF 34346+ LR R12,R15 base register := entry address
16868 34347+ USING T915,R12 declare code base register
01686E 41B0 C01E 16886 34348+ LA R11,T915L load loop target to R11
016872 58F0 C0C0 16928 34349+ L R15,=A(SAVETST) R15 := current save area
016876 50DF 0004 00004 34350+ ST R13,4(R15) set back pointer in current save area
01687A 182D 34351+ LR R2,R13 remember callers save area
01687C 18DF 34352+ LR R13,R15 setup current save area
01687E 50D2 0008 00008 34353+ ST R13,8(R2) set forw pointer in callers save area
00000 34354+ USING TDSC,R1 declare TDSC base register
016882 58F0 1008 00008 34355+ L R15,TLRCNT load local repeat count to R15
34356+*
34357 *
34358 T915L REPINS LR,(R2,R1) repeat: LR R2,R1
34359+*
34360+* build from sublist &ALIST a comma separated string &ARGS
34361+*
34362+*
34363+*
34364+*
34365+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
34366+* this allows to transfer the repeat count from last TDSCGEN call
34367+*
34368+*
16886 34369+T915L EQU *
34370+*
34371+* write a comment indicating what REPINS does (in case NOGEN in effect)
34372+*
34373+*,// REPINS: do 72 times:
34374+*
34375+* MNOTE requires that ' is doubled for expanded variables
34376+* thus build &MASTR as a copy of '&ARGS with ' doubled
34377+*
PAGE 628
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
34378+*
34379+*,// LR R2,R1
34380+*
34381+* finally generate code: &ICNT copies of &CODE &ARGS
34382+*
016886 1821 34383+ LR R2,R1
016888 1821 34384+ LR R2,R1
01688A 1821 34385+ LR R2,R1
01688C 1821 34386+ LR R2,R1
01688E 1821 34387+ LR R2,R1
016890 1821 34388+ LR R2,R1
016892 1821 34389+ LR R2,R1
016894 1821 34390+ LR R2,R1
016896 1821 34391+ LR R2,R1
016898 1821 34392+ LR R2,R1
01689A 1821 34393+ LR R2,R1
01689C 1821 34394+ LR R2,R1
01689E 1821 34395+ LR R2,R1
0168A0 1821 34396+ LR R2,R1
0168A2 1821 34397+ LR R2,R1
0168A4 1821 34398+ LR R2,R1
0168A6 1821 34399+ LR R2,R1
0168A8 1821 34400+ LR R2,R1
0168AA 1821 34401+ LR R2,R1
0168AC 1821 34402+ LR R2,R1
0168AE 1821 34403+ LR R2,R1
0168B0 1821 34404+ LR R2,R1
0168B2 1821 34405+ LR R2,R1
0168B4 1821 34406+ LR R2,R1
0168B6 1821 34407+ LR R2,R1
0168B8 1821 34408+ LR R2,R1
0168BA 1821 34409+ LR R2,R1
0168BC 1821 34410+ LR R2,R1
0168BE 1821 34411+ LR R2,R1
0168C0 1821 34412+ LR R2,R1
0168C2 1821 34413+ LR R2,R1
0168C4 1821 34414+ LR R2,R1
0168C6 1821 34415+ LR R2,R1
0168C8 1821 34416+ LR R2,R1
0168CA 1821 34417+ LR R2,R1
0168CC 1821 34418+ LR R2,R1
0168CE 1821 34419+ LR R2,R1
0168D0 1821 34420+ LR R2,R1
0168D2 1821 34421+ LR R2,R1
0168D4 1821 34422+ LR R2,R1
0168D6 1821 34423+ LR R2,R1
0168D8 1821 34424+ LR R2,R1
0168DA 1821 34425+ LR R2,R1
0168DC 1821 34426+ LR R2,R1
0168DE 1821 34427+ LR R2,R1
0168E0 1821 34428+ LR R2,R1
0168E2 1821 34429+ LR R2,R1
0168E4 1821 34430+ LR R2,R1
0168E6 1821 34431+ LR R2,R1
0168E8 1821 34432+ LR R2,R1
PAGE 629
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0168EA 1821 34433+ LR R2,R1
0168EC 1821 34434+ LR R2,R1
0168EE 1821 34435+ LR R2,R1
0168F0 1821 34436+ LR R2,R1
0168F2 1821 34437+ LR R2,R1
0168F4 1821 34438+ LR R2,R1
0168F6 1821 34439+ LR R2,R1
0168F8 1821 34440+ LR R2,R1
0168FA 1821 34441+ LR R2,R1
0168FC 1821 34442+ LR R2,R1
0168FE 1821 34443+ LR R2,R1
016900 1821 34444+ LR R2,R1
016902 1821 34445+ LR R2,R1
016904 1821 34446+ LR R2,R1
016906 1821 34447+ LR R2,R1
016908 1821 34448+ LR R2,R1
01690A 1821 34449+ LR R2,R1
01690C 1821 34450+ LR R2,R1
01690E 1821 34451+ LR R2,R1
016910 1821 34452+ LR R2,R1
016912 1821 34453+ LR R2,R1
016914 1821 34454+ LR R2,R1
34455+*
016916 06FB 34456 BCTR R15,R11
34457 TSIMRET
016918 58F0 C0C0 16928 34458+ L R15,=A(SAVETST) R15 := current save area
01691C 58DF 0004 00004 34459+ L R13,4(R15) get old save area back
016920 98EC D00C 0000C 34460+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016924 07FE 34461+ BR 14 RETURN 02000000
34462 TSIMEND
016928 34463+ LTORG
016928 00000458 34464 =A(SAVETST)
1692C 34465+T915TEND EQU *
34466 *
34467 * Test 92x -- L R,m count tests ============================
34468 *
34469 * Test 920 -- L R,m (ig=1) ---------------------------------
34470 *
34471 TSIMBEG T920,300000,1,1,C'L R,m (ig=1)'
34472+*
004324 34473+TDSCDAT CSECT
004328 34474+ DS 0D
34475+*
004328 00016930 34476+T920TDSC DC A(T920) // TENTRY
00432C 00000040 34477+ DC A(T920TEND-T920) // TLENGTH
004330 000493E0 34478+ DC F'300000' // TLRCNT
004334 00000001 34479+ DC F'1' // TIGCNT
004338 00000001 34480+ DC F'1' // TLTYPE
001E9D 34481+TEXT CSECT
001E9D E3F9F2F0 34482+SPTR3089 DC C'T920'
00433C 34483+TDSCDAT CSECT
00433C 34484+ DS 0F
00433C 04001E9D 34485+ DC AL1(L'SPTR3089),AL3(SPTR3089)
001EA1 34486+TEXT CSECT
001EA1 D340D96B94404D89 34487+SPTR3090 DC C'L R,m (ig=1)'
PAGE 630
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004340 34488+TDSCDAT CSECT
004340 34489+ DS 0F
004340 0C001EA1 34490+ DC AL1(L'SPTR3090),AL3(SPTR3090)
34491+*
004D90 34492+TDSCTBL CSECT
04D90 34493+T920TPTR EQU *
004D90 00004328 34494+ DC A(T920TDSC) enabled test
34495+*
01692C 34496+TCODE CSECT
016930 34497+ DS 0D ensure double word alignment for test
016930 34498+T920 DS 0H 01650000
016930 90EC D00C 0000C 34499+ STM 14,12,12(13) SAVE REGISTERS 02950000
016934 18CF 34500+ LR R12,R15 base register := entry address
16930 34501+ USING T920,R12 declare code base register
016936 41B0 C01E 1694E 34502+ LA R11,T920L load loop target to R11
01693A 58F0 C038 16968 34503+ L R15,=A(SAVETST) R15 := current save area
01693E 50DF 0004 00004 34504+ ST R13,4(R15) set back pointer in current save area
016942 182D 34505+ LR R2,R13 remember callers save area
016944 18DF 34506+ LR R13,R15 setup current save area
016946 50D2 0008 00008 34507+ ST R13,8(R2) set forw pointer in callers save area
00000 34508+ USING TDSC,R1 declare TDSC base register
01694A 58F0 1008 00008 34509+ L R15,TLRCNT load local repeat count to R15
34510+*
34511 *
34512 T920L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
34513+*
34514+* build from sublist &ALIST a comma separated string &ARGS
34515+*
34516+*
34517+*
34518+*
34519+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
34520+* this allows to transfer the repeat count from last TDSCGEN call
34521+*
34522+*
1694E 34523+T920L EQU *
34524+*
34525+* write a comment indicating what REPINS does (in case NOGEN in effect)
34526+*
34527+*,// REPINS: do 1 times:
34528+*
34529+* MNOTE requires that ' is doubled for expanded variables
34530+* thus build &MASTR as a copy of '&ARGS with ' doubled
34531+*
34532+*
34533+*,// L R2,=F'123'
34534+*
34535+* finally generate code: &ICNT copies of &CODE &ARGS
34536+*
01694E 5820 C03C 1696C 34537+ L R2,=F'123'
34538+*
016952 06FB 34539 BCTR R15,R11
34540 TSIMRET
016954 58F0 C038 16968 34541+ L R15,=A(SAVETST) R15 := current save area
016958 58DF 0004 00004 34542+ L R13,4(R15) get old save area back
PAGE 631
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01695C 98EC D00C 0000C 34543+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016960 07FE 34544+ BR 14 RETURN 02000000
34545 TSIMEND
016968 34546+ LTORG
016968 00000458 34547 =A(SAVETST)
01696C 0000007B 34548 =F'123'
16970 34549+T920TEND EQU *
34550 *
34551 * Test 921 -- L R,m (ig=2) ---------------------------------
34552 *
34553 TSIMBEG T921,250000,2,1,C'L R,m (ig=2)',DIS=1
34554+*
004344 34555+TDSCDAT CSECT
004348 34556+ DS 0D
34557+*
004348 00016970 34558+T921TDSC DC A(T921) // TENTRY
00434C 00000040 34559+ DC A(T921TEND-T921) // TLENGTH
004350 0003D090 34560+ DC F'250000' // TLRCNT
004354 00000002 34561+ DC F'2' // TIGCNT
004358 00000001 34562+ DC F'1' // TLTYPE
001EAD 34563+TEXT CSECT
001EAD E3F9F2F1 34564+SPTR3101 DC C'T921'
00435C 34565+TDSCDAT CSECT
00435C 34566+ DS 0F
00435C 04001EAD 34567+ DC AL1(L'SPTR3101),AL3(SPTR3101)
001EB1 34568+TEXT CSECT
001EB1 D340D96B94404D89 34569+SPTR3102 DC C'L R,m (ig=2)'
004360 34570+TDSCDAT CSECT
004360 34571+ DS 0F
004360 0C001EB1 34572+ DC AL1(L'SPTR3102),AL3(SPTR3102)
34573+*
004D94 34574+TDSCTBL CSECT
04D94 34575+T921TPTR EQU *
004D94 01004348 34576+ DC X'01',AL3(T921TDSC) disabled test
34577+*
016970 34578+TCODE CSECT
016970 34579+ DS 0D ensure double word alignment for test
016970 34580+T921 DS 0H 01650000
016970 90EC D00C 0000C 34581+ STM 14,12,12(13) SAVE REGISTERS 02950000
016974 18CF 34582+ LR R12,R15 base register := entry address
16970 34583+ USING T921,R12 declare code base register
016976 41B0 C01E 1698E 34584+ LA R11,T921L load loop target to R11
01697A 58F0 C038 169A8 34585+ L R15,=A(SAVETST) R15 := current save area
01697E 50DF 0004 00004 34586+ ST R13,4(R15) set back pointer in current save area
016982 182D 34587+ LR R2,R13 remember callers save area
016984 18DF 34588+ LR R13,R15 setup current save area
016986 50D2 0008 00008 34589+ ST R13,8(R2) set forw pointer in callers save area
00000 34590+ USING TDSC,R1 declare TDSC base register
01698A 58F0 1008 00008 34591+ L R15,TLRCNT load local repeat count to R15
34592+*
34593 *
34594 T921L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
34595+*
34596+* build from sublist &ALIST a comma separated string &ARGS
34597+*
PAGE 632
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
34598+*
34599+*
34600+*
34601+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
34602+* this allows to transfer the repeat count from last TDSCGEN call
34603+*
34604+*
1698E 34605+T921L EQU *
34606+*
34607+* write a comment indicating what REPINS does (in case NOGEN in effect)
34608+*
34609+*,// REPINS: do 2 times:
34610+*
34611+* MNOTE requires that ' is doubled for expanded variables
34612+* thus build &MASTR as a copy of '&ARGS with ' doubled
34613+*
34614+*
34615+*,// L R2,=F'123'
34616+*
34617+* finally generate code: &ICNT copies of &CODE &ARGS
34618+*
01698E 5820 C03C 169AC 34619+ L R2,=F'123'
016992 5820 C03C 169AC 34620+ L R2,=F'123'
34621+*
016996 06FB 34622 BCTR R15,R11
34623 TSIMRET
016998 58F0 C038 169A8 34624+ L R15,=A(SAVETST) R15 := current save area
01699C 58DF 0004 00004 34625+ L R13,4(R15) get old save area back
0169A0 98EC D00C 0000C 34626+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0169A4 07FE 34627+ BR 14 RETURN 02000000
34628 TSIMEND
0169A8 34629+ LTORG
0169A8 00000458 34630 =A(SAVETST)
0169AC 0000007B 34631 =F'123'
169B0 34632+T921TEND EQU *
34633 *
34634 * Test 922 -- L R,m (ig=3) ---------------------------------
34635 *
34636 TSIMBEG T922,200000,3,1,C'L R,m (ig=3)',DIS=1
34637+*
004364 34638+TDSCDAT CSECT
004368 34639+ DS 0D
34640+*
004368 000169B0 34641+T922TDSC DC A(T922) // TENTRY
00436C 00000048 34642+ DC A(T922TEND-T922) // TLENGTH
004370 00030D40 34643+ DC F'200000' // TLRCNT
004374 00000003 34644+ DC F'3' // TIGCNT
004378 00000001 34645+ DC F'1' // TLTYPE
001EBD 34646+TEXT CSECT
001EBD E3F9F2F2 34647+SPTR3113 DC C'T922'
00437C 34648+TDSCDAT CSECT
00437C 34649+ DS 0F
00437C 04001EBD 34650+ DC AL1(L'SPTR3113),AL3(SPTR3113)
001EC1 34651+TEXT CSECT
001EC1 D340D96B94404D89 34652+SPTR3114 DC C'L R,m (ig=3)'
PAGE 633
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004380 34653+TDSCDAT CSECT
004380 34654+ DS 0F
004380 0C001EC1 34655+ DC AL1(L'SPTR3114),AL3(SPTR3114)
34656+*
004D98 34657+TDSCTBL CSECT
04D98 34658+T922TPTR EQU *
004D98 01004368 34659+ DC X'01',AL3(T922TDSC) disabled test
34660+*
0169B0 34661+TCODE CSECT
0169B0 34662+ DS 0D ensure double word alignment for test
0169B0 34663+T922 DS 0H 01650000
0169B0 90EC D00C 0000C 34664+ STM 14,12,12(13) SAVE REGISTERS 02950000
0169B4 18CF 34665+ LR R12,R15 base register := entry address
169B0 34666+ USING T922,R12 declare code base register
0169B6 41B0 C01E 169CE 34667+ LA R11,T922L load loop target to R11
0169BA 58F0 C040 169F0 34668+ L R15,=A(SAVETST) R15 := current save area
0169BE 50DF 0004 00004 34669+ ST R13,4(R15) set back pointer in current save area
0169C2 182D 34670+ LR R2,R13 remember callers save area
0169C4 18DF 34671+ LR R13,R15 setup current save area
0169C6 50D2 0008 00008 34672+ ST R13,8(R2) set forw pointer in callers save area
00000 34673+ USING TDSC,R1 declare TDSC base register
0169CA 58F0 1008 00008 34674+ L R15,TLRCNT load local repeat count to R15
34675+*
34676 *
34677 T922L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
34678+*
34679+* build from sublist &ALIST a comma separated string &ARGS
34680+*
34681+*
34682+*
34683+*
34684+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
34685+* this allows to transfer the repeat count from last TDSCGEN call
34686+*
34687+*
169CE 34688+T922L EQU *
34689+*
34690+* write a comment indicating what REPINS does (in case NOGEN in effect)
34691+*
34692+*,// REPINS: do 3 times:
34693+*
34694+* MNOTE requires that ' is doubled for expanded variables
34695+* thus build &MASTR as a copy of '&ARGS with ' doubled
34696+*
34697+*
34698+*,// L R2,=F'123'
34699+*
34700+* finally generate code: &ICNT copies of &CODE &ARGS
34701+*
0169CE 5820 C044 169F4 34702+ L R2,=F'123'
0169D2 5820 C044 169F4 34703+ L R2,=F'123'
0169D6 5820 C044 169F4 34704+ L R2,=F'123'
34705+*
0169DA 06FB 34706 BCTR R15,R11
34707 TSIMRET
PAGE 634
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0169DC 58F0 C040 169F0 34708+ L R15,=A(SAVETST) R15 := current save area
0169E0 58DF 0004 00004 34709+ L R13,4(R15) get old save area back
0169E4 98EC D00C 0000C 34710+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0169E8 07FE 34711+ BR 14 RETURN 02000000
34712 TSIMEND
0169F0 34713+ LTORG
0169F0 00000458 34714 =A(SAVETST)
0169F4 0000007B 34715 =F'123'
169F8 34716+T922TEND EQU *
34717 *
34718 * Test 923 -- L R,m (ig=4) ---------------------------------
34719 *
34720 TSIMBEG T923,100000,4,1,C'L R,m (ig=4)',DIS=1
34721+*
004384 34722+TDSCDAT CSECT
004388 34723+ DS 0D
34724+*
004388 000169F8 34725+T923TDSC DC A(T923) // TENTRY
00438C 00000048 34726+ DC A(T923TEND-T923) // TLENGTH
004390 000186A0 34727+ DC F'100000' // TLRCNT
004394 00000004 34728+ DC F'4' // TIGCNT
004398 00000001 34729+ DC F'1' // TLTYPE
001ECD 34730+TEXT CSECT
001ECD E3F9F2F3 34731+SPTR3125 DC C'T923'
00439C 34732+TDSCDAT CSECT
00439C 34733+ DS 0F
00439C 04001ECD 34734+ DC AL1(L'SPTR3125),AL3(SPTR3125)
001ED1 34735+TEXT CSECT
001ED1 D340D96B94404D89 34736+SPTR3126 DC C'L R,m (ig=4)'
0043A0 34737+TDSCDAT CSECT
0043A0 34738+ DS 0F
0043A0 0C001ED1 34739+ DC AL1(L'SPTR3126),AL3(SPTR3126)
34740+*
004D9C 34741+TDSCTBL CSECT
04D9C 34742+T923TPTR EQU *
004D9C 01004388 34743+ DC X'01',AL3(T923TDSC) disabled test
34744+*
0169F8 34745+TCODE CSECT
0169F8 34746+ DS 0D ensure double word alignment for test
0169F8 34747+T923 DS 0H 01650000
0169F8 90EC D00C 0000C 34748+ STM 14,12,12(13) SAVE REGISTERS 02950000
0169FC 18CF 34749+ LR R12,R15 base register := entry address
169F8 34750+ USING T923,R12 declare code base register
0169FE 41B0 C01E 16A16 34751+ LA R11,T923L load loop target to R11
016A02 58F0 C040 16A38 34752+ L R15,=A(SAVETST) R15 := current save area
016A06 50DF 0004 00004 34753+ ST R13,4(R15) set back pointer in current save area
016A0A 182D 34754+ LR R2,R13 remember callers save area
016A0C 18DF 34755+ LR R13,R15 setup current save area
016A0E 50D2 0008 00008 34756+ ST R13,8(R2) set forw pointer in callers save area
00000 34757+ USING TDSC,R1 declare TDSC base register
016A12 58F0 1008 00008 34758+ L R15,TLRCNT load local repeat count to R15
34759+*
34760 *
34761 T923L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
34762+*
PAGE 635
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
34763+* build from sublist &ALIST a comma separated string &ARGS
34764+*
34765+*
34766+*
34767+*
34768+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
34769+* this allows to transfer the repeat count from last TDSCGEN call
34770+*
34771+*
16A16 34772+T923L EQU *
34773+*
34774+* write a comment indicating what REPINS does (in case NOGEN in effect)
34775+*
34776+*,// REPINS: do 4 times:
34777+*
34778+* MNOTE requires that ' is doubled for expanded variables
34779+* thus build &MASTR as a copy of '&ARGS with ' doubled
34780+*
34781+*
34782+*,// L R2,=F'123'
34783+*
34784+* finally generate code: &ICNT copies of &CODE &ARGS
34785+*
016A16 5820 C044 16A3C 34786+ L R2,=F'123'
016A1A 5820 C044 16A3C 34787+ L R2,=F'123'
016A1E 5820 C044 16A3C 34788+ L R2,=F'123'
016A22 5820 C044 16A3C 34789+ L R2,=F'123'
34790+*
016A26 06FB 34791 BCTR R15,R11
34792 TSIMRET
016A28 58F0 C040 16A38 34793+ L R15,=A(SAVETST) R15 := current save area
016A2C 58DF 0004 00004 34794+ L R13,4(R15) get old save area back
016A30 98EC D00C 0000C 34795+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016A34 07FE 34796+ BR 14 RETURN 02000000
34797 TSIMEND
016A38 34798+ LTORG
016A38 00000458 34799 =A(SAVETST)
016A3C 0000007B 34800 =F'123'
16A40 34801+T923TEND EQU *
34802 *
34803 * Test 924 -- L R,m (ig=5) ---------------------------------
34804 *
34805 TSIMBEG T924,100000,5,1,C'L R,m (ig=5)',DIS=1
34806+*
0043A4 34807+TDSCDAT CSECT
0043A8 34808+ DS 0D
34809+*
0043A8 00016A40 34810+T924TDSC DC A(T924) // TENTRY
0043AC 00000050 34811+ DC A(T924TEND-T924) // TLENGTH
0043B0 000186A0 34812+ DC F'100000' // TLRCNT
0043B4 00000005 34813+ DC F'5' // TIGCNT
0043B8 00000001 34814+ DC F'1' // TLTYPE
001EDD 34815+TEXT CSECT
001EDD E3F9F2F4 34816+SPTR3137 DC C'T924'
0043BC 34817+TDSCDAT CSECT
PAGE 636
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0043BC 34818+ DS 0F
0043BC 04001EDD 34819+ DC AL1(L'SPTR3137),AL3(SPTR3137)
001EE1 34820+TEXT CSECT
001EE1 D340D96B94404D89 34821+SPTR3138 DC C'L R,m (ig=5)'
0043C0 34822+TDSCDAT CSECT
0043C0 34823+ DS 0F
0043C0 0C001EE1 34824+ DC AL1(L'SPTR3138),AL3(SPTR3138)
34825+*
004DA0 34826+TDSCTBL CSECT
04DA0 34827+T924TPTR EQU *
004DA0 010043A8 34828+ DC X'01',AL3(T924TDSC) disabled test
34829+*
016A40 34830+TCODE CSECT
016A40 34831+ DS 0D ensure double word alignment for test
016A40 34832+T924 DS 0H 01650000
016A40 90EC D00C 0000C 34833+ STM 14,12,12(13) SAVE REGISTERS 02950000
016A44 18CF 34834+ LR R12,R15 base register := entry address
16A40 34835+ USING T924,R12 declare code base register
016A46 41B0 C01E 16A5E 34836+ LA R11,T924L load loop target to R11
016A4A 58F0 C048 16A88 34837+ L R15,=A(SAVETST) R15 := current save area
016A4E 50DF 0004 00004 34838+ ST R13,4(R15) set back pointer in current save area
016A52 182D 34839+ LR R2,R13 remember callers save area
016A54 18DF 34840+ LR R13,R15 setup current save area
016A56 50D2 0008 00008 34841+ ST R13,8(R2) set forw pointer in callers save area
00000 34842+ USING TDSC,R1 declare TDSC base register
016A5A 58F0 1008 00008 34843+ L R15,TLRCNT load local repeat count to R15
34844+*
34845 *
34846 T924L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
34847+*
34848+* build from sublist &ALIST a comma separated string &ARGS
34849+*
34850+*
34851+*
34852+*
34853+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
34854+* this allows to transfer the repeat count from last TDSCGEN call
34855+*
34856+*
16A5E 34857+T924L EQU *
34858+*
34859+* write a comment indicating what REPINS does (in case NOGEN in effect)
34860+*
34861+*,// REPINS: do 5 times:
34862+*
34863+* MNOTE requires that ' is doubled for expanded variables
34864+* thus build &MASTR as a copy of '&ARGS with ' doubled
34865+*
34866+*
34867+*,// L R2,=F'123'
34868+*
34869+* finally generate code: &ICNT copies of &CODE &ARGS
34870+*
016A5E 5820 C04C 16A8C 34871+ L R2,=F'123'
016A62 5820 C04C 16A8C 34872+ L R2,=F'123'
PAGE 637
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016A66 5820 C04C 16A8C 34873+ L R2,=F'123'
016A6A 5820 C04C 16A8C 34874+ L R2,=F'123'
016A6E 5820 C04C 16A8C 34875+ L R2,=F'123'
34876+*
016A72 06FB 34877 BCTR R15,R11
34878 TSIMRET
016A74 58F0 C048 16A88 34879+ L R15,=A(SAVETST) R15 := current save area
016A78 58DF 0004 00004 34880+ L R13,4(R15) get old save area back
016A7C 98EC D00C 0000C 34881+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016A80 07FE 34882+ BR 14 RETURN 02000000
34883 TSIMEND
016A88 34884+ LTORG
016A88 00000458 34885 =A(SAVETST)
016A8C 0000007B 34886 =F'123'
16A90 34887+T924TEND EQU *
34888 *
34889 * Test 925 -- L R,m (ig=6) ---------------------------------
34890 *
34891 TSIMBEG T925,80000,6,1,C'L R,m (ig=6)',DIS=1
34892+*
0043C4 34893+TDSCDAT CSECT
0043C8 34894+ DS 0D
34895+*
0043C8 00016A90 34896+T925TDSC DC A(T925) // TENTRY
0043CC 00000050 34897+ DC A(T925TEND-T925) // TLENGTH
0043D0 00013880 34898+ DC F'80000' // TLRCNT
0043D4 00000006 34899+ DC F'6' // TIGCNT
0043D8 00000001 34900+ DC F'1' // TLTYPE
001EED 34901+TEXT CSECT
001EED E3F9F2F5 34902+SPTR3149 DC C'T925'
0043DC 34903+TDSCDAT CSECT
0043DC 34904+ DS 0F
0043DC 04001EED 34905+ DC AL1(L'SPTR3149),AL3(SPTR3149)
001EF1 34906+TEXT CSECT
001EF1 D340D96B94404D89 34907+SPTR3150 DC C'L R,m (ig=6)'
0043E0 34908+TDSCDAT CSECT
0043E0 34909+ DS 0F
0043E0 0C001EF1 34910+ DC AL1(L'SPTR3150),AL3(SPTR3150)
34911+*
004DA4 34912+TDSCTBL CSECT
04DA4 34913+T925TPTR EQU *
004DA4 010043C8 34914+ DC X'01',AL3(T925TDSC) disabled test
34915+*
016A90 34916+TCODE CSECT
016A90 34917+ DS 0D ensure double word alignment for test
016A90 34918+T925 DS 0H 01650000
016A90 90EC D00C 0000C 34919+ STM 14,12,12(13) SAVE REGISTERS 02950000
016A94 18CF 34920+ LR R12,R15 base register := entry address
16A90 34921+ USING T925,R12 declare code base register
016A96 41B0 C01E 16AAE 34922+ LA R11,T925L load loop target to R11
016A9A 58F0 C048 16AD8 34923+ L R15,=A(SAVETST) R15 := current save area
016A9E 50DF 0004 00004 34924+ ST R13,4(R15) set back pointer in current save area
016AA2 182D 34925+ LR R2,R13 remember callers save area
016AA4 18DF 34926+ LR R13,R15 setup current save area
016AA6 50D2 0008 00008 34927+ ST R13,8(R2) set forw pointer in callers save area
PAGE 638
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00000 34928+ USING TDSC,R1 declare TDSC base register
016AAA 58F0 1008 00008 34929+ L R15,TLRCNT load local repeat count to R15
34930+*
34931 *
34932 T925L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
34933+*
34934+* build from sublist &ALIST a comma separated string &ARGS
34935+*
34936+*
34937+*
34938+*
34939+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
34940+* this allows to transfer the repeat count from last TDSCGEN call
34941+*
34942+*
16AAE 34943+T925L EQU *
34944+*
34945+* write a comment indicating what REPINS does (in case NOGEN in effect)
34946+*
34947+*,// REPINS: do 6 times:
34948+*
34949+* MNOTE requires that ' is doubled for expanded variables
34950+* thus build &MASTR as a copy of '&ARGS with ' doubled
34951+*
34952+*
34953+*,// L R2,=F'123'
34954+*
34955+* finally generate code: &ICNT copies of &CODE &ARGS
34956+*
016AAE 5820 C04C 16ADC 34957+ L R2,=F'123'
016AB2 5820 C04C 16ADC 34958+ L R2,=F'123'
016AB6 5820 C04C 16ADC 34959+ L R2,=F'123'
016ABA 5820 C04C 16ADC 34960+ L R2,=F'123'
016ABE 5820 C04C 16ADC 34961+ L R2,=F'123'
016AC2 5820 C04C 16ADC 34962+ L R2,=F'123'
34963+*
016AC6 06FB 34964 BCTR R15,R11
34965 TSIMRET
016AC8 58F0 C048 16AD8 34966+ L R15,=A(SAVETST) R15 := current save area
016ACC 58DF 0004 00004 34967+ L R13,4(R15) get old save area back
016AD0 98EC D00C 0000C 34968+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016AD4 07FE 34969+ BR 14 RETURN 02000000
34970 TSIMEND
016AD8 34971+ LTORG
016AD8 00000458 34972 =A(SAVETST)
016ADC 0000007B 34973 =F'123'
16AE0 34974+T925TEND EQU *
34975 *
34976 * Test 926 -- L R,m (ig=7) ---------------------------------
34977 *
34978 TSIMBEG T926,70000,7,1,C'L R,m (ig=7)',DIS=1
34979+*
0043E4 34980+TDSCDAT CSECT
0043E8 34981+ DS 0D
34982+*
PAGE 639
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0043E8 00016AE0 34983+T926TDSC DC A(T926) // TENTRY
0043EC 00000058 34984+ DC A(T926TEND-T926) // TLENGTH
0043F0 00011170 34985+ DC F'70000' // TLRCNT
0043F4 00000007 34986+ DC F'7' // TIGCNT
0043F8 00000001 34987+ DC F'1' // TLTYPE
001EFD 34988+TEXT CSECT
001EFD E3F9F2F6 34989+SPTR3161 DC C'T926'
0043FC 34990+TDSCDAT CSECT
0043FC 34991+ DS 0F
0043FC 04001EFD 34992+ DC AL1(L'SPTR3161),AL3(SPTR3161)
001F01 34993+TEXT CSECT
001F01 D340D96B94404D89 34994+SPTR3162 DC C'L R,m (ig=7)'
004400 34995+TDSCDAT CSECT
004400 34996+ DS 0F
004400 0C001F01 34997+ DC AL1(L'SPTR3162),AL3(SPTR3162)
34998+*
004DA8 34999+TDSCTBL CSECT
04DA8 35000+T926TPTR EQU *
004DA8 010043E8 35001+ DC X'01',AL3(T926TDSC) disabled test
35002+*
016AE0 35003+TCODE CSECT
016AE0 35004+ DS 0D ensure double word alignment for test
016AE0 35005+T926 DS 0H 01650000
016AE0 90EC D00C 0000C 35006+ STM 14,12,12(13) SAVE REGISTERS 02950000
016AE4 18CF 35007+ LR R12,R15 base register := entry address
16AE0 35008+ USING T926,R12 declare code base register
016AE6 41B0 C01E 16AFE 35009+ LA R11,T926L load loop target to R11
016AEA 58F0 C050 16B30 35010+ L R15,=A(SAVETST) R15 := current save area
016AEE 50DF 0004 00004 35011+ ST R13,4(R15) set back pointer in current save area
016AF2 182D 35012+ LR R2,R13 remember callers save area
016AF4 18DF 35013+ LR R13,R15 setup current save area
016AF6 50D2 0008 00008 35014+ ST R13,8(R2) set forw pointer in callers save area
00000 35015+ USING TDSC,R1 declare TDSC base register
016AFA 58F0 1008 00008 35016+ L R15,TLRCNT load local repeat count to R15
35017+*
35018 *
35019 T926L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
35020+*
35021+* build from sublist &ALIST a comma separated string &ARGS
35022+*
35023+*
35024+*
35025+*
35026+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
35027+* this allows to transfer the repeat count from last TDSCGEN call
35028+*
35029+*
16AFE 35030+T926L EQU *
35031+*
35032+* write a comment indicating what REPINS does (in case NOGEN in effect)
35033+*
35034+*,// REPINS: do 7 times:
35035+*
35036+* MNOTE requires that ' is doubled for expanded variables
35037+* thus build &MASTR as a copy of '&ARGS with ' doubled
PAGE 640
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
35038+*
35039+*
35040+*,// L R2,=F'123'
35041+*
35042+* finally generate code: &ICNT copies of &CODE &ARGS
35043+*
016AFE 5820 C054 16B34 35044+ L R2,=F'123'
016B02 5820 C054 16B34 35045+ L R2,=F'123'
016B06 5820 C054 16B34 35046+ L R2,=F'123'
016B0A 5820 C054 16B34 35047+ L R2,=F'123'
016B0E 5820 C054 16B34 35048+ L R2,=F'123'
016B12 5820 C054 16B34 35049+ L R2,=F'123'
016B16 5820 C054 16B34 35050+ L R2,=F'123'
35051+*
016B1A 06FB 35052 BCTR R15,R11
35053 TSIMRET
016B1C 58F0 C050 16B30 35054+ L R15,=A(SAVETST) R15 := current save area
016B20 58DF 0004 00004 35055+ L R13,4(R15) get old save area back
016B24 98EC D00C 0000C 35056+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016B28 07FE 35057+ BR 14 RETURN 02000000
35058 TSIMEND
016B30 35059+ LTORG
016B30 00000458 35060 =A(SAVETST)
016B34 0000007B 35061 =F'123'
16B38 35062+T926TEND EQU *
35063 *
35064 * Test 927 -- L R,m (ig=8) ---------------------------------
35065 *
35066 TSIMBEG T927,70000,8,1,C'L R,m (ig=8)',DIS=1
35067+*
004404 35068+TDSCDAT CSECT
004408 35069+ DS 0D
35070+*
004408 00016B38 35071+T927TDSC DC A(T927) // TENTRY
00440C 00000058 35072+ DC A(T927TEND-T927) // TLENGTH
004410 00011170 35073+ DC F'70000' // TLRCNT
004414 00000008 35074+ DC F'8' // TIGCNT
004418 00000001 35075+ DC F'1' // TLTYPE
001F0D 35076+TEXT CSECT
001F0D E3F9F2F7 35077+SPTR3173 DC C'T927'
00441C 35078+TDSCDAT CSECT
00441C 35079+ DS 0F
00441C 04001F0D 35080+ DC AL1(L'SPTR3173),AL3(SPTR3173)
001F11 35081+TEXT CSECT
001F11 D340D96B94404D89 35082+SPTR3174 DC C'L R,m (ig=8)'
004420 35083+TDSCDAT CSECT
004420 35084+ DS 0F
004420 0C001F11 35085+ DC AL1(L'SPTR3174),AL3(SPTR3174)
35086+*
004DAC 35087+TDSCTBL CSECT
04DAC 35088+T927TPTR EQU *
004DAC 01004408 35089+ DC X'01',AL3(T927TDSC) disabled test
35090+*
016B38 35091+TCODE CSECT
016B38 35092+ DS 0D ensure double word alignment for test
PAGE 641
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016B38 35093+T927 DS 0H 01650000
016B38 90EC D00C 0000C 35094+ STM 14,12,12(13) SAVE REGISTERS 02950000
016B3C 18CF 35095+ LR R12,R15 base register := entry address
16B38 35096+ USING T927,R12 declare code base register
016B3E 41B0 C01E 16B56 35097+ LA R11,T927L load loop target to R11
016B42 58F0 C050 16B88 35098+ L R15,=A(SAVETST) R15 := current save area
016B46 50DF 0004 00004 35099+ ST R13,4(R15) set back pointer in current save area
016B4A 182D 35100+ LR R2,R13 remember callers save area
016B4C 18DF 35101+ LR R13,R15 setup current save area
016B4E 50D2 0008 00008 35102+ ST R13,8(R2) set forw pointer in callers save area
00000 35103+ USING TDSC,R1 declare TDSC base register
016B52 58F0 1008 00008 35104+ L R15,TLRCNT load local repeat count to R15
35105+*
35106 *
35107 T927L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
35108+*
35109+* build from sublist &ALIST a comma separated string &ARGS
35110+*
35111+*
35112+*
35113+*
35114+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
35115+* this allows to transfer the repeat count from last TDSCGEN call
35116+*
35117+*
16B56 35118+T927L EQU *
35119+*
35120+* write a comment indicating what REPINS does (in case NOGEN in effect)
35121+*
35122+*,// REPINS: do 8 times:
35123+*
35124+* MNOTE requires that ' is doubled for expanded variables
35125+* thus build &MASTR as a copy of '&ARGS with ' doubled
35126+*
35127+*
35128+*,// L R2,=F'123'
35129+*
35130+* finally generate code: &ICNT copies of &CODE &ARGS
35131+*
016B56 5820 C054 16B8C 35132+ L R2,=F'123'
016B5A 5820 C054 16B8C 35133+ L R2,=F'123'
016B5E 5820 C054 16B8C 35134+ L R2,=F'123'
016B62 5820 C054 16B8C 35135+ L R2,=F'123'
016B66 5820 C054 16B8C 35136+ L R2,=F'123'
016B6A 5820 C054 16B8C 35137+ L R2,=F'123'
016B6E 5820 C054 16B8C 35138+ L R2,=F'123'
016B72 5820 C054 16B8C 35139+ L R2,=F'123'
35140+*
016B76 06FB 35141 BCTR R15,R11
35142 TSIMRET
016B78 58F0 C050 16B88 35143+ L R15,=A(SAVETST) R15 := current save area
016B7C 58DF 0004 00004 35144+ L R13,4(R15) get old save area back
016B80 98EC D00C 0000C 35145+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016B84 07FE 35146+ BR 14 RETURN 02000000
35147 TSIMEND
PAGE 642
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016B88 35148+ LTORG
016B88 00000458 35149 =A(SAVETST)
016B8C 0000007B 35150 =F'123'
16B90 35151+T927TEND EQU *
35152 *
35153 * Test 928 -- L R,m (ig=9) ---------------------------------
35154 *
35155 TSIMBEG T928,70000,9,1,C'L R,m (ig=9)',DIS=1
35156+*
004424 35157+TDSCDAT CSECT
004428 35158+ DS 0D
35159+*
004428 00016B90 35160+T928TDSC DC A(T928) // TENTRY
00442C 00000060 35161+ DC A(T928TEND-T928) // TLENGTH
004430 00011170 35162+ DC F'70000' // TLRCNT
004434 00000009 35163+ DC F'9' // TIGCNT
004438 00000001 35164+ DC F'1' // TLTYPE
001F1D 35165+TEXT CSECT
001F1D E3F9F2F8 35166+SPTR3185 DC C'T928'
00443C 35167+TDSCDAT CSECT
00443C 35168+ DS 0F
00443C 04001F1D 35169+ DC AL1(L'SPTR3185),AL3(SPTR3185)
001F21 35170+TEXT CSECT
001F21 D340D96B94404D89 35171+SPTR3186 DC C'L R,m (ig=9)'
004440 35172+TDSCDAT CSECT
004440 35173+ DS 0F
004440 0C001F21 35174+ DC AL1(L'SPTR3186),AL3(SPTR3186)
35175+*
004DB0 35176+TDSCTBL CSECT
04DB0 35177+T928TPTR EQU *
004DB0 01004428 35178+ DC X'01',AL3(T928TDSC) disabled test
35179+*
016B90 35180+TCODE CSECT
016B90 35181+ DS 0D ensure double word alignment for test
016B90 35182+T928 DS 0H 01650000
016B90 90EC D00C 0000C 35183+ STM 14,12,12(13) SAVE REGISTERS 02950000
016B94 18CF 35184+ LR R12,R15 base register := entry address
16B90 35185+ USING T928,R12 declare code base register
016B96 41B0 C01E 16BAE 35186+ LA R11,T928L load loop target to R11
016B9A 58F0 C058 16BE8 35187+ L R15,=A(SAVETST) R15 := current save area
016B9E 50DF 0004 00004 35188+ ST R13,4(R15) set back pointer in current save area
016BA2 182D 35189+ LR R2,R13 remember callers save area
016BA4 18DF 35190+ LR R13,R15 setup current save area
016BA6 50D2 0008 00008 35191+ ST R13,8(R2) set forw pointer in callers save area
00000 35192+ USING TDSC,R1 declare TDSC base register
016BAA 58F0 1008 00008 35193+ L R15,TLRCNT load local repeat count to R15
35194+*
35195 *
35196 T928L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
35197+*
35198+* build from sublist &ALIST a comma separated string &ARGS
35199+*
35200+*
35201+*
35202+*
PAGE 643
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
35203+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
35204+* this allows to transfer the repeat count from last TDSCGEN call
35205+*
35206+*
16BAE 35207+T928L EQU *
35208+*
35209+* write a comment indicating what REPINS does (in case NOGEN in effect)
35210+*
35211+*,// REPINS: do 9 times:
35212+*
35213+* MNOTE requires that ' is doubled for expanded variables
35214+* thus build &MASTR as a copy of '&ARGS with ' doubled
35215+*
35216+*
35217+*,// L R2,=F'123'
35218+*
35219+* finally generate code: &ICNT copies of &CODE &ARGS
35220+*
016BAE 5820 C05C 16BEC 35221+ L R2,=F'123'
016BB2 5820 C05C 16BEC 35222+ L R2,=F'123'
016BB6 5820 C05C 16BEC 35223+ L R2,=F'123'
016BBA 5820 C05C 16BEC 35224+ L R2,=F'123'
016BBE 5820 C05C 16BEC 35225+ L R2,=F'123'
016BC2 5820 C05C 16BEC 35226+ L R2,=F'123'
016BC6 5820 C05C 16BEC 35227+ L R2,=F'123'
016BCA 5820 C05C 16BEC 35228+ L R2,=F'123'
016BCE 5820 C05C 16BEC 35229+ L R2,=F'123'
35230+*
016BD2 06FB 35231 BCTR R15,R11
35232 TSIMRET
016BD4 58F0 C058 16BE8 35233+ L R15,=A(SAVETST) R15 := current save area
016BD8 58DF 0004 00004 35234+ L R13,4(R15) get old save area back
016BDC 98EC D00C 0000C 35235+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016BE0 07FE 35236+ BR 14 RETURN 02000000
35237 TSIMEND
016BE8 35238+ LTORG
016BE8 00000458 35239 =A(SAVETST)
016BEC 0000007B 35240 =F'123'
16BF0 35241+T928TEND EQU *
35242 *
35243 * Test 929 -- L R,m (ig=10) --------------------------------
35244 *
35245 TSIMBEG T929,70000,10,1,C'L R,m (ig=10)',DIS=1
35246+*
004444 35247+TDSCDAT CSECT
004448 35248+ DS 0D
35249+*
004448 00016BF0 35250+T929TDSC DC A(T929) // TENTRY
00444C 00000060 35251+ DC A(T929TEND-T929) // TLENGTH
004450 00011170 35252+ DC F'70000' // TLRCNT
004454 0000000A 35253+ DC F'10' // TIGCNT
004458 00000001 35254+ DC F'1' // TLTYPE
001F2D 35255+TEXT CSECT
001F2D E3F9F2F9 35256+SPTR3197 DC C'T929'
00445C 35257+TDSCDAT CSECT
PAGE 644
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00445C 35258+ DS 0F
00445C 04001F2D 35259+ DC AL1(L'SPTR3197),AL3(SPTR3197)
001F31 35260+TEXT CSECT
001F31 D340D96B94404D89 35261+SPTR3198 DC C'L R,m (ig=10)'
004460 35262+TDSCDAT CSECT
004460 35263+ DS 0F
004460 0D001F31 35264+ DC AL1(L'SPTR3198),AL3(SPTR3198)
35265+*
004DB4 35266+TDSCTBL CSECT
04DB4 35267+T929TPTR EQU *
004DB4 01004448 35268+ DC X'01',AL3(T929TDSC) disabled test
35269+*
016BF0 35270+TCODE CSECT
016BF0 35271+ DS 0D ensure double word alignment for test
016BF0 35272+T929 DS 0H 01650000
016BF0 90EC D00C 0000C 35273+ STM 14,12,12(13) SAVE REGISTERS 02950000
016BF4 18CF 35274+ LR R12,R15 base register := entry address
16BF0 35275+ USING T929,R12 declare code base register
016BF6 41B0 C01E 16C0E 35276+ LA R11,T929L load loop target to R11
016BFA 58F0 C058 16C48 35277+ L R15,=A(SAVETST) R15 := current save area
016BFE 50DF 0004 00004 35278+ ST R13,4(R15) set back pointer in current save area
016C02 182D 35279+ LR R2,R13 remember callers save area
016C04 18DF 35280+ LR R13,R15 setup current save area
016C06 50D2 0008 00008 35281+ ST R13,8(R2) set forw pointer in callers save area
00000 35282+ USING TDSC,R1 declare TDSC base register
016C0A 58F0 1008 00008 35283+ L R15,TLRCNT load local repeat count to R15
35284+*
35285 *
35286 T929L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
35287+*
35288+* build from sublist &ALIST a comma separated string &ARGS
35289+*
35290+*
35291+*
35292+*
35293+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
35294+* this allows to transfer the repeat count from last TDSCGEN call
35295+*
35296+*
16C0E 35297+T929L EQU *
35298+*
35299+* write a comment indicating what REPINS does (in case NOGEN in effect)
35300+*
35301+*,// REPINS: do 10 times:
35302+*
35303+* MNOTE requires that ' is doubled for expanded variables
35304+* thus build &MASTR as a copy of '&ARGS with ' doubled
35305+*
35306+*
35307+*,// L R2,=F'123'
35308+*
35309+* finally generate code: &ICNT copies of &CODE &ARGS
35310+*
016C0E 5820 C05C 16C4C 35311+ L R2,=F'123'
016C12 5820 C05C 16C4C 35312+ L R2,=F'123'
PAGE 645
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016C16 5820 C05C 16C4C 35313+ L R2,=F'123'
016C1A 5820 C05C 16C4C 35314+ L R2,=F'123'
016C1E 5820 C05C 16C4C 35315+ L R2,=F'123'
016C22 5820 C05C 16C4C 35316+ L R2,=F'123'
016C26 5820 C05C 16C4C 35317+ L R2,=F'123'
016C2A 5820 C05C 16C4C 35318+ L R2,=F'123'
016C2E 5820 C05C 16C4C 35319+ L R2,=F'123'
016C32 5820 C05C 16C4C 35320+ L R2,=F'123'
35321+*
016C36 06FB 35322 BCTR R15,R11
35323 TSIMRET
016C38 58F0 C058 16C48 35324+ L R15,=A(SAVETST) R15 := current save area
016C3C 58DF 0004 00004 35325+ L R13,4(R15) get old save area back
016C40 98EC D00C 0000C 35326+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016C44 07FE 35327+ BR 14 RETURN 02000000
35328 TSIMEND
016C48 35329+ LTORG
016C48 00000458 35330 =A(SAVETST)
016C4C 0000007B 35331 =F'123'
16C50 35332+T929TEND EQU *
35333 *
35334 * Test 930 -- L R,m (ig=12) --------------------------------
35335 *
35336 TSIMBEG T930,50000,12,1,C'L R,m (ig=12)',DIS=1
35337+*
004464 35338+TDSCDAT CSECT
004468 35339+ DS 0D
35340+*
004468 00016C50 35341+T930TDSC DC A(T930) // TENTRY
00446C 00000068 35342+ DC A(T930TEND-T930) // TLENGTH
004470 0000C350 35343+ DC F'50000' // TLRCNT
004474 0000000C 35344+ DC F'12' // TIGCNT
004478 00000001 35345+ DC F'1' // TLTYPE
001F3E 35346+TEXT CSECT
001F3E E3F9F3F0 35347+SPTR3209 DC C'T930'
00447C 35348+TDSCDAT CSECT
00447C 35349+ DS 0F
00447C 04001F3E 35350+ DC AL1(L'SPTR3209),AL3(SPTR3209)
001F42 35351+TEXT CSECT
001F42 D340D96B94404D89 35352+SPTR3210 DC C'L R,m (ig=12)'
004480 35353+TDSCDAT CSECT
004480 35354+ DS 0F
004480 0D001F42 35355+ DC AL1(L'SPTR3210),AL3(SPTR3210)
35356+*
004DB8 35357+TDSCTBL CSECT
04DB8 35358+T930TPTR EQU *
004DB8 01004468 35359+ DC X'01',AL3(T930TDSC) disabled test
35360+*
016C50 35361+TCODE CSECT
016C50 35362+ DS 0D ensure double word alignment for test
016C50 35363+T930 DS 0H 01650000
016C50 90EC D00C 0000C 35364+ STM 14,12,12(13) SAVE REGISTERS 02950000
016C54 18CF 35365+ LR R12,R15 base register := entry address
16C50 35366+ USING T930,R12 declare code base register
016C56 41B0 C01E 16C6E 35367+ LA R11,T930L load loop target to R11
PAGE 646
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016C5A 58F0 C060 16CB0 35368+ L R15,=A(SAVETST) R15 := current save area
016C5E 50DF 0004 00004 35369+ ST R13,4(R15) set back pointer in current save area
016C62 182D 35370+ LR R2,R13 remember callers save area
016C64 18DF 35371+ LR R13,R15 setup current save area
016C66 50D2 0008 00008 35372+ ST R13,8(R2) set forw pointer in callers save area
00000 35373+ USING TDSC,R1 declare TDSC base register
016C6A 58F0 1008 00008 35374+ L R15,TLRCNT load local repeat count to R15
35375+*
35376 *
35377 T930L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
35378+*
35379+* build from sublist &ALIST a comma separated string &ARGS
35380+*
35381+*
35382+*
35383+*
35384+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
35385+* this allows to transfer the repeat count from last TDSCGEN call
35386+*
35387+*
16C6E 35388+T930L EQU *
35389+*
35390+* write a comment indicating what REPINS does (in case NOGEN in effect)
35391+*
35392+*,// REPINS: do 12 times:
35393+*
35394+* MNOTE requires that ' is doubled for expanded variables
35395+* thus build &MASTR as a copy of '&ARGS with ' doubled
35396+*
35397+*
35398+*,// L R2,=F'123'
35399+*
35400+* finally generate code: &ICNT copies of &CODE &ARGS
35401+*
016C6E 5820 C064 16CB4 35402+ L R2,=F'123'
016C72 5820 C064 16CB4 35403+ L R2,=F'123'
016C76 5820 C064 16CB4 35404+ L R2,=F'123'
016C7A 5820 C064 16CB4 35405+ L R2,=F'123'
016C7E 5820 C064 16CB4 35406+ L R2,=F'123'
016C82 5820 C064 16CB4 35407+ L R2,=F'123'
016C86 5820 C064 16CB4 35408+ L R2,=F'123'
016C8A 5820 C064 16CB4 35409+ L R2,=F'123'
016C8E 5820 C064 16CB4 35410+ L R2,=F'123'
016C92 5820 C064 16CB4 35411+ L R2,=F'123'
016C96 5820 C064 16CB4 35412+ L R2,=F'123'
016C9A 5820 C064 16CB4 35413+ L R2,=F'123'
35414+*
016C9E 06FB 35415 BCTR R15,R11
35416 TSIMRET
016CA0 58F0 C060 16CB0 35417+ L R15,=A(SAVETST) R15 := current save area
016CA4 58DF 0004 00004 35418+ L R13,4(R15) get old save area back
016CA8 98EC D00C 0000C 35419+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016CAC 07FE 35420+ BR 14 RETURN 02000000
35421 TSIMEND
016CB0 35422+ LTORG
PAGE 647
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016CB0 00000458 35423 =A(SAVETST)
016CB4 0000007B 35424 =F'123'
16CB8 35425+T930TEND EQU *
35426 *
35427 * Test 931 -- L R,m (ig=18) --------------------------------
35428 *
35429 TSIMBEG T931,35000,18,1,C'L R,m (ig=18)',DIS=1
35430+*
004484 35431+TDSCDAT CSECT
004488 35432+ DS 0D
35433+*
004488 00016CB8 35434+T931TDSC DC A(T931) // TENTRY
00448C 00000080 35435+ DC A(T931TEND-T931) // TLENGTH
004490 000088B8 35436+ DC F'35000' // TLRCNT
004494 00000012 35437+ DC F'18' // TIGCNT
004498 00000001 35438+ DC F'1' // TLTYPE
001F4F 35439+TEXT CSECT
001F4F E3F9F3F1 35440+SPTR3221 DC C'T931'
00449C 35441+TDSCDAT CSECT
00449C 35442+ DS 0F
00449C 04001F4F 35443+ DC AL1(L'SPTR3221),AL3(SPTR3221)
001F53 35444+TEXT CSECT
001F53 D340D96B94404D89 35445+SPTR3222 DC C'L R,m (ig=18)'
0044A0 35446+TDSCDAT CSECT
0044A0 35447+ DS 0F
0044A0 0D001F53 35448+ DC AL1(L'SPTR3222),AL3(SPTR3222)
35449+*
004DBC 35450+TDSCTBL CSECT
04DBC 35451+T931TPTR EQU *
004DBC 01004488 35452+ DC X'01',AL3(T931TDSC) disabled test
35453+*
016CB8 35454+TCODE CSECT
016CB8 35455+ DS 0D ensure double word alignment for test
016CB8 35456+T931 DS 0H 01650000
016CB8 90EC D00C 0000C 35457+ STM 14,12,12(13) SAVE REGISTERS 02950000
016CBC 18CF 35458+ LR R12,R15 base register := entry address
16CB8 35459+ USING T931,R12 declare code base register
016CBE 41B0 C01E 16CD6 35460+ LA R11,T931L load loop target to R11
016CC2 58F0 C078 16D30 35461+ L R15,=A(SAVETST) R15 := current save area
016CC6 50DF 0004 00004 35462+ ST R13,4(R15) set back pointer in current save area
016CCA 182D 35463+ LR R2,R13 remember callers save area
016CCC 18DF 35464+ LR R13,R15 setup current save area
016CCE 50D2 0008 00008 35465+ ST R13,8(R2) set forw pointer in callers save area
00000 35466+ USING TDSC,R1 declare TDSC base register
016CD2 58F0 1008 00008 35467+ L R15,TLRCNT load local repeat count to R15
35468+*
35469 *
35470 T931L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
35471+*
35472+* build from sublist &ALIST a comma separated string &ARGS
35473+*
35474+*
35475+*
35476+*
35477+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
PAGE 648
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
35478+* this allows to transfer the repeat count from last TDSCGEN call
35479+*
35480+*
16CD6 35481+T931L EQU *
35482+*
35483+* write a comment indicating what REPINS does (in case NOGEN in effect)
35484+*
35485+*,// REPINS: do 18 times:
35486+*
35487+* MNOTE requires that ' is doubled for expanded variables
35488+* thus build &MASTR as a copy of '&ARGS with ' doubled
35489+*
35490+*
35491+*,// L R2,=F'123'
35492+*
35493+* finally generate code: &ICNT copies of &CODE &ARGS
35494+*
016CD6 5820 C07C 16D34 35495+ L R2,=F'123'
016CDA 5820 C07C 16D34 35496+ L R2,=F'123'
016CDE 5820 C07C 16D34 35497+ L R2,=F'123'
016CE2 5820 C07C 16D34 35498+ L R2,=F'123'
016CE6 5820 C07C 16D34 35499+ L R2,=F'123'
016CEA 5820 C07C 16D34 35500+ L R2,=F'123'
016CEE 5820 C07C 16D34 35501+ L R2,=F'123'
016CF2 5820 C07C 16D34 35502+ L R2,=F'123'
016CF6 5820 C07C 16D34 35503+ L R2,=F'123'
016CFA 5820 C07C 16D34 35504+ L R2,=F'123'
016CFE 5820 C07C 16D34 35505+ L R2,=F'123'
016D02 5820 C07C 16D34 35506+ L R2,=F'123'
016D06 5820 C07C 16D34 35507+ L R2,=F'123'
016D0A 5820 C07C 16D34 35508+ L R2,=F'123'
016D0E 5820 C07C 16D34 35509+ L R2,=F'123'
016D12 5820 C07C 16D34 35510+ L R2,=F'123'
016D16 5820 C07C 16D34 35511+ L R2,=F'123'
016D1A 5820 C07C 16D34 35512+ L R2,=F'123'
35513+*
016D1E 06FB 35514 BCTR R15,R11
35515 TSIMRET
016D20 58F0 C078 16D30 35516+ L R15,=A(SAVETST) R15 := current save area
016D24 58DF 0004 00004 35517+ L R13,4(R15) get old save area back
016D28 98EC D00C 0000C 35518+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016D2C 07FE 35519+ BR 14 RETURN 02000000
35520 TSIMEND
016D30 35521+ LTORG
016D30 00000458 35522 =A(SAVETST)
016D34 0000007B 35523 =F'123'
16D38 35524+T931TEND EQU *
35525 *
35526 * Test 932 -- L R,m (ig=25) --------------------------------
35527 *
35528 TSIMBEG T932,25000,25,1,C'L R,m (ig=25)',DIS=1
35529+*
0044A4 35530+TDSCDAT CSECT
0044A8 35531+ DS 0D
35532+*
PAGE 649
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0044A8 00016D38 35533+T932TDSC DC A(T932) // TENTRY
0044AC 000000A0 35534+ DC A(T932TEND-T932) // TLENGTH
0044B0 000061A8 35535+ DC F'25000' // TLRCNT
0044B4 00000019 35536+ DC F'25' // TIGCNT
0044B8 00000001 35537+ DC F'1' // TLTYPE
001F60 35538+TEXT CSECT
001F60 E3F9F3F2 35539+SPTR3233 DC C'T932'
0044BC 35540+TDSCDAT CSECT
0044BC 35541+ DS 0F
0044BC 04001F60 35542+ DC AL1(L'SPTR3233),AL3(SPTR3233)
001F64 35543+TEXT CSECT
001F64 D340D96B94404D89 35544+SPTR3234 DC C'L R,m (ig=25)'
0044C0 35545+TDSCDAT CSECT
0044C0 35546+ DS 0F
0044C0 0D001F64 35547+ DC AL1(L'SPTR3234),AL3(SPTR3234)
35548+*
004DC0 35549+TDSCTBL CSECT
04DC0 35550+T932TPTR EQU *
004DC0 010044A8 35551+ DC X'01',AL3(T932TDSC) disabled test
35552+*
016D38 35553+TCODE CSECT
016D38 35554+ DS 0D ensure double word alignment for test
016D38 35555+T932 DS 0H 01650000
016D38 90EC D00C 0000C 35556+ STM 14,12,12(13) SAVE REGISTERS 02950000
016D3C 18CF 35557+ LR R12,R15 base register := entry address
16D38 35558+ USING T932,R12 declare code base register
016D3E 41B0 C01E 16D56 35559+ LA R11,T932L load loop target to R11
016D42 58F0 C098 16DD0 35560+ L R15,=A(SAVETST) R15 := current save area
016D46 50DF 0004 00004 35561+ ST R13,4(R15) set back pointer in current save area
016D4A 182D 35562+ LR R2,R13 remember callers save area
016D4C 18DF 35563+ LR R13,R15 setup current save area
016D4E 50D2 0008 00008 35564+ ST R13,8(R2) set forw pointer in callers save area
00000 35565+ USING TDSC,R1 declare TDSC base register
016D52 58F0 1008 00008 35566+ L R15,TLRCNT load local repeat count to R15
35567+*
35568 *
35569 T932L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
35570+*
35571+* build from sublist &ALIST a comma separated string &ARGS
35572+*
35573+*
35574+*
35575+*
35576+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
35577+* this allows to transfer the repeat count from last TDSCGEN call
35578+*
35579+*
16D56 35580+T932L EQU *
35581+*
35582+* write a comment indicating what REPINS does (in case NOGEN in effect)
35583+*
35584+*,// REPINS: do 25 times:
35585+*
35586+* MNOTE requires that ' is doubled for expanded variables
35587+* thus build &MASTR as a copy of '&ARGS with ' doubled
PAGE 650
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
35588+*
35589+*
35590+*,// L R2,=F'123'
35591+*
35592+* finally generate code: &ICNT copies of &CODE &ARGS
35593+*
016D56 5820 C09C 16DD4 35594+ L R2,=F'123'
016D5A 5820 C09C 16DD4 35595+ L R2,=F'123'
016D5E 5820 C09C 16DD4 35596+ L R2,=F'123'
016D62 5820 C09C 16DD4 35597+ L R2,=F'123'
016D66 5820 C09C 16DD4 35598+ L R2,=F'123'
016D6A 5820 C09C 16DD4 35599+ L R2,=F'123'
016D6E 5820 C09C 16DD4 35600+ L R2,=F'123'
016D72 5820 C09C 16DD4 35601+ L R2,=F'123'
016D76 5820 C09C 16DD4 35602+ L R2,=F'123'
016D7A 5820 C09C 16DD4 35603+ L R2,=F'123'
016D7E 5820 C09C 16DD4 35604+ L R2,=F'123'
016D82 5820 C09C 16DD4 35605+ L R2,=F'123'
016D86 5820 C09C 16DD4 35606+ L R2,=F'123'
016D8A 5820 C09C 16DD4 35607+ L R2,=F'123'
016D8E 5820 C09C 16DD4 35608+ L R2,=F'123'
016D92 5820 C09C 16DD4 35609+ L R2,=F'123'
016D96 5820 C09C 16DD4 35610+ L R2,=F'123'
016D9A 5820 C09C 16DD4 35611+ L R2,=F'123'
016D9E 5820 C09C 16DD4 35612+ L R2,=F'123'
016DA2 5820 C09C 16DD4 35613+ L R2,=F'123'
016DA6 5820 C09C 16DD4 35614+ L R2,=F'123'
016DAA 5820 C09C 16DD4 35615+ L R2,=F'123'
016DAE 5820 C09C 16DD4 35616+ L R2,=F'123'
016DB2 5820 C09C 16DD4 35617+ L R2,=F'123'
016DB6 5820 C09C 16DD4 35618+ L R2,=F'123'
35619+*
016DBA 06FB 35620 BCTR R15,R11
35621 TSIMRET
016DBC 58F0 C098 16DD0 35622+ L R15,=A(SAVETST) R15 := current save area
016DC0 58DF 0004 00004 35623+ L R13,4(R15) get old save area back
016DC4 98EC D00C 0000C 35624+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016DC8 07FE 35625+ BR 14 RETURN 02000000
35626 TSIMEND
016DD0 35627+ LTORG
016DD0 00000458 35628 =A(SAVETST)
016DD4 0000007B 35629 =F'123'
16DD8 35630+T932TEND EQU *
35631 *
35632 * Test 933 -- L R,m (ig=36) --------------------------------
35633 *
35634 TSIMBEG T933,20000,36,1,C'L R,m (ig=36)',DIS=1
35635+*
0044C4 35636+TDSCDAT CSECT
0044C8 35637+ DS 0D
35638+*
0044C8 00016DD8 35639+T933TDSC DC A(T933) // TENTRY
0044CC 000000C8 35640+ DC A(T933TEND-T933) // TLENGTH
0044D0 00004E20 35641+ DC F'20000' // TLRCNT
0044D4 00000024 35642+ DC F'36' // TIGCNT
PAGE 651
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0044D8 00000001 35643+ DC F'1' // TLTYPE
001F71 35644+TEXT CSECT
001F71 E3F9F3F3 35645+SPTR3245 DC C'T933'
0044DC 35646+TDSCDAT CSECT
0044DC 35647+ DS 0F
0044DC 04001F71 35648+ DC AL1(L'SPTR3245),AL3(SPTR3245)
001F75 35649+TEXT CSECT
001F75 D340D96B94404D89 35650+SPTR3246 DC C'L R,m (ig=36)'
0044E0 35651+TDSCDAT CSECT
0044E0 35652+ DS 0F
0044E0 0D001F75 35653+ DC AL1(L'SPTR3246),AL3(SPTR3246)
35654+*
004DC4 35655+TDSCTBL CSECT
04DC4 35656+T933TPTR EQU *
004DC4 010044C8 35657+ DC X'01',AL3(T933TDSC) disabled test
35658+*
016DD8 35659+TCODE CSECT
016DD8 35660+ DS 0D ensure double word alignment for test
016DD8 35661+T933 DS 0H 01650000
016DD8 90EC D00C 0000C 35662+ STM 14,12,12(13) SAVE REGISTERS 02950000
016DDC 18CF 35663+ LR R12,R15 base register := entry address
16DD8 35664+ USING T933,R12 declare code base register
016DDE 41B0 C01E 16DF6 35665+ LA R11,T933L load loop target to R11
016DE2 58F0 C0C0 16E98 35666+ L R15,=A(SAVETST) R15 := current save area
016DE6 50DF 0004 00004 35667+ ST R13,4(R15) set back pointer in current save area
016DEA 182D 35668+ LR R2,R13 remember callers save area
016DEC 18DF 35669+ LR R13,R15 setup current save area
016DEE 50D2 0008 00008 35670+ ST R13,8(R2) set forw pointer in callers save area
00000 35671+ USING TDSC,R1 declare TDSC base register
016DF2 58F0 1008 00008 35672+ L R15,TLRCNT load local repeat count to R15
35673+*
35674 *
35675 T933L REPINS L,(R2,=F'123') repeat: L R2,=F'123'
35676+*
35677+* build from sublist &ALIST a comma separated string &ARGS
35678+*
35679+*
35680+*
35681+*
35682+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT
35683+* this allows to transfer the repeat count from last TDSCGEN call
35684+*
35685+*
16DF6 35686+T933L EQU *
35687+*
35688+* write a comment indicating what REPINS does (in case NOGEN in effect)
35689+*
35690+*,// REPINS: do 36 times:
35691+*
35692+* MNOTE requires that ' is doubled for expanded variables
35693+* thus build &MASTR as a copy of '&ARGS with ' doubled
35694+*
35695+*
35696+*,// L R2,=F'123'
35697+*
PAGE 652
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
35698+* finally generate code: &ICNT copies of &CODE &ARGS
35699+*
016DF6 5820 C0C4 16E9C 35700+ L R2,=F'123'
016DFA 5820 C0C4 16E9C 35701+ L R2,=F'123'
016DFE 5820 C0C4 16E9C 35702+ L R2,=F'123'
016E02 5820 C0C4 16E9C 35703+ L R2,=F'123'
016E06 5820 C0C4 16E9C 35704+ L R2,=F'123'
016E0A 5820 C0C4 16E9C 35705+ L R2,=F'123'
016E0E 5820 C0C4 16E9C 35706+ L R2,=F'123'
016E12 5820 C0C4 16E9C 35707+ L R2,=F'123'
016E16 5820 C0C4 16E9C 35708+ L R2,=F'123'
016E1A 5820 C0C4 16E9C 35709+ L R2,=F'123'
016E1E 5820 C0C4 16E9C 35710+ L R2,=F'123'
016E22 5820 C0C4 16E9C 35711+ L R2,=F'123'
016E26 5820 C0C4 16E9C 35712+ L R2,=F'123'
016E2A 5820 C0C4 16E9C 35713+ L R2,=F'123'
016E2E 5820 C0C4 16E9C 35714+ L R2,=F'123'
016E32 5820 C0C4 16E9C 35715+ L R2,=F'123'
016E36 5820 C0C4 16E9C 35716+ L R2,=F'123'
016E3A 5820 C0C4 16E9C 35717+ L R2,=F'123'
016E3E 5820 C0C4 16E9C 35718+ L R2,=F'123'
016E42 5820 C0C4 16E9C 35719+ L R2,=F'123'
016E46 5820 C0C4 16E9C 35720+ L R2,=F'123'
016E4A 5820 C0C4 16E9C 35721+ L R2,=F'123'
016E4E 5820 C0C4 16E9C 35722+ L R2,=F'123'
016E52 5820 C0C4 16E9C 35723+ L R2,=F'123'
016E56 5820 C0C4 16E9C 35724+ L R2,=F'123'
016E5A 5820 C0C4 16E9C 35725+ L R2,=F'123'
016E5E 5820 C0C4 16E9C 35726+ L R2,=F'123'
016E62 5820 C0C4 16E9C 35727+ L R2,=F'123'
016E66 5820 C0C4 16E9C 35728+ L R2,=F'123'
016E6A 5820 C0C4 16E9C 35729+ L R2,=F'123'
016E6E 5820 C0C4 16E9C 35730+ L R2,=F'123'
016E72 5820 C0C4 16E9C 35731+ L R2,=F'123'
016E76 5820 C0C4 16E9C 35732+ L R2,=F'123'
016E7A 5820 C0C4 16E9C 35733+ L R2,=F'123'
016E7E 5820 C0C4 16E9C 35734+ L R2,=F'123'
016E82 5820 C0C4 16E9C 35735+ L R2,=F'123'
35736+*
016E86 06FB 35737 BCTR R15,R11
35738 TSIMRET
016E88 58F0 C0C0 16E98 35739+ L R15,=A(SAVETST) R15 := current save area
016E8C 58DF 0004 00004 35740+ L R13,4(R15) get old save area back
016E90 98EC D00C 0000C 35741+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016E94 07FE 35742+ BR 14 RETURN 02000000
35743 TSIMEND
016E98 35744+ LTORG
016E98 00000458 35745 =A(SAVETST)
016E9C 0000007B 35746 =F'123'
16EA0 35747+T933TEND EQU *
35748 *
35749 * Test 95x -- T700 size tests ==============================
35750 *
35751 * Test 952 -- Mix Int RR 1st 2 ----------------------------
35752 *
PAGE 653
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
35753 TSIMBEG T952,250000,1,1,C'T700 1st 2',DIS=1
35754+*
0044E4 35755+TDSCDAT CSECT
0044E8 35756+ DS 0D
35757+*
0044E8 00016EA0 35758+T952TDSC DC A(T952) // TENTRY
0044EC 0000003C 35759+ DC A(T952TEND-T952) // TLENGTH
0044F0 0003D090 35760+ DC F'250000' // TLRCNT
0044F4 00000001 35761+ DC F'1' // TIGCNT
0044F8 00000001 35762+ DC F'1' // TLTYPE
001F82 35763+TEXT CSECT
001F82 E3F9F5F2 35764+SPTR3257 DC C'T952'
0044FC 35765+TDSCDAT CSECT
0044FC 35766+ DS 0F
0044FC 04001F82 35767+ DC AL1(L'SPTR3257),AL3(SPTR3257)
001F86 35768+TEXT CSECT
001F86 E3F7F0F040F1A2A3 35769+SPTR3258 DC C'T700 1st 2'
004500 35770+TDSCDAT CSECT
004500 35771+ DS 0F
004500 0B001F86 35772+ DC AL1(L'SPTR3258),AL3(SPTR3258)
35773+*
004DC8 35774+TDSCTBL CSECT
04DC8 35775+T952TPTR EQU *
004DC8 010044E8 35776+ DC X'01',AL3(T952TDSC) disabled test
35777+*
016EA0 35778+TCODE CSECT
016EA0 35779+ DS 0D ensure double word alignment for test
016EA0 35780+T952 DS 0H 01650000
016EA0 90EC D00C 0000C 35781+ STM 14,12,12(13) SAVE REGISTERS 02950000
016EA4 18CF 35782+ LR R12,R15 base register := entry address
16EA0 35783+ USING T952,R12 declare code base register
016EA6 41B0 C01E 16EBE 35784+ LA R11,T952L load loop target to R11
016EAA 58F0 C038 16ED8 35785+ L R15,=A(SAVETST) R15 := current save area
016EAE 50DF 0004 00004 35786+ ST R13,4(R15) set back pointer in current save area
016EB2 182D 35787+ LR R2,R13 remember callers save area
016EB4 18DF 35788+ LR R13,R15 setup current save area
016EB6 50D2 0008 00008 35789+ ST R13,8(R2) set forw pointer in callers save area
00000 35790+ USING TDSC,R1 declare TDSC base register
016EBA 58F0 1008 00008 35791+ L R15,TLRCNT load local repeat count to R15
35792+*
35793 *
16EBE 35794 T952L EQU *
016EBE 4120 0001 00001 35795 LA R2,1 R2 :=00000001 FIN 01
016EC2 1832 35796 LR R3,R2 R3 :=00000001 02
016EC4 06FB 35797 BCTR R15,R11
35798 TSIMRET
016EC6 58F0 C038 16ED8 35799+ L R15,=A(SAVETST) R15 := current save area
016ECA 58DF 0004 00004 35800+ L R13,4(R15) get old save area back
016ECE 98EC D00C 0000C 35801+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016ED2 07FE 35802+ BR 14 RETURN 02000000
35803 TSIMEND
016ED8 35804+ LTORG
016ED8 00000458 35805 =A(SAVETST)
16EDC 35806+T952TEND EQU *
35807 *
PAGE 654
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
35808 * Test 953 -- Mix Int RR 1st 3 ----------------------------
35809 *
35810 TSIMBEG T953,170000,1,1,C'T700 1st 3',DIS=1
35811+*
004504 35812+TDSCDAT CSECT
004508 35813+ DS 0D
35814+*
004508 00016EE0 35815+T953TDSC DC A(T953) // TENTRY
00450C 0000003C 35816+ DC A(T953TEND-T953) // TLENGTH
004510 00029810 35817+ DC F'170000' // TLRCNT
004514 00000001 35818+ DC F'1' // TIGCNT
004518 00000001 35819+ DC F'1' // TLTYPE
001F91 35820+TEXT CSECT
001F91 E3F9F5F3 35821+SPTR3266 DC C'T953'
00451C 35822+TDSCDAT CSECT
00451C 35823+ DS 0F
00451C 04001F91 35824+ DC AL1(L'SPTR3266),AL3(SPTR3266)
001F95 35825+TEXT CSECT
001F95 E3F7F0F040F1A2A3 35826+SPTR3267 DC C'T700 1st 3'
004520 35827+TDSCDAT CSECT
004520 35828+ DS 0F
004520 0B001F95 35829+ DC AL1(L'SPTR3267),AL3(SPTR3267)
35830+*
004DCC 35831+TDSCTBL CSECT
04DCC 35832+T953TPTR EQU *
004DCC 01004508 35833+ DC X'01',AL3(T953TDSC) disabled test
35834+*
016EDC 35835+TCODE CSECT
016EE0 35836+ DS 0D ensure double word alignment for test
016EE0 35837+T953 DS 0H 01650000
016EE0 90EC D00C 0000C 35838+ STM 14,12,12(13) SAVE REGISTERS 02950000
016EE4 18CF 35839+ LR R12,R15 base register := entry address
16EE0 35840+ USING T953,R12 declare code base register
016EE6 41B0 C01E 16EFE 35841+ LA R11,T953L load loop target to R11
016EEA 58F0 C038 16F18 35842+ L R15,=A(SAVETST) R15 := current save area
016EEE 50DF 0004 00004 35843+ ST R13,4(R15) set back pointer in current save area
016EF2 182D 35844+ LR R2,R13 remember callers save area
016EF4 18DF 35845+ LR R13,R15 setup current save area
016EF6 50D2 0008 00008 35846+ ST R13,8(R2) set forw pointer in callers save area
00000 35847+ USING TDSC,R1 declare TDSC base register
016EFA 58F0 1008 00008 35848+ L R15,TLRCNT load local repeat count to R15
35849+*
35850 *
16EFE 35851 T953L EQU *
016EFE 4120 0001 00001 35852 LA R2,1 R2 :=00000001 FIN 01
016F02 1832 35853 LR R3,R2 R3 :=00000001 02
016F04 8B30 0008 00008 35854 SLA R3,8 R3 :=00000100 FIN 03
016F08 06FB 35855 BCTR R15,R11
35856 TSIMRET
016F0A 58F0 C038 16F18 35857+ L R15,=A(SAVETST) R15 := current save area
016F0E 58DF 0004 00004 35858+ L R13,4(R15) get old save area back
016F12 98EC D00C 0000C 35859+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016F16 07FE 35860+ BR 14 RETURN 02000000
35861 TSIMEND
016F18 35862+ LTORG
PAGE 655
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016F18 00000458 35863 =A(SAVETST)
16F1C 35864+T953TEND EQU *
35865 *
35866 * Test 954 -- Mix Int RR 1st 4 ----------------------------
35867 *
35868 TSIMBEG T954,140000,1,1,C'T700 1st 4',DIS=1
35869+*
004524 35870+TDSCDAT CSECT
004528 35871+ DS 0D
35872+*
004528 00016F20 35873+T954TDSC DC A(T954) // TENTRY
00452C 00000044 35874+ DC A(T954TEND-T954) // TLENGTH
004530 000222E0 35875+ DC F'140000' // TLRCNT
004534 00000001 35876+ DC F'1' // TIGCNT
004538 00000001 35877+ DC F'1' // TLTYPE
001FA0 35878+TEXT CSECT
001FA0 E3F9F5F4 35879+SPTR3275 DC C'T954'
00453C 35880+TDSCDAT CSECT
00453C 35881+ DS 0F
00453C 04001FA0 35882+ DC AL1(L'SPTR3275),AL3(SPTR3275)
001FA4 35883+TEXT CSECT
001FA4 E3F7F0F040F1A2A3 35884+SPTR3276 DC C'T700 1st 4'
004540 35885+TDSCDAT CSECT
004540 35886+ DS 0F
004540 0B001FA4 35887+ DC AL1(L'SPTR3276),AL3(SPTR3276)
35888+*
004DD0 35889+TDSCTBL CSECT
04DD0 35890+T954TPTR EQU *
004DD0 01004528 35891+ DC X'01',AL3(T954TDSC) disabled test
35892+*
016F1C 35893+TCODE CSECT
016F20 35894+ DS 0D ensure double word alignment for test
016F20 35895+T954 DS 0H 01650000
016F20 90EC D00C 0000C 35896+ STM 14,12,12(13) SAVE REGISTERS 02950000
016F24 18CF 35897+ LR R12,R15 base register := entry address
16F20 35898+ USING T954,R12 declare code base register
016F26 41B0 C01E 16F3E 35899+ LA R11,T954L load loop target to R11
016F2A 58F0 C040 16F60 35900+ L R15,=A(SAVETST) R15 := current save area
016F2E 50DF 0004 00004 35901+ ST R13,4(R15) set back pointer in current save area
016F32 182D 35902+ LR R2,R13 remember callers save area
016F34 18DF 35903+ LR R13,R15 setup current save area
016F36 50D2 0008 00008 35904+ ST R13,8(R2) set forw pointer in callers save area
00000 35905+ USING TDSC,R1 declare TDSC base register
016F3A 58F0 1008 00008 35906+ L R15,TLRCNT load local repeat count to R15
35907+*
35908 *
16F3E 35909 T954L EQU *
016F3E 4120 0001 00001 35910 LA R2,1 R2 :=00000001 FIN 01
016F42 1832 35911 LR R3,R2 R3 :=00000001 02
016F44 8B30 0008 00008 35912 SLA R3,8 R3 :=00000100 FIN 03
016F48 1744 35913 XR R4,R4 R4 :=00000000 04
016F4A 06FB 35914 BCTR R15,R11
35915 TSIMRET
016F4C 58F0 C040 16F60 35916+ L R15,=A(SAVETST) R15 := current save area
016F50 58DF 0004 00004 35917+ L R13,4(R15) get old save area back
PAGE 656
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016F54 98EC D00C 0000C 35918+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016F58 07FE 35919+ BR 14 RETURN 02000000
35920 TSIMEND
016F60 35921+ LTORG
016F60 00000458 35922 =A(SAVETST)
16F64 35923+T954TEND EQU *
35924 *
35925 * Test 955 -- Mix Int RR 1st 5 ----------------------------
35926 *
35927 TSIMBEG T955,120000,1,1,C'T700 1st 5',DIS=1
35928+*
004544 35929+TDSCDAT CSECT
004548 35930+ DS 0D
35931+*
004548 00016F68 35932+T955TDSC DC A(T955) // TENTRY
00454C 00000044 35933+ DC A(T955TEND-T955) // TLENGTH
004550 0001D4C0 35934+ DC F'120000' // TLRCNT
004554 00000001 35935+ DC F'1' // TIGCNT
004558 00000001 35936+ DC F'1' // TLTYPE
001FAF 35937+TEXT CSECT
001FAF E3F9F5F5 35938+SPTR3284 DC C'T955'
00455C 35939+TDSCDAT CSECT
00455C 35940+ DS 0F
00455C 04001FAF 35941+ DC AL1(L'SPTR3284),AL3(SPTR3284)
001FB3 35942+TEXT CSECT
001FB3 E3F7F0F040F1A2A3 35943+SPTR3285 DC C'T700 1st 5'
004560 35944+TDSCDAT CSECT
004560 35945+ DS 0F
004560 0B001FB3 35946+ DC AL1(L'SPTR3285),AL3(SPTR3285)
35947+*
004DD4 35948+TDSCTBL CSECT
04DD4 35949+T955TPTR EQU *
004DD4 01004548 35950+ DC X'01',AL3(T955TDSC) disabled test
35951+*
016F64 35952+TCODE CSECT
016F68 35953+ DS 0D ensure double word alignment for test
016F68 35954+T955 DS 0H 01650000
016F68 90EC D00C 0000C 35955+ STM 14,12,12(13) SAVE REGISTERS 02950000
016F6C 18CF 35956+ LR R12,R15 base register := entry address
16F68 35957+ USING T955,R12 declare code base register
016F6E 41B0 C01E 16F86 35958+ LA R11,T955L load loop target to R11
016F72 58F0 C040 16FA8 35959+ L R15,=A(SAVETST) R15 := current save area
016F76 50DF 0004 00004 35960+ ST R13,4(R15) set back pointer in current save area
016F7A 182D 35961+ LR R2,R13 remember callers save area
016F7C 18DF 35962+ LR R13,R15 setup current save area
016F7E 50D2 0008 00008 35963+ ST R13,8(R2) set forw pointer in callers save area
00000 35964+ USING TDSC,R1 declare TDSC base register
016F82 58F0 1008 00008 35965+ L R15,TLRCNT load local repeat count to R15
35966+*
35967 *
16F86 35968 T955L EQU *
016F86 4120 0001 00001 35969 LA R2,1 R2 :=00000001 FIN 01
016F8A 1832 35970 LR R3,R2 R3 :=00000001 02
016F8C 8B30 0008 00008 35971 SLA R3,8 R3 :=00000100 FIN 03
016F90 1744 35972 XR R4,R4 R4 :=00000000 04
PAGE 657
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
016F92 1643 35973 OR R4,R3 R4 :=00000100 05
016F94 06FB 35974 BCTR R15,R11
35975 TSIMRET
016F96 58F0 C040 16FA8 35976+ L R15,=A(SAVETST) R15 := current save area
016F9A 58DF 0004 00004 35977+ L R13,4(R15) get old save area back
016F9E 98EC D00C 0000C 35978+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016FA2 07FE 35979+ BR 14 RETURN 02000000
35980 TSIMEND
016FA8 35981+ LTORG
016FA8 00000458 35982 =A(SAVETST)
16FAC 35983+T955TEND EQU *
35984 *
35985 * Test 956 -- Mix Int RR 1st 6 ----------------------------
35986 *
35987 TSIMBEG T956,105000,1,1,C'T700 1st 6',DIS=1
35988+*
004564 35989+TDSCDAT CSECT
004568 35990+ DS 0D
35991+*
004568 00016FB0 35992+T956TDSC DC A(T956) // TENTRY
00456C 00000044 35993+ DC A(T956TEND-T956) // TLENGTH
004570 00019A28 35994+ DC F'105000' // TLRCNT
004574 00000001 35995+ DC F'1' // TIGCNT
004578 00000001 35996+ DC F'1' // TLTYPE
001FBE 35997+TEXT CSECT
001FBE E3F9F5F6 35998+SPTR3293 DC C'T956'
00457C 35999+TDSCDAT CSECT
00457C 36000+ DS 0F
00457C 04001FBE 36001+ DC AL1(L'SPTR3293),AL3(SPTR3293)
001FC2 36002+TEXT CSECT
001FC2 E3F7F0F040F1A2A3 36003+SPTR3294 DC C'T700 1st 6'
004580 36004+TDSCDAT CSECT
004580 36005+ DS 0F
004580 0B001FC2 36006+ DC AL1(L'SPTR3294),AL3(SPTR3294)
36007+*
004DD8 36008+TDSCTBL CSECT
04DD8 36009+T956TPTR EQU *
004DD8 01004568 36010+ DC X'01',AL3(T956TDSC) disabled test
36011+*
016FAC 36012+TCODE CSECT
016FB0 36013+ DS 0D ensure double word alignment for test
016FB0 36014+T956 DS 0H 01650000
016FB0 90EC D00C 0000C 36015+ STM 14,12,12(13) SAVE REGISTERS 02950000
016FB4 18CF 36016+ LR R12,R15 base register := entry address
16FB0 36017+ USING T956,R12 declare code base register
016FB6 41B0 C01E 16FCE 36018+ LA R11,T956L load loop target to R11
016FBA 58F0 C040 16FF0 36019+ L R15,=A(SAVETST) R15 := current save area
016FBE 50DF 0004 00004 36020+ ST R13,4(R15) set back pointer in current save area
016FC2 182D 36021+ LR R2,R13 remember callers save area
016FC4 18DF 36022+ LR R13,R15 setup current save area
016FC6 50D2 0008 00008 36023+ ST R13,8(R2) set forw pointer in callers save area
00000 36024+ USING TDSC,R1 declare TDSC base register
016FCA 58F0 1008 00008 36025+ L R15,TLRCNT load local repeat count to R15
36026+*
36027 *
PAGE 658
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
16FCE 36028 T956L EQU *
016FCE 4120 0001 00001 36029 LA R2,1 R2 :=00000001 FIN 01
016FD2 1832 36030 LR R3,R2 R3 :=00000001 02
016FD4 8B30 0008 00008 36031 SLA R3,8 R3 :=00000100 FIN 03
016FD8 1744 36032 XR R4,R4 R4 :=00000000 04
016FDA 1643 36033 OR R4,R3 R4 :=00000100 05
016FDC 0640 36034 BCTR R4,0 R4 :=000000FF FIN 06
016FDE 06FB 36035 BCTR R15,R11
36036 TSIMRET
016FE0 58F0 C040 16FF0 36037+ L R15,=A(SAVETST) R15 := current save area
016FE4 58DF 0004 00004 36038+ L R13,4(R15) get old save area back
016FE8 98EC D00C 0000C 36039+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
016FEC 07FE 36040+ BR 14 RETURN 02000000
36041 TSIMEND
016FF0 36042+ LTORG
016FF0 00000458 36043 =A(SAVETST)
16FF4 36044+T956TEND EQU *
36045 *
36046 * Test 957 -- Mix Int RR 1st 7 ----------------------------
36047 *
36048 TSIMBEG T957,90000,1,1,C'T700 1st 7',DIS=1
36049+*
004584 36050+TDSCDAT CSECT
004588 36051+ DS 0D
36052+*
004588 00016FF8 36053+T957TDSC DC A(T957) // TENTRY
00458C 00000044 36054+ DC A(T957TEND-T957) // TLENGTH
004590 00015F90 36055+ DC F'90000' // TLRCNT
004594 00000001 36056+ DC F'1' // TIGCNT
004598 00000001 36057+ DC F'1' // TLTYPE
001FCD 36058+TEXT CSECT
001FCD E3F9F5F7 36059+SPTR3302 DC C'T957'
00459C 36060+TDSCDAT CSECT
00459C 36061+ DS 0F
00459C 04001FCD 36062+ DC AL1(L'SPTR3302),AL3(SPTR3302)
001FD1 36063+TEXT CSECT
001FD1 E3F7F0F040F1A2A3 36064+SPTR3303 DC C'T700 1st 7'
0045A0 36065+TDSCDAT CSECT
0045A0 36066+ DS 0F
0045A0 0B001FD1 36067+ DC AL1(L'SPTR3303),AL3(SPTR3303)
36068+*
004DDC 36069+TDSCTBL CSECT
04DDC 36070+T957TPTR EQU *
004DDC 01004588 36071+ DC X'01',AL3(T957TDSC) disabled test
36072+*
016FF4 36073+TCODE CSECT
016FF8 36074+ DS 0D ensure double word alignment for test
016FF8 36075+T957 DS 0H 01650000
016FF8 90EC D00C 0000C 36076+ STM 14,12,12(13) SAVE REGISTERS 02950000
016FFC 18CF 36077+ LR R12,R15 base register := entry address
16FF8 36078+ USING T957,R12 declare code base register
016FFE 41B0 C01E 17016 36079+ LA R11,T957L load loop target to R11
017002 58F0 C040 17038 36080+ L R15,=A(SAVETST) R15 := current save area
017006 50DF 0004 00004 36081+ ST R13,4(R15) set back pointer in current save area
01700A 182D 36082+ LR R2,R13 remember callers save area
PAGE 659
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
01700C 18DF 36083+ LR R13,R15 setup current save area
01700E 50D2 0008 00008 36084+ ST R13,8(R2) set forw pointer in callers save area
00000 36085+ USING TDSC,R1 declare TDSC base register
017012 58F0 1008 00008 36086+ L R15,TLRCNT load local repeat count to R15
36087+*
36088 *
17016 36089 T957L EQU *
017016 4120 0001 00001 36090 LA R2,1 R2 :=00000001 FIN 01
01701A 1832 36091 LR R3,R2 R3 :=00000001 02
01701C 8B30 0008 00008 36092 SLA R3,8 R3 :=00000100 FIN 03
017020 1744 36093 XR R4,R4 R4 :=00000000 04
017022 1643 36094 OR R4,R3 R4 :=00000100 05
017024 0640 36095 BCTR R4,0 R4 :=000000FF FIN 06
017026 1354 36096 LCR R5,R4 R5 :=FFFFFF01 07
017028 06FB 36097 BCTR R15,R11
36098 TSIMRET
01702A 58F0 C040 17038 36099+ L R15,=A(SAVETST) R15 := current save area
01702E 58DF 0004 00004 36100+ L R13,4(R15) get old save area back
017032 98EC D00C 0000C 36101+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017036 07FE 36102+ BR 14 RETURN 02000000
36103 TSIMEND
017038 36104+ LTORG
017038 00000458 36105 =A(SAVETST)
1703C 36106+T957TEND EQU *
36107 *
36108 * Test 958 -- Mix Int RR 1st 8 ----------------------------
36109 *
36110 TSIMBEG T958,84000,1,1,C'T700 1st 8',DIS=1
36111+*
0045A4 36112+TDSCDAT CSECT
0045A8 36113+ DS 0D
36114+*
0045A8 00017040 36115+T958TDSC DC A(T958) // TENTRY
0045AC 0000004C 36116+ DC A(T958TEND-T958) // TLENGTH
0045B0 00014820 36117+ DC F'84000' // TLRCNT
0045B4 00000001 36118+ DC F'1' // TIGCNT
0045B8 00000001 36119+ DC F'1' // TLTYPE
001FDC 36120+TEXT CSECT
001FDC E3F9F5F8 36121+SPTR3311 DC C'T958'
0045BC 36122+TDSCDAT CSECT
0045BC 36123+ DS 0F
0045BC 04001FDC 36124+ DC AL1(L'SPTR3311),AL3(SPTR3311)
001FE0 36125+TEXT CSECT
001FE0 E3F7F0F040F1A2A3 36126+SPTR3312 DC C'T700 1st 8'
0045C0 36127+TDSCDAT CSECT
0045C0 36128+ DS 0F
0045C0 0B001FE0 36129+ DC AL1(L'SPTR3312),AL3(SPTR3312)
36130+*
004DE0 36131+TDSCTBL CSECT
04DE0 36132+T958TPTR EQU *
004DE0 010045A8 36133+ DC X'01',AL3(T958TDSC) disabled test
36134+*
01703C 36135+TCODE CSECT
017040 36136+ DS 0D ensure double word alignment for test
017040 36137+T958 DS 0H 01650000
PAGE 660
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017040 90EC D00C 0000C 36138+ STM 14,12,12(13) SAVE REGISTERS 02950000
017044 18CF 36139+ LR R12,R15 base register := entry address
17040 36140+ USING T958,R12 declare code base register
017046 41B0 C01E 1705E 36141+ LA R11,T958L load loop target to R11
01704A 58F0 C048 17088 36142+ L R15,=A(SAVETST) R15 := current save area
01704E 50DF 0004 00004 36143+ ST R13,4(R15) set back pointer in current save area
017052 182D 36144+ LR R2,R13 remember callers save area
017054 18DF 36145+ LR R13,R15 setup current save area
017056 50D2 0008 00008 36146+ ST R13,8(R2) set forw pointer in callers save area
00000 36147+ USING TDSC,R1 declare TDSC base register
01705A 58F0 1008 00008 36148+ L R15,TLRCNT load local repeat count to R15
36149+*
36150 *
1705E 36151 T958L EQU *
01705E 4120 0001 00001 36152 LA R2,1 R2 :=00000001 FIN 01
017062 1832 36153 LR R3,R2 R3 :=00000001 02
017064 8B30 0008 00008 36154 SLA R3,8 R3 :=00000100 FIN 03
017068 1744 36155 XR R4,R4 R4 :=00000000 04
01706A 1643 36156 OR R4,R3 R4 :=00000100 05
01706C 0640 36157 BCTR R4,0 R4 :=000000FF FIN 06
01706E 1354 36158 LCR R5,R4 R5 :=FFFFFF01 07
017070 8950 0002 00002 36159 SLL R5,2 R5 :=FFFFFC04 FIN 08
017074 06FB 36160 BCTR R15,R11
36161 TSIMRET
017076 58F0 C048 17088 36162+ L R15,=A(SAVETST) R15 := current save area
01707A 58DF 0004 00004 36163+ L R13,4(R15) get old save area back
01707E 98EC D00C 0000C 36164+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017082 07FE 36165+ BR 14 RETURN 02000000
36166 TSIMEND
017088 36167+ LTORG
017088 00000458 36168 =A(SAVETST)
1708C 36169+T958TEND EQU *
36170 *
36171 * Test 959 -- Mix Int RR 1st 9 ----------------------------
36172 *
36173 TSIMBEG T959,75000,1,1,C'T700 1st 9',DIS=1
36174+*
0045C4 36175+TDSCDAT CSECT
0045C8 36176+ DS 0D
36177+*
0045C8 00017090 36178+T959TDSC DC A(T959) // TENTRY
0045CC 0000004C 36179+ DC A(T959TEND-T959) // TLENGTH
0045D0 000124F8 36180+ DC F'75000' // TLRCNT
0045D4 00000001 36181+ DC F'1' // TIGCNT
0045D8 00000001 36182+ DC F'1' // TLTYPE
001FEB 36183+TEXT CSECT
001FEB E3F9F5F9 36184+SPTR3320 DC C'T959'
0045DC 36185+TDSCDAT CSECT
0045DC 36186+ DS 0F
0045DC 04001FEB 36187+ DC AL1(L'SPTR3320),AL3(SPTR3320)
001FEF 36188+TEXT CSECT
001FEF E3F7F0F040F1A2A3 36189+SPTR3321 DC C'T700 1st 9'
0045E0 36190+TDSCDAT CSECT
0045E0 36191+ DS 0F
0045E0 0B001FEF 36192+ DC AL1(L'SPTR3321),AL3(SPTR3321)
PAGE 661
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
36193+*
004DE4 36194+TDSCTBL CSECT
04DE4 36195+T959TPTR EQU *
004DE4 010045C8 36196+ DC X'01',AL3(T959TDSC) disabled test
36197+*
01708C 36198+TCODE CSECT
017090 36199+ DS 0D ensure double word alignment for test
017090 36200+T959 DS 0H 01650000
017090 90EC D00C 0000C 36201+ STM 14,12,12(13) SAVE REGISTERS 02950000
017094 18CF 36202+ LR R12,R15 base register := entry address
17090 36203+ USING T959,R12 declare code base register
017096 41B0 C01E 170AE 36204+ LA R11,T959L load loop target to R11
01709A 58F0 C048 170D8 36205+ L R15,=A(SAVETST) R15 := current save area
01709E 50DF 0004 00004 36206+ ST R13,4(R15) set back pointer in current save area
0170A2 182D 36207+ LR R2,R13 remember callers save area
0170A4 18DF 36208+ LR R13,R15 setup current save area
0170A6 50D2 0008 00008 36209+ ST R13,8(R2) set forw pointer in callers save area
00000 36210+ USING TDSC,R1 declare TDSC base register
0170AA 58F0 1008 00008 36211+ L R15,TLRCNT load local repeat count to R15
36212+*
36213 *
170AE 36214 T959L EQU *
0170AE 4120 0001 00001 36215 LA R2,1 R2 :=00000001 FIN 01
0170B2 1832 36216 LR R3,R2 R3 :=00000001 02
0170B4 8B30 0008 00008 36217 SLA R3,8 R3 :=00000100 FIN 03
0170B8 1744 36218 XR R4,R4 R4 :=00000000 04
0170BA 1643 36219 OR R4,R3 R4 :=00000100 05
0170BC 0640 36220 BCTR R4,0 R4 :=000000FF FIN 06
0170BE 1354 36221 LCR R5,R4 R5 :=FFFFFF01 07
0170C0 8950 0002 00002 36222 SLL R5,2 R5 :=FFFFFC04 FIN 08
0170C4 1065 36223 LPR R6,R5 R6 :=000003FC 09
0170C6 06FB 36224 BCTR R15,R11
36225 TSIMRET
0170C8 58F0 C048 170D8 36226+ L R15,=A(SAVETST) R15 := current save area
0170CC 58DF 0004 00004 36227+ L R13,4(R15) get old save area back
0170D0 98EC D00C 0000C 36228+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0170D4 07FE 36229+ BR 14 RETURN 02000000
36230 TSIMEND
0170D8 36231+ LTORG
0170D8 00000458 36232 =A(SAVETST)
170DC 36233+T959TEND EQU *
36234 *
36235 * Test 960 -- Mix Int RR 1st 10 ----------------------------
36236 *
36237 TSIMBEG T960,70000,1,1,C'T700 1st 10',DIS=1
36238+*
0045E4 36239+TDSCDAT CSECT
0045E8 36240+ DS 0D
36241+*
0045E8 000170E0 36242+T960TDSC DC A(T960) // TENTRY
0045EC 0000004C 36243+ DC A(T960TEND-T960) // TLENGTH
0045F0 00011170 36244+ DC F'70000' // TLRCNT
0045F4 00000001 36245+ DC F'1' // TIGCNT
0045F8 00000001 36246+ DC F'1' // TLTYPE
001FFA 36247+TEXT CSECT
PAGE 662
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
001FFA E3F9F6F0 36248+SPTR3329 DC C'T960'
0045FC 36249+TDSCDAT CSECT
0045FC 36250+ DS 0F
0045FC 04001FFA 36251+ DC AL1(L'SPTR3329),AL3(SPTR3329)
001FFE 36252+TEXT CSECT
001FFE E3F7F0F040F1A2A3 36253+SPTR3330 DC C'T700 1st 10'
004600 36254+TDSCDAT CSECT
004600 36255+ DS 0F
004600 0B001FFE 36256+ DC AL1(L'SPTR3330),AL3(SPTR3330)
36257+*
004DE8 36258+TDSCTBL CSECT
04DE8 36259+T960TPTR EQU *
004DE8 010045E8 36260+ DC X'01',AL3(T960TDSC) disabled test
36261+*
0170DC 36262+TCODE CSECT
0170E0 36263+ DS 0D ensure double word alignment for test
0170E0 36264+T960 DS 0H 01650000
0170E0 90EC D00C 0000C 36265+ STM 14,12,12(13) SAVE REGISTERS 02950000
0170E4 18CF 36266+ LR R12,R15 base register := entry address
170E0 36267+ USING T960,R12 declare code base register
0170E6 41B0 C01E 170FE 36268+ LA R11,T960L load loop target to R11
0170EA 58F0 C048 17128 36269+ L R15,=A(SAVETST) R15 := current save area
0170EE 50DF 0004 00004 36270+ ST R13,4(R15) set back pointer in current save area
0170F2 182D 36271+ LR R2,R13 remember callers save area
0170F4 18DF 36272+ LR R13,R15 setup current save area
0170F6 50D2 0008 00008 36273+ ST R13,8(R2) set forw pointer in callers save area
00000 36274+ USING TDSC,R1 declare TDSC base register
0170FA 58F0 1008 00008 36275+ L R15,TLRCNT load local repeat count to R15
36276+*
36277 *
170FE 36278 T960L EQU *
0170FE 4120 0001 00001 36279 LA R2,1 R2 :=00000001 FIN 01
017102 1832 36280 LR R3,R2 R3 :=00000001 02
017104 8B30 0008 00008 36281 SLA R3,8 R3 :=00000100 FIN 03
017108 1744 36282 XR R4,R4 R4 :=00000000 04
01710A 1643 36283 OR R4,R3 R4 :=00000100 05
01710C 0640 36284 BCTR R4,0 R4 :=000000FF FIN 06
01710E 1354 36285 LCR R5,R4 R5 :=FFFFFF01 07
017110 8950 0002 00002 36286 SLL R5,2 R5 :=FFFFFC04 FIN 08
017114 1065 36287 LPR R6,R5 R6 :=000003FC 09
017116 1A61 36288 AR R6,R1 R6 :=000003FD 10
017118 06FB 36289 BCTR R15,R11
36290 TSIMRET
01711A 58F0 C048 17128 36291+ L R15,=A(SAVETST) R15 := current save area
01711E 58DF 0004 00004 36292+ L R13,4(R15) get old save area back
017122 98EC D00C 0000C 36293+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017126 07FE 36294+ BR 14 RETURN 02000000
36295 TSIMEND
017128 36296+ LTORG
017128 00000458 36297 =A(SAVETST)
1712C 36298+T960TEND EQU *
36299 *
36300 * Test 961 -- Mix Int RR 1st 11 ----------------------------
36301 *
36302 TSIMBEG T961,65000,1,1,C'T700 1st 11',DIS=1
PAGE 663
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
36303+*
004604 36304+TDSCDAT CSECT
004608 36305+ DS 0D
36306+*
004608 00017130 36307+T961TDSC DC A(T961) // TENTRY
00460C 00000054 36308+ DC A(T961TEND-T961) // TLENGTH
004610 0000FDE8 36309+ DC F'65000' // TLRCNT
004614 00000001 36310+ DC F'1' // TIGCNT
004618 00000001 36311+ DC F'1' // TLTYPE
002009 36312+TEXT CSECT
002009 E3F9F6F1 36313+SPTR3338 DC C'T961'
00461C 36314+TDSCDAT CSECT
00461C 36315+ DS 0F
00461C 04002009 36316+ DC AL1(L'SPTR3338),AL3(SPTR3338)
00200D 36317+TEXT CSECT
00200D E3F7F0F040F1A2A3 36318+SPTR3339 DC C'T700 1st 11'
004620 36319+TDSCDAT CSECT
004620 36320+ DS 0F
004620 0B00200D 36321+ DC AL1(L'SPTR3339),AL3(SPTR3339)
36322+*
004DEC 36323+TDSCTBL CSECT
04DEC 36324+T961TPTR EQU *
004DEC 01004608 36325+ DC X'01',AL3(T961TDSC) disabled test
36326+*
01712C 36327+TCODE CSECT
017130 36328+ DS 0D ensure double word alignment for test
017130 36329+T961 DS 0H 01650000
017130 90EC D00C 0000C 36330+ STM 14,12,12(13) SAVE REGISTERS 02950000
017134 18CF 36331+ LR R12,R15 base register := entry address
17130 36332+ USING T961,R12 declare code base register
017136 41B0 C01E 1714E 36333+ LA R11,T961L load loop target to R11
01713A 58F0 C050 17180 36334+ L R15,=A(SAVETST) R15 := current save area
01713E 50DF 0004 00004 36335+ ST R13,4(R15) set back pointer in current save area
017142 182D 36336+ LR R2,R13 remember callers save area
017144 18DF 36337+ LR R13,R15 setup current save area
017146 50D2 0008 00008 36338+ ST R13,8(R2) set forw pointer in callers save area
00000 36339+ USING TDSC,R1 declare TDSC base register
01714A 58F0 1008 00008 36340+ L R15,TLRCNT load local repeat count to R15
36341+*
36342 *
1714E 36343 T961L EQU *
01714E 4120 0001 00001 36344 LA R2,1 R2 :=00000001 FIN 01
017152 1832 36345 LR R3,R2 R3 :=00000001 02
017154 8B30 0008 00008 36346 SLA R3,8 R3 :=00000100 FIN 03
017158 1744 36347 XR R4,R4 R4 :=00000000 04
01715A 1643 36348 OR R4,R3 R4 :=00000100 05
01715C 0640 36349 BCTR R4,0 R4 :=000000FF FIN 06
01715E 1354 36350 LCR R5,R4 R5 :=FFFFFF01 07
017160 8950 0002 00002 36351 SLL R5,2 R5 :=FFFFFC04 FIN 08
017164 1065 36352 LPR R6,R5 R6 :=000003FC 09
017166 1A61 36353 AR R6,R1 R6 :=000003FD 10
017168 1961 36354 CR R6,R1 != 11
01716A 06FB 36355 BCTR R15,R11
36356 TSIMRET
01716C 58F0 C050 17180 36357+ L R15,=A(SAVETST) R15 := current save area
PAGE 664
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017170 58DF 0004 00004 36358+ L R13,4(R15) get old save area back
017174 98EC D00C 0000C 36359+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017178 07FE 36360+ BR 14 RETURN 02000000
36361 *
01717A 36362 DS 0H
36363 T961BAD ABEND 60
01717A 36364+T961BAD DS 0H 00400002
01717A 4110 003C 0003C 36365+ LA 1,60 LOAD PARAMETER REG 1 01900002
01717E 0A0D 36366+ SVC 13 LINK TO ABEND ROUTINE 02050002
36367 TSIMEND
017180 36368+ LTORG
017180 00000458 36369 =A(SAVETST)
17184 36370+T961TEND EQU *
36371 *
36372 * Test 962 -- Mix Int RR 1st 12 ----------------------------
36373 *
36374 TSIMBEG T962,60000,1,1,C'T700 1st 12',DIS=1
36375+*
004624 36376+TDSCDAT CSECT
004628 36377+ DS 0D
36378+*
004628 00017188 36379+T962TDSC DC A(T962) // TENTRY
00462C 0000005C 36380+ DC A(T962TEND-T962) // TLENGTH
004630 0000EA60 36381+ DC F'60000' // TLRCNT
004634 00000001 36382+ DC F'1' // TIGCNT
004638 00000001 36383+ DC F'1' // TLTYPE
002018 36384+TEXT CSECT
002018 E3F9F6F2 36385+SPTR3349 DC C'T962'
00463C 36386+TDSCDAT CSECT
00463C 36387+ DS 0F
00463C 04002018 36388+ DC AL1(L'SPTR3349),AL3(SPTR3349)
00201C 36389+TEXT CSECT
00201C E3F7F0F040F1A2A3 36390+SPTR3350 DC C'T700 1st 12'
004640 36391+TDSCDAT CSECT
004640 36392+ DS 0F
004640 0B00201C 36393+ DC AL1(L'SPTR3350),AL3(SPTR3350)
36394+*
004DF0 36395+TDSCTBL CSECT
04DF0 36396+T962TPTR EQU *
004DF0 01004628 36397+ DC X'01',AL3(T962TDSC) disabled test
36398+*
017184 36399+TCODE CSECT
017188 36400+ DS 0D ensure double word alignment for test
017188 36401+T962 DS 0H 01650000
017188 90EC D00C 0000C 36402+ STM 14,12,12(13) SAVE REGISTERS 02950000
01718C 18CF 36403+ LR R12,R15 base register := entry address
17188 36404+ USING T962,R12 declare code base register
01718E 41B0 C01E 171A6 36405+ LA R11,T962L load loop target to R11
017192 58F0 C058 171E0 36406+ L R15,=A(SAVETST) R15 := current save area
017196 50DF 0004 00004 36407+ ST R13,4(R15) set back pointer in current save area
01719A 182D 36408+ LR R2,R13 remember callers save area
01719C 18DF 36409+ LR R13,R15 setup current save area
01719E 50D2 0008 00008 36410+ ST R13,8(R2) set forw pointer in callers save area
00000 36411+ USING TDSC,R1 declare TDSC base register
0171A2 58F0 1008 00008 36412+ L R15,TLRCNT load local repeat count to R15
PAGE 665
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
36413+*
36414 *
171A6 36415 T962L EQU *
0171A6 4120 0001 00001 36416 LA R2,1 R2 :=00000001 FIN 01
0171AA 1832 36417 LR R3,R2 R3 :=00000001 02
0171AC 8B30 0008 00008 36418 SLA R3,8 R3 :=00000100 FIN 03
0171B0 1744 36419 XR R4,R4 R4 :=00000000 04
0171B2 1643 36420 OR R4,R3 R4 :=00000100 05
0171B4 0640 36421 BCTR R4,0 R4 :=000000FF FIN 06
0171B6 1354 36422 LCR R5,R4 R5 :=FFFFFF01 07
0171B8 8950 0002 00002 36423 SLL R5,2 R5 :=FFFFFC04 FIN 08
0171BC 1065 36424 LPR R6,R5 R6 :=000003FC 09
0171BE 1A61 36425 AR R6,R1 R6 :=000003FD 10
0171C0 1961 36426 CR R6,R1 != 11
0171C2 4780 C04E 171D6 36427 BE T962BAD 12
0171C6 06FB 36428 BCTR R15,R11
36429 TSIMRET
0171C8 58F0 C058 171E0 36430+ L R15,=A(SAVETST) R15 := current save area
0171CC 58DF 0004 00004 36431+ L R13,4(R15) get old save area back
0171D0 98EC D00C 0000C 36432+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0171D4 07FE 36433+ BR 14 RETURN 02000000
36434 *
0171D6 36435 DS 0H
36436 T962BAD ABEND 60
0171D6 36437+T962BAD DS 0H 00400002
0171D6 4110 003C 0003C 36438+ LA 1,60 LOAD PARAMETER REG 1 01900002
0171DA 0A0D 36439+ SVC 13 LINK TO ABEND ROUTINE 02050002
36440 TSIMEND
0171E0 36441+ LTORG
0171E0 00000458 36442 =A(SAVETST)
171E4 36443+T962TEND EQU *
36444 *
36445 * Test 963 -- Mix Int RR 1st 13 ----------------------------
36446 *
36447 TSIMBEG T963,55000,1,1,C'T700 1st 13',DIS=1
36448+*
004644 36449+TDSCDAT CSECT
004648 36450+ DS 0D
36451+*
004648 000171E8 36452+T963TDSC DC A(T963) // TENTRY
00464C 0000005C 36453+ DC A(T963TEND-T963) // TLENGTH
004650 0000D6D8 36454+ DC F'55000' // TLRCNT
004654 00000001 36455+ DC F'1' // TIGCNT
004658 00000001 36456+ DC F'1' // TLTYPE
002027 36457+TEXT CSECT
002027 E3F9F6F3 36458+SPTR3360 DC C'T963'
00465C 36459+TDSCDAT CSECT
00465C 36460+ DS 0F
00465C 04002027 36461+ DC AL1(L'SPTR3360),AL3(SPTR3360)
00202B 36462+TEXT CSECT
00202B E3F7F0F040F1A2A3 36463+SPTR3361 DC C'T700 1st 13'
004660 36464+TDSCDAT CSECT
004660 36465+ DS 0F
004660 0B00202B 36466+ DC AL1(L'SPTR3361),AL3(SPTR3361)
36467+*
PAGE 666
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004DF4 36468+TDSCTBL CSECT
04DF4 36469+T963TPTR EQU *
004DF4 01004648 36470+ DC X'01',AL3(T963TDSC) disabled test
36471+*
0171E4 36472+TCODE CSECT
0171E8 36473+ DS 0D ensure double word alignment for test
0171E8 36474+T963 DS 0H 01650000
0171E8 90EC D00C 0000C 36475+ STM 14,12,12(13) SAVE REGISTERS 02950000
0171EC 18CF 36476+ LR R12,R15 base register := entry address
171E8 36477+ USING T963,R12 declare code base register
0171EE 41B0 C01E 17206 36478+ LA R11,T963L load loop target to R11
0171F2 58F0 C058 17240 36479+ L R15,=A(SAVETST) R15 := current save area
0171F6 50DF 0004 00004 36480+ ST R13,4(R15) set back pointer in current save area
0171FA 182D 36481+ LR R2,R13 remember callers save area
0171FC 18DF 36482+ LR R13,R15 setup current save area
0171FE 50D2 0008 00008 36483+ ST R13,8(R2) set forw pointer in callers save area
00000 36484+ USING TDSC,R1 declare TDSC base register
017202 58F0 1008 00008 36485+ L R15,TLRCNT load local repeat count to R15
36486+*
36487 *
17206 36488 T963L EQU *
017206 4120 0001 00001 36489 LA R2,1 R2 :=00000001 FIN 01
01720A 1832 36490 LR R3,R2 R3 :=00000001 02
01720C 8B30 0008 00008 36491 SLA R3,8 R3 :=00000100 FIN 03
017210 1744 36492 XR R4,R4 R4 :=00000000 04
017212 1643 36493 OR R4,R3 R4 :=00000100 05
017214 0640 36494 BCTR R4,0 R4 :=000000FF FIN 06
017216 1354 36495 LCR R5,R4 R5 :=FFFFFF01 07
017218 8950 0002 00002 36496 SLL R5,2 R5 :=FFFFFC04 FIN 08
01721C 1065 36497 LPR R6,R5 R6 :=000003FC 09
01721E 1A61 36498 AR R6,R1 R6 :=000003FD 10
017220 1961 36499 CR R6,R1 != 11
017222 4780 C050 17238 36500 BE T963BAD 12
017226 1173 36501 LNR R7,R3 R7 :=FFFFFF00 13
017228 06FB 36502 BCTR R15,R11
36503 TSIMRET
01722A 58F0 C058 17240 36504+ L R15,=A(SAVETST) R15 := current save area
01722E 58DF 0004 00004 36505+ L R13,4(R15) get old save area back
017232 98EC D00C 0000C 36506+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017236 07FE 36507+ BR 14 RETURN 02000000
36508 *
017238 36509 DS 0H
36510 T963BAD ABEND 60
017238 36511+T963BAD DS 0H 00400002
017238 4110 003C 0003C 36512+ LA 1,60 LOAD PARAMETER REG 1 01900002
01723C 0A0D 36513+ SVC 13 LINK TO ABEND ROUTINE 02050002
36514 TSIMEND
017240 36515+ LTORG
017240 00000458 36516 =A(SAVETST)
17244 36517+T963TEND EQU *
36518 *
36519 * Test 964 -- Mix Int RR 1st 14 ----------------------------
36520 *
36521 TSIMBEG T964,50000,1,1,C'T700 1st 14',DIS=1
36522+*
PAGE 667
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004664 36523+TDSCDAT CSECT
004668 36524+ DS 0D
36525+*
004668 00017248 36526+T964TDSC DC A(T964) // TENTRY
00466C 0000005C 36527+ DC A(T964TEND-T964) // TLENGTH
004670 0000C350 36528+ DC F'50000' // TLRCNT
004674 00000001 36529+ DC F'1' // TIGCNT
004678 00000001 36530+ DC F'1' // TLTYPE
002036 36531+TEXT CSECT
002036 E3F9F6F4 36532+SPTR3371 DC C'T964'
00467C 36533+TDSCDAT CSECT
00467C 36534+ DS 0F
00467C 04002036 36535+ DC AL1(L'SPTR3371),AL3(SPTR3371)
00203A 36536+TEXT CSECT
00203A E3F7F0F040F1A2A3 36537+SPTR3372 DC C'T700 1st 14'
004680 36538+TDSCDAT CSECT
004680 36539+ DS 0F
004680 0B00203A 36540+ DC AL1(L'SPTR3372),AL3(SPTR3372)
36541+*
004DF8 36542+TDSCTBL CSECT
04DF8 36543+T964TPTR EQU *
004DF8 01004668 36544+ DC X'01',AL3(T964TDSC) disabled test
36545+*
017244 36546+TCODE CSECT
017248 36547+ DS 0D ensure double word alignment for test
017248 36548+T964 DS 0H 01650000
017248 90EC D00C 0000C 36549+ STM 14,12,12(13) SAVE REGISTERS 02950000
01724C 18CF 36550+ LR R12,R15 base register := entry address
17248 36551+ USING T964,R12 declare code base register
01724E 41B0 C01E 17266 36552+ LA R11,T964L load loop target to R11
017252 58F0 C058 172A0 36553+ L R15,=A(SAVETST) R15 := current save area
017256 50DF 0004 00004 36554+ ST R13,4(R15) set back pointer in current save area
01725A 182D 36555+ LR R2,R13 remember callers save area
01725C 18DF 36556+ LR R13,R15 setup current save area
01725E 50D2 0008 00008 36557+ ST R13,8(R2) set forw pointer in callers save area
00000 36558+ USING TDSC,R1 declare TDSC base register
017262 58F0 1008 00008 36559+ L R15,TLRCNT load local repeat count to R15
36560+*
36561 *
17266 36562 T964L EQU *
017266 4120 0001 00001 36563 LA R2,1 R2 :=00000001 FIN 01
01726A 1832 36564 LR R3,R2 R3 :=00000001 02
01726C 8B30 0008 00008 36565 SLA R3,8 R3 :=00000100 FIN 03
017270 1744 36566 XR R4,R4 R4 :=00000000 04
017272 1643 36567 OR R4,R3 R4 :=00000100 05
017274 0640 36568 BCTR R4,0 R4 :=000000FF FIN 06
017276 1354 36569 LCR R5,R4 R5 :=FFFFFF01 07
017278 8950 0002 00002 36570 SLL R5,2 R5 :=FFFFFC04 FIN 08
01727C 1065 36571 LPR R6,R5 R6 :=000003FC 09
01727E 1A61 36572 AR R6,R1 R6 :=000003FD 10
017280 1961 36573 CR R6,R1 != 11
017282 4780 C052 1729A 36574 BE T964BAD 12
017286 1173 36575 LNR R7,R3 R7 :=FFFFFF00 13
017288 1476 36576 NR R7,R6 R7 :=00000300 14
01728A 06FB 36577 BCTR R15,R11
PAGE 668
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
36578 TSIMRET
01728C 58F0 C058 172A0 36579+ L R15,=A(SAVETST) R15 := current save area
017290 58DF 0004 00004 36580+ L R13,4(R15) get old save area back
017294 98EC D00C 0000C 36581+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017298 07FE 36582+ BR 14 RETURN 02000000
36583 *
01729A 36584 DS 0H
36585 T964BAD ABEND 60
01729A 36586+T964BAD DS 0H 00400002
01729A 4110 003C 0003C 36587+ LA 1,60 LOAD PARAMETER REG 1 01900002
01729E 0A0D 36588+ SVC 13 LINK TO ABEND ROUTINE 02050002
36589 TSIMEND
0172A0 36590+ LTORG
0172A0 00000458 36591 =A(SAVETST)
172A4 36592+T964TEND EQU *
36593 *
36594 * Test 965 -- Mix Int RR 1st 15 ----------------------------
36595 *
36596 TSIMBEG T965,50000,1,1,C'T700 1st 15',DIS=1
36597+*
004684 36598+TDSCDAT CSECT
004688 36599+ DS 0D
36600+*
004688 000172A8 36601+T965TDSC DC A(T965) // TENTRY
00468C 00000064 36602+ DC A(T965TEND-T965) // TLENGTH
004690 0000C350 36603+ DC F'50000' // TLRCNT
004694 00000001 36604+ DC F'1' // TIGCNT
004698 00000001 36605+ DC F'1' // TLTYPE
002045 36606+TEXT CSECT
002045 E3F9F6F5 36607+SPTR3382 DC C'T965'
00469C 36608+TDSCDAT CSECT
00469C 36609+ DS 0F
00469C 04002045 36610+ DC AL1(L'SPTR3382),AL3(SPTR3382)
002049 36611+TEXT CSECT
002049 E3F7F0F040F1A2A3 36612+SPTR3383 DC C'T700 1st 15'
0046A0 36613+TDSCDAT CSECT
0046A0 36614+ DS 0F
0046A0 0B002049 36615+ DC AL1(L'SPTR3383),AL3(SPTR3383)
36616+*
004DFC 36617+TDSCTBL CSECT
04DFC 36618+T965TPTR EQU *
004DFC 01004688 36619+ DC X'01',AL3(T965TDSC) disabled test
36620+*
0172A4 36621+TCODE CSECT
0172A8 36622+ DS 0D ensure double word alignment for test
0172A8 36623+T965 DS 0H 01650000
0172A8 90EC D00C 0000C 36624+ STM 14,12,12(13) SAVE REGISTERS 02950000
0172AC 18CF 36625+ LR R12,R15 base register := entry address
172A8 36626+ USING T965,R12 declare code base register
0172AE 41B0 C01E 172C6 36627+ LA R11,T965L load loop target to R11
0172B2 58F0 C060 17308 36628+ L R15,=A(SAVETST) R15 := current save area
0172B6 50DF 0004 00004 36629+ ST R13,4(R15) set back pointer in current save area
0172BA 182D 36630+ LR R2,R13 remember callers save area
0172BC 18DF 36631+ LR R13,R15 setup current save area
0172BE 50D2 0008 00008 36632+ ST R13,8(R2) set forw pointer in callers save area
PAGE 669
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00000 36633+ USING TDSC,R1 declare TDSC base register
0172C2 58F0 1008 00008 36634+ L R15,TLRCNT load local repeat count to R15
36635+*
36636 *
172C6 36637 T965L EQU *
0172C6 4120 0001 00001 36638 LA R2,1 R2 :=00000001 FIN 01
0172CA 1832 36639 LR R3,R2 R3 :=00000001 02
0172CC 8B30 0008 00008 36640 SLA R3,8 R3 :=00000100 FIN 03
0172D0 1744 36641 XR R4,R4 R4 :=00000000 04
0172D2 1643 36642 OR R4,R3 R4 :=00000100 05
0172D4 0640 36643 BCTR R4,0 R4 :=000000FF FIN 06
0172D6 1354 36644 LCR R5,R4 R5 :=FFFFFF01 07
0172D8 8950 0002 00002 36645 SLL R5,2 R5 :=FFFFFC04 FIN 08
0172DC 1065 36646 LPR R6,R5 R6 :=000003FC 09
0172DE 1A61 36647 AR R6,R1 R6 :=000003FD 10
0172E0 1961 36648 CR R6,R1 != 11
0172E2 4780 C056 172FE 36649 BE T965BAD 12
0172E6 1173 36650 LNR R7,R3 R7 :=FFFFFF00 13
0172E8 1476 36651 NR R7,R6 R7 :=00000300 14
0172EA 8A70 0002 00002 36652 SRA R7,2 R7 :=000000C0 15
0172EE 06FB 36653 BCTR R15,R11
36654 TSIMRET
0172F0 58F0 C060 17308 36655+ L R15,=A(SAVETST) R15 := current save area
0172F4 58DF 0004 00004 36656+ L R13,4(R15) get old save area back
0172F8 98EC D00C 0000C 36657+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0172FC 07FE 36658+ BR 14 RETURN 02000000
36659 *
0172FE 36660 DS 0H
36661 T965BAD ABEND 60
0172FE 36662+T965BAD DS 0H 00400002
0172FE 4110 003C 0003C 36663+ LA 1,60 LOAD PARAMETER REG 1 01900002
017302 0A0D 36664+ SVC 13 LINK TO ABEND ROUTINE 02050002
36665 TSIMEND
017308 36666+ LTORG
017308 00000458 36667 =A(SAVETST)
1730C 36668+T965TEND EQU *
36669 *
36670 * Test 966 -- Mix Int RR 1st 16 ----------------------------
36671 *
36672 TSIMBEG T966,45000,1,1,C'T700 1st 16',DIS=1
36673+*
0046A4 36674+TDSCDAT CSECT
0046A8 36675+ DS 0D
36676+*
0046A8 00017310 36677+T966TDSC DC A(T966) // TENTRY
0046AC 00000064 36678+ DC A(T966TEND-T966) // TLENGTH
0046B0 0000AFC8 36679+ DC F'45000' // TLRCNT
0046B4 00000001 36680+ DC F'1' // TIGCNT
0046B8 00000001 36681+ DC F'1' // TLTYPE
002054 36682+TEXT CSECT
002054 E3F9F6F6 36683+SPTR3393 DC C'T966'
0046BC 36684+TDSCDAT CSECT
0046BC 36685+ DS 0F
0046BC 04002054 36686+ DC AL1(L'SPTR3393),AL3(SPTR3393)
002058 36687+TEXT CSECT
PAGE 670
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
002058 E3F7F0F040F1A2A3 36688+SPTR3394 DC C'T700 1st 16'
0046C0 36689+TDSCDAT CSECT
0046C0 36690+ DS 0F
0046C0 0B002058 36691+ DC AL1(L'SPTR3394),AL3(SPTR3394)
36692+*
004E00 36693+TDSCTBL CSECT
04E00 36694+T966TPTR EQU *
004E00 010046A8 36695+ DC X'01',AL3(T966TDSC) disabled test
36696+*
01730C 36697+TCODE CSECT
017310 36698+ DS 0D ensure double word alignment for test
017310 36699+T966 DS 0H 01650000
017310 90EC D00C 0000C 36700+ STM 14,12,12(13) SAVE REGISTERS 02950000
017314 18CF 36701+ LR R12,R15 base register := entry address
17310 36702+ USING T966,R12 declare code base register
017316 41B0 C01E 1732E 36703+ LA R11,T966L load loop target to R11
01731A 58F0 C060 17370 36704+ L R15,=A(SAVETST) R15 := current save area
01731E 50DF 0004 00004 36705+ ST R13,4(R15) set back pointer in current save area
017322 182D 36706+ LR R2,R13 remember callers save area
017324 18DF 36707+ LR R13,R15 setup current save area
017326 50D2 0008 00008 36708+ ST R13,8(R2) set forw pointer in callers save area
00000 36709+ USING TDSC,R1 declare TDSC base register
01732A 58F0 1008 00008 36710+ L R15,TLRCNT load local repeat count to R15
36711+*
36712 *
1732E 36713 T966L EQU *
01732E 4120 0001 00001 36714 LA R2,1 R2 :=00000001 FIN 01
017332 1832 36715 LR R3,R2 R3 :=00000001 02
017334 8B30 0008 00008 36716 SLA R3,8 R3 :=00000100 FIN 03
017338 1744 36717 XR R4,R4 R4 :=00000000 04
01733A 1643 36718 OR R4,R3 R4 :=00000100 05
01733C 0640 36719 BCTR R4,0 R4 :=000000FF FIN 06
01733E 1354 36720 LCR R5,R4 R5 :=FFFFFF01 07
017340 8950 0002 00002 36721 SLL R5,2 R5 :=FFFFFC04 FIN 08
017344 1065 36722 LPR R6,R5 R6 :=000003FC 09
017346 1A61 36723 AR R6,R1 R6 :=000003FD 10
017348 1961 36724 CR R6,R1 != 11
01734A 4780 C058 17368 36725 BE T966BAD 12
01734E 1173 36726 LNR R7,R3 R7 :=FFFFFF00 13
017350 1476 36727 NR R7,R6 R7 :=00000300 14
017352 8A70 0002 00002 36728 SRA R7,2 R7 :=000000C0 15
017356 1B74 36729 SR R7,R4 R7 :=FFFFFFC1 16
017358 06FB 36730 BCTR R15,R11
36731 TSIMRET
01735A 58F0 C060 17370 36732+ L R15,=A(SAVETST) R15 := current save area
01735E 58DF 0004 00004 36733+ L R13,4(R15) get old save area back
017362 98EC D00C 0000C 36734+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017366 07FE 36735+ BR 14 RETURN 02000000
36736 *
017368 36737 DS 0H
36738 T966BAD ABEND 60
017368 36739+T966BAD DS 0H 00400002
017368 4110 003C 0003C 36740+ LA 1,60 LOAD PARAMETER REG 1 01900002
01736C 0A0D 36741+ SVC 13 LINK TO ABEND ROUTINE 02050002
36742 TSIMEND
PAGE 671
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017370 36743+ LTORG
017370 00000458 36744 =A(SAVETST)
17374 36745+T966TEND EQU *
36746 *
36747 * Test 967 -- Mix Int RR 1st 17 ----------------------------
36748 *
36749 TSIMBEG T967,45000,1,1,C'T700 1st 17',DIS=1
36750+*
0046C4 36751+TDSCDAT CSECT
0046C8 36752+ DS 0D
36753+*
0046C8 00017378 36754+T967TDSC DC A(T967) // TENTRY
0046CC 00000064 36755+ DC A(T967TEND-T967) // TLENGTH
0046D0 0000AFC8 36756+ DC F'45000' // TLRCNT
0046D4 00000001 36757+ DC F'1' // TIGCNT
0046D8 00000001 36758+ DC F'1' // TLTYPE
002063 36759+TEXT CSECT
002063 E3F9F6F7 36760+SPTR3404 DC C'T967'
0046DC 36761+TDSCDAT CSECT
0046DC 36762+ DS 0F
0046DC 04002063 36763+ DC AL1(L'SPTR3404),AL3(SPTR3404)
002067 36764+TEXT CSECT
002067 E3F7F0F040F1A2A3 36765+SPTR3405 DC C'T700 1st 17'
0046E0 36766+TDSCDAT CSECT
0046E0 36767+ DS 0F
0046E0 0B002067 36768+ DC AL1(L'SPTR3405),AL3(SPTR3405)
36769+*
004E04 36770+TDSCTBL CSECT
04E04 36771+T967TPTR EQU *
004E04 010046C8 36772+ DC X'01',AL3(T967TDSC) disabled test
36773+*
017374 36774+TCODE CSECT
017378 36775+ DS 0D ensure double word alignment for test
017378 36776+T967 DS 0H 01650000
017378 90EC D00C 0000C 36777+ STM 14,12,12(13) SAVE REGISTERS 02950000
01737C 18CF 36778+ LR R12,R15 base register := entry address
17378 36779+ USING T967,R12 declare code base register
01737E 41B0 C01E 17396 36780+ LA R11,T967L load loop target to R11
017382 58F0 C060 173D8 36781+ L R15,=A(SAVETST) R15 := current save area
017386 50DF 0004 00004 36782+ ST R13,4(R15) set back pointer in current save area
01738A 182D 36783+ LR R2,R13 remember callers save area
01738C 18DF 36784+ LR R13,R15 setup current save area
01738E 50D2 0008 00008 36785+ ST R13,8(R2) set forw pointer in callers save area
00000 36786+ USING TDSC,R1 declare TDSC base register
017392 58F0 1008 00008 36787+ L R15,TLRCNT load local repeat count to R15
36788+*
36789 *
17396 36790 T967L EQU *
017396 4120 0001 00001 36791 LA R2,1 R2 :=00000001 FIN 01
01739A 1832 36792 LR R3,R2 R3 :=00000001 02
01739C 8B30 0008 00008 36793 SLA R3,8 R3 :=00000100 FIN 03
0173A0 1744 36794 XR R4,R4 R4 :=00000000 04
0173A2 1643 36795 OR R4,R3 R4 :=00000100 05
0173A4 0640 36796 BCTR R4,0 R4 :=000000FF FIN 06
0173A6 1354 36797 LCR R5,R4 R5 :=FFFFFF01 07
PAGE 672
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0173A8 8950 0002 00002 36798 SLL R5,2 R5 :=FFFFFC04 FIN 08
0173AC 1065 36799 LPR R6,R5 R6 :=000003FC 09
0173AE 1A61 36800 AR R6,R1 R6 :=000003FD 10
0173B0 1961 36801 CR R6,R1 != 11
0173B2 4780 C05A 173D2 36802 BE T967BAD 12
0173B6 1173 36803 LNR R7,R3 R7 :=FFFFFF00 13
0173B8 1476 36804 NR R7,R6 R7 :=00000300 14
0173BA 8A70 0002 00002 36805 SRA R7,2 R7 :=000000C0 15
0173BE 1B74 36806 SR R7,R4 R7 :=FFFFFFC1 16
0173C0 1283 36807 LTR R8,R3 R8 :=00000100 17
0173C2 06FB 36808 BCTR R15,R11
36809 TSIMRET
0173C4 58F0 C060 173D8 36810+ L R15,=A(SAVETST) R15 := current save area
0173C8 58DF 0004 00004 36811+ L R13,4(R15) get old save area back
0173CC 98EC D00C 0000C 36812+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0173D0 07FE 36813+ BR 14 RETURN 02000000
36814 *
0173D2 36815 DS 0H
36816 T967BAD ABEND 60
0173D2 36817+T967BAD DS 0H 00400002
0173D2 4110 003C 0003C 36818+ LA 1,60 LOAD PARAMETER REG 1 01900002
0173D6 0A0D 36819+ SVC 13 LINK TO ABEND ROUTINE 02050002
36820 TSIMEND
0173D8 36821+ LTORG
0173D8 00000458 36822 =A(SAVETST)
173DC 36823+T967TEND EQU *
36824 *
36825 * Test 968 -- Mix Int RR 1st 18 ----------------------------
36826 *
36827 TSIMBEG T968,40000,1,1,C'T700 1st 18',DIS=1
36828+*
0046E4 36829+TDSCDAT CSECT
0046E8 36830+ DS 0D
36831+*
0046E8 000173E0 36832+T968TDSC DC A(T968) // TENTRY
0046EC 0000006C 36833+ DC A(T968TEND-T968) // TLENGTH
0046F0 00009C40 36834+ DC F'40000' // TLRCNT
0046F4 00000001 36835+ DC F'1' // TIGCNT
0046F8 00000001 36836+ DC F'1' // TLTYPE
002072 36837+TEXT CSECT
002072 E3F9F6F8 36838+SPTR3415 DC C'T968'
0046FC 36839+TDSCDAT CSECT
0046FC 36840+ DS 0F
0046FC 04002072 36841+ DC AL1(L'SPTR3415),AL3(SPTR3415)
002076 36842+TEXT CSECT
002076 E3F7F0F040F1A2A3 36843+SPTR3416 DC C'T700 1st 18'
004700 36844+TDSCDAT CSECT
004700 36845+ DS 0F
004700 0B002076 36846+ DC AL1(L'SPTR3416),AL3(SPTR3416)
36847+*
004E08 36848+TDSCTBL CSECT
04E08 36849+T968TPTR EQU *
004E08 010046E8 36850+ DC X'01',AL3(T968TDSC) disabled test
36851+*
0173DC 36852+TCODE CSECT
PAGE 673
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0173E0 36853+ DS 0D ensure double word alignment for test
0173E0 36854+T968 DS 0H 01650000
0173E0 90EC D00C 0000C 36855+ STM 14,12,12(13) SAVE REGISTERS 02950000
0173E4 18CF 36856+ LR R12,R15 base register := entry address
173E0 36857+ USING T968,R12 declare code base register
0173E6 41B0 C01E 173FE 36858+ LA R11,T968L load loop target to R11
0173EA 58F0 C068 17448 36859+ L R15,=A(SAVETST) R15 := current save area
0173EE 50DF 0004 00004 36860+ ST R13,4(R15) set back pointer in current save area
0173F2 182D 36861+ LR R2,R13 remember callers save area
0173F4 18DF 36862+ LR R13,R15 setup current save area
0173F6 50D2 0008 00008 36863+ ST R13,8(R2) set forw pointer in callers save area
00000 36864+ USING TDSC,R1 declare TDSC base register
0173FA 58F0 1008 00008 36865+ L R15,TLRCNT load local repeat count to R15
36866+*
36867 *
173FE 36868 T968L EQU *
0173FE 4120 0001 00001 36869 LA R2,1 R2 :=00000001 FIN 01
017402 1832 36870 LR R3,R2 R3 :=00000001 02
017404 8B30 0008 00008 36871 SLA R3,8 R3 :=00000100 FIN 03
017408 1744 36872 XR R4,R4 R4 :=00000000 04
01740A 1643 36873 OR R4,R3 R4 :=00000100 05
01740C 0640 36874 BCTR R4,0 R4 :=000000FF FIN 06
01740E 1354 36875 LCR R5,R4 R5 :=FFFFFF01 07
017410 8950 0002 00002 36876 SLL R5,2 R5 :=FFFFFC04 FIN 08
017414 1065 36877 LPR R6,R5 R6 :=000003FC 09
017416 1A61 36878 AR R6,R1 R6 :=000003FD 10
017418 1961 36879 CR R6,R1 != 11
01741A 4780 C05E 1743E 36880 BE T968BAD 12
01741E 1173 36881 LNR R7,R3 R7 :=FFFFFF00 13
017420 1476 36882 NR R7,R6 R7 :=00000300 14
017422 8A70 0002 00002 36883 SRA R7,2 R7 :=000000C0 15
017426 1B74 36884 SR R7,R4 R7 :=FFFFFFC1 16
017428 1283 36885 LTR R8,R3 R8 :=00000100 17
01742A 8880 0001 00001 36886 SRL R8,1 R8 :=00000080 18
01742E 06FB 36887 BCTR R15,R11
36888 TSIMRET
017430 58F0 C068 17448 36889+ L R15,=A(SAVETST) R15 := current save area
017434 58DF 0004 00004 36890+ L R13,4(R15) get old save area back
017438 98EC D00C 0000C 36891+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01743C 07FE 36892+ BR 14 RETURN 02000000
36893 *
01743E 36894 DS 0H
36895 T968BAD ABEND 60
01743E 36896+T968BAD DS 0H 00400002
01743E 4110 003C 0003C 36897+ LA 1,60 LOAD PARAMETER REG 1 01900002
017442 0A0D 36898+ SVC 13 LINK TO ABEND ROUTINE 02050002
36899 TSIMEND
017448 36900+ LTORG
017448 00000458 36901 =A(SAVETST)
1744C 36902+T968TEND EQU *
36903 *
36904 * Test 969 -- Mix Int RR 1st 19 ----------------------------
36905 *
36906 TSIMBEG T969,40000,1,1,C'T700 1st 19',DIS=1
36907+*
PAGE 674
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004704 36908+TDSCDAT CSECT
004708 36909+ DS 0D
36910+*
004708 00017450 36911+T969TDSC DC A(T969) // TENTRY
00470C 0000006C 36912+ DC A(T969TEND-T969) // TLENGTH
004710 00009C40 36913+ DC F'40000' // TLRCNT
004714 00000001 36914+ DC F'1' // TIGCNT
004718 00000001 36915+ DC F'1' // TLTYPE
002081 36916+TEXT CSECT
002081 E3F9F6F9 36917+SPTR3426 DC C'T969'
00471C 36918+TDSCDAT CSECT
00471C 36919+ DS 0F
00471C 04002081 36920+ DC AL1(L'SPTR3426),AL3(SPTR3426)
002085 36921+TEXT CSECT
002085 E3F7F0F040F1A2A3 36922+SPTR3427 DC C'T700 1st 19'
004720 36923+TDSCDAT CSECT
004720 36924+ DS 0F
004720 0B002085 36925+ DC AL1(L'SPTR3427),AL3(SPTR3427)
36926+*
004E0C 36927+TDSCTBL CSECT
04E0C 36928+T969TPTR EQU *
004E0C 01004708 36929+ DC X'01',AL3(T969TDSC) disabled test
36930+*
01744C 36931+TCODE CSECT
017450 36932+ DS 0D ensure double word alignment for test
017450 36933+T969 DS 0H 01650000
017450 90EC D00C 0000C 36934+ STM 14,12,12(13) SAVE REGISTERS 02950000
017454 18CF 36935+ LR R12,R15 base register := entry address
17450 36936+ USING T969,R12 declare code base register
017456 41B0 C01E 1746E 36937+ LA R11,T969L load loop target to R11
01745A 58F0 C068 174B8 36938+ L R15,=A(SAVETST) R15 := current save area
01745E 50DF 0004 00004 36939+ ST R13,4(R15) set back pointer in current save area
017462 182D 36940+ LR R2,R13 remember callers save area
017464 18DF 36941+ LR R13,R15 setup current save area
017466 50D2 0008 00008 36942+ ST R13,8(R2) set forw pointer in callers save area
00000 36943+ USING TDSC,R1 declare TDSC base register
01746A 58F0 1008 00008 36944+ L R15,TLRCNT load local repeat count to R15
36945+*
36946 *
1746E 36947 T969L EQU *
01746E 4120 0001 00001 36948 LA R2,1 R2 :=00000001 FIN 01
017472 1832 36949 LR R3,R2 R3 :=00000001 02
017474 8B30 0008 00008 36950 SLA R3,8 R3 :=00000100 FIN 03
017478 1744 36951 XR R4,R4 R4 :=00000000 04
01747A 1643 36952 OR R4,R3 R4 :=00000100 05
01747C 0640 36953 BCTR R4,0 R4 :=000000FF FIN 06
01747E 1354 36954 LCR R5,R4 R5 :=FFFFFF01 07
017480 8950 0002 00002 36955 SLL R5,2 R5 :=FFFFFC04 FIN 08
017484 1065 36956 LPR R6,R5 R6 :=000003FC 09
017486 1A61 36957 AR R6,R1 R6 :=000003FD 10
017488 1961 36958 CR R6,R1 != 11
01748A 4780 C060 174B0 36959 BE T969BAD 12
01748E 1173 36960 LNR R7,R3 R7 :=FFFFFF00 13
017490 1476 36961 NR R7,R6 R7 :=00000300 14
017492 8A70 0002 00002 36962 SRA R7,2 R7 :=000000C0 15
PAGE 675
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017496 1B74 36963 SR R7,R4 R7 :=FFFFFFC1 16
017498 1283 36964 LTR R8,R3 R8 :=00000100 17
01749A 8880 0001 00001 36965 SRL R8,1 R8 :=00000080 18
01749E 1E83 36966 ALR R8,R3 R8 :=00000180 19
0174A0 06FB 36967 BCTR R15,R11
36968 TSIMRET
0174A2 58F0 C068 174B8 36969+ L R15,=A(SAVETST) R15 := current save area
0174A6 58DF 0004 00004 36970+ L R13,4(R15) get old save area back
0174AA 98EC D00C 0000C 36971+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0174AE 07FE 36972+ BR 14 RETURN 02000000
36973 *
0174B0 36974 DS 0H
36975 T969BAD ABEND 60
0174B0 36976+T969BAD DS 0H 00400002
0174B0 4110 003C 0003C 36977+ LA 1,60 LOAD PARAMETER REG 1 01900002
0174B4 0A0D 36978+ SVC 13 LINK TO ABEND ROUTINE 02050002
36979 TSIMEND
0174B8 36980+ LTORG
0174B8 00000458 36981 =A(SAVETST)
174BC 36982+T969TEND EQU *
36983 *
36984 * Test 970 -- Mix Int RR 1st 20 ----------------------------
36985 *
36986 TSIMBEG T970,40000,1,1,C'T700 1st 20',DIS=1
36987+*
004724 36988+TDSCDAT CSECT
004728 36989+ DS 0D
36990+*
004728 000174C0 36991+T970TDSC DC A(T970) // TENTRY
00472C 0000006C 36992+ DC A(T970TEND-T970) // TLENGTH
004730 00009C40 36993+ DC F'40000' // TLRCNT
004734 00000001 36994+ DC F'1' // TIGCNT
004738 00000001 36995+ DC F'1' // TLTYPE
002090 36996+TEXT CSECT
002090 E3F9F7F0 36997+SPTR3437 DC C'T970'
00473C 36998+TDSCDAT CSECT
00473C 36999+ DS 0F
00473C 04002090 37000+ DC AL1(L'SPTR3437),AL3(SPTR3437)
002094 37001+TEXT CSECT
002094 E3F7F0F040F1A2A3 37002+SPTR3438 DC C'T700 1st 20'
004740 37003+TDSCDAT CSECT
004740 37004+ DS 0F
004740 0B002094 37005+ DC AL1(L'SPTR3438),AL3(SPTR3438)
37006+*
004E10 37007+TDSCTBL CSECT
04E10 37008+T970TPTR EQU *
004E10 01004728 37009+ DC X'01',AL3(T970TDSC) disabled test
37010+*
0174BC 37011+TCODE CSECT
0174C0 37012+ DS 0D ensure double word alignment for test
0174C0 37013+T970 DS 0H 01650000
0174C0 90EC D00C 0000C 37014+ STM 14,12,12(13) SAVE REGISTERS 02950000
0174C4 18CF 37015+ LR R12,R15 base register := entry address
174C0 37016+ USING T970,R12 declare code base register
0174C6 41B0 C01E 174DE 37017+ LA R11,T970L load loop target to R11
PAGE 676
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0174CA 58F0 C068 17528 37018+ L R15,=A(SAVETST) R15 := current save area
0174CE 50DF 0004 00004 37019+ ST R13,4(R15) set back pointer in current save area
0174D2 182D 37020+ LR R2,R13 remember callers save area
0174D4 18DF 37021+ LR R13,R15 setup current save area
0174D6 50D2 0008 00008 37022+ ST R13,8(R2) set forw pointer in callers save area
00000 37023+ USING TDSC,R1 declare TDSC base register
0174DA 58F0 1008 00008 37024+ L R15,TLRCNT load local repeat count to R15
37025+*
37026 *
174DE 37027 T970L EQU *
0174DE 4120 0001 00001 37028 LA R2,1 R2 :=00000001 FIN 01
0174E2 1832 37029 LR R3,R2 R3 :=00000001 02
0174E4 8B30 0008 00008 37030 SLA R3,8 R3 :=00000100 FIN 03
0174E8 1744 37031 XR R4,R4 R4 :=00000000 04
0174EA 1643 37032 OR R4,R3 R4 :=00000100 05
0174EC 0640 37033 BCTR R4,0 R4 :=000000FF FIN 06
0174EE 1354 37034 LCR R5,R4 R5 :=FFFFFF01 07
0174F0 8950 0002 00002 37035 SLL R5,2 R5 :=FFFFFC04 FIN 08
0174F4 1065 37036 LPR R6,R5 R6 :=000003FC 09
0174F6 1A61 37037 AR R6,R1 R6 :=000003FD 10
0174F8 1961 37038 CR R6,R1 != 11
0174FA 4780 C062 17522 37039 BE T970BAD 12
0174FE 1173 37040 LNR R7,R3 R7 :=FFFFFF00 13
017500 1476 37041 NR R7,R6 R7 :=00000300 14
017502 8A70 0002 00002 37042 SRA R7,2 R7 :=000000C0 15
017506 1B74 37043 SR R7,R4 R7 :=FFFFFFC1 16
017508 1283 37044 LTR R8,R3 R8 :=00000100 17
01750A 8880 0001 00001 37045 SRL R8,1 R8 :=00000080 18
01750E 1E83 37046 ALR R8,R3 R8 :=00000180 19
017510 1F87 37047 SLR R8,R7 R8 :=000001BF 20
017512 06FB 37048 BCTR R15,R11
37049 TSIMRET
017514 58F0 C068 17528 37050+ L R15,=A(SAVETST) R15 := current save area
017518 58DF 0004 00004 37051+ L R13,4(R15) get old save area back
01751C 98EC D00C 0000C 37052+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017520 07FE 37053+ BR 14 RETURN 02000000
37054 *
017522 37055 DS 0H
37056 T970BAD ABEND 60
017522 37057+T970BAD DS 0H 00400002
017522 4110 003C 0003C 37058+ LA 1,60 LOAD PARAMETER REG 1 01900002
017526 0A0D 37059+ SVC 13 LINK TO ABEND ROUTINE 02050002
37060 TSIMEND
017528 37061+ LTORG
017528 00000458 37062 =A(SAVETST)
1752C 37063+T970TEND EQU *
37064 *
37065 * Test 971 -- Mix Int RR 1st 21 ----------------------------
37066 *
37067 TSIMBEG T971,35000,1,1,C'T700 1st 21',DIS=1
37068+*
004744 37069+TDSCDAT CSECT
004748 37070+ DS 0D
37071+*
004748 00017530 37072+T971TDSC DC A(T971) // TENTRY
PAGE 677
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00474C 00000074 37073+ DC A(T971TEND-T971) // TLENGTH
004750 000088B8 37074+ DC F'35000' // TLRCNT
004754 00000001 37075+ DC F'1' // TIGCNT
004758 00000001 37076+ DC F'1' // TLTYPE
00209F 37077+TEXT CSECT
00209F E3F9F7F1 37078+SPTR3448 DC C'T971'
00475C 37079+TDSCDAT CSECT
00475C 37080+ DS 0F
00475C 0400209F 37081+ DC AL1(L'SPTR3448),AL3(SPTR3448)
0020A3 37082+TEXT CSECT
0020A3 E3F7F0F040F1A2A3 37083+SPTR3449 DC C'T700 1st 21'
004760 37084+TDSCDAT CSECT
004760 37085+ DS 0F
004760 0B0020A3 37086+ DC AL1(L'SPTR3449),AL3(SPTR3449)
37087+*
004E14 37088+TDSCTBL CSECT
04E14 37089+T971TPTR EQU *
004E14 01004748 37090+ DC X'01',AL3(T971TDSC) disabled test
37091+*
01752C 37092+TCODE CSECT
017530 37093+ DS 0D ensure double word alignment for test
017530 37094+T971 DS 0H 01650000
017530 90EC D00C 0000C 37095+ STM 14,12,12(13) SAVE REGISTERS 02950000
017534 18CF 37096+ LR R12,R15 base register := entry address
17530 37097+ USING T971,R12 declare code base register
017536 41B0 C01E 1754E 37098+ LA R11,T971L load loop target to R11
01753A 58F0 C070 175A0 37099+ L R15,=A(SAVETST) R15 := current save area
01753E 50DF 0004 00004 37100+ ST R13,4(R15) set back pointer in current save area
017542 182D 37101+ LR R2,R13 remember callers save area
017544 18DF 37102+ LR R13,R15 setup current save area
017546 50D2 0008 00008 37103+ ST R13,8(R2) set forw pointer in callers save area
00000 37104+ USING TDSC,R1 declare TDSC base register
01754A 58F0 1008 00008 37105+ L R15,TLRCNT load local repeat count to R15
37106+*
37107 *
1754E 37108 T971L EQU *
01754E 4120 0001 00001 37109 LA R2,1 R2 :=00000001 FIN 01
017552 1832 37110 LR R3,R2 R3 :=00000001 02
017554 8B30 0008 00008 37111 SLA R3,8 R3 :=00000100 FIN 03
017558 1744 37112 XR R4,R4 R4 :=00000000 04
01755A 1643 37113 OR R4,R3 R4 :=00000100 05
01755C 0640 37114 BCTR R4,0 R4 :=000000FF FIN 06
01755E 1354 37115 LCR R5,R4 R5 :=FFFFFF01 07
017560 8950 0002 00002 37116 SLL R5,2 R5 :=FFFFFC04 FIN 08
017564 1065 37117 LPR R6,R5 R6 :=000003FC 09
017566 1A61 37118 AR R6,R1 R6 :=000003FD 10
017568 1961 37119 CR R6,R1 != 11
01756A 4780 C064 17594 37120 BE T971BAD 12
01756E 1173 37121 LNR R7,R3 R7 :=FFFFFF00 13
017570 1476 37122 NR R7,R6 R7 :=00000300 14
017572 8A70 0002 00002 37123 SRA R7,2 R7 :=000000C0 15
017576 1B74 37124 SR R7,R4 R7 :=FFFFFFC1 16
017578 1283 37125 LTR R8,R3 R8 :=00000100 17
01757A 8880 0001 00001 37126 SRL R8,1 R8 :=00000080 18
01757E 1E83 37127 ALR R8,R3 R8 :=00000180 19
PAGE 678
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017580 1F87 37128 SLR R8,R7 R8 :=000001BF 20
017582 1583 37129 CLR R8,R3 != 21
017584 06FB 37130 BCTR R15,R11
37131 TSIMRET
017586 58F0 C070 175A0 37132+ L R15,=A(SAVETST) R15 := current save area
01758A 58DF 0004 00004 37133+ L R13,4(R15) get old save area back
01758E 98EC D00C 0000C 37134+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017592 07FE 37135+ BR 14 RETURN 02000000
37136 *
017594 37137 DS 0H
37138 T971BAD ABEND 60
017594 37139+T971BAD DS 0H 00400002
017594 4110 003C 0003C 37140+ LA 1,60 LOAD PARAMETER REG 1 01900002
017598 0A0D 37141+ SVC 13 LINK TO ABEND ROUTINE 02050002
37142 TSIMEND
0175A0 37143+ LTORG
0175A0 00000458 37144 =A(SAVETST)
175A4 37145+T971TEND EQU *
37146 *
37147 * Test 972 -- Mix Int RR 1st 22 ----------------------------
37148 *
37149 TSIMBEG T972,35000,1,1,C'T700 1st 22',DIS=1
37150+*
004764 37151+TDSCDAT CSECT
004768 37152+ DS 0D
37153+*
004768 000175A8 37154+T972TDSC DC A(T972) // TENTRY
00476C 00000074 37155+ DC A(T972TEND-T972) // TLENGTH
004770 000088B8 37156+ DC F'35000' // TLRCNT
004774 00000001 37157+ DC F'1' // TIGCNT
004778 00000001 37158+ DC F'1' // TLTYPE
0020AE 37159+TEXT CSECT
0020AE E3F9F7F2 37160+SPTR3459 DC C'T972'
00477C 37161+TDSCDAT CSECT
00477C 37162+ DS 0F
00477C 040020AE 37163+ DC AL1(L'SPTR3459),AL3(SPTR3459)
0020B2 37164+TEXT CSECT
0020B2 E3F7F0F040F1A2A3 37165+SPTR3460 DC C'T700 1st 22'
004780 37166+TDSCDAT CSECT
004780 37167+ DS 0F
004780 0B0020B2 37168+ DC AL1(L'SPTR3460),AL3(SPTR3460)
37169+*
004E18 37170+TDSCTBL CSECT
04E18 37171+T972TPTR EQU *
004E18 01004768 37172+ DC X'01',AL3(T972TDSC) disabled test
37173+*
0175A4 37174+TCODE CSECT
0175A8 37175+ DS 0D ensure double word alignment for test
0175A8 37176+T972 DS 0H 01650000
0175A8 90EC D00C 0000C 37177+ STM 14,12,12(13) SAVE REGISTERS 02950000
0175AC 18CF 37178+ LR R12,R15 base register := entry address
175A8 37179+ USING T972,R12 declare code base register
0175AE 41B0 C01E 175C6 37180+ LA R11,T972L load loop target to R11
0175B2 58F0 C070 17618 37181+ L R15,=A(SAVETST) R15 := current save area
0175B6 50DF 0004 00004 37182+ ST R13,4(R15) set back pointer in current save area
PAGE 679
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0175BA 182D 37183+ LR R2,R13 remember callers save area
0175BC 18DF 37184+ LR R13,R15 setup current save area
0175BE 50D2 0008 00008 37185+ ST R13,8(R2) set forw pointer in callers save area
00000 37186+ USING TDSC,R1 declare TDSC base register
0175C2 58F0 1008 00008 37187+ L R15,TLRCNT load local repeat count to R15
37188+*
37189 *
175C6 37190 T972L EQU *
0175C6 4120 0001 00001 37191 LA R2,1 R2 :=00000001 FIN 01
0175CA 1832 37192 LR R3,R2 R3 :=00000001 02
0175CC 8B30 0008 00008 37193 SLA R3,8 R3 :=00000100 FIN 03
0175D0 1744 37194 XR R4,R4 R4 :=00000000 04
0175D2 1643 37195 OR R4,R3 R4 :=00000100 05
0175D4 0640 37196 BCTR R4,0 R4 :=000000FF FIN 06
0175D6 1354 37197 LCR R5,R4 R5 :=FFFFFF01 07
0175D8 8950 0002 00002 37198 SLL R5,2 R5 :=FFFFFC04 FIN 08
0175DC 1065 37199 LPR R6,R5 R6 :=000003FC 09
0175DE 1A61 37200 AR R6,R1 R6 :=000003FD 10
0175E0 1961 37201 CR R6,R1 != 11
0175E2 4780 C068 17610 37202 BE T972BAD 12
0175E6 1173 37203 LNR R7,R3 R7 :=FFFFFF00 13
0175E8 1476 37204 NR R7,R6 R7 :=00000300 14
0175EA 8A70 0002 00002 37205 SRA R7,2 R7 :=000000C0 15
0175EE 1B74 37206 SR R7,R4 R7 :=FFFFFFC1 16
0175F0 1283 37207 LTR R8,R3 R8 :=00000100 17
0175F2 8880 0001 00001 37208 SRL R8,1 R8 :=00000080 18
0175F6 1E83 37209 ALR R8,R3 R8 :=00000180 19
0175F8 1F87 37210 SLR R8,R7 R8 :=000001BF 20
0175FA 1583 37211 CLR R8,R3 != 21
0175FC 4780 C068 17610 37212 BE T972BAD 22
017600 06FB 37213 BCTR R15,R11
37214 TSIMRET
017602 58F0 C070 17618 37215+ L R15,=A(SAVETST) R15 := current save area
017606 58DF 0004 00004 37216+ L R13,4(R15) get old save area back
01760A 98EC D00C 0000C 37217+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01760E 07FE 37218+ BR 14 RETURN 02000000
37219 *
017610 37220 DS 0H
37221 T972BAD ABEND 60
017610 37222+T972BAD DS 0H 00400002
017610 4110 003C 0003C 37223+ LA 1,60 LOAD PARAMETER REG 1 01900002
017614 0A0D 37224+ SVC 13 LINK TO ABEND ROUTINE 02050002
37225 TSIMEND
017618 37226+ LTORG
017618 00000458 37227 =A(SAVETST)
1761C 37228+T972TEND EQU *
37229 *
37230 * Test 973 -- Mix Int RR 1st 23 ----------------------------
37231 *
37232 TSIMBEG T973,35000,1,1,C'T700 1st 23',DIS=1
37233+*
004784 37234+TDSCDAT CSECT
004788 37235+ DS 0D
37236+*
004788 00017620 37237+T973TDSC DC A(T973) // TENTRY
PAGE 680
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00478C 0000007C 37238+ DC A(T973TEND-T973) // TLENGTH
004790 000088B8 37239+ DC F'35000' // TLRCNT
004794 00000001 37240+ DC F'1' // TIGCNT
004798 00000001 37241+ DC F'1' // TLTYPE
0020BD 37242+TEXT CSECT
0020BD E3F9F7F3 37243+SPTR3470 DC C'T973'
00479C 37244+TDSCDAT CSECT
00479C 37245+ DS 0F
00479C 040020BD 37246+ DC AL1(L'SPTR3470),AL3(SPTR3470)
0020C1 37247+TEXT CSECT
0020C1 E3F7F0F040F1A2A3 37248+SPTR3471 DC C'T700 1st 23'
0047A0 37249+TDSCDAT CSECT
0047A0 37250+ DS 0F
0047A0 0B0020C1 37251+ DC AL1(L'SPTR3471),AL3(SPTR3471)
37252+*
004E1C 37253+TDSCTBL CSECT
04E1C 37254+T973TPTR EQU *
004E1C 01004788 37255+ DC X'01',AL3(T973TDSC) disabled test
37256+*
01761C 37257+TCODE CSECT
017620 37258+ DS 0D ensure double word alignment for test
017620 37259+T973 DS 0H 01650000
017620 90EC D00C 0000C 37260+ STM 14,12,12(13) SAVE REGISTERS 02950000
017624 18CF 37261+ LR R12,R15 base register := entry address
17620 37262+ USING T973,R12 declare code base register
017626 41B0 C01E 1763E 37263+ LA R11,T973L load loop target to R11
01762A 58F0 C078 17698 37264+ L R15,=A(SAVETST) R15 := current save area
01762E 50DF 0004 00004 37265+ ST R13,4(R15) set back pointer in current save area
017632 182D 37266+ LR R2,R13 remember callers save area
017634 18DF 37267+ LR R13,R15 setup current save area
017636 50D2 0008 00008 37268+ ST R13,8(R2) set forw pointer in callers save area
00000 37269+ USING TDSC,R1 declare TDSC base register
01763A 58F0 1008 00008 37270+ L R15,TLRCNT load local repeat count to R15
37271+*
37272 *
1763E 37273 T973L EQU *
01763E 4120 0001 00001 37274 LA R2,1 R2 :=00000001 FIN 01
017642 1832 37275 LR R3,R2 R3 :=00000001 02
017644 8B30 0008 00008 37276 SLA R3,8 R3 :=00000100 FIN 03
017648 1744 37277 XR R4,R4 R4 :=00000000 04
01764A 1643 37278 OR R4,R3 R4 :=00000100 05
01764C 0640 37279 BCTR R4,0 R4 :=000000FF FIN 06
01764E 1354 37280 LCR R5,R4 R5 :=FFFFFF01 07
017650 8950 0002 00002 37281 SLL R5,2 R5 :=FFFFFC04 FIN 08
017654 1065 37282 LPR R6,R5 R6 :=000003FC 09
017656 1A61 37283 AR R6,R1 R6 :=000003FD 10
017658 1961 37284 CR R6,R1 != 11
01765A 4780 C06C 1768C 37285 BE T973BAD 12
01765E 1173 37286 LNR R7,R3 R7 :=FFFFFF00 13
017660 1476 37287 NR R7,R6 R7 :=00000300 14
017662 8A70 0002 00002 37288 SRA R7,2 R7 :=000000C0 15
017666 1B74 37289 SR R7,R4 R7 :=FFFFFFC1 16
017668 1283 37290 LTR R8,R3 R8 :=00000100 17
01766A 8880 0001 00001 37291 SRL R8,1 R8 :=00000080 18
01766E 1E83 37292 ALR R8,R3 R8 :=00000180 19
PAGE 681
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017670 1F87 37293 SLR R8,R7 R8 :=000001BF 20
017672 1583 37294 CLR R8,R3 != 21
017674 4780 C06C 1768C 37295 BE T973BAD 22
017678 4190 025A 0025A 37296 LA R9,602 R9 :=0000025A 23
01767C 06FB 37297 BCTR R15,R11
37298 TSIMRET
01767E 58F0 C078 17698 37299+ L R15,=A(SAVETST) R15 := current save area
017682 58DF 0004 00004 37300+ L R13,4(R15) get old save area back
017686 98EC D00C 0000C 37301+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01768A 07FE 37302+ BR 14 RETURN 02000000
37303 *
01768C 37304 DS 0H
37305 T973BAD ABEND 60
01768C 37306+T973BAD DS 0H 00400002
01768C 4110 003C 0003C 37307+ LA 1,60 LOAD PARAMETER REG 1 01900002
017690 0A0D 37308+ SVC 13 LINK TO ABEND ROUTINE 02050002
37309 TSIMEND
017698 37310+ LTORG
017698 00000458 37311 =A(SAVETST)
1769C 37312+T973TEND EQU *
37313 *
37314 * Test 974 -- Mix Int RR 1st 24 ----------------------------
37315 *
37316 TSIMBEG T974,30000,1,1,C'T700 1st 24',DIS=1
37317+*
0047A4 37318+TDSCDAT CSECT
0047A8 37319+ DS 0D
37320+*
0047A8 000176A0 37321+T974TDSC DC A(T974) // TENTRY
0047AC 0000007C 37322+ DC A(T974TEND-T974) // TLENGTH
0047B0 00007530 37323+ DC F'30000' // TLRCNT
0047B4 00000001 37324+ DC F'1' // TIGCNT
0047B8 00000001 37325+ DC F'1' // TLTYPE
0020CC 37326+TEXT CSECT
0020CC E3F9F7F4 37327+SPTR3481 DC C'T974'
0047BC 37328+TDSCDAT CSECT
0047BC 37329+ DS 0F
0047BC 040020CC 37330+ DC AL1(L'SPTR3481),AL3(SPTR3481)
0020D0 37331+TEXT CSECT
0020D0 E3F7F0F040F1A2A3 37332+SPTR3482 DC C'T700 1st 24'
0047C0 37333+TDSCDAT CSECT
0047C0 37334+ DS 0F
0047C0 0B0020D0 37335+ DC AL1(L'SPTR3482),AL3(SPTR3482)
37336+*
004E20 37337+TDSCTBL CSECT
04E20 37338+T974TPTR EQU *
004E20 010047A8 37339+ DC X'01',AL3(T974TDSC) disabled test
37340+*
01769C 37341+TCODE CSECT
0176A0 37342+ DS 0D ensure double word alignment for test
0176A0 37343+T974 DS 0H 01650000
0176A0 90EC D00C 0000C 37344+ STM 14,12,12(13) SAVE REGISTERS 02950000
0176A4 18CF 37345+ LR R12,R15 base register := entry address
176A0 37346+ USING T974,R12 declare code base register
0176A6 41B0 C01E 176BE 37347+ LA R11,T974L load loop target to R11
PAGE 682
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0176AA 58F0 C078 17718 37348+ L R15,=A(SAVETST) R15 := current save area
0176AE 50DF 0004 00004 37349+ ST R13,4(R15) set back pointer in current save area
0176B2 182D 37350+ LR R2,R13 remember callers save area
0176B4 18DF 37351+ LR R13,R15 setup current save area
0176B6 50D2 0008 00008 37352+ ST R13,8(R2) set forw pointer in callers save area
00000 37353+ USING TDSC,R1 declare TDSC base register
0176BA 58F0 1008 00008 37354+ L R15,TLRCNT load local repeat count to R15
37355+*
37356 *
176BE 37357 T974L EQU *
0176BE 4120 0001 00001 37358 LA R2,1 R2 :=00000001 FIN 01
0176C2 1832 37359 LR R3,R2 R3 :=00000001 02
0176C4 8B30 0008 00008 37360 SLA R3,8 R3 :=00000100 FIN 03
0176C8 1744 37361 XR R4,R4 R4 :=00000000 04
0176CA 1643 37362 OR R4,R3 R4 :=00000100 05
0176CC 0640 37363 BCTR R4,0 R4 :=000000FF FIN 06
0176CE 1354 37364 LCR R5,R4 R5 :=FFFFFF01 07
0176D0 8950 0002 00002 37365 SLL R5,2 R5 :=FFFFFC04 FIN 08
0176D4 1065 37366 LPR R6,R5 R6 :=000003FC 09
0176D6 1A61 37367 AR R6,R1 R6 :=000003FD 10
0176D8 1961 37368 CR R6,R1 != 11
0176DA 4780 C06E 1770E 37369 BE T974BAD 12
0176DE 1173 37370 LNR R7,R3 R7 :=FFFFFF00 13
0176E0 1476 37371 NR R7,R6 R7 :=00000300 14
0176E2 8A70 0002 00002 37372 SRA R7,2 R7 :=000000C0 15
0176E6 1B74 37373 SR R7,R4 R7 :=FFFFFFC1 16
0176E8 1283 37374 LTR R8,R3 R8 :=00000100 17
0176EA 8880 0001 00001 37375 SRL R8,1 R8 :=00000080 18
0176EE 1E83 37376 ALR R8,R3 R8 :=00000180 19
0176F0 1F87 37377 SLR R8,R7 R8 :=000001BF 20
0176F2 1583 37378 CLR R8,R3 != 21
0176F4 4780 C06E 1770E 37379 BE T974BAD 22
0176F8 4190 025A 0025A 37380 LA R9,602 R9 :=0000025A 23
0176FC 1794 37381 XR R9,R4 R9 :=000002A5 FIN 24
0176FE 06FB 37382 BCTR R15,R11
37383 TSIMRET
017700 58F0 C078 17718 37384+ L R15,=A(SAVETST) R15 := current save area
017704 58DF 0004 00004 37385+ L R13,4(R15) get old save area back
017708 98EC D00C 0000C 37386+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01770C 07FE 37387+ BR 14 RETURN 02000000
37388 *
01770E 37389 DS 0H
37390 T974BAD ABEND 60
01770E 37391+T974BAD DS 0H 00400002
01770E 4110 003C 0003C 37392+ LA 1,60 LOAD PARAMETER REG 1 01900002
017712 0A0D 37393+ SVC 13 LINK TO ABEND ROUTINE 02050002
37394 TSIMEND
017718 37395+ LTORG
017718 00000458 37396 =A(SAVETST)
1771C 37397+T974TEND EQU *
37398 *
37399 * Test 975 -- Mix Int RR 1st 25 ----------------------------
37400 *
37401 TSIMBEG T975,30000,1,1,C'T700 1st 25',DIS=1
37402+*
PAGE 683
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0047C4 37403+TDSCDAT CSECT
0047C8 37404+ DS 0D
37405+*
0047C8 00017720 37406+T975TDSC DC A(T975) // TENTRY
0047CC 0000007C 37407+ DC A(T975TEND-T975) // TLENGTH
0047D0 00007530 37408+ DC F'30000' // TLRCNT
0047D4 00000001 37409+ DC F'1' // TIGCNT
0047D8 00000001 37410+ DC F'1' // TLTYPE
0020DB 37411+TEXT CSECT
0020DB E3F9F7F5 37412+SPTR3492 DC C'T975'
0047DC 37413+TDSCDAT CSECT
0047DC 37414+ DS 0F
0047DC 040020DB 37415+ DC AL1(L'SPTR3492),AL3(SPTR3492)
0020DF 37416+TEXT CSECT
0020DF E3F7F0F040F1A2A3 37417+SPTR3493 DC C'T700 1st 25'
0047E0 37418+TDSCDAT CSECT
0047E0 37419+ DS 0F
0047E0 0B0020DF 37420+ DC AL1(L'SPTR3493),AL3(SPTR3493)
37421+*
004E24 37422+TDSCTBL CSECT
04E24 37423+T975TPTR EQU *
004E24 010047C8 37424+ DC X'01',AL3(T975TDSC) disabled test
37425+*
01771C 37426+TCODE CSECT
017720 37427+ DS 0D ensure double word alignment for test
017720 37428+T975 DS 0H 01650000
017720 90EC D00C 0000C 37429+ STM 14,12,12(13) SAVE REGISTERS 02950000
017724 18CF 37430+ LR R12,R15 base register := entry address
17720 37431+ USING T975,R12 declare code base register
017726 41B0 C01E 1773E 37432+ LA R11,T975L load loop target to R11
01772A 58F0 C078 17798 37433+ L R15,=A(SAVETST) R15 := current save area
01772E 50DF 0004 00004 37434+ ST R13,4(R15) set back pointer in current save area
017732 182D 37435+ LR R2,R13 remember callers save area
017734 18DF 37436+ LR R13,R15 setup current save area
017736 50D2 0008 00008 37437+ ST R13,8(R2) set forw pointer in callers save area
00000 37438+ USING TDSC,R1 declare TDSC base register
01773A 58F0 1008 00008 37439+ L R15,TLRCNT load local repeat count to R15
37440+*
37441 *
1773E 37442 T975L EQU *
01773E 4120 0001 00001 37443 LA R2,1 R2 :=00000001 FIN 01
017742 1832 37444 LR R3,R2 R3 :=00000001 02
017744 8B30 0008 00008 37445 SLA R3,8 R3 :=00000100 FIN 03
017748 1744 37446 XR R4,R4 R4 :=00000000 04
01774A 1643 37447 OR R4,R3 R4 :=00000100 05
01774C 0640 37448 BCTR R4,0 R4 :=000000FF FIN 06
01774E 1354 37449 LCR R5,R4 R5 :=FFFFFF01 07
017750 8950 0002 00002 37450 SLL R5,2 R5 :=FFFFFC04 FIN 08
017754 1065 37451 LPR R6,R5 R6 :=000003FC 09
017756 1A61 37452 AR R6,R1 R6 :=000003FD 10
017758 1961 37453 CR R6,R1 != 11
01775A 4780 C070 17790 37454 BE T975BAD 12
01775E 1173 37455 LNR R7,R3 R7 :=FFFFFF00 13
017760 1476 37456 NR R7,R6 R7 :=00000300 14
017762 8A70 0002 00002 37457 SRA R7,2 R7 :=000000C0 15
PAGE 684
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017766 1B74 37458 SR R7,R4 R7 :=FFFFFFC1 16
017768 1283 37459 LTR R8,R3 R8 :=00000100 17
01776A 8880 0001 00001 37460 SRL R8,1 R8 :=00000080 18
01776E 1E83 37461 ALR R8,R3 R8 :=00000180 19
017770 1F87 37462 SLR R8,R7 R8 :=000001BF 20
017772 1583 37463 CLR R8,R3 != 21
017774 4780 C070 17790 37464 BE T975BAD 22
017778 4190 025A 0025A 37465 LA R9,602 R9 :=0000025A 23
01777C 1794 37466 XR R9,R4 R9 :=000002A5 FIN 24
01777E 12A9 37467 LTR R10,R9 R10:=000002A5 25
017780 06FB 37468 BCTR R15,R11
37469 TSIMRET
017782 58F0 C078 17798 37470+ L R15,=A(SAVETST) R15 := current save area
017786 58DF 0004 00004 37471+ L R13,4(R15) get old save area back
01778A 98EC D00C 0000C 37472+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01778E 07FE 37473+ BR 14 RETURN 02000000
37474 *
017790 37475 DS 0H
37476 T975BAD ABEND 60
017790 37477+T975BAD DS 0H 00400002
017790 4110 003C 0003C 37478+ LA 1,60 LOAD PARAMETER REG 1 01900002
017794 0A0D 37479+ SVC 13 LINK TO ABEND ROUTINE 02050002
37480 TSIMEND
017798 37481+ LTORG
017798 00000458 37482 =A(SAVETST)
1779C 37483+T975TEND EQU *
37484 *
37485 * Test 976 -- Mix Int RR 1st 26 ----------------------------
37486 *
37487 TSIMBEG T976,30000,1,1,C'T700 1st 26',DIS=1
37488+*
0047E4 37489+TDSCDAT CSECT
0047E8 37490+ DS 0D
37491+*
0047E8 000177A0 37492+T976TDSC DC A(T976) // TENTRY
0047EC 0000007C 37493+ DC A(T976TEND-T976) // TLENGTH
0047F0 00007530 37494+ DC F'30000' // TLRCNT
0047F4 00000001 37495+ DC F'1' // TIGCNT
0047F8 00000001 37496+ DC F'1' // TLTYPE
0020EA 37497+TEXT CSECT
0020EA E3F9F7F6 37498+SPTR3503 DC C'T976'
0047FC 37499+TDSCDAT CSECT
0047FC 37500+ DS 0F
0047FC 040020EA 37501+ DC AL1(L'SPTR3503),AL3(SPTR3503)
0020EE 37502+TEXT CSECT
0020EE E3F7F0F040F1A2A3 37503+SPTR3504 DC C'T700 1st 26'
004800 37504+TDSCDAT CSECT
004800 37505+ DS 0F
004800 0B0020EE 37506+ DC AL1(L'SPTR3504),AL3(SPTR3504)
37507+*
004E28 37508+TDSCTBL CSECT
04E28 37509+T976TPTR EQU *
004E28 010047E8 37510+ DC X'01',AL3(T976TDSC) disabled test
37511+*
01779C 37512+TCODE CSECT
PAGE 685
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0177A0 37513+ DS 0D ensure double word alignment for test
0177A0 37514+T976 DS 0H 01650000
0177A0 90EC D00C 0000C 37515+ STM 14,12,12(13) SAVE REGISTERS 02950000
0177A4 18CF 37516+ LR R12,R15 base register := entry address
177A0 37517+ USING T976,R12 declare code base register
0177A6 41B0 C01E 177BE 37518+ LA R11,T976L load loop target to R11
0177AA 58F0 C078 17818 37519+ L R15,=A(SAVETST) R15 := current save area
0177AE 50DF 0004 00004 37520+ ST R13,4(R15) set back pointer in current save area
0177B2 182D 37521+ LR R2,R13 remember callers save area
0177B4 18DF 37522+ LR R13,R15 setup current save area
0177B6 50D2 0008 00008 37523+ ST R13,8(R2) set forw pointer in callers save area
00000 37524+ USING TDSC,R1 declare TDSC base register
0177BA 58F0 1008 00008 37525+ L R15,TLRCNT load local repeat count to R15
37526+*
37527 *
177BE 37528 T976L EQU *
0177BE 4120 0001 00001 37529 LA R2,1 R2 :=00000001 FIN 01
0177C2 1832 37530 LR R3,R2 R3 :=00000001 02
0177C4 8B30 0008 00008 37531 SLA R3,8 R3 :=00000100 FIN 03
0177C8 1744 37532 XR R4,R4 R4 :=00000000 04
0177CA 1643 37533 OR R4,R3 R4 :=00000100 05
0177CC 0640 37534 BCTR R4,0 R4 :=000000FF FIN 06
0177CE 1354 37535 LCR R5,R4 R5 :=FFFFFF01 07
0177D0 8950 0002 00002 37536 SLL R5,2 R5 :=FFFFFC04 FIN 08
0177D4 1065 37537 LPR R6,R5 R6 :=000003FC 09
0177D6 1A61 37538 AR R6,R1 R6 :=000003FD 10
0177D8 1961 37539 CR R6,R1 != 11
0177DA 4780 C072 17812 37540 BE T976BAD 12
0177DE 1173 37541 LNR R7,R3 R7 :=FFFFFF00 13
0177E0 1476 37542 NR R7,R6 R7 :=00000300 14
0177E2 8A70 0002 00002 37543 SRA R7,2 R7 :=000000C0 15
0177E6 1B74 37544 SR R7,R4 R7 :=FFFFFFC1 16
0177E8 1283 37545 LTR R8,R3 R8 :=00000100 17
0177EA 8880 0001 00001 37546 SRL R8,1 R8 :=00000080 18
0177EE 1E83 37547 ALR R8,R3 R8 :=00000180 19
0177F0 1F87 37548 SLR R8,R7 R8 :=000001BF 20
0177F2 1583 37549 CLR R8,R3 != 21
0177F4 4780 C072 17812 37550 BE T976BAD 22
0177F8 4190 025A 0025A 37551 LA R9,602 R9 :=0000025A 23
0177FC 1794 37552 XR R9,R4 R9 :=000002A5 FIN 24
0177FE 12A9 37553 LTR R10,R9 R10:=000002A5 25
017800 1AA9 37554 AR R10,R9 R10:=000004FF 26
017802 06FB 37555 BCTR R15,R11
37556 TSIMRET
017804 58F0 C078 17818 37557+ L R15,=A(SAVETST) R15 := current save area
017808 58DF 0004 00004 37558+ L R13,4(R15) get old save area back
01780C 98EC D00C 0000C 37559+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017810 07FE 37560+ BR 14 RETURN 02000000
37561 *
017812 37562 DS 0H
37563 T976BAD ABEND 60
017812 37564+T976BAD DS 0H 00400002
017812 4110 003C 0003C 37565+ LA 1,60 LOAD PARAMETER REG 1 01900002
017816 0A0D 37566+ SVC 13 LINK TO ABEND ROUTINE 02050002
37567 TSIMEND
PAGE 686
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017818 37568+ LTORG
017818 00000458 37569 =A(SAVETST)
1781C 37570+T976TEND EQU *
37571 *
37572 * Test 977 -- Mix Int RR 1st 27 ----------------------------
37573 *
37574 TSIMBEG T977,30000,1,1,C'T700 1st 27',DIS=1
37575+*
004804 37576+TDSCDAT CSECT
004808 37577+ DS 0D
37578+*
004808 00017820 37579+T977TDSC DC A(T977) // TENTRY
00480C 00000084 37580+ DC A(T977TEND-T977) // TLENGTH
004810 00007530 37581+ DC F'30000' // TLRCNT
004814 00000001 37582+ DC F'1' // TIGCNT
004818 00000001 37583+ DC F'1' // TLTYPE
0020F9 37584+TEXT CSECT
0020F9 E3F9F7F7 37585+SPTR3514 DC C'T977'
00481C 37586+TDSCDAT CSECT
00481C 37587+ DS 0F
00481C 040020F9 37588+ DC AL1(L'SPTR3514),AL3(SPTR3514)
0020FD 37589+TEXT CSECT
0020FD E3F7F0F040F1A2A3 37590+SPTR3515 DC C'T700 1st 27'
004820 37591+TDSCDAT CSECT
004820 37592+ DS 0F
004820 0B0020FD 37593+ DC AL1(L'SPTR3515),AL3(SPTR3515)
37594+*
004E2C 37595+TDSCTBL CSECT
04E2C 37596+T977TPTR EQU *
004E2C 01004808 37597+ DC X'01',AL3(T977TDSC) disabled test
37598+*
01781C 37599+TCODE CSECT
017820 37600+ DS 0D ensure double word alignment for test
017820 37601+T977 DS 0H 01650000
017820 90EC D00C 0000C 37602+ STM 14,12,12(13) SAVE REGISTERS 02950000
017824 18CF 37603+ LR R12,R15 base register := entry address
17820 37604+ USING T977,R12 declare code base register
017826 41B0 C01E 1783E 37605+ LA R11,T977L load loop target to R11
01782A 58F0 C080 178A0 37606+ L R15,=A(SAVETST) R15 := current save area
01782E 50DF 0004 00004 37607+ ST R13,4(R15) set back pointer in current save area
017832 182D 37608+ LR R2,R13 remember callers save area
017834 18DF 37609+ LR R13,R15 setup current save area
017836 50D2 0008 00008 37610+ ST R13,8(R2) set forw pointer in callers save area
00000 37611+ USING TDSC,R1 declare TDSC base register
01783A 58F0 1008 00008 37612+ L R15,TLRCNT load local repeat count to R15
37613+*
37614 *
1783E 37615 T977L EQU *
01783E 4120 0001 00001 37616 LA R2,1 R2 :=00000001 FIN 01
017842 1832 37617 LR R3,R2 R3 :=00000001 02
017844 8B30 0008 00008 37618 SLA R3,8 R3 :=00000100 FIN 03
017848 1744 37619 XR R4,R4 R4 :=00000000 04
01784A 1643 37620 OR R4,R3 R4 :=00000100 05
01784C 0640 37621 BCTR R4,0 R4 :=000000FF FIN 06
01784E 1354 37622 LCR R5,R4 R5 :=FFFFFF01 07
PAGE 687
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017850 8950 0002 00002 37623 SLL R5,2 R5 :=FFFFFC04 FIN 08
017854 1065 37624 LPR R6,R5 R6 :=000003FC 09
017856 1A61 37625 AR R6,R1 R6 :=000003FD 10
017858 1961 37626 CR R6,R1 != 11
01785A 4780 C074 17894 37627 BE T977BAD 12
01785E 1173 37628 LNR R7,R3 R7 :=FFFFFF00 13
017860 1476 37629 NR R7,R6 R7 :=00000300 14
017862 8A70 0002 00002 37630 SRA R7,2 R7 :=000000C0 15
017866 1B74 37631 SR R7,R4 R7 :=FFFFFFC1 16
017868 1283 37632 LTR R8,R3 R8 :=00000100 17
01786A 8880 0001 00001 37633 SRL R8,1 R8 :=00000080 18
01786E 1E83 37634 ALR R8,R3 R8 :=00000180 19
017870 1F87 37635 SLR R8,R7 R8 :=000001BF 20
017872 1583 37636 CLR R8,R3 != 21
017874 4780 C074 17894 37637 BE T977BAD 22
017878 4190 025A 0025A 37638 LA R9,602 R9 :=0000025A 23
01787C 1794 37639 XR R9,R4 R9 :=000002A5 FIN 24
01787E 12A9 37640 LTR R10,R9 R10:=000002A5 25
017880 1AA9 37641 AR R10,R9 R10:=000004FF 26
017882 16A5 37642 OR R10,R5 R10:=FFFFFCFF 27
017884 06FB 37643 BCTR R15,R11
37644 TSIMRET
017886 58F0 C080 178A0 37645+ L R15,=A(SAVETST) R15 := current save area
01788A 58DF 0004 00004 37646+ L R13,4(R15) get old save area back
01788E 98EC D00C 0000C 37647+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017892 07FE 37648+ BR 14 RETURN 02000000
37649 *
017894 37650 DS 0H
37651 T977BAD ABEND 60
017894 37652+T977BAD DS 0H 00400002
017894 4110 003C 0003C 37653+ LA 1,60 LOAD PARAMETER REG 1 01900002
017898 0A0D 37654+ SVC 13 LINK TO ABEND ROUTINE 02050002
37655 TSIMEND
0178A0 37656+ LTORG
0178A0 00000458 37657 =A(SAVETST)
178A4 37658+T977TEND EQU *
37659 *
37660 * Test 978 -- Mix Int RR 1st 28 ----------------------------
37661 *
37662 TSIMBEG T978,30000,1,1,C'T700 1st 28',DIS=1
37663+*
004824 37664+TDSCDAT CSECT
004828 37665+ DS 0D
37666+*
004828 000178A8 37667+T978TDSC DC A(T978) // TENTRY
00482C 00000084 37668+ DC A(T978TEND-T978) // TLENGTH
004830 00007530 37669+ DC F'30000' // TLRCNT
004834 00000001 37670+ DC F'1' // TIGCNT
004838 00000001 37671+ DC F'1' // TLTYPE
002108 37672+TEXT CSECT
002108 E3F9F7F8 37673+SPTR3525 DC C'T978'
00483C 37674+TDSCDAT CSECT
00483C 37675+ DS 0F
00483C 04002108 37676+ DC AL1(L'SPTR3525),AL3(SPTR3525)
00210C 37677+TEXT CSECT
PAGE 688
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00210C E3F7F0F040F1A2A3 37678+SPTR3526 DC C'T700 1st 28'
004840 37679+TDSCDAT CSECT
004840 37680+ DS 0F
004840 0B00210C 37681+ DC AL1(L'SPTR3526),AL3(SPTR3526)
37682+*
004E30 37683+TDSCTBL CSECT
04E30 37684+T978TPTR EQU *
004E30 01004828 37685+ DC X'01',AL3(T978TDSC) disabled test
37686+*
0178A4 37687+TCODE CSECT
0178A8 37688+ DS 0D ensure double word alignment for test
0178A8 37689+T978 DS 0H 01650000
0178A8 90EC D00C 0000C 37690+ STM 14,12,12(13) SAVE REGISTERS 02950000
0178AC 18CF 37691+ LR R12,R15 base register := entry address
178A8 37692+ USING T978,R12 declare code base register
0178AE 41B0 C01E 178C6 37693+ LA R11,T978L load loop target to R11
0178B2 58F0 C080 17928 37694+ L R15,=A(SAVETST) R15 := current save area
0178B6 50DF 0004 00004 37695+ ST R13,4(R15) set back pointer in current save area
0178BA 182D 37696+ LR R2,R13 remember callers save area
0178BC 18DF 37697+ LR R13,R15 setup current save area
0178BE 50D2 0008 00008 37698+ ST R13,8(R2) set forw pointer in callers save area
00000 37699+ USING TDSC,R1 declare TDSC base register
0178C2 58F0 1008 00008 37700+ L R15,TLRCNT load local repeat count to R15
37701+*
37702 *
178C6 37703 T978L EQU *
0178C6 4120 0001 00001 37704 LA R2,1 R2 :=00000001 FIN 01
0178CA 1832 37705 LR R3,R2 R3 :=00000001 02
0178CC 8B30 0008 00008 37706 SLA R3,8 R3 :=00000100 FIN 03
0178D0 1744 37707 XR R4,R4 R4 :=00000000 04
0178D2 1643 37708 OR R4,R3 R4 :=00000100 05
0178D4 0640 37709 BCTR R4,0 R4 :=000000FF FIN 06
0178D6 1354 37710 LCR R5,R4 R5 :=FFFFFF01 07
0178D8 8950 0002 00002 37711 SLL R5,2 R5 :=FFFFFC04 FIN 08
0178DC 1065 37712 LPR R6,R5 R6 :=000003FC 09
0178DE 1A61 37713 AR R6,R1 R6 :=000003FD 10
0178E0 1961 37714 CR R6,R1 != 11
0178E2 4780 C076 1791E 37715 BE T978BAD 12
0178E6 1173 37716 LNR R7,R3 R7 :=FFFFFF00 13
0178E8 1476 37717 NR R7,R6 R7 :=00000300 14
0178EA 8A70 0002 00002 37718 SRA R7,2 R7 :=000000C0 15
0178EE 1B74 37719 SR R7,R4 R7 :=FFFFFFC1 16
0178F0 1283 37720 LTR R8,R3 R8 :=00000100 17
0178F2 8880 0001 00001 37721 SRL R8,1 R8 :=00000080 18
0178F6 1E83 37722 ALR R8,R3 R8 :=00000180 19
0178F8 1F87 37723 SLR R8,R7 R8 :=000001BF 20
0178FA 1583 37724 CLR R8,R3 != 21
0178FC 4780 C076 1791E 37725 BE T978BAD 22
017900 4190 025A 0025A 37726 LA R9,602 R9 :=0000025A 23
017904 1794 37727 XR R9,R4 R9 :=000002A5 FIN 24
017906 12A9 37728 LTR R10,R9 R10:=000002A5 25
017908 1AA9 37729 AR R10,R9 R10:=000004FF 26
01790A 16A5 37730 OR R10,R5 R10:=FFFFFCFF 27
01790C 106A 37731 LPR R6,R10 R6 :=00000301 28
01790E 06FB 37732 BCTR R15,R11
PAGE 689
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
37733 TSIMRET
017910 58F0 C080 17928 37734+ L R15,=A(SAVETST) R15 := current save area
017914 58DF 0004 00004 37735+ L R13,4(R15) get old save area back
017918 98EC D00C 0000C 37736+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
01791C 07FE 37737+ BR 14 RETURN 02000000
37738 *
01791E 37739 DS 0H
37740 T978BAD ABEND 60
01791E 37741+T978BAD DS 0H 00400002
01791E 4110 003C 0003C 37742+ LA 1,60 LOAD PARAMETER REG 1 01900002
017922 0A0D 37743+ SVC 13 LINK TO ABEND ROUTINE 02050002
37744 TSIMEND
017928 37745+ LTORG
017928 00000458 37746 =A(SAVETST)
1792C 37747+T978TEND EQU *
37748 *
37749 * Test 979 -- Mix Int RR 1st 29 ----------------------------
37750 *
37751 TSIMBEG T979,25000,1,1,C'T700 1st 29',DIS=1
37752+*
004844 37753+TDSCDAT CSECT
004848 37754+ DS 0D
37755+*
004848 00017930 37756+T979TDSC DC A(T979) // TENTRY
00484C 00000084 37757+ DC A(T979TEND-T979) // TLENGTH
004850 000061A8 37758+ DC F'25000' // TLRCNT
004854 00000001 37759+ DC F'1' // TIGCNT
004858 00000001 37760+ DC F'1' // TLTYPE
002117 37761+TEXT CSECT
002117 E3F9F7F9 37762+SPTR3536 DC C'T979'
00485C 37763+TDSCDAT CSECT
00485C 37764+ DS 0F
00485C 04002117 37765+ DC AL1(L'SPTR3536),AL3(SPTR3536)
00211B 37766+TEXT CSECT
00211B E3F7F0F040F1A2A3 37767+SPTR3537 DC C'T700 1st 29'
004860 37768+TDSCDAT CSECT
004860 37769+ DS 0F
004860 0B00211B 37770+ DC AL1(L'SPTR3537),AL3(SPTR3537)
37771+*
004E34 37772+TDSCTBL CSECT
04E34 37773+T979TPTR EQU *
004E34 01004848 37774+ DC X'01',AL3(T979TDSC) disabled test
37775+*
01792C 37776+TCODE CSECT
017930 37777+ DS 0D ensure double word alignment for test
017930 37778+T979 DS 0H 01650000
017930 90EC D00C 0000C 37779+ STM 14,12,12(13) SAVE REGISTERS 02950000
017934 18CF 37780+ LR R12,R15 base register := entry address
17930 37781+ USING T979,R12 declare code base register
017936 41B0 C01E 1794E 37782+ LA R11,T979L load loop target to R11
01793A 58F0 C080 179B0 37783+ L R15,=A(SAVETST) R15 := current save area
01793E 50DF 0004 00004 37784+ ST R13,4(R15) set back pointer in current save area
017942 182D 37785+ LR R2,R13 remember callers save area
017944 18DF 37786+ LR R13,R15 setup current save area
017946 50D2 0008 00008 37787+ ST R13,8(R2) set forw pointer in callers save area
PAGE 690
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00000 37788+ USING TDSC,R1 declare TDSC base register
01794A 58F0 1008 00008 37789+ L R15,TLRCNT load local repeat count to R15
37790+*
37791 *
1794E 37792 T979L EQU *
01794E 4120 0001 00001 37793 LA R2,1 R2 :=00000001 FIN 01
017952 1832 37794 LR R3,R2 R3 :=00000001 02
017954 8B30 0008 00008 37795 SLA R3,8 R3 :=00000100 FIN 03
017958 1744 37796 XR R4,R4 R4 :=00000000 04
01795A 1643 37797 OR R4,R3 R4 :=00000100 05
01795C 0640 37798 BCTR R4,0 R4 :=000000FF FIN 06
01795E 1354 37799 LCR R5,R4 R5 :=FFFFFF01 07
017960 8950 0002 00002 37800 SLL R5,2 R5 :=FFFFFC04 FIN 08
017964 1065 37801 LPR R6,R5 R6 :=000003FC 09
017966 1A61 37802 AR R6,R1 R6 :=000003FD 10
017968 1961 37803 CR R6,R1 != 11
01796A 4780 C078 179A8 37804 BE T979BAD 12
01796E 1173 37805 LNR R7,R3 R7 :=FFFFFF00 13
017970 1476 37806 NR R7,R6 R7 :=00000300 14
017972 8A70 0002 00002 37807 SRA R7,2 R7 :=000000C0 15
017976 1B74 37808 SR R7,R4 R7 :=FFFFFFC1 16
017978 1283 37809 LTR R8,R3 R8 :=00000100 17
01797A 8880 0001 00001 37810 SRL R8,1 R8 :=00000080 18
01797E 1E83 37811 ALR R8,R3 R8 :=00000180 19
017980 1F87 37812 SLR R8,R7 R8 :=000001BF 20
017982 1583 37813 CLR R8,R3 != 21
017984 4780 C078 179A8 37814 BE T979BAD 22
017988 4190 025A 0025A 37815 LA R9,602 R9 :=0000025A 23
01798C 1794 37816 XR R9,R4 R9 :=000002A5 FIN 24
01798E 12A9 37817 LTR R10,R9 R10:=000002A5 25
017990 1AA9 37818 AR R10,R9 R10:=000004FF 26
017992 16A5 37819 OR R10,R5 R10:=FFFFFCFF 27
017994 106A 37820 LPR R6,R10 R6 :=00000301 28
017996 1E64 37821 ALR R6,R4 R6 :=00000400 29
017998 06FB 37822 BCTR R15,R11
37823 TSIMRET
01799A 58F0 C080 179B0 37824+ L R15,=A(SAVETST) R15 := current save area
01799E 58DF 0004 00004 37825+ L R13,4(R15) get old save area back
0179A2 98EC D00C 0000C 37826+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
0179A6 07FE 37827+ BR 14 RETURN 02000000
37828 *
0179A8 37829 DS 0H
37830 T979BAD ABEND 60
0179A8 37831+T979BAD DS 0H 00400002
0179A8 4110 003C 0003C 37832+ LA 1,60 LOAD PARAMETER REG 1 01900002
0179AC 0A0D 37833+ SVC 13 LINK TO ABEND ROUTINE 02050002
37834 TSIMEND
0179B0 37835+ LTORG
0179B0 00000458 37836 =A(SAVETST)
179B4 37837+T979TEND EQU *
37838 *
37839 * Test 980 -- Mix Int RR 1st 30 ----------------------------
37840 *
37841 TSIMBEG T980,25000,1,1,C'T700 1st 30',DIS=1
37842+*
PAGE 691
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004864 37843+TDSCDAT CSECT
004868 37844+ DS 0D
37845+*
004868 000179B8 37846+T980TDSC DC A(T980) // TENTRY
00486C 0000008C 37847+ DC A(T980TEND-T980) // TLENGTH
004870 000061A8 37848+ DC F'25000' // TLRCNT
004874 00000001 37849+ DC F'1' // TIGCNT
004878 00000001 37850+ DC F'1' // TLTYPE
002126 37851+TEXT CSECT
002126 E3F9F8F0 37852+SPTR3547 DC C'T980'
00487C 37853+TDSCDAT CSECT
00487C 37854+ DS 0F
00487C 04002126 37855+ DC AL1(L'SPTR3547),AL3(SPTR3547)
00212A 37856+TEXT CSECT
00212A E3F7F0F040F1A2A3 37857+SPTR3548 DC C'T700 1st 30'
004880 37858+TDSCDAT CSECT
004880 37859+ DS 0F
004880 0B00212A 37860+ DC AL1(L'SPTR3548),AL3(SPTR3548)
37861+*
004E38 37862+TDSCTBL CSECT
04E38 37863+T980TPTR EQU *
004E38 01004868 37864+ DC X'01',AL3(T980TDSC) disabled test
37865+*
0179B4 37866+TCODE CSECT
0179B8 37867+ DS 0D ensure double word alignment for test
0179B8 37868+T980 DS 0H 01650000
0179B8 90EC D00C 0000C 37869+ STM 14,12,12(13) SAVE REGISTERS 02950000
0179BC 18CF 37870+ LR R12,R15 base register := entry address
179B8 37871+ USING T980,R12 declare code base register
0179BE 41B0 C01E 179D6 37872+ LA R11,T980L load loop target to R11
0179C2 58F0 C088 17A40 37873+ L R15,=A(SAVETST) R15 := current save area
0179C6 50DF 0004 00004 37874+ ST R13,4(R15) set back pointer in current save area
0179CA 182D 37875+ LR R2,R13 remember callers save area
0179CC 18DF 37876+ LR R13,R15 setup current save area
0179CE 50D2 0008 00008 37877+ ST R13,8(R2) set forw pointer in callers save area
00000 37878+ USING TDSC,R1 declare TDSC base register
0179D2 58F0 1008 00008 37879+ L R15,TLRCNT load local repeat count to R15
37880+*
37881 *
179D6 37882 T980L EQU *
0179D6 4120 0001 00001 37883 LA R2,1 R2 :=00000001 FIN 01
0179DA 1832 37884 LR R3,R2 R3 :=00000001 02
0179DC 8B30 0008 00008 37885 SLA R3,8 R3 :=00000100 FIN 03
0179E0 1744 37886 XR R4,R4 R4 :=00000000 04
0179E2 1643 37887 OR R4,R3 R4 :=00000100 05
0179E4 0640 37888 BCTR R4,0 R4 :=000000FF FIN 06
0179E6 1354 37889 LCR R5,R4 R5 :=FFFFFF01 07
0179E8 8950 0002 00002 37890 SLL R5,2 R5 :=FFFFFC04 FIN 08
0179EC 1065 37891 LPR R6,R5 R6 :=000003FC 09
0179EE 1A61 37892 AR R6,R1 R6 :=000003FD 10
0179F0 1961 37893 CR R6,R1 != 11
0179F2 4780 C07C 17A34 37894 BE T980BAD 12
0179F6 1173 37895 LNR R7,R3 R7 :=FFFFFF00 13
0179F8 1476 37896 NR R7,R6 R7 :=00000300 14
0179FA 8A70 0002 00002 37897 SRA R7,2 R7 :=000000C0 15
PAGE 692
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0179FE 1B74 37898 SR R7,R4 R7 :=FFFFFFC1 16
017A00 1283 37899 LTR R8,R3 R8 :=00000100 17
017A02 8880 0001 00001 37900 SRL R8,1 R8 :=00000080 18
017A06 1E83 37901 ALR R8,R3 R8 :=00000180 19
017A08 1F87 37902 SLR R8,R7 R8 :=000001BF 20
017A0A 1583 37903 CLR R8,R3 != 21
017A0C 4780 C07C 17A34 37904 BE T980BAD 22
017A10 4190 025A 0025A 37905 LA R9,602 R9 :=0000025A 23
017A14 1794 37906 XR R9,R4 R9 :=000002A5 FIN 24
017A16 12A9 37907 LTR R10,R9 R10:=000002A5 25
017A18 1AA9 37908 AR R10,R9 R10:=000004FF 26
017A1A 16A5 37909 OR R10,R5 R10:=FFFFFCFF 27
017A1C 106A 37910 LPR R6,R10 R6 :=00000301 28
017A1E 1E64 37911 ALR R6,R4 R6 :=00000400 29
017A20 8B60 0001 00001 37912 SLA R6,1 R6 :=00000800 30
017A24 06FB 37913 BCTR R15,R11
37914 TSIMRET
017A26 58F0 C088 17A40 37915+ L R15,=A(SAVETST) R15 := current save area
017A2A 58DF 0004 00004 37916+ L R13,4(R15) get old save area back
017A2E 98EC D00C 0000C 37917+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017A32 07FE 37918+ BR 14 RETURN 02000000
37919 *
017A34 37920 DS 0H
37921 T980BAD ABEND 60
017A34 37922+T980BAD DS 0H 00400002
017A34 4110 003C 0003C 37923+ LA 1,60 LOAD PARAMETER REG 1 01900002
017A38 0A0D 37924+ SVC 13 LINK TO ABEND ROUTINE 02050002
37925 TSIMEND
017A40 37926+ LTORG
017A40 00000458 37927 =A(SAVETST)
17A44 37928+T980TEND EQU *
37929 *
37930 * Test 981 -- Mix Int RR 1st 31 ----------------------------
37931 *
37932 TSIMBEG T981,25000,1,1,C'T700 1st 31',DIS=1
37933+*
004884 37934+TDSCDAT CSECT
004888 37935+ DS 0D
37936+*
004888 00017A48 37937+T981TDSC DC A(T981) // TENTRY
00488C 0000008C 37938+ DC A(T981TEND-T981) // TLENGTH
004890 000061A8 37939+ DC F'25000' // TLRCNT
004894 00000001 37940+ DC F'1' // TIGCNT
004898 00000001 37941+ DC F'1' // TLTYPE
002135 37942+TEXT CSECT
002135 E3F9F8F1 37943+SPTR3558 DC C'T981'
00489C 37944+TDSCDAT CSECT
00489C 37945+ DS 0F
00489C 04002135 37946+ DC AL1(L'SPTR3558),AL3(SPTR3558)
002139 37947+TEXT CSECT
002139 E3F7F0F040F1A2A3 37948+SPTR3559 DC C'T700 1st 31'
0048A0 37949+TDSCDAT CSECT
0048A0 37950+ DS 0F
0048A0 0B002139 37951+ DC AL1(L'SPTR3559),AL3(SPTR3559)
37952+*
PAGE 693
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004E3C 37953+TDSCTBL CSECT
04E3C 37954+T981TPTR EQU *
004E3C 01004888 37955+ DC X'01',AL3(T981TDSC) disabled test
37956+*
017A44 37957+TCODE CSECT
017A48 37958+ DS 0D ensure double word alignment for test
017A48 37959+T981 DS 0H 01650000
017A48 90EC D00C 0000C 37960+ STM 14,12,12(13) SAVE REGISTERS 02950000
017A4C 18CF 37961+ LR R12,R15 base register := entry address
17A48 37962+ USING T981,R12 declare code base register
017A4E 41B0 C01E 17A66 37963+ LA R11,T981L load loop target to R11
017A52 58F0 C088 17AD0 37964+ L R15,=A(SAVETST) R15 := current save area
017A56 50DF 0004 00004 37965+ ST R13,4(R15) set back pointer in current save area
017A5A 182D 37966+ LR R2,R13 remember callers save area
017A5C 18DF 37967+ LR R13,R15 setup current save area
017A5E 50D2 0008 00008 37968+ ST R13,8(R2) set forw pointer in callers save area
00000 37969+ USING TDSC,R1 declare TDSC base register
017A62 58F0 1008 00008 37970+ L R15,TLRCNT load local repeat count to R15
37971+*
37972 *
17A66 37973 T981L EQU *
017A66 4120 0001 00001 37974 LA R2,1 R2 :=00000001 FIN 01
017A6A 1832 37975 LR R3,R2 R3 :=00000001 02
017A6C 8B30 0008 00008 37976 SLA R3,8 R3 :=00000100 FIN 03
017A70 1744 37977 XR R4,R4 R4 :=00000000 04
017A72 1643 37978 OR R4,R3 R4 :=00000100 05
017A74 0640 37979 BCTR R4,0 R4 :=000000FF FIN 06
017A76 1354 37980 LCR R5,R4 R5 :=FFFFFF01 07
017A78 8950 0002 00002 37981 SLL R5,2 R5 :=FFFFFC04 FIN 08
017A7C 1065 37982 LPR R6,R5 R6 :=000003FC 09
017A7E 1A61 37983 AR R6,R1 R6 :=000003FD 10
017A80 1961 37984 CR R6,R1 != 11
017A82 4780 C07E 17AC6 37985 BE T981BAD 12
017A86 1173 37986 LNR R7,R3 R7 :=FFFFFF00 13
017A88 1476 37987 NR R7,R6 R7 :=00000300 14
017A8A 8A70 0002 00002 37988 SRA R7,2 R7 :=000000C0 15
017A8E 1B74 37989 SR R7,R4 R7 :=FFFFFFC1 16
017A90 1283 37990 LTR R8,R3 R8 :=00000100 17
017A92 8880 0001 00001 37991 SRL R8,1 R8 :=00000080 18
017A96 1E83 37992 ALR R8,R3 R8 :=00000180 19
017A98 1F87 37993 SLR R8,R7 R8 :=000001BF 20
017A9A 1583 37994 CLR R8,R3 != 21
017A9C 4780 C07E 17AC6 37995 BE T981BAD 22
017AA0 4190 025A 0025A 37996 LA R9,602 R9 :=0000025A 23
017AA4 1794 37997 XR R9,R4 R9 :=000002A5 FIN 24
017AA6 12A9 37998 LTR R10,R9 R10:=000002A5 25
017AA8 1AA9 37999 AR R10,R9 R10:=000004FF 26
017AAA 16A5 38000 OR R10,R5 R10:=FFFFFCFF 27
017AAC 106A 38001 LPR R6,R10 R6 :=00000301 28
017AAE 1E64 38002 ALR R6,R4 R6 :=00000400 29
017AB0 8B60 0001 00001 38003 SLA R6,1 R6 :=00000800 30
017AB4 1B69 38004 SR R6,R9 R6 :=0000055B 31
017AB6 06FB 38005 BCTR R15,R11
38006 TSIMRET
017AB8 58F0 C088 17AD0 38007+ L R15,=A(SAVETST) R15 := current save area
PAGE 694
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017ABC 58DF 0004 00004 38008+ L R13,4(R15) get old save area back
017AC0 98EC D00C 0000C 38009+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017AC4 07FE 38010+ BR 14 RETURN 02000000
38011 *
017AC6 38012 DS 0H
38013 T981BAD ABEND 60
017AC6 38014+T981BAD DS 0H 00400002
017AC6 4110 003C 0003C 38015+ LA 1,60 LOAD PARAMETER REG 1 01900002
017ACA 0A0D 38016+ SVC 13 LINK TO ABEND ROUTINE 02050002
38017 TSIMEND
017AD0 38018+ LTORG
017AD0 00000458 38019 =A(SAVETST)
17AD4 38020+T981TEND EQU *
38021 *
38022 * Test 982 -- Mix Int RR 1st 32 ----------------------------
38023 *
38024 TSIMBEG T982,25000,1,1,C'T700 1st 32',DIS=1
38025+*
0048A4 38026+TDSCDAT CSECT
0048A8 38027+ DS 0D
38028+*
0048A8 00017AD8 38029+T982TDSC DC A(T982) // TENTRY
0048AC 0000008C 38030+ DC A(T982TEND-T982) // TLENGTH
0048B0 000061A8 38031+ DC F'25000' // TLRCNT
0048B4 00000001 38032+ DC F'1' // TIGCNT
0048B8 00000001 38033+ DC F'1' // TLTYPE
002144 38034+TEXT CSECT
002144 E3F9F8F2 38035+SPTR3569 DC C'T982'
0048BC 38036+TDSCDAT CSECT
0048BC 38037+ DS 0F
0048BC 04002144 38038+ DC AL1(L'SPTR3569),AL3(SPTR3569)
002148 38039+TEXT CSECT
002148 E3F7F0F040F1A2A3 38040+SPTR3570 DC C'T700 1st 32'
0048C0 38041+TDSCDAT CSECT
0048C0 38042+ DS 0F
0048C0 0B002148 38043+ DC AL1(L'SPTR3570),AL3(SPTR3570)
38044+*
004E40 38045+TDSCTBL CSECT
04E40 38046+T982TPTR EQU *
004E40 010048A8 38047+ DC X'01',AL3(T982TDSC) disabled test
38048+*
017AD4 38049+TCODE CSECT
017AD8 38050+ DS 0D ensure double word alignment for test
017AD8 38051+T982 DS 0H 01650000
017AD8 90EC D00C 0000C 38052+ STM 14,12,12(13) SAVE REGISTERS 02950000
017ADC 18CF 38053+ LR R12,R15 base register := entry address
17AD8 38054+ USING T982,R12 declare code base register
017ADE 41B0 C01E 17AF6 38055+ LA R11,T982L load loop target to R11
017AE2 58F0 C088 17B60 38056+ L R15,=A(SAVETST) R15 := current save area
017AE6 50DF 0004 00004 38057+ ST R13,4(R15) set back pointer in current save area
017AEA 182D 38058+ LR R2,R13 remember callers save area
017AEC 18DF 38059+ LR R13,R15 setup current save area
017AEE 50D2 0008 00008 38060+ ST R13,8(R2) set forw pointer in callers save area
00000 38061+ USING TDSC,R1 declare TDSC base register
017AF2 58F0 1008 00008 38062+ L R15,TLRCNT load local repeat count to R15
PAGE 695
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
38063+*
38064 *
17AF6 38065 T982L EQU *
017AF6 4120 0001 00001 38066 LA R2,1 R2 :=00000001 FIN 01
017AFA 1832 38067 LR R3,R2 R3 :=00000001 02
017AFC 8B30 0008 00008 38068 SLA R3,8 R3 :=00000100 FIN 03
017B00 1744 38069 XR R4,R4 R4 :=00000000 04
017B02 1643 38070 OR R4,R3 R4 :=00000100 05
017B04 0640 38071 BCTR R4,0 R4 :=000000FF FIN 06
017B06 1354 38072 LCR R5,R4 R5 :=FFFFFF01 07
017B08 8950 0002 00002 38073 SLL R5,2 R5 :=FFFFFC04 FIN 08
017B0C 1065 38074 LPR R6,R5 R6 :=000003FC 09
017B0E 1A61 38075 AR R6,R1 R6 :=000003FD 10
017B10 1961 38076 CR R6,R1 != 11
017B12 4780 C080 17B58 38077 BE T982BAD 12
017B16 1173 38078 LNR R7,R3 R7 :=FFFFFF00 13
017B18 1476 38079 NR R7,R6 R7 :=00000300 14
017B1A 8A70 0002 00002 38080 SRA R7,2 R7 :=000000C0 15
017B1E 1B74 38081 SR R7,R4 R7 :=FFFFFFC1 16
017B20 1283 38082 LTR R8,R3 R8 :=00000100 17
017B22 8880 0001 00001 38083 SRL R8,1 R8 :=00000080 18
017B26 1E83 38084 ALR R8,R3 R8 :=00000180 19
017B28 1F87 38085 SLR R8,R7 R8 :=000001BF 20
017B2A 1583 38086 CLR R8,R3 != 21
017B2C 4780 C080 17B58 38087 BE T982BAD 22
017B30 4190 025A 0025A 38088 LA R9,602 R9 :=0000025A 23
017B34 1794 38089 XR R9,R4 R9 :=000002A5 FIN 24
017B36 12A9 38090 LTR R10,R9 R10:=000002A5 25
017B38 1AA9 38091 AR R10,R9 R10:=000004FF 26
017B3A 16A5 38092 OR R10,R5 R10:=FFFFFCFF 27
017B3C 106A 38093 LPR R6,R10 R6 :=00000301 28
017B3E 1E64 38094 ALR R6,R4 R6 :=00000400 29
017B40 8B60 0001 00001 38095 SLA R6,1 R6 :=00000800 30
017B44 1B69 38096 SR R6,R9 R6 :=0000055B 31
017B46 0660 38097 BCTR R6,0 R6 :=0000055A 32
017B48 06FB 38098 BCTR R15,R11
38099 TSIMRET
017B4A 58F0 C088 17B60 38100+ L R15,=A(SAVETST) R15 := current save area
017B4E 58DF 0004 00004 38101+ L R13,4(R15) get old save area back
017B52 98EC D00C 0000C 38102+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017B56 07FE 38103+ BR 14 RETURN 02000000
38104 *
017B58 38105 DS 0H
38106 T982BAD ABEND 60
017B58 38107+T982BAD DS 0H 00400002
017B58 4110 003C 0003C 38108+ LA 1,60 LOAD PARAMETER REG 1 01900002
017B5C 0A0D 38109+ SVC 13 LINK TO ABEND ROUTINE 02050002
38110 TSIMEND
017B60 38111+ LTORG
017B60 00000458 38112 =A(SAVETST)
17B64 38113+T982TEND EQU *
38114 *
38115 * Test 983 -- Mix Int RR 1st 33 ----------------------------
38116 *
38117 TSIMBEG T983,25000,1,1,C'T700 1st 33',DIS=1
PAGE 696
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
38118+*
0048C4 38119+TDSCDAT CSECT
0048C8 38120+ DS 0D
38121+*
0048C8 00017B68 38122+T983TDSC DC A(T983) // TENTRY
0048CC 0000008C 38123+ DC A(T983TEND-T983) // TLENGTH
0048D0 000061A8 38124+ DC F'25000' // TLRCNT
0048D4 00000001 38125+ DC F'1' // TIGCNT
0048D8 00000001 38126+ DC F'1' // TLTYPE
002153 38127+TEXT CSECT
002153 E3F9F8F3 38128+SPTR3580 DC C'T983'
0048DC 38129+TDSCDAT CSECT
0048DC 38130+ DS 0F
0048DC 04002153 38131+ DC AL1(L'SPTR3580),AL3(SPTR3580)
002157 38132+TEXT CSECT
002157 E3F7F0F040F1A2A3 38133+SPTR3581 DC C'T700 1st 33'
0048E0 38134+TDSCDAT CSECT
0048E0 38135+ DS 0F
0048E0 0B002157 38136+ DC AL1(L'SPTR3581),AL3(SPTR3581)
38137+*
004E44 38138+TDSCTBL CSECT
04E44 38139+T983TPTR EQU *
004E44 010048C8 38140+ DC X'01',AL3(T983TDSC) disabled test
38141+*
017B64 38142+TCODE CSECT
017B68 38143+ DS 0D ensure double word alignment for test
017B68 38144+T983 DS 0H 01650000
017B68 90EC D00C 0000C 38145+ STM 14,12,12(13) SAVE REGISTERS 02950000
017B6C 18CF 38146+ LR R12,R15 base register := entry address
17B68 38147+ USING T983,R12 declare code base register
017B6E 41B0 C01E 17B86 38148+ LA R11,T983L load loop target to R11
017B72 58F0 C088 17BF0 38149+ L R15,=A(SAVETST) R15 := current save area
017B76 50DF 0004 00004 38150+ ST R13,4(R15) set back pointer in current save area
017B7A 182D 38151+ LR R2,R13 remember callers save area
017B7C 18DF 38152+ LR R13,R15 setup current save area
017B7E 50D2 0008 00008 38153+ ST R13,8(R2) set forw pointer in callers save area
00000 38154+ USING TDSC,R1 declare TDSC base register
017B82 58F0 1008 00008 38155+ L R15,TLRCNT load local repeat count to R15
38156+*
38157 *
17B86 38158 T983L EQU *
017B86 4120 0001 00001 38159 LA R2,1 R2 :=00000001 FIN 01
017B8A 1832 38160 LR R3,R2 R3 :=00000001 02
017B8C 8B30 0008 00008 38161 SLA R3,8 R3 :=00000100 FIN 03
017B90 1744 38162 XR R4,R4 R4 :=00000000 04
017B92 1643 38163 OR R4,R3 R4 :=00000100 05
017B94 0640 38164 BCTR R4,0 R4 :=000000FF FIN 06
017B96 1354 38165 LCR R5,R4 R5 :=FFFFFF01 07
017B98 8950 0002 00002 38166 SLL R5,2 R5 :=FFFFFC04 FIN 08
017B9C 1065 38167 LPR R6,R5 R6 :=000003FC 09
017B9E 1A61 38168 AR R6,R1 R6 :=000003FD 10
017BA0 1961 38169 CR R6,R1 != 11
017BA2 4780 C082 17BEA 38170 BE T983BAD 12
017BA6 1173 38171 LNR R7,R3 R7 :=FFFFFF00 13
017BA8 1476 38172 NR R7,R6 R7 :=00000300 14
PAGE 697
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017BAA 8A70 0002 00002 38173 SRA R7,2 R7 :=000000C0 15
017BAE 1B74 38174 SR R7,R4 R7 :=FFFFFFC1 16
017BB0 1283 38175 LTR R8,R3 R8 :=00000100 17
017BB2 8880 0001 00001 38176 SRL R8,1 R8 :=00000080 18
017BB6 1E83 38177 ALR R8,R3 R8 :=00000180 19
017BB8 1F87 38178 SLR R8,R7 R8 :=000001BF 20
017BBA 1583 38179 CLR R8,R3 != 21
017BBC 4780 C082 17BEA 38180 BE T983BAD 22
017BC0 4190 025A 0025A 38181 LA R9,602 R9 :=0000025A 23
017BC4 1794 38182 XR R9,R4 R9 :=000002A5 FIN 24
017BC6 12A9 38183 LTR R10,R9 R10:=000002A5 25
017BC8 1AA9 38184 AR R10,R9 R10:=000004FF 26
017BCA 16A5 38185 OR R10,R5 R10:=FFFFFCFF 27
017BCC 106A 38186 LPR R6,R10 R6 :=00000301 28
017BCE 1E64 38187 ALR R6,R4 R6 :=00000400 29
017BD0 8B60 0001 00001 38188 SLA R6,1 R6 :=00000800 30
017BD4 1B69 38189 SR R6,R9 R6 :=0000055B 31
017BD6 0660 38190 BCTR R6,0 R6 :=0000055A 32
017BD8 1465 38191 NR R6,R5 R6 :=00000400 33
017BDA 06FB 38192 BCTR R15,R11
38193 TSIMRET
017BDC 58F0 C088 17BF0 38194+ L R15,=A(SAVETST) R15 := current save area
017BE0 58DF 0004 00004 38195+ L R13,4(R15) get old save area back
017BE4 98EC D00C 0000C 38196+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017BE8 07FE 38197+ BR 14 RETURN 02000000
38198 *
017BEA 38199 DS 0H
38200 T983BAD ABEND 60
017BEA 38201+T983BAD DS 0H 00400002
017BEA 4110 003C 0003C 38202+ LA 1,60 LOAD PARAMETER REG 1 01900002
017BEE 0A0D 38203+ SVC 13 LINK TO ABEND ROUTINE 02050002
38204 TSIMEND
017BF0 38205+ LTORG
017BF0 00000458 38206 =A(SAVETST)
17BF4 38207+T983TEND EQU *
38208 *
38209 * Test 984 -- Mix Int RR 1st 34 ----------------------------
38210 *
38211 TSIMBEG T984,25000,1,1,C'T700 1st 34',DIS=1
38212+*
0048E4 38213+TDSCDAT CSECT
0048E8 38214+ DS 0D
38215+*
0048E8 00017BF8 38216+T984TDSC DC A(T984) // TENTRY
0048EC 00000094 38217+ DC A(T984TEND-T984) // TLENGTH
0048F0 000061A8 38218+ DC F'25000' // TLRCNT
0048F4 00000001 38219+ DC F'1' // TIGCNT
0048F8 00000001 38220+ DC F'1' // TLTYPE
002162 38221+TEXT CSECT
002162 E3F9F8F4 38222+SPTR3591 DC C'T984'
0048FC 38223+TDSCDAT CSECT
0048FC 38224+ DS 0F
0048FC 04002162 38225+ DC AL1(L'SPTR3591),AL3(SPTR3591)
002166 38226+TEXT CSECT
002166 E3F7F0F040F1A2A3 38227+SPTR3592 DC C'T700 1st 34'
PAGE 698
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
004900 38228+TDSCDAT CSECT
004900 38229+ DS 0F
004900 0B002166 38230+ DC AL1(L'SPTR3592),AL3(SPTR3592)
38231+*
004E48 38232+TDSCTBL CSECT
04E48 38233+T984TPTR EQU *
004E48 010048E8 38234+ DC X'01',AL3(T984TDSC) disabled test
38235+*
017BF4 38236+TCODE CSECT
017BF8 38237+ DS 0D ensure double word alignment for test
017BF8 38238+T984 DS 0H 01650000
017BF8 90EC D00C 0000C 38239+ STM 14,12,12(13) SAVE REGISTERS 02950000
017BFC 18CF 38240+ LR R12,R15 base register := entry address
17BF8 38241+ USING T984,R12 declare code base register
017BFE 41B0 C01E 17C16 38242+ LA R11,T984L load loop target to R11
017C02 58F0 C090 17C88 38243+ L R15,=A(SAVETST) R15 := current save area
017C06 50DF 0004 00004 38244+ ST R13,4(R15) set back pointer in current save area
017C0A 182D 38245+ LR R2,R13 remember callers save area
017C0C 18DF 38246+ LR R13,R15 setup current save area
017C0E 50D2 0008 00008 38247+ ST R13,8(R2) set forw pointer in callers save area
00000 38248+ USING TDSC,R1 declare TDSC base register
017C12 58F0 1008 00008 38249+ L R15,TLRCNT load local repeat count to R15
38250+*
38251 *
17C16 38252 T984L EQU *
017C16 4120 0001 00001 38253 LA R2,1 R2 :=00000001 FIN 01
017C1A 1832 38254 LR R3,R2 R3 :=00000001 02
017C1C 8B30 0008 00008 38255 SLA R3,8 R3 :=00000100 FIN 03
017C20 1744 38256 XR R4,R4 R4 :=00000000 04
017C22 1643 38257 OR R4,R3 R4 :=00000100 05
017C24 0640 38258 BCTR R4,0 R4 :=000000FF FIN 06
017C26 1354 38259 LCR R5,R4 R5 :=FFFFFF01 07
017C28 8950 0002 00002 38260 SLL R5,2 R5 :=FFFFFC04 FIN 08
017C2C 1065 38261 LPR R6,R5 R6 :=000003FC 09
017C2E 1A61 38262 AR R6,R1 R6 :=000003FD 10
017C30 1961 38263 CR R6,R1 != 11
017C32 4780 C086 17C7E 38264 BE T984BAD 12
017C36 1173 38265 LNR R7,R3 R7 :=FFFFFF00 13
017C38 1476 38266 NR R7,R6 R7 :=00000300 14
017C3A 8A70 0002 00002 38267 SRA R7,2 R7 :=000000C0 15
017C3E 1B74 38268 SR R7,R4 R7 :=FFFFFFC1 16
017C40 1283 38269 LTR R8,R3 R8 :=00000100 17
017C42 8880 0001 00001 38270 SRL R8,1 R8 :=00000080 18
017C46 1E83 38271 ALR R8,R3 R8 :=00000180 19
017C48 1F87 38272 SLR R8,R7 R8 :=000001BF 20
017C4A 1583 38273 CLR R8,R3 != 21
017C4C 4780 C086 17C7E 38274 BE T984BAD 22
017C50 4190 025A 0025A 38275 LA R9,602 R9 :=0000025A 23
017C54 1794 38276 XR R9,R4 R9 :=000002A5 FIN 24
017C56 12A9 38277 LTR R10,R9 R10:=000002A5 25
017C58 1AA9 38278 AR R10,R9 R10:=000004FF 26
017C5A 16A5 38279 OR R10,R5 R10:=FFFFFCFF 27
017C5C 106A 38280 LPR R6,R10 R6 :=00000301 28
017C5E 1E64 38281 ALR R6,R4 R6 :=00000400 29
017C60 8B60 0001 00001 38282 SLA R6,1 R6 :=00000800 30
PAGE 699
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017C64 1B69 38283 SR R6,R9 R6 :=0000055B 31
017C66 0660 38284 BCTR R6,0 R6 :=0000055A 32
017C68 1465 38285 NR R6,R5 R6 :=00000400 33
017C6A 8A60 0005 00005 38286 SRA R6,5 R6 :=00000020 34
017C6E 06FB 38287 BCTR R15,R11
38288 TSIMRET
017C70 58F0 C090 17C88 38289+ L R15,=A(SAVETST) R15 := current save area
017C74 58DF 0004 00004 38290+ L R13,4(R15) get old save area back
017C78 98EC D00C 0000C 38291+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017C7C 07FE 38292+ BR 14 RETURN 02000000
38293 *
017C7E 38294 DS 0H
38295 T984BAD ABEND 60
017C7E 38296+T984BAD DS 0H 00400002
017C7E 4110 003C 0003C 38297+ LA 1,60 LOAD PARAMETER REG 1 01900002
017C82 0A0D 38298+ SVC 13 LINK TO ABEND ROUTINE 02050002
38299 TSIMEND
017C88 38300+ LTORG
017C88 00000458 38301 =A(SAVETST)
17C8C 38302+T984TEND EQU *
38303 *
38304 * Test 985 -- Mix Int RR 1st 35 ----------------------------
38305 *
38306 TSIMBEG T985,25000,1,1,C'T700 1st 35',DIS=1
38307+*
004904 38308+TDSCDAT CSECT
004908 38309+ DS 0D
38310+*
004908 00017C90 38311+T985TDSC DC A(T985) // TENTRY
00490C 00000094 38312+ DC A(T985TEND-T985) // TLENGTH
004910 000061A8 38313+ DC F'25000' // TLRCNT
004914 00000001 38314+ DC F'1' // TIGCNT
004918 00000001 38315+ DC F'1' // TLTYPE
002171 38316+TEXT CSECT
002171 E3F9F8F5 38317+SPTR3602 DC C'T985'
00491C 38318+TDSCDAT CSECT
00491C 38319+ DS 0F
00491C 04002171 38320+ DC AL1(L'SPTR3602),AL3(SPTR3602)
002175 38321+TEXT CSECT
002175 E3F7F0F040F1A2A3 38322+SPTR3603 DC C'T700 1st 35'
004920 38323+TDSCDAT CSECT
004920 38324+ DS 0F
004920 0B002175 38325+ DC AL1(L'SPTR3603),AL3(SPTR3603)
38326+*
004E4C 38327+TDSCTBL CSECT
04E4C 38328+T985TPTR EQU *
004E4C 01004908 38329+ DC X'01',AL3(T985TDSC) disabled test
38330+*
017C8C 38331+TCODE CSECT
017C90 38332+ DS 0D ensure double word alignment for test
017C90 38333+T985 DS 0H 01650000
017C90 90EC D00C 0000C 38334+ STM 14,12,12(13) SAVE REGISTERS 02950000
017C94 18CF 38335+ LR R12,R15 base register := entry address
17C90 38336+ USING T985,R12 declare code base register
017C96 41B0 C01E 17CAE 38337+ LA R11,T985L load loop target to R11
PAGE 700
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017C9A 58F0 C090 17D20 38338+ L R15,=A(SAVETST) R15 := current save area
017C9E 50DF 0004 00004 38339+ ST R13,4(R15) set back pointer in current save area
017CA2 182D 38340+ LR R2,R13 remember callers save area
017CA4 18DF 38341+ LR R13,R15 setup current save area
017CA6 50D2 0008 00008 38342+ ST R13,8(R2) set forw pointer in callers save area
00000 38343+ USING TDSC,R1 declare TDSC base register
017CAA 58F0 1008 00008 38344+ L R15,TLRCNT load local repeat count to R15
38345+*
38346 *
17CAE 38347 T985L EQU *
017CAE 4120 0001 00001 38348 LA R2,1 R2 :=00000001 FIN 01
017CB2 1832 38349 LR R3,R2 R3 :=00000001 02
017CB4 8B30 0008 00008 38350 SLA R3,8 R3 :=00000100 FIN 03
017CB8 1744 38351 XR R4,R4 R4 :=00000000 04
017CBA 1643 38352 OR R4,R3 R4 :=00000100 05
017CBC 0640 38353 BCTR R4,0 R4 :=000000FF FIN 06
017CBE 1354 38354 LCR R5,R4 R5 :=FFFFFF01 07
017CC0 8950 0002 00002 38355 SLL R5,2 R5 :=FFFFFC04 FIN 08
017CC4 1065 38356 LPR R6,R5 R6 :=000003FC 09
017CC6 1A61 38357 AR R6,R1 R6 :=000003FD 10
017CC8 1961 38358 CR R6,R1 != 11
017CCA 4780 C088 17D18 38359 BE T985BAD 12
017CCE 1173 38360 LNR R7,R3 R7 :=FFFFFF00 13
017CD0 1476 38361 NR R7,R6 R7 :=00000300 14
017CD2 8A70 0002 00002 38362 SRA R7,2 R7 :=000000C0 15
017CD6 1B74 38363 SR R7,R4 R7 :=FFFFFFC1 16
017CD8 1283 38364 LTR R8,R3 R8 :=00000100 17
017CDA 8880 0001 00001 38365 SRL R8,1 R8 :=00000080 18
017CDE 1E83 38366 ALR R8,R3 R8 :=00000180 19
017CE0 1F87 38367 SLR R8,R7 R8 :=000001BF 20
017CE2 1583 38368 CLR R8,R3 != 21
017CE4 4780 C088 17D18 38369 BE T985BAD 22
017CE8 4190 025A 0025A 38370 LA R9,602 R9 :=0000025A 23
017CEC 1794 38371 XR R9,R4 R9 :=000002A5 FIN 24
017CEE 12A9 38372 LTR R10,R9 R10:=000002A5 25
017CF0 1AA9 38373 AR R10,R9 R10:=000004FF 26
017CF2 16A5 38374 OR R10,R5 R10:=FFFFFCFF 27
017CF4 106A 38375 LPR R6,R10 R6 :=00000301 28
017CF6 1E64 38376 ALR R6,R4 R6 :=00000400 29
017CF8 8B60 0001 00001 38377 SLA R6,1 R6 :=00000800 30
017CFC 1B69 38378 SR R6,R9 R6 :=0000055B 31
017CFE 0660 38379 BCTR R6,0 R6 :=0000055A 32
017D00 1465 38380 NR R6,R5 R6 :=00000400 33
017D02 8A60 0005 00005 38381 SRA R6,5 R6 :=00000020 34
017D06 1964 38382 CR R6,R4 != 35
017D08 06FB 38383 BCTR R15,R11
38384 TSIMRET
017D0A 58F0 C090 17D20 38385+ L R15,=A(SAVETST) R15 := current save area
017D0E 58DF 0004 00004 38386+ L R13,4(R15) get old save area back
017D12 98EC D00C 0000C 38387+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017D16 07FE 38388+ BR 14 RETURN 02000000
38389 *
017D18 38390 DS 0H
38391 T985BAD ABEND 60
017D18 38392+T985BAD DS 0H 00400002
PAGE 701
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017D18 4110 003C 0003C 38393+ LA 1,60 LOAD PARAMETER REG 1 01900002
017D1C 0A0D 38394+ SVC 13 LINK TO ABEND ROUTINE 02050002
38395 TSIMEND
017D20 38396+ LTORG
017D20 00000458 38397 =A(SAVETST)
17D24 38398+T985TEND EQU *
38399 *
38400 * Test 986 -- Mix Int RR 1st 36 ----------------------------
38401 *
38402 TSIMBEG T986,20000,1,1,C'T700 1st 36',DIS=1
38403+*
004924 38404+TDSCDAT CSECT
004928 38405+ DS 0D
38406+*
004928 00017D28 38407+T986TDSC DC A(T986) // TENTRY
00492C 00000094 38408+ DC A(T986TEND-T986) // TLENGTH
004930 00004E20 38409+ DC F'20000' // TLRCNT
004934 00000001 38410+ DC F'1' // TIGCNT
004938 00000001 38411+ DC F'1' // TLTYPE
002180 38412+TEXT CSECT
002180 E3F9F8F6 38413+SPTR3613 DC C'T986'
00493C 38414+TDSCDAT CSECT
00493C 38415+ DS 0F
00493C 04002180 38416+ DC AL1(L'SPTR3613),AL3(SPTR3613)
002184 38417+TEXT CSECT
002184 E3F7F0F040F1A2A3 38418+SPTR3614 DC C'T700 1st 36'
004940 38419+TDSCDAT CSECT
004940 38420+ DS 0F
004940 0B002184 38421+ DC AL1(L'SPTR3614),AL3(SPTR3614)
38422+*
004E50 38423+TDSCTBL CSECT
04E50 38424+T986TPTR EQU *
004E50 01004928 38425+ DC X'01',AL3(T986TDSC) disabled test
38426+*
017D24 38427+TCODE CSECT
017D28 38428+ DS 0D ensure double word alignment for test
017D28 38429+T986 DS 0H 01650000
017D28 90EC D00C 0000C 38430+ STM 14,12,12(13) SAVE REGISTERS 02950000
017D2C 18CF 38431+ LR R12,R15 base register := entry address
17D28 38432+ USING T986,R12 declare code base register
017D2E 41B0 C01E 17D46 38433+ LA R11,T986L load loop target to R11
017D32 58F0 C090 17DB8 38434+ L R15,=A(SAVETST) R15 := current save area
017D36 50DF 0004 00004 38435+ ST R13,4(R15) set back pointer in current save area
017D3A 182D 38436+ LR R2,R13 remember callers save area
017D3C 18DF 38437+ LR R13,R15 setup current save area
017D3E 50D2 0008 00008 38438+ ST R13,8(R2) set forw pointer in callers save area
00000 38439+ USING TDSC,R1 declare TDSC base register
017D42 58F0 1008 00008 38440+ L R15,TLRCNT load local repeat count to R15
38441+*
38442 *
17D46 38443 T986L EQU *
017D46 4120 0001 00001 38444 LA R2,1 R2 :=00000001 FIN 01
017D4A 1832 38445 LR R3,R2 R3 :=00000001 02
017D4C 8B30 0008 00008 38446 SLA R3,8 R3 :=00000100 FIN 03
017D50 1744 38447 XR R4,R4 R4 :=00000000 04
PAGE 702
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017D52 1643 38448 OR R4,R3 R4 :=00000100 05
017D54 0640 38449 BCTR R4,0 R4 :=000000FF FIN 06
017D56 1354 38450 LCR R5,R4 R5 :=FFFFFF01 07
017D58 8950 0002 00002 38451 SLL R5,2 R5 :=FFFFFC04 FIN 08
017D5C 1065 38452 LPR R6,R5 R6 :=000003FC 09
017D5E 1A61 38453 AR R6,R1 R6 :=000003FD 10
017D60 1961 38454 CR R6,R1 != 11
017D62 4780 C08A 17DB2 38455 BE T986BAD 12
017D66 1173 38456 LNR R7,R3 R7 :=FFFFFF00 13
017D68 1476 38457 NR R7,R6 R7 :=00000300 14
017D6A 8A70 0002 00002 38458 SRA R7,2 R7 :=000000C0 15
017D6E 1B74 38459 SR R7,R4 R7 :=FFFFFFC1 16
017D70 1283 38460 LTR R8,R3 R8 :=00000100 17
017D72 8880 0001 00001 38461 SRL R8,1 R8 :=00000080 18
017D76 1E83 38462 ALR R8,R3 R8 :=00000180 19
017D78 1F87 38463 SLR R8,R7 R8 :=000001BF 20
017D7A 1583 38464 CLR R8,R3 != 21
017D7C 4780 C08A 17DB2 38465 BE T986BAD 22
017D80 4190 025A 0025A 38466 LA R9,602 R9 :=0000025A 23
017D84 1794 38467 XR R9,R4 R9 :=000002A5 FIN 24
017D86 12A9 38468 LTR R10,R9 R10:=000002A5 25
017D88 1AA9 38469 AR R10,R9 R10:=000004FF 26
017D8A 16A5 38470 OR R10,R5 R10:=FFFFFCFF 27
017D8C 106A 38471 LPR R6,R10 R6 :=00000301 28
017D8E 1E64 38472 ALR R6,R4 R6 :=00000400 29
017D90 8B60 0001 00001 38473 SLA R6,1 R6 :=00000800 30
017D94 1B69 38474 SR R6,R9 R6 :=0000055B 31
017D96 0660 38475 BCTR R6,0 R6 :=0000055A 32
017D98 1465 38476 NR R6,R5 R6 :=00000400 33
017D9A 8A60 0005 00005 38477 SRA R6,5 R6 :=00000020 34
017D9E 1964 38478 CR R6,R4 != 35
017DA0 1176 38479 LNR R7,R6 R7 :=FFFFFFC0 36
017DA2 06FB 38480 BCTR R15,R11
38481 TSIMRET
017DA4 58F0 C090 17DB8 38482+ L R15,=A(SAVETST) R15 := current save area
017DA8 58DF 0004 00004 38483+ L R13,4(R15) get old save area back
017DAC 98EC D00C 0000C 38484+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017DB0 07FE 38485+ BR 14 RETURN 02000000
38486 *
017DB2 38487 DS 0H
38488 T986BAD ABEND 60
017DB2 38489+T986BAD DS 0H 00400002
017DB2 4110 003C 0003C 38490+ LA 1,60 LOAD PARAMETER REG 1 01900002
017DB6 0A0D 38491+ SVC 13 LINK TO ABEND ROUTINE 02050002
38492 TSIMEND
017DB8 38493+ LTORG
017DB8 00000458 38494 =A(SAVETST)
17DBC 38495+T986TEND EQU *
38496 *
38497 * Test 987 -- Mix Int RR 1st 37 ----------------------------
38498 *
38499 TSIMBEG T987,20000,1,1,C'T700 1st 37',DIS=1
38500+*
004944 38501+TDSCDAT CSECT
004948 38502+ DS 0D
PAGE 703
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
38503+*
004948 00017DC0 38504+T987TDSC DC A(T987) // TENTRY
00494C 0000009C 38505+ DC A(T987TEND-T987) // TLENGTH
004950 00004E20 38506+ DC F'20000' // TLRCNT
004954 00000001 38507+ DC F'1' // TIGCNT
004958 00000001 38508+ DC F'1' // TLTYPE
00218F 38509+TEXT CSECT
00218F E3F9F8F7 38510+SPTR3624 DC C'T987'
00495C 38511+TDSCDAT CSECT
00495C 38512+ DS 0F
00495C 0400218F 38513+ DC AL1(L'SPTR3624),AL3(SPTR3624)
002193 38514+TEXT CSECT
002193 E3F7F0F040F1A2A3 38515+SPTR3625 DC C'T700 1st 37'
004960 38516+TDSCDAT CSECT
004960 38517+ DS 0F
004960 0B002193 38518+ DC AL1(L'SPTR3625),AL3(SPTR3625)
38519+*
004E54 38520+TDSCTBL CSECT
04E54 38521+T987TPTR EQU *
004E54 01004948 38522+ DC X'01',AL3(T987TDSC) disabled test
38523+*
017DBC 38524+TCODE CSECT
017DC0 38525+ DS 0D ensure double word alignment for test
017DC0 38526+T987 DS 0H 01650000
017DC0 90EC D00C 0000C 38527+ STM 14,12,12(13) SAVE REGISTERS 02950000
017DC4 18CF 38528+ LR R12,R15 base register := entry address
17DC0 38529+ USING T987,R12 declare code base register
017DC6 41B0 C01E 17DDE 38530+ LA R11,T987L load loop target to R11
017DCA 58F0 C098 17E58 38531+ L R15,=A(SAVETST) R15 := current save area
017DCE 50DF 0004 00004 38532+ ST R13,4(R15) set back pointer in current save area
017DD2 182D 38533+ LR R2,R13 remember callers save area
017DD4 18DF 38534+ LR R13,R15 setup current save area
017DD6 50D2 0008 00008 38535+ ST R13,8(R2) set forw pointer in callers save area
00000 38536+ USING TDSC,R1 declare TDSC base register
017DDA 58F0 1008 00008 38537+ L R15,TLRCNT load local repeat count to R15
38538+*
38539 *
17DDE 38540 T987L EQU *
017DDE 4120 0001 00001 38541 LA R2,1 R2 :=00000001 FIN 01
017DE2 1832 38542 LR R3,R2 R3 :=00000001 02
017DE4 8B30 0008 00008 38543 SLA R3,8 R3 :=00000100 FIN 03
017DE8 1744 38544 XR R4,R4 R4 :=00000000 04
017DEA 1643 38545 OR R4,R3 R4 :=00000100 05
017DEC 0640 38546 BCTR R4,0 R4 :=000000FF FIN 06
017DEE 1354 38547 LCR R5,R4 R5 :=FFFFFF01 07
017DF0 8950 0002 00002 38548 SLL R5,2 R5 :=FFFFFC04 FIN 08
017DF4 1065 38549 LPR R6,R5 R6 :=000003FC 09
017DF6 1A61 38550 AR R6,R1 R6 :=000003FD 10
017DF8 1961 38551 CR R6,R1 != 11
017DFA 4780 C08E 17E4E 38552 BE T987BAD 12
017DFE 1173 38553 LNR R7,R3 R7 :=FFFFFF00 13
017E00 1476 38554 NR R7,R6 R7 :=00000300 14
017E02 8A70 0002 00002 38555 SRA R7,2 R7 :=000000C0 15
017E06 1B74 38556 SR R7,R4 R7 :=FFFFFFC1 16
017E08 1283 38557 LTR R8,R3 R8 :=00000100 17
PAGE 704
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017E0A 8880 0001 00001 38558 SRL R8,1 R8 :=00000080 18
017E0E 1E83 38559 ALR R8,R3 R8 :=00000180 19
017E10 1F87 38560 SLR R8,R7 R8 :=000001BF 20
017E12 1583 38561 CLR R8,R3 != 21
017E14 4780 C08E 17E4E 38562 BE T987BAD 22
017E18 4190 025A 0025A 38563 LA R9,602 R9 :=0000025A 23
017E1C 1794 38564 XR R9,R4 R9 :=000002A5 FIN 24
017E1E 12A9 38565 LTR R10,R9 R10:=000002A5 25
017E20 1AA9 38566 AR R10,R9 R10:=000004FF 26
017E22 16A5 38567 OR R10,R5 R10:=FFFFFCFF 27
017E24 106A 38568 LPR R6,R10 R6 :=00000301 28
017E26 1E64 38569 ALR R6,R4 R6 :=00000400 29
017E28 8B60 0001 00001 38570 SLA R6,1 R6 :=00000800 30
017E2C 1B69 38571 SR R6,R9 R6 :=0000055B 31
017E2E 0660 38572 BCTR R6,0 R6 :=0000055A 32
017E30 1465 38573 NR R6,R5 R6 :=00000400 33
017E32 8A60 0005 00005 38574 SRA R6,5 R6 :=00000020 34
017E36 1964 38575 CR R6,R4 != 35
017E38 1176 38576 LNR R7,R6 R7 :=FFFFFFC0 36
017E3A 8970 0002 00002 38577 SLL R7,2 R7 :=FFFFFF00 37
017E3E 06FB 38578 BCTR R15,R11
38579 TSIMRET
017E40 58F0 C098 17E58 38580+ L R15,=A(SAVETST) R15 := current save area
017E44 58DF 0004 00004 38581+ L R13,4(R15) get old save area back
017E48 98EC D00C 0000C 38582+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017E4C 07FE 38583+ BR 14 RETURN 02000000
38584 *
017E4E 38585 DS 0H
38586 T987BAD ABEND 60
017E4E 38587+T987BAD DS 0H 00400002
017E4E 4110 003C 0003C 38588+ LA 1,60 LOAD PARAMETER REG 1 01900002
017E52 0A0D 38589+ SVC 13 LINK TO ABEND ROUTINE 02050002
38590 TSIMEND
017E58 38591+ LTORG
017E58 00000458 38592 =A(SAVETST)
17E5C 38593+T987TEND EQU *
38594 *
38595 * Test 988 -- Mix Int RR 1st 38 ----------------------------
38596 *
38597 TSIMBEG T988,20000,1,1,C'T700 1st 38',DIS=1
38598+*
004964 38599+TDSCDAT CSECT
004968 38600+ DS 0D
38601+*
004968 00017E60 38602+T988TDSC DC A(T988) // TENTRY
00496C 0000009C 38603+ DC A(T988TEND-T988) // TLENGTH
004970 00004E20 38604+ DC F'20000' // TLRCNT
004974 00000001 38605+ DC F'1' // TIGCNT
004978 00000001 38606+ DC F'1' // TLTYPE
00219E 38607+TEXT CSECT
00219E E3F9F8F8 38608+SPTR3635 DC C'T988'
00497C 38609+TDSCDAT CSECT
00497C 38610+ DS 0F
00497C 0400219E 38611+ DC AL1(L'SPTR3635),AL3(SPTR3635)
0021A2 38612+TEXT CSECT
PAGE 705
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
0021A2 E3F7F0F040F1A2A3 38613+SPTR3636 DC C'T700 1st 38'
004980 38614+TDSCDAT CSECT
004980 38615+ DS 0F
004980 0B0021A2 38616+ DC AL1(L'SPTR3636),AL3(SPTR3636)
38617+*
004E58 38618+TDSCTBL CSECT
04E58 38619+T988TPTR EQU *
004E58 01004968 38620+ DC X'01',AL3(T988TDSC) disabled test
38621+*
017E5C 38622+TCODE CSECT
017E60 38623+ DS 0D ensure double word alignment for test
017E60 38624+T988 DS 0H 01650000
017E60 90EC D00C 0000C 38625+ STM 14,12,12(13) SAVE REGISTERS 02950000
017E64 18CF 38626+ LR R12,R15 base register := entry address
17E60 38627+ USING T988,R12 declare code base register
017E66 41B0 C01E 17E7E 38628+ LA R11,T988L load loop target to R11
017E6A 58F0 C098 17EF8 38629+ L R15,=A(SAVETST) R15 := current save area
017E6E 50DF 0004 00004 38630+ ST R13,4(R15) set back pointer in current save area
017E72 182D 38631+ LR R2,R13 remember callers save area
017E74 18DF 38632+ LR R13,R15 setup current save area
017E76 50D2 0008 00008 38633+ ST R13,8(R2) set forw pointer in callers save area
00000 38634+ USING TDSC,R1 declare TDSC base register
017E7A 58F0 1008 00008 38635+ L R15,TLRCNT load local repeat count to R15
38636+*
38637 *
17E7E 38638 T988L EQU *
017E7E 4120 0001 00001 38639 LA R2,1 R2 :=00000001 FIN 01
017E82 1832 38640 LR R3,R2 R3 :=00000001 02
017E84 8B30 0008 00008 38641 SLA R3,8 R3 :=00000100 FIN 03
017E88 1744 38642 XR R4,R4 R4 :=00000000 04
017E8A 1643 38643 OR R4,R3 R4 :=00000100 05
017E8C 0640 38644 BCTR R4,0 R4 :=000000FF FIN 06
017E8E 1354 38645 LCR R5,R4 R5 :=FFFFFF01 07
017E90 8950 0002 00002 38646 SLL R5,2 R5 :=FFFFFC04 FIN 08
017E94 1065 38647 LPR R6,R5 R6 :=000003FC 09
017E96 1A61 38648 AR R6,R1 R6 :=000003FD 10
017E98 1961 38649 CR R6,R1 != 11
017E9A 4780 C090 17EF0 38650 BE T988BAD 12
017E9E 1173 38651 LNR R7,R3 R7 :=FFFFFF00 13
017EA0 1476 38652 NR R7,R6 R7 :=00000300 14
017EA2 8A70 0002 00002 38653 SRA R7,2 R7 :=000000C0 15
017EA6 1B74 38654 SR R7,R4 R7 :=FFFFFFC1 16
017EA8 1283 38655 LTR R8,R3 R8 :=00000100 17
017EAA 8880 0001 00001 38656 SRL R8,1 R8 :=00000080 18
017EAE 1E83 38657 ALR R8,R3 R8 :=00000180 19
017EB0 1F87 38658 SLR R8,R7 R8 :=000001BF 20
017EB2 1583 38659 CLR R8,R3 != 21
017EB4 4780 C090 17EF0 38660 BE T988BAD 22
017EB8 4190 025A 0025A 38661 LA R9,602 R9 :=0000025A 23
017EBC 1794 38662 XR R9,R4 R9 :=000002A5 FIN 24
017EBE 12A9 38663 LTR R10,R9 R10:=000002A5 25
017EC0 1AA9 38664 AR R10,R9 R10:=000004FF 26
017EC2 16A5 38665 OR R10,R5 R10:=FFFFFCFF 27
017EC4 106A 38666 LPR R6,R10 R6 :=00000301 28
017EC6 1E64 38667 ALR R6,R4 R6 :=00000400 29
PAGE 706
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017EC8 8B60 0001 00001 38668 SLA R6,1 R6 :=00000800 30
017ECC 1B69 38669 SR R6,R9 R6 :=0000055B 31
017ECE 0660 38670 BCTR R6,0 R6 :=0000055A 32
017ED0 1465 38671 NR R6,R5 R6 :=00000400 33
017ED2 8A60 0005 00005 38672 SRA R6,5 R6 :=00000020 34
017ED6 1964 38673 CR R6,R4 != 35
017ED8 1176 38674 LNR R7,R6 R7 :=FFFFFFC0 36
017EDA 8970 0002 00002 38675 SLL R7,2 R7 :=FFFFFF00 37
017EDE 1F72 38676 SLR R7,R2 R7 :=FFFFFEFF 38
017EE0 06FB 38677 BCTR R15,R11
38678 TSIMRET
017EE2 58F0 C098 17EF8 38679+ L R15,=A(SAVETST) R15 := current save area
017EE6 58DF 0004 00004 38680+ L R13,4(R15) get old save area back
017EEA 98EC D00C 0000C 38681+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017EEE 07FE 38682+ BR 14 RETURN 02000000
38683 *
017EF0 38684 DS 0H
38685 T988BAD ABEND 60
017EF0 38686+T988BAD DS 0H 00400002
017EF0 4110 003C 0003C 38687+ LA 1,60 LOAD PARAMETER REG 1 01900002
017EF4 0A0D 38688+ SVC 13 LINK TO ABEND ROUTINE 02050002
38689 TSIMEND
017EF8 38690+ LTORG
017EF8 00000458 38691 =A(SAVETST)
17EFC 38692+T988TEND EQU *
38693 *
38694 * Test 989 -- Mix Int RR 1st 39 ----------------------------
38695 *
38696 TSIMBEG T989,20000,1,1,C'T700 1st 39',DIS=1
38697+*
004984 38698+TDSCDAT CSECT
004988 38699+ DS 0D
38700+*
004988 00017F00 38701+T989TDSC DC A(T989) // TENTRY
00498C 0000009C 38702+ DC A(T989TEND-T989) // TLENGTH
004990 00004E20 38703+ DC F'20000' // TLRCNT
004994 00000001 38704+ DC F'1' // TIGCNT
004998 00000001 38705+ DC F'1' // TLTYPE
0021AD 38706+TEXT CSECT
0021AD E3F9F8F9 38707+SPTR3646 DC C'T989'
00499C 38708+TDSCDAT CSECT
00499C 38709+ DS 0F
00499C 040021AD 38710+ DC AL1(L'SPTR3646),AL3(SPTR3646)
0021B1 38711+TEXT CSECT
0021B1 E3F7F0F040F1A2A3 38712+SPTR3647 DC C'T700 1st 39'
0049A0 38713+TDSCDAT CSECT
0049A0 38714+ DS 0F
0049A0 0B0021B1 38715+ DC AL1(L'SPTR3647),AL3(SPTR3647)
38716+*
004E5C 38717+TDSCTBL CSECT
04E5C 38718+T989TPTR EQU *
004E5C 01004988 38719+ DC X'01',AL3(T989TDSC) disabled test
38720+*
017EFC 38721+TCODE CSECT
017F00 38722+ DS 0D ensure double word alignment for test
PAGE 707
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
017F00 38723+T989 DS 0H 01650000
017F00 90EC D00C 0000C 38724+ STM 14,12,12(13) SAVE REGISTERS 02950000
017F04 18CF 38725+ LR R12,R15 base register := entry address
17F00 38726+ USING T989,R12 declare code base register
017F06 41B0 C01E 17F1E 38727+ LA R11,T989L load loop target to R11
017F0A 58F0 C098 17F98 38728+ L R15,=A(SAVETST) R15 := current save area
017F0E 50DF 0004 00004 38729+ ST R13,4(R15) set back pointer in current save area
017F12 182D 38730+ LR R2,R13 remember callers save area
017F14 18DF 38731+ LR R13,R15 setup current save area
017F16 50D2 0008 00008 38732+ ST R13,8(R2) set forw pointer in callers save area
00000 38733+ USING TDSC,R1 declare TDSC base register
017F1A 58F0 1008 00008 38734+ L R15,TLRCNT load local repeat count to R15
38735+*
38736 *
17F1E 38737 T989L EQU *
017F1E 4120 0001 00001 38738 LA R2,1 R2 :=00000001 FIN 01
017F22 1832 38739 LR R3,R2 R3 :=00000001 02
017F24 8B30 0008 00008 38740 SLA R3,8 R3 :=00000100 FIN 03
017F28 1744 38741 XR R4,R4 R4 :=00000000 04
017F2A 1643 38742 OR R4,R3 R4 :=00000100 05
017F2C 0640 38743 BCTR R4,0 R4 :=000000FF FIN 06
017F2E 1354 38744 LCR R5,R4 R5 :=FFFFFF01 07
017F30 8950 0002 00002 38745 SLL R5,2 R5 :=FFFFFC04 FIN 08
017F34 1065 38746 LPR R6,R5 R6 :=000003FC 09
017F36 1A61 38747 AR R6,R1 R6 :=000003FD 10
017F38 1961 38748 CR R6,R1 != 11
017F3A 4780 C092 17F92 38749 BE T989BAD 12
017F3E 1173 38750 LNR R7,R3 R7 :=FFFFFF00 13
017F40 1476 38751 NR R7,R6 R7 :=00000300 14
017F42 8A70 0002 00002 38752 SRA R7,2 R7 :=000000C0 15
017F46 1B74 38753 SR R7,R4 R7 :=FFFFFFC1 16
017F48 1283 38754 LTR R8,R3 R8 :=00000100 17
017F4A 8880 0001 00001 38755 SRL R8,1 R8 :=00000080 18
017F4E 1E83 38756 ALR R8,R3 R8 :=00000180 19
017F50 1F87 38757 SLR R8,R7 R8 :=000001BF 20
017F52 1583 38758 CLR R8,R3 != 21
017F54 4780 C092 17F92 38759 BE T989BAD 22
017F58 4190 025A 0025A 38760 LA R9,602 R9 :=0000025A 23
017F5C 1794 38761 XR R9,R4 R9 :=000002A5 FIN 24
017F5E 12A9 38762 LTR R10,R9 R10:=000002A5 25
017F60 1AA9 38763 AR R10,R9 R10:=000004FF 26
017F62 16A5 38764 OR R10,R5 R10:=FFFFFCFF 27
017F64 106A 38765 LPR R6,R10 R6 :=00000301 28
017F66 1E64 38766 ALR R6,R4 R6 :=00000400 29
017F68 8B60 0001 00001 38767 SLA R6,1 R6 :=00000800 30
017F6C 1B69 38768 SR R6,R9 R6 :=0000055B 31
017F6E 0660 38769 BCTR R6,0 R6 :=0000055A 32
017F70 1465 38770 NR R6,R5 R6 :=00000400 33
017F72 8A60 0005 00005 38771 SRA R6,5 R6 :=00000020 34
017F76 1964 38772 CR R6,R4 != 35
017F78 1176 38773 LNR R7,R6 R7 :=FFFFFFC0 36
017F7A 8970 0002 00002 38774 SLL R7,2 R7 :=FFFFFF00 37
017F7E 1F72 38775 SLR R7,R2 R7 :=FFFFFEFF 38
017F80 1387 38776 LCR R8,R7 R8 :=00000101 39
017F82 06FB 38777 BCTR R15,R11
PAGE 708
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
38778 TSIMRET
017F84 58F0 C098 17F98 38779+ L R15,=A(SAVETST) R15 := current save area
017F88 58DF 0004 00004 38780+ L R13,4(R15) get old save area back
017F8C 98EC D00C 0000C 38781+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
017F90 07FE 38782+ BR 14 RETURN 02000000
38783 *
017F92 38784 DS 0H
38785 T989BAD ABEND 60
017F92 38786+T989BAD DS 0H 00400002
017F92 4110 003C 0003C 38787+ LA 1,60 LOAD PARAMETER REG 1 01900002
017F96 0A0D 38788+ SVC 13 LINK TO ABEND ROUTINE 02050002
38789 TSIMEND
017F98 38790+ LTORG
017F98 00000458 38791 =A(SAVETST)
17F9C 38792+T989TEND EQU *
38793 *
38794 * Test 990 -- Mix Int RR 1st 40 ----------------------------
38795 *
38796 TSIMBEG T990,20000,1,1,C'T700 1st 40',DIS=1
38797+*
0049A4 38798+TDSCDAT CSECT
0049A8 38799+ DS 0D
38800+*
0049A8 00017FA0 38801+T990TDSC DC A(T990) // TENTRY
0049AC 000000A4 38802+ DC A(T990TEND-T990) // TLENGTH
0049B0 00004E20 38803+ DC F'20000' // TLRCNT
0049B4 00000001 38804+ DC F'1' // TIGCNT
0049B8 00000001 38805+ DC F'1' // TLTYPE
0021BC 38806+TEXT CSECT
0021BC E3F9F9F0 38807+SPTR3657 DC C'T990'
0049BC 38808+TDSCDAT CSECT
0049BC 38809+ DS 0F
0049BC 040021BC 38810+ DC AL1(L'SPTR3657),AL3(SPTR3657)
0021C0 38811+TEXT CSECT
0021C0 E3F7F0F040F1A2A3 38812+SPTR3658 DC C'T700 1st 40'
0049C0 38813+TDSCDAT CSECT
0049C0 38814+ DS 0F
0049C0 0B0021C0 38815+ DC AL1(L'SPTR3658),AL3(SPTR3658)
38816+*
004E60 38817+TDSCTBL CSECT
04E60 38818+T990TPTR EQU *
004E60 010049A8 38819+ DC X'01',AL3(T990TDSC) disabled test
38820+*
017F9C 38821+TCODE CSECT
017FA0 38822+ DS 0D ensure double word alignment for test
017FA0 38823+T990 DS 0H 01650000
017FA0 90EC D00C 0000C 38824+ STM 14,12,12(13) SAVE REGISTERS 02950000
017FA4 18CF 38825+ LR R12,R15 base register := entry address
17FA0 38826+ USING T990,R12 declare code base register
017FA6 41B0 C01E 17FBE 38827+ LA R11,T990L load loop target to R11
017FAA 58F0 C0A0 18040 38828+ L R15,=A(SAVETST) R15 := current save area
017FAE 50DF 0004 00004 38829+ ST R13,4(R15) set back pointer in current save area
017FB2 182D 38830+ LR R2,R13 remember callers save area
017FB4 18DF 38831+ LR R13,R15 setup current save area
017FB6 50D2 0008 00008 38832+ ST R13,8(R2) set forw pointer in callers save area
PAGE 709
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
00000 38833+ USING TDSC,R1 declare TDSC base register
017FBA 58F0 1008 00008 38834+ L R15,TLRCNT load local repeat count to R15
38835+*
38836 *
17FBE 38837 T990L EQU *
017FBE 4120 0001 00001 38838 LA R2,1 R2 :=00000001 FIN 01
017FC2 1832 38839 LR R3,R2 R3 :=00000001 02
017FC4 8B30 0008 00008 38840 SLA R3,8 R3 :=00000100 FIN 03
017FC8 1744 38841 XR R4,R4 R4 :=00000000 04
017FCA 1643 38842 OR R4,R3 R4 :=00000100 05
017FCC 0640 38843 BCTR R4,0 R4 :=000000FF FIN 06
017FCE 1354 38844 LCR R5,R4 R5 :=FFFFFF01 07
017FD0 8950 0002 00002 38845 SLL R5,2 R5 :=FFFFFC04 FIN 08
017FD4 1065 38846 LPR R6,R5 R6 :=000003FC 09
017FD6 1A61 38847 AR R6,R1 R6 :=000003FD 10
017FD8 1961 38848 CR R6,R1 != 11
017FDA 4780 C094 18034 38849 BE T990BAD 12
017FDE 1173 38850 LNR R7,R3 R7 :=FFFFFF00 13
017FE0 1476 38851 NR R7,R6 R7 :=00000300 14
017FE2 8A70 0002 00002 38852 SRA R7,2 R7 :=000000C0 15
017FE6 1B74 38853 SR R7,R4 R7 :=FFFFFFC1 16
017FE8 1283 38854 LTR R8,R3 R8 :=00000100 17
017FEA 8880 0001 00001 38855 SRL R8,1 R8 :=00000080 18
017FEE 1E83 38856 ALR R8,R3 R8 :=00000180 19
017FF0 1F87 38857 SLR R8,R7 R8 :=000001BF 20
017FF2 1583 38858 CLR R8,R3 != 21
017FF4 4780 C094 18034 38859 BE T990BAD 22
017FF8 4190 025A 0025A 38860 LA R9,602 R9 :=0000025A 23
017FFC 1794 38861 XR R9,R4 R9 :=000002A5 FIN 24
017FFE 12A9 38862 LTR R10,R9 R10:=000002A5 25
018000 1AA9 38863 AR R10,R9 R10:=000004FF 26
018002 16A5 38864 OR R10,R5 R10:=FFFFFCFF 27
018004 106A 38865 LPR R6,R10 R6 :=00000301 28
018006 1E64 38866 ALR R6,R4 R6 :=00000400 29
018008 8B60 0001 00001 38867 SLA R6,1 R6 :=00000800 30
01800C 1B69 38868 SR R6,R9 R6 :=0000055B 31
01800E 0660 38869 BCTR R6,0 R6 :=0000055A 32
018010 1465 38870 NR R6,R5 R6 :=00000400 33
018012 8A60 0005 00005 38871 SRA R6,5 R6 :=00000020 34
018016 1964 38872 CR R6,R4 != 35
018018 1176 38873 LNR R7,R6 R7 :=FFFFFFC0 36
01801A 8970 0002 00002 38874 SLL R7,2 R7 :=FFFFFF00 37
01801E 1F72 38875 SLR R7,R2 R7 :=FFFFFEFF 38
018020 1387 38876 LCR R8,R7 R8 :=00000101 39
018022 1583 38877 CLR R8,R3 != 40
018024 06FB 38878 BCTR R15,R11
38879 TSIMRET
018026 58F0 C0A0 18040 38880+ L R15,=A(SAVETST) R15 := current save area
01802A 58DF 0004 00004 38881+ L R13,4(R15) get old save area back
01802E 98EC D00C 0000C 38882+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000
018032 07FE 38883+ BR 14 RETURN 02000000
38884 *
018034 38885 DS 0H
38886 T990BAD ABEND 60
018034 38887+T990BAD DS 0H 00400002
PAGE 710
LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 10.11 01/05/19
018034 4110 003C 0003C 38888+ LA 1,60 LOAD PARAMETER REG 1 01900002
018038 0A0D 38889+ SVC 13 LINK TO ABEND ROUTINE 02050002
38890 TSIMEND
018040 38891+ LTORG
018040 00000458 38892 =A(SAVETST)
18044 38893+T990TEND EQU *
38894 *
38895 * END OF TESTS ==================================================
38896 *
38897 * Remember end of TDSCTBL ----------------------------------
38898 *
004E64 38899 TDSCTBL CSECT
04E64 38900 TDSCTBLE EQU *
38901 *
38902 * other defs and end -------------------------------------------------
38903 *
38904 YREGS ,
00000 38906+R0 EQU 0 00060000
00001 38907+R1 EQU 1 00070000
00002 38908+R2 EQU 2 00080000
00003 38909+R3 EQU 3 00090000
00004 38910+R4 EQU 4 00100000
00005 38911+R5 EQU 5 00110000
00006 38912+R6 EQU 6 00120000
00007 38913+R7 EQU 7 00130000
00008 38914+R8 EQU 8 00140000
00009 38915+R9 EQU 9 00150000
0000A 38916+R10 EQU 10 00160000
0000B 38917+R11 EQU 11 00170000
0000C 38918+R12 EQU 12 00180000
0000D 38919+R13 EQU 13 00190000
0000E 38920+R14 EQU 14 00200000
0000F 38921+R15 EQU 15 00210000
00000 38923 FR0 EQU 0
00002 38924 FR2 EQU 2
00004 38925 FR4 EQU 4
00006 38926 FR6 EQU 6
000000 38927 END MAIN define main entry point
ASSEMBLER DIAGNOSTICS AND STATISTICS PAGE 711
ASM 0201 10.11 01/05/19
NO STATEMENTS FLAGGED IN THIS ASSEMBLY
HIGHEST SEVERITY WAS 0
OPTIONS FOR THIS ASSEMBLY
ALIGN, ALOGIC, BUFSIZE(MAX), NODECK, ESD, FLAG(0), LINECOUNT(55), LIST, NOMCALL, YFLAG, WORKSIZE(2097152)
NOMLOGIC, NONUMBER, OBJECT, NORENT, NORLD, NOSTMT, NOLIBMAC, NOTERMINAL, NOTEST, NOXREF(SHORT)
SYSPARM()
WORK FILE BUFFER SIZE/NUMBER =32758/15
TOTAL RECORDS READ FROM SYSTEM INPUT 6814
TOTAL RECORDS READ FROM SYSTEM LIBRARY 4151
TOTAL RECORDS PUNCHED 3580
TOTAL RECORDS PRINTED 40420
F64-LEVEL LINKAGE EDITOR OPTIONS SPECIFIED MAP,LIST,LET,NCAL,SIZE=(512000,122880)
DEFAULT OPTION(S) USED - SIZE=(481280,92160)
MODULE MAP
CONTROL SECTION ENTRY
NAME ORIGIN LENGTH NAME LOCATION NAME LOCATION NAME LOCATION NAME LOCATION
MAIN 00 DEE
TEXT DF0 13DB
SIOSDATA 21D0 198
DATA 2368 180
TDSCDAT 24E8 24DC
TDSCTBL 49C8 49C
TCODE 4E68 131DC
T330CS 18048 68
T702CS 180B0 40
ENTRY ADDRESS 00
TOTAL LENGTH 180F0
****GO DOES NOT EXIST BUT HAS BEEN ADDED TO DATA SET
AUTHORIZATION CODE IS 0.
PERF000I VERS: s370_perf V0.9.8 rev 1026 2018-05-27
PERF001I PARM: /G001/OPTT
ind tag lr ig lt addr length
0 T100 22000 100 1 000AAD78 252
1 T101 17000 100 1 000AAE78 452
2 T102 13000 50 1 000AB040 256
3 T103 12000 50 1 000AB140 268
4 T104 10000 50 1 000AB250 254
5 T105 10000 50 1 000AB350 268
6 T106 15000 100 1 000AB460 252
7 T107 13000 100 1 000AB560 264
8 T108 13000 100 1 000AB668 264
9 T109 13000 100 1 000AB770 264
10 T110 13000 50 1 000AB878 260
11 T111 12000 50 1 000AB980 268
12 T112 10000 50 1 000ABA90 252
13 T113 10000 50 1 000ABB90 260
14 T114 10000 50 1 000ABC98 268
15 T115 11000 50 1 000ABDA8 252
16 T116 8000 50 1 000ABEA8 260
17 T117 7000 50 1 000ABFB0 260
18 T118 10000 50 1 000AC0B8 260
19 T120 9000 50 1 000AC1C0 260
20 T121 6500 50 1 000AC2C8 276
21 T122 5000 50 1 000AC3E0 316
22 T123 9000 50 1 000AC520 260
23 T124 6000 50 1 000AC628 276
24 T125 5000 50 2 000AC740 300
25 T150 5000 50 1 000AC870 364
26 T151 5000 50 1 000AC9E0 372
27 T152 5000 50 1 000ACB58 388
28 T153 5000 50 1 000ACCE0 412
29 T154 4000 50 1 000ACE80 556
30 T155 7500 20 1 000AD0B0 676
31 T156 700 20 1 000AD358 428
32 T157 7500 20 1 000AD508 452
33 T160 6000 100 1 000AD6D0 452
34 T161 5000 50 1 000AD898 372
35 T162 7000 20 1 000ADA10 236
36 T165 5000 50 1 000ADB00 372
37 T166 7000 20 1 000ADC78 236
38 T167 3500 20 1 000ADD68 196
39 T168 1200 20 1 000ADE30 236
40 T169 350 20 1 000ADF20 372
41 T170 13000 10 1 000AE098 220
42 T171 11000 10 1 000AE178 220
43 T172 9000 10 1 000AE258 220
44 T173 4500 10 1 000AE338 220
45 T174 1400 10 1 000AE418 184
46 T175 15000 10 1 000AE4D0 212
47 T176 10000 10 1 000AE5A8 212
48 T177 4500 10 1 000AE680 200
49 T178 21000 10 1 000AE748 1260
50 T179 4000 10 1 000AEC38 1356
51 T190 6000 100 1 000AF188 460
52 T191 3000 100 1 000AF358 460
53 T192 3000 100 1 000AF528 460
54 T193 4000 100 1 000AF6F8 460
55 T200 14000 100 1 000AF8C8 260
56 T201 10000 50 1 000AF9D0 256
57 T202 10000 50 1 000AFAD0 254
58 T203 17000 100 1 000AFBD0 260
59 T204 10000 50 1 000AFCD8 256
60 T205 14000 100 1 000AFDD8 260
61 T206 10000 50 1 000AFEE0 256
62 T207 10000 50 1 000AFFE0 254
63 T208 17000 100 1 000B00E0 260
64 T209 10000 50 1 000B01E8 256
65 T210 30000 30 4 000B02E8 124
66 T211 15000 30 4 000B0368 184
67 T212 15000 30 4 000B0420 182
68 T215 14000 20 3 000B04D8 144
69 T216 11000 20 3 000B0568 188
70 T220 24000 30 4 000B0628 180
71 T221 12000 60 5 000B06E0 300
72 T222 30000 30 4 000B0810 180
73 T223 12000 60 5 000B08C8 300
74 T224 30000 30 4 000B09F8 180
75 T225 12000 60 5 000B0AB0 300
76 T230 15000 100 1 000B0BE0 260
77 T231 10000 50 1 000B0CE8 256
78 T232 10000 50 1 000B0DE8 252
79 T235 4500 50 1 000B0EE8 380
80 T236 2500 20 1 000B1068 380
81 T237 1000 20 1 000B11E8 684
82 T238 13000 100 1 000B1498 260
83 T239 14000 100 1 000B15A0 260
84 T240 35000 30 4 000B16A8 180
85 T241 13000 60 5 000B1760 300
86 T242 35000 30 4 000B1890 180
87 T243 13000 60 5 000B1948 300
88 T244 35000 30 4 000B1A78 180
89 T245 14000 60 5 000B1B30 300
90 T250 10000 50 1 000B1C60 252
91 T252 3500 50 1 000B1D60 376
92 T253 1600 20 1 000B1ED8 288
93 T254 700 20 1 000B1FF8 432
94 T255 1200 50 1 000B21A8 624
95 T256 300 20 1 000B2418 440
96 T257 130 20 1 000B25D0 440
97 T258 2500 20 1 000B2788 448
98 T259 300 20 1 000B2948 448
99 T260 17000 100 1 000B2B08 260
100 T261 11000 50 1 000B2C10 256
101 T262 12000 50 1 000B2D10 254
102 T263 18000 100 1 000B2E10 260
103 T264 12000 50 1 000B2F18 256
104 T265 10000 50 1 000B3018 252
105 T266 8000 50 1 000B3118 260
106 T270 7000 20 1 000B3220 180
107 T271 8000 20 1 000B32D8 196
108 T272 5000 20 1 000B33A0 204
109 T273 8000 20 1 000B3470 236
110 T274 2900 20 1 000B3560 372
111 T275 8000 20 1 000B36D8 372
112 T276 1500 20 1 000B3850 676
113 T277 8000 20 1 000B3AF8 676
114 T280 4500 10 1 000B3DA0 216
115 T281 4500 10 1 000B3E78 216
116 T282 600 10 1 000B3F50 216
117 T283 220 10 1 000B4028 216
118 -T284 80 10 1 000B4100 216
119 -T285 5 10 1 000B41D8 216
120 T290 6000 20 1 000B42B0 196
121 T291 6000 20 1 000B4378 188
122 T292 1400 20 1 000B4438 188
123 T295 6000 20 1 000B44F8 212
124 T296 6000 20 1 000B45D0 204
125 T297 1400 20 1 000B46A0 204
126 T300 20000 100 1 000B4770 252
127 T301 22000 100 1 000B4870 460
128 T302 12000 60 1 000B4A40 320
129 T303 6000 60 1 000B4B80 4424
130 T304 70000 10 1 000B5CC8 116
131 T305 45000 10 1 000B5D40 4220
132 T310 15000 100 1 000B6DC0 264
133 T311 700000 1 0 000B6EC8 52
134 T312 600000 1 0 000B6F00 52
135 T315 6000 100 6 000B6F38 68
136 T320 8000 50 1 000B6F80 156
137 T321 2500 50 1 000B7020 160
138 T322 7000 50 1 000B70C0 252
139 T323 3500 50 1 000B71C0 264
140 T324 8000 50 1 000B72C8 156
141 T325 7000 50 1 000B7368 252
142 T330 4500 10 1 000B7468 120
143 T400 2500 50 1 000B74E0 260
144 T401 2500 50 1 000B75E8 272
145 T402 6000 20 1 000B76F8 180
146 T403 2500 20 1 000B77B0 196
147 T404 6000 20 1 000B7878 180
148 T405 2500 20 1 000B7930 196
149 T410 3300 10 1 000B79F8 224
150 T411 1200 10 1 000B7AD8 252
151 T415 3300 10 1 000B7BD8 224
152 T420 700 30 7 000B7CB8 252
153 T421 700 30 8 000B7DB8 284
154 T422 700 30 7 000B7ED8 252
155 T423 700 30 8 000B7FD8 284
156 T424 900 20 7 000B80F8 188
157 T425 900 20 8 000B81B8 212
158 T426 1000 10 1 000B8290 228
159 T427 500 10 1 000B8378 340
160 T430 1000 30 1 000B84D0 244
161 T431 1000 30 1 000B85C8 260
162 T440 1600 30 1 000B86D0 244
163 T441 1600 30 1 000B87C8 260
164 T442 1600 30 1 000B88D0 252
165 T443 1600 30 1 000B89D0 252
166 T445 1600 25 8 000B8AD0 236
167 T446 1000 25 8 000B8BC0 236
168 T450 5000 20 1 000B8CB0 180
169 T451 2000 20 1 000B8D68 204
170 T500 10000 100 1 000B8E38 264
171 T501 10000 50 1 000B8F40 256
172 T502 10000 50 1 000B9040 268
173 T503 10000 100 1 000B9150 264
174 T504 10000 100 1 000B9258 264
175 T505 10000 100 1 000B9360 264
176 T506 9000 100 1 000B9468 264
177 T507 8000 100 1 000B9570 268
178 T508 10000 50 1 000B9680 260
179 T509 10000 50 1 000B9788 268
180 T510 8000 50 1 000B9898 160
181 T511 6000 50 1 000B9938 256
182 T512 8000 50 1 000B9A38 160
183 T513 6000 50 1 000B9AD8 256
184 T514 10000 50 9 000B9BD8 172
185 T515 6500 50 9 000B9C88 268
186 T516 5000 50 9 000B9D98 172
187 T517 4000 50 9 000B9E48 268
188 T520 10000 50 1 000B9F58 172
189 T521 6000 50 1 000BA008 268
190 T522 10000 50 9 000BA118 168
191 T523 16000 50 9 000BA1C0 160
192 T530 9000 100 1 000BA260 268
193 T531 10000 50 1 000BA370 260
194 T532 10000 50 1 000BA478 276
195 T533 10000 100 1 000BA590 268
196 T534 10000 100 1 000BA6A0 268
197 T535 10000 100 1 000BA7B0 268
198 T536 10000 100 1 000BA8C0 268
199 T537 7000 100 1 000BA9D0 276
200 T538 10000 50 1 000BAAE8 260
201 T539 10000 50 1 000BABF0 276
202 T540 7000 50 1 000BAD08 164
203 T541 5500 50 1 000BADB0 260
204 T542 7000 50 1 000BAEB8 164
205 T543 5500 50 1 000BAF60 260
206 T544 6000 50 10 000BB068 180
207 T545 4500 50 10 000BB120 276
208 T546 700 50 10 000BB238 180
209 T547 700 50 10 000BB2F0 276
210 T550 8000 50 1 000BB408 180
211 T551 6000 50 1 000BB4C0 276
212 T552 8000 50 10 000BB5D8 180
213 T553 13000 50 10 000BB690 164
214 T560 4000 50 1 000BB738 180
215 T561 3300 50 11 000BB7F0 204
216 T600 1000 10 1 000BB8C0 124
217 T601 19000 100 1 000BB940 252
218 T610 3500 50 1 000BBA40 260
219 T611 3500 50 1 000BBB48 260
220 T620 2300 50 1 000BBC50 452
221 T621 500 50 1 000BBE18 452
222 T700 20000 40 1 000BBFE0 164
223 T701 22000 21 1 000BC088 204
224 T702 22000 21 1 000BC158 144
225 T703 20000 40 1 000BC1E8 172
226 T900 450000 1 1 000BC298 52
227 -T901 400000 2 1 000BC2D0 60
228 -T902 400000 3 1 000BC310 60
229 -T903 200000 4 1 000BC350 60
230 -T904 150000 5 1 000BC390 60
231 -T905 150000 6 1 000BC3D0 68
232 -T906 150000 7 1 000BC418 68
233 -T907 150000 8 1 000BC460 68
234 -T908 150000 9 1 000BC4A8 68
235 -T909 150000 10 1 000BC4F0 76
236 -T910 120000 12 1 000BC540 76
237 -T911 90000 18 1 000BC590 92
238 -T912 70000 25 1 000BC5F0 100
239 -T913 50000 36 1 000BC658 124
240 -T914 45000 50 1 000BC6D8 156
241 -T915 30000 72 1 000BC778 196
242 T920 300000 1 1 000BC840 64
243 -T921 250000 2 1 000BC880 64
244 -T922 200000 3 1 000BC8C0 72
245 -T923 100000 4 1 000BC908 72
246 -T924 100000 5 1 000BC950 80
247 -T925 80000 6 1 000BC9A0 80
248 -T926 70000 7 1 000BC9F0 88
249 -T927 70000 8 1 000BCA48 88
250 -T928 70000 9 1 000BCAA0 96
251 -T929 70000 10 1 000BCB00 96
252 -T930 50000 12 1 000BCB60 104
253 -T931 35000 18 1 000BCBC8 128
254 -T932 25000 25 1 000BCC48 160
255 -T933 20000 36 1 000BCCE8 200
256 -T952 250000 1 1 000BCDB0 60
257 -T953 170000 1 1 000BCDF0 60
258 -T954 140000 1 1 000BCE30 68
259 -T955 120000 1 1 000BCE78 68
260 -T956 105000 1 1 000BCEC0 68
261 -T957 90000 1 1 000BCF08 68
262 -T958 84000 1 1 000BCF50 76
263 -T959 75000 1 1 000BCFA0 76
264 -T960 70000 1 1 000BCFF0 76
265 -T961 65000 1 1 000BD040 84
266 -T962 60000 1 1 000BD098 92
267 -T963 55000 1 1 000BD0F8 92
268 -T964 50000 1 1 000BD158 92
269 -T965 50000 1 1 000BD1B8 100
270 -T966 45000 1 1 000BD220 100
271 -T967 45000 1 1 000BD288 100
272 -T968 40000 1 1 000BD2F0 108
273 -T969 40000 1 1 000BD360 108
274 -T970 40000 1 1 000BD3D0 108
275 -T971 35000 1 1 000BD440 116
276 -T972 35000 1 1 000BD4B8 116
277 -T973 35000 1 1 000BD530 124
278 -T974 30000 1 1 000BD5B0 124
279 -T975 30000 1 1 000BD630 124
280 -T976 30000 1 1 000BD6B0 124
281 -T977 30000 1 1 000BD730 132
282 -T978 30000 1 1 000BD7B8 132
283 -T979 25000 1 1 000BD840 132
284 -T980 25000 1 1 000BD8C8 140
285 -T981 25000 1 1 000BD958 140
286 -T982 25000 1 1 000BD9E8 140
287 -T983 25000 1 1 000BDA78 140
288 -T984 25000 1 1 000BDB08 148
289 -T985 25000 1 1 000BDBA0 148
290 -T986 20000 1 1 000BDC38 148
291 -T987 20000 1 1 000BDCD0 156
292 -T988 20000 1 1 000BDD70 156
293 -T989 20000 1 1 000BDE10 156
294 -T990 20000 1 1 000BDEB0 164
PERF002I run with GMUL= 1
PERF003I start with tests at D57C2AAC 013420C0
tag description : test(s) lr ig lt : inst(usec)
T100 LR R,R : 0.005571 22000 100 1 : 0.002532
T101 LA R,n : 0.005693 17000 100 1 : 0.003349
T102 L R,m : 0.004824 13000 50 1 : 0.007422
T103 L R,m (unal) : 0.005231 12000 50 1 : 0.008719
T104 LH R,m : 0.004241 10000 50 1 : 0.008483
T105 LH R,m (unal3) : 0.004781 10000 50 1 : 0.009563
T106 LTR R,R : 0.005206 15000 100 1 : 0.003471
T107 LCR R,R : 0.004694 13000 100 1 : 0.003611
T108 LNR R,R : 0.004430 13000 100 1 : 0.003408
T109 LPR R,R : 0.004844 13000 100 1 : 0.003726
T110 ST R,m : 0.004626 13000 50 1 : 0.007118
T111 ST R,m (unal) : 0.005026 12000 50 1 : 0.008377
T112 STH R,m : 0.004377 10000 50 1 : 0.008754
T113 STH R,m (unal1) : 0.004509 10000 50 1 : 0.009019
T114 STH R,m (unal3) : 0.004514 10000 50 1 : 0.009029
T115 STC R,m : 0.004453 11000 50 1 : 0.008097
T116 STCM R,i,m (0010) : 0.004991 8000 50 1 : 0.012479
T117 STCM R,i,m (1100) : 0.004804 7000 50 1 : 0.013727
T118 STCM R,i,m (0111) : 0.004720 10000 50 1 : 0.009441
T120 STM 2,3,m (2r) : 0.004957 9000 50 1 : 0.011016
T121 STM 2,7,m (6r) : 0.004957 6500 50 1 : 0.015252
T122 STM 14,12,m (15r) : 0.005429 5000 50 1 : 0.021718
T123 LM 2,3,m (2r) : 0.005318 9000 50 1 : 0.011819
T124 LM 2,7,m (6r) : 0.004695 6000 50 1 : 0.015650
T125 LM 0,11,m (12r) : 0.005700 5000 50 2 : 0.022802
T150 MVC m,m (5c) : 0.004978 5000 50 1 : 0.019914
T151 MVC m,m (10c) : 0.005628 5000 50 1 : 0.022512
T152 MVC m,m (15c) : 0.005319 5000 50 1 : 0.021278
T153 MVC m,m (30c) : 0.005630 5000 50 1 : 0.022520
T154 MVC m,m (100c) : 0.005716 4000 50 1 : 0.028580
T155 MVC m,m (250c) : 0.005317 7500 20 1 : 0.035450
T156 MVC m,m (250c,over1) : 0.005628 700 20 1 : 0.402036
T157 MVC m,m (250c,over2) : 0.005501 7500 20 1 : 0.036673
T160 MVI m,i : 0.004429 6000 100 1 : 0.007382
T161 MVN m,m (10c) : 0.006490 5000 50 1 : 0.025960
T162 MVN m,m (30c) : 0.005952 7000 20 1 : 0.042514
T165 MVZ m,m (10c) : 0.005990 5000 50 1 : 0.023962
T166 MVZ m,m (30c) : 0.005791 7000 20 1 : 0.041368
T167 MVCIN m,m (10c) : 0.006021 3500 20 1 : 0.086021
T168 MVCIN m,m (30c) : 0.005551 1200 20 1 : 0.231312
T169 MVCIN m,m (100c) : 0.005463 350 20 1 : 0.780500
T170 4*Lx;MVCL (10b) : 0.005097 13000 10 1 : 0.039212
T171 4*Lx;MVCL (100b) : 0.005113 11000 10 1 : 0.046486
T172 4*Lx;MVCL (250b) : 0.005079 9000 10 1 : 0.056439
T173 4*Lx;MVCL (1kb) : 0.005401 4500 10 1 : 0.120022
T174 4*LR;MVCL (4kb) : 0.005319 1400 10 1 : 0.379929
T175 4*Lx;MVCL (100b,pad) : 0.005024 15000 10 1 : 0.033497
T176 4*Lx;MVCL (1kb,pad) : 0.005359 10000 10 1 : 0.053595
T177 4*Lx;MVCL (4kb,pad) : 0.006002 4500 10 1 : 0.133389
T178 4*LA;MVCL (1kb,over1) : 0.005806 21000 10 1 : 0.027648
T179 4*LA;MVCL (1kb,over2) : 0.005158 4000 10 1 : 0.128950
T190 IC R,m : 0.005085 6000 100 1 : 0.008475
T191 ICM R,i,m (0010) : 0.006028 3000 100 1 : 0.020093
T192 ICM R,i,m (1100) : 0.006620 3000 100 1 : 0.022068
T193 ICM R,i,m (0111) : 0.006623 4000 100 1 : 0.016557
T200 AR R,R : 0.004892 14000 100 1 : 0.003495
T201 A R,m : 0.004771 10000 50 1 : 0.009543
T202 AH R,m : 0.005118 10000 50 1 : 0.010236
T203 ALR R,R : 0.005326 17000 100 1 : 0.003133
T204 AL R,m : 0.005473 10000 50 1 : 0.010947
T205 SR R,R : 0.005392 14000 100 1 : 0.003852
T206 S R,m : 0.004824 10000 50 1 : 0.009648
T207 SH R,m : 0.004972 10000 50 1 : 0.009945
T208 SLR R,R : 0.005330 17000 100 1 : 0.003135
T209 SL R,m : 0.005211 10000 50 1 : 0.010423
T210 MR R,R : 0.004514 30000 30 4 : 0.005016
T211 M R,m : 0.004515 15000 30 4 : 0.010034
T212 MH R,m : 0.004406 15000 30 4 : 0.009791
T215 XR R,R; DR R,R : 0.006320 14000 20 3 : 0.022573
T216 XR R,R; D R,m : 0.006272 11000 20 3 : 0.028511
T220 SLA R,1 : 0.005462 24000 30 4 : 0.007586
T221 SLDA R,1 : 0.005468 12000 60 5 : 0.007595
T222 SRA R,1 : 0.004477 30000 30 4 : 0.004975
T223 SRDA R,1 : 0.004854 12000 60 5 : 0.006742
T224 SRA R,30 : 0.004421 30000 30 4 : 0.004913
T225 SRDA R,60 : 0.004741 12000 60 5 : 0.006585
T230 XR R,R : 0.005125 15000 100 1 : 0.003417
T231 X R,m : 0.004662 10000 50 1 : 0.009324
T232 XI m,i : 0.004799 10000 50 1 : 0.009599
T235 XC m,m (10c) : 0.005523 4500 50 1 : 0.024549
T236 XC m,m (100c) : 0.005615 2500 20 1 : 0.112300
T237 XC m,m (250c) : 0.004991 1000 20 1 : 0.249575
T238 NR R,R : 0.004502 13000 100 1 : 0.003463
T239 OR R,R : 0.004736 14000 100 1 : 0.003383
T240 SLL R,1 : 0.004949 35000 30 4 : 0.004714
T241 SLDL R,1 : 0.004662 13000 60 5 : 0.005978
T242 SRL R,1 : 0.004653 35000 30 4 : 0.004431
T243 SRDL R,1 : 0.004864 13000 60 5 : 0.006237
T244 SLL R,30 : 0.004787 35000 30 4 : 0.004559
T245 SLDL R,60 : 0.005054 14000 60 5 : 0.006017
T250 TM m,i : 0.004170 10000 50 1 : 0.008341
T252 TR m,m (10c) : 0.003643 3500 50 1 : 0.020817
T253 TR m,m (100c) : 0.002530 1600 20 1 : 0.079078
T254 TR m,m (250c) : 0.002345 700 20 1 : 0.167500
T255 TRT m,m (10c,zero) : 0.005097 1200 50 1 : 0.084958
T256 TRT m,m (100c,zero) : 0.004698 300 20 1 : 0.783083
T257 TRT m,m (250c,zero) : 0.005141 130 20 1 : 1.977308
T258 TRT m,m (250c,10b) : 0.004858 2500 20 1 : 0.097160
T259 TRT m,m (250c,100b) : 0.004892 300 20 1 : 0.815417
T260 CR R,R : 0.005636 17000 100 1 : 0.003315
T261 C R,m : 0.004680 11000 50 1 : 0.008510
T262 CH R,m : 0.005259 12000 50 1 : 0.008765
T263 CLR R,R : 0.005615 18000 100 1 : 0.003120
T264 CL R,m : 0.004410 12000 50 1 : 0.007351
T265 CLI m,i : 0.004625 10000 50 1 : 0.009250
T266 CLM R,i,m : 0.005208 8000 50 1 : 0.013020
T270 CLC m,m (10c,eq) : 0.006612 7000 20 1 : 0.047229
T271 CLC m,m (10c,ne) : 0.006108 8000 20 1 : 0.038175
T272 CLC m,m (30c,eq) : 0.006240 5000 20 1 : 0.062400
T273 CLC m,m (30c,ne) : 0.006331 8000 20 1 : 0.039569
T274 CLC m,m (100c,eq) : 0.007017 2900 20 1 : 0.120983
T275 CLC m,m (100c,ne) : 0.006067 8000 20 1 : 0.037919
T276 CLC m,m (250c,eq) : 0.006995 1500 20 1 : 0.233183
T277 CLC m,m (250c,ne) : 0.006102 8000 20 1 : 0.038137
T280 4*LR;CLCL (100b,10b) : 0.005340 4500 10 1 : 0.118667
T281 4*LR;CLCL (4kb,10b) : 0.005889 4500 10 1 : 0.130867
T282 4*LR;CLCL (4kb,100b) : 0.005889 600 10 1 : 0.981500
T283 4*LR;CLCL (4kb,250b) : 0.007480 220 10 1 : 3.400000
T290 LR;CS R,R,m (eq,eq) : 0.002371 6000 20 1 : 0.019758
T291 LR;CS R,R,m (eq,ne) : 0.002361 6000 20 1 : 0.019679
T292 LR;CS R,R,m (ne) : 0.000587 1400 20 1 : 0.020982
T295 LR;CDS R,R,m (eq,eq) : 0.002526 6000 20 1 : 0.021050
T296 LR;CDS R,R,m (eq,ne) : 0.002597 6000 20 1 : 0.021642
T297 LR;CDS R,R,m (ne) : 0.000647 1400 20 1 : 0.023107
T300 BCR 0,0 (noop) : 0.006302 20000 100 1 : 0.003151
T301 BNZ l (no br) : 0.005969 22000 100 1 : 0.002713
T302 BNZ l (do br) : 0.006182 12000 60 1 : 0.008586
T303 BNZ l (do br, far) : 0.006277 6000 60 1 : 0.017437
T304 BR R : 0.004835 70000 10 1 : 0.006908
T305 BR R (far) : 0.006170 45000 10 1 : 0.013711
T310 BCTR R,0 : 0.005036 15000 100 1 : 0.003357
T311 BCTR R,R : 0.005405 700000 1 0 : 0.007722
T312 BCT R,l : 0.005515 600000 1 0 : 0.009192
T315 BXLE R,R,l : 0.006023 6000 100 6 : 0.010038
T320 BALR R,R; BR R : 0.006089 8000 50 1 : 0.015224
T321 BALR R,R; BR R (far) : 0.004391 2500 50 1 : 0.035132
T322 BAL R,l; BR R : 0.005913 7000 50 1 : 0.016894
T323 BAL R,l; BR R (far) : 0.006615 3500 50 1 : 0.037803
T324 BASR R,R; BR R : 0.006114 8000 50 1 : 0.015286
T325 BAS R,l; BR R : 0.006099 7000 50 1 : 0.017427
T330 L;BALR;SAV(14,12);RET : 0.005455 4500 10 1 : 0.121222
T400 CVB R,m : 0.005419 2500 50 1 : 0.043352
T401 CVD R,m : 0.004908 2500 50 1 : 0.039264
T402 PACK m,m (5d) : 0.005097 6000 20 1 : 0.042479
T403 PACK m,m (15d) : 0.005342 2500 20 1 : 0.106850
T404 UNPK m,m (5d) : 0.005999 6000 20 1 : 0.049992
T405 UNPK m,m (15d) : 0.005940 2500 20 1 : 0.118810
T410 MVC;ED (10c) : 0.005566 3300 10 1 : 0.168667
T411 MVC;ED (30c) : 0.005422 1200 10 1 : 0.451833
T415 MVC;EDMK (10c) : 0.005597 3300 10 1 : 0.169621
T420 AP m,m (10d) : 0.005800 700 30 7 : 0.276190
T421 AP m,m (30d) : 0.005688 700 30 8 : 0.270857
T422 SP m,m (10d) : 0.005619 700 30 7 : 0.267595
T423 SP m,m (30d) : 0.005883 700 30 8 : 0.280143
T424 MP m,m (10d) : 0.006255 900 20 7 : 0.347500
T425 MP m,m (30d) : 0.005510 900 20 8 : 0.306111
T426 MVC;DP m,m (10d) : 0.005593 1000 10 1 : 0.559350
T427 MVC;DP m,m (30d) : 0.006548 500 10 1 : 1.309600
T430 CP m,m (10d) : 0.005955 1000 30 1 : 0.198500
T431 CP m,m (30d) : 0.006178 1000 30 1 : 0.205950
T440 ZAP m,m (10d,10d) : 0.005524 1600 30 1 : 0.115094
T441 ZAP m,m (30d,30d) : 0.005573 1600 30 1 : 0.116104
T442 ZAP m,m (10d,30d) : 0.005483 1600 30 1 : 0.114240
T443 ZAP m,m (30d,10d) : 0.005910 1600 30 1 : 0.123125
T445 SRP m,i,i (30d,<<) : 0.005590 1600 25 8 : 0.139750
T446 SRP m,i,i (30d,>>) : 0.005381 1000 25 8 : 0.215240
T450 MVO m,m (10d) : 0.005534 5000 20 1 : 0.055340
T451 MVO m,m (30d) : 0.005831 2000 20 1 : 0.145787
T500 LER R,R : 0.004425 10000 100 1 : 0.004425
T501 LE R,m : 0.004332 10000 50 1 : 0.008665
T502 LE R,m (unal) : 0.004674 10000 50 1 : 0.009348
T503 LTER R,R : 0.004888 10000 100 1 : 0.004888
T504 LCER R,R : 0.004864 10000 100 1 : 0.004864
T505 LNER R,R : 0.004780 10000 100 1 : 0.004780
T506 LPER R,R : 0.004532 9000 100 1 : 0.005036
T507 LRER R,R : 0.005229 8000 100 1 : 0.006537
T508 STE R,m : 0.004379 10000 50 1 : 0.008758
T509 STE R,m (unal) : 0.004558 10000 50 1 : 0.009116
T510 AER R,R : 0.005720 8000 50 1 : 0.014301
T511 AE R,m : 0.005881 6000 50 1 : 0.019603
T512 SER R,R : 0.005922 8000 50 1 : 0.014806
T513 SE R,m : 0.006089 6000 50 1 : 0.020297
T514 MER R,R : 0.004943 10000 50 9 : 0.009887
T515 ME R,m : 0.005083 6500 50 9 : 0.015642
T516 DER R,R : 0.006551 5000 50 9 : 0.026206
T517 DE R,m : 0.005848 4000 50 9 : 0.029240
T520 CER R,R : 0.005773 10000 50 1 : 0.011546
T521 CE R,m : 0.005193 6000 50 1 : 0.017312
T522 AUR R,R : 0.005355 10000 50 9 : 0.010711
T523 HER R,R : 0.005279 16000 50 9 : 0.006599
T530 LDR R,R : 0.004139 9000 100 1 : 0.004599
T531 LD R,m : 0.004844 10000 50 1 : 0.009689
T532 LD R,m (unal) : 0.004755 10000 50 1 : 0.009510
T533 LTDR R,R : 0.005293 10000 100 1 : 0.005293
T534 LCDR R,R : 0.005287 10000 100 1 : 0.005287
T535 LNDR R,R : 0.005250 10000 100 1 : 0.005250
T536 LPDR R,R : 0.005360 10000 100 1 : 0.005360
T537 LRDR R,R : 0.005347 7000 100 1 : 0.007639
T538 STD R,m : 0.004820 10000 50 1 : 0.009641
T539 STD R,m (unal) : 0.004924 10000 50 1 : 0.009849
T540 ADR R,R : 0.005608 7000 50 1 : 0.016023
T541 AD R,m : 0.005951 5500 50 1 : 0.021640
T542 SDR R,R : 0.005650 7000 50 1 : 0.016143
T543 SD R,m : 0.005747 5500 50 1 : 0.020900
T544 MDR R,R : 0.005309 6000 50 10 : 0.017697
T545 MD R,m : 0.005255 4500 50 10 : 0.023358
T546 DDR R,R : 0.007280 700 50 10 : 0.208000
T547 DD R,m : 0.007566 700 50 10 : 0.216171
T550 CDR R,R : 0.005361 8000 50 1 : 0.013404
T551 CD R,m : 0.005291 6000 50 1 : 0.017637
T552 AWR R,R : 0.005160 8000 50 10 : 0.012901
T553 HDR R,R : 0.005152 13000 50 10 : 0.007927
T560 AXR R,R : 0.004824 4000 50 1 : 0.024122
T561 MXR R,R : 0.005500 3300 50 11 : 0.033336
T600 STCK m : 0.000980 1000 10 1 : 0.097987
T601 SPM R : 0.005948 19000 100 1 : 0.003130
T610 EX R,i (with TM) : 0.004989 3500 50 1 : 0.028509
T611 EX R,i (with XI) : 0.005176 3500 50 1 : 0.029577
T620 MVI;TS m (zero) : 0.002811 2300 50 1 : 0.024448
T621 MVI;TS m (ones) : 0.000585 500 50 1 : 0.023420
T700 mix int RR basic : 0.003106 20000 40 1 : 0.003882
T701 mix int RX : 0.004995 22000 21 1 : 0.010813
T702 mix int RX (far) : 0.005013 22000 21 1 : 0.010852
T703 mix int RR noopt : 0.003107 20000 40 1 : 0.003884
T900 LR R,R (ig=1) : 0.004192 450000 1 1 : 0.009317
T920 L R,m (ig=1) : 0.003628 300000 1 1 : 0.012093
PERF004I done with tests at D57C2AAD 1F1400C0 dt= 1.170942