J E S 2 J O B L O G 16.23.04 JOB 8 IEF677I WARNING MESSAGE(S) FOR JOB PERF#ASM ISSUED 16.23.04 JOB 8 $HASP373 PERF#ASM STARTED - INIT 6 - CLASS C - SYS TK4- 16.23.04 JOB 8 IEF403I PERF#ASM - STARTED - TIME=16.23.04 16.23.07 JOB 8 IEFACTRT - Stepname Procstep Program Retcode 16.23.07 JOB 8 PERF#ASM CLG ASM IFOX00 RC= 0000 16.23.08 JOB 8 PERF#ASM CLG LKED IEWL RC= 0000 16.23.09 JOB 8 PERF#ASM CLG GO PGM=*.DD RC= 0000 16.23.09 JOB 8 IEF404I PERF#ASM - ENDED - TIME=16.23.09 16.23.09 JOB 8 $HASP395 PERF#ASM ENDED ------ JES2 JOB STATISTICS ------ 18 APR 20 JOB EXECUTION DATE 6,834 CARDS READ 41,141 SYSOUT PRINT RECORDS 0 SYSOUT PUNCH RECORDS 0.07 MINUTES EXECUTION TIME 1 //PERF#ASM JOB 'S322-0C4','WFJM', JOB 8 // CLASS=C,MSGCLASS=A,MSGLEVEL=(1,1), // REGION=2500K,TIME=(2,0),PRTY=8 ***JOBPARM ROOM=4242 2 //CLG EXEC ASMFCLG, // MAC1='SYS2.MACLIB', // MAC2='SYS1.AMODGEN', // MAC3='SYS1.MACLIB', // PARM.ASM='NOXREF,NORLD,NODECK,LOAD,BUFSIZE(MAX)', // PARM.LKED='MAP,LIST,LET,NCAL,SIZE=(512000,122880)', // COND.LKED=(8,LE,ASM), // PARM.GO='/G001/OPTT', // COND.GO=((8,LE,ASM),(4,LT,LKED)) 3 XXASMFCLG PROC MAC='SYS1.MACLIB',MAC1='SYS1.MACLIB', 00000100 XX MAC2='SYS1.MACLIB',MAC3='SYS1.MACLIB',SOUT='*' 00000200 4 XXASM EXEC PGM=IFOX00,PARM=OBJ,REGION=128K 00000300 5 XXSYSLIB DD DSN=&MAC,DISP=SHR 00000400 6 XX DD DSN=&MAC1,DISP=SHR 00000500 7 XX DD DSN=&MAC2,DISP=SHR 00000600 8 XX DD DSN=&MAC3,DISP=SHR 00000700 9 //ASM.SYSUT1 DD DSN=&&SYSUT1,UNIT=SYSDA,SPACE=(1700,(600,100)) X/SYSUT1 DD DSN=&&SYSUT1,UNIT=SYSSQ,SPACE=(1700,(600,100)), 00000800 XX SEP=(SYSLIB) 00000900 10 //ASM.SYSUT2 DD DSN=&&SYSUT2,UNIT=SYSDA,SPACE=(1700,(900,200)) X/SYSUT2 DD DSN=&&SYSUT2,UNIT=SYSSQ,SPACE=(1700,(300,50)), 00001000 XX SEP=(SYSLIB,SYSUT1) 00001100 11 //ASM.SYSUT3 DD DSN=&&SYSUT3,UNIT=SYSDA,SPACE=(1700,(900,200)) X/SYSUT3 DD DSN=&&SYSUT3,UNIT=SYSSQ,SPACE=(1700,(300,50)) 00001200 12 XXSYSPRINT DD SYSOUT=&SOUT,DCB=BLKSIZE=1089 00001300 13 XXSYSPUNCH DD SYSOUT=B 00001400 14 //ASM.SYSGO DD DSN=&&OBJSET,UNIT=SYSDA,SPACE=(80,(2000,500)) X/SYSGO DD DSN=&&OBJSET,UNIT=SYSSQ,SPACE=(80,(200,50)), 00001500 XX DISP=(MOD,PASS) 00001600 15 //ASM.SYSIN DD * 16 XXLKED EXEC PGM=IEWL,PARM=(XREF,LET,LIST,NCAL),REGION=128K, 00001700 XX COND=(8,LT,ASM) 00001800 17 XXSYSLIN DD DSN=&&OBJSET,DISP=(OLD,DELETE) 00001900 18 XX DD DDNAME=SYSIN 00002000 19 XXSYSLMOD DD DSN=&&GOSET(GO),UNIT=SYSDA,SPACE=(1024,(50,20,1)), 00002100 XX DISP=(MOD,PASS) 00002200 20 XXSYSUT1 DD DSN=&&SYSUT1,UNIT=(SYSDA,SEP=(SYSLIN,SYSLMOD)), 00002300 XX SPACE=(1024,(50,20)) 00002400 21 XXSYSPRINT DD SYSOUT=&SOUT 00002500 22 XXGO EXEC PGM=*.LKED.SYSLMOD,COND=((8,LT,ASM),(4,LT,LKED)) 00002600 23 //GO.SYSUDUMP DD SYSOUT=*,OUTLIM=2000 24 //GO.SYSPRINT DD SYSOUT=*,OUTLIM=5000 25 //GO.SYSIN DD * // STMT NO. MESSAGE - 5 IEF653I SUBSTITUTION JCL - DSN=SYS1.MACLIB,DISP=SHR 6 IEF653I SUBSTITUTION JCL - DSN=SYS2.MACLIB,DISP=SHR 7 IEF653I SUBSTITUTION JCL - DSN=SYS1.AMODGEN,DISP=SHR 8 IEF653I SUBSTITUTION JCL - DSN=SYS1.MACLIB,DISP=SHR 12 IEF653I SUBSTITUTION JCL - SYSOUT=*,DCB=BLKSIZE=1089 21 IEF653I SUBSTITUTION JCL - SYSOUT=* 22 IEF686I DDNAME REFERRED TO ON DDNAME KEYWORD IN PRIOR STEP WAS NOT RESOLVED IEF236I ALLOC. FOR PERF#ASM ASM CLG IEF237I 148 ALLOCATED TO SYSLIB IEF237I 148 ALLOCATED TO IEF237I 248 ALLOCATED TO IEF237I 148 ALLOCATED TO IEF237I 190 ALLOCATED TO SYSUT1 IEF237I 140 ALLOCATED TO SYSUT2 IEF237I 180 ALLOCATED TO SYSUT3 IEF237I JES2 ALLOCATED TO SYSPRINT IEF237I JES2 ALLOCATED TO SYSPUNCH IEF237I 170 ALLOCATED TO SYSGO IEF237I JES2 ALLOCATED TO SYSIN IEF142I PERF#ASM ASM CLG - STEP WAS EXECUTED - COND CODE 0000 IEF285I SYS1.MACLIB KEPT *-------44 IEF285I VOL SER NOS= MVSRES. IEF285I SYS2.MACLIB KEPT *--------0 IEF285I VOL SER NOS= MVSRES. IEF285I SYS1.AMODGEN KEPT *--------0 IEF285I VOL SER NOS= MVSDLB. IEF285I SYS1.MACLIB KEPT *--------0 IEF285I VOL SER NOS= MVSRES. IEF285I SYS20109.T162304.RA000.PERF#ASM.SYSUT1 DELETED *----4,041 IEF285I VOL SER NOS= WORK03. IEF285I SYS20109.T162304.RA000.PERF#ASM.SYSUT2 DELETED *------223 IEF285I VOL SER NOS= WORK00. IEF285I SYS20109.T162304.RA000.PERF#ASM.SYSUT3 DELETED *------334 IEF285I VOL SER NOS= WORK02. IEF285I JES2.JOB00008.SO0103 SYSOUT IEF285I JES2.JOB00008.SO0104 SYSOUT IEF285I SYS20109.T162304.RA000.PERF#ASM.OBJSET PASSED *----3,580 IEF285I VOL SER NOS= WORK01. IEF285I JES2.JOB00008.SI0101 SYSIN IEF373I STEP /ASM / START 20109.1623 IEF374I STEP /ASM / STOP 20109.1623 CPU 0MIN 02.13SEC SRB 0MIN 00.29SEC VIRT 2108K SYS 216K ************************************************************************************************************************************ * 1. Jobstep of job: PERF#ASM Stepname: ASM Program name: IFOX00 Executed on 18.04.20 from 16.23.04 to 16.23.07 * * elapsed time 00:00:02,86 CPU-Identifier: TK4- Page-in: 0 * * CPU time 00:00:02,42 Virtual Storage used: 2108K Page-out: 0 * * corr. CPU: 00:00:02,42 CPU time has been corrected by 1 / 1,0 multiplier * * * * I/O Operation * * Number of records read via DD * or DD DATA: 6810 * * 148......44 148.......0 248.......0 148.......0 190....4041 140.....223 180.....334 DMY.......0 DMY.......0 170....3580 * * DMY.......0 * * * * Charge for step (w/o SYSOUT): 4,03 * ************************************************************************************************************************************ IEF236I ALLOC. FOR PERF#ASM LKED CLG IEF237I 170 ALLOCATED TO SYSLIN IEF237I DMY ALLOCATED TO IEF237I 180 ALLOCATED TO SYSLMOD IEF237I 190 ALLOCATED TO SYSUT1 IEF237I JES2 ALLOCATED TO SYSPRINT IEF142I PERF#ASM LKED CLG - STEP WAS EXECUTED - COND CODE 0000 IEF285I SYS20109.T162304.RA000.PERF#ASM.OBJSET DELETED *----3,581 IEF285I VOL SER NOS= WORK01. IEF285I SYS20109.T162304.RA000.PERF#ASM.GOSET PASSED *-------50 IEF285I VOL SER NOS= WORK02. IEF285I SYS20109.T162304.RA000.PERF#ASM.SYSUT1 DELETED *----1,640 IEF285I VOL SER NOS= WORK03. IEF285I JES2.JOB00008.SO0105 SYSOUT IEF373I STEP /LKED / START 20109.1623 IEF374I STEP /LKED / STOP 20109.1623 CPU 0MIN 00.35SEC SRB 0MIN 00.13SEC VIRT 504K SYS 212K ************************************************************************************************************************************ * 2. Jobstep of job: PERF#ASM Stepname: LKED Program name: IEWL Executed on 18.04.20 from 16.23.07 to 16.23.08 * * elapsed time 00:00:00,58 CPU-Identifier: TK4- Page-in: 0 * * CPU time 00:00:00,48 Virtual Storage used: 504K Page-out: 0 * * corr. CPU: 00:00:00,48 CPU time has been corrected by 1 / 1,0 multiplier * * * * I/O Operation * * Number of records read via DD * or DD DATA: 0 * * 170....3581 DMY.......0 180......50 190....1640 DMY.......0 * * * * Charge for step (w/o SYSOUT): 0,80 * ************************************************************************************************************************************ IEF236I ALLOC. FOR PERF#ASM GO CLG IEF237I 180 ALLOCATED TO PGM=*.DD IEF237I JES2 ALLOCATED TO SYSUDUMP IEF237I JES2 ALLOCATED TO SYSPRINT IEF237I JES2 ALLOCATED TO SYSIN IEF142I PERF#ASM GO CLG - STEP WAS EXECUTED - COND CODE 0000 IEF285I SYS20109.T162304.RA000.PERF#ASM.GOSET KEPT *--------0 IEF285I VOL SER NOS= WORK02. IEF285I JES2.JOB00008.SO0106 SYSOUT IEF285I JES2.JOB00008.SO0107 SYSOUT IEF285I JES2.JOB00008.SI0102 SYSIN IEF373I STEP /GO / START 20109.1623 IEF374I STEP /GO / STOP 20109.1623 CPU 0MIN 00.96SEC SRB 0MIN 00.00SEC VIRT 120K SYS 212K ************************************************************************************************************************************ * 3. Jobstep of job: PERF#ASM Stepname: GO Program name: PGM=*.DD Executed on 18.04.20 from 16.23.08 to 16.23.09 * * elapsed time 00:00:00,97 CPU-Identifier: TK4- Page-in: 0 * * CPU time 00:00:00,96 Virtual Storage used: 120K Page-out: 0 * * corr. CPU: 00:00:00,96 CPU time has been corrected by 1 / 1,0 multiplier * * * * I/O Operation * * Number of records read via DD * or DD DATA: 0 * * 180.......0 DMY.......0 DMY.......0 DMY.......0 * * * * Charge for step (w/o SYSOUT): 1,60 * ************************************************************************************************************************************ IEF237I 180 ALLOCATED TO SYS00001 IEF285I SYS20109.T162309.RA000.PERF#ASM.R0000001 KEPT *--------0 IEF285I VOL SER NOS= WORK02. IEF285I SYS20109.T162304.RA000.PERF#ASM.GOSET DELETED IEF285I VOL SER NOS= WORK02. IEF375I JOB /PERF#ASM/ START 20109.1623 IEF376I JOB /PERF#ASM/ STOP 20109.1623 CPU 0MIN 03.44SEC SRB 0MIN 00.42SEC EXTERNAL SYMBOL DICTIONARY PAGE 1 SYMBOL TYPE ID ADDR LENGTH LDID ASM 0201 16.23 04/18/20 MAIN SD 0001 000000 000DEE TEXT SD 0002 000DF0 0013DB SIOSDATA SD 0003 0021D0 000198 DATA SD 0004 002368 000180 TDSCDAT SD 0005 0024E8 0024DC TDSCTBL SD 0006 0049C8 00049C TCODE SD 0007 004E68 0131DC T330CS SD 0008 018048 000068 T702CS SD 0009 0180B0 000040 PAGE 2 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 1 * 1 2 3 4 5 6 71 2 *23456789*12345*789012345678901234*678901234567890123456789012345678901 3 * $Id: s370_perf.asm 1171 2019-06-28 19:02:57Z mueller $ 4 * SPDX-License-Identifier: GPL-3.0-or-later 5 * Copyright 2017-2019 by Walter F.J. Mueller 6 * 7 * Revision History: (!! update MSGVERS when adding here !!) 8 * Date Rev Version Comment 9 * 2018-05-27 1026 0.9.8 DISBAS substitutable via var SET_DISBAS 10 * 2018-03-30 1003 0.9.7 add and use more ltype codes; add /TCOR 11 * tune T510-T513,T540-T543,T560;fix T551,T553 12 * 2018-03-24 1001 0.9.6 use REPINSN instead of REPINS5 and REPINS2 13 * renames, add T150,T152,T153,T205-T209 14 * add T304,T305,T422,T423,T426,T427 15 * add T512,T513,T542,T543 16 * 2018-03-04 998 0.9.5 add T9**,T703; fix T232 text 17 * 2018-03-03 997 0.9.4 reorganize PARM decode; add /OPCF 18 * 2018-02-25 995 0.9.3 use R11,R12 as base to allow 8k main code 19 * add SETB DISBAS to disable BAS/BASR tests 20 * add /Cxxx, sets GMUL test; /T*** wildcards 21 * add config file handling; use sios path 22 * 2018-02-10 993 0.9.2 add STCK time to PERF003/PERF004 messages 23 * add PERF000 vers info; add warmup T102 run 24 * 2018-01-06 986 0.9.1 rename to s370_perf 25 * 2017-12-16 970 0.9 add /Dxxx and /Exxx params; 8k code support 26 * use 4k buffer for MVCL,CLCL; test renames 27 * add T284-T285,T303,T701,T702,T211,T212,T216 28 * add T116-T117,T191-T192,T156-T158,T161-T162 29 * add T165-T166,T450-T451,T507,T527 30 * 2017-12-10 969 0.8 add ltype flag in TDSC; new output format 31 * use BCTR loop closure; code test D aligned 32 * add REPINS2,REPINS5,REPINSPI,REPINSAL 33 * add T252-T254,T255-T259,T274-T277,T280-T283 34 * add T290-292,T324-T325,T415,T440-T443 35 * add T445-T446,T504-506,T524-526,T295-297 36 * add T620-T621 37 * 2017-12-03 968 0.71 renames, add T310,321,323,238,239,700 38 * 2017-12-02 967 0.7 use relocation by default, add /ORIP 39 * add /OPTT, page aligned 16k bufs 40 * 2017-11-26 966 0.6 add /OTGA /GAUT and T114,T601 41 * 2017-11-12 961 0.5 Initial version 42 * 2017-10-15 956 0.1 First draft 43 * 44 * Description: 45 * Code to determine instruction timing of S/370 non-priviledged 46 * instructions in 24 bit mode. 47 * 48 * Usage: 49 * s370_perf uses the PARM interface to determine job behaviour. The 50 * PARM string is a list of 4 letter options, each starting with a /. 51 * Valid options are: 52 * /OWTO enable step by step MVS console messages 53 * /ODBG enable debug trace output for test steps 54 * /OTGA enable debug trace output for /GAUT processing 55 * /OPCF print config file PAGE 3 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 56 * /OPTT print test table 57 * /ORIP run tests in place (default is relocate) 58 * /GAUT automatic determination of GMUL, aim is 1 sec per test 59 * /Gnnn set GMUL to nnn 60 * /GnnK set GMUL to nn * 1000 61 * /Cnnn use test Tnnn for GMUL calibration (default is C102) 62 * /Ennn enable test Tnnn (n can be digit or '*' wildcard) 63 * /Dnnn disable test Tnnn (dito) 64 * /Tnnn select test Tnnn (dito) 65 * /TCOR select all tests required for loop overhead correction 66 * 67 * Notes on option usage: 68 * 1. GMUL default and start value is 1 69 * 2. if multiple /Gnnn or /GnnK are given the last one is taken 70 * 3. /GAUT will overwrite any previous /Gnnn, but use prior /Gnnn as 71 * start value in the search for GMUL leading to 1 sec test time 72 * 4. if no /Tnnn option is seen all pre-enabled tests are executed 73 * 5. several /Tnnn options can be specified, in this case only these 74 * tests are run 75 * 6. /Dnnn allows to disable an enabled test 76 * 7. /Ennn allows to enable a disabled test 77 * 78 * Configuration file: 79 * read from SYSIN, is optional. Line starting with '#' are ignored 80 * all other lines must have the format 81 * Tnnn e lrcnt 82 * with 83 * Tnnn test name 84 * e enable flag, 0 or 1 (with 4 spaces in front) 85 * lrcnt new LRCNT, 10 digit field, ignored if zero 86 * Main usage of the config file is to redefine the LRCNT of test 87 * when s370_perf is run on systems other than a Hercules emulator. 88 * The config file is processed before the /Tnnn,/Ennn,/Dnnn PARMs. 89 * 90 * Code configuration options via hercjis variable substitutions 91 * SET_DISBAS 0 BAS/BASR tests enabled (default) 92 * 1 BAS/BASR tests disabled 93 * 94 * Return codes: 95 * RC = 0 ok 96 * RC = 4 open SYSPRINT failed 97 * RC = 8 open SYSIN failed 98 * RC = 12 unexpected SYSIN EOF (should never happen) 99 * RC = 16 bad PARMs 100 * RC = 20 execution error, see message on SYSPRINT 101 * 102 * User Abend codes: 103 * 10 test too large (> CBUFSIZE) 104 * 50 unexpected branch taken in test 105 * 60 internal consistency check in test 106 * 255 SOS buffer overflow 107 * 108 * Used CSECTS: 109 * MAIN main program code and local data 110 * TEXT text from otxtdsc PAGE 4 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 111 * SIOSDATA SOS data 112 * TDSCDAT task descriptor list 113 * TDSCTBL task table 114 * TCODE task code 115 * T330CS code for T330 116 * DATA other data 117 * 118 *** PRINT NOGEN don't show macro expansions 119 * 120 * local macros -------------------------------------------------------- 121 * 122 * OTXTDSC - setup text descriptor for simple output system - 123 * 124 MACRO 125 &LABEL OTXTDSC &TEXT 126 TEXT CSECT 127 SPTR&SYSNDX DC &TEXT 128 &SYSECT CSECT 129 DS 0F 130 &LABEL DC AL1(L'SPTR&SYSNDX),AL3(SPTR&SYSNDX) 131 MEND 132 * 133 * used global symbols 134 * type name set by used by comment 135 * GBLA TDIGCNT TDSCGEN REPINS* 136 * GBLC TTAG TSIMBEG TSIMEND 137 * 138 * TDSCGEN - setup test descriptor -------------------------- 139 * 140 MACRO 141 &LABEL TDSCGEN &TAG,&LRCNT,&IGCNT,<YPE,&TEXT 142 GBLA &TDIGCNT 143 &TDIGCNT SETA &IGCNT 144 * 145 &LABEL DC A(&TAG) // TENTRY 146 DC A(&TAG.TEND-&TAG) // TLENGTH 147 DC F'&LRCNT' // TLRCNT 148 DC F'&IGCNT' // TIGCNT 149 DC F'<YPE' // TLTYPE 150 OTXTDSC C'&TAG' // TTAGDSC 151 OTXTDSC &TEXT // TTXTDSC 152 MEND 153 * 154 * TSIMPRE - preamble code for simple test ------------------ 155 * Note: The preamble code starts at a double word boundary. This 156 * ensures that even after relocation the test code has the 157 * same alignments, especially that 'D' type allocations 158 * will stay on double word boundaries. 159 * 160 MACRO 161 &LABEL TSIMPRE &NBASE=1 162 DS 0D ensure double word alignment for test 163 &LABEL SAVE (14,12) 164 AIF (&NBASE GT 1).NBASE2 165 LR R12,R15 base register := entry address PAGE 5 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 166 USING &LABEL,R12 declare code base register 167 LA R11,&LABEL.L load loop target to R11 168 AGO .NBASEOK 169 .NBASE2 ANOP 170 LR R11,R15 base register 1 := entry address 171 LA R12,2048(R11) 172 LA R12,2048(R12) base register 1 := entry address+4k 173 USING &LABEL,R11,R12 declare code base registers 174 LA R10,&LABEL.L load loop target to R10 175 .NBASEOK ANOP 176 L R15,=A(SAVETST) R15 := current save area 177 ST R13,4(R15) set back pointer in current save area 178 LR R2,R13 remember callers save area 179 LR R13,R15 setup current save area 180 ST R13,8(R2) set forw pointer in callers save area 181 USING TDSC,R1 declare TDSC base register 182 L R15,TLRCNT load local repeat count to R15 183 MEND 184 * 185 * TSIMRET - return code for simple test -------------------- 186 * 187 MACRO 188 &LABEL TSIMRET 189 L R15,=A(SAVETST) R15 := current save area 190 L R13,4(R15) get old save area back 191 RETURN (14,12) 192 MEND 193 * 194 * TSIMBEG - complete startup for simple test --------------- 195 * 196 MACRO 197 TSIMBEG &TAG,&LRCNT,&IGCNT,<YPE,&TEXT,&NBASE=1,&DIS=0 198 GBLC &TTAG 199 &TTAG SETC '&TAG' 200 * 201 TDSCDAT CSECT 202 DS 0D 203 &TAG.TDSC TDSCGEN &TAG,&LRCNT,&IGCNT,<YPE,&TEXT 204 * 205 TDSCTBL CSECT 206 &TAG.TPTR EQU * 207 AIF (&DIS GT 0).TDSCDIS 208 DC A(&TAG.TDSC) enabled test 209 AGO .TDSCOK 210 .TDSCDIS ANOP 211 DC X'01',AL3(&TAG.TDSC) disabled test 212 .TDSCOK ANOP 213 * 214 TCODE CSECT 215 &TAG TSIMPRE NBASE=&NBASE 216 * 217 MEND 218 * 219 * TSIMEND - end for simple test ---------------------------- 220 * PAGE 6 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 221 MACRO 222 TSIMEND 223 GBLC &TTAG 224 LTORG 225 &TTAG.TEND EQU * 226 MEND 227 * 228 * REPINS - repeat instruction ----------------------------- 229 * 230 MACRO 231 &LABEL REPINS &CODE,&ALIST,&IGCNT=0 232 GBLA &TDIGCNT 233 GBLC &MACRETC 234 LCLA &ICNT 235 LCLC &ARGS 236 * 237 * build from sublist &ALIST a comma separated string &ARGS 238 * 239 REPINSAL &ALIST 240 &ARGS SETC '&MACRETC' 241 * 242 * determine repeat count, &IGCNT if given, otherwise &TDIGCNT 243 * this allows to transfer the repeat count from last TDSCGEN call 244 * 245 &ICNT SETA &IGCNT 246 AIF (&ICNT GT 0).ICNTOK 247 &ICNT SETA &TDIGCNT 248 AIF (&ICNT GT 0).ICNTOK 249 MNOTE 8,'//REPINS: IGCNT and TDIGCNT equal 0; abort' 250 MEXIT 251 .ICNTOK ANOP 252 * 253 AIF ('&LABEL' EQ '').NOLBL 254 &LABEL EQU * 255 .NOLBL ANOP 256 * 257 * write a comment indicating what REPINS does (in case NOGEN in effect) 258 * 259 MNOTE *,'// REPINS: do &ICNT times:' 260 REPINSPI &CODE,&ARGS 261 * 262 * finally generate code: &ICNT copies of &CODE &ARGS 263 * 264 .ILOOP &CODE &ARGS 265 &ICNT SETA &ICNT-1 266 AIF (&ICNT GT 0).ILOOP 267 * 268 MEND 269 * 270 * REPINSN - repeat 5 instructions -------------------------- 271 * 272 MACRO 273 &LABEL REPINSN &CO1,&AL1,&CO2,&AL2,&CO3,&AL3,&CO4,&AL4,&CO5,&AL5 274 GBLA &TDIGCNT 275 GBLC &MACRETC PAGE 7 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 276 LCLA &ICNT 277 LCLC &ARGS1,&ARGS2,&ARGS3,&ARGS4,&ARGS5 278 * 279 * build from sublist &ALIST* a comma separated string &ARGS* 280 * 281 REPINSAL &AL1 282 &ARGS1 SETC '&MACRETC' 283 REPINSAL &AL2 284 &ARGS2 SETC '&MACRETC' 285 AIF ('&CO3' EQ '').ARGDONE 286 REPINSAL &AL3 287 &ARGS3 SETC '&MACRETC' 288 AIF ('&CO4' EQ '').ARGDONE 289 REPINSAL &AL4 290 &ARGS4 SETC '&MACRETC' 291 AIF ('&CO5' EQ '').ARGDONE 292 REPINSAL &AL5 293 &ARGS5 SETC '&MACRETC' 294 .ARGDONE ANOP 295 * 296 AIF ('&LABEL' EQ '').NOLBL 297 &LABEL EQU * 298 .NOLBL ANOP 299 * 300 &ICNT SETA &TDIGCNT 301 * 302 * write a comment indicating what REPINSN does (if NOGEN in effect) 303 * 304 MNOTE *,'// REPINSN: do &ICNT times:' 305 REPINSPI &CO1,&ARGS1 306 REPINSPI &CO2,&ARGS2 307 AIF ('&CO3' EQ '').PRTDONE 308 REPINSPI &CO3,&ARGS3 309 AIF ('&CO4' EQ '').PRTDONE 310 REPINSPI &CO4,&ARGS4 311 AIF ('&CO5' EQ '').PRTDONE 312 REPINSPI &CO5,&ARGS5 313 .PRTDONE ANOP 314 * 315 * finally generate code: &ICNT copies of &CO1 ... 316 * 317 .ILOOP &CO1 &ARGS1 318 &CO2 &ARGS2 319 AIF ('&CO3' EQ '').GENDONE 320 &CO3 &ARGS3 321 AIF ('&CO4' EQ '').GENDONE 322 &CO4 &ARGS4 323 AIF ('&CO5' EQ '').GENDONE 324 &CO5 &ARGS5 325 .GENDONE ANOP 326 &ICNT SETA &ICNT-1 327 AIF (&ICNT GT 0).ILOOP 328 * 329 MEND 330 * PAGE 8 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 331 * REPINSAL - build from sublist a comma separated string --- 332 * 333 MACRO 334 REPINSAL &ALIST 335 GBLC &MACRETC 336 LCLA &AIND 337 * 338 &AIND SETA 2 339 &MACRETC SETC '&ALIST(1)' 340 * 341 .ALOOP AIF (&AIND GT N'&ALIST).AEND 342 &MACRETC SETC '&MACRETC'.','.'&ALIST(&AIND)' 343 &AIND SETA &AIND+1 344 AGO .ALOOP 345 .AEND ANOP 346 MEND 347 * 348 * REPINSPI - issue MNOTE with one instruction -------------- 349 * 350 MACRO 351 REPINSPI &CODE,&ARGS 352 LCLA &MAIND 353 LCLC &MASTR 354 * 355 * MNOTE requires that ' is doubled for expanded variables 356 * thus build &MASTR as a copy of '&ARGS with ' doubled 357 * 358 &MAIND SETA 1 359 &MASTR SETC '' 360 * 361 .MALOOP ANOP 362 &MASTR SETC '&MASTR'.'&ARGS'(&MAIND,1) 363 AIF ('&ARGS'(&MAIND,1) NE '''').MANEXT 364 &MASTR SETC '&MASTR'.'''' 365 .MANEXT ANOP 366 &MAIND SETA &MAIND+1 367 AIF (&MAIND LE K'&ARGS).MALOOP 368 MNOTE *,'// &CODE &MASTR' 369 MEND 370 * 371 * global definitions -------------------------------------------------- 372 * 373 GBLB &DISBAS 374 &DISBAS SETB 0 set 1 to disable BAS/BASR tests 375 * 376 * main preamble ------------------------------------------------------- 377 * 000000 378 MAIN START 0 start main code csect at base 0 379 SAVE (14,12) Save input registers 000000 380+ DS 0H 01650000 000000 90EC D00C 0000C 381+ STM 14,12,12(13) SAVE REGISTERS 02950000 000004 18BF 382 LR R11,R15 base register 1 := entry address 000006 41CB 0800 00800 383 LA R12,2048(R11) 00000A 41CC 0800 00800 384 LA R12,2048(R12) base register 2 := entry address+4k 00000 385 USING MAIN,R11,R12 declare 2 base register for 8k code PAGE 9 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00000E 50D0 B414 00414 386 ST R13,SAVE+4 set back pointer in current save area 000012 182D 387 LR R2,R13 remember callers save area 000014 41D0 B410 00410 388 LA R13,SAVE setup current save area 000018 50D2 0008 00008 389 ST R13,8(R2) set forw pointer in callers save area 390 * 391 * general constant definitions----------------------------------------- 392 * 02000 393 CBUFSIZE EQU 8192 394 * 395 * some preparations -------------------------------------------------- 396 * 00001C 5010 B4A4 004A4 397 ST R1,ARGPTR save argument list pointer for later 000020 5830 BD90 00D90 398 L R3,=A(TDSCTBLE-4) pointer to last entry of TDSCTBL 000024 9680 3000 00000 399 OI 0(R3),X'80' mark last entry of TDSCTBL 400 * 401 * open datasets -------------------------------------------- 402 * 403 OPEN (SYSPRINT,OUTPUT) open SYSPRINT 000028 404+ CNOP 0,4 ALIGN LIST TO FULLWORD 01740001 000028 4510 B030 00030 405+ BAL 1,*+8 LOAD REG1 W/LIST ADDR. 01780000 00002C 8F 406+ DC AL1(143) OPTION BYTE 01900000 00002D 0021D0 407+ DC AL3(SYSPRINT) DCB ADDRESS 01920000 000030 0A13 408+ SVC 19 ISSUE OPEN SVC 04000000 000032 12FF 409 LTR R15,R15 test return code 000034 4780 B040 00040 410 BE OOPENOK 000038 9204 B4A3 004A3 411 MVI RC+3,X'04' 00003C 47F0 B3F4 003F4 412 B EXIT quit with RC=4 00040 413 OOPENOK EQU * 414 * 415 * allocate buffers ----------------------------------------- 416 * 417 GETMAIN RU,LV=CBUFSIZE,BNDRY=PAGE 418+* OS/VS2 RELEASE 4 VERSION -- 10/21/75 00004804 000040 419+ CNOP 0,4 00691802 000040 47F0 B04C 0004C 420+ B *+12-4*0-2*0 BRANCH AROUND DATA 00691902 000044 00002000 421+ DC A(CBUFSIZE) LENGTH 00701802 000048 00 422+IHB0003F DC AL1(0) RESERVED 00704502 000049 00 423+ DC AL1(0) RESERVED 00711902 00004A 00 424+ DC AL1(0) SUBPOOL 00727802 00004B 06 425+ DC BL1'00000110' MODE BYTE 00730402 00004C 5800 B044 00044 426+ L 0,*-8+2*0 LOAD LENGTH 00733002 000050 58F0 B048 00048 427+ L 15,IHB0003F LOAD GETMAIN PARMS 00788502 000054 1B11 428+ SR 1,1 ZERO RESERVED REG 1 00814402 000056 0A78 429+ SVC 120 ISSUE GETMAIN SVC 00820002 000058 5010 B4B0 004B0 430 ST R1,PCBUF code area pointer 431 GETMAIN RU,LV=4096,BNDRY=PAGE 432+* OS/VS2 RELEASE 4 VERSION -- 10/21/75 00004804 00005C 433+ CNOP 0,4 00691802 00005C 47F0 B068 00068 434+ B *+12-4*0-2*0 BRANCH AROUND DATA 00691902 000060 00001000 435+ DC A(4096) LENGTH 00701802 000064 00 436+IHB0004F DC AL1(0) RESERVED 00704502 000065 00 437+ DC AL1(0) RESERVED 00711902 000066 00 438+ DC AL1(0) SUBPOOL 00727802 000067 06 439+ DC BL1'00000110' MODE BYTE 00730402 000068 5800 B060 00060 440+ L 0,*-8+2*0 LOAD LENGTH 00733002 PAGE 10 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00006C 58F0 B064 00064 441+ L 15,IHB0004F LOAD GETMAIN PARMS 00788502 000070 1B11 442+ SR 1,1 ZERO RESERVED REG 1 00814402 000072 0A78 443+ SVC 120 ISSUE GETMAIN SVC 00820002 000074 5010 B4B4 004B4 444 ST R1,PBUF4K1 1st 4k data buffer pointer 445 GETMAIN RU,LV=4096,BNDRY=PAGE 446+* OS/VS2 RELEASE 4 VERSION -- 10/21/75 00004804 000078 447+ CNOP 0,4 00691802 000078 47F0 B084 00084 448+ B *+12-4*0-2*0 BRANCH AROUND DATA 00691902 00007C 00001000 449+ DC A(4096) LENGTH 00701802 000080 00 450+IHB0005F DC AL1(0) RESERVED 00704502 000081 00 451+ DC AL1(0) RESERVED 00711902 000082 00 452+ DC AL1(0) SUBPOOL 00727802 000083 06 453+ DC BL1'00000110' MODE BYTE 00730402 000084 5800 B07C 0007C 454+ L 0,*-8+2*0 LOAD LENGTH 00733002 000088 58F0 B080 00080 455+ L 15,IHB0005F LOAD GETMAIN PARMS 00788502 00008C 1B11 456+ SR 1,1 ZERO RESERVED REG 1 00814402 00008E 0A78 457+ SVC 120 ISSUE GETMAIN SVC 00820002 000090 5010 B4B8 004B8 458 ST R1,PBUF4K2 2nd 4k data buffer pointer 459 * 460 * main body ----------------------------------------------------------- 461 * 000000 462 TDSC DSECT 000000 463 TENTRY DS F entry address 000004 464 TLENGTH DS F code/data length of test 000008 465 TLRCNT DS F local repeat count 00000C 466 TIGCNT DS F local instruction group count 000010 467 TLTYPE DS F loop type 000014 468 TTAGDSC DS F tag text descriptor 000018 469 TTXTDSC DS F description text descriptor 470 * 000094 471 MAIN CSECT 472 * 473 * write header ------------------------------------------------------- 474 * 000094 5810 B574 00574 475 L R1,MSGVHDR 000098 45E0 BAB2 00AB2 476 BAL R14,OTEXT print VERS message prefix 00009C 5810 B570 00570 477 L R1,MSGVERS 0000A0 45E0 BAB2 00AB2 478 BAL R14,OTEXT print version 0000A4 45E0 BAE0 00AE0 479 BAL R14,OPUTLINE write line 480 * 481 * handle PARMs and config file---------------------------------------- 482 * 0000A8 45E0 B5DA 005DA 483 BAL R14,PARMPH1 handle PARM, phase 1 0000AC 45E0 B826 00826 484 BAL R14,CNFRD handle config file 0000B0 45E0 B748 00748 485 BAL R14,PARMPH2 handle PARM, phase 2 486 * 487 * handle /TCOR, add tests required for loop overhead correction 488 * R1 current ltype (as index or byte offset) 489 * R2 pointer into TDSCTBL 490 * R3 pointer to current TDSC 491 * R4 pointer to TCORTBL (0 based) 492 * R5 pointer into case list (starting at LTTBLxx) 493 * R6 pointer to TDSCTBL entry 494 * 0000B4 9500 B54F 0054F 495 CLI FLGTCOR,X'00' /TCOR seen ? PAGE 11 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0000B8 4780 B132 00132 496 BE TCORE if = not, skip handling 0000BC 5820 BD94 00D94 497 L R2,=A(TDSCTBL) get head of TDSCTBL 498 * 0000C0 5832 0000 00000 499 TCORLO L R3,0(R2) get next TDSC 00000 500 USING TDSC,R3 declare TDSC base register 0000C4 9101 2000 00000 501 TM 0(R2),X'01' test disable flag 0000C8 4710 B118 00118 502 BO TCORNO if seen, continue with next 503 * 0000CC 5810 3010 00010 504 L R1,TLTYPE get lt 0000D0 1211 505 LTR R1,R1 test lt 0000D2 47D0 B118 00118 506 BNH TCORNO ignore tests with lt <= 0 0000D6 5910 BD98 00D98 507 C R1,=A(LTMAX) compare with TCORTBL size 0000DA 47D0 B0FA 000FA 508 BNH TCOROK if <= max ok 509 * 0000DE 5810 B5A0 005A0 510 L R1,MSGLTBD otherwise complain and abort 0000E2 45E0 BAB2 00AB2 511 BAL R14,OTEXT print error message 0000E6 5810 3014 00014 512 L R1,TTAGDSC 0000EA 45E0 BAB2 00AB2 513 BAL R14,OTEXT print tag 0000EE 45E0 BAE0 00AE0 514 BAL R14,OPUTLINE write line 0000F2 9214 B4A3 004A3 515 MVI RC+3,X'14' 0000F6 47F0 B3F4 003F4 516 B EXIT quit with RC=20 517 * 0000FA 5840 BD9C 00D9C 518 TCOROK L R4,=A(TCORTBL-4) get TCORTBL ptr (0 based!) 0000FE 8910 0002 00002 519 SLL R1,2 lt index to byte offset 000102 5851 4000 00000 520 L R5,0(R1,R4) get ptr to lt case list 000106 5865 0000 00000 521 TCORLI L R6,0(R5) get case (is ptr into TDSCTBL) 00010A 94FE 6000 00000 522 NI 0(R6),X'FE' clear disable flag bit 00010E 4155 0004 00004 523 LA R5,4(R5) push ptr to next case 000112 1266 524 LTR R6,R6 end tag X'80000000' seen ? 000114 47B0 B106 00106 525 BNL TCORLI if >= not, keep going 526 * 00118 527 TCORNO EQU * 528 DROP R3 000118 4122 0004 00004 529 LA R2,4(R2) push pointer to next TDSC 00011C 1233 530 LTR R3,R3 end tag X'80000000' seen ? 00011E 47B0 B0C0 000C0 531 BNL TCORLO if >= not, keep going 532 * 000122 5860 BDA0 00DA0 533 L R6,=A(T100TPTR) ptr to T100 (LR test for nrr) 000126 94FE 6000 00000 534 NI 0(R6),X'FE' clear disable flag bit 00012A 5860 BDA4 00DA4 535 L R6,=A(T102TPTR) ptr to T102 (L test for nrx) 00012E 94FE 6000 00000 536 NI 0(R6),X'FE' clear disable flag bit 537 * 00132 538 TCORE EQU * 539 * 540 * print test table if requested with /OPTT 541 * 000132 9500 B54C 0054C 542 CLI FLGOPTT,X'00' /OPTT seen ? 000136 4780 B1AE 001AE 543 BE OPTPTTE if = not 00013A 5810 B5A8 005A8 544 L R1,MSGOPTT 00013E 45E0 BAB2 00AB2 545 BAL R14,OTEXT print GMUL message prefix 000142 45E0 BAE0 00AE0 546 BAL R14,OPUTLINE write line 000146 5820 BD94 00D94 547 L R2,=A(TDSCTBL) get head of TDSCTBL 548 * 00014A 5832 0000 00000 549 OPTPTTL L R3,0(R2) get next TDSC 00000 550 USING TDSC,R3 declare TDSC base register PAGE 12 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00014E 1812 551 LR R1,R2 000150 5B10 BD94 00D94 552 S R1,=A(TDSCTBL) 000154 8810 0002 00002 553 SRL R1,2 R1 now index into TDSCTBL 000158 45E0 BBA8 00BA8 554 BAL R14,OINT04 print index 00015C 5810 B5B8 005B8 555 L R1,MSGTDIS 000160 9101 2000 00000 556 TM 0(R2),X'01' test disable flag 000164 4710 B16C 0016C 557 BO OPTPTTD if seen, prefix with " -" 000168 5810 B5B4 005B4 558 L R1,MSGTENA otherwise with " " 00016C 45E0 BAB2 00AB2 559 OPTPTTD BAL R14,OTEXT print enable/disable prefix 000170 5810 3014 00014 560 L R1,TTAGDSC 000174 45E0 BAB2 00AB2 561 BAL R14,OTEXT print tag 000178 5810 3008 00008 562 L R1,TLRCNT 00017C 45E0 BB70 00B70 563 BAL R14,OINT10 print LRCNT 000180 5810 300C 0000C 564 L R1,TIGCNT 000184 45E0 BBA8 00BA8 565 BAL R14,OINT04 print IGCNT 000188 5810 3010 00010 566 L R1,TLTYPE 00018C 45E0 BBA8 00BA8 567 BAL R14,OINT04 print LTYPE 000190 5810 3000 00000 568 L R1,TENTRY 000194 45E0 BBDC 00BDC 569 BAL R14,OHEX10 print code address 000198 5810 3004 00004 570 L R1,TLENGTH 00019C 45E0 BB70 00B70 571 BAL R14,OINT10 print code length 0001A0 45E0 BAE0 00AE0 572 BAL R14,OPUTLINE write line 573 * 574 DROP R3 0001A4 4122 0004 00004 575 LA R2,4(R2) push pointer to next TDSC 0001A8 1233 576 LTR R3,R3 end tag X'80000000' seen ? 0001AA 47B0 B14A 0014A 577 BNL OPTPTTL if >= not, keep going 578 * 001AE 579 OPTPTTE EQU * 580 * 581 * some final preparations -------------------------------------------- 582 * 583 * as warmup run test used for GMUL (with or without /GAUT !) 584 * 0001AE 5830 B4AC 004AC 585 L R3,GMULTDSC get GMUL test descriptor 0001B2 45A0 B900 00900 586 BAL R10,DOTEST run test with current GMUL 587 * 588 * handle /GAUT ----------------------- 589 * 0001B6 9500 B54E 0054E 590 CLI FLGGAUT,X'00' /GAUT active ? 0001BA 4780 B274 00274 591 BE OPTGAUTE if = not, skip handling 592 * 0001BE 5830 B4AC 004AC 593 L R3,GMULTDSC get GMUL test descriptor 0001C2 45A0 B900 00900 594 OPTGAUTL BAL R10,DOTEST run test with current GMUL 0001C6 9845 B4C8 004C8 595 LM R4,R5,TCKBEG get start time 0001CA 8C40 000C 0000C 596 SRDL R4,12 get it in usec 0001CE 9867 B4D0 004D0 597 LM R6,R7,TCKEND get end time 0001D2 8C60 000C 0000C 598 SRDL R6,12 get it in usec 0001D6 1F75 599 SLR R7,R5 R7 := end-start in usec (LSB) 600 * 0001D8 9500 B54A 0054A 601 CLI FLGOTGA,X'00' /OTGA active ? 0001DC 4780 B222 00222 602 BE NOTRCTGA if = not, skip printing 0001E0 5810 B5D4 005D4 603 L R1,MSGTGA 0001E4 45E0 BAB2 00AB2 604 BAL R14,OTEXT print /OTGA message prefix 0001E8 5810 B4A8 004A8 605 L R1,GMUL PAGE 13 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0001EC 45E0 BB70 00B70 606 BAL R14,OINT10 print GMUL 0001F0 5810 B5BC 005BC 607 L R1,MSGCSEP 0001F4 45E0 BAB2 00AB2 608 BAL R14,OTEXT print ' : ' 0001F8 4110 B4C8 004C8 609 LA R1,TCKBEG 0001FC 45E0 BC20 00C20 610 BAL R14,OHEX210 print TCKBEG (as hex) 000200 5810 B5BC 005BC 611 L R1,MSGCSEP 000204 45E0 BAB2 00AB2 612 BAL R14,OTEXT print ' : ' 000208 4110 B4D0 004D0 613 LA R1,TCKEND 00020C 45E0 BC20 00C20 614 BAL R14,OHEX210 print TCKEND (as hex) 000210 5810 B5BC 005BC 615 L R1,MSGCSEP 000214 45E0 BAB2 00AB2 616 BAL R14,OTEXT print ' : ' 000218 1817 617 LR R1,R7 00021A 45E0 BB70 00B70 618 BAL R14,OINT10 print dt (as int) 00021E 45E0 BAE0 00AE0 619 BAL R14,OPUTLINE write line 00222 620 NOTRCTGA EQU * 621 * 000222 5970 BDA8 00DA8 622 C R7,=F'200000' compare with 0.2 sec 000226 4720 B246 00246 623 BH OPTGAUTC 00022A 5840 B4A8 004A8 624 L R4,GMUL load GMUL 00022E 5940 BDAC 00DAC 625 C R4,=F'30000' already at limit ? 000232 4720 B274 00274 626 BH OPTGAUTE if > yes, quit increasing it 000236 8940 0001 00001 627 SLL R4,1 2*GMUL 00023A 5A40 B4A8 004A8 628 A R4,GMUL 3*GMUL 00023E 5040 B4A8 004A8 629 ST R4,GMUL now GMUL tripled 000242 47F0 B1C2 001C2 630 B OPTGAUTL and re-try with new GMUL 631 * 00246 632 OPTGAUTC EQU * calculate final GMUL 000246 1744 633 XR R4,R4 clear R4 000248 5850 BDB0 00DB0 634 L R5,=F'1024000000' (R4,R5) := 1024 * 1000000 00024C 1D47 635 DR R4,R7 R5 := (1024*1000000)/dt 00024E 5870 B4A8 004A8 636 L R7,GMUL 000252 1C65 637 MR R6,R5 R7 := GMUL * (1024*1000000)/dt 000254 8870 000A 0000A 638 SRL R7,10 R7 := GMUL * 1000000/dt 000258 4160 0001 00001 639 LA R6,1 00025C 1976 640 CR R7,R6 GMUL < 1 00025E 4720 B264 00264 641 BH OPTGAUTB if > not 000262 1876 642 LR R7,R6 limit to 1 000264 5860 BDB4 00DB4 643 OPTGAUTB L R6,=F'99999' 000268 1976 644 CR R7,R6 GMUL > 99999 00026A 4740 B270 00270 645 BL OPTGAUTT 00026E 1876 646 LR R7,R6 limit to 99999 000270 5070 B4A8 004A8 647 OPTGAUTT ST R7,GMUL 648 * 00274 649 OPTGAUTE EQU * 650 * 651 * print headings ----------------------- 652 * 000274 5810 B57C 0057C 653 L R1,MSGGMUL 000278 45E0 BAB2 00AB2 654 BAL R14,OTEXT print GMUL message prefix 00027C 5810 B4A8 004A8 655 L R1,GMUL 000280 45E0 BB70 00B70 656 BAL R14,OINT10 print GMUL 000284 45E0 BAE0 00AE0 657 BAL R14,OPUTLINE write line 658 * 000288 5810 B580 00580 659 L R1,MSGSTRT 00028C 45E0 BAB2 00AB2 660 BAL R14,OTEXT print 'start tests' message PAGE 14 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000290 B205 B4C0 004C0 661 STCK TPRBEG get program start time 000294 4110 B4C0 004C0 662 LA R1,TPRBEG 000298 45E0 BC20 00C20 663 BAL R14,OHEX210 print TPRBEG (as hex) 00029C 45E0 BAE0 00AE0 664 BAL R14,OPUTLINE write line 665 * 0002A0 5810 B5AC 005AC 666 L R1,MSGTHD1 0002A4 45E0 BAB2 00AB2 667 BAL R14,OTEXT print heading part 1 0002A8 4110 001E 0001E 668 LA R1,30 0002AC 45E0 BA8A 00A8A 669 BAL R14,OTAB goto tab stop 0002B0 5810 B5B0 005B0 670 L R1,MSGTHD2 0002B4 45E0 BAB2 00AB2 671 BAL R14,OTEXT print heading part 1 0002B8 45E0 BAE0 00AE0 672 BAL R14,OPUTLINE write line 673 * 674 * finally execute tests ---------------------------------------------- 675 * R2 pointer into TDSCTBL 676 * R3 pointer to current TDSC 677 * 678 * outer loop over tests 679 * 0002BC 5820 BD94 00D94 680 L R2,=A(TDSCTBL) get head of TDSCTBL 0002C0 5832 0000 00000 681 TLOOP L R3,0(R2) get next TDSC 0002C4 9101 2000 00000 682 TM 0(R2),X'01' test disable flag 0002C8 4710 B3AC 003AC 683 BO TLOOPN if seen, skip test 00000 684 USING TDSC,R3 declare TDSC base register 685 * 0002CC 9500 B548 00548 686 CLI FLGODBG,X'00' /ODGB active ? 0002D0 4780 B2D8 002D8 687 BE NOTRCSTP if = not, skip tracing 0002D4 45E0 B984 00984 688 BAL R14,TRCSTP 002D8 689 NOTRCSTP EQU * 690 * 0002D8 45A0 B900 00900 691 BAL R10,DOTEST execute test with inner GMUL loop 692 * 693 * calculate result 694 * 0002DC 4110 B4C8 004C8 695 LA R1,TCKBEG 0002E0 45E0 B942 00942 696 BAL R14,CNVCK2D 0002E4 6000 B4D8 004D8 697 STD FR0,TBEG TBEG now in 1/16 of usec 698 * 0002E8 4110 B4D0 004D0 699 LA R1,TCKEND 0002EC 45E0 B942 00942 700 BAL R14,CNVCK2D 0002F0 6000 B4E0 004E0 701 STD FR0,TEND TEND now in 1/16 of usec 702 * 0002F4 6800 B4E0 004E0 703 LD FR0,TEND 0002F8 6B00 B4D8 004D8 704 SD FR0,TBEG 0002FC 6D00 BD68 00D68 705 DD FR0,=D'16.E6' from 1/16 of usec to sec 000300 6000 B4E8 004E8 706 STD FR0,TDIF TDIF in sec 707 * 000304 5810 3008 00008 708 L R1,TLRCNT 000308 45E0 B970 00970 709 BAL R14,CNVF2D 00030C 2820 710 LDR FR2,FR0 FR2 := float(TLRCNT) 00030E 5810 300C 0000C 711 L R1,TIGCNT 000312 45E0 B970 00970 712 BAL R14,CNVF2D FR0 := float(TIGCNT) 000316 2C20 713 MDR FR2,FR0 FR2 := TLRCNT*TIGCNT 000318 5810 B4A8 004A8 714 L R1,GMUL 00031C 45E0 B970 00970 715 BAL R14,CNVF2D FR0 := float(GMUL) PAGE 15 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000320 2C20 716 MDR FR2,FR0 FR2 := TLRCNT*TIGCNT*GMUL 000322 6800 B4E8 004E8 717 LD FR0,TDIF FR0 := dt 000326 2D02 718 DDR FR0,FR2 FR0 := dt /(TLRCNT*TIGCNT*GMUL) 000328 6C00 BD70 00D70 719 MD FR0,=D'1.E6' FR0 := 1.e6 *dt/(TLRCNT*TIGCNT*GMUL) 00032C 6000 B4F0 004F0 720 STD FR0,TINS TINS now in usec 721 * 722 * print /ODBG trace output 723 * 000330 9500 B548 00548 724 CLI FLGODBG,X'00' /ODBG active ? 000334 4780 B33C 0033C 725 BE NOTRCRES if = not, skip tracing 000338 45E0 B9DC 009DC 726 BAL R14,TRCRES 0033C 727 NOTRCRES EQU * 728 * 729 * print result 730 * 00033C 5810 3014 00014 731 L R1,TTAGDSC 000340 45E0 BAB2 00AB2 732 BAL R14,OTEXT print tag 000344 45E0 BA7C 00A7C 733 BAL R14,OSKIP02 add space 000348 5810 3018 00018 734 L R1,TTXTDSC 00034C 45E0 BAB2 00AB2 735 BAL R14,OTEXT print description 000350 4110 001E 0001E 736 LA R1,30 000354 45E0 BA8A 00A8A 737 BAL R14,OTAB goto tab stop 000358 5810 B5BC 005BC 738 L R1,MSGCSEP 00035C 45E0 BAB2 00AB2 739 BAL R14,OTEXT print " : " 000360 6800 B4E8 004E8 740 LD FR0,TDIF 000364 45E0 BC5C 00C5C 741 BAL R14,OFIX1306 print run time 742 * 000368 5810 3008 00008 743 L R1,TLRCNT 00036C 45E0 BB70 00B70 744 BAL R14,OINT10 print LRCNT 000370 5810 300C 0000C 745 L R1,TIGCNT 000374 45E0 BBA8 00BA8 746 BAL R14,OINT04 print IGCNT 000378 5810 3010 00010 747 L R1,TLTYPE 00037C 45E0 BBA8 00BA8 748 BAL R14,OINT04 print LTYPE 749 * 000380 5810 B5BC 005BC 750 L R1,MSGCSEP 000384 45E0 BAB2 00AB2 751 BAL R14,OTEXT print " : " 000388 6800 B4F0 004F0 752 LD FR0,TINS 00038C 45E0 BC5C 00C5C 753 BAL R14,OFIX1306 print time per test 000390 45E0 BAE0 00AE0 754 BAL R14,OPUTLINE write line 755 * 000394 9500 B549 00549 756 CLI FLGOWTO,X'00' /OWTO active ? 000398 4780 B3AC 003AC 757 BE NOWTO if = not, skip oper messages 00039C 5810 3014 00014 758 L R1,TTAGDSC 0003A0 D203 B568 1000 00568 00000 759 MVC WTOMSG2,0(R1) insert current tag 760 WTO MF=(E,WTOPLIST) and issue operator message 0003A6 4110 B554 00554 761+ LA 1,WTOPLIST LOAD PARAMETER REG 1 01900002 0003AA 0A23 762+ SVC 35 ISSUE SVC 01500002 003AC 763 NOWTO EQU * 764 * 765 DROP R3 0003AC 4122 0004 00004 766 TLOOPN LA R2,4(R2) push pointer to next TDSC 0003B0 1233 767 LTR R3,R3 end tag X'80000000' seen ? 0003B2 47B0 B2C0 002C0 768 BNL TLOOP if >= not, keep going 769 * 0003B6 5810 B584 00584 770 L R1,MSGDONE PAGE 16 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0003BA 45E0 BAB2 00AB2 771 BAL R14,OTEXT print 'done tests' message 0003BE B205 B4D0 004D0 772 STCK TCKEND get program end time 0003C2 4110 B4D0 004D0 773 LA R1,TCKEND 0003C6 45E0 BC20 00C20 774 BAL R14,OHEX210 print TCKEND (as hex) 775 * 0003CA 4110 B4C0 004C0 776 LA R1,TPRBEG 0003CE 45E0 B942 00942 777 BAL R14,CNVCK2D convert program start time 0003D2 2860 778 LDR FR6,FR0 keep in FR6 779 * 0003D4 4110 B4D0 004D0 780 LA R1,TCKEND 0003D8 45E0 B942 00942 781 BAL R14,CNVCK2D convert program end time 0003DC 2B06 782 SDR FR0,FR6 dt = end - beg 0003DE 6D00 BD68 00D68 783 DD FR0,=D'16.E6' from 1/16 of usec to sec 784 * 0003E2 5810 B5A4 005A4 785 L R1,MSGDT 0003E6 45E0 BAB2 00AB2 786 BAL R14,OTEXT print 'done tests' message 0003EA 45E0 BC5C 00C5C 787 BAL R14,OFIX1306 print run time 0003EE 45E0 BAE0 00AE0 789 BAL R14,OPUTLINE write line 790 * 791 * close datasets and return to OS ------------------------------------- 792 * 793 EXIT CLOSE SYSPRINT close SYSPRINT 0003F2 0700 794+ CNOP 0,4 ALIGN LIST TO FULLWORD 02420002 0003F4 4510 B3FC 003FC 795+EXIT BAL 1,*+8 LOAD REG1 W/LIST ADDR 02460002 0003F8 80 796+ DC AL1(128) OPTION BYTE 02580000 0003F9 0021D0 797+ DC AL3(SYSPRINT) DCB ADDRESS 02600000 0003FC 0A14 798+ SVC 20 ISSUE CLOSE SVC 01640000 0003FE 58D0 B414 00414 799 L R13,SAVE+4 get old save area back 000402 5800 B4A0 004A0 800 L R0,RC get return code 000406 500D 0010 00010 801 ST R0,16(R13) store in old save R15 802 RETURN (14,12) return to OS (will setup RC) 00040A 98EC D00C 0000C 803+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00040E 07FE 804+ BR 14 RETURN 02000000 805 * 806 * data for MAIN program ---------------------------------------------- 807 * 000410 808 SAVE DS 18F save area (for main) 000458 809 SAVETST DS 18F save area (shared by Txxx) 0004A0 00000000 810 RC DC F'0' return code 0004A4 00000000 811 ARGPTR DC F'0' argument list pointer 812 * 0004A8 00000001 813 GMUL DC F'1' general multiplier 0004AC 00002528 814 GMULTDSC DC A(T102TDSC) test used for GMUL 815 * 0004B0 816 PCBUF DS F ptr to code area buffer 0004B4 817 PBUF4K1 DS F ptr 1st 4k data buffer 0004B8 818 PBUF4K2 DS F ptr 2nd 4k data buffer 819 * 0004C0 820 TPRBEG DS D STCK value at program begin 0004C8 821 TCKBEG DS D STCK value at test begin 0004D0 822 TCKEND DS D STCK value at test end 0004D8 823 TBEG DS D TCKBEG as double in 1/16 usec 0004E0 824 TEND DS D TCKEND as double in 1/16 usec 0004E8 825 TDIF DS D test time in sec PAGE 17 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0004F0 826 TINS DS D instruction time in usec 827 * 0004F8 828 GMULPACK DS D 000500 F0F0F0F0F0F0 829 GMULZONE DC C'000000' 830 * 000508 831 DS 0F 000508 00000548D6C4C2C7 832 FLGTBL DC X'00',AL3(FLGODBG),C'ODBG' 000510 00000549D6E3E6D6 833 DC X'00',AL3(FLGOWTO),C'OTWO' 000518 0000054AD6E3C7C1 834 DC X'00',AL3(FLGOTGA),C'OTGA' 000520 0000054BD6D7C3C6 835 DC X'00',AL3(FLGOPCF),C'OPCF' 000528 0000054CD6D7E3E3 836 DC X'00',AL3(FLGOPTT),C'OPTT' 000530 0000054DD6D9C9D7 837 DC X'00',AL3(FLGORIP),C'ORIP' 000538 0000054EC7C1E4E3 838 DC X'00',AL3(FLGGAUT),C'GAUT' 000540 8000054FE3C3D6D9 839 FTBLTCOR DC X'80',AL3(FLGTCOR),C'TCOR' 840 * 000548 00 841 FLGODBG DC X'00' /ODBG active 000549 00 842 FLGOWTO DC X'00' /OWTO active 00054A 00 843 FLGOTGA DC X'00' /OTGA active 00054B 00 844 FLGOPCF DC X'00' /OPCF active 00054C 00 845 FLGOPTT DC X'00' /OPTT active 00054D 00 846 FLGORIP DC X'00' /ORIP active 00054E 00 847 FLGGAUT DC X'00' /GAUT active 00054F 00 848 FLGTCOR DC X'00' /TCOR active 000550 00 849 TDSCDIS DC X'00' TDSC disable done after 1st /Tnnn 000551 E3 850 CHART DC C'T' just letter 'T' 000552 5C 851 CHARWC DC C'*' just letter '*' 852 * 000554 853 DS 0F 000554 0018 854 WTOPLIST DC AL2(4+L'WTOMSG1+L'WTOMSG2) text length + 4 000556 8000 855 DC B'1000000000000000' msg flags 000558 A2F3F7F06D978599 856 WTOMSG1 DC C's370_perf: done ' 000568 E3A7A7A7 857 WTOMSG2 DC C'Txxx' 00056C 0400 858 DC B'0000010000000000' descriptor codes (6=job status) 00056E 4000 859 DC B'0100000000000000' routing codes (2=console info) 860 * 000570 861 DS 0F 862 MSGVERS OTXTDSC C's370_perf V0.9.8 rev 1026 2018-05-27' 000DF0 863+TEXT CSECT 000DF0 A2F3F7F06D978599 864+SPTR0010 DC C's370_perf V0.9.8 rev 1026 2018-05-27' 000570 865+MAIN CSECT 000570 866+ DS 0F 000570 26000DF0 867+MSGVERS DC AL1(L'SPTR0010),AL3(SPTR0010) 868 MSGVHDR OTXTDSC C'PERF000I VERS: ' 000E16 869+TEXT CSECT 000E16 D7C5D9C6F0F0F0C9 870+SPTR0011 DC C'PERF000I VERS: ' 000574 871+MAIN CSECT 000574 872+ DS 0F 000574 0F000E16 873+MSGVHDR DC AL1(L'SPTR0011),AL3(SPTR0011) 874 MSGPARM OTXTDSC C'PERF001I PARM: ' 000E25 875+TEXT CSECT 000E25 D7C5D9C6F0F0F1C9 876+SPTR0012 DC C'PERF001I PARM: ' 000578 877+MAIN CSECT 000578 878+ DS 0F 000578 0F000E25 879+MSGPARM DC AL1(L'SPTR0012),AL3(SPTR0012) 880 MSGGMUL OTXTDSC C'PERF002I run with GMUL= ' PAGE 18 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000E34 881+TEXT CSECT 000E34 D7C5D9C6F0F0F2C9 882+SPTR0013 DC C'PERF002I run with GMUL= ' 00057C 883+MAIN CSECT 00057C 884+ DS 0F 00057C 18000E34 885+MSGGMUL DC AL1(L'SPTR0013),AL3(SPTR0013) 886 MSGSTRT OTXTDSC C'PERF003I start with tests at' 000E4C 887+TEXT CSECT 000E4C D7C5D9C6F0F0F3C9 888+SPTR0014 DC C'PERF003I start with tests at' 000580 889+MAIN CSECT 000580 890+ DS 0F 000580 1C000E4C 891+MSGSTRT DC AL1(L'SPTR0014),AL3(SPTR0014) 892 MSGDONE OTXTDSC C'PERF004I done with tests at' 000E68 893+TEXT CSECT 000E68 D7C5D9C6F0F0F4C9 894+SPTR0015 DC C'PERF004I done with tests at' 000584 895+MAIN CSECT 000584 896+ DS 0F 000584 1C000E68 897+MSGDONE DC AL1(L'SPTR0015),AL3(SPTR0015) 898 MSGPBAD OTXTDSC C'PERF005E bad option: ' 000E84 899+TEXT CSECT 000E84 D7C5D9C6F0F0F5C5 900+SPTR0016 DC C'PERF005E bad option: ' 000588 901+MAIN CSECT 000588 902+ DS 0F 000588 15000E84 903+MSGPBAD DC AL1(L'SPTR0016),AL3(SPTR0016) 904 MSGPDIG OTXTDSC C'PERF006E bad digit: ' 000E99 905+TEXT CSECT 000E99 D7C5D9C6F0F0F6C5 906+SPTR0017 DC C'PERF006E bad digit: ' 00058C 907+MAIN CSECT 00058C 908+ DS 0F 00058C 14000E99 909+MSGPDIG DC AL1(L'SPTR0017),AL3(SPTR0017) 910 MSGPTST OTXTDSC C'PERF007E bad test: ' 000EAD 911+TEXT CSECT 000EAD D7C5D9C6F0F0F7C5 912+SPTR0018 DC C'PERF007E bad test: ' 000590 913+MAIN CSECT 000590 914+ DS 0F 000590 13000EAD 915+MSGPTST DC AL1(L'SPTR0018),AL3(SPTR0018) 916 MSGPGM0 OTXTDSC C'PERF008E GMUL is zero: ' 000EC0 917+TEXT CSECT 000EC0 D7C5D9C6F0F0F8C5 918+SPTR0019 DC C'PERF008E GMUL is zero: ' 000594 919+MAIN CSECT 000594 920+ DS 0F 000594 17000EC0 921+MSGPGM0 DC AL1(L'SPTR0019),AL3(SPTR0019) 922 MSGCBAD OTXTDSC C'PERF009E bad config item: ' 000ED7 923+TEXT CSECT 000ED7 D7C5D9C6F0F0F9C5 924+SPTR0020 DC C'PERF009E bad config item: ' 000598 925+MAIN CSECT 000598 926+ DS 0F 000598 1A000ED7 927+MSGCBAD DC AL1(L'SPTR0020),AL3(SPTR0020) 928 MSGCLNE OTXTDSC C'PERF010I config: ' 000EF1 929+TEXT CSECT 000EF1 D7C5D9C6F0F1F0C9 930+SPTR0021 DC C'PERF010I config: ' 00059C 931+MAIN CSECT 00059C 932+ DS 0F 00059C 11000EF1 933+MSGCLNE DC AL1(L'SPTR0021),AL3(SPTR0021) 934 MSGLTBD OTXTDSC C'PERF011E bad loop type for: ' 000F02 935+TEXT CSECT PAGE 19 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000F02 D7C5D9C6F0F1F1C5 936+SPTR0022 DC C'PERF011E bad loop type for: ' 0005A0 937+MAIN CSECT 0005A0 938+ DS 0F 0005A0 1C000F02 939+MSGLTBD DC AL1(L'SPTR0022),AL3(SPTR0022) 940 MSGDT OTXTDSC C' dt=' 000F1E 941+TEXT CSECT 000F1E 404084A37E 942+SPTR0023 DC C' dt=' 0005A4 943+MAIN CSECT 0005A4 944+ DS 0F 0005A4 05000F1E 945+MSGDT DC AL1(L'SPTR0023),AL3(SPTR0023) 946 MSGOPTT OTXTDSC C' ind tag lr ig lt addr length' 000F23 947+TEXT CSECT 000F23 40899584404040A3 948+SPTR0024 DC C' ind tag lr ig lt addr length' 0005A8 949+MAIN CSECT 0005A8 950+ DS 0F 0005A8 30000F23 951+MSGOPTT DC AL1(L'SPTR0024),AL3(SPTR0024) 952 MSGTHD1 OTXTDSC C' tag description' 000F53 953+TEXT CSECT 000F53 40A3818740408485 954+SPTR0025 DC C' tag description' 0005AC 955+MAIN CSECT 0005AC 956+ DS 0F 0005AC 11000F53 957+MSGTHD1 DC AL1(L'SPTR0025),AL3(SPTR0025) 958 MSGTHD2 OTXTDSC C' : test(s) lr ig lt : inst(usec)' 000F64 959+TEXT CSECT 000F64 407A404040404040 960+SPTR0026 DC C' : test(s) lr ig lt : inst(usec)' 0005B0 961+MAIN CSECT 0005B0 962+ DS 0F 0005B0 32000F64 963+MSGTHD2 DC AL1(L'SPTR0026),AL3(SPTR0026) 964 MSGTENA OTXTDSC C' ' 000F96 965+TEXT CSECT 000F96 4040 966+SPTR0027 DC C' ' 0005B4 967+MAIN CSECT 0005B4 968+ DS 0F 0005B4 02000F96 969+MSGTENA DC AL1(L'SPTR0027),AL3(SPTR0027) 970 MSGTDIS OTXTDSC C' -' 000F98 971+TEXT CSECT 000F98 4060 972+SPTR0028 DC C' -' 0005B8 973+MAIN CSECT 0005B8 974+ DS 0F 0005B8 02000F98 975+MSGTDIS DC AL1(L'SPTR0028),AL3(SPTR0028) 976 MSGCSEP OTXTDSC C' : ' 000F9A 977+TEXT CSECT 000F9A 407A40 978+SPTR0029 DC C' : ' 0005BC 979+MAIN CSECT 0005BC 980+ DS 0F 0005BC 03000F9A 981+MSGCSEP DC AL1(L'SPTR0029),AL3(SPTR0029) 982 MSGDBG OTXTDSC C'-- ' 000F9D 983+TEXT CSECT 000F9D 60604040 984+SPTR0030 DC C'-- ' 0005C0 985+MAIN CSECT 0005C0 986+ DS 0F 0005C0 04000F9D 987+MSGDBG DC AL1(L'SPTR0030),AL3(SPTR0030) 988 MSGBEG OTXTDSC C'-- TCKBEG:' 000FA1 989+TEXT CSECT 000FA1 60604040E3C3D2C2 990+SPTR0031 DC C'-- TCKBEG:' PAGE 20 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0005C4 991+MAIN CSECT 0005C4 992+ DS 0F 0005C4 0B000FA1 993+MSGBEG DC AL1(L'SPTR0031),AL3(SPTR0031) 994 MSGEND OTXTDSC C'-- TCKEND:' 000FAC 995+TEXT CSECT 000FAC 60604040E3C3D2C5 996+SPTR0032 DC C'-- TCKEND:' 0005C8 997+MAIN CSECT 0005C8 998+ DS 0F 0005C8 0B000FAC 999+MSGEND DC AL1(L'SPTR0032),AL3(SPTR0032) 1000 MSGDIF OTXTDSC C'-- DIFF:' 000FB7 1001+TEXT CSECT 000FB7 606040404040C4C9 1002+SPTR0033 DC C'-- DIFF:' 0005CC 1003+MAIN CSECT 0005CC 1004+ DS 0F 0005CC 0B000FB7 1005+MSGDIF DC AL1(L'SPTR0033),AL3(SPTR0033) 1006 MSGINS OTXTDSC C'-- INS:' 000FC2 1007+TEXT CSECT 000FC2 60604040404040C9 1008+SPTR0034 DC C'-- INS:' 0005D0 1009+MAIN CSECT 0005D0 1010+ DS 0F 0005D0 0B000FC2 1011+MSGINS DC AL1(L'SPTR0034),AL3(SPTR0034) 1012 MSGTGA OTXTDSC C'-- GAUT:' 000FCD 1013+TEXT CSECT 000FCD 60604040C7C1E4E3 1014+SPTR0035 DC C'-- GAUT:' 0005D4 1015+MAIN CSECT 0005D4 1016+ DS 0F 0005D4 09000FCD 1017+MSGTGA DC AL1(L'SPTR0035),AL3(SPTR0035) 1018 * 0005D8 1019 DS 0H 1020 * 1021 * helper routines ---------------------------------------------------- 1022 * 1023 * -------------------------------------------------------------------- 1024 * BR14FAR: helper used in 'far call' BAL/BALR tests ================== 1025 * 0005D8 07FE 1026 BR14FAR BR R14 1027 * 1028 * -------------------------------------------------------------------- 1029 * PARMPH1: handle PARMs, phase 1, all except /Tnnn /Dnnn /Ennn ======= 1030 * R2 PARM address 1031 * R3 PARM length 1032 * 0005DA 50E0 B744 00744 1033 PARMPH1 ST R14,PARMPHXL 1034 * 0005DE 5820 B4A4 004A4 1035 L R2,ARGPTR get argument list pointer 0005E2 5822 0000 00000 1036 L R2,0(R2) load PARM base address 0005E6 4832 0000 00000 1037 LH R3,0(R2) load PARM length 0005EA 1233 1038 LTR R3,R3 test length 0005EC 4780 B70C 0070C 1039 BZ PARMPH1E if =0 no PARM specified 1040 * 0005F0 4122 0002 00002 1041 LA R2,2(R2) R2 points to 1st PARM char 1042 * 1043 * print PARM if given ------------------ 1044 * 0005F4 5810 B578 00578 1045 L R1,MSGPARM PAGE 21 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0005F8 45E0 BAB2 00AB2 1046 BAL R14,OTEXT print PARM message prefix 0005FC 5420 BDB8 00DB8 1047 N R2,=X'00FFFFFF' force upper bit to zero 000600 1813 1048 LR R1,R3 get length 000602 8910 0018 00018 1049 SLL R1,24 put length into bits 0-7 000606 1612 1050 OR R1,R2 and address into bits 8-31 000608 45E0 BAB2 00AB2 1051 BAL R14,OTEXT print PARM as passed 00060C 45E0 BAE0 00AE0 1052 BAL R14,OPUTLINE write line 1053 * 1054 * loop over options ---------------------------------------- 1055 * 000610 9561 2000 00000 1056 PARMPH1L CLI 0(R2),C'/' does option start with / ? 000614 4770 B722 00722 1057 BNE PARMABO if != not 000618 5930 BDBC 00DBC 1058 C R3,=F'5' at least 5 chars left ? 00061C 4740 B722 00722 1059 BL PARMABO if < not 000620 4780 B62C 0062C 1060 BE OPTLOK if = exactly 5 char left 000624 9561 2005 00005 1061 CLI 5(R2),C'/' does option end with / ? 000628 4770 B722 00722 1062 BNE PARMABO if != not 1063 * 1064 * handle flags: /Oxxx,/GAUT,/TCOR ----- 1065 * R4 current option 1066 * R5 current FLGTBL entry 1067 * R6 ptr to flag 1068 * 00062C 5842 0001 00001 1069 OPTLOK L R4,1(R2) load all 4 option bytes 000630 4150 B508 00508 1070 LA R5,FLGTBL load ptr to FLGTBL 000634 5865 0000 00000 1071 FLGLOOP L R6,0(R5) load ptr to flag 000638 5945 0004 00004 1072 C R4,4(R5) does table entry match ? 00063C 4770 B648 00648 1073 BNE FLGNEXT if != not, try next table entry 000640 9201 6000 00000 1074 MVI 0(R6),X'01' otherwise set flag 000644 47F0 B700 00700 1075 B PARMPH1N and try next option 000648 4155 0008 00008 1076 FLGNEXT LA R5,8(R5) push ptr to next entry 00064C 1266 1077 LTR R6,R6 end tag X'80000000' seen ? 00064E 47B0 B634 00634 1078 BNL FLGLOOP if >= not, keep going 1079 * 1080 * check for /T /D /E, accept and ignore them in phase 1 1081 * 000652 95E3 2001 00001 1082 CLI 1(R2),C'T' is it /T ? 000656 4780 B700 00700 1083 BE PARMPH1N if = yes, accept and next option 00065A 95C4 2001 00001 1084 CLI 1(R2),C'D' is it /D ? 00065E 4780 B700 00700 1085 BE PARMPH1N if = yes, accept and next option 000662 95C5 2001 00001 1086 CLI 1(R2),C'E' is it /E ? 000666 4780 B700 00700 1087 BE PARMPH1N if = yes, accept and next option 1088 * 1089 * handle /Cnnn ------------------------- 1090 * R4 ptr to current TDSCTBL entry 1091 * R5 current TDSC 1092 * R6 current tag text descriptor 1093 * R7 current option (as Tnnn) 1094 * 00066A 95C3 2001 00001 1095 CLI 1(R2),C'C' is it /C ? 00066E 4770 B6A4 006A4 1096 BNE OPTCDONE if != try next 000672 5872 0001 00001 1097 L R7,1(R2) load all 4 option bytes 000676 BF78 B551 00551 1098 ICM R7,B'1000',CHART force leading byte to 'T' 1099 * 00067A 5840 BD94 00D94 1100 L R4,=A(TDSCTBL) get head of TDSCTBL PAGE 22 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00067E 5854 0000 00000 1101 OPTCLOOP L R5,0(R4) get next TDSC 00000 1102 USING TDSC,R5 declare TDSC base register 000682 5860 5014 00014 1103 L R6,TTAGDSC get tag text descriptor 000686 5976 0000 00000 1104 C R7,0(R6) does Tnnn option match tag ? 00068A 4770 B696 00696 1105 BNE OPTCNEXT if != not, try next 1106 * 00068E 5050 B4AC 004AC 1107 ST R5,GMULTDSC setup GMUL TDSC pointer 000692 47F0 B700 00700 1108 B PARMPH1N and consider option handled 1109 * 1110 DROP R5 1111 * 000696 4144 0004 00004 1112 OPTCNEXT LA R4,4(R4) push pointer to next TDSC 00069A 1255 1113 LTR R5,R5 end tag X'80000000' seen ? 00069C 47B0 B67E 0067E 1114 BNL OPTCLOOP if >= not, keep going 0006A0 47F0 B71A 0071A 1115 B PARMABOT if here no test found, complain 1116 * 1117 * handle /Gxxx ------------------------- 1118 * 0006A4 95C7 2001 00001 1119 OPTCDONE CLI 1(R2),C'G' is it /G ? 0006A8 4770 B722 00722 1120 BNE PARMABO if != is unknown option 1121 * 0006AC 95D2 2004 00004 1122 OPTGNNN CLI 4(R2),C'K' is it /GnnK form ? 0006B0 4780 B6BE 006BE 1123 BE OPTGNNK 0006B4 D202 B503 2002 00503 00002 1124 MVC GMULZONE+3(3),2(R2) get 3 digit, place 000nnn 0006BA 47F0 B6C4 006C4 1125 B OPTGCNV 0006BE D201 B501 2002 00501 00002 1126 OPTGNNK MVC GMULZONE+1(2),2(R2) get 2 digit, place 0nn000 1127 * 0006C4 4150 B501 00501 1128 OPTGCNV LA R5,GMULZONE+1 setup digit check, data pointer 0006C8 4160 0001 00001 1129 LA R6,1 increment 0006CC 4170 B505 00505 1130 LA R7,GMULZONE+5 end pointer 0006D0 95F0 5000 00000 1131 OPTGLOOP CLI 0(R5),C'0' is char >= '0' 0006D4 4740 B712 00712 1132 BL PARMABOD if < not 0006D8 95F9 5000 00000 1133 CLI 0(R5),C'9' is char <= '9' 0006DC 4720 B712 00712 1134 BH PARMABOD if > not 0006E0 8756 B6D0 006D0 1135 BXLE R5,R6,OPTGLOOP and loop till end 1136 * 0006E4 F275 B4F8 B500 004F8 00500 1137 PACK GMULPACK(8),GMULZONE zoned to packed 0006EA 4F00 B4F8 004F8 1138 CVB R0,GMULPACK and packed to binary 0006EE 1200 1139 LTR R0,R0 test result 0006F0 4770 B6FC 006FC 1140 BNE OPTGOK if =0 complain 0006F4 5810 B594 00594 1141 L R1,MSGPGM0 0006F8 47F0 B726 00726 1142 B PARMABO1 0006FC 5000 B4A8 004A8 1143 OPTGOK ST R0,GMUL store GMUL 1144 * 1145 * now handle next option --------------- 1146 * 000700 4122 0005 00005 1147 PARMPH1N LA R2,5(R2) push to next option 000704 5B30 BDBC 00DBC 1148 S R3,=F'5' decrement rest length 000708 4720 B610 00610 1149 BH PARMPH1L if >0 check next option 1150 * 00070C 58E0 B744 00744 1151 PARMPH1E L R14,PARMPHXL 000710 07FE 1152 BR R14 1153 * 1154 * bad PARM abort handling 1155 * PAGE 23 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000712 5810 B58C 0058C 1156 PARMABOD L R1,MSGPDIG 000716 47F0 B726 00726 1157 B PARMABO1 00071A 5810 B590 00590 1158 PARMABOT L R1,MSGPTST 00071E 47F0 B726 00726 1159 B PARMABO1 1160 * 000722 5810 B588 00588 1161 PARMABO L R1,MSGPBAD 000726 45E0 BAB2 00AB2 1162 PARMABO1 BAL R14,OTEXT print error message 00072A 1813 1163 LR R1,R3 get rest length 00072C 8910 0018 00018 1164 SLL R1,24 put length into bits 0-7 000730 1612 1165 OR R1,R2 and rest address into bits 8-31 000732 45E0 BAB2 00AB2 1166 BAL R14,OTEXT print rest of PARM 000736 45E0 BAE0 00AE0 1167 BAL R14,OPUTLINE write line 00073A 9210 B4A3 004A3 1168 MVI RC+3,X'10' 00073E 47F0 B3F4 003F4 1169 B EXIT quit with RC=16 1170 * 000744 1171 PARMPHXL DS 1F R14 save area (for PARMPH*,CNFRD) 1172 * 1173 * -------------------------------------------------------------------- 1174 * PARMPH2: handle PARMs, phase 2, handle /Tnnn /Dnnn /Ennn =========== 1175 * R2 PARM address 1176 * R3 PARM length 1177 * 000748 50E0 B744 00744 1178 PARMPH2 ST R14,PARMPHXL 1179 * 00074C 5820 B4A4 004A4 1180 L R2,ARGPTR get argument list pointer 000750 5822 0000 00000 1181 L R2,0(R2) load PARM base address 000754 4832 0000 00000 1182 LH R3,0(R2) load PARM length 000758 1233 1183 LTR R3,R3 test length 00075A 4780 B820 00820 1184 BZ PARMPH2E if =0 no PARM specified 1185 * 00075E 4122 0002 00002 1186 LA R2,2(R2) R2 points to 1st PARM char 1187 * 1188 * loop over options ---------------------------------------- 1189 * 00762 1190 PARMPH2L EQU * no checks, all done in PARMPH1 1191 * 1192 * handle /Tnnn, /Dnnn, /Ennn ----------- 1193 * R4 ptr to current TDSCTBL entry 1194 * R5 current TDSC 1195 * R6 current tag text descriptor 1196 * R7 current option (as Tnnn) 1197 * R8 disable flag (0 if /Dnnn, 1 if /Ennn or /Tnnn) 1198 * R9 current tag text (with wildcards injected) 1199 * R10 count of matched tags 1200 * 000762 5872 0001 00001 1201 L R7,1(R2) load all 4 option bytes 000766 5970 B544 00544 1202 C R7,FTBLTCOR+4 is it a /TCOR 00076A 4780 B814 00814 1203 BE PARMPH2N if = yes, skip 1204 * 00076E 4180 0001 00001 1205 LA R8,1 set disable flag 000772 95C4 2001 00001 1206 CLI 1(R2),C'D' is it /D ? 000776 4780 B7AE 007AE 1207 BE OPTTDISE if = yes, proceed 00077A 1788 1208 XR R8,R8 clear disable flag 00077C 95C5 2001 00001 1209 CLI 1(R2),C'E' is it /E ? 000780 4780 B7AE 007AE 1210 BE OPTTDISE if = yes, proceed PAGE 24 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 1211 * 000784 95E3 2001 00001 1212 CLI 1(R2),C'T' is it /T ? 000788 4770 B814 00814 1213 BNE PARMPH2N if != try next 00078C 9500 B550 00550 1214 CLI TDSCDIS,X'00' TDSC disable already done ? 000790 4770 B7AE 007AE 1215 BNE OPTTDISE if != yes, skip over disable loop 1216 * 000794 9201 B550 00550 1217 MVI TDSCDIS,X'01' set disable done flag 000798 5840 BD94 00D94 1218 L R4,=A(TDSCTBL) get head of TDSCTBL 00079C 5854 0000 00000 1219 OPTTDISL L R5,0(R4) get next TDSC 0007A0 9601 4000 00000 1220 OI 0(R4),X'01' set disable flag bit 0007A4 4144 0004 00004 1221 LA R4,4(R4) push pointer to next TDSC 0007A8 1255 1222 LTR R5,R5 end tag X'80000000' seen ? 0007AA 47B0 B79C 0079C 1223 BNL OPTTDISL if >= not, keep going 1224 * 0007AE BF78 B551 00551 1225 OPTTDISE ICM R7,B'1000',CHART force leading byte to 'T' 1226 * 0007B2 17AA 1227 XR R10,R10 clear match count 0007B4 5840 BD94 00D94 1228 L R4,=A(TDSCTBL) get head of TDSCTBL 0007B8 5854 0000 00000 1229 OPTTENAL L R5,0(R4) get next TDSC 00000 1230 USING TDSC,R5 declare TDSC base register 0007BC 5860 5014 00014 1231 L R6,TTAGDSC get tag text descriptor 0007C0 5896 0000 00000 1232 L R9,0(R6) load tag text 1233 * 0007C4 955C 2002 00002 1234 CLI 2(R2),C'*' /T*nn wildcard 0007C8 4770 B7D0 007D0 1235 BNE OPTTNOW3 if != not 0007CC BF94 B552 00552 1236 ICM R9,B'0100',CHARWC otherwise inject wildcard 0007D0 955C 2003 00003 1237 OPTTNOW3 CLI 3(R2),C'*' /Tn*n wildcard 0007D4 4770 B7DC 007DC 1238 BNE OPTTNOW2 if != not 0007D8 BF92 B552 00552 1239 ICM R9,B'0010',CHARWC otherwise inject wildcard 0007DC 955C 2004 00004 1240 OPTTNOW2 CLI 4(R2),C'*' /Tnn* wildcard 0007E0 4770 B7E8 007E8 1241 BNE OPTTNOW1 if != not 0007E4 BF91 B552 00552 1242 ICM R9,B'0001',CHARWC otherwise inject wildcard 1243 * 0007E8 1979 1244 OPTTNOW1 CR R7,R9 does Tnnn option match tag ? 0007EA 4770 B804 00804 1245 BNE OPTTENAN if != not, try next 1246 * 0007EE 41AA 0001 00001 1247 LA R10,1(R10) increment match count 0007F2 1288 1248 LTR R8,R8 test disable flag 0007F4 4770 B800 00800 1249 BNE OPTTDIS if != yes, do disable 0007F8 94FE 4000 00000 1250 NI 0(R4),X'FE' clear disable flag bit 0007FC 47F0 B804 00804 1251 B OPTTENAN and go for next tag 000800 9601 4000 00000 1252 OPTTDIS OI 0(R4),X'01' set disable flag bit 1253 * 1254 DROP R5 1255 * 000804 4144 0004 00004 1256 OPTTENAN LA R4,4(R4) push pointer to next TDSC 000808 1255 1257 LTR R5,R5 end tag X'80000000' seen ? 00080A 47B0 B7B8 007B8 1258 BNL OPTTENAL if >= not, keep going 00080E 12AA 1259 LTR R10,R10 end of table, check match count 000810 4780 B71A 0071A 1260 BE PARMABOT if =, no test found, complain 1261 * 1262 * now handle next option --------------- 1263 * 000814 4122 0005 00005 1264 PARMPH2N LA R2,5(R2) push to next option 000818 5B30 BDBC 00DBC 1265 S R3,=F'5' decrement rest length PAGE 25 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00081C 4720 B762 00762 1266 BH PARMPH2L if >0 check next option 1267 * 000820 58E0 B744 00744 1268 PARMPH2E L R14,PARMPHXL 000824 07FE 1269 BR R14 1270 * 1271 * -------------------------------------------------------------------- 1272 * CNFRD: handle config file read ===================================== 1273 * R2 new ENA state 1274 * R3 new LRCNT 1275 * R4 ptr to current TDSCTBL entry 1276 * R5 current TDSC 1277 * R6 current tag text descriptor 1278 * R7 test name 1279 * R8 address of text name 1280 * 000826 50E0 B8FC 008FC 1281 CNFRD ST R14,CNFRDL 1282 OPEN (SYSIN,INPUT) open SYSIN 00082A 0700 1283+ CNOP 0,4 ALIGN LIST TO FULLWORD 01740001 00082C 4510 B834 00834 1284+ BAL 1,*+8 LOAD REG1 W/LIST ADDR. 01780000 000830 80 1285+ DC AL1(128) OPTION BYTE 01900000 000831 0022B8 1286+ DC AL3(SYSIN) DCB ADDRESS 01920000 000834 0A13 1287+ SVC 19 ISSUE OPEN SVC 04000000 000836 12FF 1288 LTR R15,R15 test return code 000838 4770 B8F4 008F4 1289 BNE CNFRDBAD if != failed, quit 1290 * 00083C 41F0 B8E4 008E4 1291 LA R15,CNFRDE end handling address 000840 50F0 BD28 00D28 1292 ST R15,IEOFEXIT use it exit if EOF seen 000844 45E0 BCE2 00CE2 1293 CNFRDNL BAL R14,IGETLINE read input line 000848 5880 BD20 00D20 1294 L R8,ILPTR get input pointer 1295 * 00084C 957B 8000 00000 1296 CLI 0(R8),C'#' is it comnment line ? 000850 4780 B844 00844 1297 BE CNFRDNL if =, skip and try next line 1298 * 000854 9500 B54B 0054B 1299 CLI FLGOPCF,X'00' /OPCF seen ? 000858 4780 B872 00872 1300 BE OPTPCFE if = not 00085C 5810 B59C 0059C 1301 L R1,MSGCLNE 000860 45E0 BAB2 00AB2 1302 BAL R14,OTEXT print prefix 000864 1818 1303 LR R1,R8 000866 5A10 BDC0 00DC0 1304 A R1,=X'50000000' build text descriptor length=80 00086A 45E0 BAB2 00AB2 1305 BAL R14,OTEXT print input line 00086E 45E0 BAE0 00AE0 1306 BAL R14,OPUTLINE write line 1307 * 000872 5878 0000 00000 1308 OPTPCFE L R7,0(R8) get text name 000876 41F8 0004 00004 1309 LA R15,4(R8) push pointer by 4 char 00087A 50F0 BD20 00D20 1310 ST R15,ILPTR and update 00087E 45E0 BD38 00D38 1311 BAL R14,IINT05 get ENA 000882 1821 1312 LR R2,R1 R2 = ENA flag 000884 45E0 BD50 00D50 1313 BAL R14,IINT10 get LRCNT 000888 1831 1314 LR R3,R1 R3 = LRCNT 1315 * 00088A 5840 BD94 00D94 1316 L R4,=A(TDSCTBL) get head of TDSCTBL 00088E 5854 0000 00000 1317 CNFRDLOP L R5,0(R4) get next TDSC 00000 1318 USING TDSC,R5 declare TDSC base register 000892 5860 5014 00014 1319 L R6,TTAGDSC get tag text descriptor 000896 5976 0000 00000 1320 C R7,0(R6) does Tnnn option match tag ? PAGE 26 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00089A 4770 B8BA 008BA 1321 BNE CNFRDNXT if != not, try next 1322 * 00089E 94FE 4000 00000 1323 NI 0(R4),X'FE' clear disable flag bit 0008A2 1222 1324 LTR R2,R2 test enable flag 0008A4 4770 B8AC 008AC 1325 BNE CNFRDENA if !=, keep enabled 0008A8 9601 4000 00000 1326 OI 0(R4),X'01' otherwise set disable flag bit 1327 * 0008AC 1233 1328 CNFRDENA LTR R3,R3 test new LRCNT 0008AE 4780 B844 00844 1329 BE CNFRDNL if =, don't update 0008B2 5030 5008 00008 1330 ST R3,TLRCNT update LRCNT 0008B6 47F0 B844 00844 1331 B CNFRDNL line done, go for next line 1332 DROP R5 1333 * 0008BA 4144 0004 00004 1334 CNFRDNXT LA R4,4(R4) push pointer to next TDSC 0008BE 1255 1335 LTR R5,R5 end tag X'80000000' seen ? 0008C0 47B0 B88E 0088E 1336 BNL CNFRDLOP if >= not, keep going 1337 * 0008C4 5810 B598 00598 1338 L R1,MSGCBAD 0008C8 45E0 BAB2 00AB2 1339 BAL R14,OTEXT print error message 0008CC 1818 1340 LR R1,R8 get test name address 0008CE 5A10 BDC4 00DC4 1341 A R1,=X'04000000' build text descriptor length=4 0008D2 45E0 BAB2 00AB2 1342 BAL R14,OTEXT print test name 0008D6 45E0 BAE0 00AE0 1343 BAL R14,OPUTLINE write line 0008DA 9214 B4A3 004A3 1344 MVI RC+3,X'14' 0008DE 47F0 B3F4 003F4 1345 B EXIT quit with RC=20 1346 * 1347 CNFRDE CLOSE SYSIN close SYSIN 0008E2 0700 1348+ CNOP 0,4 ALIGN LIST TO FULLWORD 02420002 0008E4 4510 B8EC 008EC 1349+CNFRDE BAL 1,*+8 LOAD REG1 W/LIST ADDR 02460002 0008E8 80 1350+ DC AL1(128) OPTION BYTE 02580000 0008E9 0022B8 1351+ DC AL3(SYSIN) DCB ADDRESS 02600000 0008EC 0A14 1352+ SVC 20 ISSUE CLOSE SVC 01640000 0008EE 58E0 B8FC 008FC 1353 L R14,CNFRDL 0008F2 07FE 1354 BR R14 1355 * 0008F4 9208 B4A3 004A3 1356 CNFRDBAD MVI RC+3,X'08' handle OPEN error 0008F8 47F0 B3F4 003F4 1357 B EXIT quit with RC=8 1358 * 0008FC 1359 CNFRDL DS 1F save area for R14 (return linkage) 1360 * 1361 * -------------------------------------------------------------------- 1362 * DOTEST: helper to execute test inner loop with timing ============== 1363 * R3 holds pointer to TDSC 1364 * called with BAL R10,DOTEST 1365 * 00900 1366 DOTEST EQU * 00000 1367 USING TDSC,R3 declare TDSC base register 000900 5860 B4B0 004B0 1368 L R6,PCBUF copy destination is code buffer 000904 5870 3004 00004 1369 L R7,TLENGTH copy length 000908 5880 3000 00000 1370 L R8,TENTRY copy source is code 00090C 1897 1371 LR R9,R7 copy length 1372 * 00090E 5570 BDC8 00DC8 1373 CL R7,=A(CBUFSIZE) does code fit in buffer ? 000912 47D0 B91C 0091C 1374 BNH DOTESTOK if <= ok, doit 1375 ABEND 10 otherwise abend PAGE 27 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000916 1376+ DS 0H 00400002 000916 4110 000A 0000A 1377+ LA 1,10 LOAD PARAMETER REG 1 01900002 00091A 0A0D 1378+ SVC 13 LINK TO ABEND ROUTINE 02050002 0091C 1379 DOTESTOK EQU * 1380 * 00091C 1856 1381 LR R5,R6 entry point (default is relocated) 00091E 9500 B54D 0054D 1382 CLI FLGORIP,X'00' /ORIP seen ? 000922 4780 B928 00928 1383 BE NOOPTRIP if = not 000926 1858 1384 LR R5,R8 use non-relocated code 00928 1385 NOOPTRIP EQU * 1386 * 000928 0E68 1387 MVCL R6,R8 relocate code 00092A B205 B4C8 004C8 1388 STCK TCKBEG get start time 1389 * 00092E 5840 B4A8 004A8 1390 L R4,GMUL inner GMUL loop 00932 1391 ILOOP EQU * 000932 1813 1392 LR R1,R3 load R1 := current TDSC 000934 18F5 1393 LR R15,R5 load entry point 000936 05EF 1394 BALR R14,R15 and execute 000938 4640 B932 00932 1395 BCT R4,ILOOP 1396 * 00093C B205 B4D0 004D0 1397 STCK TCKEND get end time 1398 DROP R3 1399 * 000940 07FA 1400 BR R10 1401 * 1402 * -------------------------------------------------------------------- 1403 * CNVCK2D: convert clock to double =================================== 1404 * input: R1 is pointer to STCK value 1405 * output: FR0 is STCK value as double in 1/16 of usec 1406 * 000942 5801 0000 00000 1407 CNVCK2D L R0,0(R1) 000946 5811 0004 00004 1408 L R1,4(R1) 00094A 8C00 0008 00008 1409 SRDL R0,8 get space for exponent 00094E 5400 BDB8 00DB8 1410 N R0,=X'00FFFFFF' 000952 5600 BDCC 00DCC 1411 O R0,=X'4E000000' now proper double 000956 9001 B968 00968 1412 STM R0,R1,CNVTMP 00095A 2B00 1413 SDR FR0,FR0 clear FR0 00095C 6A00 B968 00968 1414 AD FR0,CNVTMP get a normalized number 000960 07FE 1415 BR R14 1416 * 000968 1417 CNVTMP DS D 1418 * 1419 * -------------------------------------------------------------------- 1420 * CNVF2D: convert fullword to double ================================= 1421 * input: R1 value to be converted 1422 * output: FR0 value or R1 as double 1423 * 000970 5010 B96C 0096C 1424 CNVF2D ST R1,CNVTMP+4 store integer in lsb part 000974 5800 BB60 00B60 1425 L R0,ODNZERO 000978 5000 B968 00968 1426 ST R0,CNVTMP store de-normal zero in msb part 00097C 2B00 1427 SDR FR0,FR0 clear register 00097E 6A00 B968 00968 1428 AD FR0,CNVTMP this re-normalizes 000982 07FE 1429 BR R14 1430 * PAGE 28 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 1431 * -------------------------------------------------------------------- 1432 * TRCSTP: trace test startup ========================================= 1433 * 1434 * 000984 50E0 B9D8 009D8 1435 TRCSTP ST R14,TRCSTPL 00000 1436 USING TDSC,R3 declare TDSC base register 1437 * 000988 5810 B5C0 005C0 1438 L R1,MSGDBG 00098C 45E0 BAB2 00AB2 1439 BAL R14,OTEXT print debug prefix 000990 5810 3014 00014 1440 L R1,TTAGDSC 000994 45E0 BAB2 00AB2 1441 BAL R14,OTEXT print tag 000998 45E0 BA7C 00A7C 1442 BAL R14,OSKIP02 add space 00099C 5810 3018 00018 1443 L R1,TTXTDSC 0009A0 45E0 BAB2 00AB2 1444 BAL R14,OTEXT print description 0009A4 4110 0022 00022 1445 LA R1,34 0009A8 45E0 BA8A 00A8A 1446 BAL R14,OTAB goto tab stop 0009AC 5810 3000 00000 1447 L R1,TENTRY 0009B0 45E0 BBDC 00BDC 1448 BAL R14,OHEX10 print entry address 0009B4 5810 3008 00008 1449 L R1,TLRCNT 0009B8 45E0 BB70 00B70 1450 BAL R14,OINT10 print LRCNT 0009BC 5810 300C 0000C 1451 L R1,TIGCNT 0009C0 45E0 BBA8 00BA8 1452 BAL R14,OINT04 print IGCNT 0009C4 5810 3010 00010 1453 L R1,TLTYPE 0009C8 45E0 BBA8 00BA8 1454 BAL R14,OINT04 print LTYPE 0009CC 45E0 BAE0 00AE0 1455 BAL R14,OPUTLINE write line 1456 * 1457 DROP R3 0009D0 58E0 B9D8 009D8 1458 L R14,TRCSTPL 0009D4 07FE 1459 BR R14 1460 * 0009D8 1461 TRCSTPL DS 1F save area for R14 (return linkage) 1462 * 1463 * -------------------------------------------------------------------- 1464 * TRCRES: trace test step results ==================================== 1465 * 0009DC 50E0 BA78 00A78 1466 TRCRES ST R14,TRCRESL 1467 * 0009E0 5810 B5C4 005C4 1468 L R1,MSGBEG 0009E4 45E0 BAB2 00AB2 1469 BAL R14,OTEXT print debug prefix 0009E8 4110 B4C8 004C8 1470 LA R1,TCKBEG 0009EC 45E0 BC20 00C20 1471 BAL R14,OHEX210 print start time raw in hex 0009F0 5810 B5BC 005BC 1472 L R1,MSGCSEP 0009F4 45E0 BAB2 00AB2 1473 BAL R14,OTEXT print " : " 0009F8 4110 B4D8 004D8 1474 LA R1,TBEG 0009FC 45E0 BC20 00C20 1475 BAL R14,OHEX210 print start time double in hex 000A00 45E0 BAE0 00AE0 1476 BAL R14,OPUTLINE write line 1477 * 000A04 5810 B5C8 005C8 1478 L R1,MSGEND 000A08 45E0 BAB2 00AB2 1479 BAL R14,OTEXT print debug prefix 000A0C 4110 B4D0 004D0 1480 LA R1,TCKEND 000A10 45E0 BC20 00C20 1481 BAL R14,OHEX210 print end time raw in hex 000A14 5810 B5BC 005BC 1482 L R1,MSGCSEP 000A18 45E0 BAB2 00AB2 1483 BAL R14,OTEXT print " : " 000A1C 4110 B4E0 004E0 1484 LA R1,TEND 000A20 45E0 BC20 00C20 1485 BAL R14,OHEX210 print end time double in hex PAGE 29 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000A24 45E0 BAE0 00AE0 1486 BAL R14,OPUTLINE write line 1487 * 000A28 5810 B5CC 005CC 1488 L R1,MSGDIF 000A2C 45E0 BAB2 00AB2 1489 BAL R14,OTEXT print debug prefix 000A30 4110 B4E8 004E8 1490 LA R1,TDIF 000A34 45E0 BC20 00C20 1491 BAL R14,OHEX210 print test time double in hex 000A38 5810 B5BC 005BC 1492 L R1,MSGCSEP 000A3C 45E0 BAB2 00AB2 1493 BAL R14,OTEXT print " : " 000A40 6800 B4E8 004E8 1494 LD FR0,TDIF 000A44 45E0 BC5C 00C5C 1495 BAL R14,OFIX1306 print test time 000A48 45E0 BAE0 00AE0 1496 BAL R14,OPUTLINE write line 1497 * 000A4C 5810 B5D0 005D0 1498 L R1,MSGINS 000A50 45E0 BAB2 00AB2 1499 BAL R14,OTEXT print debug prefix 000A54 4110 B4F0 004F0 1500 LA R1,TINS 000A58 45E0 BC20 00C20 1501 BAL R14,OHEX210 print instruction time double in hex 000A5C 5810 B5BC 005BC 1502 L R1,MSGCSEP 000A60 45E0 BAB2 00AB2 1503 BAL R14,OTEXT print " : " 000A64 6800 B4F0 004F0 1504 LD FR0,TINS 000A68 45E0 BC5C 00C5C 1505 BAL R14,OFIX1306 print instruction time 000A6C 45E0 BAE0 00AE0 1506 BAL R14,OPUTLINE write line 1507 * 000A70 58E0 BA78 00A78 1508 L R14,TRCRESL 000A74 07FE 1509 BR R14 1510 * 000A78 1511 TRCRESL DS 1F save area for R14 (return linkage) 1512 * 1513 * --------------------------------------------------------------------- 1514 * include simple output system ---------------------------------------- 1515 * 1516 * simple output system procedures ------------------------------------- 1517 * calling and register convention: 1518 * R1 holds value (or descriptor pointer) 1519 * R0,R1 may be modified 1520 * R14,R15 may be modified 1521 * R2-R11 are not changed 1522 * 1523 * in short 1524 * R1 holds input or output value (or pointer) 1525 * call with BAL R14, 1526 * 1527 * OSKIP02 -------------------------------------------------- 1528 * add 2 blanks 1529 * 000A7C 4110 0002 00002 1530 OSKIP02 LA R1,2 1531 * 1532 * OSKIP ---------------------------------------------------- 1533 * add blanks, count in R1 1534 * 000A80 5A10 BB44 00B44 1535 OSKIP A R1,OLPTR new edit position 000A84 5010 BB44 00B44 1536 ST R1,OLPTR store pointer 000A88 07FE 1537 BR R14 1538 * 1539 * OTAB ---------------------------------------------------- 1540 * set output column, position in R1 PAGE 30 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 1541 * 000A8A 5A10 BDD0 00DD0 1542 OTAB A R1,=A(OLBUF+1) new edit position 000A8E 5010 BB44 00B44 1543 ST R1,OLPTR store pointer 000A92 07FE 1544 BR R14 1545 * 1546 * OSFILL --------------------------------------------------- 1547 * add " ***" pattern, total length in R1 1548 * 000A94 58F0 BB44 00B44 1549 OSFILL L R15,OLPTR R15 points to edit position 000A98 9240 F000 00000 1550 MVI 0(R15),C' ' initial blank 000A9C 47F0 BAA4 00AA4 1551 B OSFILLN 000AA0 925C F000 00000 1552 OSFILLL MVI 0(R15),C'*' further '*' 000AA4 41FF 0001 00001 1553 OSFILLN LA R15,1(R15) 000AA8 4610 BAA0 00AA0 1554 BCT R1,OSFILLL 000AAC 50F0 BB44 00B44 1555 ST R15,OLPTR store pointer 000AB0 07FE 1556 BR R14 1557 * 1558 * OTEXT ---------------------------------------------------- 1559 * print text, R1 hold descriptor address 1560 * descriptor format 1561 * DC AL1() 1562 * DC AL2(
) 1563 * 000AB2 50E0 BADC 00ADC 1564 OTEXT ST R14,OTEXTL save R14 000AB6 18E1 1565 LR R14,R1 000AB8 88E0 0018 00018 1566 SRL R14,24 R14 now string length 000ABC 58F0 BB44 00B44 1567 L R15,OLPTR R15 points to edit position 000AC0 180F 1568 LR R0,R15 R0 too 000AC2 1A0E 1569 AR R0,R14 push pointer, add length 000AC4 5000 BB44 00B44 1570 ST R0,OLPTR store pointer 000AC8 06E0 1571 BCTR R14,0 decrement length for EX 000ACA 44E0 BAD4 00AD4 1572 EX R14,OTEXTMVC copy string via EX:MVC 000ACE 58E0 BADC 00ADC 1573 L R14,OTEXTL restore R14 linkage 000AD2 07FE 1574 BR R14 1575 * 000AD4 D200 F000 1000 00000 00000 1576 OTEXTMVC MVC 0(1,R15),0(R1) length via EX, dst R15, src R1 000ADC 1577 OTEXTL DS F save area for R14 (return linkage) 1578 * 1579 * OPUTLINE ------------------------------------------------- 1580 * write line to SYSPRINT 1581 * 000AE0 50E0 BB40 00B40 1582 OPUTLINE ST R14,OPUTLNEL save R14 000AE4 58F0 BDD4 00DD4 1583 L R15,=A(OLBUF) 000AE8 9500 F085 00085 1584 CLI 133(R15),X'00' check fence byte 000AEC 4770 BB3A 00B3A 1585 BNE OPUTLNEA crash if fence blown 000AF0 5810 BDD8 00DD8 1586 L R1,=A(SYSPRINT) R1 point to DCB 000AF4 180F 1587 LR R0,R15 R1 point to buffer 1588 PUT (1),(0) write line 000AF6 58F0 1030 00030 1589+ L 15,48(0,1) LOAD PUT ROUTINE ADDR 00550000 000AFA 05EF 1590+ BALR 14,15 LINK TO PUT ROUTINE 00600000 000AFC 58F0 BDD4 00DD4 1591 L R15,=A(OLBUF) point to CC of OLBUF 000B00 9240 F000 00000 1592 MVI 0(R15),C' ' blank OLBUF(0) 000B04 D283 F001 F000 00001 00000 1593 MVC 1(L'OLBUF-1,R15),0(R15) propagate blank 000B0A 41FF 0001 00001 1594 LA R15,1(R15) point to 1st print char in OLBUF 000B0E 50F0 BB44 00B44 1595 ST R15,OLPTR reset current position pointer PAGE 31 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000B12 41F0 0001 00001 1596 LA R15,1 000B16 4AF0 BB48 00B48 1597 AH R15,OLCNT increment line counter 000B1A 40F0 BB48 00B48 1598 STH R15,OLCNT 000B1E 4BF0 BB4A 00B4A 1599 SH R15,OLMAX R15 := OLCNT-OLMAX 000B22 4740 BB34 00B34 1600 BL OPUTLNES if < no new page 000B26 17FF 1601 XR R15,R15 R15 := 0 000B28 40F0 BB48 00B48 1602 STH R15,OLCNT clear line counter 000B2C 58F0 BDD4 00DD4 1603 L R15,=A(OLBUF) point to CC of OLBUF 000B30 92F1 F000 00000 1604 MVI 0(R15),C'1' set new page CC in OLBUF 000B34 58E0 BB40 00B40 1605 OPUTLNES L R14,OPUTLNEL restore R14 linkage 000B38 07FE 1606 BR R14 1607 * 1608 OPUTLNEA ABEND 255 abend in case of errors 000B3A 1609+OPUTLNEA DS 0H 00400002 000B3A 4110 00FF 000FF 1610+ LA 1,255 LOAD PARAMETER REG 1 01900002 000B3E 0A0D 1611+ SVC 13 LINK TO ABEND ROUTINE 02050002 1612 * 000B40 1613 OPUTLNEL DS F save area for R14 (return linkage) 1614 * 1615 * Work area for simple output system ------------------------ 1616 * 000B44 00002231 1617 OLPTR DC A(OLBUF+1) current output line position 000B48 0000 1618 OLCNT DC H'0' line counter 000B4A 003C 1619 OLMAX DC H'60' lines per page 000B50 1620 OCVD DS D buffer for CVD (8 byte, DW aligned) 1621 * 000B58 1622 ODTEMP DS D double buffer for conversions 000B60 4E00000000000000 1623 ODNZERO DC X'4E000000',X'00000000' denormalized double zero 000B68 4E00000000000001 1624 ODNONE DC X'4E000000',X'00000001' denormalized double one 1625 * 1626 * DCB and OLBUF in separate CSECT 1627 * 0021D0 1628 SIOSDATA CSECT 0021D0 1629 DS 0F 1630 SYSPRINT DCB DSORG=PS,MACRF=PM,DDNAME=SYSPRINT, X RECFM=FBA,LRECL=133,BLKSIZE=0 1632+* DATA CONTROL BLOCK 22770000 1633+* 22860000 0021D0 1634+SYSPRINT DC 0F'0' ORIGIN ON WORD BOUNDARY 22914000 1636+* DIRECT ACCESS DEVICE INTERFACE 27360000 0021D0 0000000000000000 1638+ DC BL16'0' FDAD,DVTBL 27540000 0021E0 00000000 1639+ DC A(0) KEYLE,DEVT,TRBAL 27720000 1641+* COMMON ACCESS METHOD INTERFACE 48690000 0021E4 00 1643+ DC AL1(0) BUFNO 49050000 0021E5 000001 1644+ DC AL3(1) BUFCB 54720000 0021E8 0000 1645+ DC AL2(0) BUFL 55170000 0021EA 4000 1646+ DC BL2'0100000000000000' *55800000 + DSORG 55890000 0021EC 00000001 1647+ DC A(1) IOBAD 56340000 PAGE 32 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 1649+* FOUNDATION EXTENSION 56610000 0021F0 00 1651+ DC BL1'00000000' BFTEK,BFLN,HIARCHY 59850000 0021F1 000001 1652+ DC AL3(1) EODAD 65970000 0021F4 94 1653+ DC BL1'10010100' *66150000 + RECFM 66240000 0021F5 000000 1654+ DC AL3(0) EXLST 66330000 1656+* FOUNDATION BLOCK 66690000 0021F8 E2E8E2D7D9C9D5E3 1658+ DC CL8'SYSPRINT' DDNAME 66870000 002200 02 1659+ DC BL1'00000010' OFLGS 68220000 002201 00 1660+ DC BL1'00000000' IFLG 68310000 002202 0050 1661+ DC BL2'0000000001010000' *68400000 + *68490000 + MACR 68580000 1663+* BSAM-BPAM-QSAM INTERFACE 74430000 002204 00 1665+ DC BL1'00000000' *74610000 + RER1 74700000 002205 000001 1666+ DC AL3(1) CHECK, GERR, PERR 74790000 002208 00000001 1667+ DC A(1) SYNAD 74880000 00220C 0000 1668+ DC H'0' CIND1, CIND2 74970000 00220E 0000 1669+ DC AL2(0) BLKSIZE 75240000 002210 00000000 1670+ DC F'0' WCPO, WCPL, OFFSR, OFFSW 75870000 002214 00000001 1671+ DC A(1) IOBA 75960000 002218 00 1672+ DC AL1(0) NCP 76050000 002219 000001 1673+ DC AL3(1) EOBR, EOBAD 76140000 1675+* QSAM INTERFACE 81450000 00221C 00000001 1677+ DC A(1) RECAD 81630000 002220 0000 1678+ DC H'0' QSWS 81810000 002222 0085 1679+ DC AL2(133) LRECL 80730000 002224 00 1680+ DC BL1'00000000' EROPT 82530000 002225 000001 1681+ DC AL3(1) CNTRL 82620000 002228 00000000 1682+ DC F'0' PRECL 82710000 00222C 00000001 1683+ DC A(1) EOB 82800000 002230 4040404040404040 1684 OLBUF DC CL133' ',X'00' output line buffer and fence byte 1685 * 000B70 1686 MAIN CSECT 1687 * 1688 * OINT10 --------------------------------------------------- 1689 * print integer, like PL/I F(10) or C %10d format 1690 * very fast, for non-negative numbers only ! 1691 * 000B70 5510 BDDC 00DDC 1692 OINT10 CL R1,=F'999999999' too large ? 000B74 4720 BB96 00B96 1693 BH OINT10F if > yes, do OSFILL 000B78 4E10 BB50 00B50 1694 CVD R1,OCVD convert 000B7C 58F0 BB44 00B44 1695 L R15,OLPTR R15 points to edit position 000B80 D209 F000 BB9E 00000 00B9E 1696 MVC 0(OEI10L,R15),OEI10 setup pattern 000B86 DE09 F000 BB53 00000 00B53 1697 ED 0(OEI10L,R15),OCVD+3 and edit 000B8C 41FF 000A 0000A 1698 LA R15,OEI10L(R15) push pointer 000B90 50F0 BB44 00B44 1699 ST R15,OLPTR store pointer PAGE 33 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000B94 07FE 1700 BR R14 1701 * 000B96 4110 000A 0000A 1702 OINT10F LA R1,10 000B9A 47F0 BA94 00A94 1703 B OSFILL 1704 * 000B9E 4020202020202020 1705 OEI10 DC C' ',7X'20',X'21',X'20' pat: bddddddd(d 0000A 1706 OEI10L EQU *-OEI10 1707 * 1708 * OINT04 --------------------------------------------------- 1709 * print integer, like PL/I F(4) or C %4d format 1710 * very fast, for non-negative numbers only ! 1711 * 000BA8 41F0 03E7 003E7 1712 OINT04 LA R15,999 000BAC 151F 1713 CLR R1,R15 too large ? 000BAE 4720 BBD0 00BD0 1714 BH OINT04F if > yes, do OSFILL 000BB2 4E10 BB50 00B50 1715 CVD R1,OCVD convert 000BB6 58F0 BB44 00B44 1716 L R15,OLPTR R15 points to edit position 000BBA D203 F000 BBD8 00000 00BD8 1717 MVC 0(OEI04L,R15),OEI04 setup pattern 000BC0 DE03 F000 BB56 00000 00B56 1718 ED 0(OEI04L,R15),OCVD+6 and edit 000BC6 41FF 0004 00004 1719 LA R15,OEI04L(R15) push pointer 000BCA 50F0 BB44 00B44 1720 ST R15,OLPTR store pointer 000BCE 07FE 1721 BR R14 1722 * 000BD0 4110 0004 00004 1723 OINT04F LA R1,4 000BD4 47F0 BA94 00A94 1724 B OSFILL 1725 * 000BD8 40202120 1726 OEI04 DC C' ',X'20',X'21',X'20' ED pattern: bd(d 00004 1727 OEI04L EQU *-OEI04 1728 * 1729 * OHEX10 --------------------------------------------------- 1730 * print integer, like C " %8.8x" format 1731 * 000BDC 50E0 BC1C 00C1C 1732 OHEX10 ST R14,OHEX10L save R14 000BE0 58F0 BB44 00B44 1733 L R15,OLPTR R15 points to edit position 000BE4 41FF 0002 00002 1734 LA R15,2(R15) add two blanks 000BE8 41EF 0008 00008 1735 LA R14,8(R15) end of buffer 1736 * 000BEC 1700 1737 OHEX10NL XR R0,R0 R0 := 0 000BEE 8F00 0004 00004 1738 SLDA R0,4 get next 4 bits into R0 000BF2 4A00 BDE8 00DE8 1739 AH R0,=X'00F0' add '0' 000BF6 4900 BDEA 00DEA 1740 CH R0,=X'00F9' above 9 ? 000BFA 47D0 BC02 00C02 1741 BNH OHEX10OK if <= no, skip A-F correction 000BFE 4B00 BDEC 00DEC 1742 SH R0,=X'0039' sub (0xF0('0')+10)-0xC1('A')=0x39 000C02 420F 0000 00000 1743 OHEX10OK STC R0,0(R15) store hex digit 000C06 41FF 0001 00001 1744 LA R15,1(R15) push pointer 000C0A 19FE 1745 CR R15,R14 beyond end ? 000C0C 4740 BBEC 00BEC 1746 BL OHEX10NL if < not, do next nibble 1747 * 000C10 50F0 BB44 00B44 1748 ST R15,OLPTR store pointer 000C14 58E0 BC1C 00C1C 1749 L R14,OHEX10L restore R14 linkage 000C18 07FE 1750 BR R14 1751 * 000C1C 1752 OHEX10L DS F save area for R14 (return linkage) 1753 * 1754 * OHEX210 -------------------------------------------------- PAGE 34 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 1755 * print 64 field as two 32 bit hex numbers 1756 * R1 points to memory location of 64 bit value 1757 * rendered as " %8.8x %8.8x" 1758 * 000C20 50E0 BC44 00C44 1759 OHEX210 ST R14,OHEX210L save R14 000C24 5010 BC48 00C48 1760 ST R1,OHEX210V save R1 000C28 5811 0000 00000 1761 L R1,0(R1) get high part 000C2C 45E0 BBDC 00BDC 1762 BAL R14,OHEX10 convert 000C30 5810 BC48 00C48 1763 L R1,OHEX210V 000C34 5811 0004 00004 1764 L R1,4(R1) get low part 000C38 45E0 BBDC 00BDC 1765 BAL R14,OHEX10 convert 000C3C 58E0 BC44 00C44 1766 L R14,OHEX210L restore R14 linkage 000C40 07FE 1767 BR R14 and return 1768 * 000C44 1769 OHEX210L DS F save area for R14 (return linkage) 000C48 1770 OHEX210V DS F save area for R1 (value ptr) 1771 * 1772 * OFIX1308, OFIX1306 - ------------------------------------- 1773 * print double, like 1774 * OFIX1308: PL/I F(13,8) or C %13.8f format 1775 * OFIX1306: PL/I F(13,6) or C %13.6f format 1776 * input value in floating reg FR0 1777 * handles signed numbers 1778 * 000C4C 6C00 BD78 00D78 1779 OFIX1308 MD FR0,=D'1.E8' 'shift' 8 digits left 000C50 4110 BCD5 00CD5 1780 LA R1,OEF1308 pointer to edit pattern 000C54 4100 0003 00003 1781 LA R0,3 offset to one behind X'21' position 000C58 47F0 BC68 00C68 1782 B OFIX13XX 1783 * 000C5C 6C00 BD70 00D70 1784 OFIX1306 MD FR0,=D'1.E6' 'shift' 6 digits left 000C60 4110 BCC8 00CC8 1785 LA R1,OEF1306 pointer to edit pattern 000C64 4100 0005 00005 1786 LA R0,5 offset to one behind X'21' position 1787 * 000C68 2020 1788 OFIX13XX LPDR FR2,FR0 get abbs() value 000C6A 6920 BD80 00D80 1789 CD FR2,=D'2.E9' too large ? 000C6E 47B0 BCC0 00CC0 1790 BNL OFX13XXF if >= yes, do OSFILL 1791 * 000C72 2842 1792 LDR FR4,FR2 000C74 6E40 BB60 00B60 1793 AW FR4,ODNZERO FR4 := de-normalized FR2 000C78 2B66 1794 SDR FR6,FR6 FR6 := 0. 000C7A 2A64 1795 ADR FR6,FR4 get integer part 000C7C 2B24 1796 SDR FR2,FR4 get fractional part 000C7E 6920 BD88 00D88 1797 CD FR2,=D'0.5' check if >= 0.5 000C82 4740 BC8A 00C8A 1798 BL OFX13XXR if < no need to round up 000C86 6E40 BB68 00B68 1799 AW FR4,ODNONE otherwise add LSB DENORM 000C8A 6040 BB58 00B58 1800 OFX13XXR STD FR4,ODTEMP roll-out to memory 000C8E 58F0 BB5C 00B5C 1801 L R15,ODTEMP+4 get integer part 000C92 4EF0 BB50 00B50 1802 CVD R15,OCVD convert 000C96 58F0 BB44 00B44 1803 L R15,OLPTR R15 points to edit position 000C9A D20C F000 1000 00000 00000 1804 MVC 0(OEF13XXL,R15),0(R1) setup pattern 000CA0 181F 1805 LR R1,R15 setup R1 in case of miss 000CA2 1A10 1806 AR R1,R0 to one behind X'21' position 000CA4 DF0C F000 BB52 00000 00B52 1807 EDMK 0(OEF13XXL,R15),OCVD+2 and edit (and set R1) 000CAA 2200 1808 LTDR FR0,FR0 negative number ? 000CAC 47B0 BCB6 00CB6 1809 BNM OFX13XXP if >= not PAGE 35 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000CB0 0610 1810 BCTR R1,0 decrement pointer 000CB2 9260 1000 00000 1811 MVI 0(R1),C'-' write '-' sign 000CB6 41FF 000D 0000D 1812 OFX13XXP LA R15,OEF13XXL(R15) push pointer 000CBA 50F0 BB44 00B44 1813 ST R15,OLPTR store pointer 000CBE 07FE 1814 BR R14 1815 * 000CC0 4110 000D 0000D 1816 OFX13XXF LA R1,OEF13XXL 000CC4 47F0 BA94 00A94 1817 B OSFILL 1818 * 000CC8 4020202021204B20 1819 OEF1306 DC C' ',3X'20',X'21',X'20',C'.',6X'20' pat: bddd(d.dddddd 000CD5 402021204B202020 1820 OEF1308 DC C' ',1X'20',X'21',X'20',C'.',8X'20' pat: bd(d.dddddddd 0000D 1821 OEF13XXL EQU *-OEF1308 1823 * include simple input system ----------------------------------------- 1824 * 1825 * simple input system procedures -------------------------------------- 1826 * calling and register convention: 1827 * R1 holds value (or descriptor pointer) 1828 * R0,R1 may be modified 1829 * R14,R15 may be modified 1830 * R2-R11 are not changed 1831 * 1832 * in short 1833 * R1 holds input or output value (or pointer) 1834 * call with BAL R14, 1835 * 1836 * IGETLINE ------------------------------------------------- 1837 * read line from SYSIN 1838 * EOF handling: 1839 * - IEOFOK holds the 'EOF OK' flag 1840 * - if EOF seen and IEOFOK = X'00', program ends with RC=8 1841 * - if EOF seen and IEOFOK != X'00', program ends with RC=0 1842 * 000CE2 50E0 BD04 00D04 1843 IGETLINE ST R14,IGETLNEL save R14 000CE6 5810 BDE0 00DE0 1844 L R1,=A(SYSIN) 000CEA 5800 BDE4 00DE4 1845 L R0,=A(ILBUF) 1846 GET (1),(0) read line 000CEE 58F0 1030 00030 1847+ L 15,48(0,1) LOAD GET ROUTINE ADDR 00600000 000CF2 05EF 1848+ BALR 14,15 LINK TO GET ROUTINE 00625000 000CF4 5800 BDE4 00DE4 1849 L R0,=A(ILBUF) 000CF8 5000 BD20 00D20 1850 ST R0,ILPTR set input ptr to begin of line 000CFC 58E0 BD04 00D04 1851 L R14,IGETLNEL restore R14 linkage 000D00 07FE 1852 BR R14 1853 * 000D04 1854 IGETLNEL DS F save area for R14 (return linkage) 1855 * 1856 * IEOFHDL -------------------------------------------------- 1857 * EODAD call-back routine. R2-R13 are preserved. R0,R1,R14,R15 are, 1858 * modified, with R14 holding address of calling macro. So code 1859 * executes in the same environment as prior to the GET call, 1860 * especially base registers are kept. 1861 * 000D08 58F0 BD28 00D28 1862 IEOFHDL L R15,IEOFEXIT load user exit address 000D0C 12FF 1863 LTR R15,R15 test address 000D0E 077F 1864 BNER R15 if !=, use user exit PAGE 36 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000D10 41E0 B3F4 003F4 1865 LA R14,EXIT 000D14 9500 BD24 00D24 1866 CLI IEOFOK,X'00' is EOF ok ? 000D18 077E 1867 BNER R14 if != yes, jump to EXIT 000D1A 9208 B4A3 004A3 1868 MVI RC+3,X'08' otherwise set RC=8 000D1E 07FE 1869 BR R14 and jump to EXIT 1870 * 1871 * Work area for simple output system ------------------------ 1872 * 000D20 00002318 1873 ILPTR DC A(ILBUF) current input line position 000D24 1874 IEOFOK DS X'00' EOF ok flag 000D28 1875 IEOFEXIT DS F'0' user exit address (if != 0) 000D30 1876 ICVB DS D buffer for CVB (8 byte, DW aligned) 1877 * 1878 * DCB and OLBUF in separate CSECT 1879 * 0022B6 1880 SIOSDATA CSECT 0022B8 1881 DS 0F 1882 SYSIN DCB DSORG=PS,MACRF=GM,DDNAME=SYSIN,EODAD=IEOFHDL X RECFM=FB,LRECL=80,BLKSIZE=0 1884+* DATA CONTROL BLOCK 22770000 1885+* 22860000 0022B8 1886+SYSIN DC 0F'0' ORIGIN ON WORD BOUNDARY 22914000 1888+* DIRECT ACCESS DEVICE INTERFACE 27360000 0022B8 0000000000000000 1890+ DC BL16'0' FDAD,DVTBL 27540000 0022C8 00000000 1891+ DC A(0) KEYLE,DEVT,TRBAL 27720000 1893+* COMMON ACCESS METHOD INTERFACE 48690000 0022CC 00 1895+ DC AL1(0) BUFNO 49050000 0022CD 000001 1896+ DC AL3(1) BUFCB 54720000 0022D0 0000 1897+ DC AL2(0) BUFL 55170000 0022D2 4000 1898+ DC BL2'0100000000000000' *55800000 + DSORG 55890000 0022D4 00000001 1899+ DC A(1) IOBAD 56340000 1901+* FOUNDATION EXTENSION 56610000 0022D8 00 1903+ DC BL1'00000000' BFTEK,BFLN,HIARCHY 59850000 0022D9 000D08 1904+ DC AL3(IEOFHDL) EODAD 65970000 0022DC 00 1905+ DC BL1'00000000' *66150000 + RECFM 66240000 0022DD 000000 1906+ DC AL3(0) EXLST 66330000 1908+* FOUNDATION BLOCK 66690000 0022E0 E2E8E2C9D5404040 1910+ DC CL8'SYSIN' DDNAME 66870000 0022E8 02 1911+ DC BL1'00000010' OFLGS 68220000 0022E9 00 1912+ DC BL1'00000000' IFLG 68310000 0022EA 5000 1913+ DC BL2'0101000000000000' *68400000 + *68490000 + MACR 68580000 PAGE 37 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 1915+* BSAM-BPAM-QSAM INTERFACE 74430000 0022EC 00 1917+ DC BL1'00000000' *74610000 + RER1 74700000 0022ED 000001 1918+ DC AL3(1) CHECK, GERR, PERR 74790000 0022F0 00000001 1919+ DC A(1) SYNAD 74880000 0022F4 0000 1920+ DC H'0' CIND1, CIND2 74970000 0022F6 0000 1921+ DC AL2(0) BLKSIZE 75240000 0022F8 00000000 1922+ DC F'0' WCPO, WCPL, OFFSR, OFFSW 75870000 0022FC 00000001 1923+ DC A(1) IOBA 75960000 002300 00 1924+ DC AL1(0) NCP 76050000 002301 000001 1925+ DC AL3(1) EOBR, EOBAD 76140000 1927+* QSAM INTERFACE 81450000 002304 00000001 1929+ DC A(1) RECAD 81630000 002308 0000 1930+ DC H'0' QSWS 81810000 00230A 0000 1931+ DC AL2(0) LRECL 80730000 00230C 00 1932+ DC BL1'00000000' EROPT 82530000 00230D 000001 1933+ DC AL3(1) CNTRL 82620000 002310 00000000 1934+ DC F'0' PRECL 82710000 002314 00000001 1935+ DC A(1) EOB 82800000 002318 4040404040404040 1936 ILBUF DC CL80' ' input line buffer 000D38 1937 MAIN CSECT 1938 * 1939 * IINT05 --------------------------------------------------- 1940 * read integer, like PL/I F(5) or C %5d format 1941 * 000D38 58F0 BD20 00D20 1942 IINT05 L R15,ILPTR get input pointer 000D3C F274 BD30 F000 00D30 00000 1943 PACK ICVB(8),0(5,R15) pack next 5 char 000D42 4F10 BD30 00D30 1944 CVB R1,ICVB and convert 000D46 41FF 0005 00005 1945 LA R15,5(R15) push pointer by 5 char 000D4A 50F0 BD20 00D20 1946 ST R15,ILPTR and update 000D4E 07FE 1947 BR R14 1948 * 1949 * IINT10 --------------------------------------------------- 1950 * read integer, like PL/I F(10) or C %10d format 1951 * 000D50 58F0 BD20 00D20 1952 IINT10 L R15,ILPTR get input pointer 000D54 F279 BD30 F000 00D30 00000 1953 PACK ICVB(8),0(10,R15) pack next 10 char 000D5A 4F10 BD30 00D30 1954 CVB R1,ICVB and convert 000D5E 41FF 000A 0000A 1955 LA R15,10(R15) push pointer by 10 char 000D62 50F0 BD20 00D20 1956 ST R15,ILPTR and update 000D66 07FE 1957 BR R14 1958 * 1959 * spill literal pool for MAIN 1960 * 000D68 1961 LTORG 000D68 46F4240000000000 1962 =D'16.E6' 000D70 45F4240000000000 1963 =D'1.E6' 000D78 475F5E1000000000 1964 =D'1.E8' 000D80 4877359400000000 1965 =D'2.E9' 000D88 4080000000000000 1966 =D'0.5' 000D90 00004E60 1967 =A(TDSCTBLE-4) 000D94 000049C8 1968 =A(TDSCTBL) PAGE 38 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 000D98 0000000B 1969 =A(LTMAX) 000D9C 00002364 1970 =A(TCORTBL-4) 000DA0 000049C8 1971 =A(T100TPTR) 000DA4 000049D0 1972 =A(T102TPTR) 000DA8 00030D40 1973 =F'200000' 000DAC 00007530 1974 =F'30000' 000DB0 3D090000 1975 =F'1024000000' 000DB4 0001869F 1976 =F'99999' 000DB8 00FFFFFF 1977 =X'00FFFFFF' 000DBC 00000005 1978 =F'5' 000DC0 50000000 1979 =X'50000000' 000DC4 04000000 1980 =X'04000000' 000DC8 00002000 1981 =A(CBUFSIZE) 000DCC 4E000000 1982 =X'4E000000' 000DD0 00002231 1983 =A(OLBUF+1) 000DD4 00002230 1984 =A(OLBUF) 000DD8 000021D0 1985 =A(SYSPRINT) 000DDC 3B9AC9FF 1986 =F'999999999' 000DE0 000022B8 1987 =A(SYSIN) 000DE4 00002318 1988 =A(ILBUF) 000DE8 00F0 1989 =X'00F0' 000DEA 00F9 1990 =X'00F9' 000DEC 0039 1991 =X'0039' 1992 * 1993 * table used bt /TCOR ------------------------------------------------ 1994 * 002368 1995 DATA CSECT 002368 1996 DS 0F 1997 * 1998 * table with pointers to the lt case lists 1999 * 02368 2000 TCORTBL EQU * 002368 00002394 2001 DC A(LTTBL01) 00236C 00002398 2002 DC A(LTTBL02) 002370 0000239C 2003 DC A(LTTBL03) 002374 000023A4 2004 DC A(LTTBL04) 002378 000023AC 2005 DC A(LTTBL05) 00237C 000023B8 2006 DC A(LTTBL06) 002380 000023C0 2007 DC A(LTTBL07) 002384 000023C8 2008 DC A(LTTBL08) 002388 000023D0 2009 DC A(LTTBL09) 00238C 000023D8 2010 DC A(LTTBL10) 002390 000023E0 2011 DC A(LTTBL11) 0000B 2012 LTMAX EQU (*-TCORTBL)/4 2013 * 2014 * lt case lists, contain pointers into TDSCTBL 2015 * 02394 2016 LTTBL01 EQU * lt=1 -------------- 002394 80004BDC 2017 DC X'80',AL3(T311TPTR) T311 BCTR 02398 2018 LTTBL02 EQU * lt=2 ------------- 002398 80004BE0 2019 DC X'80',AL3(T312TPTR) T312 BCT 0239C 2020 LTTBL03 EQU * lt=3 ------------- 00239C 000049C8 2021 DC X'00',AL3(T100TPTR) T100 LR 0023A0 80004BDC 2022 DC X'80',AL3(T311TPTR) T311 BCTR 023A4 2023 LTTBL04 EQU * lt=4 ------------- PAGE 39 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0023A4 000049CC 2024 DC X'00',AL3(T101TPTR) T101 LA 0023A8 80004BDC 2025 DC X'80',AL3(T311TPTR) T311 BCTR 023AC 2026 LTTBL05 EQU * lt=5 ------------- 0023AC 000049CC 2027 DC X'00',AL3(T101TPTR) T101 LA 0023B0 00004AF8 2028 DC X'00',AL3(T230TPTR) T230 XR 0023B4 80004BDC 2029 DC X'80',AL3(T311TPTR) T311 BCTR 023B8 2030 LTTBL06 EQU * lt=6 ------------- 0023B8 000049CC 2031 DC X'00',AL3(T101TPTR) T101 LA (3 times) 0023BC 80004BDC 2032 DC X'80',AL3(T311TPTR) T311 BCTR 023C0 2033 LTTBL07 EQU * lt=7 ------------- 0023C0 00004A2C 2034 DC X'00',AL3(T150TPTR) T150 MVC (5c) 0023C4 80004BDC 2035 DC X'80',AL3(T311TPTR) T311 BCTR 023C8 2036 LTTBL08 EQU * lt=8 ------------- 0023C8 00004A34 2037 DC X'00',AL3(T152TPTR) T152 MVC (15c) 0023CC 80004BDC 2038 DC X'80',AL3(T311TPTR) T311 BCTR 023D0 2039 LTTBL09 EQU * lt=9 ------------- 0023D0 00004C74 2040 DC X'00',AL3(T501TPTR) T501 LE 0023D4 80004BDC 2041 DC X'80',AL3(T311TPTR) T311 BCTR 023D8 2042 LTTBL10 EQU * lt=10 ------------- 0023D8 00004CCC 2043 DC X'00',AL3(T531TPTR) T531 LD 0023DC 80004BDC 2044 DC X'80',AL3(T311TPTR) T311 BCTR 023E0 2045 LTTBL11 EQU * lt=11 ------------- 0023E0 00004CCC 2046 DC X'00',AL3(T531TPTR) T531 LD (2 times) 0023E4 80004BDC 2047 DC X'80',AL3(T311TPTR) T311 BCTR 2048 * 2049 * data in DATA CSECT ------------------------------------------------- 2050 * 0023E8 2051 DATA CSECT 0023E8 2052 DS 0D 023E8 2053 TRTBLINV EQU * 0023E8 FFFEFDFCFBFAF9F8 2054 DC X'FFFEFDFCFBFAF9F8F7F6F5F4F3F2F1F0' 0023F8 EFEEEDECEBEAE9E8 2055 DC X'EFEEEDECEBEAE9E8E7E6E5E4E3E2E1E0' 002408 DFDEDDDCDBDAD9D8 2056 DC X'DFDEDDDCDBDAD9D8D7D6D5D4D3D2D1D0' 002418 CFCECDCCCBCAC9C8 2057 DC X'CFCECDCCCBCAC9C8C7C6C5C4C3C2C1C0' 002428 BFBEBDBCBBBAB9B8 2058 DC X'BFBEBDBCBBBAB9B8B7B6B5B4B3B2B1B0' 002438 AFAEADACABAAA9A8 2059 DC X'AFAEADACABAAA9A8A7A6A5A4A3A2A1A0' 002448 9F9E9D9C9B9A9998 2060 DC X'9F9E9D9C9B9A99989796959493929190' 002458 8F8E8D8C8B8A8988 2061 DC X'8F8E8D8C8B8A89888786858483828180' 002468 7F7E7D7C7B7A7978 2062 DC X'7F7E7D7C7B7A79787776757473727170' 002478 6F6E6D6C6B6A6968 2063 DC X'6F6E6D6C6B6A69686766656463626160' 002488 5F5E5D5C5B5A5958 2064 DC X'5F5E5D5C5B5A59585756555453525150' 002498 4F4E4D4C4B4A4948 2065 DC X'4F4E4D4C4B4A49484746454443424140' 0024A8 3F3E3D3C3B3A3938 2066 DC X'3F3E3D3C3B3A39383736353433323130' 0024B8 2F2E2D2C2B2A2928 2067 DC X'2F2E2D2C2B2A29282726252423222120' 0024C8 1F1E1D1C1B1A1918 2068 DC X'1F1E1D1C1B1A19181716151413121110' 0024D8 0F0E0D0C0B0A0908 2069 DC X'0F0E0D0C0B0A09080706050403020100' 2070 * 2071 * Tests ============================================================== 2072 * sections 1xx load/store/move 2073 * 2xx binary/logical 2074 * 3xx flow control 2075 * 4xx packed/decimal 2076 * 5xx floating point 2077 * 6xx miscellaneous 2078 * 7xx mix sequences PAGE 40 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 2079 * 9xx auxiliary tests 2080 * 2081 * Test 1xx -- load/store/move =================================== 2082 * 2083 * Test 10x -- load ========================================= 2084 * 2085 * Test 100 -- LR R,R --------------------------------------- 2086 * 2087 TSIMBEG T100,22000,100,1,C'LR R,R' 2088+* 0024E8 2089+TDSCDAT CSECT 0024E8 2090+ DS 0D 2091+* 0024E8 00004E68 2092+T100TDSC DC A(T100) // TENTRY 0024EC 000000FC 2093+ DC A(T100TEND-T100) // TLENGTH 0024F0 000055F0 2094+ DC F'22000' // TLRCNT 0024F4 00000064 2095+ DC F'100' // TIGCNT 0024F8 00000001 2096+ DC F'1' // TLTYPE 000FD6 2097+TEXT CSECT 000FD6 E3F1F0F0 2098+SPTR0052 DC C'T100' 0024FC 2099+TDSCDAT CSECT 0024FC 2100+ DS 0F 0024FC 04000FD6 2101+ DC AL1(L'SPTR0052),AL3(SPTR0052) 000FDA 2102+TEXT CSECT 000FDA D3D940D96BD9 2103+SPTR0053 DC C'LR R,R' 002500 2104+TDSCDAT CSECT 002500 2105+ DS 0F 002500 06000FDA 2106+ DC AL1(L'SPTR0053),AL3(SPTR0053) 2107+* 0049C8 2108+TDSCTBL CSECT 049C8 2109+T100TPTR EQU * 0049C8 000024E8 2110+ DC A(T100TDSC) enabled test 2111+* 004E68 2112+TCODE CSECT 004E68 2113+ DS 0D ensure double word alignment for test 004E68 2114+T100 DS 0H 01650000 004E68 90EC D00C 0000C 2115+ STM 14,12,12(13) SAVE REGISTERS 02950000 004E6C 18CF 2116+ LR R12,R15 base register := entry address 04E68 2117+ USING T100,R12 declare code base register 004E6E 41B0 C01E 04E86 2118+ LA R11,T100L load loop target to R11 004E72 58F0 C0F8 04F60 2119+ L R15,=A(SAVETST) R15 := current save area 004E76 50DF 0004 00004 2120+ ST R13,4(R15) set back pointer in current save area 004E7A 182D 2121+ LR R2,R13 remember callers save area 004E7C 18DF 2122+ LR R13,R15 setup current save area 004E7E 50D2 0008 00008 2123+ ST R13,8(R2) set forw pointer in callers save area 00000 2124+ USING TDSC,R1 declare TDSC base register 004E82 58F0 1008 00008 2125+ L R15,TLRCNT load local repeat count to R15 2126+* 2127 * 2128 T100L REPINS LR,(R2,R1) repeat: LR R2,R1 2129+* 2130+* build from sublist &ALIST a comma separated string &ARGS 2131+* 2132+* 2133+* PAGE 41 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 2134+* 2135+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2136+* this allows to transfer the repeat count from last TDSCGEN call 2137+* 2138+* 04E86 2139+T100L EQU * 2140+* 2141+* write a comment indicating what REPINS does (in case NOGEN in effect) 2142+* 2143+*,// REPINS: do 100 times: 2144+* 2145+* MNOTE requires that ' is doubled for expanded variables 2146+* thus build &MASTR as a copy of '&ARGS with ' doubled 2147+* 2148+* 2149+*,// LR R2,R1 2150+* 2151+* finally generate code: &ICNT copies of &CODE &ARGS 2152+* 004E86 1821 2153+ LR R2,R1 004E88 1821 2154+ LR R2,R1 004E8A 1821 2155+ LR R2,R1 004E8C 1821 2156+ LR R2,R1 004E8E 1821 2157+ LR R2,R1 004E90 1821 2158+ LR R2,R1 004E92 1821 2159+ LR R2,R1 004E94 1821 2160+ LR R2,R1 004E96 1821 2161+ LR R2,R1 004E98 1821 2162+ LR R2,R1 004E9A 1821 2163+ LR R2,R1 004E9C 1821 2164+ LR R2,R1 004E9E 1821 2165+ LR R2,R1 004EA0 1821 2166+ LR R2,R1 004EA2 1821 2167+ LR R2,R1 004EA4 1821 2168+ LR R2,R1 004EA6 1821 2169+ LR R2,R1 004EA8 1821 2170+ LR R2,R1 004EAA 1821 2171+ LR R2,R1 004EAC 1821 2172+ LR R2,R1 004EAE 1821 2173+ LR R2,R1 004EB0 1821 2174+ LR R2,R1 004EB2 1821 2175+ LR R2,R1 004EB4 1821 2176+ LR R2,R1 004EB6 1821 2177+ LR R2,R1 004EB8 1821 2178+ LR R2,R1 004EBA 1821 2179+ LR R2,R1 004EBC 1821 2180+ LR R2,R1 004EBE 1821 2181+ LR R2,R1 004EC0 1821 2182+ LR R2,R1 004EC2 1821 2183+ LR R2,R1 004EC4 1821 2184+ LR R2,R1 004EC6 1821 2185+ LR R2,R1 004EC8 1821 2186+ LR R2,R1 004ECA 1821 2187+ LR R2,R1 004ECC 1821 2188+ LR R2,R1 PAGE 42 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004ECE 1821 2189+ LR R2,R1 004ED0 1821 2190+ LR R2,R1 004ED2 1821 2191+ LR R2,R1 004ED4 1821 2192+ LR R2,R1 004ED6 1821 2193+ LR R2,R1 004ED8 1821 2194+ LR R2,R1 004EDA 1821 2195+ LR R2,R1 004EDC 1821 2196+ LR R2,R1 004EDE 1821 2197+ LR R2,R1 004EE0 1821 2198+ LR R2,R1 004EE2 1821 2199+ LR R2,R1 004EE4 1821 2200+ LR R2,R1 004EE6 1821 2201+ LR R2,R1 004EE8 1821 2202+ LR R2,R1 004EEA 1821 2203+ LR R2,R1 004EEC 1821 2204+ LR R2,R1 004EEE 1821 2205+ LR R2,R1 004EF0 1821 2206+ LR R2,R1 004EF2 1821 2207+ LR R2,R1 004EF4 1821 2208+ LR R2,R1 004EF6 1821 2209+ LR R2,R1 004EF8 1821 2210+ LR R2,R1 004EFA 1821 2211+ LR R2,R1 004EFC 1821 2212+ LR R2,R1 004EFE 1821 2213+ LR R2,R1 004F00 1821 2214+ LR R2,R1 004F02 1821 2215+ LR R2,R1 004F04 1821 2216+ LR R2,R1 004F06 1821 2217+ LR R2,R1 004F08 1821 2218+ LR R2,R1 004F0A 1821 2219+ LR R2,R1 004F0C 1821 2220+ LR R2,R1 004F0E 1821 2221+ LR R2,R1 004F10 1821 2222+ LR R2,R1 004F12 1821 2223+ LR R2,R1 004F14 1821 2224+ LR R2,R1 004F16 1821 2225+ LR R2,R1 004F18 1821 2226+ LR R2,R1 004F1A 1821 2227+ LR R2,R1 004F1C 1821 2228+ LR R2,R1 004F1E 1821 2229+ LR R2,R1 004F20 1821 2230+ LR R2,R1 004F22 1821 2231+ LR R2,R1 004F24 1821 2232+ LR R2,R1 004F26 1821 2233+ LR R2,R1 004F28 1821 2234+ LR R2,R1 004F2A 1821 2235+ LR R2,R1 004F2C 1821 2236+ LR R2,R1 004F2E 1821 2237+ LR R2,R1 004F30 1821 2238+ LR R2,R1 004F32 1821 2239+ LR R2,R1 004F34 1821 2240+ LR R2,R1 004F36 1821 2241+ LR R2,R1 004F38 1821 2242+ LR R2,R1 004F3A 1821 2243+ LR R2,R1 PAGE 43 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004F3C 1821 2244+ LR R2,R1 004F3E 1821 2245+ LR R2,R1 004F40 1821 2246+ LR R2,R1 004F42 1821 2247+ LR R2,R1 004F44 1821 2248+ LR R2,R1 004F46 1821 2249+ LR R2,R1 004F48 1821 2250+ LR R2,R1 004F4A 1821 2251+ LR R2,R1 004F4C 1821 2252+ LR R2,R1 2253+* 004F4E 06FB 2254 BCTR R15,R11 2255 TSIMRET 004F50 58F0 C0F8 04F60 2256+ L R15,=A(SAVETST) R15 := current save area 004F54 58DF 0004 00004 2257+ L R13,4(R15) get old save area back 004F58 98EC D00C 0000C 2258+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 004F5C 07FE 2259+ BR 14 RETURN 02000000 2260 TSIMEND 004F60 2261+ LTORG 004F60 00000458 2262 =A(SAVETST) 04F64 2263+T100TEND EQU * 2264 * 2265 * Test 101 -- LA R,n --------------------------------------- 2266 * 2267 TSIMBEG T101,17000,100,1,C'LA R,n' 2268+* 002504 2269+TDSCDAT CSECT 002508 2270+ DS 0D 2271+* 002508 00004F68 2272+T101TDSC DC A(T101) // TENTRY 00250C 000001C4 2273+ DC A(T101TEND-T101) // TLENGTH 002510 00004268 2274+ DC F'17000' // TLRCNT 002514 00000064 2275+ DC F'100' // TIGCNT 002518 00000001 2276+ DC F'1' // TLTYPE 000FE0 2277+TEXT CSECT 000FE0 E3F1F0F1 2278+SPTR0064 DC C'T101' 00251C 2279+TDSCDAT CSECT 00251C 2280+ DS 0F 00251C 04000FE0 2281+ DC AL1(L'SPTR0064),AL3(SPTR0064) 000FE4 2282+TEXT CSECT 000FE4 D3C140D96B95 2283+SPTR0065 DC C'LA R,n' 002520 2284+TDSCDAT CSECT 002520 2285+ DS 0F 002520 06000FE4 2286+ DC AL1(L'SPTR0065),AL3(SPTR0065) 2287+* 0049CC 2288+TDSCTBL CSECT 049CC 2289+T101TPTR EQU * 0049CC 00002508 2290+ DC A(T101TDSC) enabled test 2291+* 004F64 2292+TCODE CSECT 004F68 2293+ DS 0D ensure double word alignment for test 004F68 2294+T101 DS 0H 01650000 004F68 90EC D00C 0000C 2295+ STM 14,12,12(13) SAVE REGISTERS 02950000 004F6C 18CF 2296+ LR R12,R15 base register := entry address 04F68 2297+ USING T101,R12 declare code base register 004F6E 41B0 C01E 04F86 2298+ LA R11,T101L load loop target to R11 PAGE 44 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004F72 58F0 C1C0 05128 2299+ L R15,=A(SAVETST) R15 := current save area 004F76 50DF 0004 00004 2300+ ST R13,4(R15) set back pointer in current save area 004F7A 182D 2301+ LR R2,R13 remember callers save area 004F7C 18DF 2302+ LR R13,R15 setup current save area 004F7E 50D2 0008 00008 2303+ ST R13,8(R2) set forw pointer in callers save area 00000 2304+ USING TDSC,R1 declare TDSC base register 004F82 58F0 1008 00008 2305+ L R15,TLRCNT load local repeat count to R15 2306+* 2307 * 2308 T101L REPINS LA,(R2,X'123') repeat: LA R2,X'123 2309+* 2310+* build from sublist &ALIST a comma separated string &ARGS 2311+* 2312+* 2313+* 2314+* 2315+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2316+* this allows to transfer the repeat count from last TDSCGEN call 2317+* 2318+* 04F86 2319+T101L EQU * 2320+* 2321+* write a comment indicating what REPINS does (in case NOGEN in effect) 2322+* 2323+*,// REPINS: do 100 times: 2324+* 2325+* MNOTE requires that ' is doubled for expanded variables 2326+* thus build &MASTR as a copy of '&ARGS with ' doubled 2327+* 2328+* 2329+*,// LA R2,X'123' 2330+* 2331+* finally generate code: &ICNT copies of &CODE &ARGS 2332+* 004F86 4120 0123 00123 2333+ LA R2,X'123' 004F8A 4120 0123 00123 2334+ LA R2,X'123' 004F8E 4120 0123 00123 2335+ LA R2,X'123' 004F92 4120 0123 00123 2336+ LA R2,X'123' 004F96 4120 0123 00123 2337+ LA R2,X'123' 004F9A 4120 0123 00123 2338+ LA R2,X'123' 004F9E 4120 0123 00123 2339+ LA R2,X'123' 004FA2 4120 0123 00123 2340+ LA R2,X'123' 004FA6 4120 0123 00123 2341+ LA R2,X'123' 004FAA 4120 0123 00123 2342+ LA R2,X'123' 004FAE 4120 0123 00123 2343+ LA R2,X'123' 004FB2 4120 0123 00123 2344+ LA R2,X'123' 004FB6 4120 0123 00123 2345+ LA R2,X'123' 004FBA 4120 0123 00123 2346+ LA R2,X'123' 004FBE 4120 0123 00123 2347+ LA R2,X'123' 004FC2 4120 0123 00123 2348+ LA R2,X'123' 004FC6 4120 0123 00123 2349+ LA R2,X'123' 004FCA 4120 0123 00123 2350+ LA R2,X'123' 004FCE 4120 0123 00123 2351+ LA R2,X'123' 004FD2 4120 0123 00123 2352+ LA R2,X'123' 004FD6 4120 0123 00123 2353+ LA R2,X'123' PAGE 45 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004FDA 4120 0123 00123 2354+ LA R2,X'123' 004FDE 4120 0123 00123 2355+ LA R2,X'123' 004FE2 4120 0123 00123 2356+ LA R2,X'123' 004FE6 4120 0123 00123 2357+ LA R2,X'123' 004FEA 4120 0123 00123 2358+ LA R2,X'123' 004FEE 4120 0123 00123 2359+ LA R2,X'123' 004FF2 4120 0123 00123 2360+ LA R2,X'123' 004FF6 4120 0123 00123 2361+ LA R2,X'123' 004FFA 4120 0123 00123 2362+ LA R2,X'123' 004FFE 4120 0123 00123 2363+ LA R2,X'123' 005002 4120 0123 00123 2364+ LA R2,X'123' 005006 4120 0123 00123 2365+ LA R2,X'123' 00500A 4120 0123 00123 2366+ LA R2,X'123' 00500E 4120 0123 00123 2367+ LA R2,X'123' 005012 4120 0123 00123 2368+ LA R2,X'123' 005016 4120 0123 00123 2369+ LA R2,X'123' 00501A 4120 0123 00123 2370+ LA R2,X'123' 00501E 4120 0123 00123 2371+ LA R2,X'123' 005022 4120 0123 00123 2372+ LA R2,X'123' 005026 4120 0123 00123 2373+ LA R2,X'123' 00502A 4120 0123 00123 2374+ LA R2,X'123' 00502E 4120 0123 00123 2375+ LA R2,X'123' 005032 4120 0123 00123 2376+ LA R2,X'123' 005036 4120 0123 00123 2377+ LA R2,X'123' 00503A 4120 0123 00123 2378+ LA R2,X'123' 00503E 4120 0123 00123 2379+ LA R2,X'123' 005042 4120 0123 00123 2380+ LA R2,X'123' 005046 4120 0123 00123 2381+ LA R2,X'123' 00504A 4120 0123 00123 2382+ LA R2,X'123' 00504E 4120 0123 00123 2383+ LA R2,X'123' 005052 4120 0123 00123 2384+ LA R2,X'123' 005056 4120 0123 00123 2385+ LA R2,X'123' 00505A 4120 0123 00123 2386+ LA R2,X'123' 00505E 4120 0123 00123 2387+ LA R2,X'123' 005062 4120 0123 00123 2388+ LA R2,X'123' 005066 4120 0123 00123 2389+ LA R2,X'123' 00506A 4120 0123 00123 2390+ LA R2,X'123' 00506E 4120 0123 00123 2391+ LA R2,X'123' 005072 4120 0123 00123 2392+ LA R2,X'123' 005076 4120 0123 00123 2393+ LA R2,X'123' 00507A 4120 0123 00123 2394+ LA R2,X'123' 00507E 4120 0123 00123 2395+ LA R2,X'123' 005082 4120 0123 00123 2396+ LA R2,X'123' 005086 4120 0123 00123 2397+ LA R2,X'123' 00508A 4120 0123 00123 2398+ LA R2,X'123' 00508E 4120 0123 00123 2399+ LA R2,X'123' 005092 4120 0123 00123 2400+ LA R2,X'123' 005096 4120 0123 00123 2401+ LA R2,X'123' 00509A 4120 0123 00123 2402+ LA R2,X'123' 00509E 4120 0123 00123 2403+ LA R2,X'123' 0050A2 4120 0123 00123 2404+ LA R2,X'123' 0050A6 4120 0123 00123 2405+ LA R2,X'123' 0050AA 4120 0123 00123 2406+ LA R2,X'123' 0050AE 4120 0123 00123 2407+ LA R2,X'123' 0050B2 4120 0123 00123 2408+ LA R2,X'123' PAGE 46 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0050B6 4120 0123 00123 2409+ LA R2,X'123' 0050BA 4120 0123 00123 2410+ LA R2,X'123' 0050BE 4120 0123 00123 2411+ LA R2,X'123' 0050C2 4120 0123 00123 2412+ LA R2,X'123' 0050C6 4120 0123 00123 2413+ LA R2,X'123' 0050CA 4120 0123 00123 2414+ LA R2,X'123' 0050CE 4120 0123 00123 2415+ LA R2,X'123' 0050D2 4120 0123 00123 2416+ LA R2,X'123' 0050D6 4120 0123 00123 2417+ LA R2,X'123' 0050DA 4120 0123 00123 2418+ LA R2,X'123' 0050DE 4120 0123 00123 2419+ LA R2,X'123' 0050E2 4120 0123 00123 2420+ LA R2,X'123' 0050E6 4120 0123 00123 2421+ LA R2,X'123' 0050EA 4120 0123 00123 2422+ LA R2,X'123' 0050EE 4120 0123 00123 2423+ LA R2,X'123' 0050F2 4120 0123 00123 2424+ LA R2,X'123' 0050F6 4120 0123 00123 2425+ LA R2,X'123' 0050FA 4120 0123 00123 2426+ LA R2,X'123' 0050FE 4120 0123 00123 2427+ LA R2,X'123' 005102 4120 0123 00123 2428+ LA R2,X'123' 005106 4120 0123 00123 2429+ LA R2,X'123' 00510A 4120 0123 00123 2430+ LA R2,X'123' 00510E 4120 0123 00123 2431+ LA R2,X'123' 005112 4120 0123 00123 2432+ LA R2,X'123' 2433+* 005116 06FB 2434 BCTR R15,R11 2435 TSIMRET 005118 58F0 C1C0 05128 2436+ L R15,=A(SAVETST) R15 := current save area 00511C 58DF 0004 00004 2437+ L R13,4(R15) get old save area back 005120 98EC D00C 0000C 2438+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005124 07FE 2439+ BR 14 RETURN 02000000 2440 TSIMEND 005128 2441+ LTORG 005128 00000458 2442 =A(SAVETST) 0512C 2443+T101TEND EQU * 2444 * 2445 * Test 102 -- L R,m ---------------------------------------- 2446 * 2447 TSIMBEG T102,13000,50,1,C'L R,m' 2448+* 002524 2449+TDSCDAT CSECT 002528 2450+ DS 0D 2451+* 002528 00005130 2452+T102TDSC DC A(T102) // TENTRY 00252C 00000100 2453+ DC A(T102TEND-T102) // TLENGTH 002530 000032C8 2454+ DC F'13000' // TLRCNT 002534 00000032 2455+ DC F'50' // TIGCNT 002538 00000001 2456+ DC F'1' // TLTYPE 000FEA 2457+TEXT CSECT 000FEA E3F1F0F2 2458+SPTR0076 DC C'T102' 00253C 2459+TDSCDAT CSECT 00253C 2460+ DS 0F 00253C 04000FEA 2461+ DC AL1(L'SPTR0076),AL3(SPTR0076) 000FEE 2462+TEXT CSECT 000FEE D340D96B94 2463+SPTR0077 DC C'L R,m' PAGE 47 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002540 2464+TDSCDAT CSECT 002540 2465+ DS 0F 002540 05000FEE 2466+ DC AL1(L'SPTR0077),AL3(SPTR0077) 2467+* 0049D0 2468+TDSCTBL CSECT 049D0 2469+T102TPTR EQU * 0049D0 00002528 2470+ DC A(T102TDSC) enabled test 2471+* 00512C 2472+TCODE CSECT 005130 2473+ DS 0D ensure double word alignment for test 005130 2474+T102 DS 0H 01650000 005130 90EC D00C 0000C 2475+ STM 14,12,12(13) SAVE REGISTERS 02950000 005134 18CF 2476+ LR R12,R15 base register := entry address 05130 2477+ USING T102,R12 declare code base register 005136 41B0 C01E 0514E 2478+ LA R11,T102L load loop target to R11 00513A 58F0 C0F8 05228 2479+ L R15,=A(SAVETST) R15 := current save area 00513E 50DF 0004 00004 2480+ ST R13,4(R15) set back pointer in current save area 005142 182D 2481+ LR R2,R13 remember callers save area 005144 18DF 2482+ LR R13,R15 setup current save area 005146 50D2 0008 00008 2483+ ST R13,8(R2) set forw pointer in callers save area 00000 2484+ USING TDSC,R1 declare TDSC base register 00514A 58F0 1008 00008 2485+ L R15,TLRCNT load local repeat count to R15 2486+* 2487 * 2488 T102L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 2489+* 2490+* build from sublist &ALIST a comma separated string &ARGS 2491+* 2492+* 2493+* 2494+* 2495+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2496+* this allows to transfer the repeat count from last TDSCGEN call 2497+* 2498+* 0514E 2499+T102L EQU * 2500+* 2501+* write a comment indicating what REPINS does (in case NOGEN in effect) 2502+* 2503+*,// REPINS: do 50 times: 2504+* 2505+* MNOTE requires that ' is doubled for expanded variables 2506+* thus build &MASTR as a copy of '&ARGS with ' doubled 2507+* 2508+* 2509+*,// L R2,=F'123' 2510+* 2511+* finally generate code: &ICNT copies of &CODE &ARGS 2512+* 00514E 5820 C0FC 0522C 2513+ L R2,=F'123' 005152 5820 C0FC 0522C 2514+ L R2,=F'123' 005156 5820 C0FC 0522C 2515+ L R2,=F'123' 00515A 5820 C0FC 0522C 2516+ L R2,=F'123' 00515E 5820 C0FC 0522C 2517+ L R2,=F'123' 005162 5820 C0FC 0522C 2518+ L R2,=F'123' PAGE 48 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005166 5820 C0FC 0522C 2519+ L R2,=F'123' 00516A 5820 C0FC 0522C 2520+ L R2,=F'123' 00516E 5820 C0FC 0522C 2521+ L R2,=F'123' 005172 5820 C0FC 0522C 2522+ L R2,=F'123' 005176 5820 C0FC 0522C 2523+ L R2,=F'123' 00517A 5820 C0FC 0522C 2524+ L R2,=F'123' 00517E 5820 C0FC 0522C 2525+ L R2,=F'123' 005182 5820 C0FC 0522C 2526+ L R2,=F'123' 005186 5820 C0FC 0522C 2527+ L R2,=F'123' 00518A 5820 C0FC 0522C 2528+ L R2,=F'123' 00518E 5820 C0FC 0522C 2529+ L R2,=F'123' 005192 5820 C0FC 0522C 2530+ L R2,=F'123' 005196 5820 C0FC 0522C 2531+ L R2,=F'123' 00519A 5820 C0FC 0522C 2532+ L R2,=F'123' 00519E 5820 C0FC 0522C 2533+ L R2,=F'123' 0051A2 5820 C0FC 0522C 2534+ L R2,=F'123' 0051A6 5820 C0FC 0522C 2535+ L R2,=F'123' 0051AA 5820 C0FC 0522C 2536+ L R2,=F'123' 0051AE 5820 C0FC 0522C 2537+ L R2,=F'123' 0051B2 5820 C0FC 0522C 2538+ L R2,=F'123' 0051B6 5820 C0FC 0522C 2539+ L R2,=F'123' 0051BA 5820 C0FC 0522C 2540+ L R2,=F'123' 0051BE 5820 C0FC 0522C 2541+ L R2,=F'123' 0051C2 5820 C0FC 0522C 2542+ L R2,=F'123' 0051C6 5820 C0FC 0522C 2543+ L R2,=F'123' 0051CA 5820 C0FC 0522C 2544+ L R2,=F'123' 0051CE 5820 C0FC 0522C 2545+ L R2,=F'123' 0051D2 5820 C0FC 0522C 2546+ L R2,=F'123' 0051D6 5820 C0FC 0522C 2547+ L R2,=F'123' 0051DA 5820 C0FC 0522C 2548+ L R2,=F'123' 0051DE 5820 C0FC 0522C 2549+ L R2,=F'123' 0051E2 5820 C0FC 0522C 2550+ L R2,=F'123' 0051E6 5820 C0FC 0522C 2551+ L R2,=F'123' 0051EA 5820 C0FC 0522C 2552+ L R2,=F'123' 0051EE 5820 C0FC 0522C 2553+ L R2,=F'123' 0051F2 5820 C0FC 0522C 2554+ L R2,=F'123' 0051F6 5820 C0FC 0522C 2555+ L R2,=F'123' 0051FA 5820 C0FC 0522C 2556+ L R2,=F'123' 0051FE 5820 C0FC 0522C 2557+ L R2,=F'123' 005202 5820 C0FC 0522C 2558+ L R2,=F'123' 005206 5820 C0FC 0522C 2559+ L R2,=F'123' 00520A 5820 C0FC 0522C 2560+ L R2,=F'123' 00520E 5820 C0FC 0522C 2561+ L R2,=F'123' 005212 5820 C0FC 0522C 2562+ L R2,=F'123' 2563+* 005216 06FB 2564 BCTR R15,R11 2565 TSIMRET 005218 58F0 C0F8 05228 2566+ L R15,=A(SAVETST) R15 := current save area 00521C 58DF 0004 00004 2567+ L R13,4(R15) get old save area back 005220 98EC D00C 0000C 2568+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005224 07FE 2569+ BR 14 RETURN 02000000 2570 TSIMEND 005228 2571+ LTORG 005228 00000458 2572 =A(SAVETST) 00522C 0000007B 2573 =F'123' PAGE 49 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 05230 2574+T102TEND EQU * 2575 * 2576 * Test 103 -- L R,m (unal) --------------------------------- 2577 * 2578 TSIMBEG T103,12000,50,1,C'L R,m (unal)' 2579+* 002544 2580+TDSCDAT CSECT 002548 2581+ DS 0D 2582+* 002548 00005230 2583+T103TDSC DC A(T103) // TENTRY 00254C 0000010C 2584+ DC A(T103TEND-T103) // TLENGTH 002550 00002EE0 2585+ DC F'12000' // TLRCNT 002554 00000032 2586+ DC F'50' // TIGCNT 002558 00000001 2587+ DC F'1' // TLTYPE 000FF3 2588+TEXT CSECT 000FF3 E3F1F0F3 2589+SPTR0088 DC C'T103' 00255C 2590+TDSCDAT CSECT 00255C 2591+ DS 0F 00255C 04000FF3 2592+ DC AL1(L'SPTR0088),AL3(SPTR0088) 000FF7 2593+TEXT CSECT 000FF7 D340D96B94404DA4 2594+SPTR0089 DC C'L R,m (unal)' 002560 2595+TDSCDAT CSECT 002560 2596+ DS 0F 002560 0C000FF7 2597+ DC AL1(L'SPTR0089),AL3(SPTR0089) 2598+* 0049D4 2599+TDSCTBL CSECT 049D4 2600+T103TPTR EQU * 0049D4 00002548 2601+ DC A(T103TDSC) enabled test 2602+* 005230 2603+TCODE CSECT 005230 2604+ DS 0D ensure double word alignment for test 005230 2605+T103 DS 0H 01650000 005230 90EC D00C 0000C 2606+ STM 14,12,12(13) SAVE REGISTERS 02950000 005234 18CF 2607+ LR R12,R15 base register := entry address 05230 2608+ USING T103,R12 declare code base register 005236 41B0 C022 05252 2609+ LA R11,T103L load loop target to R11 00523A 58F0 C108 05338 2610+ L R15,=A(SAVETST) R15 := current save area 00523E 50DF 0004 00004 2611+ ST R13,4(R15) set back pointer in current save area 005242 182D 2612+ LR R2,R13 remember callers save area 005244 18DF 2613+ LR R13,R15 setup current save area 005246 50D2 0008 00008 2614+ ST R13,8(R2) set forw pointer in callers save area 00000 2615+ USING TDSC,R1 declare TDSC base register 00524A 58F0 1008 00008 2616+ L R15,TLRCNT load local repeat count to R15 2617+* 2618 * 00524E 4130 C0FC 0532C 2619 LA R3,T103V 2620 T103L REPINS L,(R2,1(R3)) repeat: L R2,1(R3) 2621+* 2622+* build from sublist &ALIST a comma separated string &ARGS 2623+* 2624+* 2625+* 2626+* 2627+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2628+* this allows to transfer the repeat count from last TDSCGEN call PAGE 50 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 2629+* 2630+* 05252 2631+T103L EQU * 2632+* 2633+* write a comment indicating what REPINS does (in case NOGEN in effect) 2634+* 2635+*,// REPINS: do 50 times: 2636+* 2637+* MNOTE requires that ' is doubled for expanded variables 2638+* thus build &MASTR as a copy of '&ARGS with ' doubled 2639+* 2640+* 2641+*,// L R2,1(R3) 2642+* 2643+* finally generate code: &ICNT copies of &CODE &ARGS 2644+* 005252 5823 0001 00001 2645+ L R2,1(R3) 005256 5823 0001 00001 2646+ L R2,1(R3) 00525A 5823 0001 00001 2647+ L R2,1(R3) 00525E 5823 0001 00001 2648+ L R2,1(R3) 005262 5823 0001 00001 2649+ L R2,1(R3) 005266 5823 0001 00001 2650+ L R2,1(R3) 00526A 5823 0001 00001 2651+ L R2,1(R3) 00526E 5823 0001 00001 2652+ L R2,1(R3) 005272 5823 0001 00001 2653+ L R2,1(R3) 005276 5823 0001 00001 2654+ L R2,1(R3) 00527A 5823 0001 00001 2655+ L R2,1(R3) 00527E 5823 0001 00001 2656+ L R2,1(R3) 005282 5823 0001 00001 2657+ L R2,1(R3) 005286 5823 0001 00001 2658+ L R2,1(R3) 00528A 5823 0001 00001 2659+ L R2,1(R3) 00528E 5823 0001 00001 2660+ L R2,1(R3) 005292 5823 0001 00001 2661+ L R2,1(R3) 005296 5823 0001 00001 2662+ L R2,1(R3) 00529A 5823 0001 00001 2663+ L R2,1(R3) 00529E 5823 0001 00001 2664+ L R2,1(R3) 0052A2 5823 0001 00001 2665+ L R2,1(R3) 0052A6 5823 0001 00001 2666+ L R2,1(R3) 0052AA 5823 0001 00001 2667+ L R2,1(R3) 0052AE 5823 0001 00001 2668+ L R2,1(R3) 0052B2 5823 0001 00001 2669+ L R2,1(R3) 0052B6 5823 0001 00001 2670+ L R2,1(R3) 0052BA 5823 0001 00001 2671+ L R2,1(R3) 0052BE 5823 0001 00001 2672+ L R2,1(R3) 0052C2 5823 0001 00001 2673+ L R2,1(R3) 0052C6 5823 0001 00001 2674+ L R2,1(R3) 0052CA 5823 0001 00001 2675+ L R2,1(R3) 0052CE 5823 0001 00001 2676+ L R2,1(R3) 0052D2 5823 0001 00001 2677+ L R2,1(R3) 0052D6 5823 0001 00001 2678+ L R2,1(R3) 0052DA 5823 0001 00001 2679+ L R2,1(R3) 0052DE 5823 0001 00001 2680+ L R2,1(R3) 0052E2 5823 0001 00001 2681+ L R2,1(R3) 0052E6 5823 0001 00001 2682+ L R2,1(R3) 0052EA 5823 0001 00001 2683+ L R2,1(R3) PAGE 51 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0052EE 5823 0001 00001 2684+ L R2,1(R3) 0052F2 5823 0001 00001 2685+ L R2,1(R3) 0052F6 5823 0001 00001 2686+ L R2,1(R3) 0052FA 5823 0001 00001 2687+ L R2,1(R3) 0052FE 5823 0001 00001 2688+ L R2,1(R3) 005302 5823 0001 00001 2689+ L R2,1(R3) 005306 5823 0001 00001 2690+ L R2,1(R3) 00530A 5823 0001 00001 2691+ L R2,1(R3) 00530E 5823 0001 00001 2692+ L R2,1(R3) 005312 5823 0001 00001 2693+ L R2,1(R3) 005316 5823 0001 00001 2694+ L R2,1(R3) 2695+* 00531A 06FB 2696 BCTR R15,R11 2697 TSIMRET 00531C 58F0 C108 05338 2698+ L R15,=A(SAVETST) R15 := current save area 005320 58DF 0004 00004 2699+ L R13,4(R15) get old save area back 005324 98EC D00C 0000C 2700+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005328 07FE 2701+ BR 14 RETURN 02000000 2702 * 00532C 2703 DS 0F 00532C 0123456701234567 2704 T103V DC X'01234567',X'01234567' target for unaligned load 2705 TSIMEND 005338 2706+ LTORG 005338 00000458 2707 =A(SAVETST) 0533C 2708+T103TEND EQU * 2709 * 2710 * Test 104 -- LH R,m --------------------------------------- 2711 * 2712 TSIMBEG T104,10000,50,1,C'LH R,m' 2713+* 002564 2714+TDSCDAT CSECT 002568 2715+ DS 0D 2716+* 002568 00005340 2717+T104TDSC DC A(T104) // TENTRY 00256C 000000FE 2718+ DC A(T104TEND-T104) // TLENGTH 002570 00002710 2719+ DC F'10000' // TLRCNT 002574 00000032 2720+ DC F'50' // TIGCNT 002578 00000001 2721+ DC F'1' // TLTYPE 001003 2722+TEXT CSECT 001003 E3F1F0F4 2723+SPTR0100 DC C'T104' 00257C 2724+TDSCDAT CSECT 00257C 2725+ DS 0F 00257C 04001003 2726+ DC AL1(L'SPTR0100),AL3(SPTR0100) 001007 2727+TEXT CSECT 001007 D3C840D96B94 2728+SPTR0101 DC C'LH R,m' 002580 2729+TDSCDAT CSECT 002580 2730+ DS 0F 002580 06001007 2731+ DC AL1(L'SPTR0101),AL3(SPTR0101) 2732+* 0049D8 2733+TDSCTBL CSECT 049D8 2734+T104TPTR EQU * 0049D8 00002568 2735+ DC A(T104TDSC) enabled test 2736+* 00533C 2737+TCODE CSECT 005340 2738+ DS 0D ensure double word alignment for test PAGE 52 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005340 2739+T104 DS 0H 01650000 005340 90EC D00C 0000C 2740+ STM 14,12,12(13) SAVE REGISTERS 02950000 005344 18CF 2741+ LR R12,R15 base register := entry address 05340 2742+ USING T104,R12 declare code base register 005346 41B0 C01E 0535E 2743+ LA R11,T104L load loop target to R11 00534A 58F0 C0F8 05438 2744+ L R15,=A(SAVETST) R15 := current save area 00534E 50DF 0004 00004 2745+ ST R13,4(R15) set back pointer in current save area 005352 182D 2746+ LR R2,R13 remember callers save area 005354 18DF 2747+ LR R13,R15 setup current save area 005356 50D2 0008 00008 2748+ ST R13,8(R2) set forw pointer in callers save area 00000 2749+ USING TDSC,R1 declare TDSC base register 00535A 58F0 1008 00008 2750+ L R15,TLRCNT load local repeat count to R15 2751+* 2752 * 2753 T104L REPINS LH,(R2,=H'123') repeat: LH R2,=H'123' 2754+* 2755+* build from sublist &ALIST a comma separated string &ARGS 2756+* 2757+* 2758+* 2759+* 2760+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2761+* this allows to transfer the repeat count from last TDSCGEN call 2762+* 2763+* 0535E 2764+T104L EQU * 2765+* 2766+* write a comment indicating what REPINS does (in case NOGEN in effect) 2767+* 2768+*,// REPINS: do 50 times: 2769+* 2770+* MNOTE requires that ' is doubled for expanded variables 2771+* thus build &MASTR as a copy of '&ARGS with ' doubled 2772+* 2773+* 2774+*,// LH R2,=H'123' 2775+* 2776+* finally generate code: &ICNT copies of &CODE &ARGS 2777+* 00535E 4820 C0FC 0543C 2778+ LH R2,=H'123' 005362 4820 C0FC 0543C 2779+ LH R2,=H'123' 005366 4820 C0FC 0543C 2780+ LH R2,=H'123' 00536A 4820 C0FC 0543C 2781+ LH R2,=H'123' 00536E 4820 C0FC 0543C 2782+ LH R2,=H'123' 005372 4820 C0FC 0543C 2783+ LH R2,=H'123' 005376 4820 C0FC 0543C 2784+ LH R2,=H'123' 00537A 4820 C0FC 0543C 2785+ LH R2,=H'123' 00537E 4820 C0FC 0543C 2786+ LH R2,=H'123' 005382 4820 C0FC 0543C 2787+ LH R2,=H'123' 005386 4820 C0FC 0543C 2788+ LH R2,=H'123' 00538A 4820 C0FC 0543C 2789+ LH R2,=H'123' 00538E 4820 C0FC 0543C 2790+ LH R2,=H'123' 005392 4820 C0FC 0543C 2791+ LH R2,=H'123' 005396 4820 C0FC 0543C 2792+ LH R2,=H'123' 00539A 4820 C0FC 0543C 2793+ LH R2,=H'123' PAGE 53 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00539E 4820 C0FC 0543C 2794+ LH R2,=H'123' 0053A2 4820 C0FC 0543C 2795+ LH R2,=H'123' 0053A6 4820 C0FC 0543C 2796+ LH R2,=H'123' 0053AA 4820 C0FC 0543C 2797+ LH R2,=H'123' 0053AE 4820 C0FC 0543C 2798+ LH R2,=H'123' 0053B2 4820 C0FC 0543C 2799+ LH R2,=H'123' 0053B6 4820 C0FC 0543C 2800+ LH R2,=H'123' 0053BA 4820 C0FC 0543C 2801+ LH R2,=H'123' 0053BE 4820 C0FC 0543C 2802+ LH R2,=H'123' 0053C2 4820 C0FC 0543C 2803+ LH R2,=H'123' 0053C6 4820 C0FC 0543C 2804+ LH R2,=H'123' 0053CA 4820 C0FC 0543C 2805+ LH R2,=H'123' 0053CE 4820 C0FC 0543C 2806+ LH R2,=H'123' 0053D2 4820 C0FC 0543C 2807+ LH R2,=H'123' 0053D6 4820 C0FC 0543C 2808+ LH R2,=H'123' 0053DA 4820 C0FC 0543C 2809+ LH R2,=H'123' 0053DE 4820 C0FC 0543C 2810+ LH R2,=H'123' 0053E2 4820 C0FC 0543C 2811+ LH R2,=H'123' 0053E6 4820 C0FC 0543C 2812+ LH R2,=H'123' 0053EA 4820 C0FC 0543C 2813+ LH R2,=H'123' 0053EE 4820 C0FC 0543C 2814+ LH R2,=H'123' 0053F2 4820 C0FC 0543C 2815+ LH R2,=H'123' 0053F6 4820 C0FC 0543C 2816+ LH R2,=H'123' 0053FA 4820 C0FC 0543C 2817+ LH R2,=H'123' 0053FE 4820 C0FC 0543C 2818+ LH R2,=H'123' 005402 4820 C0FC 0543C 2819+ LH R2,=H'123' 005406 4820 C0FC 0543C 2820+ LH R2,=H'123' 00540A 4820 C0FC 0543C 2821+ LH R2,=H'123' 00540E 4820 C0FC 0543C 2822+ LH R2,=H'123' 005412 4820 C0FC 0543C 2823+ LH R2,=H'123' 005416 4820 C0FC 0543C 2824+ LH R2,=H'123' 00541A 4820 C0FC 0543C 2825+ LH R2,=H'123' 00541E 4820 C0FC 0543C 2826+ LH R2,=H'123' 005422 4820 C0FC 0543C 2827+ LH R2,=H'123' 2828+* 005426 06FB 2829 BCTR R15,R11 2830 TSIMRET 005428 58F0 C0F8 05438 2831+ L R15,=A(SAVETST) R15 := current save area 00542C 58DF 0004 00004 2832+ L R13,4(R15) get old save area back 005430 98EC D00C 0000C 2833+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005434 07FE 2834+ BR 14 RETURN 02000000 2835 TSIMEND 005438 2836+ LTORG 005438 00000458 2837 =A(SAVETST) 00543C 007B 2838 =H'123' 0543E 2839+T104TEND EQU * 2840 * 2841 * Test 105 -- LH R,m (unal3) ------------------------------- 2842 * 2843 TSIMBEG T105,10000,50,1,C'LH R,m (unal3)' 2844+* 002584 2845+TDSCDAT CSECT 002588 2846+ DS 0D 2847+* 002588 00005440 2848+T105TDSC DC A(T105) // TENTRY PAGE 54 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00258C 0000010C 2849+ DC A(T105TEND-T105) // TLENGTH 002590 00002710 2850+ DC F'10000' // TLRCNT 002594 00000032 2851+ DC F'50' // TIGCNT 002598 00000001 2852+ DC F'1' // TLTYPE 00100D 2853+TEXT CSECT 00100D E3F1F0F5 2854+SPTR0112 DC C'T105' 00259C 2855+TDSCDAT CSECT 00259C 2856+ DS 0F 00259C 0400100D 2857+ DC AL1(L'SPTR0112),AL3(SPTR0112) 001011 2858+TEXT CSECT 001011 D3C840D96B94404D 2859+SPTR0113 DC C'LH R,m (unal3)' 0025A0 2860+TDSCDAT CSECT 0025A0 2861+ DS 0F 0025A0 0E001011 2862+ DC AL1(L'SPTR0113),AL3(SPTR0113) 2863+* 0049DC 2864+TDSCTBL CSECT 049DC 2865+T105TPTR EQU * 0049DC 00002588 2866+ DC A(T105TDSC) enabled test 2867+* 00543E 2868+TCODE CSECT 005440 2869+ DS 0D ensure double word alignment for test 005440 2870+T105 DS 0H 01650000 005440 90EC D00C 0000C 2871+ STM 14,12,12(13) SAVE REGISTERS 02950000 005444 18CF 2872+ LR R12,R15 base register := entry address 05440 2873+ USING T105,R12 declare code base register 005446 41B0 C022 05462 2874+ LA R11,T105L load loop target to R11 00544A 58F0 C108 05548 2875+ L R15,=A(SAVETST) R15 := current save area 00544E 50DF 0004 00004 2876+ ST R13,4(R15) set back pointer in current save area 005452 182D 2877+ LR R2,R13 remember callers save area 005454 18DF 2878+ LR R13,R15 setup current save area 005456 50D2 0008 00008 2879+ ST R13,8(R2) set forw pointer in callers save area 00000 2880+ USING TDSC,R1 declare TDSC base register 00545A 58F0 1008 00008 2881+ L R15,TLRCNT load local repeat count to R15 2882+* 2883 * 00545E 4130 C0FC 0553C 2884 LA R3,T105V 2885 T105L REPINS LH,(R2,3(R3)) repeat: LH R2,3(R3) 2886+* 2887+* build from sublist &ALIST a comma separated string &ARGS 2888+* 2889+* 2890+* 2891+* 2892+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 2893+* this allows to transfer the repeat count from last TDSCGEN call 2894+* 2895+* 05462 2896+T105L EQU * 2897+* 2898+* write a comment indicating what REPINS does (in case NOGEN in effect) 2899+* 2900+*,// REPINS: do 50 times: 2901+* 2902+* MNOTE requires that ' is doubled for expanded variables 2903+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 55 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 2904+* 2905+* 2906+*,// LH R2,3(R3) 2907+* 2908+* finally generate code: &ICNT copies of &CODE &ARGS 2909+* 005462 4823 0003 00003 2910+ LH R2,3(R3) 005466 4823 0003 00003 2911+ LH R2,3(R3) 00546A 4823 0003 00003 2912+ LH R2,3(R3) 00546E 4823 0003 00003 2913+ LH R2,3(R3) 005472 4823 0003 00003 2914+ LH R2,3(R3) 005476 4823 0003 00003 2915+ LH R2,3(R3) 00547A 4823 0003 00003 2916+ LH R2,3(R3) 00547E 4823 0003 00003 2917+ LH R2,3(R3) 005482 4823 0003 00003 2918+ LH R2,3(R3) 005486 4823 0003 00003 2919+ LH R2,3(R3) 00548A 4823 0003 00003 2920+ LH R2,3(R3) 00548E 4823 0003 00003 2921+ LH R2,3(R3) 005492 4823 0003 00003 2922+ LH R2,3(R3) 005496 4823 0003 00003 2923+ LH R2,3(R3) 00549A 4823 0003 00003 2924+ LH R2,3(R3) 00549E 4823 0003 00003 2925+ LH R2,3(R3) 0054A2 4823 0003 00003 2926+ LH R2,3(R3) 0054A6 4823 0003 00003 2927+ LH R2,3(R3) 0054AA 4823 0003 00003 2928+ LH R2,3(R3) 0054AE 4823 0003 00003 2929+ LH R2,3(R3) 0054B2 4823 0003 00003 2930+ LH R2,3(R3) 0054B6 4823 0003 00003 2931+ LH R2,3(R3) 0054BA 4823 0003 00003 2932+ LH R2,3(R3) 0054BE 4823 0003 00003 2933+ LH R2,3(R3) 0054C2 4823 0003 00003 2934+ LH R2,3(R3) 0054C6 4823 0003 00003 2935+ LH R2,3(R3) 0054CA 4823 0003 00003 2936+ LH R2,3(R3) 0054CE 4823 0003 00003 2937+ LH R2,3(R3) 0054D2 4823 0003 00003 2938+ LH R2,3(R3) 0054D6 4823 0003 00003 2939+ LH R2,3(R3) 0054DA 4823 0003 00003 2940+ LH R2,3(R3) 0054DE 4823 0003 00003 2941+ LH R2,3(R3) 0054E2 4823 0003 00003 2942+ LH R2,3(R3) 0054E6 4823 0003 00003 2943+ LH R2,3(R3) 0054EA 4823 0003 00003 2944+ LH R2,3(R3) 0054EE 4823 0003 00003 2945+ LH R2,3(R3) 0054F2 4823 0003 00003 2946+ LH R2,3(R3) 0054F6 4823 0003 00003 2947+ LH R2,3(R3) 0054FA 4823 0003 00003 2948+ LH R2,3(R3) 0054FE 4823 0003 00003 2949+ LH R2,3(R3) 005502 4823 0003 00003 2950+ LH R2,3(R3) 005506 4823 0003 00003 2951+ LH R2,3(R3) 00550A 4823 0003 00003 2952+ LH R2,3(R3) 00550E 4823 0003 00003 2953+ LH R2,3(R3) 005512 4823 0003 00003 2954+ LH R2,3(R3) 005516 4823 0003 00003 2955+ LH R2,3(R3) 00551A 4823 0003 00003 2956+ LH R2,3(R3) 00551E 4823 0003 00003 2957+ LH R2,3(R3) 005522 4823 0003 00003 2958+ LH R2,3(R3) PAGE 56 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005526 4823 0003 00003 2959+ LH R2,3(R3) 2960+* 00552A 06FB 2961 BCTR R15,R11 2962 TSIMRET 00552C 58F0 C108 05548 2963+ L R15,=A(SAVETST) R15 := current save area 005530 58DF 0004 00004 2964+ L R13,4(R15) get old save area back 005534 98EC D00C 0000C 2965+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005538 07FE 2966+ BR 14 RETURN 02000000 2967 * 00553C 2968 DS 0F 00553C 012301230123 2969 T105V DC X'0123',X'0123',X'0123' across word border 2970 TSIMEND 005548 2971+ LTORG 005548 00000458 2972 =A(SAVETST) 0554C 2973+T105TEND EQU * 2974 * 2975 * Test 106 -- LTR R,R -------------------------------------- 2976 * 2977 TSIMBEG T106,15000,100,1,C'LTR R,R' 2978+* 0025A4 2979+TDSCDAT CSECT 0025A8 2980+ DS 0D 2981+* 0025A8 00005550 2982+T106TDSC DC A(T106) // TENTRY 0025AC 000000FC 2983+ DC A(T106TEND-T106) // TLENGTH 0025B0 00003A98 2984+ DC F'15000' // TLRCNT 0025B4 00000064 2985+ DC F'100' // TIGCNT 0025B8 00000001 2986+ DC F'1' // TLTYPE 00101F 2987+TEXT CSECT 00101F E3F1F0F6 2988+SPTR0124 DC C'T106' 0025BC 2989+TDSCDAT CSECT 0025BC 2990+ DS 0F 0025BC 0400101F 2991+ DC AL1(L'SPTR0124),AL3(SPTR0124) 001023 2992+TEXT CSECT 001023 D3E3D940D96BD9 2993+SPTR0125 DC C'LTR R,R' 0025C0 2994+TDSCDAT CSECT 0025C0 2995+ DS 0F 0025C0 07001023 2996+ DC AL1(L'SPTR0125),AL3(SPTR0125) 2997+* 0049E0 2998+TDSCTBL CSECT 049E0 2999+T106TPTR EQU * 0049E0 000025A8 3000+ DC A(T106TDSC) enabled test 3001+* 00554C 3002+TCODE CSECT 005550 3003+ DS 0D ensure double word alignment for test 005550 3004+T106 DS 0H 01650000 005550 90EC D00C 0000C 3005+ STM 14,12,12(13) SAVE REGISTERS 02950000 005554 18CF 3006+ LR R12,R15 base register := entry address 05550 3007+ USING T106,R12 declare code base register 005556 41B0 C01E 0556E 3008+ LA R11,T106L load loop target to R11 00555A 58F0 C0F8 05648 3009+ L R15,=A(SAVETST) R15 := current save area 00555E 50DF 0004 00004 3010+ ST R13,4(R15) set back pointer in current save area 005562 182D 3011+ LR R2,R13 remember callers save area 005564 18DF 3012+ LR R13,R15 setup current save area 005566 50D2 0008 00008 3013+ ST R13,8(R2) set forw pointer in callers save area PAGE 57 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00000 3014+ USING TDSC,R1 declare TDSC base register 00556A 58F0 1008 00008 3015+ L R15,TLRCNT load local repeat count to R15 3016+* 3017 * 3018 T106L REPINS LTR,(R2,R1) repeat: LTR R2,R1 3019+* 3020+* build from sublist &ALIST a comma separated string &ARGS 3021+* 3022+* 3023+* 3024+* 3025+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3026+* this allows to transfer the repeat count from last TDSCGEN call 3027+* 3028+* 0556E 3029+T106L EQU * 3030+* 3031+* write a comment indicating what REPINS does (in case NOGEN in effect) 3032+* 3033+*,// REPINS: do 100 times: 3034+* 3035+* MNOTE requires that ' is doubled for expanded variables 3036+* thus build &MASTR as a copy of '&ARGS with ' doubled 3037+* 3038+* 3039+*,// LTR R2,R1 3040+* 3041+* finally generate code: &ICNT copies of &CODE &ARGS 3042+* 00556E 1221 3043+ LTR R2,R1 005570 1221 3044+ LTR R2,R1 005572 1221 3045+ LTR R2,R1 005574 1221 3046+ LTR R2,R1 005576 1221 3047+ LTR R2,R1 005578 1221 3048+ LTR R2,R1 00557A 1221 3049+ LTR R2,R1 00557C 1221 3050+ LTR R2,R1 00557E 1221 3051+ LTR R2,R1 005580 1221 3052+ LTR R2,R1 005582 1221 3053+ LTR R2,R1 005584 1221 3054+ LTR R2,R1 005586 1221 3055+ LTR R2,R1 005588 1221 3056+ LTR R2,R1 00558A 1221 3057+ LTR R2,R1 00558C 1221 3058+ LTR R2,R1 00558E 1221 3059+ LTR R2,R1 005590 1221 3060+ LTR R2,R1 005592 1221 3061+ LTR R2,R1 005594 1221 3062+ LTR R2,R1 005596 1221 3063+ LTR R2,R1 005598 1221 3064+ LTR R2,R1 00559A 1221 3065+ LTR R2,R1 00559C 1221 3066+ LTR R2,R1 00559E 1221 3067+ LTR R2,R1 0055A0 1221 3068+ LTR R2,R1 PAGE 58 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0055A2 1221 3069+ LTR R2,R1 0055A4 1221 3070+ LTR R2,R1 0055A6 1221 3071+ LTR R2,R1 0055A8 1221 3072+ LTR R2,R1 0055AA 1221 3073+ LTR R2,R1 0055AC 1221 3074+ LTR R2,R1 0055AE 1221 3075+ LTR R2,R1 0055B0 1221 3076+ LTR R2,R1 0055B2 1221 3077+ LTR R2,R1 0055B4 1221 3078+ LTR R2,R1 0055B6 1221 3079+ LTR R2,R1 0055B8 1221 3080+ LTR R2,R1 0055BA 1221 3081+ LTR R2,R1 0055BC 1221 3082+ LTR R2,R1 0055BE 1221 3083+ LTR R2,R1 0055C0 1221 3084+ LTR R2,R1 0055C2 1221 3085+ LTR R2,R1 0055C4 1221 3086+ LTR R2,R1 0055C6 1221 3087+ LTR R2,R1 0055C8 1221 3088+ LTR R2,R1 0055CA 1221 3089+ LTR R2,R1 0055CC 1221 3090+ LTR R2,R1 0055CE 1221 3091+ LTR R2,R1 0055D0 1221 3092+ LTR R2,R1 0055D2 1221 3093+ LTR R2,R1 0055D4 1221 3094+ LTR R2,R1 0055D6 1221 3095+ LTR R2,R1 0055D8 1221 3096+ LTR R2,R1 0055DA 1221 3097+ LTR R2,R1 0055DC 1221 3098+ LTR R2,R1 0055DE 1221 3099+ LTR R2,R1 0055E0 1221 3100+ LTR R2,R1 0055E2 1221 3101+ LTR R2,R1 0055E4 1221 3102+ LTR R2,R1 0055E6 1221 3103+ LTR R2,R1 0055E8 1221 3104+ LTR R2,R1 0055EA 1221 3105+ LTR R2,R1 0055EC 1221 3106+ LTR R2,R1 0055EE 1221 3107+ LTR R2,R1 0055F0 1221 3108+ LTR R2,R1 0055F2 1221 3109+ LTR R2,R1 0055F4 1221 3110+ LTR R2,R1 0055F6 1221 3111+ LTR R2,R1 0055F8 1221 3112+ LTR R2,R1 0055FA 1221 3113+ LTR R2,R1 0055FC 1221 3114+ LTR R2,R1 0055FE 1221 3115+ LTR R2,R1 005600 1221 3116+ LTR R2,R1 005602 1221 3117+ LTR R2,R1 005604 1221 3118+ LTR R2,R1 005606 1221 3119+ LTR R2,R1 005608 1221 3120+ LTR R2,R1 00560A 1221 3121+ LTR R2,R1 00560C 1221 3122+ LTR R2,R1 00560E 1221 3123+ LTR R2,R1 PAGE 59 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005610 1221 3124+ LTR R2,R1 005612 1221 3125+ LTR R2,R1 005614 1221 3126+ LTR R2,R1 005616 1221 3127+ LTR R2,R1 005618 1221 3128+ LTR R2,R1 00561A 1221 3129+ LTR R2,R1 00561C 1221 3130+ LTR R2,R1 00561E 1221 3131+ LTR R2,R1 005620 1221 3132+ LTR R2,R1 005622 1221 3133+ LTR R2,R1 005624 1221 3134+ LTR R2,R1 005626 1221 3135+ LTR R2,R1 005628 1221 3136+ LTR R2,R1 00562A 1221 3137+ LTR R2,R1 00562C 1221 3138+ LTR R2,R1 00562E 1221 3139+ LTR R2,R1 005630 1221 3140+ LTR R2,R1 005632 1221 3141+ LTR R2,R1 005634 1221 3142+ LTR R2,R1 3143+* 005636 06FB 3144 BCTR R15,R11 3145 TSIMRET 005638 58F0 C0F8 05648 3146+ L R15,=A(SAVETST) R15 := current save area 00563C 58DF 0004 00004 3147+ L R13,4(R15) get old save area back 005640 98EC D00C 0000C 3148+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005644 07FE 3149+ BR 14 RETURN 02000000 3150 TSIMEND 005648 3151+ LTORG 005648 00000458 3152 =A(SAVETST) 0564C 3153+T106TEND EQU * 3154 * 3155 * Test 107 -- LCR R,R -------------------------------------- 3156 * 3157 TSIMBEG T107,13000,100,1,C'LCR R,R' 3158+* 0025C4 3159+TDSCDAT CSECT 0025C8 3160+ DS 0D 3161+* 0025C8 00005650 3162+T107TDSC DC A(T107) // TENTRY 0025CC 00000108 3163+ DC A(T107TEND-T107) // TLENGTH 0025D0 000032C8 3164+ DC F'13000' // TLRCNT 0025D4 00000064 3165+ DC F'100' // TIGCNT 0025D8 00000001 3166+ DC F'1' // TLTYPE 00102A 3167+TEXT CSECT 00102A E3F1F0F7 3168+SPTR0136 DC C'T107' 0025DC 3169+TDSCDAT CSECT 0025DC 3170+ DS 0F 0025DC 0400102A 3171+ DC AL1(L'SPTR0136),AL3(SPTR0136) 00102E 3172+TEXT CSECT 00102E D3C3D940D96BD9 3173+SPTR0137 DC C'LCR R,R' 0025E0 3174+TDSCDAT CSECT 0025E0 3175+ DS 0F 0025E0 0700102E 3176+ DC AL1(L'SPTR0137),AL3(SPTR0137) 3177+* 0049E4 3178+TDSCTBL CSECT PAGE 60 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 049E4 3179+T107TPTR EQU * 0049E4 000025C8 3180+ DC A(T107TDSC) enabled test 3181+* 00564C 3182+TCODE CSECT 005650 3183+ DS 0D ensure double word alignment for test 005650 3184+T107 DS 0H 01650000 005650 90EC D00C 0000C 3185+ STM 14,12,12(13) SAVE REGISTERS 02950000 005654 18CF 3186+ LR R12,R15 base register := entry address 05650 3187+ USING T107,R12 declare code base register 005656 41B0 C022 05672 3188+ LA R11,T107L load loop target to R11 00565A 58F0 C100 05750 3189+ L R15,=A(SAVETST) R15 := current save area 00565E 50DF 0004 00004 3190+ ST R13,4(R15) set back pointer in current save area 005662 182D 3191+ LR R2,R13 remember callers save area 005664 18DF 3192+ LR R13,R15 setup current save area 005666 50D2 0008 00008 3193+ ST R13,8(R2) set forw pointer in callers save area 00000 3194+ USING TDSC,R1 declare TDSC base register 00566A 58F0 1008 00008 3195+ L R15,TLRCNT load local repeat count to R15 3196+* 3197 * 00566E 4120 C104 05754 3198 LA R2,=F'1234' 3199 T107L REPINS LCR,(R2,R2) repeat: LCR R2,R2 3200+* 3201+* build from sublist &ALIST a comma separated string &ARGS 3202+* 3203+* 3204+* 3205+* 3206+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3207+* this allows to transfer the repeat count from last TDSCGEN call 3208+* 3209+* 05672 3210+T107L EQU * 3211+* 3212+* write a comment indicating what REPINS does (in case NOGEN in effect) 3213+* 3214+*,// REPINS: do 100 times: 3215+* 3216+* MNOTE requires that ' is doubled for expanded variables 3217+* thus build &MASTR as a copy of '&ARGS with ' doubled 3218+* 3219+* 3220+*,// LCR R2,R2 3221+* 3222+* finally generate code: &ICNT copies of &CODE &ARGS 3223+* 005672 1322 3224+ LCR R2,R2 005674 1322 3225+ LCR R2,R2 005676 1322 3226+ LCR R2,R2 005678 1322 3227+ LCR R2,R2 00567A 1322 3228+ LCR R2,R2 00567C 1322 3229+ LCR R2,R2 00567E 1322 3230+ LCR R2,R2 005680 1322 3231+ LCR R2,R2 005682 1322 3232+ LCR R2,R2 005684 1322 3233+ LCR R2,R2 PAGE 61 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005686 1322 3234+ LCR R2,R2 005688 1322 3235+ LCR R2,R2 00568A 1322 3236+ LCR R2,R2 00568C 1322 3237+ LCR R2,R2 00568E 1322 3238+ LCR R2,R2 005690 1322 3239+ LCR R2,R2 005692 1322 3240+ LCR R2,R2 005694 1322 3241+ LCR R2,R2 005696 1322 3242+ LCR R2,R2 005698 1322 3243+ LCR R2,R2 00569A 1322 3244+ LCR R2,R2 00569C 1322 3245+ LCR R2,R2 00569E 1322 3246+ LCR R2,R2 0056A0 1322 3247+ LCR R2,R2 0056A2 1322 3248+ LCR R2,R2 0056A4 1322 3249+ LCR R2,R2 0056A6 1322 3250+ LCR R2,R2 0056A8 1322 3251+ LCR R2,R2 0056AA 1322 3252+ LCR R2,R2 0056AC 1322 3253+ LCR R2,R2 0056AE 1322 3254+ LCR R2,R2 0056B0 1322 3255+ LCR R2,R2 0056B2 1322 3256+ LCR R2,R2 0056B4 1322 3257+ LCR R2,R2 0056B6 1322 3258+ LCR R2,R2 0056B8 1322 3259+ LCR R2,R2 0056BA 1322 3260+ LCR R2,R2 0056BC 1322 3261+ LCR R2,R2 0056BE 1322 3262+ LCR R2,R2 0056C0 1322 3263+ LCR R2,R2 0056C2 1322 3264+ LCR R2,R2 0056C4 1322 3265+ LCR R2,R2 0056C6 1322 3266+ LCR R2,R2 0056C8 1322 3267+ LCR R2,R2 0056CA 1322 3268+ LCR R2,R2 0056CC 1322 3269+ LCR R2,R2 0056CE 1322 3270+ LCR R2,R2 0056D0 1322 3271+ LCR R2,R2 0056D2 1322 3272+ LCR R2,R2 0056D4 1322 3273+ LCR R2,R2 0056D6 1322 3274+ LCR R2,R2 0056D8 1322 3275+ LCR R2,R2 0056DA 1322 3276+ LCR R2,R2 0056DC 1322 3277+ LCR R2,R2 0056DE 1322 3278+ LCR R2,R2 0056E0 1322 3279+ LCR R2,R2 0056E2 1322 3280+ LCR R2,R2 0056E4 1322 3281+ LCR R2,R2 0056E6 1322 3282+ LCR R2,R2 0056E8 1322 3283+ LCR R2,R2 0056EA 1322 3284+ LCR R2,R2 0056EC 1322 3285+ LCR R2,R2 0056EE 1322 3286+ LCR R2,R2 0056F0 1322 3287+ LCR R2,R2 0056F2 1322 3288+ LCR R2,R2 PAGE 62 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0056F4 1322 3289+ LCR R2,R2 0056F6 1322 3290+ LCR R2,R2 0056F8 1322 3291+ LCR R2,R2 0056FA 1322 3292+ LCR R2,R2 0056FC 1322 3293+ LCR R2,R2 0056FE 1322 3294+ LCR R2,R2 005700 1322 3295+ LCR R2,R2 005702 1322 3296+ LCR R2,R2 005704 1322 3297+ LCR R2,R2 005706 1322 3298+ LCR R2,R2 005708 1322 3299+ LCR R2,R2 00570A 1322 3300+ LCR R2,R2 00570C 1322 3301+ LCR R2,R2 00570E 1322 3302+ LCR R2,R2 005710 1322 3303+ LCR R2,R2 005712 1322 3304+ LCR R2,R2 005714 1322 3305+ LCR R2,R2 005716 1322 3306+ LCR R2,R2 005718 1322 3307+ LCR R2,R2 00571A 1322 3308+ LCR R2,R2 00571C 1322 3309+ LCR R2,R2 00571E 1322 3310+ LCR R2,R2 005720 1322 3311+ LCR R2,R2 005722 1322 3312+ LCR R2,R2 005724 1322 3313+ LCR R2,R2 005726 1322 3314+ LCR R2,R2 005728 1322 3315+ LCR R2,R2 00572A 1322 3316+ LCR R2,R2 00572C 1322 3317+ LCR R2,R2 00572E 1322 3318+ LCR R2,R2 005730 1322 3319+ LCR R2,R2 005732 1322 3320+ LCR R2,R2 005734 1322 3321+ LCR R2,R2 005736 1322 3322+ LCR R2,R2 005738 1322 3323+ LCR R2,R2 3324+* 00573A 06FB 3325 BCTR R15,R11 3326 TSIMRET 00573C 58F0 C100 05750 3327+ L R15,=A(SAVETST) R15 := current save area 005740 58DF 0004 00004 3328+ L R13,4(R15) get old save area back 005744 98EC D00C 0000C 3329+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005748 07FE 3330+ BR 14 RETURN 02000000 3331 TSIMEND 005750 3332+ LTORG 005750 00000458 3333 =A(SAVETST) 005754 000004D2 3334 =F'1234' 05758 3335+T107TEND EQU * 3336 * 3337 * Test 108 -- LNR R,R -------------------------------------- 3338 * 3339 TSIMBEG T108,13000,100,1,C'LNR R,R' 3340+* 0025E4 3341+TDSCDAT CSECT 0025E8 3342+ DS 0D 3343+* PAGE 63 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0025E8 00005758 3344+T108TDSC DC A(T108) // TENTRY 0025EC 00000108 3345+ DC A(T108TEND-T108) // TLENGTH 0025F0 000032C8 3346+ DC F'13000' // TLRCNT 0025F4 00000064 3347+ DC F'100' // TIGCNT 0025F8 00000001 3348+ DC F'1' // TLTYPE 001035 3349+TEXT CSECT 001035 E3F1F0F8 3350+SPTR0148 DC C'T108' 0025FC 3351+TDSCDAT CSECT 0025FC 3352+ DS 0F 0025FC 04001035 3353+ DC AL1(L'SPTR0148),AL3(SPTR0148) 001039 3354+TEXT CSECT 001039 D3D5D940D96BD9 3355+SPTR0149 DC C'LNR R,R' 002600 3356+TDSCDAT CSECT 002600 3357+ DS 0F 002600 07001039 3358+ DC AL1(L'SPTR0149),AL3(SPTR0149) 3359+* 0049E8 3360+TDSCTBL CSECT 049E8 3361+T108TPTR EQU * 0049E8 000025E8 3362+ DC A(T108TDSC) enabled test 3363+* 005758 3364+TCODE CSECT 005758 3365+ DS 0D ensure double word alignment for test 005758 3366+T108 DS 0H 01650000 005758 90EC D00C 0000C 3367+ STM 14,12,12(13) SAVE REGISTERS 02950000 00575C 18CF 3368+ LR R12,R15 base register := entry address 05758 3369+ USING T108,R12 declare code base register 00575E 41B0 C022 0577A 3370+ LA R11,T108L load loop target to R11 005762 58F0 C100 05858 3371+ L R15,=A(SAVETST) R15 := current save area 005766 50DF 0004 00004 3372+ ST R13,4(R15) set back pointer in current save area 00576A 182D 3373+ LR R2,R13 remember callers save area 00576C 18DF 3374+ LR R13,R15 setup current save area 00576E 50D2 0008 00008 3375+ ST R13,8(R2) set forw pointer in callers save area 00000 3376+ USING TDSC,R1 declare TDSC base register 005772 58F0 1008 00008 3377+ L R15,TLRCNT load local repeat count to R15 3378+* 3379 * 005776 4110 C104 0585C 3380 LA R1,=F'1234' 3381 T108L REPINS LNR,(R2,R1) repeat: LNR R2,R1 3382+* 3383+* build from sublist &ALIST a comma separated string &ARGS 3384+* 3385+* 3386+* 3387+* 3388+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3389+* this allows to transfer the repeat count from last TDSCGEN call 3390+* 3391+* 0577A 3392+T108L EQU * 3393+* 3394+* write a comment indicating what REPINS does (in case NOGEN in effect) 3395+* 3396+*,// REPINS: do 100 times: 3397+* 3398+* MNOTE requires that ' is doubled for expanded variables PAGE 64 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 3399+* thus build &MASTR as a copy of '&ARGS with ' doubled 3400+* 3401+* 3402+*,// LNR R2,R1 3403+* 3404+* finally generate code: &ICNT copies of &CODE &ARGS 3405+* 00577A 1121 3406+ LNR R2,R1 00577C 1121 3407+ LNR R2,R1 00577E 1121 3408+ LNR R2,R1 005780 1121 3409+ LNR R2,R1 005782 1121 3410+ LNR R2,R1 005784 1121 3411+ LNR R2,R1 005786 1121 3412+ LNR R2,R1 005788 1121 3413+ LNR R2,R1 00578A 1121 3414+ LNR R2,R1 00578C 1121 3415+ LNR R2,R1 00578E 1121 3416+ LNR R2,R1 005790 1121 3417+ LNR R2,R1 005792 1121 3418+ LNR R2,R1 005794 1121 3419+ LNR R2,R1 005796 1121 3420+ LNR R2,R1 005798 1121 3421+ LNR R2,R1 00579A 1121 3422+ LNR R2,R1 00579C 1121 3423+ LNR R2,R1 00579E 1121 3424+ LNR R2,R1 0057A0 1121 3425+ LNR R2,R1 0057A2 1121 3426+ LNR R2,R1 0057A4 1121 3427+ LNR R2,R1 0057A6 1121 3428+ LNR R2,R1 0057A8 1121 3429+ LNR R2,R1 0057AA 1121 3430+ LNR R2,R1 0057AC 1121 3431+ LNR R2,R1 0057AE 1121 3432+ LNR R2,R1 0057B0 1121 3433+ LNR R2,R1 0057B2 1121 3434+ LNR R2,R1 0057B4 1121 3435+ LNR R2,R1 0057B6 1121 3436+ LNR R2,R1 0057B8 1121 3437+ LNR R2,R1 0057BA 1121 3438+ LNR R2,R1 0057BC 1121 3439+ LNR R2,R1 0057BE 1121 3440+ LNR R2,R1 0057C0 1121 3441+ LNR R2,R1 0057C2 1121 3442+ LNR R2,R1 0057C4 1121 3443+ LNR R2,R1 0057C6 1121 3444+ LNR R2,R1 0057C8 1121 3445+ LNR R2,R1 0057CA 1121 3446+ LNR R2,R1 0057CC 1121 3447+ LNR R2,R1 0057CE 1121 3448+ LNR R2,R1 0057D0 1121 3449+ LNR R2,R1 0057D2 1121 3450+ LNR R2,R1 0057D4 1121 3451+ LNR R2,R1 0057D6 1121 3452+ LNR R2,R1 0057D8 1121 3453+ LNR R2,R1 PAGE 65 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0057DA 1121 3454+ LNR R2,R1 0057DC 1121 3455+ LNR R2,R1 0057DE 1121 3456+ LNR R2,R1 0057E0 1121 3457+ LNR R2,R1 0057E2 1121 3458+ LNR R2,R1 0057E4 1121 3459+ LNR R2,R1 0057E6 1121 3460+ LNR R2,R1 0057E8 1121 3461+ LNR R2,R1 0057EA 1121 3462+ LNR R2,R1 0057EC 1121 3463+ LNR R2,R1 0057EE 1121 3464+ LNR R2,R1 0057F0 1121 3465+ LNR R2,R1 0057F2 1121 3466+ LNR R2,R1 0057F4 1121 3467+ LNR R2,R1 0057F6 1121 3468+ LNR R2,R1 0057F8 1121 3469+ LNR R2,R1 0057FA 1121 3470+ LNR R2,R1 0057FC 1121 3471+ LNR R2,R1 0057FE 1121 3472+ LNR R2,R1 005800 1121 3473+ LNR R2,R1 005802 1121 3474+ LNR R2,R1 005804 1121 3475+ LNR R2,R1 005806 1121 3476+ LNR R2,R1 005808 1121 3477+ LNR R2,R1 00580A 1121 3478+ LNR R2,R1 00580C 1121 3479+ LNR R2,R1 00580E 1121 3480+ LNR R2,R1 005810 1121 3481+ LNR R2,R1 005812 1121 3482+ LNR R2,R1 005814 1121 3483+ LNR R2,R1 005816 1121 3484+ LNR R2,R1 005818 1121 3485+ LNR R2,R1 00581A 1121 3486+ LNR R2,R1 00581C 1121 3487+ LNR R2,R1 00581E 1121 3488+ LNR R2,R1 005820 1121 3489+ LNR R2,R1 005822 1121 3490+ LNR R2,R1 005824 1121 3491+ LNR R2,R1 005826 1121 3492+ LNR R2,R1 005828 1121 3493+ LNR R2,R1 00582A 1121 3494+ LNR R2,R1 00582C 1121 3495+ LNR R2,R1 00582E 1121 3496+ LNR R2,R1 005830 1121 3497+ LNR R2,R1 005832 1121 3498+ LNR R2,R1 005834 1121 3499+ LNR R2,R1 005836 1121 3500+ LNR R2,R1 005838 1121 3501+ LNR R2,R1 00583A 1121 3502+ LNR R2,R1 00583C 1121 3503+ LNR R2,R1 00583E 1121 3504+ LNR R2,R1 005840 1121 3505+ LNR R2,R1 3506+* 005842 06FB 3507 BCTR R15,R11 3508 TSIMRET PAGE 66 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005844 58F0 C100 05858 3509+ L R15,=A(SAVETST) R15 := current save area 005848 58DF 0004 00004 3510+ L R13,4(R15) get old save area back 00584C 98EC D00C 0000C 3511+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005850 07FE 3512+ BR 14 RETURN 02000000 3513 TSIMEND 005858 3514+ LTORG 005858 00000458 3515 =A(SAVETST) 00585C 000004D2 3516 =F'1234' 05860 3517+T108TEND EQU * 3518 * 3519 * Test 109 -- LPR R,R -------------------------------------- 3520 * 3521 TSIMBEG T109,13000,100,1,C'LPR R,R' 3522+* 002604 3523+TDSCDAT CSECT 002608 3524+ DS 0D 3525+* 002608 00005860 3526+T109TDSC DC A(T109) // TENTRY 00260C 00000108 3527+ DC A(T109TEND-T109) // TLENGTH 002610 000032C8 3528+ DC F'13000' // TLRCNT 002614 00000064 3529+ DC F'100' // TIGCNT 002618 00000001 3530+ DC F'1' // TLTYPE 001040 3531+TEXT CSECT 001040 E3F1F0F9 3532+SPTR0160 DC C'T109' 00261C 3533+TDSCDAT CSECT 00261C 3534+ DS 0F 00261C 04001040 3535+ DC AL1(L'SPTR0160),AL3(SPTR0160) 001044 3536+TEXT CSECT 001044 D3D7D940D96BD9 3537+SPTR0161 DC C'LPR R,R' 002620 3538+TDSCDAT CSECT 002620 3539+ DS 0F 002620 07001044 3540+ DC AL1(L'SPTR0161),AL3(SPTR0161) 3541+* 0049EC 3542+TDSCTBL CSECT 049EC 3543+T109TPTR EQU * 0049EC 00002608 3544+ DC A(T109TDSC) enabled test 3545+* 005860 3546+TCODE CSECT 005860 3547+ DS 0D ensure double word alignment for test 005860 3548+T109 DS 0H 01650000 005860 90EC D00C 0000C 3549+ STM 14,12,12(13) SAVE REGISTERS 02950000 005864 18CF 3550+ LR R12,R15 base register := entry address 05860 3551+ USING T109,R12 declare code base register 005866 41B0 C022 05882 3552+ LA R11,T109L load loop target to R11 00586A 58F0 C100 05960 3553+ L R15,=A(SAVETST) R15 := current save area 00586E 50DF 0004 00004 3554+ ST R13,4(R15) set back pointer in current save area 005872 182D 3555+ LR R2,R13 remember callers save area 005874 18DF 3556+ LR R13,R15 setup current save area 005876 50D2 0008 00008 3557+ ST R13,8(R2) set forw pointer in callers save area 00000 3558+ USING TDSC,R1 declare TDSC base register 00587A 58F0 1008 00008 3559+ L R15,TLRCNT load local repeat count to R15 3560+* 3561 * 00587E 4110 C104 05964 3562 LA R1,=F'-1234' 3563 T109L REPINS LPR,(R2,R1) repeat: LPR R2,R1 PAGE 67 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 3564+* 3565+* build from sublist &ALIST a comma separated string &ARGS 3566+* 3567+* 3568+* 3569+* 3570+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3571+* this allows to transfer the repeat count from last TDSCGEN call 3572+* 3573+* 05882 3574+T109L EQU * 3575+* 3576+* write a comment indicating what REPINS does (in case NOGEN in effect) 3577+* 3578+*,// REPINS: do 100 times: 3579+* 3580+* MNOTE requires that ' is doubled for expanded variables 3581+* thus build &MASTR as a copy of '&ARGS with ' doubled 3582+* 3583+* 3584+*,// LPR R2,R1 3585+* 3586+* finally generate code: &ICNT copies of &CODE &ARGS 3587+* 005882 1021 3588+ LPR R2,R1 005884 1021 3589+ LPR R2,R1 005886 1021 3590+ LPR R2,R1 005888 1021 3591+ LPR R2,R1 00588A 1021 3592+ LPR R2,R1 00588C 1021 3593+ LPR R2,R1 00588E 1021 3594+ LPR R2,R1 005890 1021 3595+ LPR R2,R1 005892 1021 3596+ LPR R2,R1 005894 1021 3597+ LPR R2,R1 005896 1021 3598+ LPR R2,R1 005898 1021 3599+ LPR R2,R1 00589A 1021 3600+ LPR R2,R1 00589C 1021 3601+ LPR R2,R1 00589E 1021 3602+ LPR R2,R1 0058A0 1021 3603+ LPR R2,R1 0058A2 1021 3604+ LPR R2,R1 0058A4 1021 3605+ LPR R2,R1 0058A6 1021 3606+ LPR R2,R1 0058A8 1021 3607+ LPR R2,R1 0058AA 1021 3608+ LPR R2,R1 0058AC 1021 3609+ LPR R2,R1 0058AE 1021 3610+ LPR R2,R1 0058B0 1021 3611+ LPR R2,R1 0058B2 1021 3612+ LPR R2,R1 0058B4 1021 3613+ LPR R2,R1 0058B6 1021 3614+ LPR R2,R1 0058B8 1021 3615+ LPR R2,R1 0058BA 1021 3616+ LPR R2,R1 0058BC 1021 3617+ LPR R2,R1 0058BE 1021 3618+ LPR R2,R1 PAGE 68 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0058C0 1021 3619+ LPR R2,R1 0058C2 1021 3620+ LPR R2,R1 0058C4 1021 3621+ LPR R2,R1 0058C6 1021 3622+ LPR R2,R1 0058C8 1021 3623+ LPR R2,R1 0058CA 1021 3624+ LPR R2,R1 0058CC 1021 3625+ LPR R2,R1 0058CE 1021 3626+ LPR R2,R1 0058D0 1021 3627+ LPR R2,R1 0058D2 1021 3628+ LPR R2,R1 0058D4 1021 3629+ LPR R2,R1 0058D6 1021 3630+ LPR R2,R1 0058D8 1021 3631+ LPR R2,R1 0058DA 1021 3632+ LPR R2,R1 0058DC 1021 3633+ LPR R2,R1 0058DE 1021 3634+ LPR R2,R1 0058E0 1021 3635+ LPR R2,R1 0058E2 1021 3636+ LPR R2,R1 0058E4 1021 3637+ LPR R2,R1 0058E6 1021 3638+ LPR R2,R1 0058E8 1021 3639+ LPR R2,R1 0058EA 1021 3640+ LPR R2,R1 0058EC 1021 3641+ LPR R2,R1 0058EE 1021 3642+ LPR R2,R1 0058F0 1021 3643+ LPR R2,R1 0058F2 1021 3644+ LPR R2,R1 0058F4 1021 3645+ LPR R2,R1 0058F6 1021 3646+ LPR R2,R1 0058F8 1021 3647+ LPR R2,R1 0058FA 1021 3648+ LPR R2,R1 0058FC 1021 3649+ LPR R2,R1 0058FE 1021 3650+ LPR R2,R1 005900 1021 3651+ LPR R2,R1 005902 1021 3652+ LPR R2,R1 005904 1021 3653+ LPR R2,R1 005906 1021 3654+ LPR R2,R1 005908 1021 3655+ LPR R2,R1 00590A 1021 3656+ LPR R2,R1 00590C 1021 3657+ LPR R2,R1 00590E 1021 3658+ LPR R2,R1 005910 1021 3659+ LPR R2,R1 005912 1021 3660+ LPR R2,R1 005914 1021 3661+ LPR R2,R1 005916 1021 3662+ LPR R2,R1 005918 1021 3663+ LPR R2,R1 00591A 1021 3664+ LPR R2,R1 00591C 1021 3665+ LPR R2,R1 00591E 1021 3666+ LPR R2,R1 005920 1021 3667+ LPR R2,R1 005922 1021 3668+ LPR R2,R1 005924 1021 3669+ LPR R2,R1 005926 1021 3670+ LPR R2,R1 005928 1021 3671+ LPR R2,R1 00592A 1021 3672+ LPR R2,R1 00592C 1021 3673+ LPR R2,R1 PAGE 69 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00592E 1021 3674+ LPR R2,R1 005930 1021 3675+ LPR R2,R1 005932 1021 3676+ LPR R2,R1 005934 1021 3677+ LPR R2,R1 005936 1021 3678+ LPR R2,R1 005938 1021 3679+ LPR R2,R1 00593A 1021 3680+ LPR R2,R1 00593C 1021 3681+ LPR R2,R1 00593E 1021 3682+ LPR R2,R1 005940 1021 3683+ LPR R2,R1 005942 1021 3684+ LPR R2,R1 005944 1021 3685+ LPR R2,R1 005946 1021 3686+ LPR R2,R1 005948 1021 3687+ LPR R2,R1 3688+* 00594A 06FB 3689 BCTR R15,R11 3690 TSIMRET 00594C 58F0 C100 05960 3691+ L R15,=A(SAVETST) R15 := current save area 005950 58DF 0004 00004 3692+ L R13,4(R15) get old save area back 005954 98EC D00C 0000C 3693+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005958 07FE 3694+ BR 14 RETURN 02000000 3695 TSIMEND 005960 3696+ LTORG 005960 00000458 3697 =A(SAVETST) 005964 FFFFFB2E 3698 =F'-1234' 05968 3699+T109TEND EQU * 3700 * 3701 * Test 11x -- store ======================================== 3702 * 3703 * Test 110 -- ST R,m --------------------------------------- 3704 * 3705 TSIMBEG T110,13000,50,1,C'ST R,m' 3706+* 002624 3707+TDSCDAT CSECT 002628 3708+ DS 0D 3709+* 002628 00005968 3710+T110TDSC DC A(T110) // TENTRY 00262C 00000104 3711+ DC A(T110TEND-T110) // TLENGTH 002630 000032C8 3712+ DC F'13000' // TLRCNT 002634 00000032 3713+ DC F'50' // TIGCNT 002638 00000001 3714+ DC F'1' // TLTYPE 00104B 3715+TEXT CSECT 00104B E3F1F1F0 3716+SPTR0172 DC C'T110' 00263C 3717+TDSCDAT CSECT 00263C 3718+ DS 0F 00263C 0400104B 3719+ DC AL1(L'SPTR0172),AL3(SPTR0172) 00104F 3720+TEXT CSECT 00104F E2E340D96B94 3721+SPTR0173 DC C'ST R,m' 002640 3722+TDSCDAT CSECT 002640 3723+ DS 0F 002640 0600104F 3724+ DC AL1(L'SPTR0173),AL3(SPTR0173) 3725+* 0049F0 3726+TDSCTBL CSECT 049F0 3727+T110TPTR EQU * 0049F0 00002628 3728+ DC A(T110TDSC) enabled test PAGE 70 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 3729+* 005968 3730+TCODE CSECT 005968 3731+ DS 0D ensure double word alignment for test 005968 3732+T110 DS 0H 01650000 005968 90EC D00C 0000C 3733+ STM 14,12,12(13) SAVE REGISTERS 02950000 00596C 18CF 3734+ LR R12,R15 base register := entry address 05968 3735+ USING T110,R12 declare code base register 00596E 41B0 C01E 05986 3736+ LA R11,T110L load loop target to R11 005972 58F0 C100 05A68 3737+ L R15,=A(SAVETST) R15 := current save area 005976 50DF 0004 00004 3738+ ST R13,4(R15) set back pointer in current save area 00597A 182D 3739+ LR R2,R13 remember callers save area 00597C 18DF 3740+ LR R13,R15 setup current save area 00597E 50D2 0008 00008 3741+ ST R13,8(R2) set forw pointer in callers save area 00000 3742+ USING TDSC,R1 declare TDSC base register 005982 58F0 1008 00008 3743+ L R15,TLRCNT load local repeat count to R15 3744+* 3745 * 3746 T110L REPINS ST,(R2,T110V) repeat: ST R2,T110V 3747+* 3748+* build from sublist &ALIST a comma separated string &ARGS 3749+* 3750+* 3751+* 3752+* 3753+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3754+* this allows to transfer the repeat count from last TDSCGEN call 3755+* 3756+* 05986 3757+T110L EQU * 3758+* 3759+* write a comment indicating what REPINS does (in case NOGEN in effect) 3760+* 3761+*,// REPINS: do 50 times: 3762+* 3763+* MNOTE requires that ' is doubled for expanded variables 3764+* thus build &MASTR as a copy of '&ARGS with ' doubled 3765+* 3766+* 3767+*,// ST R2,T110V 3768+* 3769+* finally generate code: &ICNT copies of &CODE &ARGS 3770+* 005986 5020 C0F8 05A60 3771+ ST R2,T110V 00598A 5020 C0F8 05A60 3772+ ST R2,T110V 00598E 5020 C0F8 05A60 3773+ ST R2,T110V 005992 5020 C0F8 05A60 3774+ ST R2,T110V 005996 5020 C0F8 05A60 3775+ ST R2,T110V 00599A 5020 C0F8 05A60 3776+ ST R2,T110V 00599E 5020 C0F8 05A60 3777+ ST R2,T110V 0059A2 5020 C0F8 05A60 3778+ ST R2,T110V 0059A6 5020 C0F8 05A60 3779+ ST R2,T110V 0059AA 5020 C0F8 05A60 3780+ ST R2,T110V 0059AE 5020 C0F8 05A60 3781+ ST R2,T110V 0059B2 5020 C0F8 05A60 3782+ ST R2,T110V 0059B6 5020 C0F8 05A60 3783+ ST R2,T110V PAGE 71 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0059BA 5020 C0F8 05A60 3784+ ST R2,T110V 0059BE 5020 C0F8 05A60 3785+ ST R2,T110V 0059C2 5020 C0F8 05A60 3786+ ST R2,T110V 0059C6 5020 C0F8 05A60 3787+ ST R2,T110V 0059CA 5020 C0F8 05A60 3788+ ST R2,T110V 0059CE 5020 C0F8 05A60 3789+ ST R2,T110V 0059D2 5020 C0F8 05A60 3790+ ST R2,T110V 0059D6 5020 C0F8 05A60 3791+ ST R2,T110V 0059DA 5020 C0F8 05A60 3792+ ST R2,T110V 0059DE 5020 C0F8 05A60 3793+ ST R2,T110V 0059E2 5020 C0F8 05A60 3794+ ST R2,T110V 0059E6 5020 C0F8 05A60 3795+ ST R2,T110V 0059EA 5020 C0F8 05A60 3796+ ST R2,T110V 0059EE 5020 C0F8 05A60 3797+ ST R2,T110V 0059F2 5020 C0F8 05A60 3798+ ST R2,T110V 0059F6 5020 C0F8 05A60 3799+ ST R2,T110V 0059FA 5020 C0F8 05A60 3800+ ST R2,T110V 0059FE 5020 C0F8 05A60 3801+ ST R2,T110V 005A02 5020 C0F8 05A60 3802+ ST R2,T110V 005A06 5020 C0F8 05A60 3803+ ST R2,T110V 005A0A 5020 C0F8 05A60 3804+ ST R2,T110V 005A0E 5020 C0F8 05A60 3805+ ST R2,T110V 005A12 5020 C0F8 05A60 3806+ ST R2,T110V 005A16 5020 C0F8 05A60 3807+ ST R2,T110V 005A1A 5020 C0F8 05A60 3808+ ST R2,T110V 005A1E 5020 C0F8 05A60 3809+ ST R2,T110V 005A22 5020 C0F8 05A60 3810+ ST R2,T110V 005A26 5020 C0F8 05A60 3811+ ST R2,T110V 005A2A 5020 C0F8 05A60 3812+ ST R2,T110V 005A2E 5020 C0F8 05A60 3813+ ST R2,T110V 005A32 5020 C0F8 05A60 3814+ ST R2,T110V 005A36 5020 C0F8 05A60 3815+ ST R2,T110V 005A3A 5020 C0F8 05A60 3816+ ST R2,T110V 005A3E 5020 C0F8 05A60 3817+ ST R2,T110V 005A42 5020 C0F8 05A60 3818+ ST R2,T110V 005A46 5020 C0F8 05A60 3819+ ST R2,T110V 005A4A 5020 C0F8 05A60 3820+ ST R2,T110V 3821+* 005A4E 06FB 3822 BCTR R15,R11 3823 TSIMRET 005A50 58F0 C100 05A68 3824+ L R15,=A(SAVETST) R15 := current save area 005A54 58DF 0004 00004 3825+ L R13,4(R15) get old save area back 005A58 98EC D00C 0000C 3826+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005A5C 07FE 3827+ BR 14 RETURN 02000000 3828 * 005A60 3829 T110V DS 1F 3830 TSIMEND 005A68 3831+ LTORG 005A68 00000458 3832 =A(SAVETST) 05A6C 3833+T110TEND EQU * 3834 * 3835 * Test 111 -- ST R,m (unal) -------------------------------- 3836 * 3837 TSIMBEG T111,12000,50,1,C'ST R,m (unal)' 3838+* PAGE 72 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002644 3839+TDSCDAT CSECT 002648 3840+ DS 0D 3841+* 002648 00005A70 3842+T111TDSC DC A(T111) // TENTRY 00264C 0000010C 3843+ DC A(T111TEND-T111) // TLENGTH 002650 00002EE0 3844+ DC F'12000' // TLRCNT 002654 00000032 3845+ DC F'50' // TIGCNT 002658 00000001 3846+ DC F'1' // TLTYPE 001055 3847+TEXT CSECT 001055 E3F1F1F1 3848+SPTR0184 DC C'T111' 00265C 3849+TDSCDAT CSECT 00265C 3850+ DS 0F 00265C 04001055 3851+ DC AL1(L'SPTR0184),AL3(SPTR0184) 001059 3852+TEXT CSECT 001059 E2E340D96B94404D 3853+SPTR0185 DC C'ST R,m (unal)' 002660 3854+TDSCDAT CSECT 002660 3855+ DS 0F 002660 0D001059 3856+ DC AL1(L'SPTR0185),AL3(SPTR0185) 3857+* 0049F4 3858+TDSCTBL CSECT 049F4 3859+T111TPTR EQU * 0049F4 00002648 3860+ DC A(T111TDSC) enabled test 3861+* 005A6C 3862+TCODE CSECT 005A70 3863+ DS 0D ensure double word alignment for test 005A70 3864+T111 DS 0H 01650000 005A70 90EC D00C 0000C 3865+ STM 14,12,12(13) SAVE REGISTERS 02950000 005A74 18CF 3866+ LR R12,R15 base register := entry address 05A70 3867+ USING T111,R12 declare code base register 005A76 41B0 C022 05A92 3868+ LA R11,T111L load loop target to R11 005A7A 58F0 C108 05B78 3869+ L R15,=A(SAVETST) R15 := current save area 005A7E 50DF 0004 00004 3870+ ST R13,4(R15) set back pointer in current save area 005A82 182D 3871+ LR R2,R13 remember callers save area 005A84 18DF 3872+ LR R13,R15 setup current save area 005A86 50D2 0008 00008 3873+ ST R13,8(R2) set forw pointer in callers save area 00000 3874+ USING TDSC,R1 declare TDSC base register 005A8A 58F0 1008 00008 3875+ L R15,TLRCNT load local repeat count to R15 3876+* 3877 * 005A8E 4130 C0FC 05B6C 3878 LA R3,T111V 3879 T111L REPINS ST,(R2,1(R3)) repeat: ST R2,1(R3) 3880+* 3881+* build from sublist &ALIST a comma separated string &ARGS 3882+* 3883+* 3884+* 3885+* 3886+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 3887+* this allows to transfer the repeat count from last TDSCGEN call 3888+* 3889+* 05A92 3890+T111L EQU * 3891+* 3892+* write a comment indicating what REPINS does (in case NOGEN in effect) 3893+* PAGE 73 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 3894+*,// REPINS: do 50 times: 3895+* 3896+* MNOTE requires that ' is doubled for expanded variables 3897+* thus build &MASTR as a copy of '&ARGS with ' doubled 3898+* 3899+* 3900+*,// ST R2,1(R3) 3901+* 3902+* finally generate code: &ICNT copies of &CODE &ARGS 3903+* 005A92 5023 0001 00001 3904+ ST R2,1(R3) 005A96 5023 0001 00001 3905+ ST R2,1(R3) 005A9A 5023 0001 00001 3906+ ST R2,1(R3) 005A9E 5023 0001 00001 3907+ ST R2,1(R3) 005AA2 5023 0001 00001 3908+ ST R2,1(R3) 005AA6 5023 0001 00001 3909+ ST R2,1(R3) 005AAA 5023 0001 00001 3910+ ST R2,1(R3) 005AAE 5023 0001 00001 3911+ ST R2,1(R3) 005AB2 5023 0001 00001 3912+ ST R2,1(R3) 005AB6 5023 0001 00001 3913+ ST R2,1(R3) 005ABA 5023 0001 00001 3914+ ST R2,1(R3) 005ABE 5023 0001 00001 3915+ ST R2,1(R3) 005AC2 5023 0001 00001 3916+ ST R2,1(R3) 005AC6 5023 0001 00001 3917+ ST R2,1(R3) 005ACA 5023 0001 00001 3918+ ST R2,1(R3) 005ACE 5023 0001 00001 3919+ ST R2,1(R3) 005AD2 5023 0001 00001 3920+ ST R2,1(R3) 005AD6 5023 0001 00001 3921+ ST R2,1(R3) 005ADA 5023 0001 00001 3922+ ST R2,1(R3) 005ADE 5023 0001 00001 3923+ ST R2,1(R3) 005AE2 5023 0001 00001 3924+ ST R2,1(R3) 005AE6 5023 0001 00001 3925+ ST R2,1(R3) 005AEA 5023 0001 00001 3926+ ST R2,1(R3) 005AEE 5023 0001 00001 3927+ ST R2,1(R3) 005AF2 5023 0001 00001 3928+ ST R2,1(R3) 005AF6 5023 0001 00001 3929+ ST R2,1(R3) 005AFA 5023 0001 00001 3930+ ST R2,1(R3) 005AFE 5023 0001 00001 3931+ ST R2,1(R3) 005B02 5023 0001 00001 3932+ ST R2,1(R3) 005B06 5023 0001 00001 3933+ ST R2,1(R3) 005B0A 5023 0001 00001 3934+ ST R2,1(R3) 005B0E 5023 0001 00001 3935+ ST R2,1(R3) 005B12 5023 0001 00001 3936+ ST R2,1(R3) 005B16 5023 0001 00001 3937+ ST R2,1(R3) 005B1A 5023 0001 00001 3938+ ST R2,1(R3) 005B1E 5023 0001 00001 3939+ ST R2,1(R3) 005B22 5023 0001 00001 3940+ ST R2,1(R3) 005B26 5023 0001 00001 3941+ ST R2,1(R3) 005B2A 5023 0001 00001 3942+ ST R2,1(R3) 005B2E 5023 0001 00001 3943+ ST R2,1(R3) 005B32 5023 0001 00001 3944+ ST R2,1(R3) 005B36 5023 0001 00001 3945+ ST R2,1(R3) 005B3A 5023 0001 00001 3946+ ST R2,1(R3) 005B3E 5023 0001 00001 3947+ ST R2,1(R3) 005B42 5023 0001 00001 3948+ ST R2,1(R3) PAGE 74 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005B46 5023 0001 00001 3949+ ST R2,1(R3) 005B4A 5023 0001 00001 3950+ ST R2,1(R3) 005B4E 5023 0001 00001 3951+ ST R2,1(R3) 005B52 5023 0001 00001 3952+ ST R2,1(R3) 005B56 5023 0001 00001 3953+ ST R2,1(R3) 3954+* 005B5A 06FB 3955 BCTR R15,R11 3956 TSIMRET 005B5C 58F0 C108 05B78 3957+ L R15,=A(SAVETST) R15 := current save area 005B60 58DF 0004 00004 3958+ L R13,4(R15) get old save area back 005B64 98EC D00C 0000C 3959+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005B68 07FE 3960+ BR 14 RETURN 02000000 3961 * 005B6C 3962 T111V DS 2F 3963 TSIMEND 005B78 3964+ LTORG 005B78 00000458 3965 =A(SAVETST) 05B7C 3966+T111TEND EQU * 3967 * 3968 * Test 112 -- STH R,m -------------------------------------- 3969 * 3970 TSIMBEG T112,10000,50,1,C'STH R,m' 3971+* 002664 3972+TDSCDAT CSECT 002668 3973+ DS 0D 3974+* 002668 00005B80 3975+T112TDSC DC A(T112) // TENTRY 00266C 000000FC 3976+ DC A(T112TEND-T112) // TLENGTH 002670 00002710 3977+ DC F'10000' // TLRCNT 002674 00000032 3978+ DC F'50' // TIGCNT 002678 00000001 3979+ DC F'1' // TLTYPE 001066 3980+TEXT CSECT 001066 E3F1F1F2 3981+SPTR0196 DC C'T112' 00267C 3982+TDSCDAT CSECT 00267C 3983+ DS 0F 00267C 04001066 3984+ DC AL1(L'SPTR0196),AL3(SPTR0196) 00106A 3985+TEXT CSECT 00106A E2E3C840D96B94 3986+SPTR0197 DC C'STH R,m' 002680 3987+TDSCDAT CSECT 002680 3988+ DS 0F 002680 0700106A 3989+ DC AL1(L'SPTR0197),AL3(SPTR0197) 3990+* 0049F8 3991+TDSCTBL CSECT 049F8 3992+T112TPTR EQU * 0049F8 00002668 3993+ DC A(T112TDSC) enabled test 3994+* 005B7C 3995+TCODE CSECT 005B80 3996+ DS 0D ensure double word alignment for test 005B80 3997+T112 DS 0H 01650000 005B80 90EC D00C 0000C 3998+ STM 14,12,12(13) SAVE REGISTERS 02950000 005B84 18CF 3999+ LR R12,R15 base register := entry address 05B80 4000+ USING T112,R12 declare code base register 005B86 41B0 C01E 05B9E 4001+ LA R11,T112L load loop target to R11 005B8A 58F0 C0F8 05C78 4002+ L R15,=A(SAVETST) R15 := current save area 005B8E 50DF 0004 00004 4003+ ST R13,4(R15) set back pointer in current save area PAGE 75 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005B92 182D 4004+ LR R2,R13 remember callers save area 005B94 18DF 4005+ LR R13,R15 setup current save area 005B96 50D2 0008 00008 4006+ ST R13,8(R2) set forw pointer in callers save area 00000 4007+ USING TDSC,R1 declare TDSC base register 005B9A 58F0 1008 00008 4008+ L R15,TLRCNT load local repeat count to R15 4009+* 4010 * 4011 T112L REPINS STH,(R2,T112V) repeat: STH R2,T112V 4012+* 4013+* build from sublist &ALIST a comma separated string &ARGS 4014+* 4015+* 4016+* 4017+* 4018+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4019+* this allows to transfer the repeat count from last TDSCGEN call 4020+* 4021+* 05B9E 4022+T112L EQU * 4023+* 4024+* write a comment indicating what REPINS does (in case NOGEN in effect) 4025+* 4026+*,// REPINS: do 50 times: 4027+* 4028+* MNOTE requires that ' is doubled for expanded variables 4029+* thus build &MASTR as a copy of '&ARGS with ' doubled 4030+* 4031+* 4032+*,// STH R2,T112V 4033+* 4034+* finally generate code: &ICNT copies of &CODE &ARGS 4035+* 005B9E 4020 C0F6 05C76 4036+ STH R2,T112V 005BA2 4020 C0F6 05C76 4037+ STH R2,T112V 005BA6 4020 C0F6 05C76 4038+ STH R2,T112V 005BAA 4020 C0F6 05C76 4039+ STH R2,T112V 005BAE 4020 C0F6 05C76 4040+ STH R2,T112V 005BB2 4020 C0F6 05C76 4041+ STH R2,T112V 005BB6 4020 C0F6 05C76 4042+ STH R2,T112V 005BBA 4020 C0F6 05C76 4043+ STH R2,T112V 005BBE 4020 C0F6 05C76 4044+ STH R2,T112V 005BC2 4020 C0F6 05C76 4045+ STH R2,T112V 005BC6 4020 C0F6 05C76 4046+ STH R2,T112V 005BCA 4020 C0F6 05C76 4047+ STH R2,T112V 005BCE 4020 C0F6 05C76 4048+ STH R2,T112V 005BD2 4020 C0F6 05C76 4049+ STH R2,T112V 005BD6 4020 C0F6 05C76 4050+ STH R2,T112V 005BDA 4020 C0F6 05C76 4051+ STH R2,T112V 005BDE 4020 C0F6 05C76 4052+ STH R2,T112V 005BE2 4020 C0F6 05C76 4053+ STH R2,T112V 005BE6 4020 C0F6 05C76 4054+ STH R2,T112V 005BEA 4020 C0F6 05C76 4055+ STH R2,T112V 005BEE 4020 C0F6 05C76 4056+ STH R2,T112V 005BF2 4020 C0F6 05C76 4057+ STH R2,T112V 005BF6 4020 C0F6 05C76 4058+ STH R2,T112V PAGE 76 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005BFA 4020 C0F6 05C76 4059+ STH R2,T112V 005BFE 4020 C0F6 05C76 4060+ STH R2,T112V 005C02 4020 C0F6 05C76 4061+ STH R2,T112V 005C06 4020 C0F6 05C76 4062+ STH R2,T112V 005C0A 4020 C0F6 05C76 4063+ STH R2,T112V 005C0E 4020 C0F6 05C76 4064+ STH R2,T112V 005C12 4020 C0F6 05C76 4065+ STH R2,T112V 005C16 4020 C0F6 05C76 4066+ STH R2,T112V 005C1A 4020 C0F6 05C76 4067+ STH R2,T112V 005C1E 4020 C0F6 05C76 4068+ STH R2,T112V 005C22 4020 C0F6 05C76 4069+ STH R2,T112V 005C26 4020 C0F6 05C76 4070+ STH R2,T112V 005C2A 4020 C0F6 05C76 4071+ STH R2,T112V 005C2E 4020 C0F6 05C76 4072+ STH R2,T112V 005C32 4020 C0F6 05C76 4073+ STH R2,T112V 005C36 4020 C0F6 05C76 4074+ STH R2,T112V 005C3A 4020 C0F6 05C76 4075+ STH R2,T112V 005C3E 4020 C0F6 05C76 4076+ STH R2,T112V 005C42 4020 C0F6 05C76 4077+ STH R2,T112V 005C46 4020 C0F6 05C76 4078+ STH R2,T112V 005C4A 4020 C0F6 05C76 4079+ STH R2,T112V 005C4E 4020 C0F6 05C76 4080+ STH R2,T112V 005C52 4020 C0F6 05C76 4081+ STH R2,T112V 005C56 4020 C0F6 05C76 4082+ STH R2,T112V 005C5A 4020 C0F6 05C76 4083+ STH R2,T112V 005C5E 4020 C0F6 05C76 4084+ STH R2,T112V 005C62 4020 C0F6 05C76 4085+ STH R2,T112V 4086+* 005C66 06FB 4087 BCTR R15,R11 4088 TSIMRET 005C68 58F0 C0F8 05C78 4089+ L R15,=A(SAVETST) R15 := current save area 005C6C 58DF 0004 00004 4090+ L R13,4(R15) get old save area back 005C70 98EC D00C 0000C 4091+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005C74 07FE 4092+ BR 14 RETURN 02000000 4093 * 005C76 4094 T112V DS 1H 4095 TSIMEND 005C78 4096+ LTORG 005C78 00000458 4097 =A(SAVETST) 05C7C 4098+T112TEND EQU * 4099 * 4100 * Test 113 -- STH R,m (unal1) ------------------------------ 4101 * 4102 TSIMBEG T113,10000,50,1,C'STH R,m (unal1)' 4103+* 002684 4104+TDSCDAT CSECT 002688 4105+ DS 0D 4106+* 002688 00005C80 4107+T113TDSC DC A(T113) // TENTRY 00268C 00000104 4108+ DC A(T113TEND-T113) // TLENGTH 002690 00002710 4109+ DC F'10000' // TLRCNT 002694 00000032 4110+ DC F'50' // TIGCNT 002698 00000001 4111+ DC F'1' // TLTYPE 001071 4112+TEXT CSECT 001071 E3F1F1F3 4113+SPTR0208 DC C'T113' PAGE 77 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00269C 4114+TDSCDAT CSECT 00269C 4115+ DS 0F 00269C 04001071 4116+ DC AL1(L'SPTR0208),AL3(SPTR0208) 001075 4117+TEXT CSECT 001075 E2E3C840D96B9440 4118+SPTR0209 DC C'STH R,m (unal1)' 0026A0 4119+TDSCDAT CSECT 0026A0 4120+ DS 0F 0026A0 0F001075 4121+ DC AL1(L'SPTR0209),AL3(SPTR0209) 4122+* 0049FC 4123+TDSCTBL CSECT 049FC 4124+T113TPTR EQU * 0049FC 00002688 4125+ DC A(T113TDSC) enabled test 4126+* 005C7C 4127+TCODE CSECT 005C80 4128+ DS 0D ensure double word alignment for test 005C80 4129+T113 DS 0H 01650000 005C80 90EC D00C 0000C 4130+ STM 14,12,12(13) SAVE REGISTERS 02950000 005C84 18CF 4131+ LR R12,R15 base register := entry address 05C80 4132+ USING T113,R12 declare code base register 005C86 41B0 C022 05CA2 4133+ LA R11,T113L load loop target to R11 005C8A 58F0 C100 05D80 4134+ L R15,=A(SAVETST) R15 := current save area 005C8E 50DF 0004 00004 4135+ ST R13,4(R15) set back pointer in current save area 005C92 182D 4136+ LR R2,R13 remember callers save area 005C94 18DF 4137+ LR R13,R15 setup current save area 005C96 50D2 0008 00008 4138+ ST R13,8(R2) set forw pointer in callers save area 00000 4139+ USING TDSC,R1 declare TDSC base register 005C9A 58F0 1008 00008 4140+ L R15,TLRCNT load local repeat count to R15 4141+* 4142 * 005C9E 4130 C0FC 05D7C 4143 LA R3,T113V 4144 T113L REPINS STH,(R2,1(R3)) repeat: STH R2,1(R3) 4145+* 4146+* build from sublist &ALIST a comma separated string &ARGS 4147+* 4148+* 4149+* 4150+* 4151+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4152+* this allows to transfer the repeat count from last TDSCGEN call 4153+* 4154+* 05CA2 4155+T113L EQU * 4156+* 4157+* write a comment indicating what REPINS does (in case NOGEN in effect) 4158+* 4159+*,// REPINS: do 50 times: 4160+* 4161+* MNOTE requires that ' is doubled for expanded variables 4162+* thus build &MASTR as a copy of '&ARGS with ' doubled 4163+* 4164+* 4165+*,// STH R2,1(R3) 4166+* 4167+* finally generate code: &ICNT copies of &CODE &ARGS 4168+* PAGE 78 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005CA2 4023 0001 00001 4169+ STH R2,1(R3) 005CA6 4023 0001 00001 4170+ STH R2,1(R3) 005CAA 4023 0001 00001 4171+ STH R2,1(R3) 005CAE 4023 0001 00001 4172+ STH R2,1(R3) 005CB2 4023 0001 00001 4173+ STH R2,1(R3) 005CB6 4023 0001 00001 4174+ STH R2,1(R3) 005CBA 4023 0001 00001 4175+ STH R2,1(R3) 005CBE 4023 0001 00001 4176+ STH R2,1(R3) 005CC2 4023 0001 00001 4177+ STH R2,1(R3) 005CC6 4023 0001 00001 4178+ STH R2,1(R3) 005CCA 4023 0001 00001 4179+ STH R2,1(R3) 005CCE 4023 0001 00001 4180+ STH R2,1(R3) 005CD2 4023 0001 00001 4181+ STH R2,1(R3) 005CD6 4023 0001 00001 4182+ STH R2,1(R3) 005CDA 4023 0001 00001 4183+ STH R2,1(R3) 005CDE 4023 0001 00001 4184+ STH R2,1(R3) 005CE2 4023 0001 00001 4185+ STH R2,1(R3) 005CE6 4023 0001 00001 4186+ STH R2,1(R3) 005CEA 4023 0001 00001 4187+ STH R2,1(R3) 005CEE 4023 0001 00001 4188+ STH R2,1(R3) 005CF2 4023 0001 00001 4189+ STH R2,1(R3) 005CF6 4023 0001 00001 4190+ STH R2,1(R3) 005CFA 4023 0001 00001 4191+ STH R2,1(R3) 005CFE 4023 0001 00001 4192+ STH R2,1(R3) 005D02 4023 0001 00001 4193+ STH R2,1(R3) 005D06 4023 0001 00001 4194+ STH R2,1(R3) 005D0A 4023 0001 00001 4195+ STH R2,1(R3) 005D0E 4023 0001 00001 4196+ STH R2,1(R3) 005D12 4023 0001 00001 4197+ STH R2,1(R3) 005D16 4023 0001 00001 4198+ STH R2,1(R3) 005D1A 4023 0001 00001 4199+ STH R2,1(R3) 005D1E 4023 0001 00001 4200+ STH R2,1(R3) 005D22 4023 0001 00001 4201+ STH R2,1(R3) 005D26 4023 0001 00001 4202+ STH R2,1(R3) 005D2A 4023 0001 00001 4203+ STH R2,1(R3) 005D2E 4023 0001 00001 4204+ STH R2,1(R3) 005D32 4023 0001 00001 4205+ STH R2,1(R3) 005D36 4023 0001 00001 4206+ STH R2,1(R3) 005D3A 4023 0001 00001 4207+ STH R2,1(R3) 005D3E 4023 0001 00001 4208+ STH R2,1(R3) 005D42 4023 0001 00001 4209+ STH R2,1(R3) 005D46 4023 0001 00001 4210+ STH R2,1(R3) 005D4A 4023 0001 00001 4211+ STH R2,1(R3) 005D4E 4023 0001 00001 4212+ STH R2,1(R3) 005D52 4023 0001 00001 4213+ STH R2,1(R3) 005D56 4023 0001 00001 4214+ STH R2,1(R3) 005D5A 4023 0001 00001 4215+ STH R2,1(R3) 005D5E 4023 0001 00001 4216+ STH R2,1(R3) 005D62 4023 0001 00001 4217+ STH R2,1(R3) 005D66 4023 0001 00001 4218+ STH R2,1(R3) 4219+* 005D6A 06FB 4220 BCTR R15,R11 4221 TSIMRET 005D6C 58F0 C100 05D80 4222+ L R15,=A(SAVETST) R15 := current save area 005D70 58DF 0004 00004 4223+ L R13,4(R15) get old save area back PAGE 79 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005D74 98EC D00C 0000C 4224+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005D78 07FE 4225+ BR 14 RETURN 02000000 4226 * 005D7C 4227 DS 0F 005D7C 4228 T113V DS 2H across halfword border 4229 TSIMEND 005D80 4230+ LTORG 005D80 00000458 4231 =A(SAVETST) 05D84 4232+T113TEND EQU * 4233 * 4234 * Test 114 -- STH R,m (unal3) ------------------------------ 4235 * 4236 TSIMBEG T114,10000,50,1,C'STH R,m (unal3)' 4237+* 0026A4 4238+TDSCDAT CSECT 0026A8 4239+ DS 0D 4240+* 0026A8 00005D88 4241+T114TDSC DC A(T114) // TENTRY 0026AC 0000010C 4242+ DC A(T114TEND-T114) // TLENGTH 0026B0 00002710 4243+ DC F'10000' // TLRCNT 0026B4 00000032 4244+ DC F'50' // TIGCNT 0026B8 00000001 4245+ DC F'1' // TLTYPE 001084 4246+TEXT CSECT 001084 E3F1F1F4 4247+SPTR0220 DC C'T114' 0026BC 4248+TDSCDAT CSECT 0026BC 4249+ DS 0F 0026BC 04001084 4250+ DC AL1(L'SPTR0220),AL3(SPTR0220) 001088 4251+TEXT CSECT 001088 E2E3C840D96B9440 4252+SPTR0221 DC C'STH R,m (unal3)' 0026C0 4253+TDSCDAT CSECT 0026C0 4254+ DS 0F 0026C0 0F001088 4255+ DC AL1(L'SPTR0221),AL3(SPTR0221) 4256+* 004A00 4257+TDSCTBL CSECT 04A00 4258+T114TPTR EQU * 004A00 000026A8 4259+ DC A(T114TDSC) enabled test 4260+* 005D84 4261+TCODE CSECT 005D88 4262+ DS 0D ensure double word alignment for test 005D88 4263+T114 DS 0H 01650000 005D88 90EC D00C 0000C 4264+ STM 14,12,12(13) SAVE REGISTERS 02950000 005D8C 18CF 4265+ LR R12,R15 base register := entry address 05D88 4266+ USING T114,R12 declare code base register 005D8E 41B0 C022 05DAA 4267+ LA R11,T114L load loop target to R11 005D92 58F0 C108 05E90 4268+ L R15,=A(SAVETST) R15 := current save area 005D96 50DF 0004 00004 4269+ ST R13,4(R15) set back pointer in current save area 005D9A 182D 4270+ LR R2,R13 remember callers save area 005D9C 18DF 4271+ LR R13,R15 setup current save area 005D9E 50D2 0008 00008 4272+ ST R13,8(R2) set forw pointer in callers save area 00000 4273+ USING TDSC,R1 declare TDSC base register 005DA2 58F0 1008 00008 4274+ L R15,TLRCNT load local repeat count to R15 4275+* 4276 * 005DA6 4130 C0FC 05E84 4277 LA R3,T114V 4278 T114L REPINS STH,(R2,3(R3)) repeat: STH R2,3(R3) PAGE 80 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 4279+* 4280+* build from sublist &ALIST a comma separated string &ARGS 4281+* 4282+* 4283+* 4284+* 4285+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4286+* this allows to transfer the repeat count from last TDSCGEN call 4287+* 4288+* 05DAA 4289+T114L EQU * 4290+* 4291+* write a comment indicating what REPINS does (in case NOGEN in effect) 4292+* 4293+*,// REPINS: do 50 times: 4294+* 4295+* MNOTE requires that ' is doubled for expanded variables 4296+* thus build &MASTR as a copy of '&ARGS with ' doubled 4297+* 4298+* 4299+*,// STH R2,3(R3) 4300+* 4301+* finally generate code: &ICNT copies of &CODE &ARGS 4302+* 005DAA 4023 0003 00003 4303+ STH R2,3(R3) 005DAE 4023 0003 00003 4304+ STH R2,3(R3) 005DB2 4023 0003 00003 4305+ STH R2,3(R3) 005DB6 4023 0003 00003 4306+ STH R2,3(R3) 005DBA 4023 0003 00003 4307+ STH R2,3(R3) 005DBE 4023 0003 00003 4308+ STH R2,3(R3) 005DC2 4023 0003 00003 4309+ STH R2,3(R3) 005DC6 4023 0003 00003 4310+ STH R2,3(R3) 005DCA 4023 0003 00003 4311+ STH R2,3(R3) 005DCE 4023 0003 00003 4312+ STH R2,3(R3) 005DD2 4023 0003 00003 4313+ STH R2,3(R3) 005DD6 4023 0003 00003 4314+ STH R2,3(R3) 005DDA 4023 0003 00003 4315+ STH R2,3(R3) 005DDE 4023 0003 00003 4316+ STH R2,3(R3) 005DE2 4023 0003 00003 4317+ STH R2,3(R3) 005DE6 4023 0003 00003 4318+ STH R2,3(R3) 005DEA 4023 0003 00003 4319+ STH R2,3(R3) 005DEE 4023 0003 00003 4320+ STH R2,3(R3) 005DF2 4023 0003 00003 4321+ STH R2,3(R3) 005DF6 4023 0003 00003 4322+ STH R2,3(R3) 005DFA 4023 0003 00003 4323+ STH R2,3(R3) 005DFE 4023 0003 00003 4324+ STH R2,3(R3) 005E02 4023 0003 00003 4325+ STH R2,3(R3) 005E06 4023 0003 00003 4326+ STH R2,3(R3) 005E0A 4023 0003 00003 4327+ STH R2,3(R3) 005E0E 4023 0003 00003 4328+ STH R2,3(R3) 005E12 4023 0003 00003 4329+ STH R2,3(R3) 005E16 4023 0003 00003 4330+ STH R2,3(R3) 005E1A 4023 0003 00003 4331+ STH R2,3(R3) 005E1E 4023 0003 00003 4332+ STH R2,3(R3) 005E22 4023 0003 00003 4333+ STH R2,3(R3) PAGE 81 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005E26 4023 0003 00003 4334+ STH R2,3(R3) 005E2A 4023 0003 00003 4335+ STH R2,3(R3) 005E2E 4023 0003 00003 4336+ STH R2,3(R3) 005E32 4023 0003 00003 4337+ STH R2,3(R3) 005E36 4023 0003 00003 4338+ STH R2,3(R3) 005E3A 4023 0003 00003 4339+ STH R2,3(R3) 005E3E 4023 0003 00003 4340+ STH R2,3(R3) 005E42 4023 0003 00003 4341+ STH R2,3(R3) 005E46 4023 0003 00003 4342+ STH R2,3(R3) 005E4A 4023 0003 00003 4343+ STH R2,3(R3) 005E4E 4023 0003 00003 4344+ STH R2,3(R3) 005E52 4023 0003 00003 4345+ STH R2,3(R3) 005E56 4023 0003 00003 4346+ STH R2,3(R3) 005E5A 4023 0003 00003 4347+ STH R2,3(R3) 005E5E 4023 0003 00003 4348+ STH R2,3(R3) 005E62 4023 0003 00003 4349+ STH R2,3(R3) 005E66 4023 0003 00003 4350+ STH R2,3(R3) 005E6A 4023 0003 00003 4351+ STH R2,3(R3) 005E6E 4023 0003 00003 4352+ STH R2,3(R3) 4353+* 005E72 06FB 4354 BCTR R15,R11 4355 TSIMRET 005E74 58F0 C108 05E90 4356+ L R15,=A(SAVETST) R15 := current save area 005E78 58DF 0004 00004 4357+ L R13,4(R15) get old save area back 005E7C 98EC D00C 0000C 4358+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005E80 07FE 4359+ BR 14 RETURN 02000000 4360 * 005E84 4361 DS 0F 005E84 4362 T114V DS 3H across word border 4363 TSIMEND 005E90 4364+ LTORG 005E90 00000458 4365 =A(SAVETST) 05E94 4366+T114TEND EQU * 4367 * 4368 * Test 115 -- STC R,m -------------------------------------- 4369 * 4370 TSIMBEG T115,11000,50,1,C'STC R,m' 4371+* 0026C4 4372+TDSCDAT CSECT 0026C8 4373+ DS 0D 4374+* 0026C8 00005E98 4375+T115TDSC DC A(T115) // TENTRY 0026CC 000000FC 4376+ DC A(T115TEND-T115) // TLENGTH 0026D0 00002AF8 4377+ DC F'11000' // TLRCNT 0026D4 00000032 4378+ DC F'50' // TIGCNT 0026D8 00000001 4379+ DC F'1' // TLTYPE 001097 4380+TEXT CSECT 001097 E3F1F1F5 4381+SPTR0232 DC C'T115' 0026DC 4382+TDSCDAT CSECT 0026DC 4383+ DS 0F 0026DC 04001097 4384+ DC AL1(L'SPTR0232),AL3(SPTR0232) 00109B 4385+TEXT CSECT 00109B E2E3C340D96B94 4386+SPTR0233 DC C'STC R,m' 0026E0 4387+TDSCDAT CSECT 0026E0 4388+ DS 0F PAGE 82 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0026E0 0700109B 4389+ DC AL1(L'SPTR0233),AL3(SPTR0233) 4390+* 004A04 4391+TDSCTBL CSECT 04A04 4392+T115TPTR EQU * 004A04 000026C8 4393+ DC A(T115TDSC) enabled test 4394+* 005E94 4395+TCODE CSECT 005E98 4396+ DS 0D ensure double word alignment for test 005E98 4397+T115 DS 0H 01650000 005E98 90EC D00C 0000C 4398+ STM 14,12,12(13) SAVE REGISTERS 02950000 005E9C 18CF 4399+ LR R12,R15 base register := entry address 05E98 4400+ USING T115,R12 declare code base register 005E9E 41B0 C01E 05EB6 4401+ LA R11,T115L load loop target to R11 005EA2 58F0 C0F8 05F90 4402+ L R15,=A(SAVETST) R15 := current save area 005EA6 50DF 0004 00004 4403+ ST R13,4(R15) set back pointer in current save area 005EAA 182D 4404+ LR R2,R13 remember callers save area 005EAC 18DF 4405+ LR R13,R15 setup current save area 005EAE 50D2 0008 00008 4406+ ST R13,8(R2) set forw pointer in callers save area 00000 4407+ USING TDSC,R1 declare TDSC base register 005EB2 58F0 1008 00008 4408+ L R15,TLRCNT load local repeat count to R15 4409+* 4410 * 4411 T115L REPINS STC,(R2,T115V) repeat: STC R2,T115V 4412+* 4413+* build from sublist &ALIST a comma separated string &ARGS 4414+* 4415+* 4416+* 4417+* 4418+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4419+* this allows to transfer the repeat count from last TDSCGEN call 4420+* 4421+* 05EB6 4422+T115L EQU * 4423+* 4424+* write a comment indicating what REPINS does (in case NOGEN in effect) 4425+* 4426+*,// REPINS: do 50 times: 4427+* 4428+* MNOTE requires that ' is doubled for expanded variables 4429+* thus build &MASTR as a copy of '&ARGS with ' doubled 4430+* 4431+* 4432+*,// STC R2,T115V 4433+* 4434+* finally generate code: &ICNT copies of &CODE &ARGS 4435+* 005EB6 4220 C0F6 05F8E 4436+ STC R2,T115V 005EBA 4220 C0F6 05F8E 4437+ STC R2,T115V 005EBE 4220 C0F6 05F8E 4438+ STC R2,T115V 005EC2 4220 C0F6 05F8E 4439+ STC R2,T115V 005EC6 4220 C0F6 05F8E 4440+ STC R2,T115V 005ECA 4220 C0F6 05F8E 4441+ STC R2,T115V 005ECE 4220 C0F6 05F8E 4442+ STC R2,T115V 005ED2 4220 C0F6 05F8E 4443+ STC R2,T115V PAGE 83 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 005ED6 4220 C0F6 05F8E 4444+ STC R2,T115V 005EDA 4220 C0F6 05F8E 4445+ STC R2,T115V 005EDE 4220 C0F6 05F8E 4446+ STC R2,T115V 005EE2 4220 C0F6 05F8E 4447+ STC R2,T115V 005EE6 4220 C0F6 05F8E 4448+ STC R2,T115V 005EEA 4220 C0F6 05F8E 4449+ STC R2,T115V 005EEE 4220 C0F6 05F8E 4450+ STC R2,T115V 005EF2 4220 C0F6 05F8E 4451+ STC R2,T115V 005EF6 4220 C0F6 05F8E 4452+ STC R2,T115V 005EFA 4220 C0F6 05F8E 4453+ STC R2,T115V 005EFE 4220 C0F6 05F8E 4454+ STC R2,T115V 005F02 4220 C0F6 05F8E 4455+ STC R2,T115V 005F06 4220 C0F6 05F8E 4456+ STC R2,T115V 005F0A 4220 C0F6 05F8E 4457+ STC R2,T115V 005F0E 4220 C0F6 05F8E 4458+ STC R2,T115V 005F12 4220 C0F6 05F8E 4459+ STC R2,T115V 005F16 4220 C0F6 05F8E 4460+ STC R2,T115V 005F1A 4220 C0F6 05F8E 4461+ STC R2,T115V 005F1E 4220 C0F6 05F8E 4462+ STC R2,T115V 005F22 4220 C0F6 05F8E 4463+ STC R2,T115V 005F26 4220 C0F6 05F8E 4464+ STC R2,T115V 005F2A 4220 C0F6 05F8E 4465+ STC R2,T115V 005F2E 4220 C0F6 05F8E 4466+ STC R2,T115V 005F32 4220 C0F6 05F8E 4467+ STC R2,T115V 005F36 4220 C0F6 05F8E 4468+ STC R2,T115V 005F3A 4220 C0F6 05F8E 4469+ STC R2,T115V 005F3E 4220 C0F6 05F8E 4470+ STC R2,T115V 005F42 4220 C0F6 05F8E 4471+ STC R2,T115V 005F46 4220 C0F6 05F8E 4472+ STC R2,T115V 005F4A 4220 C0F6 05F8E 4473+ STC R2,T115V 005F4E 4220 C0F6 05F8E 4474+ STC R2,T115V 005F52 4220 C0F6 05F8E 4475+ STC R2,T115V 005F56 4220 C0F6 05F8E 4476+ STC R2,T115V 005F5A 4220 C0F6 05F8E 4477+ STC R2,T115V 005F5E 4220 C0F6 05F8E 4478+ STC R2,T115V 005F62 4220 C0F6 05F8E 4479+ STC R2,T115V 005F66 4220 C0F6 05F8E 4480+ STC R2,T115V 005F6A 4220 C0F6 05F8E 4481+ STC R2,T115V 005F6E 4220 C0F6 05F8E 4482+ STC R2,T115V 005F72 4220 C0F6 05F8E 4483+ STC R2,T115V 005F76 4220 C0F6 05F8E 4484+ STC R2,T115V 005F7A 4220 C0F6 05F8E 4485+ STC R2,T115V 4486+* 005F7E 06FB 4487 BCTR R15,R11 4488 TSIMRET 005F80 58F0 C0F8 05F90 4489+ L R15,=A(SAVETST) R15 := current save area 005F84 58DF 0004 00004 4490+ L R13,4(R15) get old save area back 005F88 98EC D00C 0000C 4491+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 005F8C 07FE 4492+ BR 14 RETURN 02000000 4493 * 005F8E 4494 T115V DS 1H 4495 TSIMEND 005F90 4496+ LTORG 005F90 00000458 4497 =A(SAVETST) 05F94 4498+T115TEND EQU * PAGE 84 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 4499 * 4500 * Test 116 -- STCM R,i,m (1c) ------------------------------ 4501 * 4502 TSIMBEG T116,8000,50,1,C'STCM R,i,m (0010)' 4503+* 0026E4 4504+TDSCDAT CSECT 0026E8 4505+ DS 0D 4506+* 0026E8 00005F98 4507+T116TDSC DC A(T116) // TENTRY 0026EC 00000104 4508+ DC A(T116TEND-T116) // TLENGTH 0026F0 00001F40 4509+ DC F'8000' // TLRCNT 0026F4 00000032 4510+ DC F'50' // TIGCNT 0026F8 00000001 4511+ DC F'1' // TLTYPE 0010A2 4512+TEXT CSECT 0010A2 E3F1F1F6 4513+SPTR0244 DC C'T116' 0026FC 4514+TDSCDAT CSECT 0026FC 4515+ DS 0F 0026FC 040010A2 4516+ DC AL1(L'SPTR0244),AL3(SPTR0244) 0010A6 4517+TEXT CSECT 0010A6 E2E3C3D440D96B89 4518+SPTR0245 DC C'STCM R,i,m (0010)' 002700 4519+TDSCDAT CSECT 002700 4520+ DS 0F 002700 110010A6 4521+ DC AL1(L'SPTR0245),AL3(SPTR0245) 4522+* 004A08 4523+TDSCTBL CSECT 04A08 4524+T116TPTR EQU * 004A08 000026E8 4525+ DC A(T116TDSC) enabled test 4526+* 005F94 4527+TCODE CSECT 005F98 4528+ DS 0D ensure double word alignment for test 005F98 4529+T116 DS 0H 01650000 005F98 90EC D00C 0000C 4530+ STM 14,12,12(13) SAVE REGISTERS 02950000 005F9C 18CF 4531+ LR R12,R15 base register := entry address 05F98 4532+ USING T116,R12 declare code base register 005F9E 41B0 C01E 05FB6 4533+ LA R11,T116L load loop target to R11 005FA2 58F0 C100 06098 4534+ L R15,=A(SAVETST) R15 := current save area 005FA6 50DF 0004 00004 4535+ ST R13,4(R15) set back pointer in current save area 005FAA 182D 4536+ LR R2,R13 remember callers save area 005FAC 18DF 4537+ LR R13,R15 setup current save area 005FAE 50D2 0008 00008 4538+ ST R13,8(R2) set forw pointer in callers save area 00000 4539+ USING TDSC,R1 declare TDSC base register 005FB2 58F0 1008 00008 4540+ L R15,TLRCNT load local repeat count to R15 4541+* 4542 * 4543 T116L REPINS STCM,(R2,B'0010',T116V) repeat: STCM R2,B'0010',T116V 4544+* 4545+* build from sublist &ALIST a comma separated string &ARGS 4546+* 4547+* 4548+* 4549+* 4550+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4551+* this allows to transfer the repeat count from last TDSCGEN call 4552+* 4553+* PAGE 85 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 05FB6 4554+T116L EQU * 4555+* 4556+* write a comment indicating what REPINS does (in case NOGEN in effect) 4557+* 4558+*,// REPINS: do 50 times: 4559+* 4560+* MNOTE requires that ' is doubled for expanded variables 4561+* thus build &MASTR as a copy of '&ARGS with ' doubled 4562+* 4563+* 4564+*,// STCM R2,B'0010',T116V 4565+* 4566+* finally generate code: &ICNT copies of &CODE &ARGS 4567+* 005FB6 BE22 C0F8 06090 4568+ STCM R2,B'0010',T116V 005FBA BE22 C0F8 06090 4569+ STCM R2,B'0010',T116V 005FBE BE22 C0F8 06090 4570+ STCM R2,B'0010',T116V 005FC2 BE22 C0F8 06090 4571+ STCM R2,B'0010',T116V 005FC6 BE22 C0F8 06090 4572+ STCM R2,B'0010',T116V 005FCA BE22 C0F8 06090 4573+ STCM R2,B'0010',T116V 005FCE BE22 C0F8 06090 4574+ STCM R2,B'0010',T116V 005FD2 BE22 C0F8 06090 4575+ STCM R2,B'0010',T116V 005FD6 BE22 C0F8 06090 4576+ STCM R2,B'0010',T116V 005FDA BE22 C0F8 06090 4577+ STCM R2,B'0010',T116V 005FDE BE22 C0F8 06090 4578+ STCM R2,B'0010',T116V 005FE2 BE22 C0F8 06090 4579+ STCM R2,B'0010',T116V 005FE6 BE22 C0F8 06090 4580+ STCM R2,B'0010',T116V 005FEA BE22 C0F8 06090 4581+ STCM R2,B'0010',T116V 005FEE BE22 C0F8 06090 4582+ STCM R2,B'0010',T116V 005FF2 BE22 C0F8 06090 4583+ STCM R2,B'0010',T116V 005FF6 BE22 C0F8 06090 4584+ STCM R2,B'0010',T116V 005FFA BE22 C0F8 06090 4585+ STCM R2,B'0010',T116V 005FFE BE22 C0F8 06090 4586+ STCM R2,B'0010',T116V 006002 BE22 C0F8 06090 4587+ STCM R2,B'0010',T116V 006006 BE22 C0F8 06090 4588+ STCM R2,B'0010',T116V 00600A BE22 C0F8 06090 4589+ STCM R2,B'0010',T116V 00600E BE22 C0F8 06090 4590+ STCM R2,B'0010',T116V 006012 BE22 C0F8 06090 4591+ STCM R2,B'0010',T116V 006016 BE22 C0F8 06090 4592+ STCM R2,B'0010',T116V 00601A BE22 C0F8 06090 4593+ STCM R2,B'0010',T116V 00601E BE22 C0F8 06090 4594+ STCM R2,B'0010',T116V 006022 BE22 C0F8 06090 4595+ STCM R2,B'0010',T116V 006026 BE22 C0F8 06090 4596+ STCM R2,B'0010',T116V 00602A BE22 C0F8 06090 4597+ STCM R2,B'0010',T116V 00602E BE22 C0F8 06090 4598+ STCM R2,B'0010',T116V 006032 BE22 C0F8 06090 4599+ STCM R2,B'0010',T116V 006036 BE22 C0F8 06090 4600+ STCM R2,B'0010',T116V 00603A BE22 C0F8 06090 4601+ STCM R2,B'0010',T116V 00603E BE22 C0F8 06090 4602+ STCM R2,B'0010',T116V 006042 BE22 C0F8 06090 4603+ STCM R2,B'0010',T116V 006046 BE22 C0F8 06090 4604+ STCM R2,B'0010',T116V 00604A BE22 C0F8 06090 4605+ STCM R2,B'0010',T116V 00604E BE22 C0F8 06090 4606+ STCM R2,B'0010',T116V 006052 BE22 C0F8 06090 4607+ STCM R2,B'0010',T116V 006056 BE22 C0F8 06090 4608+ STCM R2,B'0010',T116V PAGE 86 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00605A BE22 C0F8 06090 4609+ STCM R2,B'0010',T116V 00605E BE22 C0F8 06090 4610+ STCM R2,B'0010',T116V 006062 BE22 C0F8 06090 4611+ STCM R2,B'0010',T116V 006066 BE22 C0F8 06090 4612+ STCM R2,B'0010',T116V 00606A BE22 C0F8 06090 4613+ STCM R2,B'0010',T116V 00606E BE22 C0F8 06090 4614+ STCM R2,B'0010',T116V 006072 BE22 C0F8 06090 4615+ STCM R2,B'0010',T116V 006076 BE22 C0F8 06090 4616+ STCM R2,B'0010',T116V 00607A BE22 C0F8 06090 4617+ STCM R2,B'0010',T116V 4618+* 00607E 06FB 4619 BCTR R15,R11 4620 TSIMRET 006080 58F0 C100 06098 4621+ L R15,=A(SAVETST) R15 := current save area 006084 58DF 0004 00004 4622+ L R13,4(R15) get old save area back 006088 98EC D00C 0000C 4623+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00608C 07FE 4624+ BR 14 RETURN 02000000 4625 * 006090 4626 T116V DS 1F 4627 TSIMEND 006098 4628+ LTORG 006098 00000458 4629 =A(SAVETST) 0609C 4630+T116TEND EQU * 4631 * 4632 * Test 117 -- STCM R,i,m (2c) ------------------------------ 4633 * 4634 TSIMBEG T117,7000,50,1,C'STCM R,i,m (1100)' 4635+* 002704 4636+TDSCDAT CSECT 002708 4637+ DS 0D 4638+* 002708 000060A0 4639+T117TDSC DC A(T117) // TENTRY 00270C 00000104 4640+ DC A(T117TEND-T117) // TLENGTH 002710 00001B58 4641+ DC F'7000' // TLRCNT 002714 00000032 4642+ DC F'50' // TIGCNT 002718 00000001 4643+ DC F'1' // TLTYPE 0010B7 4644+TEXT CSECT 0010B7 E3F1F1F7 4645+SPTR0256 DC C'T117' 00271C 4646+TDSCDAT CSECT 00271C 4647+ DS 0F 00271C 040010B7 4648+ DC AL1(L'SPTR0256),AL3(SPTR0256) 0010BB 4649+TEXT CSECT 0010BB E2E3C3D440D96B89 4650+SPTR0257 DC C'STCM R,i,m (1100)' 002720 4651+TDSCDAT CSECT 002720 4652+ DS 0F 002720 110010BB 4653+ DC AL1(L'SPTR0257),AL3(SPTR0257) 4654+* 004A0C 4655+TDSCTBL CSECT 04A0C 4656+T117TPTR EQU * 004A0C 00002708 4657+ DC A(T117TDSC) enabled test 4658+* 00609C 4659+TCODE CSECT 0060A0 4660+ DS 0D ensure double word alignment for test 0060A0 4661+T117 DS 0H 01650000 0060A0 90EC D00C 0000C 4662+ STM 14,12,12(13) SAVE REGISTERS 02950000 0060A4 18CF 4663+ LR R12,R15 base register := entry address PAGE 87 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 060A0 4664+ USING T117,R12 declare code base register 0060A6 41B0 C01E 060BE 4665+ LA R11,T117L load loop target to R11 0060AA 58F0 C100 061A0 4666+ L R15,=A(SAVETST) R15 := current save area 0060AE 50DF 0004 00004 4667+ ST R13,4(R15) set back pointer in current save area 0060B2 182D 4668+ LR R2,R13 remember callers save area 0060B4 18DF 4669+ LR R13,R15 setup current save area 0060B6 50D2 0008 00008 4670+ ST R13,8(R2) set forw pointer in callers save area 00000 4671+ USING TDSC,R1 declare TDSC base register 0060BA 58F0 1008 00008 4672+ L R15,TLRCNT load local repeat count to R15 4673+* 4674 * 4675 T117L REPINS STCM,(R2,B'1100',T117V) repeat: STCM R2,B'1100',T117V 4676+* 4677+* build from sublist &ALIST a comma separated string &ARGS 4678+* 4679+* 4680+* 4681+* 4682+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4683+* this allows to transfer the repeat count from last TDSCGEN call 4684+* 4685+* 060BE 4686+T117L EQU * 4687+* 4688+* write a comment indicating what REPINS does (in case NOGEN in effect) 4689+* 4690+*,// REPINS: do 50 times: 4691+* 4692+* MNOTE requires that ' is doubled for expanded variables 4693+* thus build &MASTR as a copy of '&ARGS with ' doubled 4694+* 4695+* 4696+*,// STCM R2,B'1100',T117V 4697+* 4698+* finally generate code: &ICNT copies of &CODE &ARGS 4699+* 0060BE BE2C C0F8 06198 4700+ STCM R2,B'1100',T117V 0060C2 BE2C C0F8 06198 4701+ STCM R2,B'1100',T117V 0060C6 BE2C C0F8 06198 4702+ STCM R2,B'1100',T117V 0060CA BE2C C0F8 06198 4703+ STCM R2,B'1100',T117V 0060CE BE2C C0F8 06198 4704+ STCM R2,B'1100',T117V 0060D2 BE2C C0F8 06198 4705+ STCM R2,B'1100',T117V 0060D6 BE2C C0F8 06198 4706+ STCM R2,B'1100',T117V 0060DA BE2C C0F8 06198 4707+ STCM R2,B'1100',T117V 0060DE BE2C C0F8 06198 4708+ STCM R2,B'1100',T117V 0060E2 BE2C C0F8 06198 4709+ STCM R2,B'1100',T117V 0060E6 BE2C C0F8 06198 4710+ STCM R2,B'1100',T117V 0060EA BE2C C0F8 06198 4711+ STCM R2,B'1100',T117V 0060EE BE2C C0F8 06198 4712+ STCM R2,B'1100',T117V 0060F2 BE2C C0F8 06198 4713+ STCM R2,B'1100',T117V 0060F6 BE2C C0F8 06198 4714+ STCM R2,B'1100',T117V 0060FA BE2C C0F8 06198 4715+ STCM R2,B'1100',T117V 0060FE BE2C C0F8 06198 4716+ STCM R2,B'1100',T117V 006102 BE2C C0F8 06198 4717+ STCM R2,B'1100',T117V 006106 BE2C C0F8 06198 4718+ STCM R2,B'1100',T117V PAGE 88 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00610A BE2C C0F8 06198 4719+ STCM R2,B'1100',T117V 00610E BE2C C0F8 06198 4720+ STCM R2,B'1100',T117V 006112 BE2C C0F8 06198 4721+ STCM R2,B'1100',T117V 006116 BE2C C0F8 06198 4722+ STCM R2,B'1100',T117V 00611A BE2C C0F8 06198 4723+ STCM R2,B'1100',T117V 00611E BE2C C0F8 06198 4724+ STCM R2,B'1100',T117V 006122 BE2C C0F8 06198 4725+ STCM R2,B'1100',T117V 006126 BE2C C0F8 06198 4726+ STCM R2,B'1100',T117V 00612A BE2C C0F8 06198 4727+ STCM R2,B'1100',T117V 00612E BE2C C0F8 06198 4728+ STCM R2,B'1100',T117V 006132 BE2C C0F8 06198 4729+ STCM R2,B'1100',T117V 006136 BE2C C0F8 06198 4730+ STCM R2,B'1100',T117V 00613A BE2C C0F8 06198 4731+ STCM R2,B'1100',T117V 00613E BE2C C0F8 06198 4732+ STCM R2,B'1100',T117V 006142 BE2C C0F8 06198 4733+ STCM R2,B'1100',T117V 006146 BE2C C0F8 06198 4734+ STCM R2,B'1100',T117V 00614A BE2C C0F8 06198 4735+ STCM R2,B'1100',T117V 00614E BE2C C0F8 06198 4736+ STCM R2,B'1100',T117V 006152 BE2C C0F8 06198 4737+ STCM R2,B'1100',T117V 006156 BE2C C0F8 06198 4738+ STCM R2,B'1100',T117V 00615A BE2C C0F8 06198 4739+ STCM R2,B'1100',T117V 00615E BE2C C0F8 06198 4740+ STCM R2,B'1100',T117V 006162 BE2C C0F8 06198 4741+ STCM R2,B'1100',T117V 006166 BE2C C0F8 06198 4742+ STCM R2,B'1100',T117V 00616A BE2C C0F8 06198 4743+ STCM R2,B'1100',T117V 00616E BE2C C0F8 06198 4744+ STCM R2,B'1100',T117V 006172 BE2C C0F8 06198 4745+ STCM R2,B'1100',T117V 006176 BE2C C0F8 06198 4746+ STCM R2,B'1100',T117V 00617A BE2C C0F8 06198 4747+ STCM R2,B'1100',T117V 00617E BE2C C0F8 06198 4748+ STCM R2,B'1100',T117V 006182 BE2C C0F8 06198 4749+ STCM R2,B'1100',T117V 4750+* 006186 06FB 4751 BCTR R15,R11 4752 TSIMRET 006188 58F0 C100 061A0 4753+ L R15,=A(SAVETST) R15 := current save area 00618C 58DF 0004 00004 4754+ L R13,4(R15) get old save area back 006190 98EC D00C 0000C 4755+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006194 07FE 4756+ BR 14 RETURN 02000000 4757 * 006198 4758 T117V DS 1F 4759 TSIMEND 0061A0 4760+ LTORG 0061A0 00000458 4761 =A(SAVETST) 061A4 4762+T117TEND EQU * 4763 * 4764 * Test 118 -- STCM R,i,m (3c) ------------------------------ 4765 * 4766 TSIMBEG T118,10000,50,1,C'STCM R,i,m (0111)' 4767+* 002724 4768+TDSCDAT CSECT 002728 4769+ DS 0D 4770+* 002728 000061A8 4771+T118TDSC DC A(T118) // TENTRY 00272C 00000104 4772+ DC A(T118TEND-T118) // TLENGTH 002730 00002710 4773+ DC F'10000' // TLRCNT PAGE 89 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002734 00000032 4774+ DC F'50' // TIGCNT 002738 00000001 4775+ DC F'1' // TLTYPE 0010CC 4776+TEXT CSECT 0010CC E3F1F1F8 4777+SPTR0268 DC C'T118' 00273C 4778+TDSCDAT CSECT 00273C 4779+ DS 0F 00273C 040010CC 4780+ DC AL1(L'SPTR0268),AL3(SPTR0268) 0010D0 4781+TEXT CSECT 0010D0 E2E3C3D440D96B89 4782+SPTR0269 DC C'STCM R,i,m (0111)' 002740 4783+TDSCDAT CSECT 002740 4784+ DS 0F 002740 110010D0 4785+ DC AL1(L'SPTR0269),AL3(SPTR0269) 4786+* 004A10 4787+TDSCTBL CSECT 04A10 4788+T118TPTR EQU * 004A10 00002728 4789+ DC A(T118TDSC) enabled test 4790+* 0061A4 4791+TCODE CSECT 0061A8 4792+ DS 0D ensure double word alignment for test 0061A8 4793+T118 DS 0H 01650000 0061A8 90EC D00C 0000C 4794+ STM 14,12,12(13) SAVE REGISTERS 02950000 0061AC 18CF 4795+ LR R12,R15 base register := entry address 061A8 4796+ USING T118,R12 declare code base register 0061AE 41B0 C01E 061C6 4797+ LA R11,T118L load loop target to R11 0061B2 58F0 C100 062A8 4798+ L R15,=A(SAVETST) R15 := current save area 0061B6 50DF 0004 00004 4799+ ST R13,4(R15) set back pointer in current save area 0061BA 182D 4800+ LR R2,R13 remember callers save area 0061BC 18DF 4801+ LR R13,R15 setup current save area 0061BE 50D2 0008 00008 4802+ ST R13,8(R2) set forw pointer in callers save area 00000 4803+ USING TDSC,R1 declare TDSC base register 0061C2 58F0 1008 00008 4804+ L R15,TLRCNT load local repeat count to R15 4805+* 4806 * 4807 T118L REPINS STCM,(R2,B'0111',T118V) repeat: STCM R2,B'0111',T118V 4808+* 4809+* build from sublist &ALIST a comma separated string &ARGS 4810+* 4811+* 4812+* 4813+* 4814+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4815+* this allows to transfer the repeat count from last TDSCGEN call 4816+* 4817+* 061C6 4818+T118L EQU * 4819+* 4820+* write a comment indicating what REPINS does (in case NOGEN in effect) 4821+* 4822+*,// REPINS: do 50 times: 4823+* 4824+* MNOTE requires that ' is doubled for expanded variables 4825+* thus build &MASTR as a copy of '&ARGS with ' doubled 4826+* 4827+* 4828+*,// STCM R2,B'0111',T118V PAGE 90 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 4829+* 4830+* finally generate code: &ICNT copies of &CODE &ARGS 4831+* 0061C6 BE27 C0F8 062A0 4832+ STCM R2,B'0111',T118V 0061CA BE27 C0F8 062A0 4833+ STCM R2,B'0111',T118V 0061CE BE27 C0F8 062A0 4834+ STCM R2,B'0111',T118V 0061D2 BE27 C0F8 062A0 4835+ STCM R2,B'0111',T118V 0061D6 BE27 C0F8 062A0 4836+ STCM R2,B'0111',T118V 0061DA BE27 C0F8 062A0 4837+ STCM R2,B'0111',T118V 0061DE BE27 C0F8 062A0 4838+ STCM R2,B'0111',T118V 0061E2 BE27 C0F8 062A0 4839+ STCM R2,B'0111',T118V 0061E6 BE27 C0F8 062A0 4840+ STCM R2,B'0111',T118V 0061EA BE27 C0F8 062A0 4841+ STCM R2,B'0111',T118V 0061EE BE27 C0F8 062A0 4842+ STCM R2,B'0111',T118V 0061F2 BE27 C0F8 062A0 4843+ STCM R2,B'0111',T118V 0061F6 BE27 C0F8 062A0 4844+ STCM R2,B'0111',T118V 0061FA BE27 C0F8 062A0 4845+ STCM R2,B'0111',T118V 0061FE BE27 C0F8 062A0 4846+ STCM R2,B'0111',T118V 006202 BE27 C0F8 062A0 4847+ STCM R2,B'0111',T118V 006206 BE27 C0F8 062A0 4848+ STCM R2,B'0111',T118V 00620A BE27 C0F8 062A0 4849+ STCM R2,B'0111',T118V 00620E BE27 C0F8 062A0 4850+ STCM R2,B'0111',T118V 006212 BE27 C0F8 062A0 4851+ STCM R2,B'0111',T118V 006216 BE27 C0F8 062A0 4852+ STCM R2,B'0111',T118V 00621A BE27 C0F8 062A0 4853+ STCM R2,B'0111',T118V 00621E BE27 C0F8 062A0 4854+ STCM R2,B'0111',T118V 006222 BE27 C0F8 062A0 4855+ STCM R2,B'0111',T118V 006226 BE27 C0F8 062A0 4856+ STCM R2,B'0111',T118V 00622A BE27 C0F8 062A0 4857+ STCM R2,B'0111',T118V 00622E BE27 C0F8 062A0 4858+ STCM R2,B'0111',T118V 006232 BE27 C0F8 062A0 4859+ STCM R2,B'0111',T118V 006236 BE27 C0F8 062A0 4860+ STCM R2,B'0111',T118V 00623A BE27 C0F8 062A0 4861+ STCM R2,B'0111',T118V 00623E BE27 C0F8 062A0 4862+ STCM R2,B'0111',T118V 006242 BE27 C0F8 062A0 4863+ STCM R2,B'0111',T118V 006246 BE27 C0F8 062A0 4864+ STCM R2,B'0111',T118V 00624A BE27 C0F8 062A0 4865+ STCM R2,B'0111',T118V 00624E BE27 C0F8 062A0 4866+ STCM R2,B'0111',T118V 006252 BE27 C0F8 062A0 4867+ STCM R2,B'0111',T118V 006256 BE27 C0F8 062A0 4868+ STCM R2,B'0111',T118V 00625A BE27 C0F8 062A0 4869+ STCM R2,B'0111',T118V 00625E BE27 C0F8 062A0 4870+ STCM R2,B'0111',T118V 006262 BE27 C0F8 062A0 4871+ STCM R2,B'0111',T118V 006266 BE27 C0F8 062A0 4872+ STCM R2,B'0111',T118V 00626A BE27 C0F8 062A0 4873+ STCM R2,B'0111',T118V 00626E BE27 C0F8 062A0 4874+ STCM R2,B'0111',T118V 006272 BE27 C0F8 062A0 4875+ STCM R2,B'0111',T118V 006276 BE27 C0F8 062A0 4876+ STCM R2,B'0111',T118V 00627A BE27 C0F8 062A0 4877+ STCM R2,B'0111',T118V 00627E BE27 C0F8 062A0 4878+ STCM R2,B'0111',T118V 006282 BE27 C0F8 062A0 4879+ STCM R2,B'0111',T118V 006286 BE27 C0F8 062A0 4880+ STCM R2,B'0111',T118V 00628A BE27 C0F8 062A0 4881+ STCM R2,B'0111',T118V 4882+* 00628E 06FB 4883 BCTR R15,R11 PAGE 91 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 4884 TSIMRET 006290 58F0 C100 062A8 4885+ L R15,=A(SAVETST) R15 := current save area 006294 58DF 0004 00004 4886+ L R13,4(R15) get old save area back 006298 98EC D00C 0000C 4887+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00629C 07FE 4888+ BR 14 RETURN 02000000 4889 * 0062A0 4890 T118V DS 1F 4891 TSIMEND 0062A8 4892+ LTORG 0062A8 00000458 4893 =A(SAVETST) 062AC 4894+T118TEND EQU * 4895 * 4896 * Test 12x -- load/store multiple ========================== 4897 * 4898 * Test 120 -- STM 2,3,m ------------------------------------ 4899 * 4900 TSIMBEG T120,9000,50,1,C'STM 2,3,m (2r)' 4901+* 002744 4902+TDSCDAT CSECT 002748 4903+ DS 0D 4904+* 002748 000062B0 4905+T120TDSC DC A(T120) // TENTRY 00274C 00000104 4906+ DC A(T120TEND-T120) // TLENGTH 002750 00002328 4907+ DC F'9000' // TLRCNT 002754 00000032 4908+ DC F'50' // TIGCNT 002758 00000001 4909+ DC F'1' // TLTYPE 0010E1 4910+TEXT CSECT 0010E1 E3F1F2F0 4911+SPTR0280 DC C'T120' 00275C 4912+TDSCDAT CSECT 00275C 4913+ DS 0F 00275C 040010E1 4914+ DC AL1(L'SPTR0280),AL3(SPTR0280) 0010E5 4915+TEXT CSECT 0010E5 E2E3D440F26BF36B 4916+SPTR0281 DC C'STM 2,3,m (2r)' 002760 4917+TDSCDAT CSECT 002760 4918+ DS 0F 002760 0E0010E5 4919+ DC AL1(L'SPTR0281),AL3(SPTR0281) 4920+* 004A14 4921+TDSCTBL CSECT 04A14 4922+T120TPTR EQU * 004A14 00002748 4923+ DC A(T120TDSC) enabled test 4924+* 0062AC 4925+TCODE CSECT 0062B0 4926+ DS 0D ensure double word alignment for test 0062B0 4927+T120 DS 0H 01650000 0062B0 90EC D00C 0000C 4928+ STM 14,12,12(13) SAVE REGISTERS 02950000 0062B4 18CF 4929+ LR R12,R15 base register := entry address 062B0 4930+ USING T120,R12 declare code base register 0062B6 41B0 C01E 062CE 4931+ LA R11,T120L load loop target to R11 0062BA 58F0 C100 063B0 4932+ L R15,=A(SAVETST) R15 := current save area 0062BE 50DF 0004 00004 4933+ ST R13,4(R15) set back pointer in current save area 0062C2 182D 4934+ LR R2,R13 remember callers save area 0062C4 18DF 4935+ LR R13,R15 setup current save area 0062C6 50D2 0008 00008 4936+ ST R13,8(R2) set forw pointer in callers save area 00000 4937+ USING TDSC,R1 declare TDSC base register 0062CA 58F0 1008 00008 4938+ L R15,TLRCNT load local repeat count to R15 PAGE 92 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 4939+* 4940 * 4941 T120L REPINS STM,(2,3,T120V) repeat: STM 2,3,T120V 4942+* 4943+* build from sublist &ALIST a comma separated string &ARGS 4944+* 4945+* 4946+* 4947+* 4948+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 4949+* this allows to transfer the repeat count from last TDSCGEN call 4950+* 4951+* 062CE 4952+T120L EQU * 4953+* 4954+* write a comment indicating what REPINS does (in case NOGEN in effect) 4955+* 4956+*,// REPINS: do 50 times: 4957+* 4958+* MNOTE requires that ' is doubled for expanded variables 4959+* thus build &MASTR as a copy of '&ARGS with ' doubled 4960+* 4961+* 4962+*,// STM 2,3,T120V 4963+* 4964+* finally generate code: &ICNT copies of &CODE &ARGS 4965+* 0062CE 9023 C0F8 063A8 4966+ STM 2,3,T120V 0062D2 9023 C0F8 063A8 4967+ STM 2,3,T120V 0062D6 9023 C0F8 063A8 4968+ STM 2,3,T120V 0062DA 9023 C0F8 063A8 4969+ STM 2,3,T120V 0062DE 9023 C0F8 063A8 4970+ STM 2,3,T120V 0062E2 9023 C0F8 063A8 4971+ STM 2,3,T120V 0062E6 9023 C0F8 063A8 4972+ STM 2,3,T120V 0062EA 9023 C0F8 063A8 4973+ STM 2,3,T120V 0062EE 9023 C0F8 063A8 4974+ STM 2,3,T120V 0062F2 9023 C0F8 063A8 4975+ STM 2,3,T120V 0062F6 9023 C0F8 063A8 4976+ STM 2,3,T120V 0062FA 9023 C0F8 063A8 4977+ STM 2,3,T120V 0062FE 9023 C0F8 063A8 4978+ STM 2,3,T120V 006302 9023 C0F8 063A8 4979+ STM 2,3,T120V 006306 9023 C0F8 063A8 4980+ STM 2,3,T120V 00630A 9023 C0F8 063A8 4981+ STM 2,3,T120V 00630E 9023 C0F8 063A8 4982+ STM 2,3,T120V 006312 9023 C0F8 063A8 4983+ STM 2,3,T120V 006316 9023 C0F8 063A8 4984+ STM 2,3,T120V 00631A 9023 C0F8 063A8 4985+ STM 2,3,T120V 00631E 9023 C0F8 063A8 4986+ STM 2,3,T120V 006322 9023 C0F8 063A8 4987+ STM 2,3,T120V 006326 9023 C0F8 063A8 4988+ STM 2,3,T120V 00632A 9023 C0F8 063A8 4989+ STM 2,3,T120V 00632E 9023 C0F8 063A8 4990+ STM 2,3,T120V 006332 9023 C0F8 063A8 4991+ STM 2,3,T120V 006336 9023 C0F8 063A8 4992+ STM 2,3,T120V 00633A 9023 C0F8 063A8 4993+ STM 2,3,T120V PAGE 93 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00633E 9023 C0F8 063A8 4994+ STM 2,3,T120V 006342 9023 C0F8 063A8 4995+ STM 2,3,T120V 006346 9023 C0F8 063A8 4996+ STM 2,3,T120V 00634A 9023 C0F8 063A8 4997+ STM 2,3,T120V 00634E 9023 C0F8 063A8 4998+ STM 2,3,T120V 006352 9023 C0F8 063A8 4999+ STM 2,3,T120V 006356 9023 C0F8 063A8 5000+ STM 2,3,T120V 00635A 9023 C0F8 063A8 5001+ STM 2,3,T120V 00635E 9023 C0F8 063A8 5002+ STM 2,3,T120V 006362 9023 C0F8 063A8 5003+ STM 2,3,T120V 006366 9023 C0F8 063A8 5004+ STM 2,3,T120V 00636A 9023 C0F8 063A8 5005+ STM 2,3,T120V 00636E 9023 C0F8 063A8 5006+ STM 2,3,T120V 006372 9023 C0F8 063A8 5007+ STM 2,3,T120V 006376 9023 C0F8 063A8 5008+ STM 2,3,T120V 00637A 9023 C0F8 063A8 5009+ STM 2,3,T120V 00637E 9023 C0F8 063A8 5010+ STM 2,3,T120V 006382 9023 C0F8 063A8 5011+ STM 2,3,T120V 006386 9023 C0F8 063A8 5012+ STM 2,3,T120V 00638A 9023 C0F8 063A8 5013+ STM 2,3,T120V 00638E 9023 C0F8 063A8 5014+ STM 2,3,T120V 006392 9023 C0F8 063A8 5015+ STM 2,3,T120V 5016+* 006396 06FB 5017 BCTR R15,R11 5018 TSIMRET 006398 58F0 C100 063B0 5019+ L R15,=A(SAVETST) R15 := current save area 00639C 58DF 0004 00004 5020+ L R13,4(R15) get old save area back 0063A0 98EC D00C 0000C 5021+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0063A4 07FE 5022+ BR 14 RETURN 02000000 5023 * 0063A8 5024 T120V DS 2F 5025 TSIMEND 0063B0 5026+ LTORG 0063B0 00000458 5027 =A(SAVETST) 063B4 5028+T120TEND EQU * 5029 * 5030 * Test 121 -- STM 2,7,m ------------------------------------ 5031 * 5032 TSIMBEG T121,6500,50,1,C'STM 2,7,m (6r)' 5033+* 002764 5034+TDSCDAT CSECT 002768 5035+ DS 0D 5036+* 002768 000063B8 5037+T121TDSC DC A(T121) // TENTRY 00276C 00000114 5038+ DC A(T121TEND-T121) // TLENGTH 002770 00001964 5039+ DC F'6500' // TLRCNT 002774 00000032 5040+ DC F'50' // TIGCNT 002778 00000001 5041+ DC F'1' // TLTYPE 0010F3 5042+TEXT CSECT 0010F3 E3F1F2F1 5043+SPTR0292 DC C'T121' 00277C 5044+TDSCDAT CSECT 00277C 5045+ DS 0F 00277C 040010F3 5046+ DC AL1(L'SPTR0292),AL3(SPTR0292) 0010F7 5047+TEXT CSECT 0010F7 E2E3D440F26BF76B 5048+SPTR0293 DC C'STM 2,7,m (6r)' PAGE 94 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002780 5049+TDSCDAT CSECT 002780 5050+ DS 0F 002780 0E0010F7 5051+ DC AL1(L'SPTR0293),AL3(SPTR0293) 5052+* 004A18 5053+TDSCTBL CSECT 04A18 5054+T121TPTR EQU * 004A18 00002768 5055+ DC A(T121TDSC) enabled test 5056+* 0063B4 5057+TCODE CSECT 0063B8 5058+ DS 0D ensure double word alignment for test 0063B8 5059+T121 DS 0H 01650000 0063B8 90EC D00C 0000C 5060+ STM 14,12,12(13) SAVE REGISTERS 02950000 0063BC 18CF 5061+ LR R12,R15 base register := entry address 063B8 5062+ USING T121,R12 declare code base register 0063BE 41B0 C01E 063D6 5063+ LA R11,T121L load loop target to R11 0063C2 58F0 C110 064C8 5064+ L R15,=A(SAVETST) R15 := current save area 0063C6 50DF 0004 00004 5065+ ST R13,4(R15) set back pointer in current save area 0063CA 182D 5066+ LR R2,R13 remember callers save area 0063CC 18DF 5067+ LR R13,R15 setup current save area 0063CE 50D2 0008 00008 5068+ ST R13,8(R2) set forw pointer in callers save area 00000 5069+ USING TDSC,R1 declare TDSC base register 0063D2 58F0 1008 00008 5070+ L R15,TLRCNT load local repeat count to R15 5071+* 5072 * 5073 T121L REPINS STM,(2,7,T121V) repeat: STM 2,7,T121V 5074+* 5075+* build from sublist &ALIST a comma separated string &ARGS 5076+* 5077+* 5078+* 5079+* 5080+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5081+* this allows to transfer the repeat count from last TDSCGEN call 5082+* 5083+* 063D6 5084+T121L EQU * 5085+* 5086+* write a comment indicating what REPINS does (in case NOGEN in effect) 5087+* 5088+*,// REPINS: do 50 times: 5089+* 5090+* MNOTE requires that ' is doubled for expanded variables 5091+* thus build &MASTR as a copy of '&ARGS with ' doubled 5092+* 5093+* 5094+*,// STM 2,7,T121V 5095+* 5096+* finally generate code: &ICNT copies of &CODE &ARGS 5097+* 0063D6 9027 C0F8 064B0 5098+ STM 2,7,T121V 0063DA 9027 C0F8 064B0 5099+ STM 2,7,T121V 0063DE 9027 C0F8 064B0 5100+ STM 2,7,T121V 0063E2 9027 C0F8 064B0 5101+ STM 2,7,T121V 0063E6 9027 C0F8 064B0 5102+ STM 2,7,T121V 0063EA 9027 C0F8 064B0 5103+ STM 2,7,T121V PAGE 95 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0063EE 9027 C0F8 064B0 5104+ STM 2,7,T121V 0063F2 9027 C0F8 064B0 5105+ STM 2,7,T121V 0063F6 9027 C0F8 064B0 5106+ STM 2,7,T121V 0063FA 9027 C0F8 064B0 5107+ STM 2,7,T121V 0063FE 9027 C0F8 064B0 5108+ STM 2,7,T121V 006402 9027 C0F8 064B0 5109+ STM 2,7,T121V 006406 9027 C0F8 064B0 5110+ STM 2,7,T121V 00640A 9027 C0F8 064B0 5111+ STM 2,7,T121V 00640E 9027 C0F8 064B0 5112+ STM 2,7,T121V 006412 9027 C0F8 064B0 5113+ STM 2,7,T121V 006416 9027 C0F8 064B0 5114+ STM 2,7,T121V 00641A 9027 C0F8 064B0 5115+ STM 2,7,T121V 00641E 9027 C0F8 064B0 5116+ STM 2,7,T121V 006422 9027 C0F8 064B0 5117+ STM 2,7,T121V 006426 9027 C0F8 064B0 5118+ STM 2,7,T121V 00642A 9027 C0F8 064B0 5119+ STM 2,7,T121V 00642E 9027 C0F8 064B0 5120+ STM 2,7,T121V 006432 9027 C0F8 064B0 5121+ STM 2,7,T121V 006436 9027 C0F8 064B0 5122+ STM 2,7,T121V 00643A 9027 C0F8 064B0 5123+ STM 2,7,T121V 00643E 9027 C0F8 064B0 5124+ STM 2,7,T121V 006442 9027 C0F8 064B0 5125+ STM 2,7,T121V 006446 9027 C0F8 064B0 5126+ STM 2,7,T121V 00644A 9027 C0F8 064B0 5127+ STM 2,7,T121V 00644E 9027 C0F8 064B0 5128+ STM 2,7,T121V 006452 9027 C0F8 064B0 5129+ STM 2,7,T121V 006456 9027 C0F8 064B0 5130+ STM 2,7,T121V 00645A 9027 C0F8 064B0 5131+ STM 2,7,T121V 00645E 9027 C0F8 064B0 5132+ STM 2,7,T121V 006462 9027 C0F8 064B0 5133+ STM 2,7,T121V 006466 9027 C0F8 064B0 5134+ STM 2,7,T121V 00646A 9027 C0F8 064B0 5135+ STM 2,7,T121V 00646E 9027 C0F8 064B0 5136+ STM 2,7,T121V 006472 9027 C0F8 064B0 5137+ STM 2,7,T121V 006476 9027 C0F8 064B0 5138+ STM 2,7,T121V 00647A 9027 C0F8 064B0 5139+ STM 2,7,T121V 00647E 9027 C0F8 064B0 5140+ STM 2,7,T121V 006482 9027 C0F8 064B0 5141+ STM 2,7,T121V 006486 9027 C0F8 064B0 5142+ STM 2,7,T121V 00648A 9027 C0F8 064B0 5143+ STM 2,7,T121V 00648E 9027 C0F8 064B0 5144+ STM 2,7,T121V 006492 9027 C0F8 064B0 5145+ STM 2,7,T121V 006496 9027 C0F8 064B0 5146+ STM 2,7,T121V 00649A 9027 C0F8 064B0 5147+ STM 2,7,T121V 5148+* 00649E 06FB 5149 BCTR R15,R11 5150 TSIMRET 0064A0 58F0 C110 064C8 5151+ L R15,=A(SAVETST) R15 := current save area 0064A4 58DF 0004 00004 5152+ L R13,4(R15) get old save area back 0064A8 98EC D00C 0000C 5153+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0064AC 07FE 5154+ BR 14 RETURN 02000000 5155 * 0064B0 5156 T121V DS 6F 5157 TSIMEND 0064C8 5158+ LTORG PAGE 96 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0064C8 00000458 5159 =A(SAVETST) 064CC 5160+T121TEND EQU * 5161 * 5162 * Test 122 -- STM (14,12),m -------------------------------- 5163 * 5164 TSIMBEG T122,5000,50,1,C'STM 14,12,m (15r)' 5165+* 002784 5166+TDSCDAT CSECT 002788 5167+ DS 0D 5168+* 002788 000064D0 5169+T122TDSC DC A(T122) // TENTRY 00278C 0000013C 5170+ DC A(T122TEND-T122) // TLENGTH 002790 00001388 5171+ DC F'5000' // TLRCNT 002794 00000032 5172+ DC F'50' // TIGCNT 002798 00000001 5173+ DC F'1' // TLTYPE 001105 5174+TEXT CSECT 001105 E3F1F2F2 5175+SPTR0304 DC C'T122' 00279C 5176+TDSCDAT CSECT 00279C 5177+ DS 0F 00279C 04001105 5178+ DC AL1(L'SPTR0304),AL3(SPTR0304) 001109 5179+TEXT CSECT 001109 E2E3D440F1F46BF1 5180+SPTR0305 DC C'STM 14,12,m (15r)' 0027A0 5181+TDSCDAT CSECT 0027A0 5182+ DS 0F 0027A0 11001109 5183+ DC AL1(L'SPTR0305),AL3(SPTR0305) 5184+* 004A1C 5185+TDSCTBL CSECT 04A1C 5186+T122TPTR EQU * 004A1C 00002788 5187+ DC A(T122TDSC) enabled test 5188+* 0064CC 5189+TCODE CSECT 0064D0 5190+ DS 0D ensure double word alignment for test 0064D0 5191+T122 DS 0H 01650000 0064D0 90EC D00C 0000C 5192+ STM 14,12,12(13) SAVE REGISTERS 02950000 0064D4 18CF 5193+ LR R12,R15 base register := entry address 064D0 5194+ USING T122,R12 declare code base register 0064D6 41B0 C01E 064EE 5195+ LA R11,T122L load loop target to R11 0064DA 58F0 C138 06608 5196+ L R15,=A(SAVETST) R15 := current save area 0064DE 50DF 0004 00004 5197+ ST R13,4(R15) set back pointer in current save area 0064E2 182D 5198+ LR R2,R13 remember callers save area 0064E4 18DF 5199+ LR R13,R15 setup current save area 0064E6 50D2 0008 00008 5200+ ST R13,8(R2) set forw pointer in callers save area 00000 5201+ USING TDSC,R1 declare TDSC base register 0064EA 58F0 1008 00008 5202+ L R15,TLRCNT load local repeat count to R15 5203+* 5204 * 5205 T122L REPINS STM,(14,12,T122V) repeat: STM 14,12,T122V 5206+* 5207+* build from sublist &ALIST a comma separated string &ARGS 5208+* 5209+* 5210+* 5211+* 5212+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5213+* this allows to transfer the repeat count from last TDSCGEN call PAGE 97 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 5214+* 5215+* 064EE 5216+T122L EQU * 5217+* 5218+* write a comment indicating what REPINS does (in case NOGEN in effect) 5219+* 5220+*,// REPINS: do 50 times: 5221+* 5222+* MNOTE requires that ' is doubled for expanded variables 5223+* thus build &MASTR as a copy of '&ARGS with ' doubled 5224+* 5225+* 5226+*,// STM 14,12,T122V 5227+* 5228+* finally generate code: &ICNT copies of &CODE &ARGS 5229+* 0064EE 90EC C0F8 065C8 5230+ STM 14,12,T122V 0064F2 90EC C0F8 065C8 5231+ STM 14,12,T122V 0064F6 90EC C0F8 065C8 5232+ STM 14,12,T122V 0064FA 90EC C0F8 065C8 5233+ STM 14,12,T122V 0064FE 90EC C0F8 065C8 5234+ STM 14,12,T122V 006502 90EC C0F8 065C8 5235+ STM 14,12,T122V 006506 90EC C0F8 065C8 5236+ STM 14,12,T122V 00650A 90EC C0F8 065C8 5237+ STM 14,12,T122V 00650E 90EC C0F8 065C8 5238+ STM 14,12,T122V 006512 90EC C0F8 065C8 5239+ STM 14,12,T122V 006516 90EC C0F8 065C8 5240+ STM 14,12,T122V 00651A 90EC C0F8 065C8 5241+ STM 14,12,T122V 00651E 90EC C0F8 065C8 5242+ STM 14,12,T122V 006522 90EC C0F8 065C8 5243+ STM 14,12,T122V 006526 90EC C0F8 065C8 5244+ STM 14,12,T122V 00652A 90EC C0F8 065C8 5245+ STM 14,12,T122V 00652E 90EC C0F8 065C8 5246+ STM 14,12,T122V 006532 90EC C0F8 065C8 5247+ STM 14,12,T122V 006536 90EC C0F8 065C8 5248+ STM 14,12,T122V 00653A 90EC C0F8 065C8 5249+ STM 14,12,T122V 00653E 90EC C0F8 065C8 5250+ STM 14,12,T122V 006542 90EC C0F8 065C8 5251+ STM 14,12,T122V 006546 90EC C0F8 065C8 5252+ STM 14,12,T122V 00654A 90EC C0F8 065C8 5253+ STM 14,12,T122V 00654E 90EC C0F8 065C8 5254+ STM 14,12,T122V 006552 90EC C0F8 065C8 5255+ STM 14,12,T122V 006556 90EC C0F8 065C8 5256+ STM 14,12,T122V 00655A 90EC C0F8 065C8 5257+ STM 14,12,T122V 00655E 90EC C0F8 065C8 5258+ STM 14,12,T122V 006562 90EC C0F8 065C8 5259+ STM 14,12,T122V 006566 90EC C0F8 065C8 5260+ STM 14,12,T122V 00656A 90EC C0F8 065C8 5261+ STM 14,12,T122V 00656E 90EC C0F8 065C8 5262+ STM 14,12,T122V 006572 90EC C0F8 065C8 5263+ STM 14,12,T122V 006576 90EC C0F8 065C8 5264+ STM 14,12,T122V 00657A 90EC C0F8 065C8 5265+ STM 14,12,T122V 00657E 90EC C0F8 065C8 5266+ STM 14,12,T122V 006582 90EC C0F8 065C8 5267+ STM 14,12,T122V 006586 90EC C0F8 065C8 5268+ STM 14,12,T122V PAGE 98 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00658A 90EC C0F8 065C8 5269+ STM 14,12,T122V 00658E 90EC C0F8 065C8 5270+ STM 14,12,T122V 006592 90EC C0F8 065C8 5271+ STM 14,12,T122V 006596 90EC C0F8 065C8 5272+ STM 14,12,T122V 00659A 90EC C0F8 065C8 5273+ STM 14,12,T122V 00659E 90EC C0F8 065C8 5274+ STM 14,12,T122V 0065A2 90EC C0F8 065C8 5275+ STM 14,12,T122V 0065A6 90EC C0F8 065C8 5276+ STM 14,12,T122V 0065AA 90EC C0F8 065C8 5277+ STM 14,12,T122V 0065AE 90EC C0F8 065C8 5278+ STM 14,12,T122V 0065B2 90EC C0F8 065C8 5279+ STM 14,12,T122V 5280+* 0065B6 06FB 5281 BCTR R15,R11 5282 TSIMRET 0065B8 58F0 C138 06608 5283+ L R15,=A(SAVETST) R15 := current save area 0065BC 58DF 0004 00004 5284+ L R13,4(R15) get old save area back 0065C0 98EC D00C 0000C 5285+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0065C4 07FE 5286+ BR 14 RETURN 02000000 5287 * 0065C8 5288 T122V DS 15F 5289 TSIMEND 006608 5290+ LTORG 006608 00000458 5291 =A(SAVETST) 0660C 5292+T122TEND EQU * 5293 * 5294 * Test 123 -- LM 2,3,m ------------------------------------- 5295 * 5296 TSIMBEG T123,9000,50,1,C'LM 2,3,m (2r)' 5297+* 0027A4 5298+TDSCDAT CSECT 0027A8 5299+ DS 0D 5300+* 0027A8 00006610 5301+T123TDSC DC A(T123) // TENTRY 0027AC 00000104 5302+ DC A(T123TEND-T123) // TLENGTH 0027B0 00002328 5303+ DC F'9000' // TLRCNT 0027B4 00000032 5304+ DC F'50' // TIGCNT 0027B8 00000001 5305+ DC F'1' // TLTYPE 00111A 5306+TEXT CSECT 00111A E3F1F2F3 5307+SPTR0316 DC C'T123' 0027BC 5308+TDSCDAT CSECT 0027BC 5309+ DS 0F 0027BC 0400111A 5310+ DC AL1(L'SPTR0316),AL3(SPTR0316) 00111E 5311+TEXT CSECT 00111E D3D440F26BF36B94 5312+SPTR0317 DC C'LM 2,3,m (2r)' 0027C0 5313+TDSCDAT CSECT 0027C0 5314+ DS 0F 0027C0 0D00111E 5315+ DC AL1(L'SPTR0317),AL3(SPTR0317) 5316+* 004A20 5317+TDSCTBL CSECT 04A20 5318+T123TPTR EQU * 004A20 000027A8 5319+ DC A(T123TDSC) enabled test 5320+* 00660C 5321+TCODE CSECT 006610 5322+ DS 0D ensure double word alignment for test 006610 5323+T123 DS 0H 01650000 PAGE 99 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 006610 90EC D00C 0000C 5324+ STM 14,12,12(13) SAVE REGISTERS 02950000 006614 18CF 5325+ LR R12,R15 base register := entry address 06610 5326+ USING T123,R12 declare code base register 006616 41B0 C01E 0662E 5327+ LA R11,T123L load loop target to R11 00661A 58F0 C100 06710 5328+ L R15,=A(SAVETST) R15 := current save area 00661E 50DF 0004 00004 5329+ ST R13,4(R15) set back pointer in current save area 006622 182D 5330+ LR R2,R13 remember callers save area 006624 18DF 5331+ LR R13,R15 setup current save area 006626 50D2 0008 00008 5332+ ST R13,8(R2) set forw pointer in callers save area 00000 5333+ USING TDSC,R1 declare TDSC base register 00662A 58F0 1008 00008 5334+ L R15,TLRCNT load local repeat count to R15 5335+* 5336 * 5337 T123L REPINS LM,(2,3,T123V) repeat: LM 2,3,T123V 5338+* 5339+* build from sublist &ALIST a comma separated string &ARGS 5340+* 5341+* 5342+* 5343+* 5344+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5345+* this allows to transfer the repeat count from last TDSCGEN call 5346+* 5347+* 0662E 5348+T123L EQU * 5349+* 5350+* write a comment indicating what REPINS does (in case NOGEN in effect) 5351+* 5352+*,// REPINS: do 50 times: 5353+* 5354+* MNOTE requires that ' is doubled for expanded variables 5355+* thus build &MASTR as a copy of '&ARGS with ' doubled 5356+* 5357+* 5358+*,// LM 2,3,T123V 5359+* 5360+* finally generate code: &ICNT copies of &CODE &ARGS 5361+* 00662E 9823 C0F8 06708 5362+ LM 2,3,T123V 006632 9823 C0F8 06708 5363+ LM 2,3,T123V 006636 9823 C0F8 06708 5364+ LM 2,3,T123V 00663A 9823 C0F8 06708 5365+ LM 2,3,T123V 00663E 9823 C0F8 06708 5366+ LM 2,3,T123V 006642 9823 C0F8 06708 5367+ LM 2,3,T123V 006646 9823 C0F8 06708 5368+ LM 2,3,T123V 00664A 9823 C0F8 06708 5369+ LM 2,3,T123V 00664E 9823 C0F8 06708 5370+ LM 2,3,T123V 006652 9823 C0F8 06708 5371+ LM 2,3,T123V 006656 9823 C0F8 06708 5372+ LM 2,3,T123V 00665A 9823 C0F8 06708 5373+ LM 2,3,T123V 00665E 9823 C0F8 06708 5374+ LM 2,3,T123V 006662 9823 C0F8 06708 5375+ LM 2,3,T123V 006666 9823 C0F8 06708 5376+ LM 2,3,T123V 00666A 9823 C0F8 06708 5377+ LM 2,3,T123V 00666E 9823 C0F8 06708 5378+ LM 2,3,T123V PAGE 100 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 006672 9823 C0F8 06708 5379+ LM 2,3,T123V 006676 9823 C0F8 06708 5380+ LM 2,3,T123V 00667A 9823 C0F8 06708 5381+ LM 2,3,T123V 00667E 9823 C0F8 06708 5382+ LM 2,3,T123V 006682 9823 C0F8 06708 5383+ LM 2,3,T123V 006686 9823 C0F8 06708 5384+ LM 2,3,T123V 00668A 9823 C0F8 06708 5385+ LM 2,3,T123V 00668E 9823 C0F8 06708 5386+ LM 2,3,T123V 006692 9823 C0F8 06708 5387+ LM 2,3,T123V 006696 9823 C0F8 06708 5388+ LM 2,3,T123V 00669A 9823 C0F8 06708 5389+ LM 2,3,T123V 00669E 9823 C0F8 06708 5390+ LM 2,3,T123V 0066A2 9823 C0F8 06708 5391+ LM 2,3,T123V 0066A6 9823 C0F8 06708 5392+ LM 2,3,T123V 0066AA 9823 C0F8 06708 5393+ LM 2,3,T123V 0066AE 9823 C0F8 06708 5394+ LM 2,3,T123V 0066B2 9823 C0F8 06708 5395+ LM 2,3,T123V 0066B6 9823 C0F8 06708 5396+ LM 2,3,T123V 0066BA 9823 C0F8 06708 5397+ LM 2,3,T123V 0066BE 9823 C0F8 06708 5398+ LM 2,3,T123V 0066C2 9823 C0F8 06708 5399+ LM 2,3,T123V 0066C6 9823 C0F8 06708 5400+ LM 2,3,T123V 0066CA 9823 C0F8 06708 5401+ LM 2,3,T123V 0066CE 9823 C0F8 06708 5402+ LM 2,3,T123V 0066D2 9823 C0F8 06708 5403+ LM 2,3,T123V 0066D6 9823 C0F8 06708 5404+ LM 2,3,T123V 0066DA 9823 C0F8 06708 5405+ LM 2,3,T123V 0066DE 9823 C0F8 06708 5406+ LM 2,3,T123V 0066E2 9823 C0F8 06708 5407+ LM 2,3,T123V 0066E6 9823 C0F8 06708 5408+ LM 2,3,T123V 0066EA 9823 C0F8 06708 5409+ LM 2,3,T123V 0066EE 9823 C0F8 06708 5410+ LM 2,3,T123V 0066F2 9823 C0F8 06708 5411+ LM 2,3,T123V 5412+* 0066F6 06FB 5413 BCTR R15,R11 5414 TSIMRET 0066F8 58F0 C100 06710 5415+ L R15,=A(SAVETST) R15 := current save area 0066FC 58DF 0004 00004 5416+ L R13,4(R15) get old save area back 006700 98EC D00C 0000C 5417+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006704 07FE 5418+ BR 14 RETURN 02000000 5419 * 006706 0000 006708 0000000300000003 5420 T123V DC F'3',F'3' 5421 TSIMEND 006710 5422+ LTORG 006710 00000458 5423 =A(SAVETST) 06714 5424+T123TEND EQU * 5425 * 5426 * Test 124 -- LM 2,7,m ------------------------------------- 5427 * 5428 TSIMBEG T124,6000,50,1,C'LM 2,7,m (6r)' 5429+* 0027C4 5430+TDSCDAT CSECT 0027C8 5431+ DS 0D 5432+* PAGE 101 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0027C8 00006718 5433+T124TDSC DC A(T124) // TENTRY 0027CC 00000114 5434+ DC A(T124TEND-T124) // TLENGTH 0027D0 00001770 5435+ DC F'6000' // TLRCNT 0027D4 00000032 5436+ DC F'50' // TIGCNT 0027D8 00000001 5437+ DC F'1' // TLTYPE 00112B 5438+TEXT CSECT 00112B E3F1F2F4 5439+SPTR0328 DC C'T124' 0027DC 5440+TDSCDAT CSECT 0027DC 5441+ DS 0F 0027DC 0400112B 5442+ DC AL1(L'SPTR0328),AL3(SPTR0328) 00112F 5443+TEXT CSECT 00112F D3D440F26BF76B94 5444+SPTR0329 DC C'LM 2,7,m (6r)' 0027E0 5445+TDSCDAT CSECT 0027E0 5446+ DS 0F 0027E0 0D00112F 5447+ DC AL1(L'SPTR0329),AL3(SPTR0329) 5448+* 004A24 5449+TDSCTBL CSECT 04A24 5450+T124TPTR EQU * 004A24 000027C8 5451+ DC A(T124TDSC) enabled test 5452+* 006714 5453+TCODE CSECT 006718 5454+ DS 0D ensure double word alignment for test 006718 5455+T124 DS 0H 01650000 006718 90EC D00C 0000C 5456+ STM 14,12,12(13) SAVE REGISTERS 02950000 00671C 18CF 5457+ LR R12,R15 base register := entry address 06718 5458+ USING T124,R12 declare code base register 00671E 41B0 C01E 06736 5459+ LA R11,T124L load loop target to R11 006722 58F0 C110 06828 5460+ L R15,=A(SAVETST) R15 := current save area 006726 50DF 0004 00004 5461+ ST R13,4(R15) set back pointer in current save area 00672A 182D 5462+ LR R2,R13 remember callers save area 00672C 18DF 5463+ LR R13,R15 setup current save area 00672E 50D2 0008 00008 5464+ ST R13,8(R2) set forw pointer in callers save area 00000 5465+ USING TDSC,R1 declare TDSC base register 006732 58F0 1008 00008 5466+ L R15,TLRCNT load local repeat count to R15 5467+* 5468 * 5469 T124L REPINS LM,(2,7,T124V) repeat: LM 2,7,T124V 5470+* 5471+* build from sublist &ALIST a comma separated string &ARGS 5472+* 5473+* 5474+* 5475+* 5476+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5477+* this allows to transfer the repeat count from last TDSCGEN call 5478+* 5479+* 06736 5480+T124L EQU * 5481+* 5482+* write a comment indicating what REPINS does (in case NOGEN in effect) 5483+* 5484+*,// REPINS: do 50 times: 5485+* 5486+* MNOTE requires that ' is doubled for expanded variables 5487+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 102 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 5488+* 5489+* 5490+*,// LM 2,7,T124V 5491+* 5492+* finally generate code: &ICNT copies of &CODE &ARGS 5493+* 006736 9827 C0F8 06810 5494+ LM 2,7,T124V 00673A 9827 C0F8 06810 5495+ LM 2,7,T124V 00673E 9827 C0F8 06810 5496+ LM 2,7,T124V 006742 9827 C0F8 06810 5497+ LM 2,7,T124V 006746 9827 C0F8 06810 5498+ LM 2,7,T124V 00674A 9827 C0F8 06810 5499+ LM 2,7,T124V 00674E 9827 C0F8 06810 5500+ LM 2,7,T124V 006752 9827 C0F8 06810 5501+ LM 2,7,T124V 006756 9827 C0F8 06810 5502+ LM 2,7,T124V 00675A 9827 C0F8 06810 5503+ LM 2,7,T124V 00675E 9827 C0F8 06810 5504+ LM 2,7,T124V 006762 9827 C0F8 06810 5505+ LM 2,7,T124V 006766 9827 C0F8 06810 5506+ LM 2,7,T124V 00676A 9827 C0F8 06810 5507+ LM 2,7,T124V 00676E 9827 C0F8 06810 5508+ LM 2,7,T124V 006772 9827 C0F8 06810 5509+ LM 2,7,T124V 006776 9827 C0F8 06810 5510+ LM 2,7,T124V 00677A 9827 C0F8 06810 5511+ LM 2,7,T124V 00677E 9827 C0F8 06810 5512+ LM 2,7,T124V 006782 9827 C0F8 06810 5513+ LM 2,7,T124V 006786 9827 C0F8 06810 5514+ LM 2,7,T124V 00678A 9827 C0F8 06810 5515+ LM 2,7,T124V 00678E 9827 C0F8 06810 5516+ LM 2,7,T124V 006792 9827 C0F8 06810 5517+ LM 2,7,T124V 006796 9827 C0F8 06810 5518+ LM 2,7,T124V 00679A 9827 C0F8 06810 5519+ LM 2,7,T124V 00679E 9827 C0F8 06810 5520+ LM 2,7,T124V 0067A2 9827 C0F8 06810 5521+ LM 2,7,T124V 0067A6 9827 C0F8 06810 5522+ LM 2,7,T124V 0067AA 9827 C0F8 06810 5523+ LM 2,7,T124V 0067AE 9827 C0F8 06810 5524+ LM 2,7,T124V 0067B2 9827 C0F8 06810 5525+ LM 2,7,T124V 0067B6 9827 C0F8 06810 5526+ LM 2,7,T124V 0067BA 9827 C0F8 06810 5527+ LM 2,7,T124V 0067BE 9827 C0F8 06810 5528+ LM 2,7,T124V 0067C2 9827 C0F8 06810 5529+ LM 2,7,T124V 0067C6 9827 C0F8 06810 5530+ LM 2,7,T124V 0067CA 9827 C0F8 06810 5531+ LM 2,7,T124V 0067CE 9827 C0F8 06810 5532+ LM 2,7,T124V 0067D2 9827 C0F8 06810 5533+ LM 2,7,T124V 0067D6 9827 C0F8 06810 5534+ LM 2,7,T124V 0067DA 9827 C0F8 06810 5535+ LM 2,7,T124V 0067DE 9827 C0F8 06810 5536+ LM 2,7,T124V 0067E2 9827 C0F8 06810 5537+ LM 2,7,T124V 0067E6 9827 C0F8 06810 5538+ LM 2,7,T124V 0067EA 9827 C0F8 06810 5539+ LM 2,7,T124V 0067EE 9827 C0F8 06810 5540+ LM 2,7,T124V 0067F2 9827 C0F8 06810 5541+ LM 2,7,T124V 0067F6 9827 C0F8 06810 5542+ LM 2,7,T124V PAGE 103 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0067FA 9827 C0F8 06810 5543+ LM 2,7,T124V 5544+* 0067FE 06FB 5545 BCTR R15,R11 5546 TSIMRET 006800 58F0 C110 06828 5547+ L R15,=A(SAVETST) R15 := current save area 006804 58DF 0004 00004 5548+ L R13,4(R15) get old save area back 006808 98EC D00C 0000C 5549+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00680C 07FE 5550+ BR 14 RETURN 02000000 5551 * 00680E 0000 006810 0000000200000003 5552 T124V DC F'2',F'3',F'4',F'5',F'6',F'7' 5553 TSIMEND 006828 5554+ LTORG 006828 00000458 5555 =A(SAVETST) 0682C 5556+T124TEND EQU * 5557 * 5558 * Test 125 -- LM 0,11,m ------------------------------------ 5559 * 5560 TSIMBEG T125,5000,50,2,C'LM 0,11,m (12r)' 5561+* 0027E4 5562+TDSCDAT CSECT 0027E8 5563+ DS 0D 5564+* 0027E8 00006830 5565+T125TDSC DC A(T125) // TENTRY 0027EC 0000012C 5566+ DC A(T125TEND-T125) // TLENGTH 0027F0 00001388 5567+ DC F'5000' // TLRCNT 0027F4 00000032 5568+ DC F'50' // TIGCNT 0027F8 00000002 5569+ DC F'2' // TLTYPE 00113C 5570+TEXT CSECT 00113C E3F1F2F5 5571+SPTR0340 DC C'T125' 0027FC 5572+TDSCDAT CSECT 0027FC 5573+ DS 0F 0027FC 0400113C 5574+ DC AL1(L'SPTR0340),AL3(SPTR0340) 001140 5575+TEXT CSECT 001140 D3D440F06BF1F16B 5576+SPTR0341 DC C'LM 0,11,m (12r)' 002800 5577+TDSCDAT CSECT 002800 5578+ DS 0F 002800 0F001140 5579+ DC AL1(L'SPTR0341),AL3(SPTR0341) 5580+* 004A28 5581+TDSCTBL CSECT 04A28 5582+T125TPTR EQU * 004A28 000027E8 5583+ DC A(T125TDSC) enabled test 5584+* 00682C 5585+TCODE CSECT 006830 5586+ DS 0D ensure double word alignment for test 006830 5587+T125 DS 0H 01650000 006830 90EC D00C 0000C 5588+ STM 14,12,12(13) SAVE REGISTERS 02950000 006834 18CF 5589+ LR R12,R15 base register := entry address 06830 5590+ USING T125,R12 declare code base register 006836 41B0 C01E 0684E 5591+ LA R11,T125L load loop target to R11 00683A 58F0 C128 06958 5592+ L R15,=A(SAVETST) R15 := current save area 00683E 50DF 0004 00004 5593+ ST R13,4(R15) set back pointer in current save area 006842 182D 5594+ LR R2,R13 remember callers save area 006844 18DF 5595+ LR R13,R15 setup current save area 006846 50D2 0008 00008 5596+ ST R13,8(R2) set forw pointer in callers save area PAGE 104 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00000 5597+ USING TDSC,R1 declare TDSC base register 00684A 58F0 1008 00008 5598+ L R15,TLRCNT load local repeat count to R15 5599+* 5600 * 5601 T125L REPINS LM,(0,11,T125V) repeat: LM 0,11,T125V 5602+* 5603+* build from sublist &ALIST a comma separated string &ARGS 5604+* 5605+* 5606+* 5607+* 5608+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5609+* this allows to transfer the repeat count from last TDSCGEN call 5610+* 5611+* 0684E 5612+T125L EQU * 5613+* 5614+* write a comment indicating what REPINS does (in case NOGEN in effect) 5615+* 5616+*,// REPINS: do 50 times: 5617+* 5618+* MNOTE requires that ' is doubled for expanded variables 5619+* thus build &MASTR as a copy of '&ARGS with ' doubled 5620+* 5621+* 5622+*,// LM 0,11,T125V 5623+* 5624+* finally generate code: &ICNT copies of &CODE &ARGS 5625+* 00684E 980B C0F8 06928 5626+ LM 0,11,T125V 006852 980B C0F8 06928 5627+ LM 0,11,T125V 006856 980B C0F8 06928 5628+ LM 0,11,T125V 00685A 980B C0F8 06928 5629+ LM 0,11,T125V 00685E 980B C0F8 06928 5630+ LM 0,11,T125V 006862 980B C0F8 06928 5631+ LM 0,11,T125V 006866 980B C0F8 06928 5632+ LM 0,11,T125V 00686A 980B C0F8 06928 5633+ LM 0,11,T125V 00686E 980B C0F8 06928 5634+ LM 0,11,T125V 006872 980B C0F8 06928 5635+ LM 0,11,T125V 006876 980B C0F8 06928 5636+ LM 0,11,T125V 00687A 980B C0F8 06928 5637+ LM 0,11,T125V 00687E 980B C0F8 06928 5638+ LM 0,11,T125V 006882 980B C0F8 06928 5639+ LM 0,11,T125V 006886 980B C0F8 06928 5640+ LM 0,11,T125V 00688A 980B C0F8 06928 5641+ LM 0,11,T125V 00688E 980B C0F8 06928 5642+ LM 0,11,T125V 006892 980B C0F8 06928 5643+ LM 0,11,T125V 006896 980B C0F8 06928 5644+ LM 0,11,T125V 00689A 980B C0F8 06928 5645+ LM 0,11,T125V 00689E 980B C0F8 06928 5646+ LM 0,11,T125V 0068A2 980B C0F8 06928 5647+ LM 0,11,T125V 0068A6 980B C0F8 06928 5648+ LM 0,11,T125V 0068AA 980B C0F8 06928 5649+ LM 0,11,T125V 0068AE 980B C0F8 06928 5650+ LM 0,11,T125V 0068B2 980B C0F8 06928 5651+ LM 0,11,T125V PAGE 105 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0068B6 980B C0F8 06928 5652+ LM 0,11,T125V 0068BA 980B C0F8 06928 5653+ LM 0,11,T125V 0068BE 980B C0F8 06928 5654+ LM 0,11,T125V 0068C2 980B C0F8 06928 5655+ LM 0,11,T125V 0068C6 980B C0F8 06928 5656+ LM 0,11,T125V 0068CA 980B C0F8 06928 5657+ LM 0,11,T125V 0068CE 980B C0F8 06928 5658+ LM 0,11,T125V 0068D2 980B C0F8 06928 5659+ LM 0,11,T125V 0068D6 980B C0F8 06928 5660+ LM 0,11,T125V 0068DA 980B C0F8 06928 5661+ LM 0,11,T125V 0068DE 980B C0F8 06928 5662+ LM 0,11,T125V 0068E2 980B C0F8 06928 5663+ LM 0,11,T125V 0068E6 980B C0F8 06928 5664+ LM 0,11,T125V 0068EA 980B C0F8 06928 5665+ LM 0,11,T125V 0068EE 980B C0F8 06928 5666+ LM 0,11,T125V 0068F2 980B C0F8 06928 5667+ LM 0,11,T125V 0068F6 980B C0F8 06928 5668+ LM 0,11,T125V 0068FA 980B C0F8 06928 5669+ LM 0,11,T125V 0068FE 980B C0F8 06928 5670+ LM 0,11,T125V 006902 980B C0F8 06928 5671+ LM 0,11,T125V 006906 980B C0F8 06928 5672+ LM 0,11,T125V 00690A 980B C0F8 06928 5673+ LM 0,11,T125V 00690E 980B C0F8 06928 5674+ LM 0,11,T125V 006912 980B C0F8 06928 5675+ LM 0,11,T125V 5676+* 006916 46F0 C01E 0684E 5677 BCT R15,T125L 5678 TSIMRET 00691A 58F0 C128 06958 5679+ L R15,=A(SAVETST) R15 := current save area 00691E 58DF 0004 00004 5680+ L R13,4(R15) get old save area back 006922 98EC D00C 0000C 5681+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006926 07FE 5682+ BR 14 RETURN 02000000 5683 * 006928 0000000000000001 5684 T125V DC F'0',F'1',F'2',F'3',F'4',F'5' 006940 0000000600000007 5685 DC F'6',F'7',F'8',F'9',F'10',F'11' 5686 TSIMEND 006958 5687+ LTORG 006958 00000458 5688 =A(SAVETST) 0695C 5689+T125TEND EQU * 5690 * 5691 * Test 15x -- MVC ========================================== 5692 * 5693 * Test 150 -- MVC m,m (5c) --------------------------------- 5694 * 5695 TSIMBEG T150,5000,50,1,C'MVC m,m (5c)' 5696+* 002804 5697+TDSCDAT CSECT 002808 5698+ DS 0D 5699+* 002808 00006960 5700+T150TDSC DC A(T150) // TENTRY 00280C 0000016C 5701+ DC A(T150TEND-T150) // TLENGTH 002810 00001388 5702+ DC F'5000' // TLRCNT 002814 00000032 5703+ DC F'50' // TIGCNT 002818 00000001 5704+ DC F'1' // TLTYPE 00114F 5705+TEXT CSECT 00114F E3F1F5F0 5706+SPTR0352 DC C'T150' PAGE 106 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00281C 5707+TDSCDAT CSECT 00281C 5708+ DS 0F 00281C 0400114F 5709+ DC AL1(L'SPTR0352),AL3(SPTR0352) 001153 5710+TEXT CSECT 001153 D4E5C340946B9440 5711+SPTR0353 DC C'MVC m,m (5c)' 002820 5712+TDSCDAT CSECT 002820 5713+ DS 0F 002820 0C001153 5714+ DC AL1(L'SPTR0353),AL3(SPTR0353) 5715+* 004A2C 5716+TDSCTBL CSECT 04A2C 5717+T150TPTR EQU * 004A2C 00002808 5718+ DC A(T150TDSC) enabled test 5719+* 00695C 5720+TCODE CSECT 006960 5721+ DS 0D ensure double word alignment for test 006960 5722+T150 DS 0H 01650000 006960 90EC D00C 0000C 5723+ STM 14,12,12(13) SAVE REGISTERS 02950000 006964 18CF 5724+ LR R12,R15 base register := entry address 06960 5725+ USING T150,R12 declare code base register 006966 41B0 C01E 0697E 5726+ LA R11,T150L load loop target to R11 00696A 58F0 C168 06AC8 5727+ L R15,=A(SAVETST) R15 := current save area 00696E 50DF 0004 00004 5728+ ST R13,4(R15) set back pointer in current save area 006972 182D 5729+ LR R2,R13 remember callers save area 006974 18DF 5730+ LR R13,R15 setup current save area 006976 50D2 0008 00008 5731+ ST R13,8(R2) set forw pointer in callers save area 00000 5732+ USING TDSC,R1 declare TDSC base register 00697A 58F0 1008 00008 5733+ L R15,TLRCNT load local repeat count to R15 5734+* 5735 * 5736 T150L REPINS MVC,(T150V1,T150V2) repeat: MVC T150V1,T150V2 5737+* 5738+* build from sublist &ALIST a comma separated string &ARGS 5739+* 5740+* 5741+* 5742+* 5743+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5744+* this allows to transfer the repeat count from last TDSCGEN call 5745+* 5746+* 0697E 5747+T150L EQU * 5748+* 5749+* write a comment indicating what REPINS does (in case NOGEN in effect) 5750+* 5751+*,// REPINS: do 50 times: 5752+* 5753+* MNOTE requires that ' is doubled for expanded variables 5754+* thus build &MASTR as a copy of '&ARGS with ' doubled 5755+* 5756+* 5757+*,// MVC T150V1,T150V2 5758+* 5759+* finally generate code: &ICNT copies of &CODE &ARGS 5760+* 00697E D204 C15C C161 06ABC 06AC1 5761+ MVC T150V1,T150V2 PAGE 107 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 006984 D204 C15C C161 06ABC 06AC1 5762+ MVC T150V1,T150V2 00698A D204 C15C C161 06ABC 06AC1 5763+ MVC T150V1,T150V2 006990 D204 C15C C161 06ABC 06AC1 5764+ MVC T150V1,T150V2 006996 D204 C15C C161 06ABC 06AC1 5765+ MVC T150V1,T150V2 00699C D204 C15C C161 06ABC 06AC1 5766+ MVC T150V1,T150V2 0069A2 D204 C15C C161 06ABC 06AC1 5767+ MVC T150V1,T150V2 0069A8 D204 C15C C161 06ABC 06AC1 5768+ MVC T150V1,T150V2 0069AE D204 C15C C161 06ABC 06AC1 5769+ MVC T150V1,T150V2 0069B4 D204 C15C C161 06ABC 06AC1 5770+ MVC T150V1,T150V2 0069BA D204 C15C C161 06ABC 06AC1 5771+ MVC T150V1,T150V2 0069C0 D204 C15C C161 06ABC 06AC1 5772+ MVC T150V1,T150V2 0069C6 D204 C15C C161 06ABC 06AC1 5773+ MVC T150V1,T150V2 0069CC D204 C15C C161 06ABC 06AC1 5774+ MVC T150V1,T150V2 0069D2 D204 C15C C161 06ABC 06AC1 5775+ MVC T150V1,T150V2 0069D8 D204 C15C C161 06ABC 06AC1 5776+ MVC T150V1,T150V2 0069DE D204 C15C C161 06ABC 06AC1 5777+ MVC T150V1,T150V2 0069E4 D204 C15C C161 06ABC 06AC1 5778+ MVC T150V1,T150V2 0069EA D204 C15C C161 06ABC 06AC1 5779+ MVC T150V1,T150V2 0069F0 D204 C15C C161 06ABC 06AC1 5780+ MVC T150V1,T150V2 0069F6 D204 C15C C161 06ABC 06AC1 5781+ MVC T150V1,T150V2 0069FC D204 C15C C161 06ABC 06AC1 5782+ MVC T150V1,T150V2 006A02 D204 C15C C161 06ABC 06AC1 5783+ MVC T150V1,T150V2 006A08 D204 C15C C161 06ABC 06AC1 5784+ MVC T150V1,T150V2 006A0E D204 C15C C161 06ABC 06AC1 5785+ MVC T150V1,T150V2 006A14 D204 C15C C161 06ABC 06AC1 5786+ MVC T150V1,T150V2 006A1A D204 C15C C161 06ABC 06AC1 5787+ MVC T150V1,T150V2 006A20 D204 C15C C161 06ABC 06AC1 5788+ MVC T150V1,T150V2 006A26 D204 C15C C161 06ABC 06AC1 5789+ MVC T150V1,T150V2 006A2C D204 C15C C161 06ABC 06AC1 5790+ MVC T150V1,T150V2 006A32 D204 C15C C161 06ABC 06AC1 5791+ MVC T150V1,T150V2 006A38 D204 C15C C161 06ABC 06AC1 5792+ MVC T150V1,T150V2 006A3E D204 C15C C161 06ABC 06AC1 5793+ MVC T150V1,T150V2 006A44 D204 C15C C161 06ABC 06AC1 5794+ MVC T150V1,T150V2 006A4A D204 C15C C161 06ABC 06AC1 5795+ MVC T150V1,T150V2 006A50 D204 C15C C161 06ABC 06AC1 5796+ MVC T150V1,T150V2 006A56 D204 C15C C161 06ABC 06AC1 5797+ MVC T150V1,T150V2 006A5C D204 C15C C161 06ABC 06AC1 5798+ MVC T150V1,T150V2 006A62 D204 C15C C161 06ABC 06AC1 5799+ MVC T150V1,T150V2 006A68 D204 C15C C161 06ABC 06AC1 5800+ MVC T150V1,T150V2 006A6E D204 C15C C161 06ABC 06AC1 5801+ MVC T150V1,T150V2 006A74 D204 C15C C161 06ABC 06AC1 5802+ MVC T150V1,T150V2 006A7A D204 C15C C161 06ABC 06AC1 5803+ MVC T150V1,T150V2 006A80 D204 C15C C161 06ABC 06AC1 5804+ MVC T150V1,T150V2 006A86 D204 C15C C161 06ABC 06AC1 5805+ MVC T150V1,T150V2 006A8C D204 C15C C161 06ABC 06AC1 5806+ MVC T150V1,T150V2 006A92 D204 C15C C161 06ABC 06AC1 5807+ MVC T150V1,T150V2 006A98 D204 C15C C161 06ABC 06AC1 5808+ MVC T150V1,T150V2 006A9E D204 C15C C161 06ABC 06AC1 5809+ MVC T150V1,T150V2 006AA4 D204 C15C C161 06ABC 06AC1 5810+ MVC T150V1,T150V2 5811+* 006AAA 06FB 5812 BCTR R15,R11 5813 TSIMRET 006AAC 58F0 C168 06AC8 5814+ L R15,=A(SAVETST) R15 := current save area 006AB0 58DF 0004 00004 5815+ L R13,4(R15) get old save area back 006AB4 98EC D00C 0000C 5816+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 PAGE 108 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 006AB8 07FE 5817+ BR 14 RETURN 02000000 5818 * 006ABC 5819 DS 0F 006ABC 4040404040 5820 T150V1 DC CL5' ' 006AC1 F0F1F2F3F4 5821 T150V2 DC CL5'01234' 006AC6 5822 DS 0H 5823 TSIMEND 006AC8 5824+ LTORG 006AC8 00000458 5825 =A(SAVETST) 06ACC 5826+T150TEND EQU * 5827 * 5828 * Test 151 -- MVC m,m (10c) -------------------------------- 5829 * 5830 TSIMBEG T151,5000,50,1,C'MVC m,m (10c)' 5831+* 002824 5832+TDSCDAT CSECT 002828 5833+ DS 0D 5834+* 002828 00006AD0 5835+T151TDSC DC A(T151) // TENTRY 00282C 00000174 5836+ DC A(T151TEND-T151) // TLENGTH 002830 00001388 5837+ DC F'5000' // TLRCNT 002834 00000032 5838+ DC F'50' // TIGCNT 002838 00000001 5839+ DC F'1' // TLTYPE 00115F 5840+TEXT CSECT 00115F E3F1F5F1 5841+SPTR0364 DC C'T151' 00283C 5842+TDSCDAT CSECT 00283C 5843+ DS 0F 00283C 0400115F 5844+ DC AL1(L'SPTR0364),AL3(SPTR0364) 001163 5845+TEXT CSECT 001163 D4E5C340946B9440 5846+SPTR0365 DC C'MVC m,m (10c)' 002840 5847+TDSCDAT CSECT 002840 5848+ DS 0F 002840 0D001163 5849+ DC AL1(L'SPTR0365),AL3(SPTR0365) 5850+* 004A30 5851+TDSCTBL CSECT 04A30 5852+T151TPTR EQU * 004A30 00002828 5853+ DC A(T151TDSC) enabled test 5854+* 006ACC 5855+TCODE CSECT 006AD0 5856+ DS 0D ensure double word alignment for test 006AD0 5857+T151 DS 0H 01650000 006AD0 90EC D00C 0000C 5858+ STM 14,12,12(13) SAVE REGISTERS 02950000 006AD4 18CF 5859+ LR R12,R15 base register := entry address 06AD0 5860+ USING T151,R12 declare code base register 006AD6 41B0 C01E 06AEE 5861+ LA R11,T151L load loop target to R11 006ADA 58F0 C170 06C40 5862+ L R15,=A(SAVETST) R15 := current save area 006ADE 50DF 0004 00004 5863+ ST R13,4(R15) set back pointer in current save area 006AE2 182D 5864+ LR R2,R13 remember callers save area 006AE4 18DF 5865+ LR R13,R15 setup current save area 006AE6 50D2 0008 00008 5866+ ST R13,8(R2) set forw pointer in callers save area 00000 5867+ USING TDSC,R1 declare TDSC base register 006AEA 58F0 1008 00008 5868+ L R15,TLRCNT load local repeat count to R15 5869+* 5870 * 5871 T151L REPINS MVC,(T151V1,T151V2) repeat: MVC T151V1,T151V2 PAGE 109 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 5872+* 5873+* build from sublist &ALIST a comma separated string &ARGS 5874+* 5875+* 5876+* 5877+* 5878+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 5879+* this allows to transfer the repeat count from last TDSCGEN call 5880+* 5881+* 06AEE 5882+T151L EQU * 5883+* 5884+* write a comment indicating what REPINS does (in case NOGEN in effect) 5885+* 5886+*,// REPINS: do 50 times: 5887+* 5888+* MNOTE requires that ' is doubled for expanded variables 5889+* thus build &MASTR as a copy of '&ARGS with ' doubled 5890+* 5891+* 5892+*,// MVC T151V1,T151V2 5893+* 5894+* finally generate code: &ICNT copies of &CODE &ARGS 5895+* 006AEE D209 C15C C166 06C2C 06C36 5896+ MVC T151V1,T151V2 006AF4 D209 C15C C166 06C2C 06C36 5897+ MVC T151V1,T151V2 006AFA D209 C15C C166 06C2C 06C36 5898+ MVC T151V1,T151V2 006B00 D209 C15C C166 06C2C 06C36 5899+ MVC T151V1,T151V2 006B06 D209 C15C C166 06C2C 06C36 5900+ MVC T151V1,T151V2 006B0C D209 C15C C166 06C2C 06C36 5901+ MVC T151V1,T151V2 006B12 D209 C15C C166 06C2C 06C36 5902+ MVC T151V1,T151V2 006B18 D209 C15C C166 06C2C 06C36 5903+ MVC T151V1,T151V2 006B1E D209 C15C C166 06C2C 06C36 5904+ MVC T151V1,T151V2 006B24 D209 C15C C166 06C2C 06C36 5905+ MVC T151V1,T151V2 006B2A D209 C15C C166 06C2C 06C36 5906+ MVC T151V1,T151V2 006B30 D209 C15C C166 06C2C 06C36 5907+ MVC T151V1,T151V2 006B36 D209 C15C C166 06C2C 06C36 5908+ MVC T151V1,T151V2 006B3C D209 C15C C166 06C2C 06C36 5909+ MVC T151V1,T151V2 006B42 D209 C15C C166 06C2C 06C36 5910+ MVC T151V1,T151V2 006B48 D209 C15C C166 06C2C 06C36 5911+ MVC T151V1,T151V2 006B4E D209 C15C C166 06C2C 06C36 5912+ MVC T151V1,T151V2 006B54 D209 C15C C166 06C2C 06C36 5913+ MVC T151V1,T151V2 006B5A D209 C15C C166 06C2C 06C36 5914+ MVC T151V1,T151V2 006B60 D209 C15C C166 06C2C 06C36 5915+ MVC T151V1,T151V2 006B66 D209 C15C C166 06C2C 06C36 5916+ MVC T151V1,T151V2 006B6C D209 C15C C166 06C2C 06C36 5917+ MVC T151V1,T151V2 006B72 D209 C15C C166 06C2C 06C36 5918+ MVC T151V1,T151V2 006B78 D209 C15C C166 06C2C 06C36 5919+ MVC T151V1,T151V2 006B7E D209 C15C C166 06C2C 06C36 5920+ MVC T151V1,T151V2 006B84 D209 C15C C166 06C2C 06C36 5921+ MVC T151V1,T151V2 006B8A D209 C15C C166 06C2C 06C36 5922+ MVC T151V1,T151V2 006B90 D209 C15C C166 06C2C 06C36 5923+ MVC T151V1,T151V2 006B96 D209 C15C C166 06C2C 06C36 5924+ MVC T151V1,T151V2 006B9C D209 C15C C166 06C2C 06C36 5925+ MVC T151V1,T151V2 006BA2 D209 C15C C166 06C2C 06C36 5926+ MVC T151V1,T151V2 PAGE 110 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 006BA8 D209 C15C C166 06C2C 06C36 5927+ MVC T151V1,T151V2 006BAE D209 C15C C166 06C2C 06C36 5928+ MVC T151V1,T151V2 006BB4 D209 C15C C166 06C2C 06C36 5929+ MVC T151V1,T151V2 006BBA D209 C15C C166 06C2C 06C36 5930+ MVC T151V1,T151V2 006BC0 D209 C15C C166 06C2C 06C36 5931+ MVC T151V1,T151V2 006BC6 D209 C15C C166 06C2C 06C36 5932+ MVC T151V1,T151V2 006BCC D209 C15C C166 06C2C 06C36 5933+ MVC T151V1,T151V2 006BD2 D209 C15C C166 06C2C 06C36 5934+ MVC T151V1,T151V2 006BD8 D209 C15C C166 06C2C 06C36 5935+ MVC T151V1,T151V2 006BDE D209 C15C C166 06C2C 06C36 5936+ MVC T151V1,T151V2 006BE4 D209 C15C C166 06C2C 06C36 5937+ MVC T151V1,T151V2 006BEA D209 C15C C166 06C2C 06C36 5938+ MVC T151V1,T151V2 006BF0 D209 C15C C166 06C2C 06C36 5939+ MVC T151V1,T151V2 006BF6 D209 C15C C166 06C2C 06C36 5940+ MVC T151V1,T151V2 006BFC D209 C15C C166 06C2C 06C36 5941+ MVC T151V1,T151V2 006C02 D209 C15C C166 06C2C 06C36 5942+ MVC T151V1,T151V2 006C08 D209 C15C C166 06C2C 06C36 5943+ MVC T151V1,T151V2 006C0E D209 C15C C166 06C2C 06C36 5944+ MVC T151V1,T151V2 006C14 D209 C15C C166 06C2C 06C36 5945+ MVC T151V1,T151V2 5946+* 006C1A 06FB 5947 BCTR R15,R11 5948 TSIMRET 006C1C 58F0 C170 06C40 5949+ L R15,=A(SAVETST) R15 := current save area 006C20 58DF 0004 00004 5950+ L R13,4(R15) get old save area back 006C24 98EC D00C 0000C 5951+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006C28 07FE 5952+ BR 14 RETURN 02000000 5953 * 006C2C 5954 DS 0F 006C2C 4040404040404040 5955 T151V1 DC CL10' ' 006C36 F0F1F2F3F4F5F6F7 5956 T151V2 DC CL10'0123456789' 006C40 5957 DS 0H 5958 TSIMEND 006C40 5959+ LTORG 006C40 00000458 5960 =A(SAVETST) 06C44 5961+T151TEND EQU * 5962 * 5963 * Test 152 -- MVC m,m (15c) -------------------------------- 5964 * 5965 TSIMBEG T152,5000,50,1,C'MVC m,m (15c)' 5966+* 002844 5967+TDSCDAT CSECT 002848 5968+ DS 0D 5969+* 002848 00006C48 5970+T152TDSC DC A(T152) // TENTRY 00284C 00000184 5971+ DC A(T152TEND-T152) // TLENGTH 002850 00001388 5972+ DC F'5000' // TLRCNT 002854 00000032 5973+ DC F'50' // TIGCNT 002858 00000001 5974+ DC F'1' // TLTYPE 001170 5975+TEXT CSECT 001170 E3F1F5F2 5976+SPTR0376 DC C'T152' 00285C 5977+TDSCDAT CSECT 00285C 5978+ DS 0F 00285C 04001170 5979+ DC AL1(L'SPTR0376),AL3(SPTR0376) 001174 5980+TEXT CSECT 001174 D4E5C340946B9440 5981+SPTR0377 DC C'MVC m,m (15c)' PAGE 111 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002860 5982+TDSCDAT CSECT 002860 5983+ DS 0F 002860 0D001174 5984+ DC AL1(L'SPTR0377),AL3(SPTR0377) 5985+* 004A34 5986+TDSCTBL CSECT 04A34 5987+T152TPTR EQU * 004A34 00002848 5988+ DC A(T152TDSC) enabled test 5989+* 006C44 5990+TCODE CSECT 006C48 5991+ DS 0D ensure double word alignment for test 006C48 5992+T152 DS 0H 01650000 006C48 90EC D00C 0000C 5993+ STM 14,12,12(13) SAVE REGISTERS 02950000 006C4C 18CF 5994+ LR R12,R15 base register := entry address 06C48 5995+ USING T152,R12 declare code base register 006C4E 41B0 C01E 06C66 5996+ LA R11,T152L load loop target to R11 006C52 58F0 C180 06DC8 5997+ L R15,=A(SAVETST) R15 := current save area 006C56 50DF 0004 00004 5998+ ST R13,4(R15) set back pointer in current save area 006C5A 182D 5999+ LR R2,R13 remember callers save area 006C5C 18DF 6000+ LR R13,R15 setup current save area 006C5E 50D2 0008 00008 6001+ ST R13,8(R2) set forw pointer in callers save area 00000 6002+ USING TDSC,R1 declare TDSC base register 006C62 58F0 1008 00008 6003+ L R15,TLRCNT load local repeat count to R15 6004+* 6005 * 6006 T152L REPINS MVC,(T152V1,T152V2) repeat: MVC T152V1,T152V2 6007+* 6008+* build from sublist &ALIST a comma separated string &ARGS 6009+* 6010+* 6011+* 6012+* 6013+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6014+* this allows to transfer the repeat count from last TDSCGEN call 6015+* 6016+* 06C66 6017+T152L EQU * 6018+* 6019+* write a comment indicating what REPINS does (in case NOGEN in effect) 6020+* 6021+*,// REPINS: do 50 times: 6022+* 6023+* MNOTE requires that ' is doubled for expanded variables 6024+* thus build &MASTR as a copy of '&ARGS with ' doubled 6025+* 6026+* 6027+*,// MVC T152V1,T152V2 6028+* 6029+* finally generate code: &ICNT copies of &CODE &ARGS 6030+* 006C66 D20E C15C C16B 06DA4 06DB3 6031+ MVC T152V1,T152V2 006C6C D20E C15C C16B 06DA4 06DB3 6032+ MVC T152V1,T152V2 006C72 D20E C15C C16B 06DA4 06DB3 6033+ MVC T152V1,T152V2 006C78 D20E C15C C16B 06DA4 06DB3 6034+ MVC T152V1,T152V2 006C7E D20E C15C C16B 06DA4 06DB3 6035+ MVC T152V1,T152V2 006C84 D20E C15C C16B 06DA4 06DB3 6036+ MVC T152V1,T152V2 PAGE 112 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 006C8A D20E C15C C16B 06DA4 06DB3 6037+ MVC T152V1,T152V2 006C90 D20E C15C C16B 06DA4 06DB3 6038+ MVC T152V1,T152V2 006C96 D20E C15C C16B 06DA4 06DB3 6039+ MVC T152V1,T152V2 006C9C D20E C15C C16B 06DA4 06DB3 6040+ MVC T152V1,T152V2 006CA2 D20E C15C C16B 06DA4 06DB3 6041+ MVC T152V1,T152V2 006CA8 D20E C15C C16B 06DA4 06DB3 6042+ MVC T152V1,T152V2 006CAE D20E C15C C16B 06DA4 06DB3 6043+ MVC T152V1,T152V2 006CB4 D20E C15C C16B 06DA4 06DB3 6044+ MVC T152V1,T152V2 006CBA D20E C15C C16B 06DA4 06DB3 6045+ MVC T152V1,T152V2 006CC0 D20E C15C C16B 06DA4 06DB3 6046+ MVC T152V1,T152V2 006CC6 D20E C15C C16B 06DA4 06DB3 6047+ MVC T152V1,T152V2 006CCC D20E C15C C16B 06DA4 06DB3 6048+ MVC T152V1,T152V2 006CD2 D20E C15C C16B 06DA4 06DB3 6049+ MVC T152V1,T152V2 006CD8 D20E C15C C16B 06DA4 06DB3 6050+ MVC T152V1,T152V2 006CDE D20E C15C C16B 06DA4 06DB3 6051+ MVC T152V1,T152V2 006CE4 D20E C15C C16B 06DA4 06DB3 6052+ MVC T152V1,T152V2 006CEA D20E C15C C16B 06DA4 06DB3 6053+ MVC T152V1,T152V2 006CF0 D20E C15C C16B 06DA4 06DB3 6054+ MVC T152V1,T152V2 006CF6 D20E C15C C16B 06DA4 06DB3 6055+ MVC T152V1,T152V2 006CFC D20E C15C C16B 06DA4 06DB3 6056+ MVC T152V1,T152V2 006D02 D20E C15C C16B 06DA4 06DB3 6057+ MVC T152V1,T152V2 006D08 D20E C15C C16B 06DA4 06DB3 6058+ MVC T152V1,T152V2 006D0E D20E C15C C16B 06DA4 06DB3 6059+ MVC T152V1,T152V2 006D14 D20E C15C C16B 06DA4 06DB3 6060+ MVC T152V1,T152V2 006D1A D20E C15C C16B 06DA4 06DB3 6061+ MVC T152V1,T152V2 006D20 D20E C15C C16B 06DA4 06DB3 6062+ MVC T152V1,T152V2 006D26 D20E C15C C16B 06DA4 06DB3 6063+ MVC T152V1,T152V2 006D2C D20E C15C C16B 06DA4 06DB3 6064+ MVC T152V1,T152V2 006D32 D20E C15C C16B 06DA4 06DB3 6065+ MVC T152V1,T152V2 006D38 D20E C15C C16B 06DA4 06DB3 6066+ MVC T152V1,T152V2 006D3E D20E C15C C16B 06DA4 06DB3 6067+ MVC T152V1,T152V2 006D44 D20E C15C C16B 06DA4 06DB3 6068+ MVC T152V1,T152V2 006D4A D20E C15C C16B 06DA4 06DB3 6069+ MVC T152V1,T152V2 006D50 D20E C15C C16B 06DA4 06DB3 6070+ MVC T152V1,T152V2 006D56 D20E C15C C16B 06DA4 06DB3 6071+ MVC T152V1,T152V2 006D5C D20E C15C C16B 06DA4 06DB3 6072+ MVC T152V1,T152V2 006D62 D20E C15C C16B 06DA4 06DB3 6073+ MVC T152V1,T152V2 006D68 D20E C15C C16B 06DA4 06DB3 6074+ MVC T152V1,T152V2 006D6E D20E C15C C16B 06DA4 06DB3 6075+ MVC T152V1,T152V2 006D74 D20E C15C C16B 06DA4 06DB3 6076+ MVC T152V1,T152V2 006D7A D20E C15C C16B 06DA4 06DB3 6077+ MVC T152V1,T152V2 006D80 D20E C15C C16B 06DA4 06DB3 6078+ MVC T152V1,T152V2 006D86 D20E C15C C16B 06DA4 06DB3 6079+ MVC T152V1,T152V2 006D8C D20E C15C C16B 06DA4 06DB3 6080+ MVC T152V1,T152V2 6081+* 006D92 06FB 6082 BCTR R15,R11 6083 TSIMRET 006D94 58F0 C180 06DC8 6084+ L R15,=A(SAVETST) R15 := current save area 006D98 58DF 0004 00004 6085+ L R13,4(R15) get old save area back 006D9C 98EC D00C 0000C 6086+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006DA0 07FE 6087+ BR 14 RETURN 02000000 6088 * 006DA4 6089 DS 0F 006DA4 4040404040404040 6090 T152V1 DC CL15' ' 006DB3 F0F1F2F3F4F5F6F7 6091 T152V2 DC CL15'012345678901234' PAGE 113 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 006DC2 6092 DS 0H 6093 TSIMEND 006DC8 6094+ LTORG 006DC8 00000458 6095 =A(SAVETST) 06DCC 6096+T152TEND EQU * 6097 * 6098 * Test 153 -- MVC m,m (30c) -------------------------------- 6099 * 6100 TSIMBEG T153,5000,50,1,C'MVC m,m (30c)' 6101+* 002864 6102+TDSCDAT CSECT 002868 6103+ DS 0D 6104+* 002868 00006DD0 6105+T153TDSC DC A(T153) // TENTRY 00286C 0000019C 6106+ DC A(T153TEND-T153) // TLENGTH 002870 00001388 6107+ DC F'5000' // TLRCNT 002874 00000032 6108+ DC F'50' // TIGCNT 002878 00000001 6109+ DC F'1' // TLTYPE 001181 6110+TEXT CSECT 001181 E3F1F5F3 6111+SPTR0388 DC C'T153' 00287C 6112+TDSCDAT CSECT 00287C 6113+ DS 0F 00287C 04001181 6114+ DC AL1(L'SPTR0388),AL3(SPTR0388) 001185 6115+TEXT CSECT 001185 D4E5C340946B9440 6116+SPTR0389 DC C'MVC m,m (30c)' 002880 6117+TDSCDAT CSECT 002880 6118+ DS 0F 002880 0D001185 6119+ DC AL1(L'SPTR0389),AL3(SPTR0389) 6120+* 004A38 6121+TDSCTBL CSECT 04A38 6122+T153TPTR EQU * 004A38 00002868 6123+ DC A(T153TDSC) enabled test 6124+* 006DCC 6125+TCODE CSECT 006DD0 6126+ DS 0D ensure double word alignment for test 006DD0 6127+T153 DS 0H 01650000 006DD0 90EC D00C 0000C 6128+ STM 14,12,12(13) SAVE REGISTERS 02950000 006DD4 18CF 6129+ LR R12,R15 base register := entry address 06DD0 6130+ USING T153,R12 declare code base register 006DD6 41B0 C01E 06DEE 6131+ LA R11,T153L load loop target to R11 006DDA 58F0 C198 06F68 6132+ L R15,=A(SAVETST) R15 := current save area 006DDE 50DF 0004 00004 6133+ ST R13,4(R15) set back pointer in current save area 006DE2 182D 6134+ LR R2,R13 remember callers save area 006DE4 18DF 6135+ LR R13,R15 setup current save area 006DE6 50D2 0008 00008 6136+ ST R13,8(R2) set forw pointer in callers save area 00000 6137+ USING TDSC,R1 declare TDSC base register 006DEA 58F0 1008 00008 6138+ L R15,TLRCNT load local repeat count to R15 6139+* 6140 * 6141 T153L REPINS MVC,(T153V1,T153V2) repeat: MVC T153V1,T153V2 6142+* 6143+* build from sublist &ALIST a comma separated string &ARGS 6144+* 6145+* 6146+* PAGE 114 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 6147+* 6148+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6149+* this allows to transfer the repeat count from last TDSCGEN call 6150+* 6151+* 06DEE 6152+T153L EQU * 6153+* 6154+* write a comment indicating what REPINS does (in case NOGEN in effect) 6155+* 6156+*,// REPINS: do 50 times: 6157+* 6158+* MNOTE requires that ' is doubled for expanded variables 6159+* thus build &MASTR as a copy of '&ARGS with ' doubled 6160+* 6161+* 6162+*,// MVC T153V1,T153V2 6163+* 6164+* finally generate code: &ICNT copies of &CODE &ARGS 6165+* 006DEE D21D C15C C17A 06F2C 06F4A 6166+ MVC T153V1,T153V2 006DF4 D21D C15C C17A 06F2C 06F4A 6167+ MVC T153V1,T153V2 006DFA D21D C15C C17A 06F2C 06F4A 6168+ MVC T153V1,T153V2 006E00 D21D C15C C17A 06F2C 06F4A 6169+ MVC T153V1,T153V2 006E06 D21D C15C C17A 06F2C 06F4A 6170+ MVC T153V1,T153V2 006E0C D21D C15C C17A 06F2C 06F4A 6171+ MVC T153V1,T153V2 006E12 D21D C15C C17A 06F2C 06F4A 6172+ MVC T153V1,T153V2 006E18 D21D C15C C17A 06F2C 06F4A 6173+ MVC T153V1,T153V2 006E1E D21D C15C C17A 06F2C 06F4A 6174+ MVC T153V1,T153V2 006E24 D21D C15C C17A 06F2C 06F4A 6175+ MVC T153V1,T153V2 006E2A D21D C15C C17A 06F2C 06F4A 6176+ MVC T153V1,T153V2 006E30 D21D C15C C17A 06F2C 06F4A 6177+ MVC T153V1,T153V2 006E36 D21D C15C C17A 06F2C 06F4A 6178+ MVC T153V1,T153V2 006E3C D21D C15C C17A 06F2C 06F4A 6179+ MVC T153V1,T153V2 006E42 D21D C15C C17A 06F2C 06F4A 6180+ MVC T153V1,T153V2 006E48 D21D C15C C17A 06F2C 06F4A 6181+ MVC T153V1,T153V2 006E4E D21D C15C C17A 06F2C 06F4A 6182+ MVC T153V1,T153V2 006E54 D21D C15C C17A 06F2C 06F4A 6183+ MVC T153V1,T153V2 006E5A D21D C15C C17A 06F2C 06F4A 6184+ MVC T153V1,T153V2 006E60 D21D C15C C17A 06F2C 06F4A 6185+ MVC T153V1,T153V2 006E66 D21D C15C C17A 06F2C 06F4A 6186+ MVC T153V1,T153V2 006E6C D21D C15C C17A 06F2C 06F4A 6187+ MVC T153V1,T153V2 006E72 D21D C15C C17A 06F2C 06F4A 6188+ MVC T153V1,T153V2 006E78 D21D C15C C17A 06F2C 06F4A 6189+ MVC T153V1,T153V2 006E7E D21D C15C C17A 06F2C 06F4A 6190+ MVC T153V1,T153V2 006E84 D21D C15C C17A 06F2C 06F4A 6191+ MVC T153V1,T153V2 006E8A D21D C15C C17A 06F2C 06F4A 6192+ MVC T153V1,T153V2 006E90 D21D C15C C17A 06F2C 06F4A 6193+ MVC T153V1,T153V2 006E96 D21D C15C C17A 06F2C 06F4A 6194+ MVC T153V1,T153V2 006E9C D21D C15C C17A 06F2C 06F4A 6195+ MVC T153V1,T153V2 006EA2 D21D C15C C17A 06F2C 06F4A 6196+ MVC T153V1,T153V2 006EA8 D21D C15C C17A 06F2C 06F4A 6197+ MVC T153V1,T153V2 006EAE D21D C15C C17A 06F2C 06F4A 6198+ MVC T153V1,T153V2 006EB4 D21D C15C C17A 06F2C 06F4A 6199+ MVC T153V1,T153V2 006EBA D21D C15C C17A 06F2C 06F4A 6200+ MVC T153V1,T153V2 006EC0 D21D C15C C17A 06F2C 06F4A 6201+ MVC T153V1,T153V2 PAGE 115 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 006EC6 D21D C15C C17A 06F2C 06F4A 6202+ MVC T153V1,T153V2 006ECC D21D C15C C17A 06F2C 06F4A 6203+ MVC T153V1,T153V2 006ED2 D21D C15C C17A 06F2C 06F4A 6204+ MVC T153V1,T153V2 006ED8 D21D C15C C17A 06F2C 06F4A 6205+ MVC T153V1,T153V2 006EDE D21D C15C C17A 06F2C 06F4A 6206+ MVC T153V1,T153V2 006EE4 D21D C15C C17A 06F2C 06F4A 6207+ MVC T153V1,T153V2 006EEA D21D C15C C17A 06F2C 06F4A 6208+ MVC T153V1,T153V2 006EF0 D21D C15C C17A 06F2C 06F4A 6209+ MVC T153V1,T153V2 006EF6 D21D C15C C17A 06F2C 06F4A 6210+ MVC T153V1,T153V2 006EFC D21D C15C C17A 06F2C 06F4A 6211+ MVC T153V1,T153V2 006F02 D21D C15C C17A 06F2C 06F4A 6212+ MVC T153V1,T153V2 006F08 D21D C15C C17A 06F2C 06F4A 6213+ MVC T153V1,T153V2 006F0E D21D C15C C17A 06F2C 06F4A 6214+ MVC T153V1,T153V2 006F14 D21D C15C C17A 06F2C 06F4A 6215+ MVC T153V1,T153V2 6216+* 006F1A 06FB 6217 BCTR R15,R11 6218 TSIMRET 006F1C 58F0 C198 06F68 6219+ L R15,=A(SAVETST) R15 := current save area 006F20 58DF 0004 00004 6220+ L R13,4(R15) get old save area back 006F24 98EC D00C 0000C 6221+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 006F28 07FE 6222+ BR 14 RETURN 02000000 6223 * 006F2C 6224 DS 0F 006F2C 4040404040404040 6225 T153V1 DC CL30' ' 006F4A F0F1F2F3F4F5F6F7 6226 T153V2 DC CL30'012345678901234567890123456789' 006F68 6227 DS 0H 6228 TSIMEND 006F68 6229+ LTORG 006F68 00000458 6230 =A(SAVETST) 06F6C 6231+T153TEND EQU * 6232 * 6233 * Test 154 -- MVC m,m (100c) ------------------------------- 6234 * 6235 TSIMBEG T154,4000,50,1,C'MVC m,m (100c)' 6236+* 002884 6237+TDSCDAT CSECT 002888 6238+ DS 0D 6239+* 002888 00006F70 6240+T154TDSC DC A(T154) // TENTRY 00288C 0000022C 6241+ DC A(T154TEND-T154) // TLENGTH 002890 00000FA0 6242+ DC F'4000' // TLRCNT 002894 00000032 6243+ DC F'50' // TIGCNT 002898 00000001 6244+ DC F'1' // TLTYPE 001192 6245+TEXT CSECT 001192 E3F1F5F4 6246+SPTR0400 DC C'T154' 00289C 6247+TDSCDAT CSECT 00289C 6248+ DS 0F 00289C 04001192 6249+ DC AL1(L'SPTR0400),AL3(SPTR0400) 001196 6250+TEXT CSECT 001196 D4E5C340946B9440 6251+SPTR0401 DC C'MVC m,m (100c)' 0028A0 6252+TDSCDAT CSECT 0028A0 6253+ DS 0F 0028A0 0E001196 6254+ DC AL1(L'SPTR0401),AL3(SPTR0401) 6255+* 004A3C 6256+TDSCTBL CSECT PAGE 116 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04A3C 6257+T154TPTR EQU * 004A3C 00002888 6258+ DC A(T154TDSC) enabled test 6259+* 006F6C 6260+TCODE CSECT 006F70 6261+ DS 0D ensure double word alignment for test 006F70 6262+T154 DS 0H 01650000 006F70 90EC D00C 0000C 6263+ STM 14,12,12(13) SAVE REGISTERS 02950000 006F74 18CF 6264+ LR R12,R15 base register := entry address 06F70 6265+ USING T154,R12 declare code base register 006F76 41B0 C01E 06F8E 6266+ LA R11,T154L load loop target to R11 006F7A 58F0 C228 07198 6267+ L R15,=A(SAVETST) R15 := current save area 006F7E 50DF 0004 00004 6268+ ST R13,4(R15) set back pointer in current save area 006F82 182D 6269+ LR R2,R13 remember callers save area 006F84 18DF 6270+ LR R13,R15 setup current save area 006F86 50D2 0008 00008 6271+ ST R13,8(R2) set forw pointer in callers save area 00000 6272+ USING TDSC,R1 declare TDSC base register 006F8A 58F0 1008 00008 6273+ L R15,TLRCNT load local repeat count to R15 6274+* 6275 * 6276 T154L REPINS MVC,(T154V1,T154V2) repeat: MVC T154V1,T154V2 6277+* 6278+* build from sublist &ALIST a comma separated string &ARGS 6279+* 6280+* 6281+* 6282+* 6283+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6284+* this allows to transfer the repeat count from last TDSCGEN call 6285+* 6286+* 06F8E 6287+T154L EQU * 6288+* 6289+* write a comment indicating what REPINS does (in case NOGEN in effect) 6290+* 6291+*,// REPINS: do 50 times: 6292+* 6293+* MNOTE requires that ' is doubled for expanded variables 6294+* thus build &MASTR as a copy of '&ARGS with ' doubled 6295+* 6296+* 6297+*,// MVC T154V1,T154V2 6298+* 6299+* finally generate code: &ICNT copies of &CODE &ARGS 6300+* 006F8E D263 C15C C1C0 070CC 07130 6301+ MVC T154V1,T154V2 006F94 D263 C15C C1C0 070CC 07130 6302+ MVC T154V1,T154V2 006F9A D263 C15C C1C0 070CC 07130 6303+ MVC T154V1,T154V2 006FA0 D263 C15C C1C0 070CC 07130 6304+ MVC T154V1,T154V2 006FA6 D263 C15C C1C0 070CC 07130 6305+ MVC T154V1,T154V2 006FAC D263 C15C C1C0 070CC 07130 6306+ MVC T154V1,T154V2 006FB2 D263 C15C C1C0 070CC 07130 6307+ MVC T154V1,T154V2 006FB8 D263 C15C C1C0 070CC 07130 6308+ MVC T154V1,T154V2 006FBE D263 C15C C1C0 070CC 07130 6309+ MVC T154V1,T154V2 006FC4 D263 C15C C1C0 070CC 07130 6310+ MVC T154V1,T154V2 006FCA D263 C15C C1C0 070CC 07130 6311+ MVC T154V1,T154V2 PAGE 117 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 006FD0 D263 C15C C1C0 070CC 07130 6312+ MVC T154V1,T154V2 006FD6 D263 C15C C1C0 070CC 07130 6313+ MVC T154V1,T154V2 006FDC D263 C15C C1C0 070CC 07130 6314+ MVC T154V1,T154V2 006FE2 D263 C15C C1C0 070CC 07130 6315+ MVC T154V1,T154V2 006FE8 D263 C15C C1C0 070CC 07130 6316+ MVC T154V1,T154V2 006FEE D263 C15C C1C0 070CC 07130 6317+ MVC T154V1,T154V2 006FF4 D263 C15C C1C0 070CC 07130 6318+ MVC T154V1,T154V2 006FFA D263 C15C C1C0 070CC 07130 6319+ MVC T154V1,T154V2 007000 D263 C15C C1C0 070CC 07130 6320+ MVC T154V1,T154V2 007006 D263 C15C C1C0 070CC 07130 6321+ MVC T154V1,T154V2 00700C D263 C15C C1C0 070CC 07130 6322+ MVC T154V1,T154V2 007012 D263 C15C C1C0 070CC 07130 6323+ MVC T154V1,T154V2 007018 D263 C15C C1C0 070CC 07130 6324+ MVC T154V1,T154V2 00701E D263 C15C C1C0 070CC 07130 6325+ MVC T154V1,T154V2 007024 D263 C15C C1C0 070CC 07130 6326+ MVC T154V1,T154V2 00702A D263 C15C C1C0 070CC 07130 6327+ MVC T154V1,T154V2 007030 D263 C15C C1C0 070CC 07130 6328+ MVC T154V1,T154V2 007036 D263 C15C C1C0 070CC 07130 6329+ MVC T154V1,T154V2 00703C D263 C15C C1C0 070CC 07130 6330+ MVC T154V1,T154V2 007042 D263 C15C C1C0 070CC 07130 6331+ MVC T154V1,T154V2 007048 D263 C15C C1C0 070CC 07130 6332+ MVC T154V1,T154V2 00704E D263 C15C C1C0 070CC 07130 6333+ MVC T154V1,T154V2 007054 D263 C15C C1C0 070CC 07130 6334+ MVC T154V1,T154V2 00705A D263 C15C C1C0 070CC 07130 6335+ MVC T154V1,T154V2 007060 D263 C15C C1C0 070CC 07130 6336+ MVC T154V1,T154V2 007066 D263 C15C C1C0 070CC 07130 6337+ MVC T154V1,T154V2 00706C D263 C15C C1C0 070CC 07130 6338+ MVC T154V1,T154V2 007072 D263 C15C C1C0 070CC 07130 6339+ MVC T154V1,T154V2 007078 D263 C15C C1C0 070CC 07130 6340+ MVC T154V1,T154V2 00707E D263 C15C C1C0 070CC 07130 6341+ MVC T154V1,T154V2 007084 D263 C15C C1C0 070CC 07130 6342+ MVC T154V1,T154V2 00708A D263 C15C C1C0 070CC 07130 6343+ MVC T154V1,T154V2 007090 D263 C15C C1C0 070CC 07130 6344+ MVC T154V1,T154V2 007096 D263 C15C C1C0 070CC 07130 6345+ MVC T154V1,T154V2 00709C D263 C15C C1C0 070CC 07130 6346+ MVC T154V1,T154V2 0070A2 D263 C15C C1C0 070CC 07130 6347+ MVC T154V1,T154V2 0070A8 D263 C15C C1C0 070CC 07130 6348+ MVC T154V1,T154V2 0070AE D263 C15C C1C0 070CC 07130 6349+ MVC T154V1,T154V2 0070B4 D263 C15C C1C0 070CC 07130 6350+ MVC T154V1,T154V2 6351+* 0070BA 06FB 6352 BCTR R15,R11 6353 TSIMRET 0070BC 58F0 C228 07198 6354+ L R15,=A(SAVETST) R15 := current save area 0070C0 58DF 0004 00004 6355+ L R13,4(R15) get old save area back 0070C4 98EC D00C 0000C 6356+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0070C8 07FE 6357+ BR 14 RETURN 02000000 6358 * 0070CC 6359 DS 0F 0070CC 4040404040404040 6360 T154V1 DC CL100' ' 007130 F0F1F2F3F4F5F6F7 6361 T154V2 DC CL100'0123456789' 6362 TSIMEND 007198 6363+ LTORG 007198 00000458 6364 =A(SAVETST) 0719C 6365+T154TEND EQU * 6366 * PAGE 118 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 6367 * Test 155 -- MVC m,m (250c) ------------------------------- 6368 * 6369 TSIMBEG T155,7500,20,1,C'MVC m,m (250c)' 6370+* 0028A4 6371+TDSCDAT CSECT 0028A8 6372+ DS 0D 6373+* 0028A8 000071A0 6374+T155TDSC DC A(T155) // TENTRY 0028AC 000002A4 6375+ DC A(T155TEND-T155) // TLENGTH 0028B0 00001D4C 6376+ DC F'7500' // TLRCNT 0028B4 00000014 6377+ DC F'20' // TIGCNT 0028B8 00000001 6378+ DC F'1' // TLTYPE 0011A4 6379+TEXT CSECT 0011A4 E3F1F5F5 6380+SPTR0412 DC C'T155' 0028BC 6381+TDSCDAT CSECT 0028BC 6382+ DS 0F 0028BC 040011A4 6383+ DC AL1(L'SPTR0412),AL3(SPTR0412) 0011A8 6384+TEXT CSECT 0011A8 D4E5C340946B9440 6385+SPTR0413 DC C'MVC m,m (250c)' 0028C0 6386+TDSCDAT CSECT 0028C0 6387+ DS 0F 0028C0 0E0011A8 6388+ DC AL1(L'SPTR0413),AL3(SPTR0413) 6389+* 004A40 6390+TDSCTBL CSECT 04A40 6391+T155TPTR EQU * 004A40 000028A8 6392+ DC A(T155TDSC) enabled test 6393+* 00719C 6394+TCODE CSECT 0071A0 6395+ DS 0D ensure double word alignment for test 0071A0 6396+T155 DS 0H 01650000 0071A0 90EC D00C 0000C 6397+ STM 14,12,12(13) SAVE REGISTERS 02950000 0071A4 18CF 6398+ LR R12,R15 base register := entry address 071A0 6399+ USING T155,R12 declare code base register 0071A6 41B0 C01E 071BE 6400+ LA R11,T155L load loop target to R11 0071AA 58F0 C2A0 07440 6401+ L R15,=A(SAVETST) R15 := current save area 0071AE 50DF 0004 00004 6402+ ST R13,4(R15) set back pointer in current save area 0071B2 182D 6403+ LR R2,R13 remember callers save area 0071B4 18DF 6404+ LR R13,R15 setup current save area 0071B6 50D2 0008 00008 6405+ ST R13,8(R2) set forw pointer in callers save area 00000 6406+ USING TDSC,R1 declare TDSC base register 0071BA 58F0 1008 00008 6407+ L R15,TLRCNT load local repeat count to R15 6408+* 6409 * 6410 T155L REPINS MVC,(T155V1,T155V2) repeat: MVC T155V1,T155V2 6411+* 6412+* build from sublist &ALIST a comma separated string &ARGS 6413+* 6414+* 6415+* 6416+* 6417+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6418+* this allows to transfer the repeat count from last TDSCGEN call 6419+* 6420+* 071BE 6421+T155L EQU * PAGE 119 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 6422+* 6423+* write a comment indicating what REPINS does (in case NOGEN in effect) 6424+* 6425+*,// REPINS: do 20 times: 6426+* 6427+* MNOTE requires that ' is doubled for expanded variables 6428+* thus build &MASTR as a copy of '&ARGS with ' doubled 6429+* 6430+* 6431+*,// MVC T155V1,T155V2 6432+* 6433+* finally generate code: &ICNT copies of &CODE &ARGS 6434+* 0071BE D2F9 C0A8 C1A2 07248 07342 6435+ MVC T155V1,T155V2 0071C4 D2F9 C0A8 C1A2 07248 07342 6436+ MVC T155V1,T155V2 0071CA D2F9 C0A8 C1A2 07248 07342 6437+ MVC T155V1,T155V2 0071D0 D2F9 C0A8 C1A2 07248 07342 6438+ MVC T155V1,T155V2 0071D6 D2F9 C0A8 C1A2 07248 07342 6439+ MVC T155V1,T155V2 0071DC D2F9 C0A8 C1A2 07248 07342 6440+ MVC T155V1,T155V2 0071E2 D2F9 C0A8 C1A2 07248 07342 6441+ MVC T155V1,T155V2 0071E8 D2F9 C0A8 C1A2 07248 07342 6442+ MVC T155V1,T155V2 0071EE D2F9 C0A8 C1A2 07248 07342 6443+ MVC T155V1,T155V2 0071F4 D2F9 C0A8 C1A2 07248 07342 6444+ MVC T155V1,T155V2 0071FA D2F9 C0A8 C1A2 07248 07342 6445+ MVC T155V1,T155V2 007200 D2F9 C0A8 C1A2 07248 07342 6446+ MVC T155V1,T155V2 007206 D2F9 C0A8 C1A2 07248 07342 6447+ MVC T155V1,T155V2 00720C D2F9 C0A8 C1A2 07248 07342 6448+ MVC T155V1,T155V2 007212 D2F9 C0A8 C1A2 07248 07342 6449+ MVC T155V1,T155V2 007218 D2F9 C0A8 C1A2 07248 07342 6450+ MVC T155V1,T155V2 00721E D2F9 C0A8 C1A2 07248 07342 6451+ MVC T155V1,T155V2 007224 D2F9 C0A8 C1A2 07248 07342 6452+ MVC T155V1,T155V2 00722A D2F9 C0A8 C1A2 07248 07342 6453+ MVC T155V1,T155V2 007230 D2F9 C0A8 C1A2 07248 07342 6454+ MVC T155V1,T155V2 6455+* 007236 06FB 6456 BCTR R15,R11 6457 TSIMRET 007238 58F0 C2A0 07440 6458+ L R15,=A(SAVETST) R15 := current save area 00723C 58DF 0004 00004 6459+ L R13,4(R15) get old save area back 007240 98EC D00C 0000C 6460+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007244 07FE 6461+ BR 14 RETURN 02000000 6462 * 007248 6463 DS 0F 007248 4040404040404040 6464 T155V1 DC CL250' ' 007342 F0F1F2F3F4F5F6F7 6465 T155V2 DC CL250'0123456789' 6466 TSIMEND 007440 6467+ LTORG 007440 00000458 6468 =A(SAVETST) 07444 6469+T155TEND EQU * 6470 * 6471 * Test 156 -- MVC m,m (250c,over1) ------------------------- 6472 * test byte propagation usage of MVC 6473 * destination offset by + 1 byte to source 6474 * 250 bytes touched, MVC length determined by destination 6475 * 6476 TSIMBEG T156,700,20,1,C'MVC m,m (250c,over1)' PAGE 120 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 6477+* 0028C4 6478+TDSCDAT CSECT 0028C8 6479+ DS 0D 6480+* 0028C8 00007448 6481+T156TDSC DC A(T156) // TENTRY 0028CC 000001AC 6482+ DC A(T156TEND-T156) // TLENGTH 0028D0 000002BC 6483+ DC F'700' // TLRCNT 0028D4 00000014 6484+ DC F'20' // TIGCNT 0028D8 00000001 6485+ DC F'1' // TLTYPE 0011B6 6486+TEXT CSECT 0011B6 E3F1F5F6 6487+SPTR0424 DC C'T156' 0028DC 6488+TDSCDAT CSECT 0028DC 6489+ DS 0F 0028DC 040011B6 6490+ DC AL1(L'SPTR0424),AL3(SPTR0424) 0011BA 6491+TEXT CSECT 0011BA D4E5C340946B9440 6492+SPTR0425 DC C'MVC m,m (250c,over1)' 0028E0 6493+TDSCDAT CSECT 0028E0 6494+ DS 0F 0028E0 140011BA 6495+ DC AL1(L'SPTR0425),AL3(SPTR0425) 6496+* 004A44 6497+TDSCTBL CSECT 04A44 6498+T156TPTR EQU * 004A44 000028C8 6499+ DC A(T156TDSC) enabled test 6500+* 007444 6501+TCODE CSECT 007448 6502+ DS 0D ensure double word alignment for test 007448 6503+T156 DS 0H 01650000 007448 90EC D00C 0000C 6504+ STM 14,12,12(13) SAVE REGISTERS 02950000 00744C 18CF 6505+ LR R12,R15 base register := entry address 07448 6506+ USING T156,R12 declare code base register 00744E 41B0 C01E 07466 6507+ LA R11,T156L load loop target to R11 007452 58F0 C1A8 075F0 6508+ L R15,=A(SAVETST) R15 := current save area 007456 50DF 0004 00004 6509+ ST R13,4(R15) set back pointer in current save area 00745A 182D 6510+ LR R2,R13 remember callers save area 00745C 18DF 6511+ LR R13,R15 setup current save area 00745E 50D2 0008 00008 6512+ ST R13,8(R2) set forw pointer in callers save area 00000 6513+ USING TDSC,R1 declare TDSC base register 007462 58F0 1008 00008 6514+ L R15,TLRCNT load local repeat count to R15 6515+* 6516 * 6517 T156L REPINS MVC,(T156V2,T156V1) repeat: MVC T156V2,T156V1 6518+* 6519+* build from sublist &ALIST a comma separated string &ARGS 6520+* 6521+* 6522+* 6523+* 6524+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6525+* this allows to transfer the repeat count from last TDSCGEN call 6526+* 6527+* 07466 6528+T156L EQU * 6529+* 6530+* write a comment indicating what REPINS does (in case NOGEN in effect) 6531+* PAGE 121 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 6532+*,// REPINS: do 20 times: 6533+* 6534+* MNOTE requires that ' is doubled for expanded variables 6535+* thus build &MASTR as a copy of '&ARGS with ' doubled 6536+* 6537+* 6538+*,// MVC T156V2,T156V1 6539+* 6540+* finally generate code: &ICNT copies of &CODE &ARGS 6541+* 007466 D2F9 C0A9 C0A8 074F1 074F0 6542+ MVC T156V2,T156V1 00746C D2F9 C0A9 C0A8 074F1 074F0 6543+ MVC T156V2,T156V1 007472 D2F9 C0A9 C0A8 074F1 074F0 6544+ MVC T156V2,T156V1 007478 D2F9 C0A9 C0A8 074F1 074F0 6545+ MVC T156V2,T156V1 00747E D2F9 C0A9 C0A8 074F1 074F0 6546+ MVC T156V2,T156V1 007484 D2F9 C0A9 C0A8 074F1 074F0 6547+ MVC T156V2,T156V1 00748A D2F9 C0A9 C0A8 074F1 074F0 6548+ MVC T156V2,T156V1 007490 D2F9 C0A9 C0A8 074F1 074F0 6549+ MVC T156V2,T156V1 007496 D2F9 C0A9 C0A8 074F1 074F0 6550+ MVC T156V2,T156V1 00749C D2F9 C0A9 C0A8 074F1 074F0 6551+ MVC T156V2,T156V1 0074A2 D2F9 C0A9 C0A8 074F1 074F0 6552+ MVC T156V2,T156V1 0074A8 D2F9 C0A9 C0A8 074F1 074F0 6553+ MVC T156V2,T156V1 0074AE D2F9 C0A9 C0A8 074F1 074F0 6554+ MVC T156V2,T156V1 0074B4 D2F9 C0A9 C0A8 074F1 074F0 6555+ MVC T156V2,T156V1 0074BA D2F9 C0A9 C0A8 074F1 074F0 6556+ MVC T156V2,T156V1 0074C0 D2F9 C0A9 C0A8 074F1 074F0 6557+ MVC T156V2,T156V1 0074C6 D2F9 C0A9 C0A8 074F1 074F0 6558+ MVC T156V2,T156V1 0074CC D2F9 C0A9 C0A8 074F1 074F0 6559+ MVC T156V2,T156V1 0074D2 D2F9 C0A9 C0A8 074F1 074F0 6560+ MVC T156V2,T156V1 0074D8 D2F9 C0A9 C0A8 074F1 074F0 6561+ MVC T156V2,T156V1 6562+* 0074DE 06FB 6563 BCTR R15,R11 6564 TSIMRET 0074E0 58F0 C1A8 075F0 6565+ L R15,=A(SAVETST) R15 := current save area 0074E4 58DF 0004 00004 6566+ L R13,4(R15) get old save area back 0074E8 98EC D00C 0000C 6567+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0074EC 07FE 6568+ BR 14 RETURN 02000000 6569 * 0074F0 6570 DS 0F 0074F0 40 6571 T156V1 DC C' ' byte to propagate 0074F1 F0F1F2F3F4F5F6F7 6572 T156V2 DC CL250'0123456789' into this target buffer 6573 TSIMEND 0075F0 6574+ LTORG 0075F0 00000458 6575 =A(SAVETST) 075F4 6576+T156TEND EQU * 6577 * 6578 * Test 157 -- MVC m,m (250c,over2) ------------------------- 6579 * test buffer shift left usage of MVC 6580 * destination offset by -24 byte to source 6581 * 6582 TSIMBEG T157,7500,20,1,C'MVC m,m (250c,over2)' 6583+* 0028E4 6584+TDSCDAT CSECT 0028E8 6585+ DS 0D 6586+* PAGE 122 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0028E8 000075F8 6587+T157TDSC DC A(T157) // TENTRY 0028EC 000001C4 6588+ DC A(T157TEND-T157) // TLENGTH 0028F0 00001D4C 6589+ DC F'7500' // TLRCNT 0028F4 00000014 6590+ DC F'20' // TIGCNT 0028F8 00000001 6591+ DC F'1' // TLTYPE 0011CE 6592+TEXT CSECT 0011CE E3F1F5F7 6593+SPTR0436 DC C'T157' 0028FC 6594+TDSCDAT CSECT 0028FC 6595+ DS 0F 0028FC 040011CE 6596+ DC AL1(L'SPTR0436),AL3(SPTR0436) 0011D2 6597+TEXT CSECT 0011D2 D4E5C340946B9440 6598+SPTR0437 DC C'MVC m,m (250c,over2)' 002900 6599+TDSCDAT CSECT 002900 6600+ DS 0F 002900 140011D2 6601+ DC AL1(L'SPTR0437),AL3(SPTR0437) 6602+* 004A48 6603+TDSCTBL CSECT 04A48 6604+T157TPTR EQU * 004A48 000028E8 6605+ DC A(T157TDSC) enabled test 6606+* 0075F4 6607+TCODE CSECT 0075F8 6608+ DS 0D ensure double word alignment for test 0075F8 6609+T157 DS 0H 01650000 0075F8 90EC D00C 0000C 6610+ STM 14,12,12(13) SAVE REGISTERS 02950000 0075FC 18CF 6611+ LR R12,R15 base register := entry address 075F8 6612+ USING T157,R12 declare code base register 0075FE 41B0 C01E 07616 6613+ LA R11,T157L load loop target to R11 007602 58F0 C1C0 077B8 6614+ L R15,=A(SAVETST) R15 := current save area 007606 50DF 0004 00004 6615+ ST R13,4(R15) set back pointer in current save area 00760A 182D 6616+ LR R2,R13 remember callers save area 00760C 18DF 6617+ LR R13,R15 setup current save area 00760E 50D2 0008 00008 6618+ ST R13,8(R2) set forw pointer in callers save area 00000 6619+ USING TDSC,R1 declare TDSC base register 007612 58F0 1008 00008 6620+ L R15,TLRCNT load local repeat count to R15 6621+* 6622 * 6623 T157L REPINS MVC,(T157V1(250),T157V2) 6624+* 6625+* build from sublist &ALIST a comma separated string &ARGS 6626+* 6627+* 6628+* 6629+* 6630+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6631+* this allows to transfer the repeat count from last TDSCGEN call 6632+* 6633+* 07616 6634+T157L EQU * 6635+* 6636+* write a comment indicating what REPINS does (in case NOGEN in effect) 6637+* 6638+*,// REPINS: do 20 times: 6639+* 6640+* MNOTE requires that ' is doubled for expanded variables 6641+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 123 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 6642+* 6643+* 6644+*,// MVC T157V1(250),T157V2 6645+* 6646+* finally generate code: &ICNT copies of &CODE &ARGS 6647+* 007616 D2F9 C0A8 C0C0 076A0 076B8 6648+ MVC T157V1(250),T157V2 00761C D2F9 C0A8 C0C0 076A0 076B8 6649+ MVC T157V1(250),T157V2 007622 D2F9 C0A8 C0C0 076A0 076B8 6650+ MVC T157V1(250),T157V2 007628 D2F9 C0A8 C0C0 076A0 076B8 6651+ MVC T157V1(250),T157V2 00762E D2F9 C0A8 C0C0 076A0 076B8 6652+ MVC T157V1(250),T157V2 007634 D2F9 C0A8 C0C0 076A0 076B8 6653+ MVC T157V1(250),T157V2 00763A D2F9 C0A8 C0C0 076A0 076B8 6654+ MVC T157V1(250),T157V2 007640 D2F9 C0A8 C0C0 076A0 076B8 6655+ MVC T157V1(250),T157V2 007646 D2F9 C0A8 C0C0 076A0 076B8 6656+ MVC T157V1(250),T157V2 00764C D2F9 C0A8 C0C0 076A0 076B8 6657+ MVC T157V1(250),T157V2 007652 D2F9 C0A8 C0C0 076A0 076B8 6658+ MVC T157V1(250),T157V2 007658 D2F9 C0A8 C0C0 076A0 076B8 6659+ MVC T157V1(250),T157V2 00765E D2F9 C0A8 C0C0 076A0 076B8 6660+ MVC T157V1(250),T157V2 007664 D2F9 C0A8 C0C0 076A0 076B8 6661+ MVC T157V1(250),T157V2 00766A D2F9 C0A8 C0C0 076A0 076B8 6662+ MVC T157V1(250),T157V2 007670 D2F9 C0A8 C0C0 076A0 076B8 6663+ MVC T157V1(250),T157V2 007676 D2F9 C0A8 C0C0 076A0 076B8 6664+ MVC T157V1(250),T157V2 00767C D2F9 C0A8 C0C0 076A0 076B8 6665+ MVC T157V1(250),T157V2 007682 D2F9 C0A8 C0C0 076A0 076B8 6666+ MVC T157V1(250),T157V2 007688 D2F9 C0A8 C0C0 076A0 076B8 6667+ MVC T157V1(250),T157V2 6668+* 00768E 06FB 6669 BCTR R15,R11 6670 TSIMRET 007690 58F0 C1C0 077B8 6671+ L R15,=A(SAVETST) R15 := current save area 007694 58DF 0004 00004 6672+ L R13,4(R15) get old save area back 007698 98EC D00C 0000C 6673+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00769C 07FE 6674+ BR 14 RETURN 02000000 6675 * 0076A0 6676 DS 0F 0076A0 6677 T157V1 DS 24C target 0076B8 F0F1F3F3F4F5F6F7 6678 T157V2 DC CL250'0133456789' source (1/10th overlap) 6679 TSIMEND 0077B8 6680+ LTORG 0077B8 00000458 6681 =A(SAVETST) 077BC 6682+T157TEND EQU * 6683 * 6684 * Test 16x -- MVI,MVN,MVZ,MVCIN ============================ 6685 * 6686 * Test 160 -- MVI m,i -------------------------------------- 6687 * 6688 TSIMBEG T160,6000,100,1,C'MVI m,i' 6689+* 002904 6690+TDSCDAT CSECT 002908 6691+ DS 0D 6692+* 002908 000077C0 6693+T160TDSC DC A(T160) // TENTRY 00290C 000001C4 6694+ DC A(T160TEND-T160) // TLENGTH 002910 00001770 6695+ DC F'6000' // TLRCNT 002914 00000064 6696+ DC F'100' // TIGCNT PAGE 124 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002918 00000001 6697+ DC F'1' // TLTYPE 0011E6 6698+TEXT CSECT 0011E6 E3F1F6F0 6699+SPTR0448 DC C'T160' 00291C 6700+TDSCDAT CSECT 00291C 6701+ DS 0F 00291C 040011E6 6702+ DC AL1(L'SPTR0448),AL3(SPTR0448) 0011EA 6703+TEXT CSECT 0011EA D4E5C940946B89 6704+SPTR0449 DC C'MVI m,i' 002920 6705+TDSCDAT CSECT 002920 6706+ DS 0F 002920 070011EA 6707+ DC AL1(L'SPTR0449),AL3(SPTR0449) 6708+* 004A4C 6709+TDSCTBL CSECT 04A4C 6710+T160TPTR EQU * 004A4C 00002908 6711+ DC A(T160TDSC) enabled test 6712+* 0077BC 6713+TCODE CSECT 0077C0 6714+ DS 0D ensure double word alignment for test 0077C0 6715+T160 DS 0H 01650000 0077C0 90EC D00C 0000C 6716+ STM 14,12,12(13) SAVE REGISTERS 02950000 0077C4 18CF 6717+ LR R12,R15 base register := entry address 077C0 6718+ USING T160,R12 declare code base register 0077C6 41B0 C01E 077DE 6719+ LA R11,T160L load loop target to R11 0077CA 58F0 C1C0 07980 6720+ L R15,=A(SAVETST) R15 := current save area 0077CE 50DF 0004 00004 6721+ ST R13,4(R15) set back pointer in current save area 0077D2 182D 6722+ LR R2,R13 remember callers save area 0077D4 18DF 6723+ LR R13,R15 setup current save area 0077D6 50D2 0008 00008 6724+ ST R13,8(R2) set forw pointer in callers save area 00000 6725+ USING TDSC,R1 declare TDSC base register 0077DA 58F0 1008 00008 6726+ L R15,TLRCNT load local repeat count to R15 6727+* 6728 * 6729 T160L REPINS MVI,(T160V1,C'x') repeat: MVI T160V1,C'x' 6730+* 6731+* build from sublist &ALIST a comma separated string &ARGS 6732+* 6733+* 6734+* 6735+* 6736+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6737+* this allows to transfer the repeat count from last TDSCGEN call 6738+* 6739+* 077DE 6740+T160L EQU * 6741+* 6742+* write a comment indicating what REPINS does (in case NOGEN in effect) 6743+* 6744+*,// REPINS: do 100 times: 6745+* 6746+* MNOTE requires that ' is doubled for expanded variables 6747+* thus build &MASTR as a copy of '&ARGS with ' doubled 6748+* 6749+* 6750+*,// MVI T160V1,C'x' 6751+* PAGE 125 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 6752+* finally generate code: &ICNT copies of &CODE &ARGS 6753+* 0077DE 92A7 C1BE 0797E 6754+ MVI T160V1,C'x' 0077E2 92A7 C1BE 0797E 6755+ MVI T160V1,C'x' 0077E6 92A7 C1BE 0797E 6756+ MVI T160V1,C'x' 0077EA 92A7 C1BE 0797E 6757+ MVI T160V1,C'x' 0077EE 92A7 C1BE 0797E 6758+ MVI T160V1,C'x' 0077F2 92A7 C1BE 0797E 6759+ MVI T160V1,C'x' 0077F6 92A7 C1BE 0797E 6760+ MVI T160V1,C'x' 0077FA 92A7 C1BE 0797E 6761+ MVI T160V1,C'x' 0077FE 92A7 C1BE 0797E 6762+ MVI T160V1,C'x' 007802 92A7 C1BE 0797E 6763+ MVI T160V1,C'x' 007806 92A7 C1BE 0797E 6764+ MVI T160V1,C'x' 00780A 92A7 C1BE 0797E 6765+ MVI T160V1,C'x' 00780E 92A7 C1BE 0797E 6766+ MVI T160V1,C'x' 007812 92A7 C1BE 0797E 6767+ MVI T160V1,C'x' 007816 92A7 C1BE 0797E 6768+ MVI T160V1,C'x' 00781A 92A7 C1BE 0797E 6769+ MVI T160V1,C'x' 00781E 92A7 C1BE 0797E 6770+ MVI T160V1,C'x' 007822 92A7 C1BE 0797E 6771+ MVI T160V1,C'x' 007826 92A7 C1BE 0797E 6772+ MVI T160V1,C'x' 00782A 92A7 C1BE 0797E 6773+ MVI T160V1,C'x' 00782E 92A7 C1BE 0797E 6774+ MVI T160V1,C'x' 007832 92A7 C1BE 0797E 6775+ MVI T160V1,C'x' 007836 92A7 C1BE 0797E 6776+ MVI T160V1,C'x' 00783A 92A7 C1BE 0797E 6777+ MVI T160V1,C'x' 00783E 92A7 C1BE 0797E 6778+ MVI T160V1,C'x' 007842 92A7 C1BE 0797E 6779+ MVI T160V1,C'x' 007846 92A7 C1BE 0797E 6780+ MVI T160V1,C'x' 00784A 92A7 C1BE 0797E 6781+ MVI T160V1,C'x' 00784E 92A7 C1BE 0797E 6782+ MVI T160V1,C'x' 007852 92A7 C1BE 0797E 6783+ MVI T160V1,C'x' 007856 92A7 C1BE 0797E 6784+ MVI T160V1,C'x' 00785A 92A7 C1BE 0797E 6785+ MVI T160V1,C'x' 00785E 92A7 C1BE 0797E 6786+ MVI T160V1,C'x' 007862 92A7 C1BE 0797E 6787+ MVI T160V1,C'x' 007866 92A7 C1BE 0797E 6788+ MVI T160V1,C'x' 00786A 92A7 C1BE 0797E 6789+ MVI T160V1,C'x' 00786E 92A7 C1BE 0797E 6790+ MVI T160V1,C'x' 007872 92A7 C1BE 0797E 6791+ MVI T160V1,C'x' 007876 92A7 C1BE 0797E 6792+ MVI T160V1,C'x' 00787A 92A7 C1BE 0797E 6793+ MVI T160V1,C'x' 00787E 92A7 C1BE 0797E 6794+ MVI T160V1,C'x' 007882 92A7 C1BE 0797E 6795+ MVI T160V1,C'x' 007886 92A7 C1BE 0797E 6796+ MVI T160V1,C'x' 00788A 92A7 C1BE 0797E 6797+ MVI T160V1,C'x' 00788E 92A7 C1BE 0797E 6798+ MVI T160V1,C'x' 007892 92A7 C1BE 0797E 6799+ MVI T160V1,C'x' 007896 92A7 C1BE 0797E 6800+ MVI T160V1,C'x' 00789A 92A7 C1BE 0797E 6801+ MVI T160V1,C'x' 00789E 92A7 C1BE 0797E 6802+ MVI T160V1,C'x' 0078A2 92A7 C1BE 0797E 6803+ MVI T160V1,C'x' 0078A6 92A7 C1BE 0797E 6804+ MVI T160V1,C'x' 0078AA 92A7 C1BE 0797E 6805+ MVI T160V1,C'x' 0078AE 92A7 C1BE 0797E 6806+ MVI T160V1,C'x' PAGE 126 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0078B2 92A7 C1BE 0797E 6807+ MVI T160V1,C'x' 0078B6 92A7 C1BE 0797E 6808+ MVI T160V1,C'x' 0078BA 92A7 C1BE 0797E 6809+ MVI T160V1,C'x' 0078BE 92A7 C1BE 0797E 6810+ MVI T160V1,C'x' 0078C2 92A7 C1BE 0797E 6811+ MVI T160V1,C'x' 0078C6 92A7 C1BE 0797E 6812+ MVI T160V1,C'x' 0078CA 92A7 C1BE 0797E 6813+ MVI T160V1,C'x' 0078CE 92A7 C1BE 0797E 6814+ MVI T160V1,C'x' 0078D2 92A7 C1BE 0797E 6815+ MVI T160V1,C'x' 0078D6 92A7 C1BE 0797E 6816+ MVI T160V1,C'x' 0078DA 92A7 C1BE 0797E 6817+ MVI T160V1,C'x' 0078DE 92A7 C1BE 0797E 6818+ MVI T160V1,C'x' 0078E2 92A7 C1BE 0797E 6819+ MVI T160V1,C'x' 0078E6 92A7 C1BE 0797E 6820+ MVI T160V1,C'x' 0078EA 92A7 C1BE 0797E 6821+ MVI T160V1,C'x' 0078EE 92A7 C1BE 0797E 6822+ MVI T160V1,C'x' 0078F2 92A7 C1BE 0797E 6823+ MVI T160V1,C'x' 0078F6 92A7 C1BE 0797E 6824+ MVI T160V1,C'x' 0078FA 92A7 C1BE 0797E 6825+ MVI T160V1,C'x' 0078FE 92A7 C1BE 0797E 6826+ MVI T160V1,C'x' 007902 92A7 C1BE 0797E 6827+ MVI T160V1,C'x' 007906 92A7 C1BE 0797E 6828+ MVI T160V1,C'x' 00790A 92A7 C1BE 0797E 6829+ MVI T160V1,C'x' 00790E 92A7 C1BE 0797E 6830+ MVI T160V1,C'x' 007912 92A7 C1BE 0797E 6831+ MVI T160V1,C'x' 007916 92A7 C1BE 0797E 6832+ MVI T160V1,C'x' 00791A 92A7 C1BE 0797E 6833+ MVI T160V1,C'x' 00791E 92A7 C1BE 0797E 6834+ MVI T160V1,C'x' 007922 92A7 C1BE 0797E 6835+ MVI T160V1,C'x' 007926 92A7 C1BE 0797E 6836+ MVI T160V1,C'x' 00792A 92A7 C1BE 0797E 6837+ MVI T160V1,C'x' 00792E 92A7 C1BE 0797E 6838+ MVI T160V1,C'x' 007932 92A7 C1BE 0797E 6839+ MVI T160V1,C'x' 007936 92A7 C1BE 0797E 6840+ MVI T160V1,C'x' 00793A 92A7 C1BE 0797E 6841+ MVI T160V1,C'x' 00793E 92A7 C1BE 0797E 6842+ MVI T160V1,C'x' 007942 92A7 C1BE 0797E 6843+ MVI T160V1,C'x' 007946 92A7 C1BE 0797E 6844+ MVI T160V1,C'x' 00794A 92A7 C1BE 0797E 6845+ MVI T160V1,C'x' 00794E 92A7 C1BE 0797E 6846+ MVI T160V1,C'x' 007952 92A7 C1BE 0797E 6847+ MVI T160V1,C'x' 007956 92A7 C1BE 0797E 6848+ MVI T160V1,C'x' 00795A 92A7 C1BE 0797E 6849+ MVI T160V1,C'x' 00795E 92A7 C1BE 0797E 6850+ MVI T160V1,C'x' 007962 92A7 C1BE 0797E 6851+ MVI T160V1,C'x' 007966 92A7 C1BE 0797E 6852+ MVI T160V1,C'x' 00796A 92A7 C1BE 0797E 6853+ MVI T160V1,C'x' 6854+* 00796E 06FB 6855 BCTR R15,R11 6856 TSIMRET 007970 58F0 C1C0 07980 6857+ L R15,=A(SAVETST) R15 := current save area 007974 58DF 0004 00004 6858+ L R13,4(R15) get old save area back 007978 98EC D00C 0000C 6859+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00797C 07FE 6860+ BR 14 RETURN 02000000 6861 * PAGE 127 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00797E 40 6862 T160V1 DC C' ' 6863 TSIMEND 007980 6864+ LTORG 007980 00000458 6865 =A(SAVETST) 07984 6866+T160TEND EQU * 6867 * 6868 * Test 161 -- MVN m,m (10c) -------------------------------- 6869 * 6870 TSIMBEG T161,5000,50,1,C'MVN m,m (10c)' 6871+* 002924 6872+TDSCDAT CSECT 002928 6873+ DS 0D 6874+* 002928 00007988 6875+T161TDSC DC A(T161) // TENTRY 00292C 00000174 6876+ DC A(T161TEND-T161) // TLENGTH 002930 00001388 6877+ DC F'5000' // TLRCNT 002934 00000032 6878+ DC F'50' // TIGCNT 002938 00000001 6879+ DC F'1' // TLTYPE 0011F1 6880+TEXT CSECT 0011F1 E3F1F6F1 6881+SPTR0460 DC C'T161' 00293C 6882+TDSCDAT CSECT 00293C 6883+ DS 0F 00293C 040011F1 6884+ DC AL1(L'SPTR0460),AL3(SPTR0460) 0011F5 6885+TEXT CSECT 0011F5 D4E5D540946B9440 6886+SPTR0461 DC C'MVN m,m (10c)' 002940 6887+TDSCDAT CSECT 002940 6888+ DS 0F 002940 0D0011F5 6889+ DC AL1(L'SPTR0461),AL3(SPTR0461) 6890+* 004A50 6891+TDSCTBL CSECT 04A50 6892+T161TPTR EQU * 004A50 00002928 6893+ DC A(T161TDSC) enabled test 6894+* 007984 6895+TCODE CSECT 007988 6896+ DS 0D ensure double word alignment for test 007988 6897+T161 DS 0H 01650000 007988 90EC D00C 0000C 6898+ STM 14,12,12(13) SAVE REGISTERS 02950000 00798C 18CF 6899+ LR R12,R15 base register := entry address 07988 6900+ USING T161,R12 declare code base register 00798E 41B0 C01E 079A6 6901+ LA R11,T161L load loop target to R11 007992 58F0 C170 07AF8 6902+ L R15,=A(SAVETST) R15 := current save area 007996 50DF 0004 00004 6903+ ST R13,4(R15) set back pointer in current save area 00799A 182D 6904+ LR R2,R13 remember callers save area 00799C 18DF 6905+ LR R13,R15 setup current save area 00799E 50D2 0008 00008 6906+ ST R13,8(R2) set forw pointer in callers save area 00000 6907+ USING TDSC,R1 declare TDSC base register 0079A2 58F0 1008 00008 6908+ L R15,TLRCNT load local repeat count to R15 6909+* 6910 * 6911 T161L REPINS MVN,(T161V1,T161V2) repeat: MVN T161V1,T161V2 6912+* 6913+* build from sublist &ALIST a comma separated string &ARGS 6914+* 6915+* 6916+* PAGE 128 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 6917+* 6918+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 6919+* this allows to transfer the repeat count from last TDSCGEN call 6920+* 6921+* 079A6 6922+T161L EQU * 6923+* 6924+* write a comment indicating what REPINS does (in case NOGEN in effect) 6925+* 6926+*,// REPINS: do 50 times: 6927+* 6928+* MNOTE requires that ' is doubled for expanded variables 6929+* thus build &MASTR as a copy of '&ARGS with ' doubled 6930+* 6931+* 6932+*,// MVN T161V1,T161V2 6933+* 6934+* finally generate code: &ICNT copies of &CODE &ARGS 6935+* 0079A6 D109 C15C C166 07AE4 07AEE 6936+ MVN T161V1,T161V2 0079AC D109 C15C C166 07AE4 07AEE 6937+ MVN T161V1,T161V2 0079B2 D109 C15C C166 07AE4 07AEE 6938+ MVN T161V1,T161V2 0079B8 D109 C15C C166 07AE4 07AEE 6939+ MVN T161V1,T161V2 0079BE D109 C15C C166 07AE4 07AEE 6940+ MVN T161V1,T161V2 0079C4 D109 C15C C166 07AE4 07AEE 6941+ MVN T161V1,T161V2 0079CA D109 C15C C166 07AE4 07AEE 6942+ MVN T161V1,T161V2 0079D0 D109 C15C C166 07AE4 07AEE 6943+ MVN T161V1,T161V2 0079D6 D109 C15C C166 07AE4 07AEE 6944+ MVN T161V1,T161V2 0079DC D109 C15C C166 07AE4 07AEE 6945+ MVN T161V1,T161V2 0079E2 D109 C15C C166 07AE4 07AEE 6946+ MVN T161V1,T161V2 0079E8 D109 C15C C166 07AE4 07AEE 6947+ MVN T161V1,T161V2 0079EE D109 C15C C166 07AE4 07AEE 6948+ MVN T161V1,T161V2 0079F4 D109 C15C C166 07AE4 07AEE 6949+ MVN T161V1,T161V2 0079FA D109 C15C C166 07AE4 07AEE 6950+ MVN T161V1,T161V2 007A00 D109 C15C C166 07AE4 07AEE 6951+ MVN T161V1,T161V2 007A06 D109 C15C C166 07AE4 07AEE 6952+ MVN T161V1,T161V2 007A0C D109 C15C C166 07AE4 07AEE 6953+ MVN T161V1,T161V2 007A12 D109 C15C C166 07AE4 07AEE 6954+ MVN T161V1,T161V2 007A18 D109 C15C C166 07AE4 07AEE 6955+ MVN T161V1,T161V2 007A1E D109 C15C C166 07AE4 07AEE 6956+ MVN T161V1,T161V2 007A24 D109 C15C C166 07AE4 07AEE 6957+ MVN T161V1,T161V2 007A2A D109 C15C C166 07AE4 07AEE 6958+ MVN T161V1,T161V2 007A30 D109 C15C C166 07AE4 07AEE 6959+ MVN T161V1,T161V2 007A36 D109 C15C C166 07AE4 07AEE 6960+ MVN T161V1,T161V2 007A3C D109 C15C C166 07AE4 07AEE 6961+ MVN T161V1,T161V2 007A42 D109 C15C C166 07AE4 07AEE 6962+ MVN T161V1,T161V2 007A48 D109 C15C C166 07AE4 07AEE 6963+ MVN T161V1,T161V2 007A4E D109 C15C C166 07AE4 07AEE 6964+ MVN T161V1,T161V2 007A54 D109 C15C C166 07AE4 07AEE 6965+ MVN T161V1,T161V2 007A5A D109 C15C C166 07AE4 07AEE 6966+ MVN T161V1,T161V2 007A60 D109 C15C C166 07AE4 07AEE 6967+ MVN T161V1,T161V2 007A66 D109 C15C C166 07AE4 07AEE 6968+ MVN T161V1,T161V2 007A6C D109 C15C C166 07AE4 07AEE 6969+ MVN T161V1,T161V2 007A72 D109 C15C C166 07AE4 07AEE 6970+ MVN T161V1,T161V2 007A78 D109 C15C C166 07AE4 07AEE 6971+ MVN T161V1,T161V2 PAGE 129 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 007A7E D109 C15C C166 07AE4 07AEE 6972+ MVN T161V1,T161V2 007A84 D109 C15C C166 07AE4 07AEE 6973+ MVN T161V1,T161V2 007A8A D109 C15C C166 07AE4 07AEE 6974+ MVN T161V1,T161V2 007A90 D109 C15C C166 07AE4 07AEE 6975+ MVN T161V1,T161V2 007A96 D109 C15C C166 07AE4 07AEE 6976+ MVN T161V1,T161V2 007A9C D109 C15C C166 07AE4 07AEE 6977+ MVN T161V1,T161V2 007AA2 D109 C15C C166 07AE4 07AEE 6978+ MVN T161V1,T161V2 007AA8 D109 C15C C166 07AE4 07AEE 6979+ MVN T161V1,T161V2 007AAE D109 C15C C166 07AE4 07AEE 6980+ MVN T161V1,T161V2 007AB4 D109 C15C C166 07AE4 07AEE 6981+ MVN T161V1,T161V2 007ABA D109 C15C C166 07AE4 07AEE 6982+ MVN T161V1,T161V2 007AC0 D109 C15C C166 07AE4 07AEE 6983+ MVN T161V1,T161V2 007AC6 D109 C15C C166 07AE4 07AEE 6984+ MVN T161V1,T161V2 007ACC D109 C15C C166 07AE4 07AEE 6985+ MVN T161V1,T161V2 6986+* 007AD2 06FB 6987 BCTR R15,R11 6988 TSIMRET 007AD4 58F0 C170 07AF8 6989+ L R15,=A(SAVETST) R15 := current save area 007AD8 58DF 0004 00004 6990+ L R13,4(R15) get old save area back 007ADC 98EC D00C 0000C 6991+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007AE0 07FE 6992+ BR 14 RETURN 02000000 6993 * 007AE4 6994 DS 0F 007AE4 4040404040404040 6995 T161V1 DC CL10' ' 007AEE F0F1F2F3F4F5F6F7 6996 T161V2 DC CL10'0123456789' 007AF8 6997 DS 0H 6998 TSIMEND 007AF8 6999+ LTORG 007AF8 00000458 7000 =A(SAVETST) 07AFC 7001+T161TEND EQU * 7002 * 7003 * Test 162 -- MVN m,m (30c) -------------------------------- 7004 * 7005 TSIMBEG T162,7000,20,1,C'MVN m,m (30c)' 7006+* 002944 7007+TDSCDAT CSECT 002948 7008+ DS 0D 7009+* 002948 00007B00 7010+T162TDSC DC A(T162) // TENTRY 00294C 000000EC 7011+ DC A(T162TEND-T162) // TLENGTH 002950 00001B58 7012+ DC F'7000' // TLRCNT 002954 00000014 7013+ DC F'20' // TIGCNT 002958 00000001 7014+ DC F'1' // TLTYPE 001202 7015+TEXT CSECT 001202 E3F1F6F2 7016+SPTR0472 DC C'T162' 00295C 7017+TDSCDAT CSECT 00295C 7018+ DS 0F 00295C 04001202 7019+ DC AL1(L'SPTR0472),AL3(SPTR0472) 001206 7020+TEXT CSECT 001206 D4E5D540946B9440 7021+SPTR0473 DC C'MVN m,m (30c)' 002960 7022+TDSCDAT CSECT 002960 7023+ DS 0F 002960 0D001206 7024+ DC AL1(L'SPTR0473),AL3(SPTR0473) 7025+* 004A54 7026+TDSCTBL CSECT PAGE 130 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04A54 7027+T162TPTR EQU * 004A54 00002948 7028+ DC A(T162TDSC) enabled test 7029+* 007AFC 7030+TCODE CSECT 007B00 7031+ DS 0D ensure double word alignment for test 007B00 7032+T162 DS 0H 01650000 007B00 90EC D00C 0000C 7033+ STM 14,12,12(13) SAVE REGISTERS 02950000 007B04 18CF 7034+ LR R12,R15 base register := entry address 07B00 7035+ USING T162,R12 declare code base register 007B06 41B0 C01E 07B1E 7036+ LA R11,T162L load loop target to R11 007B0A 58F0 C0E8 07BE8 7037+ L R15,=A(SAVETST) R15 := current save area 007B0E 50DF 0004 00004 7038+ ST R13,4(R15) set back pointer in current save area 007B12 182D 7039+ LR R2,R13 remember callers save area 007B14 18DF 7040+ LR R13,R15 setup current save area 007B16 50D2 0008 00008 7041+ ST R13,8(R2) set forw pointer in callers save area 00000 7042+ USING TDSC,R1 declare TDSC base register 007B1A 58F0 1008 00008 7043+ L R15,TLRCNT load local repeat count to R15 7044+* 7045 * 7046 T162L REPINS MVN,(T162V1,T162V2) repeat: MVN T162V1,T162V2 7047+* 7048+* build from sublist &ALIST a comma separated string &ARGS 7049+* 7050+* 7051+* 7052+* 7053+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7054+* this allows to transfer the repeat count from last TDSCGEN call 7055+* 7056+* 07B1E 7057+T162L EQU * 7058+* 7059+* write a comment indicating what REPINS does (in case NOGEN in effect) 7060+* 7061+*,// REPINS: do 20 times: 7062+* 7063+* MNOTE requires that ' is doubled for expanded variables 7064+* thus build &MASTR as a copy of '&ARGS with ' doubled 7065+* 7066+* 7067+*,// MVN T162V1,T162V2 7068+* 7069+* finally generate code: &ICNT copies of &CODE &ARGS 7070+* 007B1E D11D C0A8 C0C6 07BA8 07BC6 7071+ MVN T162V1,T162V2 007B24 D11D C0A8 C0C6 07BA8 07BC6 7072+ MVN T162V1,T162V2 007B2A D11D C0A8 C0C6 07BA8 07BC6 7073+ MVN T162V1,T162V2 007B30 D11D C0A8 C0C6 07BA8 07BC6 7074+ MVN T162V1,T162V2 007B36 D11D C0A8 C0C6 07BA8 07BC6 7075+ MVN T162V1,T162V2 007B3C D11D C0A8 C0C6 07BA8 07BC6 7076+ MVN T162V1,T162V2 007B42 D11D C0A8 C0C6 07BA8 07BC6 7077+ MVN T162V1,T162V2 007B48 D11D C0A8 C0C6 07BA8 07BC6 7078+ MVN T162V1,T162V2 007B4E D11D C0A8 C0C6 07BA8 07BC6 7079+ MVN T162V1,T162V2 007B54 D11D C0A8 C0C6 07BA8 07BC6 7080+ MVN T162V1,T162V2 007B5A D11D C0A8 C0C6 07BA8 07BC6 7081+ MVN T162V1,T162V2 PAGE 131 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 007B60 D11D C0A8 C0C6 07BA8 07BC6 7082+ MVN T162V1,T162V2 007B66 D11D C0A8 C0C6 07BA8 07BC6 7083+ MVN T162V1,T162V2 007B6C D11D C0A8 C0C6 07BA8 07BC6 7084+ MVN T162V1,T162V2 007B72 D11D C0A8 C0C6 07BA8 07BC6 7085+ MVN T162V1,T162V2 007B78 D11D C0A8 C0C6 07BA8 07BC6 7086+ MVN T162V1,T162V2 007B7E D11D C0A8 C0C6 07BA8 07BC6 7087+ MVN T162V1,T162V2 007B84 D11D C0A8 C0C6 07BA8 07BC6 7088+ MVN T162V1,T162V2 007B8A D11D C0A8 C0C6 07BA8 07BC6 7089+ MVN T162V1,T162V2 007B90 D11D C0A8 C0C6 07BA8 07BC6 7090+ MVN T162V1,T162V2 7091+* 007B96 06FB 7092 BCTR R15,R11 7093 TSIMRET 007B98 58F0 C0E8 07BE8 7094+ L R15,=A(SAVETST) R15 := current save area 007B9C 58DF 0004 00004 7095+ L R13,4(R15) get old save area back 007BA0 98EC D00C 0000C 7096+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007BA4 07FE 7097+ BR 14 RETURN 02000000 7098 * 007BA8 7099 DS 0F 007BA8 4040404040404040 7100 T162V1 DC CL30' ' 007BC6 F0F1F2F3F4F5F6F7 7101 T162V2 DC CL30'012345678901234567890123456789' 007BE4 7102 DS 0H 7103 TSIMEND 007BE8 7104+ LTORG 007BE8 00000458 7105 =A(SAVETST) 07BEC 7106+T162TEND EQU * 7107 * 7108 * Test 165 -- MVZ m,m (10c) -------------------------------- 7109 * 7110 TSIMBEG T165,5000,50,1,C'MVZ m,m (10c)' 7111+* 002964 7112+TDSCDAT CSECT 002968 7113+ DS 0D 7114+* 002968 00007BF0 7115+T165TDSC DC A(T165) // TENTRY 00296C 00000174 7116+ DC A(T165TEND-T165) // TLENGTH 002970 00001388 7117+ DC F'5000' // TLRCNT 002974 00000032 7118+ DC F'50' // TIGCNT 002978 00000001 7119+ DC F'1' // TLTYPE 001213 7120+TEXT CSECT 001213 E3F1F6F5 7121+SPTR0484 DC C'T165' 00297C 7122+TDSCDAT CSECT 00297C 7123+ DS 0F 00297C 04001213 7124+ DC AL1(L'SPTR0484),AL3(SPTR0484) 001217 7125+TEXT CSECT 001217 D4E5E940946B9440 7126+SPTR0485 DC C'MVZ m,m (10c)' 002980 7127+TDSCDAT CSECT 002980 7128+ DS 0F 002980 0D001217 7129+ DC AL1(L'SPTR0485),AL3(SPTR0485) 7130+* 004A58 7131+TDSCTBL CSECT 04A58 7132+T165TPTR EQU * 004A58 00002968 7133+ DC A(T165TDSC) enabled test 7134+* 007BEC 7135+TCODE CSECT 007BF0 7136+ DS 0D ensure double word alignment for test PAGE 132 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 007BF0 7137+T165 DS 0H 01650000 007BF0 90EC D00C 0000C 7138+ STM 14,12,12(13) SAVE REGISTERS 02950000 007BF4 18CF 7139+ LR R12,R15 base register := entry address 07BF0 7140+ USING T165,R12 declare code base register 007BF6 41B0 C01E 07C0E 7141+ LA R11,T165L load loop target to R11 007BFA 58F0 C170 07D60 7142+ L R15,=A(SAVETST) R15 := current save area 007BFE 50DF 0004 00004 7143+ ST R13,4(R15) set back pointer in current save area 007C02 182D 7144+ LR R2,R13 remember callers save area 007C04 18DF 7145+ LR R13,R15 setup current save area 007C06 50D2 0008 00008 7146+ ST R13,8(R2) set forw pointer in callers save area 00000 7147+ USING TDSC,R1 declare TDSC base register 007C0A 58F0 1008 00008 7148+ L R15,TLRCNT load local repeat count to R15 7149+* 7150 * 7151 T165L REPINS MVZ,(T165V1,T165V2) repeat: MVZ T165V1,T165V2 7152+* 7153+* build from sublist &ALIST a comma separated string &ARGS 7154+* 7155+* 7156+* 7157+* 7158+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7159+* this allows to transfer the repeat count from last TDSCGEN call 7160+* 7161+* 07C0E 7162+T165L EQU * 7163+* 7164+* write a comment indicating what REPINS does (in case NOGEN in effect) 7165+* 7166+*,// REPINS: do 50 times: 7167+* 7168+* MNOTE requires that ' is doubled for expanded variables 7169+* thus build &MASTR as a copy of '&ARGS with ' doubled 7170+* 7171+* 7172+*,// MVZ T165V1,T165V2 7173+* 7174+* finally generate code: &ICNT copies of &CODE &ARGS 7175+* 007C0E D309 C15C C166 07D4C 07D56 7176+ MVZ T165V1,T165V2 007C14 D309 C15C C166 07D4C 07D56 7177+ MVZ T165V1,T165V2 007C1A D309 C15C C166 07D4C 07D56 7178+ MVZ T165V1,T165V2 007C20 D309 C15C C166 07D4C 07D56 7179+ MVZ T165V1,T165V2 007C26 D309 C15C C166 07D4C 07D56 7180+ MVZ T165V1,T165V2 007C2C D309 C15C C166 07D4C 07D56 7181+ MVZ T165V1,T165V2 007C32 D309 C15C C166 07D4C 07D56 7182+ MVZ T165V1,T165V2 007C38 D309 C15C C166 07D4C 07D56 7183+ MVZ T165V1,T165V2 007C3E D309 C15C C166 07D4C 07D56 7184+ MVZ T165V1,T165V2 007C44 D309 C15C C166 07D4C 07D56 7185+ MVZ T165V1,T165V2 007C4A D309 C15C C166 07D4C 07D56 7186+ MVZ T165V1,T165V2 007C50 D309 C15C C166 07D4C 07D56 7187+ MVZ T165V1,T165V2 007C56 D309 C15C C166 07D4C 07D56 7188+ MVZ T165V1,T165V2 007C5C D309 C15C C166 07D4C 07D56 7189+ MVZ T165V1,T165V2 007C62 D309 C15C C166 07D4C 07D56 7190+ MVZ T165V1,T165V2 007C68 D309 C15C C166 07D4C 07D56 7191+ MVZ T165V1,T165V2 PAGE 133 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 007C6E D309 C15C C166 07D4C 07D56 7192+ MVZ T165V1,T165V2 007C74 D309 C15C C166 07D4C 07D56 7193+ MVZ T165V1,T165V2 007C7A D309 C15C C166 07D4C 07D56 7194+ MVZ T165V1,T165V2 007C80 D309 C15C C166 07D4C 07D56 7195+ MVZ T165V1,T165V2 007C86 D309 C15C C166 07D4C 07D56 7196+ MVZ T165V1,T165V2 007C8C D309 C15C C166 07D4C 07D56 7197+ MVZ T165V1,T165V2 007C92 D309 C15C C166 07D4C 07D56 7198+ MVZ T165V1,T165V2 007C98 D309 C15C C166 07D4C 07D56 7199+ MVZ T165V1,T165V2 007C9E D309 C15C C166 07D4C 07D56 7200+ MVZ T165V1,T165V2 007CA4 D309 C15C C166 07D4C 07D56 7201+ MVZ T165V1,T165V2 007CAA D309 C15C C166 07D4C 07D56 7202+ MVZ T165V1,T165V2 007CB0 D309 C15C C166 07D4C 07D56 7203+ MVZ T165V1,T165V2 007CB6 D309 C15C C166 07D4C 07D56 7204+ MVZ T165V1,T165V2 007CBC D309 C15C C166 07D4C 07D56 7205+ MVZ T165V1,T165V2 007CC2 D309 C15C C166 07D4C 07D56 7206+ MVZ T165V1,T165V2 007CC8 D309 C15C C166 07D4C 07D56 7207+ MVZ T165V1,T165V2 007CCE D309 C15C C166 07D4C 07D56 7208+ MVZ T165V1,T165V2 007CD4 D309 C15C C166 07D4C 07D56 7209+ MVZ T165V1,T165V2 007CDA D309 C15C C166 07D4C 07D56 7210+ MVZ T165V1,T165V2 007CE0 D309 C15C C166 07D4C 07D56 7211+ MVZ T165V1,T165V2 007CE6 D309 C15C C166 07D4C 07D56 7212+ MVZ T165V1,T165V2 007CEC D309 C15C C166 07D4C 07D56 7213+ MVZ T165V1,T165V2 007CF2 D309 C15C C166 07D4C 07D56 7214+ MVZ T165V1,T165V2 007CF8 D309 C15C C166 07D4C 07D56 7215+ MVZ T165V1,T165V2 007CFE D309 C15C C166 07D4C 07D56 7216+ MVZ T165V1,T165V2 007D04 D309 C15C C166 07D4C 07D56 7217+ MVZ T165V1,T165V2 007D0A D309 C15C C166 07D4C 07D56 7218+ MVZ T165V1,T165V2 007D10 D309 C15C C166 07D4C 07D56 7219+ MVZ T165V1,T165V2 007D16 D309 C15C C166 07D4C 07D56 7220+ MVZ T165V1,T165V2 007D1C D309 C15C C166 07D4C 07D56 7221+ MVZ T165V1,T165V2 007D22 D309 C15C C166 07D4C 07D56 7222+ MVZ T165V1,T165V2 007D28 D309 C15C C166 07D4C 07D56 7223+ MVZ T165V1,T165V2 007D2E D309 C15C C166 07D4C 07D56 7224+ MVZ T165V1,T165V2 007D34 D309 C15C C166 07D4C 07D56 7225+ MVZ T165V1,T165V2 7226+* 007D3A 06FB 7227 BCTR R15,R11 7228 TSIMRET 007D3C 58F0 C170 07D60 7229+ L R15,=A(SAVETST) R15 := current save area 007D40 58DF 0004 00004 7230+ L R13,4(R15) get old save area back 007D44 98EC D00C 0000C 7231+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007D48 07FE 7232+ BR 14 RETURN 02000000 7233 * 007D4C 7234 DS 0F 007D4C 4040404040404040 7235 T165V1 DC CL10' ' 007D56 F0F1F2F3F4F5F6F7 7236 T165V2 DC CL10'0123456789' 007D60 7237 DS 0H 7238 TSIMEND 007D60 7239+ LTORG 007D60 00000458 7240 =A(SAVETST) 07D64 7241+T165TEND EQU * 7242 * 7243 * Test 166 -- MVZ m,m (30c) -------------------------------- 7244 * 7245 TSIMBEG T166,7000,20,1,C'MVZ m,m (30c)' 7246+* PAGE 134 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002984 7247+TDSCDAT CSECT 002988 7248+ DS 0D 7249+* 002988 00007D68 7250+T166TDSC DC A(T166) // TENTRY 00298C 000000EC 7251+ DC A(T166TEND-T166) // TLENGTH 002990 00001B58 7252+ DC F'7000' // TLRCNT 002994 00000014 7253+ DC F'20' // TIGCNT 002998 00000001 7254+ DC F'1' // TLTYPE 001224 7255+TEXT CSECT 001224 E3F1F6F6 7256+SPTR0496 DC C'T166' 00299C 7257+TDSCDAT CSECT 00299C 7258+ DS 0F 00299C 04001224 7259+ DC AL1(L'SPTR0496),AL3(SPTR0496) 001228 7260+TEXT CSECT 001228 D4E5E940946B9440 7261+SPTR0497 DC C'MVZ m,m (30c)' 0029A0 7262+TDSCDAT CSECT 0029A0 7263+ DS 0F 0029A0 0D001228 7264+ DC AL1(L'SPTR0497),AL3(SPTR0497) 7265+* 004A5C 7266+TDSCTBL CSECT 04A5C 7267+T166TPTR EQU * 004A5C 00002988 7268+ DC A(T166TDSC) enabled test 7269+* 007D64 7270+TCODE CSECT 007D68 7271+ DS 0D ensure double word alignment for test 007D68 7272+T166 DS 0H 01650000 007D68 90EC D00C 0000C 7273+ STM 14,12,12(13) SAVE REGISTERS 02950000 007D6C 18CF 7274+ LR R12,R15 base register := entry address 07D68 7275+ USING T166,R12 declare code base register 007D6E 41B0 C01E 07D86 7276+ LA R11,T166L load loop target to R11 007D72 58F0 C0E8 07E50 7277+ L R15,=A(SAVETST) R15 := current save area 007D76 50DF 0004 00004 7278+ ST R13,4(R15) set back pointer in current save area 007D7A 182D 7279+ LR R2,R13 remember callers save area 007D7C 18DF 7280+ LR R13,R15 setup current save area 007D7E 50D2 0008 00008 7281+ ST R13,8(R2) set forw pointer in callers save area 00000 7282+ USING TDSC,R1 declare TDSC base register 007D82 58F0 1008 00008 7283+ L R15,TLRCNT load local repeat count to R15 7284+* 7285 * 7286 T166L REPINS MVZ,(T166V1,T166V2) repeat: MVZ T166V1,T166V2 7287+* 7288+* build from sublist &ALIST a comma separated string &ARGS 7289+* 7290+* 7291+* 7292+* 7293+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7294+* this allows to transfer the repeat count from last TDSCGEN call 7295+* 7296+* 07D86 7297+T166L EQU * 7298+* 7299+* write a comment indicating what REPINS does (in case NOGEN in effect) 7300+* 7301+*,// REPINS: do 20 times: PAGE 135 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 7302+* 7303+* MNOTE requires that ' is doubled for expanded variables 7304+* thus build &MASTR as a copy of '&ARGS with ' doubled 7305+* 7306+* 7307+*,// MVZ T166V1,T166V2 7308+* 7309+* finally generate code: &ICNT copies of &CODE &ARGS 7310+* 007D86 D31D C0A8 C0C6 07E10 07E2E 7311+ MVZ T166V1,T166V2 007D8C D31D C0A8 C0C6 07E10 07E2E 7312+ MVZ T166V1,T166V2 007D92 D31D C0A8 C0C6 07E10 07E2E 7313+ MVZ T166V1,T166V2 007D98 D31D C0A8 C0C6 07E10 07E2E 7314+ MVZ T166V1,T166V2 007D9E D31D C0A8 C0C6 07E10 07E2E 7315+ MVZ T166V1,T166V2 007DA4 D31D C0A8 C0C6 07E10 07E2E 7316+ MVZ T166V1,T166V2 007DAA D31D C0A8 C0C6 07E10 07E2E 7317+ MVZ T166V1,T166V2 007DB0 D31D C0A8 C0C6 07E10 07E2E 7318+ MVZ T166V1,T166V2 007DB6 D31D C0A8 C0C6 07E10 07E2E 7319+ MVZ T166V1,T166V2 007DBC D31D C0A8 C0C6 07E10 07E2E 7320+ MVZ T166V1,T166V2 007DC2 D31D C0A8 C0C6 07E10 07E2E 7321+ MVZ T166V1,T166V2 007DC8 D31D C0A8 C0C6 07E10 07E2E 7322+ MVZ T166V1,T166V2 007DCE D31D C0A8 C0C6 07E10 07E2E 7323+ MVZ T166V1,T166V2 007DD4 D31D C0A8 C0C6 07E10 07E2E 7324+ MVZ T166V1,T166V2 007DDA D31D C0A8 C0C6 07E10 07E2E 7325+ MVZ T166V1,T166V2 007DE0 D31D C0A8 C0C6 07E10 07E2E 7326+ MVZ T166V1,T166V2 007DE6 D31D C0A8 C0C6 07E10 07E2E 7327+ MVZ T166V1,T166V2 007DEC D31D C0A8 C0C6 07E10 07E2E 7328+ MVZ T166V1,T166V2 007DF2 D31D C0A8 C0C6 07E10 07E2E 7329+ MVZ T166V1,T166V2 007DF8 D31D C0A8 C0C6 07E10 07E2E 7330+ MVZ T166V1,T166V2 7331+* 007DFE 06FB 7332 BCTR R15,R11 7333 TSIMRET 007E00 58F0 C0E8 07E50 7334+ L R15,=A(SAVETST) R15 := current save area 007E04 58DF 0004 00004 7335+ L R13,4(R15) get old save area back 007E08 98EC D00C 0000C 7336+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007E0C 07FE 7337+ BR 14 RETURN 02000000 7338 * 007E10 7339 DS 0F 007E10 4040404040404040 7340 T166V1 DC CL30' ' 007E2E F0F1F2F3F4F5F6F7 7341 T166V2 DC CL30'012345678901234567890123456789' 007E4C 7342 DS 0H 7343 TSIMEND 007E50 7344+ LTORG 007E50 00000458 7345 =A(SAVETST) 07E54 7346+T166TEND EQU * 7347 * 7348 * Test 167 -- MVCIN m,m (10c) ------------------------------ 7349 * 7350 TSIMBEG T167,3500,20,1,C'MVCIN m,m (10c)' 7351+* 0029A4 7352+TDSCDAT CSECT 0029A8 7353+ DS 0D 7354+* 0029A8 00007E58 7355+T167TDSC DC A(T167) // TENTRY 0029AC 000000C4 7356+ DC A(T167TEND-T167) // TLENGTH PAGE 136 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0029B0 00000DAC 7357+ DC F'3500' // TLRCNT 0029B4 00000014 7358+ DC F'20' // TIGCNT 0029B8 00000001 7359+ DC F'1' // TLTYPE 001235 7360+TEXT CSECT 001235 E3F1F6F7 7361+SPTR0508 DC C'T167' 0029BC 7362+TDSCDAT CSECT 0029BC 7363+ DS 0F 0029BC 04001235 7364+ DC AL1(L'SPTR0508),AL3(SPTR0508) 001239 7365+TEXT CSECT 001239 D4E5C3C9D540946B 7366+SPTR0509 DC C'MVCIN m,m (10c)' 0029C0 7367+TDSCDAT CSECT 0029C0 7368+ DS 0F 0029C0 0F001239 7369+ DC AL1(L'SPTR0509),AL3(SPTR0509) 7370+* 004A60 7371+TDSCTBL CSECT 04A60 7372+T167TPTR EQU * 004A60 000029A8 7373+ DC A(T167TDSC) enabled test 7374+* 007E54 7375+TCODE CSECT 007E58 7376+ DS 0D ensure double word alignment for test 007E58 7377+T167 DS 0H 01650000 007E58 90EC D00C 0000C 7378+ STM 14,12,12(13) SAVE REGISTERS 02950000 007E5C 18CF 7379+ LR R12,R15 base register := entry address 07E58 7380+ USING T167,R12 declare code base register 007E5E 41B0 C01E 07E76 7381+ LA R11,T167L load loop target to R11 007E62 58F0 C0C0 07F18 7382+ L R15,=A(SAVETST) R15 := current save area 007E66 50DF 0004 00004 7383+ ST R13,4(R15) set back pointer in current save area 007E6A 182D 7384+ LR R2,R13 remember callers save area 007E6C 18DF 7385+ LR R13,R15 setup current save area 007E6E 50D2 0008 00008 7386+ ST R13,8(R2) set forw pointer in callers save area 00000 7387+ USING TDSC,R1 declare TDSC base register 007E72 58F0 1008 00008 7388+ L R15,TLRCNT load local repeat count to R15 7389+* 7390 * 7391 T167L REPINS MVCIN,(T167V1,T167V2) repeat: MVCIN T167V1,T167V2 7392+* 7393+* build from sublist &ALIST a comma separated string &ARGS 7394+* 7395+* 7396+* 7397+* 7398+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7399+* this allows to transfer the repeat count from last TDSCGEN call 7400+* 7401+* 07E76 7402+T167L EQU * 7403+* 7404+* write a comment indicating what REPINS does (in case NOGEN in effect) 7405+* 7406+*,// REPINS: do 20 times: 7407+* 7408+* MNOTE requires that ' is doubled for expanded variables 7409+* thus build &MASTR as a copy of '&ARGS with ' doubled 7410+* 7411+* PAGE 137 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 7412+*,// MVCIN T167V1,T167V2 7413+* 7414+* finally generate code: &ICNT copies of &CODE &ARGS 7415+* 007E76 E809 C0A8 C0B2 07F00 07F0A 7416+ MVCIN T167V1,T167V2 007E7C E809 C0A8 C0B2 07F00 07F0A 7417+ MVCIN T167V1,T167V2 007E82 E809 C0A8 C0B2 07F00 07F0A 7418+ MVCIN T167V1,T167V2 007E88 E809 C0A8 C0B2 07F00 07F0A 7419+ MVCIN T167V1,T167V2 007E8E E809 C0A8 C0B2 07F00 07F0A 7420+ MVCIN T167V1,T167V2 007E94 E809 C0A8 C0B2 07F00 07F0A 7421+ MVCIN T167V1,T167V2 007E9A E809 C0A8 C0B2 07F00 07F0A 7422+ MVCIN T167V1,T167V2 007EA0 E809 C0A8 C0B2 07F00 07F0A 7423+ MVCIN T167V1,T167V2 007EA6 E809 C0A8 C0B2 07F00 07F0A 7424+ MVCIN T167V1,T167V2 007EAC E809 C0A8 C0B2 07F00 07F0A 7425+ MVCIN T167V1,T167V2 007EB2 E809 C0A8 C0B2 07F00 07F0A 7426+ MVCIN T167V1,T167V2 007EB8 E809 C0A8 C0B2 07F00 07F0A 7427+ MVCIN T167V1,T167V2 007EBE E809 C0A8 C0B2 07F00 07F0A 7428+ MVCIN T167V1,T167V2 007EC4 E809 C0A8 C0B2 07F00 07F0A 7429+ MVCIN T167V1,T167V2 007ECA E809 C0A8 C0B2 07F00 07F0A 7430+ MVCIN T167V1,T167V2 007ED0 E809 C0A8 C0B2 07F00 07F0A 7431+ MVCIN T167V1,T167V2 007ED6 E809 C0A8 C0B2 07F00 07F0A 7432+ MVCIN T167V1,T167V2 007EDC E809 C0A8 C0B2 07F00 07F0A 7433+ MVCIN T167V1,T167V2 007EE2 E809 C0A8 C0B2 07F00 07F0A 7434+ MVCIN T167V1,T167V2 007EE8 E809 C0A8 C0B2 07F00 07F0A 7435+ MVCIN T167V1,T167V2 7436+* 007EEE 06FB 7437 BCTR R15,R11 7438 TSIMRET 007EF0 58F0 C0C0 07F18 7439+ L R15,=A(SAVETST) R15 := current save area 007EF4 58DF 0004 00004 7440+ L R13,4(R15) get old save area back 007EF8 98EC D00C 0000C 7441+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007EFC 07FE 7442+ BR 14 RETURN 02000000 7443 * 007F00 7444 DS 0F 007F00 4040404040404040 7445 T167V1 DC CL10' ' 007F0A F0F1F2F3F4F5F6F7 7446 T167V2 DC CL10'0123456789' 007F14 7447 DS 0H 7448 TSIMEND 007F18 7449+ LTORG 007F18 00000458 7450 =A(SAVETST) 07F1C 7451+T167TEND EQU * 7452 * 7453 * Test 168 -- MVCIN m,m (30c) ------------------------------ 7454 * 7455 TSIMBEG T168,1200,20,1,C'MVCIN m,m (30c)' 7456+* 0029C4 7457+TDSCDAT CSECT 0029C8 7458+ DS 0D 7459+* 0029C8 00007F20 7460+T168TDSC DC A(T168) // TENTRY 0029CC 000000EC 7461+ DC A(T168TEND-T168) // TLENGTH 0029D0 000004B0 7462+ DC F'1200' // TLRCNT 0029D4 00000014 7463+ DC F'20' // TIGCNT 0029D8 00000001 7464+ DC F'1' // TLTYPE 001248 7465+TEXT CSECT 001248 E3F1F6F8 7466+SPTR0520 DC C'T168' PAGE 138 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0029DC 7467+TDSCDAT CSECT 0029DC 7468+ DS 0F 0029DC 04001248 7469+ DC AL1(L'SPTR0520),AL3(SPTR0520) 00124C 7470+TEXT CSECT 00124C D4E5C3C9D540946B 7471+SPTR0521 DC C'MVCIN m,m (30c)' 0029E0 7472+TDSCDAT CSECT 0029E0 7473+ DS 0F 0029E0 0F00124C 7474+ DC AL1(L'SPTR0521),AL3(SPTR0521) 7475+* 004A64 7476+TDSCTBL CSECT 04A64 7477+T168TPTR EQU * 004A64 000029C8 7478+ DC A(T168TDSC) enabled test 7479+* 007F1C 7480+TCODE CSECT 007F20 7481+ DS 0D ensure double word alignment for test 007F20 7482+T168 DS 0H 01650000 007F20 90EC D00C 0000C 7483+ STM 14,12,12(13) SAVE REGISTERS 02950000 007F24 18CF 7484+ LR R12,R15 base register := entry address 07F20 7485+ USING T168,R12 declare code base register 007F26 41B0 C01E 07F3E 7486+ LA R11,T168L load loop target to R11 007F2A 58F0 C0E8 08008 7487+ L R15,=A(SAVETST) R15 := current save area 007F2E 50DF 0004 00004 7488+ ST R13,4(R15) set back pointer in current save area 007F32 182D 7489+ LR R2,R13 remember callers save area 007F34 18DF 7490+ LR R13,R15 setup current save area 007F36 50D2 0008 00008 7491+ ST R13,8(R2) set forw pointer in callers save area 00000 7492+ USING TDSC,R1 declare TDSC base register 007F3A 58F0 1008 00008 7493+ L R15,TLRCNT load local repeat count to R15 7494+* 7495 * 7496 T168L REPINS MVCIN,(T168V1,T168V2) repeat: MVCIN T168V1,T168V2 7497+* 7498+* build from sublist &ALIST a comma separated string &ARGS 7499+* 7500+* 7501+* 7502+* 7503+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7504+* this allows to transfer the repeat count from last TDSCGEN call 7505+* 7506+* 07F3E 7507+T168L EQU * 7508+* 7509+* write a comment indicating what REPINS does (in case NOGEN in effect) 7510+* 7511+*,// REPINS: do 20 times: 7512+* 7513+* MNOTE requires that ' is doubled for expanded variables 7514+* thus build &MASTR as a copy of '&ARGS with ' doubled 7515+* 7516+* 7517+*,// MVCIN T168V1,T168V2 7518+* 7519+* finally generate code: &ICNT copies of &CODE &ARGS 7520+* 007F3E E81D C0A8 C0C6 07FC8 07FE6 7521+ MVCIN T168V1,T168V2 PAGE 139 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 007F44 E81D C0A8 C0C6 07FC8 07FE6 7522+ MVCIN T168V1,T168V2 007F4A E81D C0A8 C0C6 07FC8 07FE6 7523+ MVCIN T168V1,T168V2 007F50 E81D C0A8 C0C6 07FC8 07FE6 7524+ MVCIN T168V1,T168V2 007F56 E81D C0A8 C0C6 07FC8 07FE6 7525+ MVCIN T168V1,T168V2 007F5C E81D C0A8 C0C6 07FC8 07FE6 7526+ MVCIN T168V1,T168V2 007F62 E81D C0A8 C0C6 07FC8 07FE6 7527+ MVCIN T168V1,T168V2 007F68 E81D C0A8 C0C6 07FC8 07FE6 7528+ MVCIN T168V1,T168V2 007F6E E81D C0A8 C0C6 07FC8 07FE6 7529+ MVCIN T168V1,T168V2 007F74 E81D C0A8 C0C6 07FC8 07FE6 7530+ MVCIN T168V1,T168V2 007F7A E81D C0A8 C0C6 07FC8 07FE6 7531+ MVCIN T168V1,T168V2 007F80 E81D C0A8 C0C6 07FC8 07FE6 7532+ MVCIN T168V1,T168V2 007F86 E81D C0A8 C0C6 07FC8 07FE6 7533+ MVCIN T168V1,T168V2 007F8C E81D C0A8 C0C6 07FC8 07FE6 7534+ MVCIN T168V1,T168V2 007F92 E81D C0A8 C0C6 07FC8 07FE6 7535+ MVCIN T168V1,T168V2 007F98 E81D C0A8 C0C6 07FC8 07FE6 7536+ MVCIN T168V1,T168V2 007F9E E81D C0A8 C0C6 07FC8 07FE6 7537+ MVCIN T168V1,T168V2 007FA4 E81D C0A8 C0C6 07FC8 07FE6 7538+ MVCIN T168V1,T168V2 007FAA E81D C0A8 C0C6 07FC8 07FE6 7539+ MVCIN T168V1,T168V2 007FB0 E81D C0A8 C0C6 07FC8 07FE6 7540+ MVCIN T168V1,T168V2 7541+* 007FB6 06FB 7542 BCTR R15,R11 7543 TSIMRET 007FB8 58F0 C0E8 08008 7544+ L R15,=A(SAVETST) R15 := current save area 007FBC 58DF 0004 00004 7545+ L R13,4(R15) get old save area back 007FC0 98EC D00C 0000C 7546+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 007FC4 07FE 7547+ BR 14 RETURN 02000000 7548 * 007FC8 7549 DS 0F 007FC8 4040404040404040 7550 T168V1 DC CL30' ' 007FE6 F0F1F2F3F4F5F6F7 7551 T168V2 DC CL30'01234567899876543210ABCDEFGHIJ' 7552 TSIMEND 008008 7553+ LTORG 008008 00000458 7554 =A(SAVETST) 0800C 7555+T168TEND EQU * 7556 * 7557 * Test 169 -- MVCIN m,m (100c) ----------------------------- 7558 * 7559 TSIMBEG T169,350,20,1,C'MVCIN m,m (100c)' 7560+* 0029E4 7561+TDSCDAT CSECT 0029E8 7562+ DS 0D 7563+* 0029E8 00008010 7564+T169TDSC DC A(T169) // TENTRY 0029EC 00000174 7565+ DC A(T169TEND-T169) // TLENGTH 0029F0 0000015E 7566+ DC F'350' // TLRCNT 0029F4 00000014 7567+ DC F'20' // TIGCNT 0029F8 00000001 7568+ DC F'1' // TLTYPE 00125B 7569+TEXT CSECT 00125B E3F1F6F9 7570+SPTR0532 DC C'T169' 0029FC 7571+TDSCDAT CSECT 0029FC 7572+ DS 0F 0029FC 0400125B 7573+ DC AL1(L'SPTR0532),AL3(SPTR0532) 00125F 7574+TEXT CSECT 00125F D4E5C3C9D540946B 7575+SPTR0533 DC C'MVCIN m,m (100c)' 002A00 7576+TDSCDAT CSECT PAGE 140 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002A00 7577+ DS 0F 002A00 1000125F 7578+ DC AL1(L'SPTR0533),AL3(SPTR0533) 7579+* 004A68 7580+TDSCTBL CSECT 04A68 7581+T169TPTR EQU * 004A68 000029E8 7582+ DC A(T169TDSC) enabled test 7583+* 00800C 7584+TCODE CSECT 008010 7585+ DS 0D ensure double word alignment for test 008010 7586+T169 DS 0H 01650000 008010 90EC D00C 0000C 7587+ STM 14,12,12(13) SAVE REGISTERS 02950000 008014 18CF 7588+ LR R12,R15 base register := entry address 08010 7589+ USING T169,R12 declare code base register 008016 41B0 C01E 0802E 7590+ LA R11,T169L load loop target to R11 00801A 58F0 C170 08180 7591+ L R15,=A(SAVETST) R15 := current save area 00801E 50DF 0004 00004 7592+ ST R13,4(R15) set back pointer in current save area 008022 182D 7593+ LR R2,R13 remember callers save area 008024 18DF 7594+ LR R13,R15 setup current save area 008026 50D2 0008 00008 7595+ ST R13,8(R2) set forw pointer in callers save area 00000 7596+ USING TDSC,R1 declare TDSC base register 00802A 58F0 1008 00008 7597+ L R15,TLRCNT load local repeat count to R15 7598+* 7599 * 7600 T169L REPINS MVCIN,(T169V1,T169V2) repeat: MVCIN T169V1,T169V2 7601+* 7602+* build from sublist &ALIST a comma separated string &ARGS 7603+* 7604+* 7605+* 7606+* 7607+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 7608+* this allows to transfer the repeat count from last TDSCGEN call 7609+* 7610+* 0802E 7611+T169L EQU * 7612+* 7613+* write a comment indicating what REPINS does (in case NOGEN in effect) 7614+* 7615+*,// REPINS: do 20 times: 7616+* 7617+* MNOTE requires that ' is doubled for expanded variables 7618+* thus build &MASTR as a copy of '&ARGS with ' doubled 7619+* 7620+* 7621+*,// MVCIN T169V1,T169V2 7622+* 7623+* finally generate code: &ICNT copies of &CODE &ARGS 7624+* 00802E E863 C0A8 C10C 080B8 0811C 7625+ MVCIN T169V1,T169V2 008034 E863 C0A8 C10C 080B8 0811C 7626+ MVCIN T169V1,T169V2 00803A E863 C0A8 C10C 080B8 0811C 7627+ MVCIN T169V1,T169V2 008040 E863 C0A8 C10C 080B8 0811C 7628+ MVCIN T169V1,T169V2 008046 E863 C0A8 C10C 080B8 0811C 7629+ MVCIN T169V1,T169V2 00804C E863 C0A8 C10C 080B8 0811C 7630+ MVCIN T169V1,T169V2 008052 E863 C0A8 C10C 080B8 0811C 7631+ MVCIN T169V1,T169V2 PAGE 141 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 008058 E863 C0A8 C10C 080B8 0811C 7632+ MVCIN T169V1,T169V2 00805E E863 C0A8 C10C 080B8 0811C 7633+ MVCIN T169V1,T169V2 008064 E863 C0A8 C10C 080B8 0811C 7634+ MVCIN T169V1,T169V2 00806A E863 C0A8 C10C 080B8 0811C 7635+ MVCIN T169V1,T169V2 008070 E863 C0A8 C10C 080B8 0811C 7636+ MVCIN T169V1,T169V2 008076 E863 C0A8 C10C 080B8 0811C 7637+ MVCIN T169V1,T169V2 00807C E863 C0A8 C10C 080B8 0811C 7638+ MVCIN T169V1,T169V2 008082 E863 C0A8 C10C 080B8 0811C 7639+ MVCIN T169V1,T169V2 008088 E863 C0A8 C10C 080B8 0811C 7640+ MVCIN T169V1,T169V2 00808E E863 C0A8 C10C 080B8 0811C 7641+ MVCIN T169V1,T169V2 008094 E863 C0A8 C10C 080B8 0811C 7642+ MVCIN T169V1,T169V2 00809A E863 C0A8 C10C 080B8 0811C 7643+ MVCIN T169V1,T169V2 0080A0 E863 C0A8 C10C 080B8 0811C 7644+ MVCIN T169V1,T169V2 7645+* 0080A6 06FB 7646 BCTR R15,R11 7647 TSIMRET 0080A8 58F0 C170 08180 7648+ L R15,=A(SAVETST) R15 := current save area 0080AC 58DF 0004 00004 7649+ L R13,4(R15) get old save area back 0080B0 98EC D00C 0000C 7650+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0080B4 07FE 7651+ BR 14 RETURN 02000000 7652 * 0080B8 7653 DS 0F 0080B8 4040404040404040 7654 T169V1 DC CL100' ' 00811C F0F1F2F3F4F5F6F7 7655 T169V2 DC CL100'0123456789' 7656 TSIMEND 008180 7657+ LTORG 008180 00000458 7658 =A(SAVETST) 08184 7659+T169TEND EQU * 7660 * 7661 * Test 17x -- MVCL ========================================= 7662 * 7663 * Test 170 -- MVCL m,m (10b,copy) -------------------------- 7664 * 7665 TSIMBEG T170,13000,10,1,C'4*Lx;MVCL (10b)' 7666+* 002A04 7667+TDSCDAT CSECT 002A08 7668+ DS 0D 7669+* 002A08 00008188 7670+T170TDSC DC A(T170) // TENTRY 002A0C 000000DC 7671+ DC A(T170TEND-T170) // TLENGTH 002A10 000032C8 7672+ DC F'13000' // TLRCNT 002A14 0000000A 7673+ DC F'10' // TIGCNT 002A18 00000001 7674+ DC F'1' // TLTYPE 00126F 7675+TEXT CSECT 00126F E3F1F7F0 7676+SPTR0544 DC C'T170' 002A1C 7677+TDSCDAT CSECT 002A1C 7678+ DS 0F 002A1C 0400126F 7679+ DC AL1(L'SPTR0544),AL3(SPTR0544) 001273 7680+TEXT CSECT 001273 F45CD3A75ED4E5C3 7681+SPTR0545 DC C'4*Lx;MVCL (10b)' 002A20 7682+TDSCDAT CSECT 002A20 7683+ DS 0F 002A20 0F001273 7684+ DC AL1(L'SPTR0545),AL3(SPTR0545) 7685+* 004A6C 7686+TDSCTBL CSECT PAGE 142 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04A6C 7687+T170TPTR EQU * 004A6C 00002A08 7688+ DC A(T170TDSC) enabled test 7689+* 008184 7690+TCODE CSECT 008188 7691+ DS 0D ensure double word alignment for test 008188 7692+T170 DS 0H 01650000 008188 90EC D00C 0000C 7693+ STM 14,12,12(13) SAVE REGISTERS 02950000 00818C 18CF 7694+ LR R12,R15 base register := entry address 08188 7695+ USING T170,R12 declare code base register 00818E 41B0 C02E 081B6 7696+ LA R11,T170L load loop target to R11 008192 58F0 C0D0 08258 7697+ L R15,=A(SAVETST) R15 := current save area 008196 50DF 0004 00004 7698+ ST R13,4(R15) set back pointer in current save area 00819A 182D 7699+ LR R2,R13 remember callers save area 00819C 18DF 7700+ LR R13,R15 setup current save area 00819E 50D2 0008 00008 7701+ ST R13,8(R2) set forw pointer in callers save area 00000 7702+ USING TDSC,R1 declare TDSC base register 0081A2 58F0 1008 00008 7703+ L R15,TLRCNT load local repeat count to R15 7704+* 7705 * 7706 * use sequence 7707 * LR R2,R6 dest addr 7708 * LA R3,10 dest length 7709 * LR R4,R8 source addr 7710 * LA R5,10 source length 7711 * MVCL R2,R4 doit 7712 * 0081A6 5860 C0D4 0825C 7713 L R6,=A(PBUF4K1) get ptr to ptr 0081AA 5866 0000 00000 7714 L R6,0(R6) get ptr to BUF4K1 0081AE 5880 C0D8 08260 7715 L R8,=A(PBUF4K2) get ptr to ptr 0081B2 5888 0000 00000 7716 L R8,0(R8) get ptr to BUF4K2 7717 T170L REPINSN LR,(R2,R6),LA,(R3,10), X LR,(R4,R8),LA,(R5,10), X MVCL,(R2,R4) 7718+* 7719+* build from sublist &ALIST* a comma separated string &ARGS* 7720+* 7721+* 7722+* 7723+* 7724+* 7725+* 7726+* 7727+* 7728+* 7729+* 7730+* 7731+* 081B6 7732+T170L EQU * 7733+* 7734+* 7735+* write a comment indicating what REPINSN does (if NOGEN in effect) 7736+* 7737+*,// REPINSN: do 10 times: 7738+* 7739+* MNOTE requires that ' is doubled for expanded variables PAGE 143 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 7740+* thus build &MASTR as a copy of '&ARGS with ' doubled 7741+* 7742+* 7743+*,// LR R2,R6 7744+* 7745+* MNOTE requires that ' is doubled for expanded variables 7746+* thus build &MASTR as a copy of '&ARGS with ' doubled 7747+* 7748+* 7749+*,// LA R3,10 7750+* 7751+* MNOTE requires that ' is doubled for expanded variables 7752+* thus build &MASTR as a copy of '&ARGS with ' doubled 7753+* 7754+* 7755+*,// LR R4,R8 7756+* 7757+* MNOTE requires that ' is doubled for expanded variables 7758+* thus build &MASTR as a copy of '&ARGS with ' doubled 7759+* 7760+* 7761+*,// LA R5,10 7762+* 7763+* MNOTE requires that ' is doubled for expanded variables 7764+* thus build &MASTR as a copy of '&ARGS with ' doubled 7765+* 7766+* 7767+*,// MVCL R2,R4 7768+* 7769+* finally generate code: &ICNT copies of &CO1 ... 7770+* 0081B6 1826 7771+ LR R2,R6 0081B8 4130 000A 0000A 7772+ LA R3,10 0081BC 1848 7773+ LR R4,R8 0081BE 4150 000A 0000A 7774+ LA R5,10 0081C2 0E24 7775+ MVCL R2,R4 0081C4 1826 7776+ LR R2,R6 0081C6 4130 000A 0000A 7777+ LA R3,10 0081CA 1848 7778+ LR R4,R8 0081CC 4150 000A 0000A 7779+ LA R5,10 0081D0 0E24 7780+ MVCL R2,R4 0081D2 1826 7781+ LR R2,R6 0081D4 4130 000A 0000A 7782+ LA R3,10 0081D8 1848 7783+ LR R4,R8 0081DA 4150 000A 0000A 7784+ LA R5,10 0081DE 0E24 7785+ MVCL R2,R4 0081E0 1826 7786+ LR R2,R6 0081E2 4130 000A 0000A 7787+ LA R3,10 0081E6 1848 7788+ LR R4,R8 0081E8 4150 000A 0000A 7789+ LA R5,10 0081EC 0E24 7790+ MVCL R2,R4 0081EE 1826 7791+ LR R2,R6 0081F0 4130 000A 0000A 7792+ LA R3,10 0081F4 1848 7793+ LR R4,R8 0081F6 4150 000A 0000A 7794+ LA R5,10 PAGE 144 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0081FA 0E24 7795+ MVCL R2,R4 0081FC 1826 7796+ LR R2,R6 0081FE 4130 000A 0000A 7797+ LA R3,10 008202 1848 7798+ LR R4,R8 008204 4150 000A 0000A 7799+ LA R5,10 008208 0E24 7800+ MVCL R2,R4 00820A 1826 7801+ LR R2,R6 00820C 4130 000A 0000A 7802+ LA R3,10 008210 1848 7803+ LR R4,R8 008212 4150 000A 0000A 7804+ LA R5,10 008216 0E24 7805+ MVCL R2,R4 008218 1826 7806+ LR R2,R6 00821A 4130 000A 0000A 7807+ LA R3,10 00821E 1848 7808+ LR R4,R8 008220 4150 000A 0000A 7809+ LA R5,10 008224 0E24 7810+ MVCL R2,R4 008226 1826 7811+ LR R2,R6 008228 4130 000A 0000A 7812+ LA R3,10 00822C 1848 7813+ LR R4,R8 00822E 4150 000A 0000A 7814+ LA R5,10 008232 0E24 7815+ MVCL R2,R4 008234 1826 7816+ LR R2,R6 008236 4130 000A 0000A 7817+ LA R3,10 00823A 1848 7818+ LR R4,R8 00823C 4150 000A 0000A 7819+ LA R5,10 008240 0E24 7820+ MVCL R2,R4 7821+* 008242 06FB 7822 BCTR R15,R11 7823 TSIMRET 008244 58F0 C0D0 08258 7824+ L R15,=A(SAVETST) R15 := current save area 008248 58DF 0004 00004 7825+ L R13,4(R15) get old save area back 00824C 98EC D00C 0000C 7826+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008250 07FE 7827+ BR 14 RETURN 02000000 7828 TSIMEND 008258 7829+ LTORG 008258 00000458 7830 =A(SAVETST) 00825C 000004B4 7831 =A(PBUF4K1) 008260 000004B8 7832 =A(PBUF4K2) 08264 7833+T170TEND EQU * 7834 * 7835 * Test 171 -- MVCL m,m (100b,copy) ------------------------- 7836 * 7837 TSIMBEG T171,11000,10,1,C'4*Lx;MVCL (100b)' 7838+* 002A24 7839+TDSCDAT CSECT 002A28 7840+ DS 0D 7841+* 002A28 00008268 7842+T171TDSC DC A(T171) // TENTRY 002A2C 000000DC 7843+ DC A(T171TEND-T171) // TLENGTH 002A30 00002AF8 7844+ DC F'11000' // TLRCNT 002A34 0000000A 7845+ DC F'10' // TIGCNT 002A38 00000001 7846+ DC F'1' // TLTYPE 001282 7847+TEXT CSECT 001282 E3F1F7F1 7848+SPTR0564 DC C'T171' 002A3C 7849+TDSCDAT CSECT PAGE 145 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002A3C 7850+ DS 0F 002A3C 04001282 7851+ DC AL1(L'SPTR0564),AL3(SPTR0564) 001286 7852+TEXT CSECT 001286 F45CD3A75ED4E5C3 7853+SPTR0565 DC C'4*Lx;MVCL (100b)' 002A40 7854+TDSCDAT CSECT 002A40 7855+ DS 0F 002A40 10001286 7856+ DC AL1(L'SPTR0565),AL3(SPTR0565) 7857+* 004A70 7858+TDSCTBL CSECT 04A70 7859+T171TPTR EQU * 004A70 00002A28 7860+ DC A(T171TDSC) enabled test 7861+* 008264 7862+TCODE CSECT 008268 7863+ DS 0D ensure double word alignment for test 008268 7864+T171 DS 0H 01650000 008268 90EC D00C 0000C 7865+ STM 14,12,12(13) SAVE REGISTERS 02950000 00826C 18CF 7866+ LR R12,R15 base register := entry address 08268 7867+ USING T171,R12 declare code base register 00826E 41B0 C02E 08296 7868+ LA R11,T171L load loop target to R11 008272 58F0 C0D0 08338 7869+ L R15,=A(SAVETST) R15 := current save area 008276 50DF 0004 00004 7870+ ST R13,4(R15) set back pointer in current save area 00827A 182D 7871+ LR R2,R13 remember callers save area 00827C 18DF 7872+ LR R13,R15 setup current save area 00827E 50D2 0008 00008 7873+ ST R13,8(R2) set forw pointer in callers save area 00000 7874+ USING TDSC,R1 declare TDSC base register 008282 58F0 1008 00008 7875+ L R15,TLRCNT load local repeat count to R15 7876+* 7877 * 7878 * use sequence 7879 * LR R2,R6 dest addr 7880 * LA R3,100 dest length 7881 * LR R4,R8 source addr 7882 * LA R5,100 source length 7883 * MVCL R2,R4 doit 7884 * 008286 5860 C0D4 0833C 7885 L R6,=A(PBUF4K1) get ptr to ptr 00828A 5866 0000 00000 7886 L R6,0(R6) get ptr to BUF4K1 00828E 5880 C0D8 08340 7887 L R8,=A(PBUF4K2) get ptr to ptr 008292 5888 0000 00000 7888 L R8,0(R8) get ptr to BUF4K2 7889 T171L REPINSN LR,(R2,R6),LA,(R3,100), X LR,(R4,R8),LA,(R5,100), X MVCL,(R2,R4) 7890+* 7891+* build from sublist &ALIST* a comma separated string &ARGS* 7892+* 7893+* 7894+* 7895+* 7896+* 7897+* 7898+* 7899+* 7900+* 7901+* 7902+* PAGE 146 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 7903+* 08296 7904+T171L EQU * 7905+* 7906+* 7907+* write a comment indicating what REPINSN does (if NOGEN in effect) 7908+* 7909+*,// REPINSN: do 10 times: 7910+* 7911+* MNOTE requires that ' is doubled for expanded variables 7912+* thus build &MASTR as a copy of '&ARGS with ' doubled 7913+* 7914+* 7915+*,// LR R2,R6 7916+* 7917+* MNOTE requires that ' is doubled for expanded variables 7918+* thus build &MASTR as a copy of '&ARGS with ' doubled 7919+* 7920+* 7921+*,// LA R3,100 7922+* 7923+* MNOTE requires that ' is doubled for expanded variables 7924+* thus build &MASTR as a copy of '&ARGS with ' doubled 7925+* 7926+* 7927+*,// LR R4,R8 7928+* 7929+* MNOTE requires that ' is doubled for expanded variables 7930+* thus build &MASTR as a copy of '&ARGS with ' doubled 7931+* 7932+* 7933+*,// LA R5,100 7934+* 7935+* MNOTE requires that ' is doubled for expanded variables 7936+* thus build &MASTR as a copy of '&ARGS with ' doubled 7937+* 7938+* 7939+*,// MVCL R2,R4 7940+* 7941+* finally generate code: &ICNT copies of &CO1 ... 7942+* 008296 1826 7943+ LR R2,R6 008298 4130 0064 00064 7944+ LA R3,100 00829C 1848 7945+ LR R4,R8 00829E 4150 0064 00064 7946+ LA R5,100 0082A2 0E24 7947+ MVCL R2,R4 0082A4 1826 7948+ LR R2,R6 0082A6 4130 0064 00064 7949+ LA R3,100 0082AA 1848 7950+ LR R4,R8 0082AC 4150 0064 00064 7951+ LA R5,100 0082B0 0E24 7952+ MVCL R2,R4 0082B2 1826 7953+ LR R2,R6 0082B4 4130 0064 00064 7954+ LA R3,100 0082B8 1848 7955+ LR R4,R8 0082BA 4150 0064 00064 7956+ LA R5,100 0082BE 0E24 7957+ MVCL R2,R4 PAGE 147 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0082C0 1826 7958+ LR R2,R6 0082C2 4130 0064 00064 7959+ LA R3,100 0082C6 1848 7960+ LR R4,R8 0082C8 4150 0064 00064 7961+ LA R5,100 0082CC 0E24 7962+ MVCL R2,R4 0082CE 1826 7963+ LR R2,R6 0082D0 4130 0064 00064 7964+ LA R3,100 0082D4 1848 7965+ LR R4,R8 0082D6 4150 0064 00064 7966+ LA R5,100 0082DA 0E24 7967+ MVCL R2,R4 0082DC 1826 7968+ LR R2,R6 0082DE 4130 0064 00064 7969+ LA R3,100 0082E2 1848 7970+ LR R4,R8 0082E4 4150 0064 00064 7971+ LA R5,100 0082E8 0E24 7972+ MVCL R2,R4 0082EA 1826 7973+ LR R2,R6 0082EC 4130 0064 00064 7974+ LA R3,100 0082F0 1848 7975+ LR R4,R8 0082F2 4150 0064 00064 7976+ LA R5,100 0082F6 0E24 7977+ MVCL R2,R4 0082F8 1826 7978+ LR R2,R6 0082FA 4130 0064 00064 7979+ LA R3,100 0082FE 1848 7980+ LR R4,R8 008300 4150 0064 00064 7981+ LA R5,100 008304 0E24 7982+ MVCL R2,R4 008306 1826 7983+ LR R2,R6 008308 4130 0064 00064 7984+ LA R3,100 00830C 1848 7985+ LR R4,R8 00830E 4150 0064 00064 7986+ LA R5,100 008312 0E24 7987+ MVCL R2,R4 008314 1826 7988+ LR R2,R6 008316 4130 0064 00064 7989+ LA R3,100 00831A 1848 7990+ LR R4,R8 00831C 4150 0064 00064 7991+ LA R5,100 008320 0E24 7992+ MVCL R2,R4 7993+* 008322 06FB 7994 BCTR R15,R11 7995 TSIMRET 008324 58F0 C0D0 08338 7996+ L R15,=A(SAVETST) R15 := current save area 008328 58DF 0004 00004 7997+ L R13,4(R15) get old save area back 00832C 98EC D00C 0000C 7998+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008330 07FE 7999+ BR 14 RETURN 02000000 8000 TSIMEND 008338 8001+ LTORG 008338 00000458 8002 =A(SAVETST) 00833C 000004B4 8003 =A(PBUF4K1) 008340 000004B8 8004 =A(PBUF4K2) 08344 8005+T171TEND EQU * 8006 * 8007 * Test 172 -- MVCL m,m (250b,copy) ------------------------- 8008 * 8009 TSIMBEG T172,9000,10,1,C'4*Lx;MVCL (250b)' 8010+* 002A44 8011+TDSCDAT CSECT 002A48 8012+ DS 0D PAGE 148 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 8013+* 002A48 00008348 8014+T172TDSC DC A(T172) // TENTRY 002A4C 000000DC 8015+ DC A(T172TEND-T172) // TLENGTH 002A50 00002328 8016+ DC F'9000' // TLRCNT 002A54 0000000A 8017+ DC F'10' // TIGCNT 002A58 00000001 8018+ DC F'1' // TLTYPE 001296 8019+TEXT CSECT 001296 E3F1F7F2 8020+SPTR0584 DC C'T172' 002A5C 8021+TDSCDAT CSECT 002A5C 8022+ DS 0F 002A5C 04001296 8023+ DC AL1(L'SPTR0584),AL3(SPTR0584) 00129A 8024+TEXT CSECT 00129A F45CD3A75ED4E5C3 8025+SPTR0585 DC C'4*Lx;MVCL (250b)' 002A60 8026+TDSCDAT CSECT 002A60 8027+ DS 0F 002A60 1000129A 8028+ DC AL1(L'SPTR0585),AL3(SPTR0585) 8029+* 004A74 8030+TDSCTBL CSECT 04A74 8031+T172TPTR EQU * 004A74 00002A48 8032+ DC A(T172TDSC) enabled test 8033+* 008344 8034+TCODE CSECT 008348 8035+ DS 0D ensure double word alignment for test 008348 8036+T172 DS 0H 01650000 008348 90EC D00C 0000C 8037+ STM 14,12,12(13) SAVE REGISTERS 02950000 00834C 18CF 8038+ LR R12,R15 base register := entry address 08348 8039+ USING T172,R12 declare code base register 00834E 41B0 C02E 08376 8040+ LA R11,T172L load loop target to R11 008352 58F0 C0D0 08418 8041+ L R15,=A(SAVETST) R15 := current save area 008356 50DF 0004 00004 8042+ ST R13,4(R15) set back pointer in current save area 00835A 182D 8043+ LR R2,R13 remember callers save area 00835C 18DF 8044+ LR R13,R15 setup current save area 00835E 50D2 0008 00008 8045+ ST R13,8(R2) set forw pointer in callers save area 00000 8046+ USING TDSC,R1 declare TDSC base register 008362 58F0 1008 00008 8047+ L R15,TLRCNT load local repeat count to R15 8048+* 8049 * 8050 * use sequence 8051 * LR R2,R6 dest addr 8052 * LA R3,250 dest length 8053 * LR R4,R8 source addr 8054 * LA R5,250 source length 8055 * MVCL R2,R4 doit 8056 * 008366 5860 C0D4 0841C 8057 L R6,=A(PBUF4K1) get ptr to ptr 00836A 5866 0000 00000 8058 L R6,0(R6) get ptr to BUF4K1 00836E 5880 C0D8 08420 8059 L R8,=A(PBUF4K2) get ptr to ptr 008372 5888 0000 00000 8060 L R8,0(R8) get ptr to BUF4K2 8061 T172L REPINSN LR,(R2,R6),LA,(R3,250), X LR,(R4,R8),LA,(R5,250), X MVCL,(R2,R4) 8062+* 8063+* build from sublist &ALIST* a comma separated string &ARGS* 8064+* 8065+* PAGE 149 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 8066+* 8067+* 8068+* 8069+* 8070+* 8071+* 8072+* 8073+* 8074+* 8075+* 08376 8076+T172L EQU * 8077+* 8078+* 8079+* write a comment indicating what REPINSN does (if NOGEN in effect) 8080+* 8081+*,// REPINSN: do 10 times: 8082+* 8083+* MNOTE requires that ' is doubled for expanded variables 8084+* thus build &MASTR as a copy of '&ARGS with ' doubled 8085+* 8086+* 8087+*,// LR R2,R6 8088+* 8089+* MNOTE requires that ' is doubled for expanded variables 8090+* thus build &MASTR as a copy of '&ARGS with ' doubled 8091+* 8092+* 8093+*,// LA R3,250 8094+* 8095+* MNOTE requires that ' is doubled for expanded variables 8096+* thus build &MASTR as a copy of '&ARGS with ' doubled 8097+* 8098+* 8099+*,// LR R4,R8 8100+* 8101+* MNOTE requires that ' is doubled for expanded variables 8102+* thus build &MASTR as a copy of '&ARGS with ' doubled 8103+* 8104+* 8105+*,// LA R5,250 8106+* 8107+* MNOTE requires that ' is doubled for expanded variables 8108+* thus build &MASTR as a copy of '&ARGS with ' doubled 8109+* 8110+* 8111+*,// MVCL R2,R4 8112+* 8113+* finally generate code: &ICNT copies of &CO1 ... 8114+* 008376 1826 8115+ LR R2,R6 008378 4130 00FA 000FA 8116+ LA R3,250 00837C 1848 8117+ LR R4,R8 00837E 4150 00FA 000FA 8118+ LA R5,250 008382 0E24 8119+ MVCL R2,R4 008384 1826 8120+ LR R2,R6 PAGE 150 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 008386 4130 00FA 000FA 8121+ LA R3,250 00838A 1848 8122+ LR R4,R8 00838C 4150 00FA 000FA 8123+ LA R5,250 008390 0E24 8124+ MVCL R2,R4 008392 1826 8125+ LR R2,R6 008394 4130 00FA 000FA 8126+ LA R3,250 008398 1848 8127+ LR R4,R8 00839A 4150 00FA 000FA 8128+ LA R5,250 00839E 0E24 8129+ MVCL R2,R4 0083A0 1826 8130+ LR R2,R6 0083A2 4130 00FA 000FA 8131+ LA R3,250 0083A6 1848 8132+ LR R4,R8 0083A8 4150 00FA 000FA 8133+ LA R5,250 0083AC 0E24 8134+ MVCL R2,R4 0083AE 1826 8135+ LR R2,R6 0083B0 4130 00FA 000FA 8136+ LA R3,250 0083B4 1848 8137+ LR R4,R8 0083B6 4150 00FA 000FA 8138+ LA R5,250 0083BA 0E24 8139+ MVCL R2,R4 0083BC 1826 8140+ LR R2,R6 0083BE 4130 00FA 000FA 8141+ LA R3,250 0083C2 1848 8142+ LR R4,R8 0083C4 4150 00FA 000FA 8143+ LA R5,250 0083C8 0E24 8144+ MVCL R2,R4 0083CA 1826 8145+ LR R2,R6 0083CC 4130 00FA 000FA 8146+ LA R3,250 0083D0 1848 8147+ LR R4,R8 0083D2 4150 00FA 000FA 8148+ LA R5,250 0083D6 0E24 8149+ MVCL R2,R4 0083D8 1826 8150+ LR R2,R6 0083DA 4130 00FA 000FA 8151+ LA R3,250 0083DE 1848 8152+ LR R4,R8 0083E0 4150 00FA 000FA 8153+ LA R5,250 0083E4 0E24 8154+ MVCL R2,R4 0083E6 1826 8155+ LR R2,R6 0083E8 4130 00FA 000FA 8156+ LA R3,250 0083EC 1848 8157+ LR R4,R8 0083EE 4150 00FA 000FA 8158+ LA R5,250 0083F2 0E24 8159+ MVCL R2,R4 0083F4 1826 8160+ LR R2,R6 0083F6 4130 00FA 000FA 8161+ LA R3,250 0083FA 1848 8162+ LR R4,R8 0083FC 4150 00FA 000FA 8163+ LA R5,250 008400 0E24 8164+ MVCL R2,R4 8165+* 008402 06FB 8166 BCTR R15,R11 8167 TSIMRET 008404 58F0 C0D0 08418 8168+ L R15,=A(SAVETST) R15 := current save area 008408 58DF 0004 00004 8169+ L R13,4(R15) get old save area back 00840C 98EC D00C 0000C 8170+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008410 07FE 8171+ BR 14 RETURN 02000000 8172 TSIMEND 008418 8173+ LTORG 008418 00000458 8174 =A(SAVETST) 00841C 000004B4 8175 =A(PBUF4K1) PAGE 151 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 008420 000004B8 8176 =A(PBUF4K2) 08424 8177+T172TEND EQU * 8178 * 8179 * Test 173 -- MVCL m,m (1kb,copy) -------------------------- 8180 * 8181 TSIMBEG T173,4500,10,1,C'4*Lx;MVCL (1kb)' 8182+* 002A64 8183+TDSCDAT CSECT 002A68 8184+ DS 0D 8185+* 002A68 00008428 8186+T173TDSC DC A(T173) // TENTRY 002A6C 000000DC 8187+ DC A(T173TEND-T173) // TLENGTH 002A70 00001194 8188+ DC F'4500' // TLRCNT 002A74 0000000A 8189+ DC F'10' // TIGCNT 002A78 00000001 8190+ DC F'1' // TLTYPE 0012AA 8191+TEXT CSECT 0012AA E3F1F7F3 8192+SPTR0604 DC C'T173' 002A7C 8193+TDSCDAT CSECT 002A7C 8194+ DS 0F 002A7C 040012AA 8195+ DC AL1(L'SPTR0604),AL3(SPTR0604) 0012AE 8196+TEXT CSECT 0012AE F45CD3A75ED4E5C3 8197+SPTR0605 DC C'4*Lx;MVCL (1kb)' 002A80 8198+TDSCDAT CSECT 002A80 8199+ DS 0F 002A80 0F0012AE 8200+ DC AL1(L'SPTR0605),AL3(SPTR0605) 8201+* 004A78 8202+TDSCTBL CSECT 04A78 8203+T173TPTR EQU * 004A78 00002A68 8204+ DC A(T173TDSC) enabled test 8205+* 008424 8206+TCODE CSECT 008428 8207+ DS 0D ensure double word alignment for test 008428 8208+T173 DS 0H 01650000 008428 90EC D00C 0000C 8209+ STM 14,12,12(13) SAVE REGISTERS 02950000 00842C 18CF 8210+ LR R12,R15 base register := entry address 08428 8211+ USING T173,R12 declare code base register 00842E 41B0 C02E 08456 8212+ LA R11,T173L load loop target to R11 008432 58F0 C0D0 084F8 8213+ L R15,=A(SAVETST) R15 := current save area 008436 50DF 0004 00004 8214+ ST R13,4(R15) set back pointer in current save area 00843A 182D 8215+ LR R2,R13 remember callers save area 00843C 18DF 8216+ LR R13,R15 setup current save area 00843E 50D2 0008 00008 8217+ ST R13,8(R2) set forw pointer in callers save area 00000 8218+ USING TDSC,R1 declare TDSC base register 008442 58F0 1008 00008 8219+ L R15,TLRCNT load local repeat count to R15 8220+* 8221 * 8222 * use sequence 8223 * LR R2,R6 dest addr 8224 * LA R3,1024 dest length 8225 * LR R4,R8 source addr 8226 * LA R5,1024 source length 8227 * MVCL R2,R4 doit 8228 * 008446 5860 C0D4 084FC 8229 L R6,=A(PBUF4K1) get ptr to ptr 00844A 5866 0000 00000 8230 L R6,0(R6) get ptr to BUF4K1 PAGE 152 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00844E 5880 C0D8 08500 8231 L R8,=A(PBUF4K2) get ptr to ptr 008452 5888 0000 00000 8232 L R8,0(R8) get ptr to BUF4K2 8233 T173L REPINSN LR,(R2,R6),LA,(R3,1024), X LR,(R4,R8),LA,(R5,1024), X MVCL,(R2,R4) 8234+* 8235+* build from sublist &ALIST* a comma separated string &ARGS* 8236+* 8237+* 8238+* 8239+* 8240+* 8241+* 8242+* 8243+* 8244+* 8245+* 8246+* 8247+* 08456 8248+T173L EQU * 8249+* 8250+* 8251+* write a comment indicating what REPINSN does (if NOGEN in effect) 8252+* 8253+*,// REPINSN: do 10 times: 8254+* 8255+* MNOTE requires that ' is doubled for expanded variables 8256+* thus build &MASTR as a copy of '&ARGS with ' doubled 8257+* 8258+* 8259+*,// LR R2,R6 8260+* 8261+* MNOTE requires that ' is doubled for expanded variables 8262+* thus build &MASTR as a copy of '&ARGS with ' doubled 8263+* 8264+* 8265+*,// LA R3,1024 8266+* 8267+* MNOTE requires that ' is doubled for expanded variables 8268+* thus build &MASTR as a copy of '&ARGS with ' doubled 8269+* 8270+* 8271+*,// LR R4,R8 8272+* 8273+* MNOTE requires that ' is doubled for expanded variables 8274+* thus build &MASTR as a copy of '&ARGS with ' doubled 8275+* 8276+* 8277+*,// LA R5,1024 8278+* 8279+* MNOTE requires that ' is doubled for expanded variables 8280+* thus build &MASTR as a copy of '&ARGS with ' doubled 8281+* 8282+* 8283+*,// MVCL R2,R4 PAGE 153 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 8284+* 8285+* finally generate code: &ICNT copies of &CO1 ... 8286+* 008456 1826 8287+ LR R2,R6 008458 4130 0400 00400 8288+ LA R3,1024 00845C 1848 8289+ LR R4,R8 00845E 4150 0400 00400 8290+ LA R5,1024 008462 0E24 8291+ MVCL R2,R4 008464 1826 8292+ LR R2,R6 008466 4130 0400 00400 8293+ LA R3,1024 00846A 1848 8294+ LR R4,R8 00846C 4150 0400 00400 8295+ LA R5,1024 008470 0E24 8296+ MVCL R2,R4 008472 1826 8297+ LR R2,R6 008474 4130 0400 00400 8298+ LA R3,1024 008478 1848 8299+ LR R4,R8 00847A 4150 0400 00400 8300+ LA R5,1024 00847E 0E24 8301+ MVCL R2,R4 008480 1826 8302+ LR R2,R6 008482 4130 0400 00400 8303+ LA R3,1024 008486 1848 8304+ LR R4,R8 008488 4150 0400 00400 8305+ LA R5,1024 00848C 0E24 8306+ MVCL R2,R4 00848E 1826 8307+ LR R2,R6 008490 4130 0400 00400 8308+ LA R3,1024 008494 1848 8309+ LR R4,R8 008496 4150 0400 00400 8310+ LA R5,1024 00849A 0E24 8311+ MVCL R2,R4 00849C 1826 8312+ LR R2,R6 00849E 4130 0400 00400 8313+ LA R3,1024 0084A2 1848 8314+ LR R4,R8 0084A4 4150 0400 00400 8315+ LA R5,1024 0084A8 0E24 8316+ MVCL R2,R4 0084AA 1826 8317+ LR R2,R6 0084AC 4130 0400 00400 8318+ LA R3,1024 0084B0 1848 8319+ LR R4,R8 0084B2 4150 0400 00400 8320+ LA R5,1024 0084B6 0E24 8321+ MVCL R2,R4 0084B8 1826 8322+ LR R2,R6 0084BA 4130 0400 00400 8323+ LA R3,1024 0084BE 1848 8324+ LR R4,R8 0084C0 4150 0400 00400 8325+ LA R5,1024 0084C4 0E24 8326+ MVCL R2,R4 0084C6 1826 8327+ LR R2,R6 0084C8 4130 0400 00400 8328+ LA R3,1024 0084CC 1848 8329+ LR R4,R8 0084CE 4150 0400 00400 8330+ LA R5,1024 0084D2 0E24 8331+ MVCL R2,R4 0084D4 1826 8332+ LR R2,R6 0084D6 4130 0400 00400 8333+ LA R3,1024 0084DA 1848 8334+ LR R4,R8 0084DC 4150 0400 00400 8335+ LA R5,1024 0084E0 0E24 8336+ MVCL R2,R4 8337+* 0084E2 06FB 8338 BCTR R15,R11 PAGE 154 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 8339 TSIMRET 0084E4 58F0 C0D0 084F8 8340+ L R15,=A(SAVETST) R15 := current save area 0084E8 58DF 0004 00004 8341+ L R13,4(R15) get old save area back 0084EC 98EC D00C 0000C 8342+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0084F0 07FE 8343+ BR 14 RETURN 02000000 8344 TSIMEND 0084F8 8345+ LTORG 0084F8 00000458 8346 =A(SAVETST) 0084FC 000004B4 8347 =A(PBUF4K1) 008500 000004B8 8348 =A(PBUF4K2) 08504 8349+T173TEND EQU * 8350 * 8351 * Test 174 -- MVCL m,m (4kb,copy) -------------------------- 8352 * 8353 TSIMBEG T174,1400,10,1,C'4*LR;MVCL (4kb)' 8354+* 002A84 8355+TDSCDAT CSECT 002A88 8356+ DS 0D 8357+* 002A88 00008508 8358+T174TDSC DC A(T174) // TENTRY 002A8C 000000B8 8359+ DC A(T174TEND-T174) // TLENGTH 002A90 00000578 8360+ DC F'1400' // TLRCNT 002A94 0000000A 8361+ DC F'10' // TIGCNT 002A98 00000001 8362+ DC F'1' // TLTYPE 0012BD 8363+TEXT CSECT 0012BD E3F1F7F4 8364+SPTR0624 DC C'T174' 002A9C 8365+TDSCDAT CSECT 002A9C 8366+ DS 0F 002A9C 040012BD 8367+ DC AL1(L'SPTR0624),AL3(SPTR0624) 0012C1 8368+TEXT CSECT 0012C1 F45CD3D95ED4E5C3 8369+SPTR0625 DC C'4*LR;MVCL (4kb)' 002AA0 8370+TDSCDAT CSECT 002AA0 8371+ DS 0F 002AA0 0F0012C1 8372+ DC AL1(L'SPTR0625),AL3(SPTR0625) 8373+* 004A7C 8374+TDSCTBL CSECT 04A7C 8375+T174TPTR EQU * 004A7C 00002A88 8376+ DC A(T174TDSC) enabled test 8377+* 008504 8378+TCODE CSECT 008508 8379+ DS 0D ensure double word alignment for test 008508 8380+T174 DS 0H 01650000 008508 90EC D00C 0000C 8381+ STM 14,12,12(13) SAVE REGISTERS 02950000 00850C 18CF 8382+ LR R12,R15 base register := entry address 08508 8383+ USING T174,R12 declare code base register 00850E 41B0 C032 0853A 8384+ LA R11,T174L load loop target to R11 008512 58F0 C0A8 085B0 8385+ L R15,=A(SAVETST) R15 := current save area 008516 50DF 0004 00004 8386+ ST R13,4(R15) set back pointer in current save area 00851A 182D 8387+ LR R2,R13 remember callers save area 00851C 18DF 8388+ LR R13,R15 setup current save area 00851E 50D2 0008 00008 8389+ ST R13,8(R2) set forw pointer in callers save area 00000 8390+ USING TDSC,R1 declare TDSC base register 008522 58F0 1008 00008 8391+ L R15,TLRCNT load local repeat count to R15 8392+* 8393 * PAGE 155 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 8394 * use sequence 8395 * LR R2,R6 dest addr 8396 * LR R3,R7 dest length 8397 * LR R4,R8 source addr 8398 * LR R5,R7 source length 8399 * MVCL R2,R4 doit 8400 * 008526 5860 C0AC 085B4 8401 L R6,=A(PBUF4K1) get ptr to ptr 00852A 5866 0000 00000 8402 L R6,0(R6) get ptr to BUF4K1 00852E 5880 C0B0 085B8 8403 L R8,=A(PBUF4K2) get ptr to ptr 008532 5888 0000 00000 8404 L R8,0(R8) get ptr to BUF4K2 008536 5870 C0B4 085BC 8405 L R7,=F'4096' transfer length 8406 T174L REPINSN LR,(R2,R6),LR,(R3,R7), X LR,(R4,R8),LR,(R5,R7), X MVCL,(R2,R4) 8407+* 8408+* build from sublist &ALIST* a comma separated string &ARGS* 8409+* 8410+* 8411+* 8412+* 8413+* 8414+* 8415+* 8416+* 8417+* 8418+* 8419+* 8420+* 0853A 8421+T174L EQU * 8422+* 8423+* 8424+* write a comment indicating what REPINSN does (if NOGEN in effect) 8425+* 8426+*,// REPINSN: do 10 times: 8427+* 8428+* MNOTE requires that ' is doubled for expanded variables 8429+* thus build &MASTR as a copy of '&ARGS with ' doubled 8430+* 8431+* 8432+*,// LR R2,R6 8433+* 8434+* MNOTE requires that ' is doubled for expanded variables 8435+* thus build &MASTR as a copy of '&ARGS with ' doubled 8436+* 8437+* 8438+*,// LR R3,R7 8439+* 8440+* MNOTE requires that ' is doubled for expanded variables 8441+* thus build &MASTR as a copy of '&ARGS with ' doubled 8442+* 8443+* 8444+*,// LR R4,R8 8445+* 8446+* MNOTE requires that ' is doubled for expanded variables PAGE 156 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 8447+* thus build &MASTR as a copy of '&ARGS with ' doubled 8448+* 8449+* 8450+*,// LR R5,R7 8451+* 8452+* MNOTE requires that ' is doubled for expanded variables 8453+* thus build &MASTR as a copy of '&ARGS with ' doubled 8454+* 8455+* 8456+*,// MVCL R2,R4 8457+* 8458+* finally generate code: &ICNT copies of &CO1 ... 8459+* 00853A 1826 8460+ LR R2,R6 00853C 1837 8461+ LR R3,R7 00853E 1848 8462+ LR R4,R8 008540 1857 8463+ LR R5,R7 008542 0E24 8464+ MVCL R2,R4 008544 1826 8465+ LR R2,R6 008546 1837 8466+ LR R3,R7 008548 1848 8467+ LR R4,R8 00854A 1857 8468+ LR R5,R7 00854C 0E24 8469+ MVCL R2,R4 00854E 1826 8470+ LR R2,R6 008550 1837 8471+ LR R3,R7 008552 1848 8472+ LR R4,R8 008554 1857 8473+ LR R5,R7 008556 0E24 8474+ MVCL R2,R4 008558 1826 8475+ LR R2,R6 00855A 1837 8476+ LR R3,R7 00855C 1848 8477+ LR R4,R8 00855E 1857 8478+ LR R5,R7 008560 0E24 8479+ MVCL R2,R4 008562 1826 8480+ LR R2,R6 008564 1837 8481+ LR R3,R7 008566 1848 8482+ LR R4,R8 008568 1857 8483+ LR R5,R7 00856A 0E24 8484+ MVCL R2,R4 00856C 1826 8485+ LR R2,R6 00856E 1837 8486+ LR R3,R7 008570 1848 8487+ LR R4,R8 008572 1857 8488+ LR R5,R7 008574 0E24 8489+ MVCL R2,R4 008576 1826 8490+ LR R2,R6 008578 1837 8491+ LR R3,R7 00857A 1848 8492+ LR R4,R8 00857C 1857 8493+ LR R5,R7 00857E 0E24 8494+ MVCL R2,R4 008580 1826 8495+ LR R2,R6 008582 1837 8496+ LR R3,R7 008584 1848 8497+ LR R4,R8 008586 1857 8498+ LR R5,R7 008588 0E24 8499+ MVCL R2,R4 00858A 1826 8500+ LR R2,R6 00858C 1837 8501+ LR R3,R7 PAGE 157 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00858E 1848 8502+ LR R4,R8 008590 1857 8503+ LR R5,R7 008592 0E24 8504+ MVCL R2,R4 008594 1826 8505+ LR R2,R6 008596 1837 8506+ LR R3,R7 008598 1848 8507+ LR R4,R8 00859A 1857 8508+ LR R5,R7 00859C 0E24 8509+ MVCL R2,R4 8510+* 00859E 06FB 8511 BCTR R15,R11 8512 TSIMRET 0085A0 58F0 C0A8 085B0 8513+ L R15,=A(SAVETST) R15 := current save area 0085A4 58DF 0004 00004 8514+ L R13,4(R15) get old save area back 0085A8 98EC D00C 0000C 8515+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0085AC 07FE 8516+ BR 14 RETURN 02000000 8517 TSIMEND 0085B0 8518+ LTORG 0085B0 00000458 8519 =A(SAVETST) 0085B4 000004B4 8520 =A(PBUF4K1) 0085B8 000004B8 8521 =A(PBUF4K2) 0085BC 00001000 8522 =F'4096' 085C0 8523+T174TEND EQU * 8524 * 8525 * Test 175 -- MVCL m,m (100b,pad) -------------------------- 8526 * 8527 TSIMBEG T175,15000,10,1,C'4*Lx;MVCL (100b,pad)' 8528+* 002AA4 8529+TDSCDAT CSECT 002AA8 8530+ DS 0D 8531+* 002AA8 000085C0 8532+T175TDSC DC A(T175) // TENTRY 002AAC 000000D4 8533+ DC A(T175TEND-T175) // TLENGTH 002AB0 00003A98 8534+ DC F'15000' // TLRCNT 002AB4 0000000A 8535+ DC F'10' // TIGCNT 002AB8 00000001 8536+ DC F'1' // TLTYPE 0012D0 8537+TEXT CSECT 0012D0 E3F1F7F5 8538+SPTR0644 DC C'T175' 002ABC 8539+TDSCDAT CSECT 002ABC 8540+ DS 0F 002ABC 040012D0 8541+ DC AL1(L'SPTR0644),AL3(SPTR0644) 0012D4 8542+TEXT CSECT 0012D4 F45CD3A75ED4E5C3 8543+SPTR0645 DC C'4*Lx;MVCL (100b,pad)' 002AC0 8544+TDSCDAT CSECT 002AC0 8545+ DS 0F 002AC0 140012D4 8546+ DC AL1(L'SPTR0645),AL3(SPTR0645) 8547+* 004A80 8548+TDSCTBL CSECT 04A80 8549+T175TPTR EQU * 004A80 00002AA8 8550+ DC A(T175TDSC) enabled test 8551+* 0085C0 8552+TCODE CSECT 0085C0 8553+ DS 0D ensure double word alignment for test 0085C0 8554+T175 DS 0H 01650000 0085C0 90EC D00C 0000C 8555+ STM 14,12,12(13) SAVE REGISTERS 02950000 0085C4 18CF 8556+ LR R12,R15 base register := entry address PAGE 158 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 085C0 8557+ USING T175,R12 declare code base register 0085C6 41B0 C02A 085EA 8558+ LA R11,T175L load loop target to R11 0085CA 58F0 C0C8 08688 8559+ L R15,=A(SAVETST) R15 := current save area 0085CE 50DF 0004 00004 8560+ ST R13,4(R15) set back pointer in current save area 0085D2 182D 8561+ LR R2,R13 remember callers save area 0085D4 18DF 8562+ LR R13,R15 setup current save area 0085D6 50D2 0008 00008 8563+ ST R13,8(R2) set forw pointer in callers save area 00000 8564+ USING TDSC,R1 declare TDSC base register 0085DA 58F0 1008 00008 8565+ L R15,TLRCNT load local repeat count to R15 8566+* 8567 * 8568 * use sequence 8569 * LR R2,R6 dest addr 8570 * LA R3,100 dest length 8571 * LA R4,0 source addr == 0 ! 8572 * LR R5,R9 source length == 0; setup pad byte 8573 * MVCL R2,R4 8574 * 0085DE 5860 C0CC 0868C 8575 L R6,=A(PBUF4K1) get ptr to ptr 0085E2 5866 0000 00000 8576 L R6,0(R6) get ptr to BUF4K1 0085E6 5890 C0D0 08690 8577 L R9,=X'FF000000' 8578 T175L REPINSN LR,(R2,R6),LA,(R3,100), X LA,(R4,0),LR,(R5,R9), X MVCL,(R2,R4) 8579+* 8580+* build from sublist &ALIST* a comma separated string &ARGS* 8581+* 8582+* 8583+* 8584+* 8585+* 8586+* 8587+* 8588+* 8589+* 8590+* 8591+* 8592+* 085EA 8593+T175L EQU * 8594+* 8595+* 8596+* write a comment indicating what REPINSN does (if NOGEN in effect) 8597+* 8598+*,// REPINSN: do 10 times: 8599+* 8600+* MNOTE requires that ' is doubled for expanded variables 8601+* thus build &MASTR as a copy of '&ARGS with ' doubled 8602+* 8603+* 8604+*,// LR R2,R6 8605+* 8606+* MNOTE requires that ' is doubled for expanded variables 8607+* thus build &MASTR as a copy of '&ARGS with ' doubled 8608+* 8609+* PAGE 159 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 8610+*,// LA R3,100 8611+* 8612+* MNOTE requires that ' is doubled for expanded variables 8613+* thus build &MASTR as a copy of '&ARGS with ' doubled 8614+* 8615+* 8616+*,// LA R4,0 8617+* 8618+* MNOTE requires that ' is doubled for expanded variables 8619+* thus build &MASTR as a copy of '&ARGS with ' doubled 8620+* 8621+* 8622+*,// LR R5,R9 8623+* 8624+* MNOTE requires that ' is doubled for expanded variables 8625+* thus build &MASTR as a copy of '&ARGS with ' doubled 8626+* 8627+* 8628+*,// MVCL R2,R4 8629+* 8630+* finally generate code: &ICNT copies of &CO1 ... 8631+* 0085EA 1826 8632+ LR R2,R6 0085EC 4130 0064 00064 8633+ LA R3,100 0085F0 4140 0000 00000 8634+ LA R4,0 0085F4 1859 8635+ LR R5,R9 0085F6 0E24 8636+ MVCL R2,R4 0085F8 1826 8637+ LR R2,R6 0085FA 4130 0064 00064 8638+ LA R3,100 0085FE 4140 0000 00000 8639+ LA R4,0 008602 1859 8640+ LR R5,R9 008604 0E24 8641+ MVCL R2,R4 008606 1826 8642+ LR R2,R6 008608 4130 0064 00064 8643+ LA R3,100 00860C 4140 0000 00000 8644+ LA R4,0 008610 1859 8645+ LR R5,R9 008612 0E24 8646+ MVCL R2,R4 008614 1826 8647+ LR R2,R6 008616 4130 0064 00064 8648+ LA R3,100 00861A 4140 0000 00000 8649+ LA R4,0 00861E 1859 8650+ LR R5,R9 008620 0E24 8651+ MVCL R2,R4 008622 1826 8652+ LR R2,R6 008624 4130 0064 00064 8653+ LA R3,100 008628 4140 0000 00000 8654+ LA R4,0 00862C 1859 8655+ LR R5,R9 00862E 0E24 8656+ MVCL R2,R4 008630 1826 8657+ LR R2,R6 008632 4130 0064 00064 8658+ LA R3,100 008636 4140 0000 00000 8659+ LA R4,0 00863A 1859 8660+ LR R5,R9 00863C 0E24 8661+ MVCL R2,R4 00863E 1826 8662+ LR R2,R6 008640 4130 0064 00064 8663+ LA R3,100 008644 4140 0000 00000 8664+ LA R4,0 PAGE 160 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 008648 1859 8665+ LR R5,R9 00864A 0E24 8666+ MVCL R2,R4 00864C 1826 8667+ LR R2,R6 00864E 4130 0064 00064 8668+ LA R3,100 008652 4140 0000 00000 8669+ LA R4,0 008656 1859 8670+ LR R5,R9 008658 0E24 8671+ MVCL R2,R4 00865A 1826 8672+ LR R2,R6 00865C 4130 0064 00064 8673+ LA R3,100 008660 4140 0000 00000 8674+ LA R4,0 008664 1859 8675+ LR R5,R9 008666 0E24 8676+ MVCL R2,R4 008668 1826 8677+ LR R2,R6 00866A 4130 0064 00064 8678+ LA R3,100 00866E 4140 0000 00000 8679+ LA R4,0 008672 1859 8680+ LR R5,R9 008674 0E24 8681+ MVCL R2,R4 8682+* 008676 06FB 8683 BCTR R15,R11 8684 TSIMRET 008678 58F0 C0C8 08688 8685+ L R15,=A(SAVETST) R15 := current save area 00867C 58DF 0004 00004 8686+ L R13,4(R15) get old save area back 008680 98EC D00C 0000C 8687+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008684 07FE 8688+ BR 14 RETURN 02000000 8689 TSIMEND 008688 8690+ LTORG 008688 00000458 8691 =A(SAVETST) 00868C 000004B4 8692 =A(PBUF4K1) 008690 FF000000 8693 =X'FF000000' 08694 8694+T175TEND EQU * 8695 * 8696 * Test 176 -- MVCL m,m (1kb,pad) --------------------------- 8697 * 8698 TSIMBEG T176,10000,10,1,C'4*Lx;MVCL (1kb,pad)' 8699+* 002AC4 8700+TDSCDAT CSECT 002AC8 8701+ DS 0D 8702+* 002AC8 00008698 8703+T176TDSC DC A(T176) // TENTRY 002ACC 000000D4 8704+ DC A(T176TEND-T176) // TLENGTH 002AD0 00002710 8705+ DC F'10000' // TLRCNT 002AD4 0000000A 8706+ DC F'10' // TIGCNT 002AD8 00000001 8707+ DC F'1' // TLTYPE 0012E8 8708+TEXT CSECT 0012E8 E3F1F7F6 8709+SPTR0664 DC C'T176' 002ADC 8710+TDSCDAT CSECT 002ADC 8711+ DS 0F 002ADC 040012E8 8712+ DC AL1(L'SPTR0664),AL3(SPTR0664) 0012EC 8713+TEXT CSECT 0012EC F45CD3A75ED4E5C3 8714+SPTR0665 DC C'4*Lx;MVCL (1kb,pad)' 002AE0 8715+TDSCDAT CSECT 002AE0 8716+ DS 0F 002AE0 130012EC 8717+ DC AL1(L'SPTR0665),AL3(SPTR0665) 8718+* 004A84 8719+TDSCTBL CSECT PAGE 161 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04A84 8720+T176TPTR EQU * 004A84 00002AC8 8721+ DC A(T176TDSC) enabled test 8722+* 008694 8723+TCODE CSECT 008698 8724+ DS 0D ensure double word alignment for test 008698 8725+T176 DS 0H 01650000 008698 90EC D00C 0000C 8726+ STM 14,12,12(13) SAVE REGISTERS 02950000 00869C 18CF 8727+ LR R12,R15 base register := entry address 08698 8728+ USING T176,R12 declare code base register 00869E 41B0 C02A 086C2 8729+ LA R11,T176L load loop target to R11 0086A2 58F0 C0C8 08760 8730+ L R15,=A(SAVETST) R15 := current save area 0086A6 50DF 0004 00004 8731+ ST R13,4(R15) set back pointer in current save area 0086AA 182D 8732+ LR R2,R13 remember callers save area 0086AC 18DF 8733+ LR R13,R15 setup current save area 0086AE 50D2 0008 00008 8734+ ST R13,8(R2) set forw pointer in callers save area 00000 8735+ USING TDSC,R1 declare TDSC base register 0086B2 58F0 1008 00008 8736+ L R15,TLRCNT load local repeat count to R15 8737+* 8738 * 8739 * use sequence 8740 * LR R2,R6 dest addr 8741 * LA R3,1024 dest length 8742 * LA R4,0 source addr == 0 ! 8743 * LR R5,R9 source length == 0; setup pad byte 8744 * MVCL R2,R4 8745 * 0086B6 5860 C0CC 08764 8746 L R6,=A(PBUF4K1) get ptr to ptr 0086BA 5866 0000 00000 8747 L R6,0(R6) get ptr to BUF4K1 0086BE 5890 C0D0 08768 8748 L R9,=X'FF000000' 8749 T176L REPINSN LR,(R2,R6),LA,(R3,1024), X LA,(R4,0),LR,(R5,R9), X MVCL,(R2,R4) 8750+* 8751+* build from sublist &ALIST* a comma separated string &ARGS* 8752+* 8753+* 8754+* 8755+* 8756+* 8757+* 8758+* 8759+* 8760+* 8761+* 8762+* 8763+* 086C2 8764+T176L EQU * 8765+* 8766+* 8767+* write a comment indicating what REPINSN does (if NOGEN in effect) 8768+* 8769+*,// REPINSN: do 10 times: 8770+* 8771+* MNOTE requires that ' is doubled for expanded variables 8772+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 162 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 8773+* 8774+* 8775+*,// LR R2,R6 8776+* 8777+* MNOTE requires that ' is doubled for expanded variables 8778+* thus build &MASTR as a copy of '&ARGS with ' doubled 8779+* 8780+* 8781+*,// LA R3,1024 8782+* 8783+* MNOTE requires that ' is doubled for expanded variables 8784+* thus build &MASTR as a copy of '&ARGS with ' doubled 8785+* 8786+* 8787+*,// LA R4,0 8788+* 8789+* MNOTE requires that ' is doubled for expanded variables 8790+* thus build &MASTR as a copy of '&ARGS with ' doubled 8791+* 8792+* 8793+*,// LR R5,R9 8794+* 8795+* MNOTE requires that ' is doubled for expanded variables 8796+* thus build &MASTR as a copy of '&ARGS with ' doubled 8797+* 8798+* 8799+*,// MVCL R2,R4 8800+* 8801+* finally generate code: &ICNT copies of &CO1 ... 8802+* 0086C2 1826 8803+ LR R2,R6 0086C4 4130 0400 00400 8804+ LA R3,1024 0086C8 4140 0000 00000 8805+ LA R4,0 0086CC 1859 8806+ LR R5,R9 0086CE 0E24 8807+ MVCL R2,R4 0086D0 1826 8808+ LR R2,R6 0086D2 4130 0400 00400 8809+ LA R3,1024 0086D6 4140 0000 00000 8810+ LA R4,0 0086DA 1859 8811+ LR R5,R9 0086DC 0E24 8812+ MVCL R2,R4 0086DE 1826 8813+ LR R2,R6 0086E0 4130 0400 00400 8814+ LA R3,1024 0086E4 4140 0000 00000 8815+ LA R4,0 0086E8 1859 8816+ LR R5,R9 0086EA 0E24 8817+ MVCL R2,R4 0086EC 1826 8818+ LR R2,R6 0086EE 4130 0400 00400 8819+ LA R3,1024 0086F2 4140 0000 00000 8820+ LA R4,0 0086F6 1859 8821+ LR R5,R9 0086F8 0E24 8822+ MVCL R2,R4 0086FA 1826 8823+ LR R2,R6 0086FC 4130 0400 00400 8824+ LA R3,1024 008700 4140 0000 00000 8825+ LA R4,0 008704 1859 8826+ LR R5,R9 008706 0E24 8827+ MVCL R2,R4 PAGE 163 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 008708 1826 8828+ LR R2,R6 00870A 4130 0400 00400 8829+ LA R3,1024 00870E 4140 0000 00000 8830+ LA R4,0 008712 1859 8831+ LR R5,R9 008714 0E24 8832+ MVCL R2,R4 008716 1826 8833+ LR R2,R6 008718 4130 0400 00400 8834+ LA R3,1024 00871C 4140 0000 00000 8835+ LA R4,0 008720 1859 8836+ LR R5,R9 008722 0E24 8837+ MVCL R2,R4 008724 1826 8838+ LR R2,R6 008726 4130 0400 00400 8839+ LA R3,1024 00872A 4140 0000 00000 8840+ LA R4,0 00872E 1859 8841+ LR R5,R9 008730 0E24 8842+ MVCL R2,R4 008732 1826 8843+ LR R2,R6 008734 4130 0400 00400 8844+ LA R3,1024 008738 4140 0000 00000 8845+ LA R4,0 00873C 1859 8846+ LR R5,R9 00873E 0E24 8847+ MVCL R2,R4 008740 1826 8848+ LR R2,R6 008742 4130 0400 00400 8849+ LA R3,1024 008746 4140 0000 00000 8850+ LA R4,0 00874A 1859 8851+ LR R5,R9 00874C 0E24 8852+ MVCL R2,R4 8853+* 00874E 06FB 8854 BCTR R15,R11 8855 TSIMRET 008750 58F0 C0C8 08760 8856+ L R15,=A(SAVETST) R15 := current save area 008754 58DF 0004 00004 8857+ L R13,4(R15) get old save area back 008758 98EC D00C 0000C 8858+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00875C 07FE 8859+ BR 14 RETURN 02000000 8860 TSIMEND 008760 8861+ LTORG 008760 00000458 8862 =A(SAVETST) 008764 000004B4 8863 =A(PBUF4K1) 008768 FF000000 8864 =X'FF000000' 0876C 8865+T176TEND EQU * 8866 * 8867 * Test 177 -- MVCL m,m (4kb,pad) --------------------------- 8868 * 8869 TSIMBEG T177,4500,10,1,C'4*Lx;MVCL (4kb,pad)' 8870+* 002AE4 8871+TDSCDAT CSECT 002AE8 8872+ DS 0D 8873+* 002AE8 00008770 8874+T177TDSC DC A(T177) // TENTRY 002AEC 000000C8 8875+ DC A(T177TEND-T177) // TLENGTH 002AF0 00001194 8876+ DC F'4500' // TLRCNT 002AF4 0000000A 8877+ DC F'10' // TIGCNT 002AF8 00000001 8878+ DC F'1' // TLTYPE 0012FF 8879+TEXT CSECT 0012FF E3F1F7F7 8880+SPTR0684 DC C'T177' 002AFC 8881+TDSCDAT CSECT 002AFC 8882+ DS 0F PAGE 164 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002AFC 040012FF 8883+ DC AL1(L'SPTR0684),AL3(SPTR0684) 001303 8884+TEXT CSECT 001303 F45CD3A75ED4E5C3 8885+SPTR0685 DC C'4*Lx;MVCL (4kb,pad)' 002B00 8886+TDSCDAT CSECT 002B00 8887+ DS 0F 002B00 13001303 8888+ DC AL1(L'SPTR0685),AL3(SPTR0685) 8889+* 004A88 8890+TDSCTBL CSECT 04A88 8891+T177TPTR EQU * 004A88 00002AE8 8892+ DC A(T177TDSC) enabled test 8893+* 00876C 8894+TCODE CSECT 008770 8895+ DS 0D ensure double word alignment for test 008770 8896+T177 DS 0H 01650000 008770 90EC D00C 0000C 8897+ STM 14,12,12(13) SAVE REGISTERS 02950000 008774 18CF 8898+ LR R12,R15 base register := entry address 08770 8899+ USING T177,R12 declare code base register 008776 41B0 C02E 0879E 8900+ LA R11,T177L load loop target to R11 00877A 58F0 C0B8 08828 8901+ L R15,=A(SAVETST) R15 := current save area 00877E 50DF 0004 00004 8902+ ST R13,4(R15) set back pointer in current save area 008782 182D 8903+ LR R2,R13 remember callers save area 008784 18DF 8904+ LR R13,R15 setup current save area 008786 50D2 0008 00008 8905+ ST R13,8(R2) set forw pointer in callers save area 00000 8906+ USING TDSC,R1 declare TDSC base register 00878A 58F0 1008 00008 8907+ L R15,TLRCNT load local repeat count to R15 8908+* 8909 * 8910 * use sequence 8911 * LR R2,R6 dest addr 8912 * LR R3,R7 dest length 8913 * LA R4,0 source addr == 0 ! 8914 * LR R5,R9 source length == 0; setup pad byte 8915 * MVCL R2,R4 8916 * 00878E 5860 C0BC 0882C 8917 L R6,=A(PBUF4K1) get ptr to ptr 008792 5866 0000 00000 8918 L R6,0(R6) get ptr to BUF4K1 008796 5870 C0C0 08830 8919 L R7,=F'4096' 00879A 5890 C0C4 08834 8920 L R9,=X'FF000000' 8921 T177L REPINSN LR,(R2,R6),LR,(R3,R7), X LA,(R4,0),LR,(R5,R9), X MVCL,(R2,R4) 8922+* 8923+* build from sublist &ALIST* a comma separated string &ARGS* 8924+* 8925+* 8926+* 8927+* 8928+* 8929+* 8930+* 8931+* 8932+* 8933+* 8934+* 8935+* PAGE 165 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0879E 8936+T177L EQU * 8937+* 8938+* 8939+* write a comment indicating what REPINSN does (if NOGEN in effect) 8940+* 8941+*,// REPINSN: do 10 times: 8942+* 8943+* MNOTE requires that ' is doubled for expanded variables 8944+* thus build &MASTR as a copy of '&ARGS with ' doubled 8945+* 8946+* 8947+*,// LR R2,R6 8948+* 8949+* MNOTE requires that ' is doubled for expanded variables 8950+* thus build &MASTR as a copy of '&ARGS with ' doubled 8951+* 8952+* 8953+*,// LR R3,R7 8954+* 8955+* MNOTE requires that ' is doubled for expanded variables 8956+* thus build &MASTR as a copy of '&ARGS with ' doubled 8957+* 8958+* 8959+*,// LA R4,0 8960+* 8961+* MNOTE requires that ' is doubled for expanded variables 8962+* thus build &MASTR as a copy of '&ARGS with ' doubled 8963+* 8964+* 8965+*,// LR R5,R9 8966+* 8967+* MNOTE requires that ' is doubled for expanded variables 8968+* thus build &MASTR as a copy of '&ARGS with ' doubled 8969+* 8970+* 8971+*,// MVCL R2,R4 8972+* 8973+* finally generate code: &ICNT copies of &CO1 ... 8974+* 00879E 1826 8975+ LR R2,R6 0087A0 1837 8976+ LR R3,R7 0087A2 4140 0000 00000 8977+ LA R4,0 0087A6 1859 8978+ LR R5,R9 0087A8 0E24 8979+ MVCL R2,R4 0087AA 1826 8980+ LR R2,R6 0087AC 1837 8981+ LR R3,R7 0087AE 4140 0000 00000 8982+ LA R4,0 0087B2 1859 8983+ LR R5,R9 0087B4 0E24 8984+ MVCL R2,R4 0087B6 1826 8985+ LR R2,R6 0087B8 1837 8986+ LR R3,R7 0087BA 4140 0000 00000 8987+ LA R4,0 0087BE 1859 8988+ LR R5,R9 0087C0 0E24 8989+ MVCL R2,R4 0087C2 1826 8990+ LR R2,R6 PAGE 166 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0087C4 1837 8991+ LR R3,R7 0087C6 4140 0000 00000 8992+ LA R4,0 0087CA 1859 8993+ LR R5,R9 0087CC 0E24 8994+ MVCL R2,R4 0087CE 1826 8995+ LR R2,R6 0087D0 1837 8996+ LR R3,R7 0087D2 4140 0000 00000 8997+ LA R4,0 0087D6 1859 8998+ LR R5,R9 0087D8 0E24 8999+ MVCL R2,R4 0087DA 1826 9000+ LR R2,R6 0087DC 1837 9001+ LR R3,R7 0087DE 4140 0000 00000 9002+ LA R4,0 0087E2 1859 9003+ LR R5,R9 0087E4 0E24 9004+ MVCL R2,R4 0087E6 1826 9005+ LR R2,R6 0087E8 1837 9006+ LR R3,R7 0087EA 4140 0000 00000 9007+ LA R4,0 0087EE 1859 9008+ LR R5,R9 0087F0 0E24 9009+ MVCL R2,R4 0087F2 1826 9010+ LR R2,R6 0087F4 1837 9011+ LR R3,R7 0087F6 4140 0000 00000 9012+ LA R4,0 0087FA 1859 9013+ LR R5,R9 0087FC 0E24 9014+ MVCL R2,R4 0087FE 1826 9015+ LR R2,R6 008800 1837 9016+ LR R3,R7 008802 4140 0000 00000 9017+ LA R4,0 008806 1859 9018+ LR R5,R9 008808 0E24 9019+ MVCL R2,R4 00880A 1826 9020+ LR R2,R6 00880C 1837 9021+ LR R3,R7 00880E 4140 0000 00000 9022+ LA R4,0 008812 1859 9023+ LR R5,R9 008814 0E24 9024+ MVCL R2,R4 9025+* 008816 06FB 9026 BCTR R15,R11 9027 TSIMRET 008818 58F0 C0B8 08828 9028+ L R15,=A(SAVETST) R15 := current save area 00881C 58DF 0004 00004 9029+ L R13,4(R15) get old save area back 008820 98EC D00C 0000C 9030+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008824 07FE 9031+ BR 14 RETURN 02000000 9032 TSIMEND 008828 9033+ LTORG 008828 00000458 9034 =A(SAVETST) 00882C 000004B4 9035 =A(PBUF4K1) 008830 00001000 9036 =F'4096' 008834 FF000000 9037 =X'FF000000' 08838 9038+T177TEND EQU * 9039 * 9040 * Test 178 -- MVCL m,m (1kb,over1) ------------------------- 9041 * test byte propagation usage of MVCL 9042 * destination offset by + 1 byte to source 9043 * 9044 TSIMBEG T178,21000,10,1,C'4*LA;MVCL (1kb,over1)' 9045+* PAGE 167 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002B04 9046+TDSCDAT CSECT 002B08 9047+ DS 0D 9048+* 002B08 00008838 9049+T178TDSC DC A(T178) // TENTRY 002B0C 000004EC 9050+ DC A(T178TEND-T178) // TLENGTH 002B10 00005208 9051+ DC F'21000' // TLRCNT 002B14 0000000A 9052+ DC F'10' // TIGCNT 002B18 00000001 9053+ DC F'1' // TLTYPE 001316 9054+TEXT CSECT 001316 E3F1F7F8 9055+SPTR0704 DC C'T178' 002B1C 9056+TDSCDAT CSECT 002B1C 9057+ DS 0F 002B1C 04001316 9058+ DC AL1(L'SPTR0704),AL3(SPTR0704) 00131A 9059+TEXT CSECT 00131A F45CD3C15ED4E5C3 9060+SPTR0705 DC C'4*LA;MVCL (1kb,over1)' 002B20 9061+TDSCDAT CSECT 002B20 9062+ DS 0F 002B20 1500131A 9063+ DC AL1(L'SPTR0705),AL3(SPTR0705) 9064+* 004A8C 9065+TDSCTBL CSECT 04A8C 9066+T178TPTR EQU * 004A8C 00002B08 9067+ DC A(T178TDSC) enabled test 9068+* 008838 9069+TCODE CSECT 008838 9070+ DS 0D ensure double word alignment for test 008838 9071+T178 DS 0H 01650000 008838 90EC D00C 0000C 9072+ STM 14,12,12(13) SAVE REGISTERS 02950000 00883C 18CF 9073+ LR R12,R15 base register := entry address 08838 9074+ USING T178,R12 declare code base register 00883E 41B0 C01E 08856 9075+ LA R11,T178L load loop target to R11 008842 58F0 C4E8 08D20 9076+ L R15,=A(SAVETST) R15 := current save area 008846 50DF 0004 00004 9077+ ST R13,4(R15) set back pointer in current save area 00884A 182D 9078+ LR R2,R13 remember callers save area 00884C 18DF 9079+ LR R13,R15 setup current save area 00884E 50D2 0008 00008 9080+ ST R13,8(R2) set forw pointer in callers save area 00000 9081+ USING TDSC,R1 declare TDSC base register 008852 58F0 1008 00008 9082+ L R15,TLRCNT load local repeat count to R15 9083+* 9084 * 9085 * use sequence 9086 * LA R2,T178V2 dest addr 9087 * LA R3,1024 dest length 9088 * LA R4,T178V1 source addr 9089 * LA R5,1024 source length 9090 * MVCL R2,R4 9091 * 9092 T178L REPINSN LA,(R2,T178V2),LA,(R3,1024), X LA,(R4,T178V1),LA,(R5,1024), X MVCL,(R2,R4) 9093+* 9094+* build from sublist &ALIST* a comma separated string &ARGS* 9095+* 9096+* 9097+* 9098+* PAGE 168 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 9099+* 9100+* 9101+* 9102+* 9103+* 9104+* 9105+* 9106+* 08856 9107+T178L EQU * 9108+* 9109+* 9110+* write a comment indicating what REPINSN does (if NOGEN in effect) 9111+* 9112+*,// REPINSN: do 10 times: 9113+* 9114+* MNOTE requires that ' is doubled for expanded variables 9115+* thus build &MASTR as a copy of '&ARGS with ' doubled 9116+* 9117+* 9118+*,// LA R2,T178V2 9119+* 9120+* MNOTE requires that ' is doubled for expanded variables 9121+* thus build &MASTR as a copy of '&ARGS with ' doubled 9122+* 9123+* 9124+*,// LA R3,1024 9125+* 9126+* MNOTE requires that ' is doubled for expanded variables 9127+* thus build &MASTR as a copy of '&ARGS with ' doubled 9128+* 9129+* 9130+*,// LA R4,T178V1 9131+* 9132+* MNOTE requires that ' is doubled for expanded variables 9133+* thus build &MASTR as a copy of '&ARGS with ' doubled 9134+* 9135+* 9136+*,// LA R5,1024 9137+* 9138+* MNOTE requires that ' is doubled for expanded variables 9139+* thus build &MASTR as a copy of '&ARGS with ' doubled 9140+* 9141+* 9142+*,// MVCL R2,R4 9143+* 9144+* finally generate code: &ICNT copies of &CO1 ... 9145+* 008856 4120 C0E3 0891B 9146+ LA R2,T178V2 00885A 4130 0400 00400 9147+ LA R3,1024 00885E 4140 C0E2 0891A 9148+ LA R4,T178V1 008862 4150 0400 00400 9149+ LA R5,1024 008866 0E24 9150+ MVCL R2,R4 008868 4120 C0E3 0891B 9151+ LA R2,T178V2 00886C 4130 0400 00400 9152+ LA R3,1024 008870 4140 C0E2 0891A 9153+ LA R4,T178V1 PAGE 169 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 008874 4150 0400 00400 9154+ LA R5,1024 008878 0E24 9155+ MVCL R2,R4 00887A 4120 C0E3 0891B 9156+ LA R2,T178V2 00887E 4130 0400 00400 9157+ LA R3,1024 008882 4140 C0E2 0891A 9158+ LA R4,T178V1 008886 4150 0400 00400 9159+ LA R5,1024 00888A 0E24 9160+ MVCL R2,R4 00888C 4120 C0E3 0891B 9161+ LA R2,T178V2 008890 4130 0400 00400 9162+ LA R3,1024 008894 4140 C0E2 0891A 9163+ LA R4,T178V1 008898 4150 0400 00400 9164+ LA R5,1024 00889C 0E24 9165+ MVCL R2,R4 00889E 4120 C0E3 0891B 9166+ LA R2,T178V2 0088A2 4130 0400 00400 9167+ LA R3,1024 0088A6 4140 C0E2 0891A 9168+ LA R4,T178V1 0088AA 4150 0400 00400 9169+ LA R5,1024 0088AE 0E24 9170+ MVCL R2,R4 0088B0 4120 C0E3 0891B 9171+ LA R2,T178V2 0088B4 4130 0400 00400 9172+ LA R3,1024 0088B8 4140 C0E2 0891A 9173+ LA R4,T178V1 0088BC 4150 0400 00400 9174+ LA R5,1024 0088C0 0E24 9175+ MVCL R2,R4 0088C2 4120 C0E3 0891B 9176+ LA R2,T178V2 0088C6 4130 0400 00400 9177+ LA R3,1024 0088CA 4140 C0E2 0891A 9178+ LA R4,T178V1 0088CE 4150 0400 00400 9179+ LA R5,1024 0088D2 0E24 9180+ MVCL R2,R4 0088D4 4120 C0E3 0891B 9181+ LA R2,T178V2 0088D8 4130 0400 00400 9182+ LA R3,1024 0088DC 4140 C0E2 0891A 9183+ LA R4,T178V1 0088E0 4150 0400 00400 9184+ LA R5,1024 0088E4 0E24 9185+ MVCL R2,R4 0088E6 4120 C0E3 0891B 9186+ LA R2,T178V2 0088EA 4130 0400 00400 9187+ LA R3,1024 0088EE 4140 C0E2 0891A 9188+ LA R4,T178V1 0088F2 4150 0400 00400 9189+ LA R5,1024 0088F6 0E24 9190+ MVCL R2,R4 0088F8 4120 C0E3 0891B 9191+ LA R2,T178V2 0088FC 4130 0400 00400 9192+ LA R3,1024 008900 4140 C0E2 0891A 9193+ LA R4,T178V1 008904 4150 0400 00400 9194+ LA R5,1024 008908 0E24 9195+ MVCL R2,R4 9196+* 00890A 06FB 9197 BCTR R15,R11 9198 TSIMRET 00890C 58F0 C4E8 08D20 9199+ L R15,=A(SAVETST) R15 := current save area 008910 58DF 0004 00004 9200+ L R13,4(R15) get old save area back 008914 98EC D00C 0000C 9201+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008918 07FE 9202+ BR 14 RETURN 02000000 9203 * 00891A E7 9204 T178V1 DC C'X' byte to propagate 00891B 9205 T178V2 DS 1024C into this target buffer 9206 TSIMEND 008D20 9207+ LTORG 008D20 00000458 9208 =A(SAVETST) PAGE 170 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 08D24 9209+T178TEND EQU * 9210 * 9211 * Test 179 -- MVCL m,m (1kb,over2) ------------------------- 9212 * test buffer shift left usage of MVCL 9213 * destination offset by -100 byte to source 9214 * 9215 TSIMBEG T179,4000,10,1,C'4*LA;MVCL (1kb,over2)' 9216+* 002B24 9217+TDSCDAT CSECT 002B28 9218+ DS 0D 9219+* 002B28 00008D28 9220+T179TDSC DC A(T179) // TENTRY 002B2C 0000054C 9221+ DC A(T179TEND-T179) // TLENGTH 002B30 00000FA0 9222+ DC F'4000' // TLRCNT 002B34 0000000A 9223+ DC F'10' // TIGCNT 002B38 00000001 9224+ DC F'1' // TLTYPE 00132F 9225+TEXT CSECT 00132F E3F1F7F9 9226+SPTR0724 DC C'T179' 002B3C 9227+TDSCDAT CSECT 002B3C 9228+ DS 0F 002B3C 0400132F 9229+ DC AL1(L'SPTR0724),AL3(SPTR0724) 001333 9230+TEXT CSECT 001333 F45CD3C15ED4E5C3 9231+SPTR0725 DC C'4*LA;MVCL (1kb,over2)' 002B40 9232+TDSCDAT CSECT 002B40 9233+ DS 0F 002B40 15001333 9234+ DC AL1(L'SPTR0725),AL3(SPTR0725) 9235+* 004A90 9236+TDSCTBL CSECT 04A90 9237+T179TPTR EQU * 004A90 00002B28 9238+ DC A(T179TDSC) enabled test 9239+* 008D24 9240+TCODE CSECT 008D28 9241+ DS 0D ensure double word alignment for test 008D28 9242+T179 DS 0H 01650000 008D28 90EC D00C 0000C 9243+ STM 14,12,12(13) SAVE REGISTERS 02950000 008D2C 18CF 9244+ LR R12,R15 base register := entry address 08D28 9245+ USING T179,R12 declare code base register 008D2E 41B0 C01E 08D46 9246+ LA R11,T179L load loop target to R11 008D32 58F0 C548 09270 9247+ L R15,=A(SAVETST) R15 := current save area 008D36 50DF 0004 00004 9248+ ST R13,4(R15) set back pointer in current save area 008D3A 182D 9249+ LR R2,R13 remember callers save area 008D3C 18DF 9250+ LR R13,R15 setup current save area 008D3E 50D2 0008 00008 9251+ ST R13,8(R2) set forw pointer in callers save area 00000 9252+ USING TDSC,R1 declare TDSC base register 008D42 58F0 1008 00008 9253+ L R15,TLRCNT load local repeat count to R15 9254+* 9255 * 9256 * use sequence 9257 * LA R2,T179V1 dest addr 9258 * LA R3,1024 dest length 9259 * LA R4,T179V2 source addr 9260 * LA R5,1024 source length 9261 * MVCL R2,R4 9262 * 9263 T179L REPINSN LA,(R2,T179V1),LA,(R3,1024), X PAGE 171 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 LA,(R4,T179V2),LA,(R5,1024), X MVCL,(R2,R4) 9264+* 9265+* build from sublist &ALIST* a comma separated string &ARGS* 9266+* 9267+* 9268+* 9269+* 9270+* 9271+* 9272+* 9273+* 9274+* 9275+* 9276+* 9277+* 08D46 9278+T179L EQU * 9279+* 9280+* 9281+* write a comment indicating what REPINSN does (if NOGEN in effect) 9282+* 9283+*,// REPINSN: do 10 times: 9284+* 9285+* MNOTE requires that ' is doubled for expanded variables 9286+* thus build &MASTR as a copy of '&ARGS with ' doubled 9287+* 9288+* 9289+*,// LA R2,T179V1 9290+* 9291+* MNOTE requires that ' is doubled for expanded variables 9292+* thus build &MASTR as a copy of '&ARGS with ' doubled 9293+* 9294+* 9295+*,// LA R3,1024 9296+* 9297+* MNOTE requires that ' is doubled for expanded variables 9298+* thus build &MASTR as a copy of '&ARGS with ' doubled 9299+* 9300+* 9301+*,// LA R4,T179V2 9302+* 9303+* MNOTE requires that ' is doubled for expanded variables 9304+* thus build &MASTR as a copy of '&ARGS with ' doubled 9305+* 9306+* 9307+*,// LA R5,1024 9308+* 9309+* MNOTE requires that ' is doubled for expanded variables 9310+* thus build &MASTR as a copy of '&ARGS with ' doubled 9311+* 9312+* 9313+*,// MVCL R2,R4 9314+* 9315+* finally generate code: &ICNT copies of &CO1 ... 9316+* PAGE 172 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 008D46 4120 C0E2 08E0A 9317+ LA R2,T179V1 008D4A 4130 0400 00400 9318+ LA R3,1024 008D4E 4140 C146 08E6E 9319+ LA R4,T179V2 008D52 4150 0400 00400 9320+ LA R5,1024 008D56 0E24 9321+ MVCL R2,R4 008D58 4120 C0E2 08E0A 9322+ LA R2,T179V1 008D5C 4130 0400 00400 9323+ LA R3,1024 008D60 4140 C146 08E6E 9324+ LA R4,T179V2 008D64 4150 0400 00400 9325+ LA R5,1024 008D68 0E24 9326+ MVCL R2,R4 008D6A 4120 C0E2 08E0A 9327+ LA R2,T179V1 008D6E 4130 0400 00400 9328+ LA R3,1024 008D72 4140 C146 08E6E 9329+ LA R4,T179V2 008D76 4150 0400 00400 9330+ LA R5,1024 008D7A 0E24 9331+ MVCL R2,R4 008D7C 4120 C0E2 08E0A 9332+ LA R2,T179V1 008D80 4130 0400 00400 9333+ LA R3,1024 008D84 4140 C146 08E6E 9334+ LA R4,T179V2 008D88 4150 0400 00400 9335+ LA R5,1024 008D8C 0E24 9336+ MVCL R2,R4 008D8E 4120 C0E2 08E0A 9337+ LA R2,T179V1 008D92 4130 0400 00400 9338+ LA R3,1024 008D96 4140 C146 08E6E 9339+ LA R4,T179V2 008D9A 4150 0400 00400 9340+ LA R5,1024 008D9E 0E24 9341+ MVCL R2,R4 008DA0 4120 C0E2 08E0A 9342+ LA R2,T179V1 008DA4 4130 0400 00400 9343+ LA R3,1024 008DA8 4140 C146 08E6E 9344+ LA R4,T179V2 008DAC 4150 0400 00400 9345+ LA R5,1024 008DB0 0E24 9346+ MVCL R2,R4 008DB2 4120 C0E2 08E0A 9347+ LA R2,T179V1 008DB6 4130 0400 00400 9348+ LA R3,1024 008DBA 4140 C146 08E6E 9349+ LA R4,T179V2 008DBE 4150 0400 00400 9350+ LA R5,1024 008DC2 0E24 9351+ MVCL R2,R4 008DC4 4120 C0E2 08E0A 9352+ LA R2,T179V1 008DC8 4130 0400 00400 9353+ LA R3,1024 008DCC 4140 C146 08E6E 9354+ LA R4,T179V2 008DD0 4150 0400 00400 9355+ LA R5,1024 008DD4 0E24 9356+ MVCL R2,R4 008DD6 4120 C0E2 08E0A 9357+ LA R2,T179V1 008DDA 4130 0400 00400 9358+ LA R3,1024 008DDE 4140 C146 08E6E 9359+ LA R4,T179V2 008DE2 4150 0400 00400 9360+ LA R5,1024 008DE6 0E24 9361+ MVCL R2,R4 008DE8 4120 C0E2 08E0A 9362+ LA R2,T179V1 008DEC 4130 0400 00400 9363+ LA R3,1024 008DF0 4140 C146 08E6E 9364+ LA R4,T179V2 008DF4 4150 0400 00400 9365+ LA R5,1024 008DF8 0E24 9366+ MVCL R2,R4 9367+* 008DFA 06FB 9368 BCTR R15,R11 9369 TSIMRET 008DFC 58F0 C548 09270 9370+ L R15,=A(SAVETST) R15 := current save area 008E00 58DF 0004 00004 9371+ L R13,4(R15) get old save area back PAGE 173 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 008E04 98EC D00C 0000C 9372+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 008E08 07FE 9373+ BR 14 RETURN 02000000 9374 * 008E0A 9375 T179V1 DS 100C target 008E6E 9376 T179V2 DS 1024C source (1/10th overlap) 9377 TSIMEND 009270 9378+ LTORG 009270 00000458 9379 =A(SAVETST) 09274 9380+T179TEND EQU * 9381 * 9382 * Test 19x -- IC =========================================== 9383 * 9384 * Test 190 -- IC R,m --------------------------------------- 9385 * 9386 TSIMBEG T190,6000,100,1,C'IC R,m' 9387+* 002B44 9388+TDSCDAT CSECT 002B48 9389+ DS 0D 9390+* 002B48 00009278 9391+T190TDSC DC A(T190) // TENTRY 002B4C 000001CC 9392+ DC A(T190TEND-T190) // TLENGTH 002B50 00001770 9393+ DC F'6000' // TLRCNT 002B54 00000064 9394+ DC F'100' // TIGCNT 002B58 00000001 9395+ DC F'1' // TLTYPE 001348 9396+TEXT CSECT 001348 E3F1F9F0 9397+SPTR0744 DC C'T190' 002B5C 9398+TDSCDAT CSECT 002B5C 9399+ DS 0F 002B5C 04001348 9400+ DC AL1(L'SPTR0744),AL3(SPTR0744) 00134C 9401+TEXT CSECT 00134C C9C340D96B94 9402+SPTR0745 DC C'IC R,m' 002B60 9403+TDSCDAT CSECT 002B60 9404+ DS 0F 002B60 0600134C 9405+ DC AL1(L'SPTR0745),AL3(SPTR0745) 9406+* 004A94 9407+TDSCTBL CSECT 04A94 9408+T190TPTR EQU * 004A94 00002B48 9409+ DC A(T190TDSC) enabled test 9410+* 009274 9411+TCODE CSECT 009278 9412+ DS 0D ensure double word alignment for test 009278 9413+T190 DS 0H 01650000 009278 90EC D00C 0000C 9414+ STM 14,12,12(13) SAVE REGISTERS 02950000 00927C 18CF 9415+ LR R12,R15 base register := entry address 09278 9416+ USING T190,R12 declare code base register 00927E 41B0 C020 09298 9417+ LA R11,T190L load loop target to R11 009282 58F0 C1C8 09440 9418+ L R15,=A(SAVETST) R15 := current save area 009286 50DF 0004 00004 9419+ ST R13,4(R15) set back pointer in current save area 00928A 182D 9420+ LR R2,R13 remember callers save area 00928C 18DF 9421+ LR R13,R15 setup current save area 00928E 50D2 0008 00008 9422+ ST R13,8(R2) set forw pointer in callers save area 00000 9423+ USING TDSC,R1 declare TDSC base register 009292 58F0 1008 00008 9424+ L R15,TLRCNT load local repeat count to R15 9425+* 9426 * PAGE 174 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009296 1722 9427 XR R2,R2 9428 T190L REPINS IC,(R2,T190V1) repeat: IC R2,T190V1 9429+* 9430+* build from sublist &ALIST a comma separated string &ARGS 9431+* 9432+* 9433+* 9434+* 9435+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 9436+* this allows to transfer the repeat count from last TDSCGEN call 9437+* 9438+* 09298 9439+T190L EQU * 9440+* 9441+* write a comment indicating what REPINS does (in case NOGEN in effect) 9442+* 9443+*,// REPINS: do 100 times: 9444+* 9445+* MNOTE requires that ' is doubled for expanded variables 9446+* thus build &MASTR as a copy of '&ARGS with ' doubled 9447+* 9448+* 9449+*,// IC R2,T190V1 9450+* 9451+* finally generate code: &ICNT copies of &CODE &ARGS 9452+* 009298 4320 C1C0 09438 9453+ IC R2,T190V1 00929C 4320 C1C0 09438 9454+ IC R2,T190V1 0092A0 4320 C1C0 09438 9455+ IC R2,T190V1 0092A4 4320 C1C0 09438 9456+ IC R2,T190V1 0092A8 4320 C1C0 09438 9457+ IC R2,T190V1 0092AC 4320 C1C0 09438 9458+ IC R2,T190V1 0092B0 4320 C1C0 09438 9459+ IC R2,T190V1 0092B4 4320 C1C0 09438 9460+ IC R2,T190V1 0092B8 4320 C1C0 09438 9461+ IC R2,T190V1 0092BC 4320 C1C0 09438 9462+ IC R2,T190V1 0092C0 4320 C1C0 09438 9463+ IC R2,T190V1 0092C4 4320 C1C0 09438 9464+ IC R2,T190V1 0092C8 4320 C1C0 09438 9465+ IC R2,T190V1 0092CC 4320 C1C0 09438 9466+ IC R2,T190V1 0092D0 4320 C1C0 09438 9467+ IC R2,T190V1 0092D4 4320 C1C0 09438 9468+ IC R2,T190V1 0092D8 4320 C1C0 09438 9469+ IC R2,T190V1 0092DC 4320 C1C0 09438 9470+ IC R2,T190V1 0092E0 4320 C1C0 09438 9471+ IC R2,T190V1 0092E4 4320 C1C0 09438 9472+ IC R2,T190V1 0092E8 4320 C1C0 09438 9473+ IC R2,T190V1 0092EC 4320 C1C0 09438 9474+ IC R2,T190V1 0092F0 4320 C1C0 09438 9475+ IC R2,T190V1 0092F4 4320 C1C0 09438 9476+ IC R2,T190V1 0092F8 4320 C1C0 09438 9477+ IC R2,T190V1 0092FC 4320 C1C0 09438 9478+ IC R2,T190V1 009300 4320 C1C0 09438 9479+ IC R2,T190V1 009304 4320 C1C0 09438 9480+ IC R2,T190V1 009308 4320 C1C0 09438 9481+ IC R2,T190V1 PAGE 175 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00930C 4320 C1C0 09438 9482+ IC R2,T190V1 009310 4320 C1C0 09438 9483+ IC R2,T190V1 009314 4320 C1C0 09438 9484+ IC R2,T190V1 009318 4320 C1C0 09438 9485+ IC R2,T190V1 00931C 4320 C1C0 09438 9486+ IC R2,T190V1 009320 4320 C1C0 09438 9487+ IC R2,T190V1 009324 4320 C1C0 09438 9488+ IC R2,T190V1 009328 4320 C1C0 09438 9489+ IC R2,T190V1 00932C 4320 C1C0 09438 9490+ IC R2,T190V1 009330 4320 C1C0 09438 9491+ IC R2,T190V1 009334 4320 C1C0 09438 9492+ IC R2,T190V1 009338 4320 C1C0 09438 9493+ IC R2,T190V1 00933C 4320 C1C0 09438 9494+ IC R2,T190V1 009340 4320 C1C0 09438 9495+ IC R2,T190V1 009344 4320 C1C0 09438 9496+ IC R2,T190V1 009348 4320 C1C0 09438 9497+ IC R2,T190V1 00934C 4320 C1C0 09438 9498+ IC R2,T190V1 009350 4320 C1C0 09438 9499+ IC R2,T190V1 009354 4320 C1C0 09438 9500+ IC R2,T190V1 009358 4320 C1C0 09438 9501+ IC R2,T190V1 00935C 4320 C1C0 09438 9502+ IC R2,T190V1 009360 4320 C1C0 09438 9503+ IC R2,T190V1 009364 4320 C1C0 09438 9504+ IC R2,T190V1 009368 4320 C1C0 09438 9505+ IC R2,T190V1 00936C 4320 C1C0 09438 9506+ IC R2,T190V1 009370 4320 C1C0 09438 9507+ IC R2,T190V1 009374 4320 C1C0 09438 9508+ IC R2,T190V1 009378 4320 C1C0 09438 9509+ IC R2,T190V1 00937C 4320 C1C0 09438 9510+ IC R2,T190V1 009380 4320 C1C0 09438 9511+ IC R2,T190V1 009384 4320 C1C0 09438 9512+ IC R2,T190V1 009388 4320 C1C0 09438 9513+ IC R2,T190V1 00938C 4320 C1C0 09438 9514+ IC R2,T190V1 009390 4320 C1C0 09438 9515+ IC R2,T190V1 009394 4320 C1C0 09438 9516+ IC R2,T190V1 009398 4320 C1C0 09438 9517+ IC R2,T190V1 00939C 4320 C1C0 09438 9518+ IC R2,T190V1 0093A0 4320 C1C0 09438 9519+ IC R2,T190V1 0093A4 4320 C1C0 09438 9520+ IC R2,T190V1 0093A8 4320 C1C0 09438 9521+ IC R2,T190V1 0093AC 4320 C1C0 09438 9522+ IC R2,T190V1 0093B0 4320 C1C0 09438 9523+ IC R2,T190V1 0093B4 4320 C1C0 09438 9524+ IC R2,T190V1 0093B8 4320 C1C0 09438 9525+ IC R2,T190V1 0093BC 4320 C1C0 09438 9526+ IC R2,T190V1 0093C0 4320 C1C0 09438 9527+ IC R2,T190V1 0093C4 4320 C1C0 09438 9528+ IC R2,T190V1 0093C8 4320 C1C0 09438 9529+ IC R2,T190V1 0093CC 4320 C1C0 09438 9530+ IC R2,T190V1 0093D0 4320 C1C0 09438 9531+ IC R2,T190V1 0093D4 4320 C1C0 09438 9532+ IC R2,T190V1 0093D8 4320 C1C0 09438 9533+ IC R2,T190V1 0093DC 4320 C1C0 09438 9534+ IC R2,T190V1 0093E0 4320 C1C0 09438 9535+ IC R2,T190V1 0093E4 4320 C1C0 09438 9536+ IC R2,T190V1 PAGE 176 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0093E8 4320 C1C0 09438 9537+ IC R2,T190V1 0093EC 4320 C1C0 09438 9538+ IC R2,T190V1 0093F0 4320 C1C0 09438 9539+ IC R2,T190V1 0093F4 4320 C1C0 09438 9540+ IC R2,T190V1 0093F8 4320 C1C0 09438 9541+ IC R2,T190V1 0093FC 4320 C1C0 09438 9542+ IC R2,T190V1 009400 4320 C1C0 09438 9543+ IC R2,T190V1 009404 4320 C1C0 09438 9544+ IC R2,T190V1 009408 4320 C1C0 09438 9545+ IC R2,T190V1 00940C 4320 C1C0 09438 9546+ IC R2,T190V1 009410 4320 C1C0 09438 9547+ IC R2,T190V1 009414 4320 C1C0 09438 9548+ IC R2,T190V1 009418 4320 C1C0 09438 9549+ IC R2,T190V1 00941C 4320 C1C0 09438 9550+ IC R2,T190V1 009420 4320 C1C0 09438 9551+ IC R2,T190V1 009424 4320 C1C0 09438 9552+ IC R2,T190V1 9553+* 009428 06FB 9554 BCTR R15,R11 9555 TSIMRET 00942A 58F0 C1C8 09440 9556+ L R15,=A(SAVETST) R15 := current save area 00942E 58DF 0004 00004 9557+ L R13,4(R15) get old save area back 009432 98EC D00C 0000C 9558+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009436 07FE 9559+ BR 14 RETURN 02000000 9560 * 009438 40 9561 T190V1 DC C' ' 9562 TSIMEND 009440 9563+ LTORG 009440 00000458 9564 =A(SAVETST) 09444 9565+T190TEND EQU * 9566 * 9567 * Test 191 -- ICM R,m (1c) --------------------------------- 9568 * 9569 TSIMBEG T191,3000,100,1,C'ICM R,i,m (0010)' 9570+* 002B64 9571+TDSCDAT CSECT 002B68 9572+ DS 0D 9573+* 002B68 00009448 9574+T191TDSC DC A(T191) // TENTRY 002B6C 000001CC 9575+ DC A(T191TEND-T191) // TLENGTH 002B70 00000BB8 9576+ DC F'3000' // TLRCNT 002B74 00000064 9577+ DC F'100' // TIGCNT 002B78 00000001 9578+ DC F'1' // TLTYPE 001352 9579+TEXT CSECT 001352 E3F1F9F1 9580+SPTR0756 DC C'T191' 002B7C 9581+TDSCDAT CSECT 002B7C 9582+ DS 0F 002B7C 04001352 9583+ DC AL1(L'SPTR0756),AL3(SPTR0756) 001356 9584+TEXT CSECT 001356 C9C3D440D96B896B 9585+SPTR0757 DC C'ICM R,i,m (0010)' 002B80 9586+TDSCDAT CSECT 002B80 9587+ DS 0F 002B80 10001356 9588+ DC AL1(L'SPTR0757),AL3(SPTR0757) 9589+* 004A98 9590+TDSCTBL CSECT 04A98 9591+T191TPTR EQU * PAGE 177 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004A98 00002B68 9592+ DC A(T191TDSC) enabled test 9593+* 009444 9594+TCODE CSECT 009448 9595+ DS 0D ensure double word alignment for test 009448 9596+T191 DS 0H 01650000 009448 90EC D00C 0000C 9597+ STM 14,12,12(13) SAVE REGISTERS 02950000 00944C 18CF 9598+ LR R12,R15 base register := entry address 09448 9599+ USING T191,R12 declare code base register 00944E 41B0 C020 09468 9600+ LA R11,T191L load loop target to R11 009452 58F0 C1C8 09610 9601+ L R15,=A(SAVETST) R15 := current save area 009456 50DF 0004 00004 9602+ ST R13,4(R15) set back pointer in current save area 00945A 182D 9603+ LR R2,R13 remember callers save area 00945C 18DF 9604+ LR R13,R15 setup current save area 00945E 50D2 0008 00008 9605+ ST R13,8(R2) set forw pointer in callers save area 00000 9606+ USING TDSC,R1 declare TDSC base register 009462 58F0 1008 00008 9607+ L R15,TLRCNT load local repeat count to R15 9608+* 9609 * 009466 1722 9610 XR R2,R2 9611 T191L REPINS ICM,(R2,B'0010',T191V1) repeat: ICM R2,B'0010',T191V1 9612+* 9613+* build from sublist &ALIST a comma separated string &ARGS 9614+* 9615+* 9616+* 9617+* 9618+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 9619+* this allows to transfer the repeat count from last TDSCGEN call 9620+* 9621+* 09468 9622+T191L EQU * 9623+* 9624+* write a comment indicating what REPINS does (in case NOGEN in effect) 9625+* 9626+*,// REPINS: do 100 times: 9627+* 9628+* MNOTE requires that ' is doubled for expanded variables 9629+* thus build &MASTR as a copy of '&ARGS with ' doubled 9630+* 9631+* 9632+*,// ICM R2,B'0010',T191V1 9633+* 9634+* finally generate code: &ICNT copies of &CODE &ARGS 9635+* 009468 BF22 C1C0 09608 9636+ ICM R2,B'0010',T191V1 00946C BF22 C1C0 09608 9637+ ICM R2,B'0010',T191V1 009470 BF22 C1C0 09608 9638+ ICM R2,B'0010',T191V1 009474 BF22 C1C0 09608 9639+ ICM R2,B'0010',T191V1 009478 BF22 C1C0 09608 9640+ ICM R2,B'0010',T191V1 00947C BF22 C1C0 09608 9641+ ICM R2,B'0010',T191V1 009480 BF22 C1C0 09608 9642+ ICM R2,B'0010',T191V1 009484 BF22 C1C0 09608 9643+ ICM R2,B'0010',T191V1 009488 BF22 C1C0 09608 9644+ ICM R2,B'0010',T191V1 00948C BF22 C1C0 09608 9645+ ICM R2,B'0010',T191V1 009490 BF22 C1C0 09608 9646+ ICM R2,B'0010',T191V1 PAGE 178 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009494 BF22 C1C0 09608 9647+ ICM R2,B'0010',T191V1 009498 BF22 C1C0 09608 9648+ ICM R2,B'0010',T191V1 00949C BF22 C1C0 09608 9649+ ICM R2,B'0010',T191V1 0094A0 BF22 C1C0 09608 9650+ ICM R2,B'0010',T191V1 0094A4 BF22 C1C0 09608 9651+ ICM R2,B'0010',T191V1 0094A8 BF22 C1C0 09608 9652+ ICM R2,B'0010',T191V1 0094AC BF22 C1C0 09608 9653+ ICM R2,B'0010',T191V1 0094B0 BF22 C1C0 09608 9654+ ICM R2,B'0010',T191V1 0094B4 BF22 C1C0 09608 9655+ ICM R2,B'0010',T191V1 0094B8 BF22 C1C0 09608 9656+ ICM R2,B'0010',T191V1 0094BC BF22 C1C0 09608 9657+ ICM R2,B'0010',T191V1 0094C0 BF22 C1C0 09608 9658+ ICM R2,B'0010',T191V1 0094C4 BF22 C1C0 09608 9659+ ICM R2,B'0010',T191V1 0094C8 BF22 C1C0 09608 9660+ ICM R2,B'0010',T191V1 0094CC BF22 C1C0 09608 9661+ ICM R2,B'0010',T191V1 0094D0 BF22 C1C0 09608 9662+ ICM R2,B'0010',T191V1 0094D4 BF22 C1C0 09608 9663+ ICM R2,B'0010',T191V1 0094D8 BF22 C1C0 09608 9664+ ICM R2,B'0010',T191V1 0094DC BF22 C1C0 09608 9665+ ICM R2,B'0010',T191V1 0094E0 BF22 C1C0 09608 9666+ ICM R2,B'0010',T191V1 0094E4 BF22 C1C0 09608 9667+ ICM R2,B'0010',T191V1 0094E8 BF22 C1C0 09608 9668+ ICM R2,B'0010',T191V1 0094EC BF22 C1C0 09608 9669+ ICM R2,B'0010',T191V1 0094F0 BF22 C1C0 09608 9670+ ICM R2,B'0010',T191V1 0094F4 BF22 C1C0 09608 9671+ ICM R2,B'0010',T191V1 0094F8 BF22 C1C0 09608 9672+ ICM R2,B'0010',T191V1 0094FC BF22 C1C0 09608 9673+ ICM R2,B'0010',T191V1 009500 BF22 C1C0 09608 9674+ ICM R2,B'0010',T191V1 009504 BF22 C1C0 09608 9675+ ICM R2,B'0010',T191V1 009508 BF22 C1C0 09608 9676+ ICM R2,B'0010',T191V1 00950C BF22 C1C0 09608 9677+ ICM R2,B'0010',T191V1 009510 BF22 C1C0 09608 9678+ ICM R2,B'0010',T191V1 009514 BF22 C1C0 09608 9679+ ICM R2,B'0010',T191V1 009518 BF22 C1C0 09608 9680+ ICM R2,B'0010',T191V1 00951C BF22 C1C0 09608 9681+ ICM R2,B'0010',T191V1 009520 BF22 C1C0 09608 9682+ ICM R2,B'0010',T191V1 009524 BF22 C1C0 09608 9683+ ICM R2,B'0010',T191V1 009528 BF22 C1C0 09608 9684+ ICM R2,B'0010',T191V1 00952C BF22 C1C0 09608 9685+ ICM R2,B'0010',T191V1 009530 BF22 C1C0 09608 9686+ ICM R2,B'0010',T191V1 009534 BF22 C1C0 09608 9687+ ICM R2,B'0010',T191V1 009538 BF22 C1C0 09608 9688+ ICM R2,B'0010',T191V1 00953C BF22 C1C0 09608 9689+ ICM R2,B'0010',T191V1 009540 BF22 C1C0 09608 9690+ ICM R2,B'0010',T191V1 009544 BF22 C1C0 09608 9691+ ICM R2,B'0010',T191V1 009548 BF22 C1C0 09608 9692+ ICM R2,B'0010',T191V1 00954C BF22 C1C0 09608 9693+ ICM R2,B'0010',T191V1 009550 BF22 C1C0 09608 9694+ ICM R2,B'0010',T191V1 009554 BF22 C1C0 09608 9695+ ICM R2,B'0010',T191V1 009558 BF22 C1C0 09608 9696+ ICM R2,B'0010',T191V1 00955C BF22 C1C0 09608 9697+ ICM R2,B'0010',T191V1 009560 BF22 C1C0 09608 9698+ ICM R2,B'0010',T191V1 009564 BF22 C1C0 09608 9699+ ICM R2,B'0010',T191V1 009568 BF22 C1C0 09608 9700+ ICM R2,B'0010',T191V1 00956C BF22 C1C0 09608 9701+ ICM R2,B'0010',T191V1 PAGE 179 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009570 BF22 C1C0 09608 9702+ ICM R2,B'0010',T191V1 009574 BF22 C1C0 09608 9703+ ICM R2,B'0010',T191V1 009578 BF22 C1C0 09608 9704+ ICM R2,B'0010',T191V1 00957C BF22 C1C0 09608 9705+ ICM R2,B'0010',T191V1 009580 BF22 C1C0 09608 9706+ ICM R2,B'0010',T191V1 009584 BF22 C1C0 09608 9707+ ICM R2,B'0010',T191V1 009588 BF22 C1C0 09608 9708+ ICM R2,B'0010',T191V1 00958C BF22 C1C0 09608 9709+ ICM R2,B'0010',T191V1 009590 BF22 C1C0 09608 9710+ ICM R2,B'0010',T191V1 009594 BF22 C1C0 09608 9711+ ICM R2,B'0010',T191V1 009598 BF22 C1C0 09608 9712+ ICM R2,B'0010',T191V1 00959C BF22 C1C0 09608 9713+ ICM R2,B'0010',T191V1 0095A0 BF22 C1C0 09608 9714+ ICM R2,B'0010',T191V1 0095A4 BF22 C1C0 09608 9715+ ICM R2,B'0010',T191V1 0095A8 BF22 C1C0 09608 9716+ ICM R2,B'0010',T191V1 0095AC BF22 C1C0 09608 9717+ ICM R2,B'0010',T191V1 0095B0 BF22 C1C0 09608 9718+ ICM R2,B'0010',T191V1 0095B4 BF22 C1C0 09608 9719+ ICM R2,B'0010',T191V1 0095B8 BF22 C1C0 09608 9720+ ICM R2,B'0010',T191V1 0095BC BF22 C1C0 09608 9721+ ICM R2,B'0010',T191V1 0095C0 BF22 C1C0 09608 9722+ ICM R2,B'0010',T191V1 0095C4 BF22 C1C0 09608 9723+ ICM R2,B'0010',T191V1 0095C8 BF22 C1C0 09608 9724+ ICM R2,B'0010',T191V1 0095CC BF22 C1C0 09608 9725+ ICM R2,B'0010',T191V1 0095D0 BF22 C1C0 09608 9726+ ICM R2,B'0010',T191V1 0095D4 BF22 C1C0 09608 9727+ ICM R2,B'0010',T191V1 0095D8 BF22 C1C0 09608 9728+ ICM R2,B'0010',T191V1 0095DC BF22 C1C0 09608 9729+ ICM R2,B'0010',T191V1 0095E0 BF22 C1C0 09608 9730+ ICM R2,B'0010',T191V1 0095E4 BF22 C1C0 09608 9731+ ICM R2,B'0010',T191V1 0095E8 BF22 C1C0 09608 9732+ ICM R2,B'0010',T191V1 0095EC BF22 C1C0 09608 9733+ ICM R2,B'0010',T191V1 0095F0 BF22 C1C0 09608 9734+ ICM R2,B'0010',T191V1 0095F4 BF22 C1C0 09608 9735+ ICM R2,B'0010',T191V1 9736+* 0095F8 06FB 9737 BCTR R15,R11 9738 TSIMRET 0095FA 58F0 C1C8 09610 9739+ L R15,=A(SAVETST) R15 := current save area 0095FE 58DF 0004 00004 9740+ L R13,4(R15) get old save area back 009602 98EC D00C 0000C 9741+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009606 07FE 9742+ BR 14 RETURN 02000000 9743 * 009608 9744 DS 0F 009608 F2 9745 T191V1 DC C'2' 9746 TSIMEND 009610 9747+ LTORG 009610 00000458 9748 =A(SAVETST) 09614 9749+T191TEND EQU * 9750 * 9751 * Test 192 -- ICM R,m (2c) --------------------------------- 9752 * 9753 TSIMBEG T192,3000,100,1,C'ICM R,i,m (1100)' 9754+* 002B84 9755+TDSCDAT CSECT 002B88 9756+ DS 0D PAGE 180 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 9757+* 002B88 00009618 9758+T192TDSC DC A(T192) // TENTRY 002B8C 000001CC 9759+ DC A(T192TEND-T192) // TLENGTH 002B90 00000BB8 9760+ DC F'3000' // TLRCNT 002B94 00000064 9761+ DC F'100' // TIGCNT 002B98 00000001 9762+ DC F'1' // TLTYPE 001366 9763+TEXT CSECT 001366 E3F1F9F2 9764+SPTR0768 DC C'T192' 002B9C 9765+TDSCDAT CSECT 002B9C 9766+ DS 0F 002B9C 04001366 9767+ DC AL1(L'SPTR0768),AL3(SPTR0768) 00136A 9768+TEXT CSECT 00136A C9C3D440D96B896B 9769+SPTR0769 DC C'ICM R,i,m (1100)' 002BA0 9770+TDSCDAT CSECT 002BA0 9771+ DS 0F 002BA0 1000136A 9772+ DC AL1(L'SPTR0769),AL3(SPTR0769) 9773+* 004A9C 9774+TDSCTBL CSECT 04A9C 9775+T192TPTR EQU * 004A9C 00002B88 9776+ DC A(T192TDSC) enabled test 9777+* 009614 9778+TCODE CSECT 009618 9779+ DS 0D ensure double word alignment for test 009618 9780+T192 DS 0H 01650000 009618 90EC D00C 0000C 9781+ STM 14,12,12(13) SAVE REGISTERS 02950000 00961C 18CF 9782+ LR R12,R15 base register := entry address 09618 9783+ USING T192,R12 declare code base register 00961E 41B0 C020 09638 9784+ LA R11,T192L load loop target to R11 009622 58F0 C1C8 097E0 9785+ L R15,=A(SAVETST) R15 := current save area 009626 50DF 0004 00004 9786+ ST R13,4(R15) set back pointer in current save area 00962A 182D 9787+ LR R2,R13 remember callers save area 00962C 18DF 9788+ LR R13,R15 setup current save area 00962E 50D2 0008 00008 9789+ ST R13,8(R2) set forw pointer in callers save area 00000 9790+ USING TDSC,R1 declare TDSC base register 009632 58F0 1008 00008 9791+ L R15,TLRCNT load local repeat count to R15 9792+* 9793 * 009636 1722 9794 XR R2,R2 9795 T192L REPINS ICM,(R2,B'1100',T192V1) repeat: ICM R2,B'1100',T192V1 9796+* 9797+* build from sublist &ALIST a comma separated string &ARGS 9798+* 9799+* 9800+* 9801+* 9802+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 9803+* this allows to transfer the repeat count from last TDSCGEN call 9804+* 9805+* 09638 9806+T192L EQU * 9807+* 9808+* write a comment indicating what REPINS does (in case NOGEN in effect) 9809+* 9810+*,// REPINS: do 100 times: 9811+* PAGE 181 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 9812+* MNOTE requires that ' is doubled for expanded variables 9813+* thus build &MASTR as a copy of '&ARGS with ' doubled 9814+* 9815+* 9816+*,// ICM R2,B'1100',T192V1 9817+* 9818+* finally generate code: &ICNT copies of &CODE &ARGS 9819+* 009638 BF2C C1C0 097D8 9820+ ICM R2,B'1100',T192V1 00963C BF2C C1C0 097D8 9821+ ICM R2,B'1100',T192V1 009640 BF2C C1C0 097D8 9822+ ICM R2,B'1100',T192V1 009644 BF2C C1C0 097D8 9823+ ICM R2,B'1100',T192V1 009648 BF2C C1C0 097D8 9824+ ICM R2,B'1100',T192V1 00964C BF2C C1C0 097D8 9825+ ICM R2,B'1100',T192V1 009650 BF2C C1C0 097D8 9826+ ICM R2,B'1100',T192V1 009654 BF2C C1C0 097D8 9827+ ICM R2,B'1100',T192V1 009658 BF2C C1C0 097D8 9828+ ICM R2,B'1100',T192V1 00965C BF2C C1C0 097D8 9829+ ICM R2,B'1100',T192V1 009660 BF2C C1C0 097D8 9830+ ICM R2,B'1100',T192V1 009664 BF2C C1C0 097D8 9831+ ICM R2,B'1100',T192V1 009668 BF2C C1C0 097D8 9832+ ICM R2,B'1100',T192V1 00966C BF2C C1C0 097D8 9833+ ICM R2,B'1100',T192V1 009670 BF2C C1C0 097D8 9834+ ICM R2,B'1100',T192V1 009674 BF2C C1C0 097D8 9835+ ICM R2,B'1100',T192V1 009678 BF2C C1C0 097D8 9836+ ICM R2,B'1100',T192V1 00967C BF2C C1C0 097D8 9837+ ICM R2,B'1100',T192V1 009680 BF2C C1C0 097D8 9838+ ICM R2,B'1100',T192V1 009684 BF2C C1C0 097D8 9839+ ICM R2,B'1100',T192V1 009688 BF2C C1C0 097D8 9840+ ICM R2,B'1100',T192V1 00968C BF2C C1C0 097D8 9841+ ICM R2,B'1100',T192V1 009690 BF2C C1C0 097D8 9842+ ICM R2,B'1100',T192V1 009694 BF2C C1C0 097D8 9843+ ICM R2,B'1100',T192V1 009698 BF2C C1C0 097D8 9844+ ICM R2,B'1100',T192V1 00969C BF2C C1C0 097D8 9845+ ICM R2,B'1100',T192V1 0096A0 BF2C C1C0 097D8 9846+ ICM R2,B'1100',T192V1 0096A4 BF2C C1C0 097D8 9847+ ICM R2,B'1100',T192V1 0096A8 BF2C C1C0 097D8 9848+ ICM R2,B'1100',T192V1 0096AC BF2C C1C0 097D8 9849+ ICM R2,B'1100',T192V1 0096B0 BF2C C1C0 097D8 9850+ ICM R2,B'1100',T192V1 0096B4 BF2C C1C0 097D8 9851+ ICM R2,B'1100',T192V1 0096B8 BF2C C1C0 097D8 9852+ ICM R2,B'1100',T192V1 0096BC BF2C C1C0 097D8 9853+ ICM R2,B'1100',T192V1 0096C0 BF2C C1C0 097D8 9854+ ICM R2,B'1100',T192V1 0096C4 BF2C C1C0 097D8 9855+ ICM R2,B'1100',T192V1 0096C8 BF2C C1C0 097D8 9856+ ICM R2,B'1100',T192V1 0096CC BF2C C1C0 097D8 9857+ ICM R2,B'1100',T192V1 0096D0 BF2C C1C0 097D8 9858+ ICM R2,B'1100',T192V1 0096D4 BF2C C1C0 097D8 9859+ ICM R2,B'1100',T192V1 0096D8 BF2C C1C0 097D8 9860+ ICM R2,B'1100',T192V1 0096DC BF2C C1C0 097D8 9861+ ICM R2,B'1100',T192V1 0096E0 BF2C C1C0 097D8 9862+ ICM R2,B'1100',T192V1 0096E4 BF2C C1C0 097D8 9863+ ICM R2,B'1100',T192V1 0096E8 BF2C C1C0 097D8 9864+ ICM R2,B'1100',T192V1 0096EC BF2C C1C0 097D8 9865+ ICM R2,B'1100',T192V1 0096F0 BF2C C1C0 097D8 9866+ ICM R2,B'1100',T192V1 PAGE 182 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0096F4 BF2C C1C0 097D8 9867+ ICM R2,B'1100',T192V1 0096F8 BF2C C1C0 097D8 9868+ ICM R2,B'1100',T192V1 0096FC BF2C C1C0 097D8 9869+ ICM R2,B'1100',T192V1 009700 BF2C C1C0 097D8 9870+ ICM R2,B'1100',T192V1 009704 BF2C C1C0 097D8 9871+ ICM R2,B'1100',T192V1 009708 BF2C C1C0 097D8 9872+ ICM R2,B'1100',T192V1 00970C BF2C C1C0 097D8 9873+ ICM R2,B'1100',T192V1 009710 BF2C C1C0 097D8 9874+ ICM R2,B'1100',T192V1 009714 BF2C C1C0 097D8 9875+ ICM R2,B'1100',T192V1 009718 BF2C C1C0 097D8 9876+ ICM R2,B'1100',T192V1 00971C BF2C C1C0 097D8 9877+ ICM R2,B'1100',T192V1 009720 BF2C C1C0 097D8 9878+ ICM R2,B'1100',T192V1 009724 BF2C C1C0 097D8 9879+ ICM R2,B'1100',T192V1 009728 BF2C C1C0 097D8 9880+ ICM R2,B'1100',T192V1 00972C BF2C C1C0 097D8 9881+ ICM R2,B'1100',T192V1 009730 BF2C C1C0 097D8 9882+ ICM R2,B'1100',T192V1 009734 BF2C C1C0 097D8 9883+ ICM R2,B'1100',T192V1 009738 BF2C C1C0 097D8 9884+ ICM R2,B'1100',T192V1 00973C BF2C C1C0 097D8 9885+ ICM R2,B'1100',T192V1 009740 BF2C C1C0 097D8 9886+ ICM R2,B'1100',T192V1 009744 BF2C C1C0 097D8 9887+ ICM R2,B'1100',T192V1 009748 BF2C C1C0 097D8 9888+ ICM R2,B'1100',T192V1 00974C BF2C C1C0 097D8 9889+ ICM R2,B'1100',T192V1 009750 BF2C C1C0 097D8 9890+ ICM R2,B'1100',T192V1 009754 BF2C C1C0 097D8 9891+ ICM R2,B'1100',T192V1 009758 BF2C C1C0 097D8 9892+ ICM R2,B'1100',T192V1 00975C BF2C C1C0 097D8 9893+ ICM R2,B'1100',T192V1 009760 BF2C C1C0 097D8 9894+ ICM R2,B'1100',T192V1 009764 BF2C C1C0 097D8 9895+ ICM R2,B'1100',T192V1 009768 BF2C C1C0 097D8 9896+ ICM R2,B'1100',T192V1 00976C BF2C C1C0 097D8 9897+ ICM R2,B'1100',T192V1 009770 BF2C C1C0 097D8 9898+ ICM R2,B'1100',T192V1 009774 BF2C C1C0 097D8 9899+ ICM R2,B'1100',T192V1 009778 BF2C C1C0 097D8 9900+ ICM R2,B'1100',T192V1 00977C BF2C C1C0 097D8 9901+ ICM R2,B'1100',T192V1 009780 BF2C C1C0 097D8 9902+ ICM R2,B'1100',T192V1 009784 BF2C C1C0 097D8 9903+ ICM R2,B'1100',T192V1 009788 BF2C C1C0 097D8 9904+ ICM R2,B'1100',T192V1 00978C BF2C C1C0 097D8 9905+ ICM R2,B'1100',T192V1 009790 BF2C C1C0 097D8 9906+ ICM R2,B'1100',T192V1 009794 BF2C C1C0 097D8 9907+ ICM R2,B'1100',T192V1 009798 BF2C C1C0 097D8 9908+ ICM R2,B'1100',T192V1 00979C BF2C C1C0 097D8 9909+ ICM R2,B'1100',T192V1 0097A0 BF2C C1C0 097D8 9910+ ICM R2,B'1100',T192V1 0097A4 BF2C C1C0 097D8 9911+ ICM R2,B'1100',T192V1 0097A8 BF2C C1C0 097D8 9912+ ICM R2,B'1100',T192V1 0097AC BF2C C1C0 097D8 9913+ ICM R2,B'1100',T192V1 0097B0 BF2C C1C0 097D8 9914+ ICM R2,B'1100',T192V1 0097B4 BF2C C1C0 097D8 9915+ ICM R2,B'1100',T192V1 0097B8 BF2C C1C0 097D8 9916+ ICM R2,B'1100',T192V1 0097BC BF2C C1C0 097D8 9917+ ICM R2,B'1100',T192V1 0097C0 BF2C C1C0 097D8 9918+ ICM R2,B'1100',T192V1 0097C4 BF2C C1C0 097D8 9919+ ICM R2,B'1100',T192V1 9920+* 0097C8 06FB 9921 BCTR R15,R11 PAGE 183 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 9922 TSIMRET 0097CA 58F0 C1C8 097E0 9923+ L R15,=A(SAVETST) R15 := current save area 0097CE 58DF 0004 00004 9924+ L R13,4(R15) get old save area back 0097D2 98EC D00C 0000C 9925+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0097D6 07FE 9926+ BR 14 RETURN 02000000 9927 * 0097D8 9928 DS 0F 0097D8 F0F1 9929 T192V1 DC C'01' 9930 TSIMEND 0097E0 9931+ LTORG 0097E0 00000458 9932 =A(SAVETST) 097E4 9933+T192TEND EQU * 9934 * 9935 * Test 193 -- ICM R,m (3c) --------------------------------- 9936 * 9937 TSIMBEG T193,4000,100,1,C'ICM R,i,m (0111)' 9938+* 002BA4 9939+TDSCDAT CSECT 002BA8 9940+ DS 0D 9941+* 002BA8 000097E8 9942+T193TDSC DC A(T193) // TENTRY 002BAC 000001CC 9943+ DC A(T193TEND-T193) // TLENGTH 002BB0 00000FA0 9944+ DC F'4000' // TLRCNT 002BB4 00000064 9945+ DC F'100' // TIGCNT 002BB8 00000001 9946+ DC F'1' // TLTYPE 00137A 9947+TEXT CSECT 00137A E3F1F9F3 9948+SPTR0780 DC C'T193' 002BBC 9949+TDSCDAT CSECT 002BBC 9950+ DS 0F 002BBC 0400137A 9951+ DC AL1(L'SPTR0780),AL3(SPTR0780) 00137E 9952+TEXT CSECT 00137E C9C3D440D96B896B 9953+SPTR0781 DC C'ICM R,i,m (0111)' 002BC0 9954+TDSCDAT CSECT 002BC0 9955+ DS 0F 002BC0 1000137E 9956+ DC AL1(L'SPTR0781),AL3(SPTR0781) 9957+* 004AA0 9958+TDSCTBL CSECT 04AA0 9959+T193TPTR EQU * 004AA0 00002BA8 9960+ DC A(T193TDSC) enabled test 9961+* 0097E4 9962+TCODE CSECT 0097E8 9963+ DS 0D ensure double word alignment for test 0097E8 9964+T193 DS 0H 01650000 0097E8 90EC D00C 0000C 9965+ STM 14,12,12(13) SAVE REGISTERS 02950000 0097EC 18CF 9966+ LR R12,R15 base register := entry address 097E8 9967+ USING T193,R12 declare code base register 0097EE 41B0 C020 09808 9968+ LA R11,T193L load loop target to R11 0097F2 58F0 C1C8 099B0 9969+ L R15,=A(SAVETST) R15 := current save area 0097F6 50DF 0004 00004 9970+ ST R13,4(R15) set back pointer in current save area 0097FA 182D 9971+ LR R2,R13 remember callers save area 0097FC 18DF 9972+ LR R13,R15 setup current save area 0097FE 50D2 0008 00008 9973+ ST R13,8(R2) set forw pointer in callers save area 00000 9974+ USING TDSC,R1 declare TDSC base register 009802 58F0 1008 00008 9975+ L R15,TLRCNT load local repeat count to R15 9976+* PAGE 184 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 9977 * 009806 1722 9978 XR R2,R2 9979 T193L REPINS ICM,(R2,B'0111',T193V1) repeat: ICM R2,B'0111',T193V1 9980+* 9981+* build from sublist &ALIST a comma separated string &ARGS 9982+* 9983+* 9984+* 9985+* 9986+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 9987+* this allows to transfer the repeat count from last TDSCGEN call 9988+* 9989+* 09808 9990+T193L EQU * 9991+* 9992+* write a comment indicating what REPINS does (in case NOGEN in effect) 9993+* 9994+*,// REPINS: do 100 times: 9995+* 9996+* MNOTE requires that ' is doubled for expanded variables 9997+* thus build &MASTR as a copy of '&ARGS with ' doubled 9998+* 9999+* 10000+*,// ICM R2,B'0111',T193V1 10001+* 10002+* finally generate code: &ICNT copies of &CODE &ARGS 10003+* 009808 BF27 C1C0 099A8 10004+ ICM R2,B'0111',T193V1 00980C BF27 C1C0 099A8 10005+ ICM R2,B'0111',T193V1 009810 BF27 C1C0 099A8 10006+ ICM R2,B'0111',T193V1 009814 BF27 C1C0 099A8 10007+ ICM R2,B'0111',T193V1 009818 BF27 C1C0 099A8 10008+ ICM R2,B'0111',T193V1 00981C BF27 C1C0 099A8 10009+ ICM R2,B'0111',T193V1 009820 BF27 C1C0 099A8 10010+ ICM R2,B'0111',T193V1 009824 BF27 C1C0 099A8 10011+ ICM R2,B'0111',T193V1 009828 BF27 C1C0 099A8 10012+ ICM R2,B'0111',T193V1 00982C BF27 C1C0 099A8 10013+ ICM R2,B'0111',T193V1 009830 BF27 C1C0 099A8 10014+ ICM R2,B'0111',T193V1 009834 BF27 C1C0 099A8 10015+ ICM R2,B'0111',T193V1 009838 BF27 C1C0 099A8 10016+ ICM R2,B'0111',T193V1 00983C BF27 C1C0 099A8 10017+ ICM R2,B'0111',T193V1 009840 BF27 C1C0 099A8 10018+ ICM R2,B'0111',T193V1 009844 BF27 C1C0 099A8 10019+ ICM R2,B'0111',T193V1 009848 BF27 C1C0 099A8 10020+ ICM R2,B'0111',T193V1 00984C BF27 C1C0 099A8 10021+ ICM R2,B'0111',T193V1 009850 BF27 C1C0 099A8 10022+ ICM R2,B'0111',T193V1 009854 BF27 C1C0 099A8 10023+ ICM R2,B'0111',T193V1 009858 BF27 C1C0 099A8 10024+ ICM R2,B'0111',T193V1 00985C BF27 C1C0 099A8 10025+ ICM R2,B'0111',T193V1 009860 BF27 C1C0 099A8 10026+ ICM R2,B'0111',T193V1 009864 BF27 C1C0 099A8 10027+ ICM R2,B'0111',T193V1 009868 BF27 C1C0 099A8 10028+ ICM R2,B'0111',T193V1 00986C BF27 C1C0 099A8 10029+ ICM R2,B'0111',T193V1 009870 BF27 C1C0 099A8 10030+ ICM R2,B'0111',T193V1 009874 BF27 C1C0 099A8 10031+ ICM R2,B'0111',T193V1 PAGE 185 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009878 BF27 C1C0 099A8 10032+ ICM R2,B'0111',T193V1 00987C BF27 C1C0 099A8 10033+ ICM R2,B'0111',T193V1 009880 BF27 C1C0 099A8 10034+ ICM R2,B'0111',T193V1 009884 BF27 C1C0 099A8 10035+ ICM R2,B'0111',T193V1 009888 BF27 C1C0 099A8 10036+ ICM R2,B'0111',T193V1 00988C BF27 C1C0 099A8 10037+ ICM R2,B'0111',T193V1 009890 BF27 C1C0 099A8 10038+ ICM R2,B'0111',T193V1 009894 BF27 C1C0 099A8 10039+ ICM R2,B'0111',T193V1 009898 BF27 C1C0 099A8 10040+ ICM R2,B'0111',T193V1 00989C BF27 C1C0 099A8 10041+ ICM R2,B'0111',T193V1 0098A0 BF27 C1C0 099A8 10042+ ICM R2,B'0111',T193V1 0098A4 BF27 C1C0 099A8 10043+ ICM R2,B'0111',T193V1 0098A8 BF27 C1C0 099A8 10044+ ICM R2,B'0111',T193V1 0098AC BF27 C1C0 099A8 10045+ ICM R2,B'0111',T193V1 0098B0 BF27 C1C0 099A8 10046+ ICM R2,B'0111',T193V1 0098B4 BF27 C1C0 099A8 10047+ ICM R2,B'0111',T193V1 0098B8 BF27 C1C0 099A8 10048+ ICM R2,B'0111',T193V1 0098BC BF27 C1C0 099A8 10049+ ICM R2,B'0111',T193V1 0098C0 BF27 C1C0 099A8 10050+ ICM R2,B'0111',T193V1 0098C4 BF27 C1C0 099A8 10051+ ICM R2,B'0111',T193V1 0098C8 BF27 C1C0 099A8 10052+ ICM R2,B'0111',T193V1 0098CC BF27 C1C0 099A8 10053+ ICM R2,B'0111',T193V1 0098D0 BF27 C1C0 099A8 10054+ ICM R2,B'0111',T193V1 0098D4 BF27 C1C0 099A8 10055+ ICM R2,B'0111',T193V1 0098D8 BF27 C1C0 099A8 10056+ ICM R2,B'0111',T193V1 0098DC BF27 C1C0 099A8 10057+ ICM R2,B'0111',T193V1 0098E0 BF27 C1C0 099A8 10058+ ICM R2,B'0111',T193V1 0098E4 BF27 C1C0 099A8 10059+ ICM R2,B'0111',T193V1 0098E8 BF27 C1C0 099A8 10060+ ICM R2,B'0111',T193V1 0098EC BF27 C1C0 099A8 10061+ ICM R2,B'0111',T193V1 0098F0 BF27 C1C0 099A8 10062+ ICM R2,B'0111',T193V1 0098F4 BF27 C1C0 099A8 10063+ ICM R2,B'0111',T193V1 0098F8 BF27 C1C0 099A8 10064+ ICM R2,B'0111',T193V1 0098FC BF27 C1C0 099A8 10065+ ICM R2,B'0111',T193V1 009900 BF27 C1C0 099A8 10066+ ICM R2,B'0111',T193V1 009904 BF27 C1C0 099A8 10067+ ICM R2,B'0111',T193V1 009908 BF27 C1C0 099A8 10068+ ICM R2,B'0111',T193V1 00990C BF27 C1C0 099A8 10069+ ICM R2,B'0111',T193V1 009910 BF27 C1C0 099A8 10070+ ICM R2,B'0111',T193V1 009914 BF27 C1C0 099A8 10071+ ICM R2,B'0111',T193V1 009918 BF27 C1C0 099A8 10072+ ICM R2,B'0111',T193V1 00991C BF27 C1C0 099A8 10073+ ICM R2,B'0111',T193V1 009920 BF27 C1C0 099A8 10074+ ICM R2,B'0111',T193V1 009924 BF27 C1C0 099A8 10075+ ICM R2,B'0111',T193V1 009928 BF27 C1C0 099A8 10076+ ICM R2,B'0111',T193V1 00992C BF27 C1C0 099A8 10077+ ICM R2,B'0111',T193V1 009930 BF27 C1C0 099A8 10078+ ICM R2,B'0111',T193V1 009934 BF27 C1C0 099A8 10079+ ICM R2,B'0111',T193V1 009938 BF27 C1C0 099A8 10080+ ICM R2,B'0111',T193V1 00993C BF27 C1C0 099A8 10081+ ICM R2,B'0111',T193V1 009940 BF27 C1C0 099A8 10082+ ICM R2,B'0111',T193V1 009944 BF27 C1C0 099A8 10083+ ICM R2,B'0111',T193V1 009948 BF27 C1C0 099A8 10084+ ICM R2,B'0111',T193V1 00994C BF27 C1C0 099A8 10085+ ICM R2,B'0111',T193V1 009950 BF27 C1C0 099A8 10086+ ICM R2,B'0111',T193V1 PAGE 186 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009954 BF27 C1C0 099A8 10087+ ICM R2,B'0111',T193V1 009958 BF27 C1C0 099A8 10088+ ICM R2,B'0111',T193V1 00995C BF27 C1C0 099A8 10089+ ICM R2,B'0111',T193V1 009960 BF27 C1C0 099A8 10090+ ICM R2,B'0111',T193V1 009964 BF27 C1C0 099A8 10091+ ICM R2,B'0111',T193V1 009968 BF27 C1C0 099A8 10092+ ICM R2,B'0111',T193V1 00996C BF27 C1C0 099A8 10093+ ICM R2,B'0111',T193V1 009970 BF27 C1C0 099A8 10094+ ICM R2,B'0111',T193V1 009974 BF27 C1C0 099A8 10095+ ICM R2,B'0111',T193V1 009978 BF27 C1C0 099A8 10096+ ICM R2,B'0111',T193V1 00997C BF27 C1C0 099A8 10097+ ICM R2,B'0111',T193V1 009980 BF27 C1C0 099A8 10098+ ICM R2,B'0111',T193V1 009984 BF27 C1C0 099A8 10099+ ICM R2,B'0111',T193V1 009988 BF27 C1C0 099A8 10100+ ICM R2,B'0111',T193V1 00998C BF27 C1C0 099A8 10101+ ICM R2,B'0111',T193V1 009990 BF27 C1C0 099A8 10102+ ICM R2,B'0111',T193V1 009994 BF27 C1C0 099A8 10103+ ICM R2,B'0111',T193V1 10104+* 009998 06FB 10105 BCTR R15,R11 10106 TSIMRET 00999A 58F0 C1C8 099B0 10107+ L R15,=A(SAVETST) R15 := current save area 00999E 58DF 0004 00004 10108+ L R13,4(R15) get old save area back 0099A2 98EC D00C 0000C 10109+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0099A6 07FE 10110+ BR 14 RETURN 02000000 10111 * 0099A8 10112 DS 0F 0099A8 F1F2F3 10113 T193V1 DC C'123' 10114 TSIMEND 0099B0 10115+ LTORG 0099B0 00000458 10116 =A(SAVETST) 099B4 10117+T193TEND EQU * 10118 * 10119 * Test 2xx -- binary/logical ==================================== 10120 * 10121 * Test 20x -- arithmetic/logical add/sub =================== 10122 * 10123 * Test 200 -- AR R,R --------------------------------------- 10124 * 10125 TSIMBEG T200,14000,100,1,C'AR R,R' 10126+* 002BC4 10127+TDSCDAT CSECT 002BC8 10128+ DS 0D 10129+* 002BC8 000099B8 10130+T200TDSC DC A(T200) // TENTRY 002BCC 00000104 10131+ DC A(T200TEND-T200) // TLENGTH 002BD0 000036B0 10132+ DC F'14000' // TLRCNT 002BD4 00000064 10133+ DC F'100' // TIGCNT 002BD8 00000001 10134+ DC F'1' // TLTYPE 00138E 10135+TEXT CSECT 00138E E3F2F0F0 10136+SPTR0792 DC C'T200' 002BDC 10137+TDSCDAT CSECT 002BDC 10138+ DS 0F 002BDC 0400138E 10139+ DC AL1(L'SPTR0792),AL3(SPTR0792) 001392 10140+TEXT CSECT 001392 C1D940D96BD9 10141+SPTR0793 DC C'AR R,R' PAGE 187 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002BE0 10142+TDSCDAT CSECT 002BE0 10143+ DS 0F 002BE0 06001392 10144+ DC AL1(L'SPTR0793),AL3(SPTR0793) 10145+* 004AA4 10146+TDSCTBL CSECT 04AA4 10147+T200TPTR EQU * 004AA4 00002BC8 10148+ DC A(T200TDSC) enabled test 10149+* 0099B4 10150+TCODE CSECT 0099B8 10151+ DS 0D ensure double word alignment for test 0099B8 10152+T200 DS 0H 01650000 0099B8 90EC D00C 0000C 10153+ STM 14,12,12(13) SAVE REGISTERS 02950000 0099BC 18CF 10154+ LR R12,R15 base register := entry address 099B8 10155+ USING T200,R12 declare code base register 0099BE 41B0 C024 099DC 10156+ LA R11,T200L load loop target to R11 0099C2 58F0 C100 09AB8 10157+ L R15,=A(SAVETST) R15 := current save area 0099C6 50DF 0004 00004 10158+ ST R13,4(R15) set back pointer in current save area 0099CA 182D 10159+ LR R2,R13 remember callers save area 0099CC 18DF 10160+ LR R13,R15 setup current save area 0099CE 50D2 0008 00008 10161+ ST R13,8(R2) set forw pointer in callers save area 00000 10162+ USING TDSC,R1 declare TDSC base register 0099D2 58F0 1008 00008 10163+ L R15,TLRCNT load local repeat count to R15 10164+* 10165 * 0099D6 1722 10166 XR R2,R2 0099D8 4130 0001 00001 10167 LA R3,1 10168 T200L REPINS AR,(R2,R3) repeat: AR R2,R3 10169+* 10170+* build from sublist &ALIST a comma separated string &ARGS 10171+* 10172+* 10173+* 10174+* 10175+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10176+* this allows to transfer the repeat count from last TDSCGEN call 10177+* 10178+* 099DC 10179+T200L EQU * 10180+* 10181+* write a comment indicating what REPINS does (in case NOGEN in effect) 10182+* 10183+*,// REPINS: do 100 times: 10184+* 10185+* MNOTE requires that ' is doubled for expanded variables 10186+* thus build &MASTR as a copy of '&ARGS with ' doubled 10187+* 10188+* 10189+*,// AR R2,R3 10190+* 10191+* finally generate code: &ICNT copies of &CODE &ARGS 10192+* 0099DC 1A23 10193+ AR R2,R3 0099DE 1A23 10194+ AR R2,R3 0099E0 1A23 10195+ AR R2,R3 0099E2 1A23 10196+ AR R2,R3 PAGE 188 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0099E4 1A23 10197+ AR R2,R3 0099E6 1A23 10198+ AR R2,R3 0099E8 1A23 10199+ AR R2,R3 0099EA 1A23 10200+ AR R2,R3 0099EC 1A23 10201+ AR R2,R3 0099EE 1A23 10202+ AR R2,R3 0099F0 1A23 10203+ AR R2,R3 0099F2 1A23 10204+ AR R2,R3 0099F4 1A23 10205+ AR R2,R3 0099F6 1A23 10206+ AR R2,R3 0099F8 1A23 10207+ AR R2,R3 0099FA 1A23 10208+ AR R2,R3 0099FC 1A23 10209+ AR R2,R3 0099FE 1A23 10210+ AR R2,R3 009A00 1A23 10211+ AR R2,R3 009A02 1A23 10212+ AR R2,R3 009A04 1A23 10213+ AR R2,R3 009A06 1A23 10214+ AR R2,R3 009A08 1A23 10215+ AR R2,R3 009A0A 1A23 10216+ AR R2,R3 009A0C 1A23 10217+ AR R2,R3 009A0E 1A23 10218+ AR R2,R3 009A10 1A23 10219+ AR R2,R3 009A12 1A23 10220+ AR R2,R3 009A14 1A23 10221+ AR R2,R3 009A16 1A23 10222+ AR R2,R3 009A18 1A23 10223+ AR R2,R3 009A1A 1A23 10224+ AR R2,R3 009A1C 1A23 10225+ AR R2,R3 009A1E 1A23 10226+ AR R2,R3 009A20 1A23 10227+ AR R2,R3 009A22 1A23 10228+ AR R2,R3 009A24 1A23 10229+ AR R2,R3 009A26 1A23 10230+ AR R2,R3 009A28 1A23 10231+ AR R2,R3 009A2A 1A23 10232+ AR R2,R3 009A2C 1A23 10233+ AR R2,R3 009A2E 1A23 10234+ AR R2,R3 009A30 1A23 10235+ AR R2,R3 009A32 1A23 10236+ AR R2,R3 009A34 1A23 10237+ AR R2,R3 009A36 1A23 10238+ AR R2,R3 009A38 1A23 10239+ AR R2,R3 009A3A 1A23 10240+ AR R2,R3 009A3C 1A23 10241+ AR R2,R3 009A3E 1A23 10242+ AR R2,R3 009A40 1A23 10243+ AR R2,R3 009A42 1A23 10244+ AR R2,R3 009A44 1A23 10245+ AR R2,R3 009A46 1A23 10246+ AR R2,R3 009A48 1A23 10247+ AR R2,R3 009A4A 1A23 10248+ AR R2,R3 009A4C 1A23 10249+ AR R2,R3 009A4E 1A23 10250+ AR R2,R3 009A50 1A23 10251+ AR R2,R3 PAGE 189 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009A52 1A23 10252+ AR R2,R3 009A54 1A23 10253+ AR R2,R3 009A56 1A23 10254+ AR R2,R3 009A58 1A23 10255+ AR R2,R3 009A5A 1A23 10256+ AR R2,R3 009A5C 1A23 10257+ AR R2,R3 009A5E 1A23 10258+ AR R2,R3 009A60 1A23 10259+ AR R2,R3 009A62 1A23 10260+ AR R2,R3 009A64 1A23 10261+ AR R2,R3 009A66 1A23 10262+ AR R2,R3 009A68 1A23 10263+ AR R2,R3 009A6A 1A23 10264+ AR R2,R3 009A6C 1A23 10265+ AR R2,R3 009A6E 1A23 10266+ AR R2,R3 009A70 1A23 10267+ AR R2,R3 009A72 1A23 10268+ AR R2,R3 009A74 1A23 10269+ AR R2,R3 009A76 1A23 10270+ AR R2,R3 009A78 1A23 10271+ AR R2,R3 009A7A 1A23 10272+ AR R2,R3 009A7C 1A23 10273+ AR R2,R3 009A7E 1A23 10274+ AR R2,R3 009A80 1A23 10275+ AR R2,R3 009A82 1A23 10276+ AR R2,R3 009A84 1A23 10277+ AR R2,R3 009A86 1A23 10278+ AR R2,R3 009A88 1A23 10279+ AR R2,R3 009A8A 1A23 10280+ AR R2,R3 009A8C 1A23 10281+ AR R2,R3 009A8E 1A23 10282+ AR R2,R3 009A90 1A23 10283+ AR R2,R3 009A92 1A23 10284+ AR R2,R3 009A94 1A23 10285+ AR R2,R3 009A96 1A23 10286+ AR R2,R3 009A98 1A23 10287+ AR R2,R3 009A9A 1A23 10288+ AR R2,R3 009A9C 1A23 10289+ AR R2,R3 009A9E 1A23 10290+ AR R2,R3 009AA0 1A23 10291+ AR R2,R3 009AA2 1A23 10292+ AR R2,R3 10293+* 009AA4 06FB 10294 BCTR R15,R11 10295 TSIMRET 009AA6 58F0 C100 09AB8 10296+ L R15,=A(SAVETST) R15 := current save area 009AAA 58DF 0004 00004 10297+ L R13,4(R15) get old save area back 009AAE 98EC D00C 0000C 10298+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009AB2 07FE 10299+ BR 14 RETURN 02000000 10300 TSIMEND 009AB8 10301+ LTORG 009AB8 00000458 10302 =A(SAVETST) 09ABC 10303+T200TEND EQU * 10304 * 10305 * Test 201 -- A R,m ---------------------------------------- 10306 * PAGE 190 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 10307 TSIMBEG T201,10000,50,1,C'A R,m' 10308+* 002BE4 10309+TDSCDAT CSECT 002BE8 10310+ DS 0D 10311+* 002BE8 00009AC0 10312+T201TDSC DC A(T201) // TENTRY 002BEC 00000100 10313+ DC A(T201TEND-T201) // TLENGTH 002BF0 00002710 10314+ DC F'10000' // TLRCNT 002BF4 00000032 10315+ DC F'50' // TIGCNT 002BF8 00000001 10316+ DC F'1' // TLTYPE 001398 10317+TEXT CSECT 001398 E3F2F0F1 10318+SPTR0804 DC C'T201' 002BFC 10319+TDSCDAT CSECT 002BFC 10320+ DS 0F 002BFC 04001398 10321+ DC AL1(L'SPTR0804),AL3(SPTR0804) 00139C 10322+TEXT CSECT 00139C C140D96B94 10323+SPTR0805 DC C'A R,m' 002C00 10324+TDSCDAT CSECT 002C00 10325+ DS 0F 002C00 0500139C 10326+ DC AL1(L'SPTR0805),AL3(SPTR0805) 10327+* 004AA8 10328+TDSCTBL CSECT 04AA8 10329+T201TPTR EQU * 004AA8 00002BE8 10330+ DC A(T201TDSC) enabled test 10331+* 009ABC 10332+TCODE CSECT 009AC0 10333+ DS 0D ensure double word alignment for test 009AC0 10334+T201 DS 0H 01650000 009AC0 90EC D00C 0000C 10335+ STM 14,12,12(13) SAVE REGISTERS 02950000 009AC4 18CF 10336+ LR R12,R15 base register := entry address 09AC0 10337+ USING T201,R12 declare code base register 009AC6 41B0 C020 09AE0 10338+ LA R11,T201L load loop target to R11 009ACA 58F0 C0F8 09BB8 10339+ L R15,=A(SAVETST) R15 := current save area 009ACE 50DF 0004 00004 10340+ ST R13,4(R15) set back pointer in current save area 009AD2 182D 10341+ LR R2,R13 remember callers save area 009AD4 18DF 10342+ LR R13,R15 setup current save area 009AD6 50D2 0008 00008 10343+ ST R13,8(R2) set forw pointer in callers save area 00000 10344+ USING TDSC,R1 declare TDSC base register 009ADA 58F0 1008 00008 10345+ L R15,TLRCNT load local repeat count to R15 10346+* 10347 * 009ADE 1722 10348 XR R2,R2 10349 T201L REPINS A,(R2,=F'1') repeat: A R2,=F'1' 10350+* 10351+* build from sublist &ALIST a comma separated string &ARGS 10352+* 10353+* 10354+* 10355+* 10356+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10357+* this allows to transfer the repeat count from last TDSCGEN call 10358+* 10359+* 09AE0 10360+T201L EQU * 10361+* PAGE 191 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 10362+* write a comment indicating what REPINS does (in case NOGEN in effect) 10363+* 10364+*,// REPINS: do 50 times: 10365+* 10366+* MNOTE requires that ' is doubled for expanded variables 10367+* thus build &MASTR as a copy of '&ARGS with ' doubled 10368+* 10369+* 10370+*,// A R2,=F'1' 10371+* 10372+* finally generate code: &ICNT copies of &CODE &ARGS 10373+* 009AE0 5A20 C0FC 09BBC 10374+ A R2,=F'1' 009AE4 5A20 C0FC 09BBC 10375+ A R2,=F'1' 009AE8 5A20 C0FC 09BBC 10376+ A R2,=F'1' 009AEC 5A20 C0FC 09BBC 10377+ A R2,=F'1' 009AF0 5A20 C0FC 09BBC 10378+ A R2,=F'1' 009AF4 5A20 C0FC 09BBC 10379+ A R2,=F'1' 009AF8 5A20 C0FC 09BBC 10380+ A R2,=F'1' 009AFC 5A20 C0FC 09BBC 10381+ A R2,=F'1' 009B00 5A20 C0FC 09BBC 10382+ A R2,=F'1' 009B04 5A20 C0FC 09BBC 10383+ A R2,=F'1' 009B08 5A20 C0FC 09BBC 10384+ A R2,=F'1' 009B0C 5A20 C0FC 09BBC 10385+ A R2,=F'1' 009B10 5A20 C0FC 09BBC 10386+ A R2,=F'1' 009B14 5A20 C0FC 09BBC 10387+ A R2,=F'1' 009B18 5A20 C0FC 09BBC 10388+ A R2,=F'1' 009B1C 5A20 C0FC 09BBC 10389+ A R2,=F'1' 009B20 5A20 C0FC 09BBC 10390+ A R2,=F'1' 009B24 5A20 C0FC 09BBC 10391+ A R2,=F'1' 009B28 5A20 C0FC 09BBC 10392+ A R2,=F'1' 009B2C 5A20 C0FC 09BBC 10393+ A R2,=F'1' 009B30 5A20 C0FC 09BBC 10394+ A R2,=F'1' 009B34 5A20 C0FC 09BBC 10395+ A R2,=F'1' 009B38 5A20 C0FC 09BBC 10396+ A R2,=F'1' 009B3C 5A20 C0FC 09BBC 10397+ A R2,=F'1' 009B40 5A20 C0FC 09BBC 10398+ A R2,=F'1' 009B44 5A20 C0FC 09BBC 10399+ A R2,=F'1' 009B48 5A20 C0FC 09BBC 10400+ A R2,=F'1' 009B4C 5A20 C0FC 09BBC 10401+ A R2,=F'1' 009B50 5A20 C0FC 09BBC 10402+ A R2,=F'1' 009B54 5A20 C0FC 09BBC 10403+ A R2,=F'1' 009B58 5A20 C0FC 09BBC 10404+ A R2,=F'1' 009B5C 5A20 C0FC 09BBC 10405+ A R2,=F'1' 009B60 5A20 C0FC 09BBC 10406+ A R2,=F'1' 009B64 5A20 C0FC 09BBC 10407+ A R2,=F'1' 009B68 5A20 C0FC 09BBC 10408+ A R2,=F'1' 009B6C 5A20 C0FC 09BBC 10409+ A R2,=F'1' 009B70 5A20 C0FC 09BBC 10410+ A R2,=F'1' 009B74 5A20 C0FC 09BBC 10411+ A R2,=F'1' 009B78 5A20 C0FC 09BBC 10412+ A R2,=F'1' 009B7C 5A20 C0FC 09BBC 10413+ A R2,=F'1' 009B80 5A20 C0FC 09BBC 10414+ A R2,=F'1' 009B84 5A20 C0FC 09BBC 10415+ A R2,=F'1' 009B88 5A20 C0FC 09BBC 10416+ A R2,=F'1' PAGE 192 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009B8C 5A20 C0FC 09BBC 10417+ A R2,=F'1' 009B90 5A20 C0FC 09BBC 10418+ A R2,=F'1' 009B94 5A20 C0FC 09BBC 10419+ A R2,=F'1' 009B98 5A20 C0FC 09BBC 10420+ A R2,=F'1' 009B9C 5A20 C0FC 09BBC 10421+ A R2,=F'1' 009BA0 5A20 C0FC 09BBC 10422+ A R2,=F'1' 009BA4 5A20 C0FC 09BBC 10423+ A R2,=F'1' 10424+* 009BA8 06FB 10425 BCTR R15,R11 10426 TSIMRET 009BAA 58F0 C0F8 09BB8 10427+ L R15,=A(SAVETST) R15 := current save area 009BAE 58DF 0004 00004 10428+ L R13,4(R15) get old save area back 009BB2 98EC D00C 0000C 10429+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009BB6 07FE 10430+ BR 14 RETURN 02000000 10431 TSIMEND 009BB8 10432+ LTORG 009BB8 00000458 10433 =A(SAVETST) 009BBC 00000001 10434 =F'1' 09BC0 10435+T201TEND EQU * 10436 * 10437 * Test 202 -- AH R,m --------------------------------------- 10438 TSIMBEG T202,10000,50,1,C'AH R,m' 10439+* 002C04 10440+TDSCDAT CSECT 002C08 10441+ DS 0D 10442+* 002C08 00009BC0 10443+T202TDSC DC A(T202) // TENTRY 002C0C 000000FE 10444+ DC A(T202TEND-T202) // TLENGTH 002C10 00002710 10445+ DC F'10000' // TLRCNT 002C14 00000032 10446+ DC F'50' // TIGCNT 002C18 00000001 10447+ DC F'1' // TLTYPE 0013A1 10448+TEXT CSECT 0013A1 E3F2F0F2 10449+SPTR0816 DC C'T202' 002C1C 10450+TDSCDAT CSECT 002C1C 10451+ DS 0F 002C1C 040013A1 10452+ DC AL1(L'SPTR0816),AL3(SPTR0816) 0013A5 10453+TEXT CSECT 0013A5 C1C840D96B94 10454+SPTR0817 DC C'AH R,m' 002C20 10455+TDSCDAT CSECT 002C20 10456+ DS 0F 002C20 060013A5 10457+ DC AL1(L'SPTR0817),AL3(SPTR0817) 10458+* 004AAC 10459+TDSCTBL CSECT 04AAC 10460+T202TPTR EQU * 004AAC 00002C08 10461+ DC A(T202TDSC) enabled test 10462+* 009BC0 10463+TCODE CSECT 009BC0 10464+ DS 0D ensure double word alignment for test 009BC0 10465+T202 DS 0H 01650000 009BC0 90EC D00C 0000C 10466+ STM 14,12,12(13) SAVE REGISTERS 02950000 009BC4 18CF 10467+ LR R12,R15 base register := entry address 09BC0 10468+ USING T202,R12 declare code base register 009BC6 41B0 C020 09BE0 10469+ LA R11,T202L load loop target to R11 009BCA 58F0 C0F8 09CB8 10470+ L R15,=A(SAVETST) R15 := current save area 009BCE 50DF 0004 00004 10471+ ST R13,4(R15) set back pointer in current save area PAGE 193 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009BD2 182D 10472+ LR R2,R13 remember callers save area 009BD4 18DF 10473+ LR R13,R15 setup current save area 009BD6 50D2 0008 00008 10474+ ST R13,8(R2) set forw pointer in callers save area 00000 10475+ USING TDSC,R1 declare TDSC base register 009BDA 58F0 1008 00008 10476+ L R15,TLRCNT load local repeat count to R15 10477+* 10478 * 009BDE 1722 10479 XR R2,R2 10480 T202L REPINS AH,(R2,=H'1') repeat: AH R2,=H'1' 10481+* 10482+* build from sublist &ALIST a comma separated string &ARGS 10483+* 10484+* 10485+* 10486+* 10487+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10488+* this allows to transfer the repeat count from last TDSCGEN call 10489+* 10490+* 09BE0 10491+T202L EQU * 10492+* 10493+* write a comment indicating what REPINS does (in case NOGEN in effect) 10494+* 10495+*,// REPINS: do 50 times: 10496+* 10497+* MNOTE requires that ' is doubled for expanded variables 10498+* thus build &MASTR as a copy of '&ARGS with ' doubled 10499+* 10500+* 10501+*,// AH R2,=H'1' 10502+* 10503+* finally generate code: &ICNT copies of &CODE &ARGS 10504+* 009BE0 4A20 C0FC 09CBC 10505+ AH R2,=H'1' 009BE4 4A20 C0FC 09CBC 10506+ AH R2,=H'1' 009BE8 4A20 C0FC 09CBC 10507+ AH R2,=H'1' 009BEC 4A20 C0FC 09CBC 10508+ AH R2,=H'1' 009BF0 4A20 C0FC 09CBC 10509+ AH R2,=H'1' 009BF4 4A20 C0FC 09CBC 10510+ AH R2,=H'1' 009BF8 4A20 C0FC 09CBC 10511+ AH R2,=H'1' 009BFC 4A20 C0FC 09CBC 10512+ AH R2,=H'1' 009C00 4A20 C0FC 09CBC 10513+ AH R2,=H'1' 009C04 4A20 C0FC 09CBC 10514+ AH R2,=H'1' 009C08 4A20 C0FC 09CBC 10515+ AH R2,=H'1' 009C0C 4A20 C0FC 09CBC 10516+ AH R2,=H'1' 009C10 4A20 C0FC 09CBC 10517+ AH R2,=H'1' 009C14 4A20 C0FC 09CBC 10518+ AH R2,=H'1' 009C18 4A20 C0FC 09CBC 10519+ AH R2,=H'1' 009C1C 4A20 C0FC 09CBC 10520+ AH R2,=H'1' 009C20 4A20 C0FC 09CBC 10521+ AH R2,=H'1' 009C24 4A20 C0FC 09CBC 10522+ AH R2,=H'1' 009C28 4A20 C0FC 09CBC 10523+ AH R2,=H'1' 009C2C 4A20 C0FC 09CBC 10524+ AH R2,=H'1' 009C30 4A20 C0FC 09CBC 10525+ AH R2,=H'1' 009C34 4A20 C0FC 09CBC 10526+ AH R2,=H'1' PAGE 194 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009C38 4A20 C0FC 09CBC 10527+ AH R2,=H'1' 009C3C 4A20 C0FC 09CBC 10528+ AH R2,=H'1' 009C40 4A20 C0FC 09CBC 10529+ AH R2,=H'1' 009C44 4A20 C0FC 09CBC 10530+ AH R2,=H'1' 009C48 4A20 C0FC 09CBC 10531+ AH R2,=H'1' 009C4C 4A20 C0FC 09CBC 10532+ AH R2,=H'1' 009C50 4A20 C0FC 09CBC 10533+ AH R2,=H'1' 009C54 4A20 C0FC 09CBC 10534+ AH R2,=H'1' 009C58 4A20 C0FC 09CBC 10535+ AH R2,=H'1' 009C5C 4A20 C0FC 09CBC 10536+ AH R2,=H'1' 009C60 4A20 C0FC 09CBC 10537+ AH R2,=H'1' 009C64 4A20 C0FC 09CBC 10538+ AH R2,=H'1' 009C68 4A20 C0FC 09CBC 10539+ AH R2,=H'1' 009C6C 4A20 C0FC 09CBC 10540+ AH R2,=H'1' 009C70 4A20 C0FC 09CBC 10541+ AH R2,=H'1' 009C74 4A20 C0FC 09CBC 10542+ AH R2,=H'1' 009C78 4A20 C0FC 09CBC 10543+ AH R2,=H'1' 009C7C 4A20 C0FC 09CBC 10544+ AH R2,=H'1' 009C80 4A20 C0FC 09CBC 10545+ AH R2,=H'1' 009C84 4A20 C0FC 09CBC 10546+ AH R2,=H'1' 009C88 4A20 C0FC 09CBC 10547+ AH R2,=H'1' 009C8C 4A20 C0FC 09CBC 10548+ AH R2,=H'1' 009C90 4A20 C0FC 09CBC 10549+ AH R2,=H'1' 009C94 4A20 C0FC 09CBC 10550+ AH R2,=H'1' 009C98 4A20 C0FC 09CBC 10551+ AH R2,=H'1' 009C9C 4A20 C0FC 09CBC 10552+ AH R2,=H'1' 009CA0 4A20 C0FC 09CBC 10553+ AH R2,=H'1' 009CA4 4A20 C0FC 09CBC 10554+ AH R2,=H'1' 10555+* 009CA8 06FB 10556 BCTR R15,R11 10557 TSIMRET 009CAA 58F0 C0F8 09CB8 10558+ L R15,=A(SAVETST) R15 := current save area 009CAE 58DF 0004 00004 10559+ L R13,4(R15) get old save area back 009CB2 98EC D00C 0000C 10560+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009CB6 07FE 10561+ BR 14 RETURN 02000000 10562 TSIMEND 009CB8 10563+ LTORG 009CB8 00000458 10564 =A(SAVETST) 009CBC 0001 10565 =H'1' 09CBE 10566+T202TEND EQU * 10567 * 10568 * Test 203 -- ALR R,R -------------------------------------- 10569 * 10570 TSIMBEG T203,17000,100,1,C'ALR R,R' 10571+* 002C24 10572+TDSCDAT CSECT 002C28 10573+ DS 0D 10574+* 002C28 00009CC0 10575+T203TDSC DC A(T203) // TENTRY 002C2C 00000104 10576+ DC A(T203TEND-T203) // TLENGTH 002C30 00004268 10577+ DC F'17000' // TLRCNT 002C34 00000064 10578+ DC F'100' // TIGCNT 002C38 00000001 10579+ DC F'1' // TLTYPE 0013AB 10580+TEXT CSECT 0013AB E3F2F0F3 10581+SPTR0828 DC C'T203' PAGE 195 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002C3C 10582+TDSCDAT CSECT 002C3C 10583+ DS 0F 002C3C 040013AB 10584+ DC AL1(L'SPTR0828),AL3(SPTR0828) 0013AF 10585+TEXT CSECT 0013AF C1D3D940D96BD9 10586+SPTR0829 DC C'ALR R,R' 002C40 10587+TDSCDAT CSECT 002C40 10588+ DS 0F 002C40 070013AF 10589+ DC AL1(L'SPTR0829),AL3(SPTR0829) 10590+* 004AB0 10591+TDSCTBL CSECT 04AB0 10592+T203TPTR EQU * 004AB0 00002C28 10593+ DC A(T203TDSC) enabled test 10594+* 009CBE 10595+TCODE CSECT 009CC0 10596+ DS 0D ensure double word alignment for test 009CC0 10597+T203 DS 0H 01650000 009CC0 90EC D00C 0000C 10598+ STM 14,12,12(13) SAVE REGISTERS 02950000 009CC4 18CF 10599+ LR R12,R15 base register := entry address 09CC0 10600+ USING T203,R12 declare code base register 009CC6 41B0 C024 09CE4 10601+ LA R11,T203L load loop target to R11 009CCA 58F0 C100 09DC0 10602+ L R15,=A(SAVETST) R15 := current save area 009CCE 50DF 0004 00004 10603+ ST R13,4(R15) set back pointer in current save area 009CD2 182D 10604+ LR R2,R13 remember callers save area 009CD4 18DF 10605+ LR R13,R15 setup current save area 009CD6 50D2 0008 00008 10606+ ST R13,8(R2) set forw pointer in callers save area 00000 10607+ USING TDSC,R1 declare TDSC base register 009CDA 58F0 1008 00008 10608+ L R15,TLRCNT load local repeat count to R15 10609+* 10610 * 009CDE 1722 10611 XR R2,R2 009CE0 4130 0001 00001 10612 LA R3,1 10613 T203L REPINS ALR,(R2,R3) repeat: ALR R2,R3 10614+* 10615+* build from sublist &ALIST a comma separated string &ARGS 10616+* 10617+* 10618+* 10619+* 10620+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10621+* this allows to transfer the repeat count from last TDSCGEN call 10622+* 10623+* 09CE4 10624+T203L EQU * 10625+* 10626+* write a comment indicating what REPINS does (in case NOGEN in effect) 10627+* 10628+*,// REPINS: do 100 times: 10629+* 10630+* MNOTE requires that ' is doubled for expanded variables 10631+* thus build &MASTR as a copy of '&ARGS with ' doubled 10632+* 10633+* 10634+*,// ALR R2,R3 10635+* 10636+* finally generate code: &ICNT copies of &CODE &ARGS PAGE 196 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 10637+* 009CE4 1E23 10638+ ALR R2,R3 009CE6 1E23 10639+ ALR R2,R3 009CE8 1E23 10640+ ALR R2,R3 009CEA 1E23 10641+ ALR R2,R3 009CEC 1E23 10642+ ALR R2,R3 009CEE 1E23 10643+ ALR R2,R3 009CF0 1E23 10644+ ALR R2,R3 009CF2 1E23 10645+ ALR R2,R3 009CF4 1E23 10646+ ALR R2,R3 009CF6 1E23 10647+ ALR R2,R3 009CF8 1E23 10648+ ALR R2,R3 009CFA 1E23 10649+ ALR R2,R3 009CFC 1E23 10650+ ALR R2,R3 009CFE 1E23 10651+ ALR R2,R3 009D00 1E23 10652+ ALR R2,R3 009D02 1E23 10653+ ALR R2,R3 009D04 1E23 10654+ ALR R2,R3 009D06 1E23 10655+ ALR R2,R3 009D08 1E23 10656+ ALR R2,R3 009D0A 1E23 10657+ ALR R2,R3 009D0C 1E23 10658+ ALR R2,R3 009D0E 1E23 10659+ ALR R2,R3 009D10 1E23 10660+ ALR R2,R3 009D12 1E23 10661+ ALR R2,R3 009D14 1E23 10662+ ALR R2,R3 009D16 1E23 10663+ ALR R2,R3 009D18 1E23 10664+ ALR R2,R3 009D1A 1E23 10665+ ALR R2,R3 009D1C 1E23 10666+ ALR R2,R3 009D1E 1E23 10667+ ALR R2,R3 009D20 1E23 10668+ ALR R2,R3 009D22 1E23 10669+ ALR R2,R3 009D24 1E23 10670+ ALR R2,R3 009D26 1E23 10671+ ALR R2,R3 009D28 1E23 10672+ ALR R2,R3 009D2A 1E23 10673+ ALR R2,R3 009D2C 1E23 10674+ ALR R2,R3 009D2E 1E23 10675+ ALR R2,R3 009D30 1E23 10676+ ALR R2,R3 009D32 1E23 10677+ ALR R2,R3 009D34 1E23 10678+ ALR R2,R3 009D36 1E23 10679+ ALR R2,R3 009D38 1E23 10680+ ALR R2,R3 009D3A 1E23 10681+ ALR R2,R3 009D3C 1E23 10682+ ALR R2,R3 009D3E 1E23 10683+ ALR R2,R3 009D40 1E23 10684+ ALR R2,R3 009D42 1E23 10685+ ALR R2,R3 009D44 1E23 10686+ ALR R2,R3 009D46 1E23 10687+ ALR R2,R3 009D48 1E23 10688+ ALR R2,R3 009D4A 1E23 10689+ ALR R2,R3 009D4C 1E23 10690+ ALR R2,R3 009D4E 1E23 10691+ ALR R2,R3 PAGE 197 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009D50 1E23 10692+ ALR R2,R3 009D52 1E23 10693+ ALR R2,R3 009D54 1E23 10694+ ALR R2,R3 009D56 1E23 10695+ ALR R2,R3 009D58 1E23 10696+ ALR R2,R3 009D5A 1E23 10697+ ALR R2,R3 009D5C 1E23 10698+ ALR R2,R3 009D5E 1E23 10699+ ALR R2,R3 009D60 1E23 10700+ ALR R2,R3 009D62 1E23 10701+ ALR R2,R3 009D64 1E23 10702+ ALR R2,R3 009D66 1E23 10703+ ALR R2,R3 009D68 1E23 10704+ ALR R2,R3 009D6A 1E23 10705+ ALR R2,R3 009D6C 1E23 10706+ ALR R2,R3 009D6E 1E23 10707+ ALR R2,R3 009D70 1E23 10708+ ALR R2,R3 009D72 1E23 10709+ ALR R2,R3 009D74 1E23 10710+ ALR R2,R3 009D76 1E23 10711+ ALR R2,R3 009D78 1E23 10712+ ALR R2,R3 009D7A 1E23 10713+ ALR R2,R3 009D7C 1E23 10714+ ALR R2,R3 009D7E 1E23 10715+ ALR R2,R3 009D80 1E23 10716+ ALR R2,R3 009D82 1E23 10717+ ALR R2,R3 009D84 1E23 10718+ ALR R2,R3 009D86 1E23 10719+ ALR R2,R3 009D88 1E23 10720+ ALR R2,R3 009D8A 1E23 10721+ ALR R2,R3 009D8C 1E23 10722+ ALR R2,R3 009D8E 1E23 10723+ ALR R2,R3 009D90 1E23 10724+ ALR R2,R3 009D92 1E23 10725+ ALR R2,R3 009D94 1E23 10726+ ALR R2,R3 009D96 1E23 10727+ ALR R2,R3 009D98 1E23 10728+ ALR R2,R3 009D9A 1E23 10729+ ALR R2,R3 009D9C 1E23 10730+ ALR R2,R3 009D9E 1E23 10731+ ALR R2,R3 009DA0 1E23 10732+ ALR R2,R3 009DA2 1E23 10733+ ALR R2,R3 009DA4 1E23 10734+ ALR R2,R3 009DA6 1E23 10735+ ALR R2,R3 009DA8 1E23 10736+ ALR R2,R3 009DAA 1E23 10737+ ALR R2,R3 10738+* 009DAC 06FB 10739 BCTR R15,R11 10740 TSIMRET 009DAE 58F0 C100 09DC0 10741+ L R15,=A(SAVETST) R15 := current save area 009DB2 58DF 0004 00004 10742+ L R13,4(R15) get old save area back 009DB6 98EC D00C 0000C 10743+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009DBA 07FE 10744+ BR 14 RETURN 02000000 10745 TSIMEND 009DC0 10746+ LTORG PAGE 198 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009DC0 00000458 10747 =A(SAVETST) 09DC4 10748+T203TEND EQU * 10749 * 10750 * Test 204 -- AL R,m --------------------------------------- 10751 * 10752 TSIMBEG T204,10000,50,1,C'AL R,m' 10753+* 002C44 10754+TDSCDAT CSECT 002C48 10755+ DS 0D 10756+* 002C48 00009DC8 10757+T204TDSC DC A(T204) // TENTRY 002C4C 00000100 10758+ DC A(T204TEND-T204) // TLENGTH 002C50 00002710 10759+ DC F'10000' // TLRCNT 002C54 00000032 10760+ DC F'50' // TIGCNT 002C58 00000001 10761+ DC F'1' // TLTYPE 0013B6 10762+TEXT CSECT 0013B6 E3F2F0F4 10763+SPTR0840 DC C'T204' 002C5C 10764+TDSCDAT CSECT 002C5C 10765+ DS 0F 002C5C 040013B6 10766+ DC AL1(L'SPTR0840),AL3(SPTR0840) 0013BA 10767+TEXT CSECT 0013BA C1D340D96B94 10768+SPTR0841 DC C'AL R,m' 002C60 10769+TDSCDAT CSECT 002C60 10770+ DS 0F 002C60 060013BA 10771+ DC AL1(L'SPTR0841),AL3(SPTR0841) 10772+* 004AB4 10773+TDSCTBL CSECT 04AB4 10774+T204TPTR EQU * 004AB4 00002C48 10775+ DC A(T204TDSC) enabled test 10776+* 009DC4 10777+TCODE CSECT 009DC8 10778+ DS 0D ensure double word alignment for test 009DC8 10779+T204 DS 0H 01650000 009DC8 90EC D00C 0000C 10780+ STM 14,12,12(13) SAVE REGISTERS 02950000 009DCC 18CF 10781+ LR R12,R15 base register := entry address 09DC8 10782+ USING T204,R12 declare code base register 009DCE 41B0 C020 09DE8 10783+ LA R11,T204L load loop target to R11 009DD2 58F0 C0F8 09EC0 10784+ L R15,=A(SAVETST) R15 := current save area 009DD6 50DF 0004 00004 10785+ ST R13,4(R15) set back pointer in current save area 009DDA 182D 10786+ LR R2,R13 remember callers save area 009DDC 18DF 10787+ LR R13,R15 setup current save area 009DDE 50D2 0008 00008 10788+ ST R13,8(R2) set forw pointer in callers save area 00000 10789+ USING TDSC,R1 declare TDSC base register 009DE2 58F0 1008 00008 10790+ L R15,TLRCNT load local repeat count to R15 10791+* 10792 * 009DE6 1722 10793 XR R2,R2 10794 T204L REPINS AL,(R2,=F'1') repeat: AL R2,=F'1' 10795+* 10796+* build from sublist &ALIST a comma separated string &ARGS 10797+* 10798+* 10799+* 10800+* 10801+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT PAGE 199 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 10802+* this allows to transfer the repeat count from last TDSCGEN call 10803+* 10804+* 09DE8 10805+T204L EQU * 10806+* 10807+* write a comment indicating what REPINS does (in case NOGEN in effect) 10808+* 10809+*,// REPINS: do 50 times: 10810+* 10811+* MNOTE requires that ' is doubled for expanded variables 10812+* thus build &MASTR as a copy of '&ARGS with ' doubled 10813+* 10814+* 10815+*,// AL R2,=F'1' 10816+* 10817+* finally generate code: &ICNT copies of &CODE &ARGS 10818+* 009DE8 5E20 C0FC 09EC4 10819+ AL R2,=F'1' 009DEC 5E20 C0FC 09EC4 10820+ AL R2,=F'1' 009DF0 5E20 C0FC 09EC4 10821+ AL R2,=F'1' 009DF4 5E20 C0FC 09EC4 10822+ AL R2,=F'1' 009DF8 5E20 C0FC 09EC4 10823+ AL R2,=F'1' 009DFC 5E20 C0FC 09EC4 10824+ AL R2,=F'1' 009E00 5E20 C0FC 09EC4 10825+ AL R2,=F'1' 009E04 5E20 C0FC 09EC4 10826+ AL R2,=F'1' 009E08 5E20 C0FC 09EC4 10827+ AL R2,=F'1' 009E0C 5E20 C0FC 09EC4 10828+ AL R2,=F'1' 009E10 5E20 C0FC 09EC4 10829+ AL R2,=F'1' 009E14 5E20 C0FC 09EC4 10830+ AL R2,=F'1' 009E18 5E20 C0FC 09EC4 10831+ AL R2,=F'1' 009E1C 5E20 C0FC 09EC4 10832+ AL R2,=F'1' 009E20 5E20 C0FC 09EC4 10833+ AL R2,=F'1' 009E24 5E20 C0FC 09EC4 10834+ AL R2,=F'1' 009E28 5E20 C0FC 09EC4 10835+ AL R2,=F'1' 009E2C 5E20 C0FC 09EC4 10836+ AL R2,=F'1' 009E30 5E20 C0FC 09EC4 10837+ AL R2,=F'1' 009E34 5E20 C0FC 09EC4 10838+ AL R2,=F'1' 009E38 5E20 C0FC 09EC4 10839+ AL R2,=F'1' 009E3C 5E20 C0FC 09EC4 10840+ AL R2,=F'1' 009E40 5E20 C0FC 09EC4 10841+ AL R2,=F'1' 009E44 5E20 C0FC 09EC4 10842+ AL R2,=F'1' 009E48 5E20 C0FC 09EC4 10843+ AL R2,=F'1' 009E4C 5E20 C0FC 09EC4 10844+ AL R2,=F'1' 009E50 5E20 C0FC 09EC4 10845+ AL R2,=F'1' 009E54 5E20 C0FC 09EC4 10846+ AL R2,=F'1' 009E58 5E20 C0FC 09EC4 10847+ AL R2,=F'1' 009E5C 5E20 C0FC 09EC4 10848+ AL R2,=F'1' 009E60 5E20 C0FC 09EC4 10849+ AL R2,=F'1' 009E64 5E20 C0FC 09EC4 10850+ AL R2,=F'1' 009E68 5E20 C0FC 09EC4 10851+ AL R2,=F'1' 009E6C 5E20 C0FC 09EC4 10852+ AL R2,=F'1' 009E70 5E20 C0FC 09EC4 10853+ AL R2,=F'1' 009E74 5E20 C0FC 09EC4 10854+ AL R2,=F'1' 009E78 5E20 C0FC 09EC4 10855+ AL R2,=F'1' 009E7C 5E20 C0FC 09EC4 10856+ AL R2,=F'1' PAGE 200 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009E80 5E20 C0FC 09EC4 10857+ AL R2,=F'1' 009E84 5E20 C0FC 09EC4 10858+ AL R2,=F'1' 009E88 5E20 C0FC 09EC4 10859+ AL R2,=F'1' 009E8C 5E20 C0FC 09EC4 10860+ AL R2,=F'1' 009E90 5E20 C0FC 09EC4 10861+ AL R2,=F'1' 009E94 5E20 C0FC 09EC4 10862+ AL R2,=F'1' 009E98 5E20 C0FC 09EC4 10863+ AL R2,=F'1' 009E9C 5E20 C0FC 09EC4 10864+ AL R2,=F'1' 009EA0 5E20 C0FC 09EC4 10865+ AL R2,=F'1' 009EA4 5E20 C0FC 09EC4 10866+ AL R2,=F'1' 009EA8 5E20 C0FC 09EC4 10867+ AL R2,=F'1' 009EAC 5E20 C0FC 09EC4 10868+ AL R2,=F'1' 10869+* 009EB0 06FB 10870 BCTR R15,R11 10871 TSIMRET 009EB2 58F0 C0F8 09EC0 10872+ L R15,=A(SAVETST) R15 := current save area 009EB6 58DF 0004 00004 10873+ L R13,4(R15) get old save area back 009EBA 98EC D00C 0000C 10874+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009EBE 07FE 10875+ BR 14 RETURN 02000000 10876 TSIMEND 009EC0 10877+ LTORG 009EC0 00000458 10878 =A(SAVETST) 009EC4 00000001 10879 =F'1' 09EC8 10880+T204TEND EQU * 10881 * 10882 * Test 205 -- SR R,R --------------------------------------- 10883 * 10884 TSIMBEG T205,14000,100,1,C'SR R,R' 10885+* 002C64 10886+TDSCDAT CSECT 002C68 10887+ DS 0D 10888+* 002C68 00009EC8 10889+T205TDSC DC A(T205) // TENTRY 002C6C 00000104 10890+ DC A(T205TEND-T205) // TLENGTH 002C70 000036B0 10891+ DC F'14000' // TLRCNT 002C74 00000064 10892+ DC F'100' // TIGCNT 002C78 00000001 10893+ DC F'1' // TLTYPE 0013C0 10894+TEXT CSECT 0013C0 E3F2F0F5 10895+SPTR0852 DC C'T205' 002C7C 10896+TDSCDAT CSECT 002C7C 10897+ DS 0F 002C7C 040013C0 10898+ DC AL1(L'SPTR0852),AL3(SPTR0852) 0013C4 10899+TEXT CSECT 0013C4 E2D940D96BD9 10900+SPTR0853 DC C'SR R,R' 002C80 10901+TDSCDAT CSECT 002C80 10902+ DS 0F 002C80 060013C4 10903+ DC AL1(L'SPTR0853),AL3(SPTR0853) 10904+* 004AB8 10905+TDSCTBL CSECT 04AB8 10906+T205TPTR EQU * 004AB8 00002C68 10907+ DC A(T205TDSC) enabled test 10908+* 009EC8 10909+TCODE CSECT 009EC8 10910+ DS 0D ensure double word alignment for test 009EC8 10911+T205 DS 0H 01650000 PAGE 201 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009EC8 90EC D00C 0000C 10912+ STM 14,12,12(13) SAVE REGISTERS 02950000 009ECC 18CF 10913+ LR R12,R15 base register := entry address 09EC8 10914+ USING T205,R12 declare code base register 009ECE 41B0 C024 09EEC 10915+ LA R11,T205L load loop target to R11 009ED2 58F0 C100 09FC8 10916+ L R15,=A(SAVETST) R15 := current save area 009ED6 50DF 0004 00004 10917+ ST R13,4(R15) set back pointer in current save area 009EDA 182D 10918+ LR R2,R13 remember callers save area 009EDC 18DF 10919+ LR R13,R15 setup current save area 009EDE 50D2 0008 00008 10920+ ST R13,8(R2) set forw pointer in callers save area 00000 10921+ USING TDSC,R1 declare TDSC base register 009EE2 58F0 1008 00008 10922+ L R15,TLRCNT load local repeat count to R15 10923+* 10924 * 009EE6 1722 10925 XR R2,R2 009EE8 4130 0001 00001 10926 LA R3,1 10927 T205L REPINS SR,(R2,R3) repeat: SR R2,R3 10928+* 10929+* build from sublist &ALIST a comma separated string &ARGS 10930+* 10931+* 10932+* 10933+* 10934+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 10935+* this allows to transfer the repeat count from last TDSCGEN call 10936+* 10937+* 09EEC 10938+T205L EQU * 10939+* 10940+* write a comment indicating what REPINS does (in case NOGEN in effect) 10941+* 10942+*,// REPINS: do 100 times: 10943+* 10944+* MNOTE requires that ' is doubled for expanded variables 10945+* thus build &MASTR as a copy of '&ARGS with ' doubled 10946+* 10947+* 10948+*,// SR R2,R3 10949+* 10950+* finally generate code: &ICNT copies of &CODE &ARGS 10951+* 009EEC 1B23 10952+ SR R2,R3 009EEE 1B23 10953+ SR R2,R3 009EF0 1B23 10954+ SR R2,R3 009EF2 1B23 10955+ SR R2,R3 009EF4 1B23 10956+ SR R2,R3 009EF6 1B23 10957+ SR R2,R3 009EF8 1B23 10958+ SR R2,R3 009EFA 1B23 10959+ SR R2,R3 009EFC 1B23 10960+ SR R2,R3 009EFE 1B23 10961+ SR R2,R3 009F00 1B23 10962+ SR R2,R3 009F02 1B23 10963+ SR R2,R3 009F04 1B23 10964+ SR R2,R3 009F06 1B23 10965+ SR R2,R3 009F08 1B23 10966+ SR R2,R3 PAGE 202 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009F0A 1B23 10967+ SR R2,R3 009F0C 1B23 10968+ SR R2,R3 009F0E 1B23 10969+ SR R2,R3 009F10 1B23 10970+ SR R2,R3 009F12 1B23 10971+ SR R2,R3 009F14 1B23 10972+ SR R2,R3 009F16 1B23 10973+ SR R2,R3 009F18 1B23 10974+ SR R2,R3 009F1A 1B23 10975+ SR R2,R3 009F1C 1B23 10976+ SR R2,R3 009F1E 1B23 10977+ SR R2,R3 009F20 1B23 10978+ SR R2,R3 009F22 1B23 10979+ SR R2,R3 009F24 1B23 10980+ SR R2,R3 009F26 1B23 10981+ SR R2,R3 009F28 1B23 10982+ SR R2,R3 009F2A 1B23 10983+ SR R2,R3 009F2C 1B23 10984+ SR R2,R3 009F2E 1B23 10985+ SR R2,R3 009F30 1B23 10986+ SR R2,R3 009F32 1B23 10987+ SR R2,R3 009F34 1B23 10988+ SR R2,R3 009F36 1B23 10989+ SR R2,R3 009F38 1B23 10990+ SR R2,R3 009F3A 1B23 10991+ SR R2,R3 009F3C 1B23 10992+ SR R2,R3 009F3E 1B23 10993+ SR R2,R3 009F40 1B23 10994+ SR R2,R3 009F42 1B23 10995+ SR R2,R3 009F44 1B23 10996+ SR R2,R3 009F46 1B23 10997+ SR R2,R3 009F48 1B23 10998+ SR R2,R3 009F4A 1B23 10999+ SR R2,R3 009F4C 1B23 11000+ SR R2,R3 009F4E 1B23 11001+ SR R2,R3 009F50 1B23 11002+ SR R2,R3 009F52 1B23 11003+ SR R2,R3 009F54 1B23 11004+ SR R2,R3 009F56 1B23 11005+ SR R2,R3 009F58 1B23 11006+ SR R2,R3 009F5A 1B23 11007+ SR R2,R3 009F5C 1B23 11008+ SR R2,R3 009F5E 1B23 11009+ SR R2,R3 009F60 1B23 11010+ SR R2,R3 009F62 1B23 11011+ SR R2,R3 009F64 1B23 11012+ SR R2,R3 009F66 1B23 11013+ SR R2,R3 009F68 1B23 11014+ SR R2,R3 009F6A 1B23 11015+ SR R2,R3 009F6C 1B23 11016+ SR R2,R3 009F6E 1B23 11017+ SR R2,R3 009F70 1B23 11018+ SR R2,R3 009F72 1B23 11019+ SR R2,R3 009F74 1B23 11020+ SR R2,R3 009F76 1B23 11021+ SR R2,R3 PAGE 203 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 009F78 1B23 11022+ SR R2,R3 009F7A 1B23 11023+ SR R2,R3 009F7C 1B23 11024+ SR R2,R3 009F7E 1B23 11025+ SR R2,R3 009F80 1B23 11026+ SR R2,R3 009F82 1B23 11027+ SR R2,R3 009F84 1B23 11028+ SR R2,R3 009F86 1B23 11029+ SR R2,R3 009F88 1B23 11030+ SR R2,R3 009F8A 1B23 11031+ SR R2,R3 009F8C 1B23 11032+ SR R2,R3 009F8E 1B23 11033+ SR R2,R3 009F90 1B23 11034+ SR R2,R3 009F92 1B23 11035+ SR R2,R3 009F94 1B23 11036+ SR R2,R3 009F96 1B23 11037+ SR R2,R3 009F98 1B23 11038+ SR R2,R3 009F9A 1B23 11039+ SR R2,R3 009F9C 1B23 11040+ SR R2,R3 009F9E 1B23 11041+ SR R2,R3 009FA0 1B23 11042+ SR R2,R3 009FA2 1B23 11043+ SR R2,R3 009FA4 1B23 11044+ SR R2,R3 009FA6 1B23 11045+ SR R2,R3 009FA8 1B23 11046+ SR R2,R3 009FAA 1B23 11047+ SR R2,R3 009FAC 1B23 11048+ SR R2,R3 009FAE 1B23 11049+ SR R2,R3 009FB0 1B23 11050+ SR R2,R3 009FB2 1B23 11051+ SR R2,R3 11052+* 009FB4 06FB 11053 BCTR R15,R11 11054 TSIMRET 009FB6 58F0 C100 09FC8 11055+ L R15,=A(SAVETST) R15 := current save area 009FBA 58DF 0004 00004 11056+ L R13,4(R15) get old save area back 009FBE 98EC D00C 0000C 11057+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 009FC2 07FE 11058+ BR 14 RETURN 02000000 11059 TSIMEND 009FC8 11060+ LTORG 009FC8 00000458 11061 =A(SAVETST) 09FCC 11062+T205TEND EQU * 11063 * 11064 * Test 206 -- S R,m ---------------------------------------- 11065 * 11066 TSIMBEG T206,10000,50,1,C'S R,m' 11067+* 002C84 11068+TDSCDAT CSECT 002C88 11069+ DS 0D 11070+* 002C88 00009FD0 11071+T206TDSC DC A(T206) // TENTRY 002C8C 00000100 11072+ DC A(T206TEND-T206) // TLENGTH 002C90 00002710 11073+ DC F'10000' // TLRCNT 002C94 00000032 11074+ DC F'50' // TIGCNT 002C98 00000001 11075+ DC F'1' // TLTYPE 0013CA 11076+TEXT CSECT PAGE 204 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0013CA E3F2F0F6 11077+SPTR0864 DC C'T206' 002C9C 11078+TDSCDAT CSECT 002C9C 11079+ DS 0F 002C9C 040013CA 11080+ DC AL1(L'SPTR0864),AL3(SPTR0864) 0013CE 11081+TEXT CSECT 0013CE E240D96B94 11082+SPTR0865 DC C'S R,m' 002CA0 11083+TDSCDAT CSECT 002CA0 11084+ DS 0F 002CA0 050013CE 11085+ DC AL1(L'SPTR0865),AL3(SPTR0865) 11086+* 004ABC 11087+TDSCTBL CSECT 04ABC 11088+T206TPTR EQU * 004ABC 00002C88 11089+ DC A(T206TDSC) enabled test 11090+* 009FCC 11091+TCODE CSECT 009FD0 11092+ DS 0D ensure double word alignment for test 009FD0 11093+T206 DS 0H 01650000 009FD0 90EC D00C 0000C 11094+ STM 14,12,12(13) SAVE REGISTERS 02950000 009FD4 18CF 11095+ LR R12,R15 base register := entry address 09FD0 11096+ USING T206,R12 declare code base register 009FD6 41B0 C020 09FF0 11097+ LA R11,T206L load loop target to R11 009FDA 58F0 C0F8 0A0C8 11098+ L R15,=A(SAVETST) R15 := current save area 009FDE 50DF 0004 00004 11099+ ST R13,4(R15) set back pointer in current save area 009FE2 182D 11100+ LR R2,R13 remember callers save area 009FE4 18DF 11101+ LR R13,R15 setup current save area 009FE6 50D2 0008 00008 11102+ ST R13,8(R2) set forw pointer in callers save area 00000 11103+ USING TDSC,R1 declare TDSC base register 009FEA 58F0 1008 00008 11104+ L R15,TLRCNT load local repeat count to R15 11105+* 11106 * 009FEE 1722 11107 XR R2,R2 11108 T206L REPINS S,(R2,=F'1') repeat: S R2,=F'1' 11109+* 11110+* build from sublist &ALIST a comma separated string &ARGS 11111+* 11112+* 11113+* 11114+* 11115+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11116+* this allows to transfer the repeat count from last TDSCGEN call 11117+* 11118+* 09FF0 11119+T206L EQU * 11120+* 11121+* write a comment indicating what REPINS does (in case NOGEN in effect) 11122+* 11123+*,// REPINS: do 50 times: 11124+* 11125+* MNOTE requires that ' is doubled for expanded variables 11126+* thus build &MASTR as a copy of '&ARGS with ' doubled 11127+* 11128+* 11129+*,// S R2,=F'1' 11130+* 11131+* finally generate code: &ICNT copies of &CODE &ARGS PAGE 205 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 11132+* 009FF0 5B20 C0FC 0A0CC 11133+ S R2,=F'1' 009FF4 5B20 C0FC 0A0CC 11134+ S R2,=F'1' 009FF8 5B20 C0FC 0A0CC 11135+ S R2,=F'1' 009FFC 5B20 C0FC 0A0CC 11136+ S R2,=F'1' 00A000 5B20 C0FC 0A0CC 11137+ S R2,=F'1' 00A004 5B20 C0FC 0A0CC 11138+ S R2,=F'1' 00A008 5B20 C0FC 0A0CC 11139+ S R2,=F'1' 00A00C 5B20 C0FC 0A0CC 11140+ S R2,=F'1' 00A010 5B20 C0FC 0A0CC 11141+ S R2,=F'1' 00A014 5B20 C0FC 0A0CC 11142+ S R2,=F'1' 00A018 5B20 C0FC 0A0CC 11143+ S R2,=F'1' 00A01C 5B20 C0FC 0A0CC 11144+ S R2,=F'1' 00A020 5B20 C0FC 0A0CC 11145+ S R2,=F'1' 00A024 5B20 C0FC 0A0CC 11146+ S R2,=F'1' 00A028 5B20 C0FC 0A0CC 11147+ S R2,=F'1' 00A02C 5B20 C0FC 0A0CC 11148+ S R2,=F'1' 00A030 5B20 C0FC 0A0CC 11149+ S R2,=F'1' 00A034 5B20 C0FC 0A0CC 11150+ S R2,=F'1' 00A038 5B20 C0FC 0A0CC 11151+ S R2,=F'1' 00A03C 5B20 C0FC 0A0CC 11152+ S R2,=F'1' 00A040 5B20 C0FC 0A0CC 11153+ S R2,=F'1' 00A044 5B20 C0FC 0A0CC 11154+ S R2,=F'1' 00A048 5B20 C0FC 0A0CC 11155+ S R2,=F'1' 00A04C 5B20 C0FC 0A0CC 11156+ S R2,=F'1' 00A050 5B20 C0FC 0A0CC 11157+ S R2,=F'1' 00A054 5B20 C0FC 0A0CC 11158+ S R2,=F'1' 00A058 5B20 C0FC 0A0CC 11159+ S R2,=F'1' 00A05C 5B20 C0FC 0A0CC 11160+ S R2,=F'1' 00A060 5B20 C0FC 0A0CC 11161+ S R2,=F'1' 00A064 5B20 C0FC 0A0CC 11162+ S R2,=F'1' 00A068 5B20 C0FC 0A0CC 11163+ S R2,=F'1' 00A06C 5B20 C0FC 0A0CC 11164+ S R2,=F'1' 00A070 5B20 C0FC 0A0CC 11165+ S R2,=F'1' 00A074 5B20 C0FC 0A0CC 11166+ S R2,=F'1' 00A078 5B20 C0FC 0A0CC 11167+ S R2,=F'1' 00A07C 5B20 C0FC 0A0CC 11168+ S R2,=F'1' 00A080 5B20 C0FC 0A0CC 11169+ S R2,=F'1' 00A084 5B20 C0FC 0A0CC 11170+ S R2,=F'1' 00A088 5B20 C0FC 0A0CC 11171+ S R2,=F'1' 00A08C 5B20 C0FC 0A0CC 11172+ S R2,=F'1' 00A090 5B20 C0FC 0A0CC 11173+ S R2,=F'1' 00A094 5B20 C0FC 0A0CC 11174+ S R2,=F'1' 00A098 5B20 C0FC 0A0CC 11175+ S R2,=F'1' 00A09C 5B20 C0FC 0A0CC 11176+ S R2,=F'1' 00A0A0 5B20 C0FC 0A0CC 11177+ S R2,=F'1' 00A0A4 5B20 C0FC 0A0CC 11178+ S R2,=F'1' 00A0A8 5B20 C0FC 0A0CC 11179+ S R2,=F'1' 00A0AC 5B20 C0FC 0A0CC 11180+ S R2,=F'1' 00A0B0 5B20 C0FC 0A0CC 11181+ S R2,=F'1' 00A0B4 5B20 C0FC 0A0CC 11182+ S R2,=F'1' 11183+* 00A0B8 06FB 11184 BCTR R15,R11 11185 TSIMRET 00A0BA 58F0 C0F8 0A0C8 11186+ L R15,=A(SAVETST) R15 := current save area PAGE 206 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A0BE 58DF 0004 00004 11187+ L R13,4(R15) get old save area back 00A0C2 98EC D00C 0000C 11188+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A0C6 07FE 11189+ BR 14 RETURN 02000000 11190 TSIMEND 00A0C8 11191+ LTORG 00A0C8 00000458 11192 =A(SAVETST) 00A0CC 00000001 11193 =F'1' 0A0D0 11194+T206TEND EQU * 11195 * 11196 * Test 207 -- SH R,m --------------------------------------- 11197 * 11198 TSIMBEG T207,10000,50,1,C'SH R,m' 11199+* 002CA4 11200+TDSCDAT CSECT 002CA8 11201+ DS 0D 11202+* 002CA8 0000A0D0 11203+T207TDSC DC A(T207) // TENTRY 002CAC 000000FE 11204+ DC A(T207TEND-T207) // TLENGTH 002CB0 00002710 11205+ DC F'10000' // TLRCNT 002CB4 00000032 11206+ DC F'50' // TIGCNT 002CB8 00000001 11207+ DC F'1' // TLTYPE 0013D3 11208+TEXT CSECT 0013D3 E3F2F0F7 11209+SPTR0876 DC C'T207' 002CBC 11210+TDSCDAT CSECT 002CBC 11211+ DS 0F 002CBC 040013D3 11212+ DC AL1(L'SPTR0876),AL3(SPTR0876) 0013D7 11213+TEXT CSECT 0013D7 E2C840D96B94 11214+SPTR0877 DC C'SH R,m' 002CC0 11215+TDSCDAT CSECT 002CC0 11216+ DS 0F 002CC0 060013D7 11217+ DC AL1(L'SPTR0877),AL3(SPTR0877) 11218+* 004AC0 11219+TDSCTBL CSECT 04AC0 11220+T207TPTR EQU * 004AC0 00002CA8 11221+ DC A(T207TDSC) enabled test 11222+* 00A0D0 11223+TCODE CSECT 00A0D0 11224+ DS 0D ensure double word alignment for test 00A0D0 11225+T207 DS 0H 01650000 00A0D0 90EC D00C 0000C 11226+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A0D4 18CF 11227+ LR R12,R15 base register := entry address 0A0D0 11228+ USING T207,R12 declare code base register 00A0D6 41B0 C020 0A0F0 11229+ LA R11,T207L load loop target to R11 00A0DA 58F0 C0F8 0A1C8 11230+ L R15,=A(SAVETST) R15 := current save area 00A0DE 50DF 0004 00004 11231+ ST R13,4(R15) set back pointer in current save area 00A0E2 182D 11232+ LR R2,R13 remember callers save area 00A0E4 18DF 11233+ LR R13,R15 setup current save area 00A0E6 50D2 0008 00008 11234+ ST R13,8(R2) set forw pointer in callers save area 00000 11235+ USING TDSC,R1 declare TDSC base register 00A0EA 58F0 1008 00008 11236+ L R15,TLRCNT load local repeat count to R15 11237+* 11238 * 00A0EE 1722 11239 XR R2,R2 11240 T207L REPINS SH,(R2,=H'1') repeat: SH R2,=H'1' 11241+* PAGE 207 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 11242+* build from sublist &ALIST a comma separated string &ARGS 11243+* 11244+* 11245+* 11246+* 11247+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11248+* this allows to transfer the repeat count from last TDSCGEN call 11249+* 11250+* 0A0F0 11251+T207L EQU * 11252+* 11253+* write a comment indicating what REPINS does (in case NOGEN in effect) 11254+* 11255+*,// REPINS: do 50 times: 11256+* 11257+* MNOTE requires that ' is doubled for expanded variables 11258+* thus build &MASTR as a copy of '&ARGS with ' doubled 11259+* 11260+* 11261+*,// SH R2,=H'1' 11262+* 11263+* finally generate code: &ICNT copies of &CODE &ARGS 11264+* 00A0F0 4B20 C0FC 0A1CC 11265+ SH R2,=H'1' 00A0F4 4B20 C0FC 0A1CC 11266+ SH R2,=H'1' 00A0F8 4B20 C0FC 0A1CC 11267+ SH R2,=H'1' 00A0FC 4B20 C0FC 0A1CC 11268+ SH R2,=H'1' 00A100 4B20 C0FC 0A1CC 11269+ SH R2,=H'1' 00A104 4B20 C0FC 0A1CC 11270+ SH R2,=H'1' 00A108 4B20 C0FC 0A1CC 11271+ SH R2,=H'1' 00A10C 4B20 C0FC 0A1CC 11272+ SH R2,=H'1' 00A110 4B20 C0FC 0A1CC 11273+ SH R2,=H'1' 00A114 4B20 C0FC 0A1CC 11274+ SH R2,=H'1' 00A118 4B20 C0FC 0A1CC 11275+ SH R2,=H'1' 00A11C 4B20 C0FC 0A1CC 11276+ SH R2,=H'1' 00A120 4B20 C0FC 0A1CC 11277+ SH R2,=H'1' 00A124 4B20 C0FC 0A1CC 11278+ SH R2,=H'1' 00A128 4B20 C0FC 0A1CC 11279+ SH R2,=H'1' 00A12C 4B20 C0FC 0A1CC 11280+ SH R2,=H'1' 00A130 4B20 C0FC 0A1CC 11281+ SH R2,=H'1' 00A134 4B20 C0FC 0A1CC 11282+ SH R2,=H'1' 00A138 4B20 C0FC 0A1CC 11283+ SH R2,=H'1' 00A13C 4B20 C0FC 0A1CC 11284+ SH R2,=H'1' 00A140 4B20 C0FC 0A1CC 11285+ SH R2,=H'1' 00A144 4B20 C0FC 0A1CC 11286+ SH R2,=H'1' 00A148 4B20 C0FC 0A1CC 11287+ SH R2,=H'1' 00A14C 4B20 C0FC 0A1CC 11288+ SH R2,=H'1' 00A150 4B20 C0FC 0A1CC 11289+ SH R2,=H'1' 00A154 4B20 C0FC 0A1CC 11290+ SH R2,=H'1' 00A158 4B20 C0FC 0A1CC 11291+ SH R2,=H'1' 00A15C 4B20 C0FC 0A1CC 11292+ SH R2,=H'1' 00A160 4B20 C0FC 0A1CC 11293+ SH R2,=H'1' 00A164 4B20 C0FC 0A1CC 11294+ SH R2,=H'1' 00A168 4B20 C0FC 0A1CC 11295+ SH R2,=H'1' 00A16C 4B20 C0FC 0A1CC 11296+ SH R2,=H'1' PAGE 208 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A170 4B20 C0FC 0A1CC 11297+ SH R2,=H'1' 00A174 4B20 C0FC 0A1CC 11298+ SH R2,=H'1' 00A178 4B20 C0FC 0A1CC 11299+ SH R2,=H'1' 00A17C 4B20 C0FC 0A1CC 11300+ SH R2,=H'1' 00A180 4B20 C0FC 0A1CC 11301+ SH R2,=H'1' 00A184 4B20 C0FC 0A1CC 11302+ SH R2,=H'1' 00A188 4B20 C0FC 0A1CC 11303+ SH R2,=H'1' 00A18C 4B20 C0FC 0A1CC 11304+ SH R2,=H'1' 00A190 4B20 C0FC 0A1CC 11305+ SH R2,=H'1' 00A194 4B20 C0FC 0A1CC 11306+ SH R2,=H'1' 00A198 4B20 C0FC 0A1CC 11307+ SH R2,=H'1' 00A19C 4B20 C0FC 0A1CC 11308+ SH R2,=H'1' 00A1A0 4B20 C0FC 0A1CC 11309+ SH R2,=H'1' 00A1A4 4B20 C0FC 0A1CC 11310+ SH R2,=H'1' 00A1A8 4B20 C0FC 0A1CC 11311+ SH R2,=H'1' 00A1AC 4B20 C0FC 0A1CC 11312+ SH R2,=H'1' 00A1B0 4B20 C0FC 0A1CC 11313+ SH R2,=H'1' 00A1B4 4B20 C0FC 0A1CC 11314+ SH R2,=H'1' 11315+* 00A1B8 06FB 11316 BCTR R15,R11 11317 TSIMRET 00A1BA 58F0 C0F8 0A1C8 11318+ L R15,=A(SAVETST) R15 := current save area 00A1BE 58DF 0004 00004 11319+ L R13,4(R15) get old save area back 00A1C2 98EC D00C 0000C 11320+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A1C6 07FE 11321+ BR 14 RETURN 02000000 11322 TSIMEND 00A1C8 11323+ LTORG 00A1C8 00000458 11324 =A(SAVETST) 00A1CC 0001 11325 =H'1' 0A1CE 11326+T207TEND EQU * 11327 * 11328 * Test 208 -- SLR R,R -------------------------------------- 11329 * 11330 TSIMBEG T208,17000,100,1,C'SLR R,R' 11331+* 002CC4 11332+TDSCDAT CSECT 002CC8 11333+ DS 0D 11334+* 002CC8 0000A1D0 11335+T208TDSC DC A(T208) // TENTRY 002CCC 00000104 11336+ DC A(T208TEND-T208) // TLENGTH 002CD0 00004268 11337+ DC F'17000' // TLRCNT 002CD4 00000064 11338+ DC F'100' // TIGCNT 002CD8 00000001 11339+ DC F'1' // TLTYPE 0013DD 11340+TEXT CSECT 0013DD E3F2F0F8 11341+SPTR0888 DC C'T208' 002CDC 11342+TDSCDAT CSECT 002CDC 11343+ DS 0F 002CDC 040013DD 11344+ DC AL1(L'SPTR0888),AL3(SPTR0888) 0013E1 11345+TEXT CSECT 0013E1 E2D3D940D96BD9 11346+SPTR0889 DC C'SLR R,R' 002CE0 11347+TDSCDAT CSECT 002CE0 11348+ DS 0F 002CE0 070013E1 11349+ DC AL1(L'SPTR0889),AL3(SPTR0889) 11350+* 004AC4 11351+TDSCTBL CSECT PAGE 209 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04AC4 11352+T208TPTR EQU * 004AC4 00002CC8 11353+ DC A(T208TDSC) enabled test 11354+* 00A1CE 11355+TCODE CSECT 00A1D0 11356+ DS 0D ensure double word alignment for test 00A1D0 11357+T208 DS 0H 01650000 00A1D0 90EC D00C 0000C 11358+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A1D4 18CF 11359+ LR R12,R15 base register := entry address 0A1D0 11360+ USING T208,R12 declare code base register 00A1D6 41B0 C024 0A1F4 11361+ LA R11,T208L load loop target to R11 00A1DA 58F0 C100 0A2D0 11362+ L R15,=A(SAVETST) R15 := current save area 00A1DE 50DF 0004 00004 11363+ ST R13,4(R15) set back pointer in current save area 00A1E2 182D 11364+ LR R2,R13 remember callers save area 00A1E4 18DF 11365+ LR R13,R15 setup current save area 00A1E6 50D2 0008 00008 11366+ ST R13,8(R2) set forw pointer in callers save area 00000 11367+ USING TDSC,R1 declare TDSC base register 00A1EA 58F0 1008 00008 11368+ L R15,TLRCNT load local repeat count to R15 11369+* 11370 * 00A1EE 1722 11371 XR R2,R2 00A1F0 4130 0001 00001 11372 LA R3,1 11373 T208L REPINS SLR,(R2,R3) repeat: SLR R2,R3 11374+* 11375+* build from sublist &ALIST a comma separated string &ARGS 11376+* 11377+* 11378+* 11379+* 11380+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11381+* this allows to transfer the repeat count from last TDSCGEN call 11382+* 11383+* 0A1F4 11384+T208L EQU * 11385+* 11386+* write a comment indicating what REPINS does (in case NOGEN in effect) 11387+* 11388+*,// REPINS: do 100 times: 11389+* 11390+* MNOTE requires that ' is doubled for expanded variables 11391+* thus build &MASTR as a copy of '&ARGS with ' doubled 11392+* 11393+* 11394+*,// SLR R2,R3 11395+* 11396+* finally generate code: &ICNT copies of &CODE &ARGS 11397+* 00A1F4 1F23 11398+ SLR R2,R3 00A1F6 1F23 11399+ SLR R2,R3 00A1F8 1F23 11400+ SLR R2,R3 00A1FA 1F23 11401+ SLR R2,R3 00A1FC 1F23 11402+ SLR R2,R3 00A1FE 1F23 11403+ SLR R2,R3 00A200 1F23 11404+ SLR R2,R3 00A202 1F23 11405+ SLR R2,R3 00A204 1F23 11406+ SLR R2,R3 PAGE 210 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A206 1F23 11407+ SLR R2,R3 00A208 1F23 11408+ SLR R2,R3 00A20A 1F23 11409+ SLR R2,R3 00A20C 1F23 11410+ SLR R2,R3 00A20E 1F23 11411+ SLR R2,R3 00A210 1F23 11412+ SLR R2,R3 00A212 1F23 11413+ SLR R2,R3 00A214 1F23 11414+ SLR R2,R3 00A216 1F23 11415+ SLR R2,R3 00A218 1F23 11416+ SLR R2,R3 00A21A 1F23 11417+ SLR R2,R3 00A21C 1F23 11418+ SLR R2,R3 00A21E 1F23 11419+ SLR R2,R3 00A220 1F23 11420+ SLR R2,R3 00A222 1F23 11421+ SLR R2,R3 00A224 1F23 11422+ SLR R2,R3 00A226 1F23 11423+ SLR R2,R3 00A228 1F23 11424+ SLR R2,R3 00A22A 1F23 11425+ SLR R2,R3 00A22C 1F23 11426+ SLR R2,R3 00A22E 1F23 11427+ SLR R2,R3 00A230 1F23 11428+ SLR R2,R3 00A232 1F23 11429+ SLR R2,R3 00A234 1F23 11430+ SLR R2,R3 00A236 1F23 11431+ SLR R2,R3 00A238 1F23 11432+ SLR R2,R3 00A23A 1F23 11433+ SLR R2,R3 00A23C 1F23 11434+ SLR R2,R3 00A23E 1F23 11435+ SLR R2,R3 00A240 1F23 11436+ SLR R2,R3 00A242 1F23 11437+ SLR R2,R3 00A244 1F23 11438+ SLR R2,R3 00A246 1F23 11439+ SLR R2,R3 00A248 1F23 11440+ SLR R2,R3 00A24A 1F23 11441+ SLR R2,R3 00A24C 1F23 11442+ SLR R2,R3 00A24E 1F23 11443+ SLR R2,R3 00A250 1F23 11444+ SLR R2,R3 00A252 1F23 11445+ SLR R2,R3 00A254 1F23 11446+ SLR R2,R3 00A256 1F23 11447+ SLR R2,R3 00A258 1F23 11448+ SLR R2,R3 00A25A 1F23 11449+ SLR R2,R3 00A25C 1F23 11450+ SLR R2,R3 00A25E 1F23 11451+ SLR R2,R3 00A260 1F23 11452+ SLR R2,R3 00A262 1F23 11453+ SLR R2,R3 00A264 1F23 11454+ SLR R2,R3 00A266 1F23 11455+ SLR R2,R3 00A268 1F23 11456+ SLR R2,R3 00A26A 1F23 11457+ SLR R2,R3 00A26C 1F23 11458+ SLR R2,R3 00A26E 1F23 11459+ SLR R2,R3 00A270 1F23 11460+ SLR R2,R3 00A272 1F23 11461+ SLR R2,R3 PAGE 211 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A274 1F23 11462+ SLR R2,R3 00A276 1F23 11463+ SLR R2,R3 00A278 1F23 11464+ SLR R2,R3 00A27A 1F23 11465+ SLR R2,R3 00A27C 1F23 11466+ SLR R2,R3 00A27E 1F23 11467+ SLR R2,R3 00A280 1F23 11468+ SLR R2,R3 00A282 1F23 11469+ SLR R2,R3 00A284 1F23 11470+ SLR R2,R3 00A286 1F23 11471+ SLR R2,R3 00A288 1F23 11472+ SLR R2,R3 00A28A 1F23 11473+ SLR R2,R3 00A28C 1F23 11474+ SLR R2,R3 00A28E 1F23 11475+ SLR R2,R3 00A290 1F23 11476+ SLR R2,R3 00A292 1F23 11477+ SLR R2,R3 00A294 1F23 11478+ SLR R2,R3 00A296 1F23 11479+ SLR R2,R3 00A298 1F23 11480+ SLR R2,R3 00A29A 1F23 11481+ SLR R2,R3 00A29C 1F23 11482+ SLR R2,R3 00A29E 1F23 11483+ SLR R2,R3 00A2A0 1F23 11484+ SLR R2,R3 00A2A2 1F23 11485+ SLR R2,R3 00A2A4 1F23 11486+ SLR R2,R3 00A2A6 1F23 11487+ SLR R2,R3 00A2A8 1F23 11488+ SLR R2,R3 00A2AA 1F23 11489+ SLR R2,R3 00A2AC 1F23 11490+ SLR R2,R3 00A2AE 1F23 11491+ SLR R2,R3 00A2B0 1F23 11492+ SLR R2,R3 00A2B2 1F23 11493+ SLR R2,R3 00A2B4 1F23 11494+ SLR R2,R3 00A2B6 1F23 11495+ SLR R2,R3 00A2B8 1F23 11496+ SLR R2,R3 00A2BA 1F23 11497+ SLR R2,R3 11498+* 00A2BC 06FB 11499 BCTR R15,R11 11500 TSIMRET 00A2BE 58F0 C100 0A2D0 11501+ L R15,=A(SAVETST) R15 := current save area 00A2C2 58DF 0004 00004 11502+ L R13,4(R15) get old save area back 00A2C6 98EC D00C 0000C 11503+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A2CA 07FE 11504+ BR 14 RETURN 02000000 11505 TSIMEND 00A2D0 11506+ LTORG 00A2D0 00000458 11507 =A(SAVETST) 0A2D4 11508+T208TEND EQU * 11509 * 11510 * Test 209 -- SL R,m --------------------------------------- 11511 * 11512 TSIMBEG T209,10000,50,1,C'SL R,m' 11513+* 002CE4 11514+TDSCDAT CSECT 002CE8 11515+ DS 0D 11516+* PAGE 212 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002CE8 0000A2D8 11517+T209TDSC DC A(T209) // TENTRY 002CEC 00000100 11518+ DC A(T209TEND-T209) // TLENGTH 002CF0 00002710 11519+ DC F'10000' // TLRCNT 002CF4 00000032 11520+ DC F'50' // TIGCNT 002CF8 00000001 11521+ DC F'1' // TLTYPE 0013E8 11522+TEXT CSECT 0013E8 E3F2F0F9 11523+SPTR0900 DC C'T209' 002CFC 11524+TDSCDAT CSECT 002CFC 11525+ DS 0F 002CFC 040013E8 11526+ DC AL1(L'SPTR0900),AL3(SPTR0900) 0013EC 11527+TEXT CSECT 0013EC E2D340D96B94 11528+SPTR0901 DC C'SL R,m' 002D00 11529+TDSCDAT CSECT 002D00 11530+ DS 0F 002D00 060013EC 11531+ DC AL1(L'SPTR0901),AL3(SPTR0901) 11532+* 004AC8 11533+TDSCTBL CSECT 04AC8 11534+T209TPTR EQU * 004AC8 00002CE8 11535+ DC A(T209TDSC) enabled test 11536+* 00A2D4 11537+TCODE CSECT 00A2D8 11538+ DS 0D ensure double word alignment for test 00A2D8 11539+T209 DS 0H 01650000 00A2D8 90EC D00C 0000C 11540+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A2DC 18CF 11541+ LR R12,R15 base register := entry address 0A2D8 11542+ USING T209,R12 declare code base register 00A2DE 41B0 C020 0A2F8 11543+ LA R11,T209L load loop target to R11 00A2E2 58F0 C0F8 0A3D0 11544+ L R15,=A(SAVETST) R15 := current save area 00A2E6 50DF 0004 00004 11545+ ST R13,4(R15) set back pointer in current save area 00A2EA 182D 11546+ LR R2,R13 remember callers save area 00A2EC 18DF 11547+ LR R13,R15 setup current save area 00A2EE 50D2 0008 00008 11548+ ST R13,8(R2) set forw pointer in callers save area 00000 11549+ USING TDSC,R1 declare TDSC base register 00A2F2 58F0 1008 00008 11550+ L R15,TLRCNT load local repeat count to R15 11551+* 11552 * 00A2F6 1722 11553 XR R2,R2 11554 T209L REPINS SL,(R2,=F'1') repeat: SL R2,=F'1' 11555+* 11556+* build from sublist &ALIST a comma separated string &ARGS 11557+* 11558+* 11559+* 11560+* 11561+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11562+* this allows to transfer the repeat count from last TDSCGEN call 11563+* 11564+* 0A2F8 11565+T209L EQU * 11566+* 11567+* write a comment indicating what REPINS does (in case NOGEN in effect) 11568+* 11569+*,// REPINS: do 50 times: 11570+* 11571+* MNOTE requires that ' is doubled for expanded variables PAGE 213 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 11572+* thus build &MASTR as a copy of '&ARGS with ' doubled 11573+* 11574+* 11575+*,// SL R2,=F'1' 11576+* 11577+* finally generate code: &ICNT copies of &CODE &ARGS 11578+* 00A2F8 5F20 C0FC 0A3D4 11579+ SL R2,=F'1' 00A2FC 5F20 C0FC 0A3D4 11580+ SL R2,=F'1' 00A300 5F20 C0FC 0A3D4 11581+ SL R2,=F'1' 00A304 5F20 C0FC 0A3D4 11582+ SL R2,=F'1' 00A308 5F20 C0FC 0A3D4 11583+ SL R2,=F'1' 00A30C 5F20 C0FC 0A3D4 11584+ SL R2,=F'1' 00A310 5F20 C0FC 0A3D4 11585+ SL R2,=F'1' 00A314 5F20 C0FC 0A3D4 11586+ SL R2,=F'1' 00A318 5F20 C0FC 0A3D4 11587+ SL R2,=F'1' 00A31C 5F20 C0FC 0A3D4 11588+ SL R2,=F'1' 00A320 5F20 C0FC 0A3D4 11589+ SL R2,=F'1' 00A324 5F20 C0FC 0A3D4 11590+ SL R2,=F'1' 00A328 5F20 C0FC 0A3D4 11591+ SL R2,=F'1' 00A32C 5F20 C0FC 0A3D4 11592+ SL R2,=F'1' 00A330 5F20 C0FC 0A3D4 11593+ SL R2,=F'1' 00A334 5F20 C0FC 0A3D4 11594+ SL R2,=F'1' 00A338 5F20 C0FC 0A3D4 11595+ SL R2,=F'1' 00A33C 5F20 C0FC 0A3D4 11596+ SL R2,=F'1' 00A340 5F20 C0FC 0A3D4 11597+ SL R2,=F'1' 00A344 5F20 C0FC 0A3D4 11598+ SL R2,=F'1' 00A348 5F20 C0FC 0A3D4 11599+ SL R2,=F'1' 00A34C 5F20 C0FC 0A3D4 11600+ SL R2,=F'1' 00A350 5F20 C0FC 0A3D4 11601+ SL R2,=F'1' 00A354 5F20 C0FC 0A3D4 11602+ SL R2,=F'1' 00A358 5F20 C0FC 0A3D4 11603+ SL R2,=F'1' 00A35C 5F20 C0FC 0A3D4 11604+ SL R2,=F'1' 00A360 5F20 C0FC 0A3D4 11605+ SL R2,=F'1' 00A364 5F20 C0FC 0A3D4 11606+ SL R2,=F'1' 00A368 5F20 C0FC 0A3D4 11607+ SL R2,=F'1' 00A36C 5F20 C0FC 0A3D4 11608+ SL R2,=F'1' 00A370 5F20 C0FC 0A3D4 11609+ SL R2,=F'1' 00A374 5F20 C0FC 0A3D4 11610+ SL R2,=F'1' 00A378 5F20 C0FC 0A3D4 11611+ SL R2,=F'1' 00A37C 5F20 C0FC 0A3D4 11612+ SL R2,=F'1' 00A380 5F20 C0FC 0A3D4 11613+ SL R2,=F'1' 00A384 5F20 C0FC 0A3D4 11614+ SL R2,=F'1' 00A388 5F20 C0FC 0A3D4 11615+ SL R2,=F'1' 00A38C 5F20 C0FC 0A3D4 11616+ SL R2,=F'1' 00A390 5F20 C0FC 0A3D4 11617+ SL R2,=F'1' 00A394 5F20 C0FC 0A3D4 11618+ SL R2,=F'1' 00A398 5F20 C0FC 0A3D4 11619+ SL R2,=F'1' 00A39C 5F20 C0FC 0A3D4 11620+ SL R2,=F'1' 00A3A0 5F20 C0FC 0A3D4 11621+ SL R2,=F'1' 00A3A4 5F20 C0FC 0A3D4 11622+ SL R2,=F'1' 00A3A8 5F20 C0FC 0A3D4 11623+ SL R2,=F'1' 00A3AC 5F20 C0FC 0A3D4 11624+ SL R2,=F'1' 00A3B0 5F20 C0FC 0A3D4 11625+ SL R2,=F'1' 00A3B4 5F20 C0FC 0A3D4 11626+ SL R2,=F'1' PAGE 214 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A3B8 5F20 C0FC 0A3D4 11627+ SL R2,=F'1' 00A3BC 5F20 C0FC 0A3D4 11628+ SL R2,=F'1' 11629+* 00A3C0 06FB 11630 BCTR R15,R11 11631 TSIMRET 00A3C2 58F0 C0F8 0A3D0 11632+ L R15,=A(SAVETST) R15 := current save area 00A3C6 58DF 0004 00004 11633+ L R13,4(R15) get old save area back 00A3CA 98EC D00C 0000C 11634+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A3CE 07FE 11635+ BR 14 RETURN 02000000 11636 TSIMEND 00A3D0 11637+ LTORG 00A3D0 00000458 11638 =A(SAVETST) 00A3D4 00000001 11639 =F'1' 0A3D8 11640+T209TEND EQU * 11641 * 11642 * Test 21x -- arithmetic mul/div =========================== 11643 * 11644 * Test 210 -- MR R,R --------------------------------------- 11645 * 11646 TSIMBEG T210,30000,30,4,C'MR R,R' 11647+* 002D04 11648+TDSCDAT CSECT 002D08 11649+ DS 0D 11650+* 002D08 0000A3D8 11651+T210TDSC DC A(T210) // TENTRY 002D0C 0000007C 11652+ DC A(T210TEND-T210) // TLENGTH 002D10 00007530 11653+ DC F'30000' // TLRCNT 002D14 0000001E 11654+ DC F'30' // TIGCNT 002D18 00000004 11655+ DC F'4' // TLTYPE 0013F2 11656+TEXT CSECT 0013F2 E3F2F1F0 11657+SPTR0912 DC C'T210' 002D1C 11658+TDSCDAT CSECT 002D1C 11659+ DS 0F 002D1C 040013F2 11660+ DC AL1(L'SPTR0912),AL3(SPTR0912) 0013F6 11661+TEXT CSECT 0013F6 D4D940D96BD9 11662+SPTR0913 DC C'MR R,R' 002D20 11663+TDSCDAT CSECT 002D20 11664+ DS 0F 002D20 060013F6 11665+ DC AL1(L'SPTR0913),AL3(SPTR0913) 11666+* 004ACC 11667+TDSCTBL CSECT 04ACC 11668+T210TPTR EQU * 004ACC 00002D08 11669+ DC A(T210TDSC) enabled test 11670+* 00A3D8 11671+TCODE CSECT 00A3D8 11672+ DS 0D ensure double word alignment for test 00A3D8 11673+T210 DS 0H 01650000 00A3D8 90EC D00C 0000C 11674+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A3DC 18CF 11675+ LR R12,R15 base register := entry address 0A3D8 11676+ USING T210,R12 declare code base register 00A3DE 41B0 C022 0A3FA 11677+ LA R11,T210L load loop target to R11 00A3E2 58F0 C078 0A450 11678+ L R15,=A(SAVETST) R15 := current save area 00A3E6 50DF 0004 00004 11679+ ST R13,4(R15) set back pointer in current save area 00A3EA 182D 11680+ LR R2,R13 remember callers save area 00A3EC 18DF 11681+ LR R13,R15 setup current save area PAGE 215 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A3EE 50D2 0008 00008 11682+ ST R13,8(R2) set forw pointer in callers save area 00000 11683+ USING TDSC,R1 declare TDSC base register 00A3F2 58F0 1008 00008 11684+ L R15,TLRCNT load local repeat count to R15 11685+* 11686 * inner loop logic: 11687 * load R3 with 1 11688 * multiply 30 times by 2 11689 * 00A3F6 4140 0002 00002 11690 LA R4,2 00A3FA 4130 0001 00001 11691 T210L LA R3,1 11692 REPINS MR,(R2,R4) repeat: MR R2,R4 11693+* 11694+* build from sublist &ALIST a comma separated string &ARGS 11695+* 11696+* 11697+* 11698+* 11699+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11700+* this allows to transfer the repeat count from last TDSCGEN call 11701+* 11702+* 11703+* 11704+* write a comment indicating what REPINS does (in case NOGEN in effect) 11705+* 11706+*,// REPINS: do 30 times: 11707+* 11708+* MNOTE requires that ' is doubled for expanded variables 11709+* thus build &MASTR as a copy of '&ARGS with ' doubled 11710+* 11711+* 11712+*,// MR R2,R4 11713+* 11714+* finally generate code: &ICNT copies of &CODE &ARGS 11715+* 00A3FE 1C24 11716+ MR R2,R4 00A400 1C24 11717+ MR R2,R4 00A402 1C24 11718+ MR R2,R4 00A404 1C24 11719+ MR R2,R4 00A406 1C24 11720+ MR R2,R4 00A408 1C24 11721+ MR R2,R4 00A40A 1C24 11722+ MR R2,R4 00A40C 1C24 11723+ MR R2,R4 00A40E 1C24 11724+ MR R2,R4 00A410 1C24 11725+ MR R2,R4 00A412 1C24 11726+ MR R2,R4 00A414 1C24 11727+ MR R2,R4 00A416 1C24 11728+ MR R2,R4 00A418 1C24 11729+ MR R2,R4 00A41A 1C24 11730+ MR R2,R4 00A41C 1C24 11731+ MR R2,R4 00A41E 1C24 11732+ MR R2,R4 00A420 1C24 11733+ MR R2,R4 00A422 1C24 11734+ MR R2,R4 00A424 1C24 11735+ MR R2,R4 00A426 1C24 11736+ MR R2,R4 PAGE 216 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A428 1C24 11737+ MR R2,R4 00A42A 1C24 11738+ MR R2,R4 00A42C 1C24 11739+ MR R2,R4 00A42E 1C24 11740+ MR R2,R4 00A430 1C24 11741+ MR R2,R4 00A432 1C24 11742+ MR R2,R4 00A434 1C24 11743+ MR R2,R4 00A436 1C24 11744+ MR R2,R4 00A438 1C24 11745+ MR R2,R4 11746+* 00A43A 06FB 11747 BCTR R15,R11 11748 TSIMRET 00A43C 58F0 C078 0A450 11749+ L R15,=A(SAVETST) R15 := current save area 00A440 58DF 0004 00004 11750+ L R13,4(R15) get old save area back 00A444 98EC D00C 0000C 11751+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A448 07FE 11752+ BR 14 RETURN 02000000 11753 TSIMEND 00A450 11754+ LTORG 00A450 00000458 11755 =A(SAVETST) 0A454 11756+T210TEND EQU * 11757 * 11758 * Test 211 -- M R,m ---------------------------------------- 11759 * 11760 TSIMBEG T211,15000,30,4,C'M R,m' 11761+* 002D24 11762+TDSCDAT CSECT 002D28 11763+ DS 0D 11764+* 002D28 0000A458 11765+T211TDSC DC A(T211) // TENTRY 002D2C 000000B8 11766+ DC A(T211TEND-T211) // TLENGTH 002D30 00003A98 11767+ DC F'15000' // TLRCNT 002D34 0000001E 11768+ DC F'30' // TIGCNT 002D38 00000004 11769+ DC F'4' // TLTYPE 0013FC 11770+TEXT CSECT 0013FC E3F2F1F1 11771+SPTR0924 DC C'T211' 002D3C 11772+TDSCDAT CSECT 002D3C 11773+ DS 0F 002D3C 040013FC 11774+ DC AL1(L'SPTR0924),AL3(SPTR0924) 001400 11775+TEXT CSECT 001400 D440D96B94 11776+SPTR0925 DC C'M R,m' 002D40 11777+TDSCDAT CSECT 002D40 11778+ DS 0F 002D40 05001400 11779+ DC AL1(L'SPTR0925),AL3(SPTR0925) 11780+* 004AD0 11781+TDSCTBL CSECT 04AD0 11782+T211TPTR EQU * 004AD0 00002D28 11783+ DC A(T211TDSC) enabled test 11784+* 00A454 11785+TCODE CSECT 00A458 11786+ DS 0D ensure double word alignment for test 00A458 11787+T211 DS 0H 01650000 00A458 90EC D00C 0000C 11788+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A45C 18CF 11789+ LR R12,R15 base register := entry address 0A458 11790+ USING T211,R12 declare code base register 00A45E 41B0 C01E 0A476 11791+ LA R11,T211L load loop target to R11 PAGE 217 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A462 58F0 C0B0 0A508 11792+ L R15,=A(SAVETST) R15 := current save area 00A466 50DF 0004 00004 11793+ ST R13,4(R15) set back pointer in current save area 00A46A 182D 11794+ LR R2,R13 remember callers save area 00A46C 18DF 11795+ LR R13,R15 setup current save area 00A46E 50D2 0008 00008 11796+ ST R13,8(R2) set forw pointer in callers save area 00000 11797+ USING TDSC,R1 declare TDSC base register 00A472 58F0 1008 00008 11798+ L R15,TLRCNT load local repeat count to R15 11799+* 11800 * inner loop logic: 11801 * load R3 with 1 11802 * multiply 30 times by 2 11803 * 00A476 4130 0001 00001 11804 T211L LA R3,1 11805 REPINS M,(R2,=F'2') repeat: M R2,=F'2' 11806+* 11807+* build from sublist &ALIST a comma separated string &ARGS 11808+* 11809+* 11810+* 11811+* 11812+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11813+* this allows to transfer the repeat count from last TDSCGEN call 11814+* 11815+* 11816+* 11817+* write a comment indicating what REPINS does (in case NOGEN in effect) 11818+* 11819+*,// REPINS: do 30 times: 11820+* 11821+* MNOTE requires that ' is doubled for expanded variables 11822+* thus build &MASTR as a copy of '&ARGS with ' doubled 11823+* 11824+* 11825+*,// M R2,=F'2' 11826+* 11827+* finally generate code: &ICNT copies of &CODE &ARGS 11828+* 00A47A 5C20 C0B4 0A50C 11829+ M R2,=F'2' 00A47E 5C20 C0B4 0A50C 11830+ M R2,=F'2' 00A482 5C20 C0B4 0A50C 11831+ M R2,=F'2' 00A486 5C20 C0B4 0A50C 11832+ M R2,=F'2' 00A48A 5C20 C0B4 0A50C 11833+ M R2,=F'2' 00A48E 5C20 C0B4 0A50C 11834+ M R2,=F'2' 00A492 5C20 C0B4 0A50C 11835+ M R2,=F'2' 00A496 5C20 C0B4 0A50C 11836+ M R2,=F'2' 00A49A 5C20 C0B4 0A50C 11837+ M R2,=F'2' 00A49E 5C20 C0B4 0A50C 11838+ M R2,=F'2' 00A4A2 5C20 C0B4 0A50C 11839+ M R2,=F'2' 00A4A6 5C20 C0B4 0A50C 11840+ M R2,=F'2' 00A4AA 5C20 C0B4 0A50C 11841+ M R2,=F'2' 00A4AE 5C20 C0B4 0A50C 11842+ M R2,=F'2' 00A4B2 5C20 C0B4 0A50C 11843+ M R2,=F'2' 00A4B6 5C20 C0B4 0A50C 11844+ M R2,=F'2' 00A4BA 5C20 C0B4 0A50C 11845+ M R2,=F'2' 00A4BE 5C20 C0B4 0A50C 11846+ M R2,=F'2' PAGE 218 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A4C2 5C20 C0B4 0A50C 11847+ M R2,=F'2' 00A4C6 5C20 C0B4 0A50C 11848+ M R2,=F'2' 00A4CA 5C20 C0B4 0A50C 11849+ M R2,=F'2' 00A4CE 5C20 C0B4 0A50C 11850+ M R2,=F'2' 00A4D2 5C20 C0B4 0A50C 11851+ M R2,=F'2' 00A4D6 5C20 C0B4 0A50C 11852+ M R2,=F'2' 00A4DA 5C20 C0B4 0A50C 11853+ M R2,=F'2' 00A4DE 5C20 C0B4 0A50C 11854+ M R2,=F'2' 00A4E2 5C20 C0B4 0A50C 11855+ M R2,=F'2' 00A4E6 5C20 C0B4 0A50C 11856+ M R2,=F'2' 00A4EA 5C20 C0B4 0A50C 11857+ M R2,=F'2' 00A4EE 5C20 C0B4 0A50C 11858+ M R2,=F'2' 11859+* 00A4F2 06FB 11860 BCTR R15,R11 11861 TSIMRET 00A4F4 58F0 C0B0 0A508 11862+ L R15,=A(SAVETST) R15 := current save area 00A4F8 58DF 0004 00004 11863+ L R13,4(R15) get old save area back 00A4FC 98EC D00C 0000C 11864+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A500 07FE 11865+ BR 14 RETURN 02000000 11866 TSIMEND 00A508 11867+ LTORG 00A508 00000458 11868 =A(SAVETST) 00A50C 00000002 11869 =F'2' 0A510 11870+T211TEND EQU * 11871 * 11872 * Test 212 -- MH R,m --------------------------------------- 11873 * 11874 TSIMBEG T212,15000,30,4,C'MH R,m' 11875+* 002D44 11876+TDSCDAT CSECT 002D48 11877+ DS 0D 11878+* 002D48 0000A510 11879+T212TDSC DC A(T212) // TENTRY 002D4C 000000B6 11880+ DC A(T212TEND-T212) // TLENGTH 002D50 00003A98 11881+ DC F'15000' // TLRCNT 002D54 0000001E 11882+ DC F'30' // TIGCNT 002D58 00000004 11883+ DC F'4' // TLTYPE 001405 11884+TEXT CSECT 001405 E3F2F1F2 11885+SPTR0936 DC C'T212' 002D5C 11886+TDSCDAT CSECT 002D5C 11887+ DS 0F 002D5C 04001405 11888+ DC AL1(L'SPTR0936),AL3(SPTR0936) 001409 11889+TEXT CSECT 001409 D4C840D96B94 11890+SPTR0937 DC C'MH R,m' 002D60 11891+TDSCDAT CSECT 002D60 11892+ DS 0F 002D60 06001409 11893+ DC AL1(L'SPTR0937),AL3(SPTR0937) 11894+* 004AD4 11895+TDSCTBL CSECT 04AD4 11896+T212TPTR EQU * 004AD4 00002D48 11897+ DC A(T212TDSC) enabled test 11898+* 00A510 11899+TCODE CSECT 00A510 11900+ DS 0D ensure double word alignment for test 00A510 11901+T212 DS 0H 01650000 PAGE 219 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A510 90EC D00C 0000C 11902+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A514 18CF 11903+ LR R12,R15 base register := entry address 0A510 11904+ USING T212,R12 declare code base register 00A516 41B0 C01E 0A52E 11905+ LA R11,T212L load loop target to R11 00A51A 58F0 C0B0 0A5C0 11906+ L R15,=A(SAVETST) R15 := current save area 00A51E 50DF 0004 00004 11907+ ST R13,4(R15) set back pointer in current save area 00A522 182D 11908+ LR R2,R13 remember callers save area 00A524 18DF 11909+ LR R13,R15 setup current save area 00A526 50D2 0008 00008 11910+ ST R13,8(R2) set forw pointer in callers save area 00000 11911+ USING TDSC,R1 declare TDSC base register 00A52A 58F0 1008 00008 11912+ L R15,TLRCNT load local repeat count to R15 11913+* 11914 * inner loop logic: 11915 * load R3 with 1 11916 * multiply 30 times by 2 11917 * 00A52E 4130 0001 00001 11918 T212L LA R3,1 11919 REPINS MH,(R3,=H'2') repeat: MH R3,=H'2' 11920+* 11921+* build from sublist &ALIST a comma separated string &ARGS 11922+* 11923+* 11924+* 11925+* 11926+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 11927+* this allows to transfer the repeat count from last TDSCGEN call 11928+* 11929+* 11930+* 11931+* write a comment indicating what REPINS does (in case NOGEN in effect) 11932+* 11933+*,// REPINS: do 30 times: 11934+* 11935+* MNOTE requires that ' is doubled for expanded variables 11936+* thus build &MASTR as a copy of '&ARGS with ' doubled 11937+* 11938+* 11939+*,// MH R3,=H'2' 11940+* 11941+* finally generate code: &ICNT copies of &CODE &ARGS 11942+* 00A532 4C30 C0B4 0A5C4 11943+ MH R3,=H'2' 00A536 4C30 C0B4 0A5C4 11944+ MH R3,=H'2' 00A53A 4C30 C0B4 0A5C4 11945+ MH R3,=H'2' 00A53E 4C30 C0B4 0A5C4 11946+ MH R3,=H'2' 00A542 4C30 C0B4 0A5C4 11947+ MH R3,=H'2' 00A546 4C30 C0B4 0A5C4 11948+ MH R3,=H'2' 00A54A 4C30 C0B4 0A5C4 11949+ MH R3,=H'2' 00A54E 4C30 C0B4 0A5C4 11950+ MH R3,=H'2' 00A552 4C30 C0B4 0A5C4 11951+ MH R3,=H'2' 00A556 4C30 C0B4 0A5C4 11952+ MH R3,=H'2' 00A55A 4C30 C0B4 0A5C4 11953+ MH R3,=H'2' 00A55E 4C30 C0B4 0A5C4 11954+ MH R3,=H'2' 00A562 4C30 C0B4 0A5C4 11955+ MH R3,=H'2' 00A566 4C30 C0B4 0A5C4 11956+ MH R3,=H'2' PAGE 220 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A56A 4C30 C0B4 0A5C4 11957+ MH R3,=H'2' 00A56E 4C30 C0B4 0A5C4 11958+ MH R3,=H'2' 00A572 4C30 C0B4 0A5C4 11959+ MH R3,=H'2' 00A576 4C30 C0B4 0A5C4 11960+ MH R3,=H'2' 00A57A 4C30 C0B4 0A5C4 11961+ MH R3,=H'2' 00A57E 4C30 C0B4 0A5C4 11962+ MH R3,=H'2' 00A582 4C30 C0B4 0A5C4 11963+ MH R3,=H'2' 00A586 4C30 C0B4 0A5C4 11964+ MH R3,=H'2' 00A58A 4C30 C0B4 0A5C4 11965+ MH R3,=H'2' 00A58E 4C30 C0B4 0A5C4 11966+ MH R3,=H'2' 00A592 4C30 C0B4 0A5C4 11967+ MH R3,=H'2' 00A596 4C30 C0B4 0A5C4 11968+ MH R3,=H'2' 00A59A 4C30 C0B4 0A5C4 11969+ MH R3,=H'2' 00A59E 4C30 C0B4 0A5C4 11970+ MH R3,=H'2' 00A5A2 4C30 C0B4 0A5C4 11971+ MH R3,=H'2' 00A5A6 4C30 C0B4 0A5C4 11972+ MH R3,=H'2' 11973+* 00A5AA 06FB 11974 BCTR R15,R11 11975 TSIMRET 00A5AC 58F0 C0B0 0A5C0 11976+ L R15,=A(SAVETST) R15 := current save area 00A5B0 58DF 0004 00004 11977+ L R13,4(R15) get old save area back 00A5B4 98EC D00C 0000C 11978+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A5B8 07FE 11979+ BR 14 RETURN 02000000 11980 TSIMEND 00A5C0 11981+ LTORG 00A5C0 00000458 11982 =A(SAVETST) 00A5C4 0002 11983 =H'2' 0A5C6 11984+T212TEND EQU * 11985 * 11986 * Test 215 -- DR R,R --------------------------------------- 11987 * 11988 TSIMBEG T215,14000,20,3,C'XR R,R; DR R,R' 11989+* 002D64 11990+TDSCDAT CSECT 002D68 11991+ DS 0D 11992+* 002D68 0000A5C8 11993+T215TDSC DC A(T215) // TENTRY 002D6C 00000090 11994+ DC A(T215TEND-T215) // TLENGTH 002D70 000036B0 11995+ DC F'14000' // TLRCNT 002D74 00000014 11996+ DC F'20' // TIGCNT 002D78 00000003 11997+ DC F'3' // TLTYPE 00140F 11998+TEXT CSECT 00140F E3F2F1F5 11999+SPTR0948 DC C'T215' 002D7C 12000+TDSCDAT CSECT 002D7C 12001+ DS 0F 002D7C 0400140F 12002+ DC AL1(L'SPTR0948),AL3(SPTR0948) 001413 12003+TEXT CSECT 001413 E7D940D96BD95E40 12004+SPTR0949 DC C'XR R,R; DR R,R' 002D80 12005+TDSCDAT CSECT 002D80 12006+ DS 0F 002D80 0E001413 12007+ DC AL1(L'SPTR0949),AL3(SPTR0949) 12008+* 004AD8 12009+TDSCTBL CSECT 04AD8 12010+T215TPTR EQU * 004AD8 00002D68 12011+ DC A(T215TDSC) enabled test PAGE 221 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 12012+* 00A5C6 12013+TCODE CSECT 00A5C8 12014+ DS 0D ensure double word alignment for test 00A5C8 12015+T215 DS 0H 01650000 00A5C8 90EC D00C 0000C 12016+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A5CC 18CF 12017+ LR R12,R15 base register := entry address 0A5C8 12018+ USING T215,R12 declare code base register 00A5CE 41B0 C026 0A5EE 12019+ LA R11,T215L load loop target to R11 00A5D2 58F0 C088 0A650 12020+ L R15,=A(SAVETST) R15 := current save area 00A5D6 50DF 0004 00004 12021+ ST R13,4(R15) set back pointer in current save area 00A5DA 182D 12022+ LR R2,R13 remember callers save area 00A5DC 18DF 12023+ LR R13,R15 setup current save area 00A5DE 50D2 0008 00008 12024+ ST R13,8(R2) set forw pointer in callers save area 00000 12025+ USING TDSC,R1 declare TDSC base register 00A5E2 58F0 1008 00008 12026+ L R15,TLRCNT load local repeat count to R15 12027+* 12028 * inner loop logic: 12029 * load R3 with 123456789 12030 * divide 20 times by 2 12031 * 12032 * use sequence 12033 * XR R2,R2 drop high order part 12034 * DR R2,R4 and divide 12035 * 00A5E6 4140 0002 00002 12036 LA R4,2 00A5EA 5860 C08C 0A654 12037 L R6,=F'123456789' 00A5EE 1836 12038 T215L LR R3,R6 setup initial divident 12039 REPINSN XR,(R2,R2),DR,(R2,R4) 12040+* 12041+* build from sublist &ALIST* a comma separated string &ARGS* 12042+* 12043+* 12044+* 12045+* 12046+* 12047+* 12048+* 12049+* 12050+* write a comment indicating what REPINSN does (if NOGEN in effect) 12051+* 12052+*,// REPINSN: do 20 times: 12053+* 12054+* MNOTE requires that ' is doubled for expanded variables 12055+* thus build &MASTR as a copy of '&ARGS with ' doubled 12056+* 12057+* 12058+*,// XR R2,R2 12059+* 12060+* MNOTE requires that ' is doubled for expanded variables 12061+* thus build &MASTR as a copy of '&ARGS with ' doubled 12062+* 12063+* 12064+*,// DR R2,R4 12065+* 12066+* finally generate code: &ICNT copies of &CO1 ... PAGE 222 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 12067+* 00A5F0 1722 12068+ XR R2,R2 00A5F2 1D24 12069+ DR R2,R4 00A5F4 1722 12070+ XR R2,R2 00A5F6 1D24 12071+ DR R2,R4 00A5F8 1722 12072+ XR R2,R2 00A5FA 1D24 12073+ DR R2,R4 00A5FC 1722 12074+ XR R2,R2 00A5FE 1D24 12075+ DR R2,R4 00A600 1722 12076+ XR R2,R2 00A602 1D24 12077+ DR R2,R4 00A604 1722 12078+ XR R2,R2 00A606 1D24 12079+ DR R2,R4 00A608 1722 12080+ XR R2,R2 00A60A 1D24 12081+ DR R2,R4 00A60C 1722 12082+ XR R2,R2 00A60E 1D24 12083+ DR R2,R4 00A610 1722 12084+ XR R2,R2 00A612 1D24 12085+ DR R2,R4 00A614 1722 12086+ XR R2,R2 00A616 1D24 12087+ DR R2,R4 00A618 1722 12088+ XR R2,R2 00A61A 1D24 12089+ DR R2,R4 00A61C 1722 12090+ XR R2,R2 00A61E 1D24 12091+ DR R2,R4 00A620 1722 12092+ XR R2,R2 00A622 1D24 12093+ DR R2,R4 00A624 1722 12094+ XR R2,R2 00A626 1D24 12095+ DR R2,R4 00A628 1722 12096+ XR R2,R2 00A62A 1D24 12097+ DR R2,R4 00A62C 1722 12098+ XR R2,R2 00A62E 1D24 12099+ DR R2,R4 00A630 1722 12100+ XR R2,R2 00A632 1D24 12101+ DR R2,R4 00A634 1722 12102+ XR R2,R2 00A636 1D24 12103+ DR R2,R4 00A638 1722 12104+ XR R2,R2 00A63A 1D24 12105+ DR R2,R4 00A63C 1722 12106+ XR R2,R2 00A63E 1D24 12107+ DR R2,R4 12108+* 00A640 06FB 12109 BCTR R15,R11 12110 TSIMRET 00A642 58F0 C088 0A650 12111+ L R15,=A(SAVETST) R15 := current save area 00A646 58DF 0004 00004 12112+ L R13,4(R15) get old save area back 00A64A 98EC D00C 0000C 12113+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A64E 07FE 12114+ BR 14 RETURN 02000000 12115 TSIMEND 00A650 12116+ LTORG 00A650 00000458 12117 =A(SAVETST) 00A654 075BCD15 12118 =F'123456789' 0A658 12119+T215TEND EQU * 12120 * 12121 * Test 216 -- D R,m ---------------------------------------- PAGE 223 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 12122 * 12123 TSIMBEG T216,11000,20,3,C'XR R,R; D R,m' 12124+* 002D84 12125+TDSCDAT CSECT 002D88 12126+ DS 0D 12127+* 002D88 0000A658 12128+T216TDSC DC A(T216) // TENTRY 002D8C 000000BC 12129+ DC A(T216TEND-T216) // TLENGTH 002D90 00002AF8 12130+ DC F'11000' // TLRCNT 002D94 00000014 12131+ DC F'20' // TIGCNT 002D98 00000003 12132+ DC F'3' // TLTYPE 001421 12133+TEXT CSECT 001421 E3F2F1F6 12134+SPTR0962 DC C'T216' 002D9C 12135+TDSCDAT CSECT 002D9C 12136+ DS 0F 002D9C 04001421 12137+ DC AL1(L'SPTR0962),AL3(SPTR0962) 001425 12138+TEXT CSECT 001425 E7D940D96BD95E40 12139+SPTR0963 DC C'XR R,R; D R,m' 002DA0 12140+TDSCDAT CSECT 002DA0 12141+ DS 0F 002DA0 0D001425 12142+ DC AL1(L'SPTR0963),AL3(SPTR0963) 12143+* 004ADC 12144+TDSCTBL CSECT 04ADC 12145+T216TPTR EQU * 004ADC 00002D88 12146+ DC A(T216TDSC) enabled test 12147+* 00A658 12148+TCODE CSECT 00A658 12149+ DS 0D ensure double word alignment for test 00A658 12150+T216 DS 0H 01650000 00A658 90EC D00C 0000C 12151+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A65C 18CF 12152+ LR R12,R15 base register := entry address 0A658 12153+ USING T216,R12 declare code base register 00A65E 41B0 C026 0A67E 12154+ LA R11,T216L load loop target to R11 00A662 58F0 C0B0 0A708 12155+ L R15,=A(SAVETST) R15 := current save area 00A666 50DF 0004 00004 12156+ ST R13,4(R15) set back pointer in current save area 00A66A 182D 12157+ LR R2,R13 remember callers save area 00A66C 18DF 12158+ LR R13,R15 setup current save area 00A66E 50D2 0008 00008 12159+ ST R13,8(R2) set forw pointer in callers save area 00000 12160+ USING TDSC,R1 declare TDSC base register 00A672 58F0 1008 00008 12161+ L R15,TLRCNT load local repeat count to R15 12162+* 12163 * inner loop logic: 12164 * load R3 with 123456789 12165 * divide 20 times by 2 12166 * 12167 * use sequence 12168 * XR R2,R2 drop high order part 12169 * D R2,=F'2' and divide 12170 * 00A676 4140 0002 00002 12171 LA R4,2 00A67A 5860 C0B4 0A70C 12172 L R6,=F'123456789' 00A67E 1836 12173 T216L LR R3,R6 setup initial divident 12174 REPINSN XR,(R2,R2),D,(R2,=F'2') 12175+* 12176+* build from sublist &ALIST* a comma separated string &ARGS* PAGE 224 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 12177+* 12178+* 12179+* 12180+* 12181+* 12182+* 12183+* 12184+* 12185+* write a comment indicating what REPINSN does (if NOGEN in effect) 12186+* 12187+*,// REPINSN: do 20 times: 12188+* 12189+* MNOTE requires that ' is doubled for expanded variables 12190+* thus build &MASTR as a copy of '&ARGS with ' doubled 12191+* 12192+* 12193+*,// XR R2,R2 12194+* 12195+* MNOTE requires that ' is doubled for expanded variables 12196+* thus build &MASTR as a copy of '&ARGS with ' doubled 12197+* 12198+* 12199+*,// D R2,=F'2' 12200+* 12201+* finally generate code: &ICNT copies of &CO1 ... 12202+* 00A680 1722 12203+ XR R2,R2 00A682 5D20 C0B8 0A710 12204+ D R2,=F'2' 00A686 1722 12205+ XR R2,R2 00A688 5D20 C0B8 0A710 12206+ D R2,=F'2' 00A68C 1722 12207+ XR R2,R2 00A68E 5D20 C0B8 0A710 12208+ D R2,=F'2' 00A692 1722 12209+ XR R2,R2 00A694 5D20 C0B8 0A710 12210+ D R2,=F'2' 00A698 1722 12211+ XR R2,R2 00A69A 5D20 C0B8 0A710 12212+ D R2,=F'2' 00A69E 1722 12213+ XR R2,R2 00A6A0 5D20 C0B8 0A710 12214+ D R2,=F'2' 00A6A4 1722 12215+ XR R2,R2 00A6A6 5D20 C0B8 0A710 12216+ D R2,=F'2' 00A6AA 1722 12217+ XR R2,R2 00A6AC 5D20 C0B8 0A710 12218+ D R2,=F'2' 00A6B0 1722 12219+ XR R2,R2 00A6B2 5D20 C0B8 0A710 12220+ D R2,=F'2' 00A6B6 1722 12221+ XR R2,R2 00A6B8 5D20 C0B8 0A710 12222+ D R2,=F'2' 00A6BC 1722 12223+ XR R2,R2 00A6BE 5D20 C0B8 0A710 12224+ D R2,=F'2' 00A6C2 1722 12225+ XR R2,R2 00A6C4 5D20 C0B8 0A710 12226+ D R2,=F'2' 00A6C8 1722 12227+ XR R2,R2 00A6CA 5D20 C0B8 0A710 12228+ D R2,=F'2' 00A6CE 1722 12229+ XR R2,R2 00A6D0 5D20 C0B8 0A710 12230+ D R2,=F'2' 00A6D4 1722 12231+ XR R2,R2 PAGE 225 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A6D6 5D20 C0B8 0A710 12232+ D R2,=F'2' 00A6DA 1722 12233+ XR R2,R2 00A6DC 5D20 C0B8 0A710 12234+ D R2,=F'2' 00A6E0 1722 12235+ XR R2,R2 00A6E2 5D20 C0B8 0A710 12236+ D R2,=F'2' 00A6E6 1722 12237+ XR R2,R2 00A6E8 5D20 C0B8 0A710 12238+ D R2,=F'2' 00A6EC 1722 12239+ XR R2,R2 00A6EE 5D20 C0B8 0A710 12240+ D R2,=F'2' 00A6F2 1722 12241+ XR R2,R2 00A6F4 5D20 C0B8 0A710 12242+ D R2,=F'2' 12243+* 00A6F8 06FB 12244 BCTR R15,R11 12245 TSIMRET 00A6FA 58F0 C0B0 0A708 12246+ L R15,=A(SAVETST) R15 := current save area 00A6FE 58DF 0004 00004 12247+ L R13,4(R15) get old save area back 00A702 98EC D00C 0000C 12248+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A706 07FE 12249+ BR 14 RETURN 02000000 12250 TSIMEND 00A708 12251+ LTORG 00A708 00000458 12252 =A(SAVETST) 00A70C 075BCD15 12253 =F'123456789' 00A710 00000002 12254 =F'2' 0A714 12255+T216TEND EQU * 12256 * 12257 * Test 22x -- arithmetic shifts ============================ 12258 * 12259 * Test 220 -- SLA R,1 -------------------------------------- 12260 * 12261 TSIMBEG T220,24000,30,4,C'SLA R,1' 12262+* 002DA4 12263+TDSCDAT CSECT 002DA8 12264+ DS 0D 12265+* 002DA8 0000A718 12266+T220TDSC DC A(T220) // TENTRY 002DAC 000000B4 12267+ DC A(T220TEND-T220) // TLENGTH 002DB0 00005DC0 12268+ DC F'24000' // TLRCNT 002DB4 0000001E 12269+ DC F'30' // TIGCNT 002DB8 00000004 12270+ DC F'4' // TLTYPE 001432 12271+TEXT CSECT 001432 E3F2F2F0 12272+SPTR0976 DC C'T220' 002DBC 12273+TDSCDAT CSECT 002DBC 12274+ DS 0F 002DBC 04001432 12275+ DC AL1(L'SPTR0976),AL3(SPTR0976) 001436 12276+TEXT CSECT 001436 E2D3C140D96BF1 12277+SPTR0977 DC C'SLA R,1' 002DC0 12278+TDSCDAT CSECT 002DC0 12279+ DS 0F 002DC0 07001436 12280+ DC AL1(L'SPTR0977),AL3(SPTR0977) 12281+* 004AE0 12282+TDSCTBL CSECT 04AE0 12283+T220TPTR EQU * 004AE0 00002DA8 12284+ DC A(T220TDSC) enabled test 12285+* 00A714 12286+TCODE CSECT PAGE 226 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A718 12287+ DS 0D ensure double word alignment for test 00A718 12288+T220 DS 0H 01650000 00A718 90EC D00C 0000C 12289+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A71C 18CF 12290+ LR R12,R15 base register := entry address 0A718 12291+ USING T220,R12 declare code base register 00A71E 41B0 C01E 0A736 12292+ LA R11,T220L load loop target to R11 00A722 58F0 C0B0 0A7C8 12293+ L R15,=A(SAVETST) R15 := current save area 00A726 50DF 0004 00004 12294+ ST R13,4(R15) set back pointer in current save area 00A72A 182D 12295+ LR R2,R13 remember callers save area 00A72C 18DF 12296+ LR R13,R15 setup current save area 00A72E 50D2 0008 00008 12297+ ST R13,8(R2) set forw pointer in callers save area 00000 12298+ USING TDSC,R1 declare TDSC base register 00A732 58F0 1008 00008 12299+ L R15,TLRCNT load local repeat count to R15 12300+* 12301 * 00A736 4120 0001 00001 12302 T220L LA R2,1 12303 REPINS SLA,(R2,1) repeat: SLA R2,1 12304+* 12305+* build from sublist &ALIST a comma separated string &ARGS 12306+* 12307+* 12308+* 12309+* 12310+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12311+* this allows to transfer the repeat count from last TDSCGEN call 12312+* 12313+* 12314+* 12315+* write a comment indicating what REPINS does (in case NOGEN in effect) 12316+* 12317+*,// REPINS: do 30 times: 12318+* 12319+* MNOTE requires that ' is doubled for expanded variables 12320+* thus build &MASTR as a copy of '&ARGS with ' doubled 12321+* 12322+* 12323+*,// SLA R2,1 12324+* 12325+* finally generate code: &ICNT copies of &CODE &ARGS 12326+* 00A73A 8B20 0001 00001 12327+ SLA R2,1 00A73E 8B20 0001 00001 12328+ SLA R2,1 00A742 8B20 0001 00001 12329+ SLA R2,1 00A746 8B20 0001 00001 12330+ SLA R2,1 00A74A 8B20 0001 00001 12331+ SLA R2,1 00A74E 8B20 0001 00001 12332+ SLA R2,1 00A752 8B20 0001 00001 12333+ SLA R2,1 00A756 8B20 0001 00001 12334+ SLA R2,1 00A75A 8B20 0001 00001 12335+ SLA R2,1 00A75E 8B20 0001 00001 12336+ SLA R2,1 00A762 8B20 0001 00001 12337+ SLA R2,1 00A766 8B20 0001 00001 12338+ SLA R2,1 00A76A 8B20 0001 00001 12339+ SLA R2,1 00A76E 8B20 0001 00001 12340+ SLA R2,1 00A772 8B20 0001 00001 12341+ SLA R2,1 PAGE 227 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A776 8B20 0001 00001 12342+ SLA R2,1 00A77A 8B20 0001 00001 12343+ SLA R2,1 00A77E 8B20 0001 00001 12344+ SLA R2,1 00A782 8B20 0001 00001 12345+ SLA R2,1 00A786 8B20 0001 00001 12346+ SLA R2,1 00A78A 8B20 0001 00001 12347+ SLA R2,1 00A78E 8B20 0001 00001 12348+ SLA R2,1 00A792 8B20 0001 00001 12349+ SLA R2,1 00A796 8B20 0001 00001 12350+ SLA R2,1 00A79A 8B20 0001 00001 12351+ SLA R2,1 00A79E 8B20 0001 00001 12352+ SLA R2,1 00A7A2 8B20 0001 00001 12353+ SLA R2,1 00A7A6 8B20 0001 00001 12354+ SLA R2,1 00A7AA 8B20 0001 00001 12355+ SLA R2,1 00A7AE 8B20 0001 00001 12356+ SLA R2,1 12357+* 00A7B2 06FB 12358 BCTR R15,R11 12359 TSIMRET 00A7B4 58F0 C0B0 0A7C8 12360+ L R15,=A(SAVETST) R15 := current save area 00A7B8 58DF 0004 00004 12361+ L R13,4(R15) get old save area back 00A7BC 98EC D00C 0000C 12362+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A7C0 07FE 12363+ BR 14 RETURN 02000000 12364 TSIMEND 00A7C8 12365+ LTORG 00A7C8 00000458 12366 =A(SAVETST) 0A7CC 12367+T220TEND EQU * 12368 * 12369 * Test 221 -- SLDA R,1 ------------------------------------- 12370 * 12371 TSIMBEG T221,12000,60,5,C'SLDA R,1' 12372+* 002DC4 12373+TDSCDAT CSECT 002DC8 12374+ DS 0D 12375+* 002DC8 0000A7D0 12376+T221TDSC DC A(T221) // TENTRY 002DCC 0000012C 12377+ DC A(T221TEND-T221) // TLENGTH 002DD0 00002EE0 12378+ DC F'12000' // TLRCNT 002DD4 0000003C 12379+ DC F'60' // TIGCNT 002DD8 00000005 12380+ DC F'5' // TLTYPE 00143D 12381+TEXT CSECT 00143D E3F2F2F1 12382+SPTR0988 DC C'T221' 002DDC 12383+TDSCDAT CSECT 002DDC 12384+ DS 0F 002DDC 0400143D 12385+ DC AL1(L'SPTR0988),AL3(SPTR0988) 001441 12386+TEXT CSECT 001441 E2D3C4C140D96BF1 12387+SPTR0989 DC C'SLDA R,1' 002DE0 12388+TDSCDAT CSECT 002DE0 12389+ DS 0F 002DE0 08001441 12390+ DC AL1(L'SPTR0989),AL3(SPTR0989) 12391+* 004AE4 12392+TDSCTBL CSECT 04AE4 12393+T221TPTR EQU * 004AE4 00002DC8 12394+ DC A(T221TDSC) enabled test 12395+* 00A7CC 12396+TCODE CSECT PAGE 228 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A7D0 12397+ DS 0D ensure double word alignment for test 00A7D0 12398+T221 DS 0H 01650000 00A7D0 90EC D00C 0000C 12399+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A7D4 18CF 12400+ LR R12,R15 base register := entry address 0A7D0 12401+ USING T221,R12 declare code base register 00A7D6 41B0 C01E 0A7EE 12402+ LA R11,T221L load loop target to R11 00A7DA 58F0 C128 0A8F8 12403+ L R15,=A(SAVETST) R15 := current save area 00A7DE 50DF 0004 00004 12404+ ST R13,4(R15) set back pointer in current save area 00A7E2 182D 12405+ LR R2,R13 remember callers save area 00A7E4 18DF 12406+ LR R13,R15 setup current save area 00A7E6 50D2 0008 00008 12407+ ST R13,8(R2) set forw pointer in callers save area 00000 12408+ USING TDSC,R1 declare TDSC base register 00A7EA 58F0 1008 00008 12409+ L R15,TLRCNT load local repeat count to R15 12410+* 12411 * 00A7EE 1722 12412 T221L XR R2,R2 00A7F0 4130 0001 00001 12413 LA R3,1 12414 REPINS SLDA,(R2,1) repeat: SLDA R2,1 12415+* 12416+* build from sublist &ALIST a comma separated string &ARGS 12417+* 12418+* 12419+* 12420+* 12421+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12422+* this allows to transfer the repeat count from last TDSCGEN call 12423+* 12424+* 12425+* 12426+* write a comment indicating what REPINS does (in case NOGEN in effect) 12427+* 12428+*,// REPINS: do 60 times: 12429+* 12430+* MNOTE requires that ' is doubled for expanded variables 12431+* thus build &MASTR as a copy of '&ARGS with ' doubled 12432+* 12433+* 12434+*,// SLDA R2,1 12435+* 12436+* finally generate code: &ICNT copies of &CODE &ARGS 12437+* 00A7F4 8F20 0001 00001 12438+ SLDA R2,1 00A7F8 8F20 0001 00001 12439+ SLDA R2,1 00A7FC 8F20 0001 00001 12440+ SLDA R2,1 00A800 8F20 0001 00001 12441+ SLDA R2,1 00A804 8F20 0001 00001 12442+ SLDA R2,1 00A808 8F20 0001 00001 12443+ SLDA R2,1 00A80C 8F20 0001 00001 12444+ SLDA R2,1 00A810 8F20 0001 00001 12445+ SLDA R2,1 00A814 8F20 0001 00001 12446+ SLDA R2,1 00A818 8F20 0001 00001 12447+ SLDA R2,1 00A81C 8F20 0001 00001 12448+ SLDA R2,1 00A820 8F20 0001 00001 12449+ SLDA R2,1 00A824 8F20 0001 00001 12450+ SLDA R2,1 00A828 8F20 0001 00001 12451+ SLDA R2,1 PAGE 229 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A82C 8F20 0001 00001 12452+ SLDA R2,1 00A830 8F20 0001 00001 12453+ SLDA R2,1 00A834 8F20 0001 00001 12454+ SLDA R2,1 00A838 8F20 0001 00001 12455+ SLDA R2,1 00A83C 8F20 0001 00001 12456+ SLDA R2,1 00A840 8F20 0001 00001 12457+ SLDA R2,1 00A844 8F20 0001 00001 12458+ SLDA R2,1 00A848 8F20 0001 00001 12459+ SLDA R2,1 00A84C 8F20 0001 00001 12460+ SLDA R2,1 00A850 8F20 0001 00001 12461+ SLDA R2,1 00A854 8F20 0001 00001 12462+ SLDA R2,1 00A858 8F20 0001 00001 12463+ SLDA R2,1 00A85C 8F20 0001 00001 12464+ SLDA R2,1 00A860 8F20 0001 00001 12465+ SLDA R2,1 00A864 8F20 0001 00001 12466+ SLDA R2,1 00A868 8F20 0001 00001 12467+ SLDA R2,1 00A86C 8F20 0001 00001 12468+ SLDA R2,1 00A870 8F20 0001 00001 12469+ SLDA R2,1 00A874 8F20 0001 00001 12470+ SLDA R2,1 00A878 8F20 0001 00001 12471+ SLDA R2,1 00A87C 8F20 0001 00001 12472+ SLDA R2,1 00A880 8F20 0001 00001 12473+ SLDA R2,1 00A884 8F20 0001 00001 12474+ SLDA R2,1 00A888 8F20 0001 00001 12475+ SLDA R2,1 00A88C 8F20 0001 00001 12476+ SLDA R2,1 00A890 8F20 0001 00001 12477+ SLDA R2,1 00A894 8F20 0001 00001 12478+ SLDA R2,1 00A898 8F20 0001 00001 12479+ SLDA R2,1 00A89C 8F20 0001 00001 12480+ SLDA R2,1 00A8A0 8F20 0001 00001 12481+ SLDA R2,1 00A8A4 8F20 0001 00001 12482+ SLDA R2,1 00A8A8 8F20 0001 00001 12483+ SLDA R2,1 00A8AC 8F20 0001 00001 12484+ SLDA R2,1 00A8B0 8F20 0001 00001 12485+ SLDA R2,1 00A8B4 8F20 0001 00001 12486+ SLDA R2,1 00A8B8 8F20 0001 00001 12487+ SLDA R2,1 00A8BC 8F20 0001 00001 12488+ SLDA R2,1 00A8C0 8F20 0001 00001 12489+ SLDA R2,1 00A8C4 8F20 0001 00001 12490+ SLDA R2,1 00A8C8 8F20 0001 00001 12491+ SLDA R2,1 00A8CC 8F20 0001 00001 12492+ SLDA R2,1 00A8D0 8F20 0001 00001 12493+ SLDA R2,1 00A8D4 8F20 0001 00001 12494+ SLDA R2,1 00A8D8 8F20 0001 00001 12495+ SLDA R2,1 00A8DC 8F20 0001 00001 12496+ SLDA R2,1 00A8E0 8F20 0001 00001 12497+ SLDA R2,1 12498+* 00A8E4 06FB 12499 BCTR R15,R11 12500 TSIMRET 00A8E6 58F0 C128 0A8F8 12501+ L R15,=A(SAVETST) R15 := current save area 00A8EA 58DF 0004 00004 12502+ L R13,4(R15) get old save area back 00A8EE 98EC D00C 0000C 12503+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A8F2 07FE 12504+ BR 14 RETURN 02000000 12505 TSIMEND 00A8F8 12506+ LTORG PAGE 230 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A8F8 00000458 12507 =A(SAVETST) 0A8FC 12508+T221TEND EQU * 12509 * 12510 * Test 222 -- SRA R,1 -------------------------------------- 12511 * 12512 TSIMBEG T222,30000,30,4,C'SRA R,1' 12513+* 002DE4 12514+TDSCDAT CSECT 002DE8 12515+ DS 0D 12516+* 002DE8 0000A900 12517+T222TDSC DC A(T222) // TENTRY 002DEC 000000B4 12518+ DC A(T222TEND-T222) // TLENGTH 002DF0 00007530 12519+ DC F'30000' // TLRCNT 002DF4 0000001E 12520+ DC F'30' // TIGCNT 002DF8 00000004 12521+ DC F'4' // TLTYPE 001449 12522+TEXT CSECT 001449 E3F2F2F2 12523+SPTR1000 DC C'T222' 002DFC 12524+TDSCDAT CSECT 002DFC 12525+ DS 0F 002DFC 04001449 12526+ DC AL1(L'SPTR1000),AL3(SPTR1000) 00144D 12527+TEXT CSECT 00144D E2D9C140D96BF1 12528+SPTR1001 DC C'SRA R,1' 002E00 12529+TDSCDAT CSECT 002E00 12530+ DS 0F 002E00 0700144D 12531+ DC AL1(L'SPTR1001),AL3(SPTR1001) 12532+* 004AE8 12533+TDSCTBL CSECT 04AE8 12534+T222TPTR EQU * 004AE8 00002DE8 12535+ DC A(T222TDSC) enabled test 12536+* 00A8FC 12537+TCODE CSECT 00A900 12538+ DS 0D ensure double word alignment for test 00A900 12539+T222 DS 0H 01650000 00A900 90EC D00C 0000C 12540+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A904 18CF 12541+ LR R12,R15 base register := entry address 0A900 12542+ USING T222,R12 declare code base register 00A906 41B0 C01E 0A91E 12543+ LA R11,T222L load loop target to R11 00A90A 58F0 C0B0 0A9B0 12544+ L R15,=A(SAVETST) R15 := current save area 00A90E 50DF 0004 00004 12545+ ST R13,4(R15) set back pointer in current save area 00A912 182D 12546+ LR R2,R13 remember callers save area 00A914 18DF 12547+ LR R13,R15 setup current save area 00A916 50D2 0008 00008 12548+ ST R13,8(R2) set forw pointer in callers save area 00000 12549+ USING TDSC,R1 declare TDSC base register 00A91A 58F0 1008 00008 12550+ L R15,TLRCNT load local repeat count to R15 12551+* 12552 * 00A91E 4120 0001 00001 12553 T222L LA R2,1 12554 REPINS SRA,(R2,1) repeat: SRA R2,1 12555+* 12556+* build from sublist &ALIST a comma separated string &ARGS 12557+* 12558+* 12559+* 12560+* 12561+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT PAGE 231 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 12562+* this allows to transfer the repeat count from last TDSCGEN call 12563+* 12564+* 12565+* 12566+* write a comment indicating what REPINS does (in case NOGEN in effect) 12567+* 12568+*,// REPINS: do 30 times: 12569+* 12570+* MNOTE requires that ' is doubled for expanded variables 12571+* thus build &MASTR as a copy of '&ARGS with ' doubled 12572+* 12573+* 12574+*,// SRA R2,1 12575+* 12576+* finally generate code: &ICNT copies of &CODE &ARGS 12577+* 00A922 8A20 0001 00001 12578+ SRA R2,1 00A926 8A20 0001 00001 12579+ SRA R2,1 00A92A 8A20 0001 00001 12580+ SRA R2,1 00A92E 8A20 0001 00001 12581+ SRA R2,1 00A932 8A20 0001 00001 12582+ SRA R2,1 00A936 8A20 0001 00001 12583+ SRA R2,1 00A93A 8A20 0001 00001 12584+ SRA R2,1 00A93E 8A20 0001 00001 12585+ SRA R2,1 00A942 8A20 0001 00001 12586+ SRA R2,1 00A946 8A20 0001 00001 12587+ SRA R2,1 00A94A 8A20 0001 00001 12588+ SRA R2,1 00A94E 8A20 0001 00001 12589+ SRA R2,1 00A952 8A20 0001 00001 12590+ SRA R2,1 00A956 8A20 0001 00001 12591+ SRA R2,1 00A95A 8A20 0001 00001 12592+ SRA R2,1 00A95E 8A20 0001 00001 12593+ SRA R2,1 00A962 8A20 0001 00001 12594+ SRA R2,1 00A966 8A20 0001 00001 12595+ SRA R2,1 00A96A 8A20 0001 00001 12596+ SRA R2,1 00A96E 8A20 0001 00001 12597+ SRA R2,1 00A972 8A20 0001 00001 12598+ SRA R2,1 00A976 8A20 0001 00001 12599+ SRA R2,1 00A97A 8A20 0001 00001 12600+ SRA R2,1 00A97E 8A20 0001 00001 12601+ SRA R2,1 00A982 8A20 0001 00001 12602+ SRA R2,1 00A986 8A20 0001 00001 12603+ SRA R2,1 00A98A 8A20 0001 00001 12604+ SRA R2,1 00A98E 8A20 0001 00001 12605+ SRA R2,1 00A992 8A20 0001 00001 12606+ SRA R2,1 00A996 8A20 0001 00001 12607+ SRA R2,1 12608+* 00A99A 06FB 12609 BCTR R15,R11 12610 TSIMRET 00A99C 58F0 C0B0 0A9B0 12611+ L R15,=A(SAVETST) R15 := current save area 00A9A0 58DF 0004 00004 12612+ L R13,4(R15) get old save area back 00A9A4 98EC D00C 0000C 12613+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00A9A8 07FE 12614+ BR 14 RETURN 02000000 12615 TSIMEND 00A9B0 12616+ LTORG PAGE 232 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00A9B0 00000458 12617 =A(SAVETST) 0A9B4 12618+T222TEND EQU * 12619 * 12620 * Test 223 -- SRDA R,1 ------------------------------------- 12621 * 12622 TSIMBEG T223,12000,60,5,C'SRDA R,1' 12623+* 002E04 12624+TDSCDAT CSECT 002E08 12625+ DS 0D 12626+* 002E08 0000A9B8 12627+T223TDSC DC A(T223) // TENTRY 002E0C 0000012C 12628+ DC A(T223TEND-T223) // TLENGTH 002E10 00002EE0 12629+ DC F'12000' // TLRCNT 002E14 0000003C 12630+ DC F'60' // TIGCNT 002E18 00000005 12631+ DC F'5' // TLTYPE 001454 12632+TEXT CSECT 001454 E3F2F2F3 12633+SPTR1012 DC C'T223' 002E1C 12634+TDSCDAT CSECT 002E1C 12635+ DS 0F 002E1C 04001454 12636+ DC AL1(L'SPTR1012),AL3(SPTR1012) 001458 12637+TEXT CSECT 001458 E2D9C4C140D96BF1 12638+SPTR1013 DC C'SRDA R,1' 002E20 12639+TDSCDAT CSECT 002E20 12640+ DS 0F 002E20 08001458 12641+ DC AL1(L'SPTR1013),AL3(SPTR1013) 12642+* 004AEC 12643+TDSCTBL CSECT 04AEC 12644+T223TPTR EQU * 004AEC 00002E08 12645+ DC A(T223TDSC) enabled test 12646+* 00A9B4 12647+TCODE CSECT 00A9B8 12648+ DS 0D ensure double word alignment for test 00A9B8 12649+T223 DS 0H 01650000 00A9B8 90EC D00C 0000C 12650+ STM 14,12,12(13) SAVE REGISTERS 02950000 00A9BC 18CF 12651+ LR R12,R15 base register := entry address 0A9B8 12652+ USING T223,R12 declare code base register 00A9BE 41B0 C01E 0A9D6 12653+ LA R11,T223L load loop target to R11 00A9C2 58F0 C128 0AAE0 12654+ L R15,=A(SAVETST) R15 := current save area 00A9C6 50DF 0004 00004 12655+ ST R13,4(R15) set back pointer in current save area 00A9CA 182D 12656+ LR R2,R13 remember callers save area 00A9CC 18DF 12657+ LR R13,R15 setup current save area 00A9CE 50D2 0008 00008 12658+ ST R13,8(R2) set forw pointer in callers save area 00000 12659+ USING TDSC,R1 declare TDSC base register 00A9D2 58F0 1008 00008 12660+ L R15,TLRCNT load local repeat count to R15 12661+* 12662 * 00A9D6 1722 12663 T223L XR R2,R2 00A9D8 4130 0001 00001 12664 LA R3,1 12665 REPINS SRDA,(R2,1) repeat: SRDA R2,1 12666+* 12667+* build from sublist &ALIST a comma separated string &ARGS 12668+* 12669+* 12670+* 12671+* PAGE 233 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 12672+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12673+* this allows to transfer the repeat count from last TDSCGEN call 12674+* 12675+* 12676+* 12677+* write a comment indicating what REPINS does (in case NOGEN in effect) 12678+* 12679+*,// REPINS: do 60 times: 12680+* 12681+* MNOTE requires that ' is doubled for expanded variables 12682+* thus build &MASTR as a copy of '&ARGS with ' doubled 12683+* 12684+* 12685+*,// SRDA R2,1 12686+* 12687+* finally generate code: &ICNT copies of &CODE &ARGS 12688+* 00A9DC 8E20 0001 00001 12689+ SRDA R2,1 00A9E0 8E20 0001 00001 12690+ SRDA R2,1 00A9E4 8E20 0001 00001 12691+ SRDA R2,1 00A9E8 8E20 0001 00001 12692+ SRDA R2,1 00A9EC 8E20 0001 00001 12693+ SRDA R2,1 00A9F0 8E20 0001 00001 12694+ SRDA R2,1 00A9F4 8E20 0001 00001 12695+ SRDA R2,1 00A9F8 8E20 0001 00001 12696+ SRDA R2,1 00A9FC 8E20 0001 00001 12697+ SRDA R2,1 00AA00 8E20 0001 00001 12698+ SRDA R2,1 00AA04 8E20 0001 00001 12699+ SRDA R2,1 00AA08 8E20 0001 00001 12700+ SRDA R2,1 00AA0C 8E20 0001 00001 12701+ SRDA R2,1 00AA10 8E20 0001 00001 12702+ SRDA R2,1 00AA14 8E20 0001 00001 12703+ SRDA R2,1 00AA18 8E20 0001 00001 12704+ SRDA R2,1 00AA1C 8E20 0001 00001 12705+ SRDA R2,1 00AA20 8E20 0001 00001 12706+ SRDA R2,1 00AA24 8E20 0001 00001 12707+ SRDA R2,1 00AA28 8E20 0001 00001 12708+ SRDA R2,1 00AA2C 8E20 0001 00001 12709+ SRDA R2,1 00AA30 8E20 0001 00001 12710+ SRDA R2,1 00AA34 8E20 0001 00001 12711+ SRDA R2,1 00AA38 8E20 0001 00001 12712+ SRDA R2,1 00AA3C 8E20 0001 00001 12713+ SRDA R2,1 00AA40 8E20 0001 00001 12714+ SRDA R2,1 00AA44 8E20 0001 00001 12715+ SRDA R2,1 00AA48 8E20 0001 00001 12716+ SRDA R2,1 00AA4C 8E20 0001 00001 12717+ SRDA R2,1 00AA50 8E20 0001 00001 12718+ SRDA R2,1 00AA54 8E20 0001 00001 12719+ SRDA R2,1 00AA58 8E20 0001 00001 12720+ SRDA R2,1 00AA5C 8E20 0001 00001 12721+ SRDA R2,1 00AA60 8E20 0001 00001 12722+ SRDA R2,1 00AA64 8E20 0001 00001 12723+ SRDA R2,1 00AA68 8E20 0001 00001 12724+ SRDA R2,1 00AA6C 8E20 0001 00001 12725+ SRDA R2,1 00AA70 8E20 0001 00001 12726+ SRDA R2,1 PAGE 234 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00AA74 8E20 0001 00001 12727+ SRDA R2,1 00AA78 8E20 0001 00001 12728+ SRDA R2,1 00AA7C 8E20 0001 00001 12729+ SRDA R2,1 00AA80 8E20 0001 00001 12730+ SRDA R2,1 00AA84 8E20 0001 00001 12731+ SRDA R2,1 00AA88 8E20 0001 00001 12732+ SRDA R2,1 00AA8C 8E20 0001 00001 12733+ SRDA R2,1 00AA90 8E20 0001 00001 12734+ SRDA R2,1 00AA94 8E20 0001 00001 12735+ SRDA R2,1 00AA98 8E20 0001 00001 12736+ SRDA R2,1 00AA9C 8E20 0001 00001 12737+ SRDA R2,1 00AAA0 8E20 0001 00001 12738+ SRDA R2,1 00AAA4 8E20 0001 00001 12739+ SRDA R2,1 00AAA8 8E20 0001 00001 12740+ SRDA R2,1 00AAAC 8E20 0001 00001 12741+ SRDA R2,1 00AAB0 8E20 0001 00001 12742+ SRDA R2,1 00AAB4 8E20 0001 00001 12743+ SRDA R2,1 00AAB8 8E20 0001 00001 12744+ SRDA R2,1 00AABC 8E20 0001 00001 12745+ SRDA R2,1 00AAC0 8E20 0001 00001 12746+ SRDA R2,1 00AAC4 8E20 0001 00001 12747+ SRDA R2,1 00AAC8 8E20 0001 00001 12748+ SRDA R2,1 12749+* 00AACC 06FB 12750 BCTR R15,R11 12751 TSIMRET 00AACE 58F0 C128 0AAE0 12752+ L R15,=A(SAVETST) R15 := current save area 00AAD2 58DF 0004 00004 12753+ L R13,4(R15) get old save area back 00AAD6 98EC D00C 0000C 12754+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00AADA 07FE 12755+ BR 14 RETURN 02000000 12756 TSIMEND 00AAE0 12757+ LTORG 00AAE0 00000458 12758 =A(SAVETST) 0AAE4 12759+T223TEND EQU * 12760 * 12761 * Test 224 -- SRA R,30 ------------------------------------- 12762 * 12763 TSIMBEG T224,30000,30,4,C'SRA R,30' 12764+* 002E24 12765+TDSCDAT CSECT 002E28 12766+ DS 0D 12767+* 002E28 0000AAE8 12768+T224TDSC DC A(T224) // TENTRY 002E2C 000000B4 12769+ DC A(T224TEND-T224) // TLENGTH 002E30 00007530 12770+ DC F'30000' // TLRCNT 002E34 0000001E 12771+ DC F'30' // TIGCNT 002E38 00000004 12772+ DC F'4' // TLTYPE 001460 12773+TEXT CSECT 001460 E3F2F2F4 12774+SPTR1024 DC C'T224' 002E3C 12775+TDSCDAT CSECT 002E3C 12776+ DS 0F 002E3C 04001460 12777+ DC AL1(L'SPTR1024),AL3(SPTR1024) 001464 12778+TEXT CSECT 001464 E2D9C140D96BF3F0 12779+SPTR1025 DC C'SRA R,30' 002E40 12780+TDSCDAT CSECT 002E40 12781+ DS 0F PAGE 235 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002E40 08001464 12782+ DC AL1(L'SPTR1025),AL3(SPTR1025) 12783+* 004AF0 12784+TDSCTBL CSECT 04AF0 12785+T224TPTR EQU * 004AF0 00002E28 12786+ DC A(T224TDSC) enabled test 12787+* 00AAE4 12788+TCODE CSECT 00AAE8 12789+ DS 0D ensure double word alignment for test 00AAE8 12790+T224 DS 0H 01650000 00AAE8 90EC D00C 0000C 12791+ STM 14,12,12(13) SAVE REGISTERS 02950000 00AAEC 18CF 12792+ LR R12,R15 base register := entry address 0AAE8 12793+ USING T224,R12 declare code base register 00AAEE 41B0 C01E 0AB06 12794+ LA R11,T224L load loop target to R11 00AAF2 58F0 C0B0 0AB98 12795+ L R15,=A(SAVETST) R15 := current save area 00AAF6 50DF 0004 00004 12796+ ST R13,4(R15) set back pointer in current save area 00AAFA 182D 12797+ LR R2,R13 remember callers save area 00AAFC 18DF 12798+ LR R13,R15 setup current save area 00AAFE 50D2 0008 00008 12799+ ST R13,8(R2) set forw pointer in callers save area 00000 12800+ USING TDSC,R1 declare TDSC base register 00AB02 58F0 1008 00008 12801+ L R15,TLRCNT load local repeat count to R15 12802+* 12803 * 00AB06 4120 0001 00001 12804 T224L LA R2,1 12805 REPINS SRA,(R2,30) repeat: SRA R2,30 12806+* 12807+* build from sublist &ALIST a comma separated string &ARGS 12808+* 12809+* 12810+* 12811+* 12812+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12813+* this allows to transfer the repeat count from last TDSCGEN call 12814+* 12815+* 12816+* 12817+* write a comment indicating what REPINS does (in case NOGEN in effect) 12818+* 12819+*,// REPINS: do 30 times: 12820+* 12821+* MNOTE requires that ' is doubled for expanded variables 12822+* thus build &MASTR as a copy of '&ARGS with ' doubled 12823+* 12824+* 12825+*,// SRA R2,30 12826+* 12827+* finally generate code: &ICNT copies of &CODE &ARGS 12828+* 00AB0A 8A20 001E 0001E 12829+ SRA R2,30 00AB0E 8A20 001E 0001E 12830+ SRA R2,30 00AB12 8A20 001E 0001E 12831+ SRA R2,30 00AB16 8A20 001E 0001E 12832+ SRA R2,30 00AB1A 8A20 001E 0001E 12833+ SRA R2,30 00AB1E 8A20 001E 0001E 12834+ SRA R2,30 00AB22 8A20 001E 0001E 12835+ SRA R2,30 00AB26 8A20 001E 0001E 12836+ SRA R2,30 PAGE 236 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00AB2A 8A20 001E 0001E 12837+ SRA R2,30 00AB2E 8A20 001E 0001E 12838+ SRA R2,30 00AB32 8A20 001E 0001E 12839+ SRA R2,30 00AB36 8A20 001E 0001E 12840+ SRA R2,30 00AB3A 8A20 001E 0001E 12841+ SRA R2,30 00AB3E 8A20 001E 0001E 12842+ SRA R2,30 00AB42 8A20 001E 0001E 12843+ SRA R2,30 00AB46 8A20 001E 0001E 12844+ SRA R2,30 00AB4A 8A20 001E 0001E 12845+ SRA R2,30 00AB4E 8A20 001E 0001E 12846+ SRA R2,30 00AB52 8A20 001E 0001E 12847+ SRA R2,30 00AB56 8A20 001E 0001E 12848+ SRA R2,30 00AB5A 8A20 001E 0001E 12849+ SRA R2,30 00AB5E 8A20 001E 0001E 12850+ SRA R2,30 00AB62 8A20 001E 0001E 12851+ SRA R2,30 00AB66 8A20 001E 0001E 12852+ SRA R2,30 00AB6A 8A20 001E 0001E 12853+ SRA R2,30 00AB6E 8A20 001E 0001E 12854+ SRA R2,30 00AB72 8A20 001E 0001E 12855+ SRA R2,30 00AB76 8A20 001E 0001E 12856+ SRA R2,30 00AB7A 8A20 001E 0001E 12857+ SRA R2,30 00AB7E 8A20 001E 0001E 12858+ SRA R2,30 12859+* 00AB82 06FB 12860 BCTR R15,R11 12861 TSIMRET 00AB84 58F0 C0B0 0AB98 12862+ L R15,=A(SAVETST) R15 := current save area 00AB88 58DF 0004 00004 12863+ L R13,4(R15) get old save area back 00AB8C 98EC D00C 0000C 12864+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00AB90 07FE 12865+ BR 14 RETURN 02000000 12866 TSIMEND 00AB98 12867+ LTORG 00AB98 00000458 12868 =A(SAVETST) 0AB9C 12869+T224TEND EQU * 12870 * 12871 * Test 225 -- SRDA R,60 ------------------------------------ 12872 * 12873 TSIMBEG T225,12000,60,5,C'SRDA R,60' 12874+* 002E44 12875+TDSCDAT CSECT 002E48 12876+ DS 0D 12877+* 002E48 0000ABA0 12878+T225TDSC DC A(T225) // TENTRY 002E4C 0000012C 12879+ DC A(T225TEND-T225) // TLENGTH 002E50 00002EE0 12880+ DC F'12000' // TLRCNT 002E54 0000003C 12881+ DC F'60' // TIGCNT 002E58 00000005 12882+ DC F'5' // TLTYPE 00146C 12883+TEXT CSECT 00146C E3F2F2F5 12884+SPTR1036 DC C'T225' 002E5C 12885+TDSCDAT CSECT 002E5C 12886+ DS 0F 002E5C 0400146C 12887+ DC AL1(L'SPTR1036),AL3(SPTR1036) 001470 12888+TEXT CSECT 001470 E2D9C4C140D96BF6 12889+SPTR1037 DC C'SRDA R,60' 002E60 12890+TDSCDAT CSECT 002E60 12891+ DS 0F PAGE 237 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002E60 09001470 12892+ DC AL1(L'SPTR1037),AL3(SPTR1037) 12893+* 004AF4 12894+TDSCTBL CSECT 04AF4 12895+T225TPTR EQU * 004AF4 00002E48 12896+ DC A(T225TDSC) enabled test 12897+* 00AB9C 12898+TCODE CSECT 00ABA0 12899+ DS 0D ensure double word alignment for test 00ABA0 12900+T225 DS 0H 01650000 00ABA0 90EC D00C 0000C 12901+ STM 14,12,12(13) SAVE REGISTERS 02950000 00ABA4 18CF 12902+ LR R12,R15 base register := entry address 0ABA0 12903+ USING T225,R12 declare code base register 00ABA6 41B0 C01E 0ABBE 12904+ LA R11,T225L load loop target to R11 00ABAA 58F0 C128 0ACC8 12905+ L R15,=A(SAVETST) R15 := current save area 00ABAE 50DF 0004 00004 12906+ ST R13,4(R15) set back pointer in current save area 00ABB2 182D 12907+ LR R2,R13 remember callers save area 00ABB4 18DF 12908+ LR R13,R15 setup current save area 00ABB6 50D2 0008 00008 12909+ ST R13,8(R2) set forw pointer in callers save area 00000 12910+ USING TDSC,R1 declare TDSC base register 00ABBA 58F0 1008 00008 12911+ L R15,TLRCNT load local repeat count to R15 12912+* 12913 * 00ABBE 1722 12914 T225L XR R2,R2 00ABC0 4130 0001 00001 12915 LA R3,1 12916 REPINS SRDA,(R2,60) repeat: SRDA R2,60 12917+* 12918+* build from sublist &ALIST a comma separated string &ARGS 12919+* 12920+* 12921+* 12922+* 12923+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 12924+* this allows to transfer the repeat count from last TDSCGEN call 12925+* 12926+* 12927+* 12928+* write a comment indicating what REPINS does (in case NOGEN in effect) 12929+* 12930+*,// REPINS: do 60 times: 12931+* 12932+* MNOTE requires that ' is doubled for expanded variables 12933+* thus build &MASTR as a copy of '&ARGS with ' doubled 12934+* 12935+* 12936+*,// SRDA R2,60 12937+* 12938+* finally generate code: &ICNT copies of &CODE &ARGS 12939+* 00ABC4 8E20 003C 0003C 12940+ SRDA R2,60 00ABC8 8E20 003C 0003C 12941+ SRDA R2,60 00ABCC 8E20 003C 0003C 12942+ SRDA R2,60 00ABD0 8E20 003C 0003C 12943+ SRDA R2,60 00ABD4 8E20 003C 0003C 12944+ SRDA R2,60 00ABD8 8E20 003C 0003C 12945+ SRDA R2,60 00ABDC 8E20 003C 0003C 12946+ SRDA R2,60 PAGE 238 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00ABE0 8E20 003C 0003C 12947+ SRDA R2,60 00ABE4 8E20 003C 0003C 12948+ SRDA R2,60 00ABE8 8E20 003C 0003C 12949+ SRDA R2,60 00ABEC 8E20 003C 0003C 12950+ SRDA R2,60 00ABF0 8E20 003C 0003C 12951+ SRDA R2,60 00ABF4 8E20 003C 0003C 12952+ SRDA R2,60 00ABF8 8E20 003C 0003C 12953+ SRDA R2,60 00ABFC 8E20 003C 0003C 12954+ SRDA R2,60 00AC00 8E20 003C 0003C 12955+ SRDA R2,60 00AC04 8E20 003C 0003C 12956+ SRDA R2,60 00AC08 8E20 003C 0003C 12957+ SRDA R2,60 00AC0C 8E20 003C 0003C 12958+ SRDA R2,60 00AC10 8E20 003C 0003C 12959+ SRDA R2,60 00AC14 8E20 003C 0003C 12960+ SRDA R2,60 00AC18 8E20 003C 0003C 12961+ SRDA R2,60 00AC1C 8E20 003C 0003C 12962+ SRDA R2,60 00AC20 8E20 003C 0003C 12963+ SRDA R2,60 00AC24 8E20 003C 0003C 12964+ SRDA R2,60 00AC28 8E20 003C 0003C 12965+ SRDA R2,60 00AC2C 8E20 003C 0003C 12966+ SRDA R2,60 00AC30 8E20 003C 0003C 12967+ SRDA R2,60 00AC34 8E20 003C 0003C 12968+ SRDA R2,60 00AC38 8E20 003C 0003C 12969+ SRDA R2,60 00AC3C 8E20 003C 0003C 12970+ SRDA R2,60 00AC40 8E20 003C 0003C 12971+ SRDA R2,60 00AC44 8E20 003C 0003C 12972+ SRDA R2,60 00AC48 8E20 003C 0003C 12973+ SRDA R2,60 00AC4C 8E20 003C 0003C 12974+ SRDA R2,60 00AC50 8E20 003C 0003C 12975+ SRDA R2,60 00AC54 8E20 003C 0003C 12976+ SRDA R2,60 00AC58 8E20 003C 0003C 12977+ SRDA R2,60 00AC5C 8E20 003C 0003C 12978+ SRDA R2,60 00AC60 8E20 003C 0003C 12979+ SRDA R2,60 00AC64 8E20 003C 0003C 12980+ SRDA R2,60 00AC68 8E20 003C 0003C 12981+ SRDA R2,60 00AC6C 8E20 003C 0003C 12982+ SRDA R2,60 00AC70 8E20 003C 0003C 12983+ SRDA R2,60 00AC74 8E20 003C 0003C 12984+ SRDA R2,60 00AC78 8E20 003C 0003C 12985+ SRDA R2,60 00AC7C 8E20 003C 0003C 12986+ SRDA R2,60 00AC80 8E20 003C 0003C 12987+ SRDA R2,60 00AC84 8E20 003C 0003C 12988+ SRDA R2,60 00AC88 8E20 003C 0003C 12989+ SRDA R2,60 00AC8C 8E20 003C 0003C 12990+ SRDA R2,60 00AC90 8E20 003C 0003C 12991+ SRDA R2,60 00AC94 8E20 003C 0003C 12992+ SRDA R2,60 00AC98 8E20 003C 0003C 12993+ SRDA R2,60 00AC9C 8E20 003C 0003C 12994+ SRDA R2,60 00ACA0 8E20 003C 0003C 12995+ SRDA R2,60 00ACA4 8E20 003C 0003C 12996+ SRDA R2,60 00ACA8 8E20 003C 0003C 12997+ SRDA R2,60 00ACAC 8E20 003C 0003C 12998+ SRDA R2,60 00ACB0 8E20 003C 0003C 12999+ SRDA R2,60 13000+* 00ACB4 06FB 13001 BCTR R15,R11 PAGE 239 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 13002 TSIMRET 00ACB6 58F0 C128 0ACC8 13003+ L R15,=A(SAVETST) R15 := current save area 00ACBA 58DF 0004 00004 13004+ L R13,4(R15) get old save area back 00ACBE 98EC D00C 0000C 13005+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00ACC2 07FE 13006+ BR 14 RETURN 02000000 13007 TSIMEND 00ACC8 13008+ LTORG 00ACC8 00000458 13009 =A(SAVETST) 0ACCC 13010+T225TEND EQU * 13011 * 13012 * Test 23x -- logical and/or/xor =========================== 13013 * 13014 * Test 230 -- XR R,R --------------------------------------- 13015 * 13016 TSIMBEG T230,15000,100,1,C'XR R,R' 13017+* 002E64 13018+TDSCDAT CSECT 002E68 13019+ DS 0D 13020+* 002E68 0000ACD0 13021+T230TDSC DC A(T230) // TENTRY 002E6C 00000104 13022+ DC A(T230TEND-T230) // TLENGTH 002E70 00003A98 13023+ DC F'15000' // TLRCNT 002E74 00000064 13024+ DC F'100' // TIGCNT 002E78 00000001 13025+ DC F'1' // TLTYPE 001479 13026+TEXT CSECT 001479 E3F2F3F0 13027+SPTR1048 DC C'T230' 002E7C 13028+TDSCDAT CSECT 002E7C 13029+ DS 0F 002E7C 04001479 13030+ DC AL1(L'SPTR1048),AL3(SPTR1048) 00147D 13031+TEXT CSECT 00147D E7D940D96BD9 13032+SPTR1049 DC C'XR R,R' 002E80 13033+TDSCDAT CSECT 002E80 13034+ DS 0F 002E80 0600147D 13035+ DC AL1(L'SPTR1049),AL3(SPTR1049) 13036+* 004AF8 13037+TDSCTBL CSECT 04AF8 13038+T230TPTR EQU * 004AF8 00002E68 13039+ DC A(T230TDSC) enabled test 13040+* 00ACCC 13041+TCODE CSECT 00ACD0 13042+ DS 0D ensure double word alignment for test 00ACD0 13043+T230 DS 0H 01650000 00ACD0 90EC D00C 0000C 13044+ STM 14,12,12(13) SAVE REGISTERS 02950000 00ACD4 18CF 13045+ LR R12,R15 base register := entry address 0ACD0 13046+ USING T230,R12 declare code base register 00ACD6 41B0 C024 0ACF4 13047+ LA R11,T230L load loop target to R11 00ACDA 58F0 C100 0ADD0 13048+ L R15,=A(SAVETST) R15 := current save area 00ACDE 50DF 0004 00004 13049+ ST R13,4(R15) set back pointer in current save area 00ACE2 182D 13050+ LR R2,R13 remember callers save area 00ACE4 18DF 13051+ LR R13,R15 setup current save area 00ACE6 50D2 0008 00008 13052+ ST R13,8(R2) set forw pointer in callers save area 00000 13053+ USING TDSC,R1 declare TDSC base register 00ACEA 58F0 1008 00008 13054+ L R15,TLRCNT load local repeat count to R15 13055+* 13056 * PAGE 240 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00ACEE 1722 13057 XR R2,R2 00ACF0 4130 0001 00001 13058 LA R3,1 13059 T230L REPINS XR,(R2,R3) repeat: XR R2,R3 13060+* 13061+* build from sublist &ALIST a comma separated string &ARGS 13062+* 13063+* 13064+* 13065+* 13066+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13067+* this allows to transfer the repeat count from last TDSCGEN call 13068+* 13069+* 0ACF4 13070+T230L EQU * 13071+* 13072+* write a comment indicating what REPINS does (in case NOGEN in effect) 13073+* 13074+*,// REPINS: do 100 times: 13075+* 13076+* MNOTE requires that ' is doubled for expanded variables 13077+* thus build &MASTR as a copy of '&ARGS with ' doubled 13078+* 13079+* 13080+*,// XR R2,R3 13081+* 13082+* finally generate code: &ICNT copies of &CODE &ARGS 13083+* 00ACF4 1723 13084+ XR R2,R3 00ACF6 1723 13085+ XR R2,R3 00ACF8 1723 13086+ XR R2,R3 00ACFA 1723 13087+ XR R2,R3 00ACFC 1723 13088+ XR R2,R3 00ACFE 1723 13089+ XR R2,R3 00AD00 1723 13090+ XR R2,R3 00AD02 1723 13091+ XR R2,R3 00AD04 1723 13092+ XR R2,R3 00AD06 1723 13093+ XR R2,R3 00AD08 1723 13094+ XR R2,R3 00AD0A 1723 13095+ XR R2,R3 00AD0C 1723 13096+ XR R2,R3 00AD0E 1723 13097+ XR R2,R3 00AD10 1723 13098+ XR R2,R3 00AD12 1723 13099+ XR R2,R3 00AD14 1723 13100+ XR R2,R3 00AD16 1723 13101+ XR R2,R3 00AD18 1723 13102+ XR R2,R3 00AD1A 1723 13103+ XR R2,R3 00AD1C 1723 13104+ XR R2,R3 00AD1E 1723 13105+ XR R2,R3 00AD20 1723 13106+ XR R2,R3 00AD22 1723 13107+ XR R2,R3 00AD24 1723 13108+ XR R2,R3 00AD26 1723 13109+ XR R2,R3 00AD28 1723 13110+ XR R2,R3 00AD2A 1723 13111+ XR R2,R3 PAGE 241 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00AD2C 1723 13112+ XR R2,R3 00AD2E 1723 13113+ XR R2,R3 00AD30 1723 13114+ XR R2,R3 00AD32 1723 13115+ XR R2,R3 00AD34 1723 13116+ XR R2,R3 00AD36 1723 13117+ XR R2,R3 00AD38 1723 13118+ XR R2,R3 00AD3A 1723 13119+ XR R2,R3 00AD3C 1723 13120+ XR R2,R3 00AD3E 1723 13121+ XR R2,R3 00AD40 1723 13122+ XR R2,R3 00AD42 1723 13123+ XR R2,R3 00AD44 1723 13124+ XR R2,R3 00AD46 1723 13125+ XR R2,R3 00AD48 1723 13126+ XR R2,R3 00AD4A 1723 13127+ XR R2,R3 00AD4C 1723 13128+ XR R2,R3 00AD4E 1723 13129+ XR R2,R3 00AD50 1723 13130+ XR R2,R3 00AD52 1723 13131+ XR R2,R3 00AD54 1723 13132+ XR R2,R3 00AD56 1723 13133+ XR R2,R3 00AD58 1723 13134+ XR R2,R3 00AD5A 1723 13135+ XR R2,R3 00AD5C 1723 13136+ XR R2,R3 00AD5E 1723 13137+ XR R2,R3 00AD60 1723 13138+ XR R2,R3 00AD62 1723 13139+ XR R2,R3 00AD64 1723 13140+ XR R2,R3 00AD66 1723 13141+ XR R2,R3 00AD68 1723 13142+ XR R2,R3 00AD6A 1723 13143+ XR R2,R3 00AD6C 1723 13144+ XR R2,R3 00AD6E 1723 13145+ XR R2,R3 00AD70 1723 13146+ XR R2,R3 00AD72 1723 13147+ XR R2,R3 00AD74 1723 13148+ XR R2,R3 00AD76 1723 13149+ XR R2,R3 00AD78 1723 13150+ XR R2,R3 00AD7A 1723 13151+ XR R2,R3 00AD7C 1723 13152+ XR R2,R3 00AD7E 1723 13153+ XR R2,R3 00AD80 1723 13154+ XR R2,R3 00AD82 1723 13155+ XR R2,R3 00AD84 1723 13156+ XR R2,R3 00AD86 1723 13157+ XR R2,R3 00AD88 1723 13158+ XR R2,R3 00AD8A 1723 13159+ XR R2,R3 00AD8C 1723 13160+ XR R2,R3 00AD8E 1723 13161+ XR R2,R3 00AD90 1723 13162+ XR R2,R3 00AD92 1723 13163+ XR R2,R3 00AD94 1723 13164+ XR R2,R3 00AD96 1723 13165+ XR R2,R3 00AD98 1723 13166+ XR R2,R3 PAGE 242 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00AD9A 1723 13167+ XR R2,R3 00AD9C 1723 13168+ XR R2,R3 00AD9E 1723 13169+ XR R2,R3 00ADA0 1723 13170+ XR R2,R3 00ADA2 1723 13171+ XR R2,R3 00ADA4 1723 13172+ XR R2,R3 00ADA6 1723 13173+ XR R2,R3 00ADA8 1723 13174+ XR R2,R3 00ADAA 1723 13175+ XR R2,R3 00ADAC 1723 13176+ XR R2,R3 00ADAE 1723 13177+ XR R2,R3 00ADB0 1723 13178+ XR R2,R3 00ADB2 1723 13179+ XR R2,R3 00ADB4 1723 13180+ XR R2,R3 00ADB6 1723 13181+ XR R2,R3 00ADB8 1723 13182+ XR R2,R3 00ADBA 1723 13183+ XR R2,R3 13184+* 00ADBC 06FB 13185 BCTR R15,R11 13186 TSIMRET 00ADBE 58F0 C100 0ADD0 13187+ L R15,=A(SAVETST) R15 := current save area 00ADC2 58DF 0004 00004 13188+ L R13,4(R15) get old save area back 00ADC6 98EC D00C 0000C 13189+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00ADCA 07FE 13190+ BR 14 RETURN 02000000 13191 TSIMEND 00ADD0 13192+ LTORG 00ADD0 00000458 13193 =A(SAVETST) 0ADD4 13194+T230TEND EQU * 13195 * 13196 * Test 231 -- X R,m ---------------------------------------- 13197 * 13198 TSIMBEG T231,10000,50,1,C'X R,m' 13199+* 002E84 13200+TDSCDAT CSECT 002E88 13201+ DS 0D 13202+* 002E88 0000ADD8 13203+T231TDSC DC A(T231) // TENTRY 002E8C 00000100 13204+ DC A(T231TEND-T231) // TLENGTH 002E90 00002710 13205+ DC F'10000' // TLRCNT 002E94 00000032 13206+ DC F'50' // TIGCNT 002E98 00000001 13207+ DC F'1' // TLTYPE 001483 13208+TEXT CSECT 001483 E3F2F3F1 13209+SPTR1060 DC C'T231' 002E9C 13210+TDSCDAT CSECT 002E9C 13211+ DS 0F 002E9C 04001483 13212+ DC AL1(L'SPTR1060),AL3(SPTR1060) 001487 13213+TEXT CSECT 001487 E740D96B94 13214+SPTR1061 DC C'X R,m' 002EA0 13215+TDSCDAT CSECT 002EA0 13216+ DS 0F 002EA0 05001487 13217+ DC AL1(L'SPTR1061),AL3(SPTR1061) 13218+* 004AFC 13219+TDSCTBL CSECT 04AFC 13220+T231TPTR EQU * 004AFC 00002E88 13221+ DC A(T231TDSC) enabled test PAGE 243 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 13222+* 00ADD4 13223+TCODE CSECT 00ADD8 13224+ DS 0D ensure double word alignment for test 00ADD8 13225+T231 DS 0H 01650000 00ADD8 90EC D00C 0000C 13226+ STM 14,12,12(13) SAVE REGISTERS 02950000 00ADDC 18CF 13227+ LR R12,R15 base register := entry address 0ADD8 13228+ USING T231,R12 declare code base register 00ADDE 41B0 C020 0ADF8 13229+ LA R11,T231L load loop target to R11 00ADE2 58F0 C0F8 0AED0 13230+ L R15,=A(SAVETST) R15 := current save area 00ADE6 50DF 0004 00004 13231+ ST R13,4(R15) set back pointer in current save area 00ADEA 182D 13232+ LR R2,R13 remember callers save area 00ADEC 18DF 13233+ LR R13,R15 setup current save area 00ADEE 50D2 0008 00008 13234+ ST R13,8(R2) set forw pointer in callers save area 00000 13235+ USING TDSC,R1 declare TDSC base register 00ADF2 58F0 1008 00008 13236+ L R15,TLRCNT load local repeat count to R15 13237+* 13238 * 00ADF6 1722 13239 XR R2,R2 13240 T231L REPINS X,(R2,=F'1') repeat: X R2,=F'1' 13241+* 13242+* build from sublist &ALIST a comma separated string &ARGS 13243+* 13244+* 13245+* 13246+* 13247+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13248+* this allows to transfer the repeat count from last TDSCGEN call 13249+* 13250+* 0ADF8 13251+T231L EQU * 13252+* 13253+* write a comment indicating what REPINS does (in case NOGEN in effect) 13254+* 13255+*,// REPINS: do 50 times: 13256+* 13257+* MNOTE requires that ' is doubled for expanded variables 13258+* thus build &MASTR as a copy of '&ARGS with ' doubled 13259+* 13260+* 13261+*,// X R2,=F'1' 13262+* 13263+* finally generate code: &ICNT copies of &CODE &ARGS 13264+* 00ADF8 5720 C0FC 0AED4 13265+ X R2,=F'1' 00ADFC 5720 C0FC 0AED4 13266+ X R2,=F'1' 00AE00 5720 C0FC 0AED4 13267+ X R2,=F'1' 00AE04 5720 C0FC 0AED4 13268+ X R2,=F'1' 00AE08 5720 C0FC 0AED4 13269+ X R2,=F'1' 00AE0C 5720 C0FC 0AED4 13270+ X R2,=F'1' 00AE10 5720 C0FC 0AED4 13271+ X R2,=F'1' 00AE14 5720 C0FC 0AED4 13272+ X R2,=F'1' 00AE18 5720 C0FC 0AED4 13273+ X R2,=F'1' 00AE1C 5720 C0FC 0AED4 13274+ X R2,=F'1' 00AE20 5720 C0FC 0AED4 13275+ X R2,=F'1' 00AE24 5720 C0FC 0AED4 13276+ X R2,=F'1' PAGE 244 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00AE28 5720 C0FC 0AED4 13277+ X R2,=F'1' 00AE2C 5720 C0FC 0AED4 13278+ X R2,=F'1' 00AE30 5720 C0FC 0AED4 13279+ X R2,=F'1' 00AE34 5720 C0FC 0AED4 13280+ X R2,=F'1' 00AE38 5720 C0FC 0AED4 13281+ X R2,=F'1' 00AE3C 5720 C0FC 0AED4 13282+ X R2,=F'1' 00AE40 5720 C0FC 0AED4 13283+ X R2,=F'1' 00AE44 5720 C0FC 0AED4 13284+ X R2,=F'1' 00AE48 5720 C0FC 0AED4 13285+ X R2,=F'1' 00AE4C 5720 C0FC 0AED4 13286+ X R2,=F'1' 00AE50 5720 C0FC 0AED4 13287+ X R2,=F'1' 00AE54 5720 C0FC 0AED4 13288+ X R2,=F'1' 00AE58 5720 C0FC 0AED4 13289+ X R2,=F'1' 00AE5C 5720 C0FC 0AED4 13290+ X R2,=F'1' 00AE60 5720 C0FC 0AED4 13291+ X R2,=F'1' 00AE64 5720 C0FC 0AED4 13292+ X R2,=F'1' 00AE68 5720 C0FC 0AED4 13293+ X R2,=F'1' 00AE6C 5720 C0FC 0AED4 13294+ X R2,=F'1' 00AE70 5720 C0FC 0AED4 13295+ X R2,=F'1' 00AE74 5720 C0FC 0AED4 13296+ X R2,=F'1' 00AE78 5720 C0FC 0AED4 13297+ X R2,=F'1' 00AE7C 5720 C0FC 0AED4 13298+ X R2,=F'1' 00AE80 5720 C0FC 0AED4 13299+ X R2,=F'1' 00AE84 5720 C0FC 0AED4 13300+ X R2,=F'1' 00AE88 5720 C0FC 0AED4 13301+ X R2,=F'1' 00AE8C 5720 C0FC 0AED4 13302+ X R2,=F'1' 00AE90 5720 C0FC 0AED4 13303+ X R2,=F'1' 00AE94 5720 C0FC 0AED4 13304+ X R2,=F'1' 00AE98 5720 C0FC 0AED4 13305+ X R2,=F'1' 00AE9C 5720 C0FC 0AED4 13306+ X R2,=F'1' 00AEA0 5720 C0FC 0AED4 13307+ X R2,=F'1' 00AEA4 5720 C0FC 0AED4 13308+ X R2,=F'1' 00AEA8 5720 C0FC 0AED4 13309+ X R2,=F'1' 00AEAC 5720 C0FC 0AED4 13310+ X R2,=F'1' 00AEB0 5720 C0FC 0AED4 13311+ X R2,=F'1' 00AEB4 5720 C0FC 0AED4 13312+ X R2,=F'1' 00AEB8 5720 C0FC 0AED4 13313+ X R2,=F'1' 00AEBC 5720 C0FC 0AED4 13314+ X R2,=F'1' 13315+* 00AEC0 06FB 13316 BCTR R15,R11 13317 TSIMRET 00AEC2 58F0 C0F8 0AED0 13318+ L R15,=A(SAVETST) R15 := current save area 00AEC6 58DF 0004 00004 13319+ L R13,4(R15) get old save area back 00AECA 98EC D00C 0000C 13320+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00AECE 07FE 13321+ BR 14 RETURN 02000000 13322 TSIMEND 00AED0 13323+ LTORG 00AED0 00000458 13324 =A(SAVETST) 00AED4 00000001 13325 =F'1' 0AED8 13326+T231TEND EQU * 13327 * 13328 * Test 232 -- XI R,i --------------------------------------- 13329 * 13330 TSIMBEG T232,10000,50,1,C'XI m,i' 13331+* PAGE 245 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002EA4 13332+TDSCDAT CSECT 002EA8 13333+ DS 0D 13334+* 002EA8 0000AED8 13335+T232TDSC DC A(T232) // TENTRY 002EAC 000000FC 13336+ DC A(T232TEND-T232) // TLENGTH 002EB0 00002710 13337+ DC F'10000' // TLRCNT 002EB4 00000032 13338+ DC F'50' // TIGCNT 002EB8 00000001 13339+ DC F'1' // TLTYPE 00148C 13340+TEXT CSECT 00148C E3F2F3F2 13341+SPTR1072 DC C'T232' 002EBC 13342+TDSCDAT CSECT 002EBC 13343+ DS 0F 002EBC 0400148C 13344+ DC AL1(L'SPTR1072),AL3(SPTR1072) 001490 13345+TEXT CSECT 001490 E7C940946B89 13346+SPTR1073 DC C'XI m,i' 002EC0 13347+TDSCDAT CSECT 002EC0 13348+ DS 0F 002EC0 06001490 13349+ DC AL1(L'SPTR1073),AL3(SPTR1073) 13350+* 004B00 13351+TDSCTBL CSECT 04B00 13352+T232TPTR EQU * 004B00 00002EA8 13353+ DC A(T232TDSC) enabled test 13354+* 00AED8 13355+TCODE CSECT 00AED8 13356+ DS 0D ensure double word alignment for test 00AED8 13357+T232 DS 0H 01650000 00AED8 90EC D00C 0000C 13358+ STM 14,12,12(13) SAVE REGISTERS 02950000 00AEDC 18CF 13359+ LR R12,R15 base register := entry address 0AED8 13360+ USING T232,R12 declare code base register 00AEDE 41B0 C01E 0AEF6 13361+ LA R11,T232L load loop target to R11 00AEE2 58F0 C0F8 0AFD0 13362+ L R15,=A(SAVETST) R15 := current save area 00AEE6 50DF 0004 00004 13363+ ST R13,4(R15) set back pointer in current save area 00AEEA 182D 13364+ LR R2,R13 remember callers save area 00AEEC 18DF 13365+ LR R13,R15 setup current save area 00AEEE 50D2 0008 00008 13366+ ST R13,8(R2) set forw pointer in callers save area 00000 13367+ USING TDSC,R1 declare TDSC base register 00AEF2 58F0 1008 00008 13368+ L R15,TLRCNT load local repeat count to R15 13369+* 13370 * 13371 T232L REPINS XI,(T232V,X'FF') repeat: XI T232V,X'FF' 13372+* 13373+* build from sublist &ALIST a comma separated string &ARGS 13374+* 13375+* 13376+* 13377+* 13378+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13379+* this allows to transfer the repeat count from last TDSCGEN call 13380+* 13381+* 0AEF6 13382+T232L EQU * 13383+* 13384+* write a comment indicating what REPINS does (in case NOGEN in effect) 13385+* 13386+*,// REPINS: do 50 times: PAGE 246 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 13387+* 13388+* MNOTE requires that ' is doubled for expanded variables 13389+* thus build &MASTR as a copy of '&ARGS with ' doubled 13390+* 13391+* 13392+*,// XI T232V,X'FF' 13393+* 13394+* finally generate code: &ICNT copies of &CODE &ARGS 13395+* 00AEF6 97FF C0F6 0AFCE 13396+ XI T232V,X'FF' 00AEFA 97FF C0F6 0AFCE 13397+ XI T232V,X'FF' 00AEFE 97FF C0F6 0AFCE 13398+ XI T232V,X'FF' 00AF02 97FF C0F6 0AFCE 13399+ XI T232V,X'FF' 00AF06 97FF C0F6 0AFCE 13400+ XI T232V,X'FF' 00AF0A 97FF C0F6 0AFCE 13401+ XI T232V,X'FF' 00AF0E 97FF C0F6 0AFCE 13402+ XI T232V,X'FF' 00AF12 97FF C0F6 0AFCE 13403+ XI T232V,X'FF' 00AF16 97FF C0F6 0AFCE 13404+ XI T232V,X'FF' 00AF1A 97FF C0F6 0AFCE 13405+ XI T232V,X'FF' 00AF1E 97FF C0F6 0AFCE 13406+ XI T232V,X'FF' 00AF22 97FF C0F6 0AFCE 13407+ XI T232V,X'FF' 00AF26 97FF C0F6 0AFCE 13408+ XI T232V,X'FF' 00AF2A 97FF C0F6 0AFCE 13409+ XI T232V,X'FF' 00AF2E 97FF C0F6 0AFCE 13410+ XI T232V,X'FF' 00AF32 97FF C0F6 0AFCE 13411+ XI T232V,X'FF' 00AF36 97FF C0F6 0AFCE 13412+ XI T232V,X'FF' 00AF3A 97FF C0F6 0AFCE 13413+ XI T232V,X'FF' 00AF3E 97FF C0F6 0AFCE 13414+ XI T232V,X'FF' 00AF42 97FF C0F6 0AFCE 13415+ XI T232V,X'FF' 00AF46 97FF C0F6 0AFCE 13416+ XI T232V,X'FF' 00AF4A 97FF C0F6 0AFCE 13417+ XI T232V,X'FF' 00AF4E 97FF C0F6 0AFCE 13418+ XI T232V,X'FF' 00AF52 97FF C0F6 0AFCE 13419+ XI T232V,X'FF' 00AF56 97FF C0F6 0AFCE 13420+ XI T232V,X'FF' 00AF5A 97FF C0F6 0AFCE 13421+ XI T232V,X'FF' 00AF5E 97FF C0F6 0AFCE 13422+ XI T232V,X'FF' 00AF62 97FF C0F6 0AFCE 13423+ XI T232V,X'FF' 00AF66 97FF C0F6 0AFCE 13424+ XI T232V,X'FF' 00AF6A 97FF C0F6 0AFCE 13425+ XI T232V,X'FF' 00AF6E 97FF C0F6 0AFCE 13426+ XI T232V,X'FF' 00AF72 97FF C0F6 0AFCE 13427+ XI T232V,X'FF' 00AF76 97FF C0F6 0AFCE 13428+ XI T232V,X'FF' 00AF7A 97FF C0F6 0AFCE 13429+ XI T232V,X'FF' 00AF7E 97FF C0F6 0AFCE 13430+ XI T232V,X'FF' 00AF82 97FF C0F6 0AFCE 13431+ XI T232V,X'FF' 00AF86 97FF C0F6 0AFCE 13432+ XI T232V,X'FF' 00AF8A 97FF C0F6 0AFCE 13433+ XI T232V,X'FF' 00AF8E 97FF C0F6 0AFCE 13434+ XI T232V,X'FF' 00AF92 97FF C0F6 0AFCE 13435+ XI T232V,X'FF' 00AF96 97FF C0F6 0AFCE 13436+ XI T232V,X'FF' 00AF9A 97FF C0F6 0AFCE 13437+ XI T232V,X'FF' 00AF9E 97FF C0F6 0AFCE 13438+ XI T232V,X'FF' 00AFA2 97FF C0F6 0AFCE 13439+ XI T232V,X'FF' 00AFA6 97FF C0F6 0AFCE 13440+ XI T232V,X'FF' 00AFAA 97FF C0F6 0AFCE 13441+ XI T232V,X'FF' PAGE 247 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00AFAE 97FF C0F6 0AFCE 13442+ XI T232V,X'FF' 00AFB2 97FF C0F6 0AFCE 13443+ XI T232V,X'FF' 00AFB6 97FF C0F6 0AFCE 13444+ XI T232V,X'FF' 00AFBA 97FF C0F6 0AFCE 13445+ XI T232V,X'FF' 13446+* 00AFBE 06FB 13447 BCTR R15,R11 13448 TSIMRET 00AFC0 58F0 C0F8 0AFD0 13449+ L R15,=A(SAVETST) R15 := current save area 00AFC4 58DF 0004 00004 13450+ L R13,4(R15) get old save area back 00AFC8 98EC D00C 0000C 13451+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00AFCC 07FE 13452+ BR 14 RETURN 02000000 13453 * 00AFCE 11 13454 T232V DC X'11' 13455 TSIMEND 00AFD0 13456+ LTORG 00AFD0 00000458 13457 =A(SAVETST) 0AFD4 13458+T232TEND EQU * 13459 * 13460 * Test 235 -- XC m,m (10c) --------------------------------- 13461 * 13462 TSIMBEG T235,4500,50,1,C'XC m,m (10c)' 13463+* 002EC4 13464+TDSCDAT CSECT 002EC8 13465+ DS 0D 13466+* 002EC8 0000AFD8 13467+T235TDSC DC A(T235) // TENTRY 002ECC 0000017C 13468+ DC A(T235TEND-T235) // TLENGTH 002ED0 00001194 13469+ DC F'4500' // TLRCNT 002ED4 00000032 13470+ DC F'50' // TIGCNT 002ED8 00000001 13471+ DC F'1' // TLTYPE 001496 13472+TEXT CSECT 001496 E3F2F3F5 13473+SPTR1084 DC C'T235' 002EDC 13474+TDSCDAT CSECT 002EDC 13475+ DS 0F 002EDC 04001496 13476+ DC AL1(L'SPTR1084),AL3(SPTR1084) 00149A 13477+TEXT CSECT 00149A E7C340946B94404D 13478+SPTR1085 DC C'XC m,m (10c)' 002EE0 13479+TDSCDAT CSECT 002EE0 13480+ DS 0F 002EE0 0C00149A 13481+ DC AL1(L'SPTR1085),AL3(SPTR1085) 13482+* 004B04 13483+TDSCTBL CSECT 04B04 13484+T235TPTR EQU * 004B04 00002EC8 13485+ DC A(T235TDSC) enabled test 13486+* 00AFD4 13487+TCODE CSECT 00AFD8 13488+ DS 0D ensure double word alignment for test 00AFD8 13489+T235 DS 0H 01650000 00AFD8 90EC D00C 0000C 13490+ STM 14,12,12(13) SAVE REGISTERS 02950000 00AFDC 18CF 13491+ LR R12,R15 base register := entry address 0AFD8 13492+ USING T235,R12 declare code base register 00AFDE 41B0 C026 0AFFE 13493+ LA R11,T235L load loop target to R11 00AFE2 58F0 C178 0B150 13494+ L R15,=A(SAVETST) R15 := current save area 00AFE6 50DF 0004 00004 13495+ ST R13,4(R15) set back pointer in current save area 00AFEA 182D 13496+ LR R2,R13 remember callers save area PAGE 248 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00AFEC 18DF 13497+ LR R13,R15 setup current save area 00AFEE 50D2 0008 00008 13498+ ST R13,8(R2) set forw pointer in callers save area 00000 13499+ USING TDSC,R1 declare TDSC base register 00AFF2 58F0 1008 00008 13500+ L R15,TLRCNT load local repeat count to R15 13501+* 13502 * 00AFF6 4120 C162 0B13A 13503 LA R2,T235V1 00AFFA 4130 C16C 0B144 13504 LA R3,T235V2 13505 T235L REPINS XC,(0(10,R2),0(R3)) repeat: XC 0(10,R2),0(R3) 13506+* 13507+* build from sublist &ALIST a comma separated string &ARGS 13508+* 13509+* 13510+* 13511+* 13512+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13513+* this allows to transfer the repeat count from last TDSCGEN call 13514+* 13515+* 0AFFE 13516+T235L EQU * 13517+* 13518+* write a comment indicating what REPINS does (in case NOGEN in effect) 13519+* 13520+*,// REPINS: do 50 times: 13521+* 13522+* MNOTE requires that ' is doubled for expanded variables 13523+* thus build &MASTR as a copy of '&ARGS with ' doubled 13524+* 13525+* 13526+*,// XC 0(10,R2),0(R3) 13527+* 13528+* finally generate code: &ICNT copies of &CODE &ARGS 13529+* 00AFFE D709 2000 3000 00000 00000 13530+ XC 0(10,R2),0(R3) 00B004 D709 2000 3000 00000 00000 13531+ XC 0(10,R2),0(R3) 00B00A D709 2000 3000 00000 00000 13532+ XC 0(10,R2),0(R3) 00B010 D709 2000 3000 00000 00000 13533+ XC 0(10,R2),0(R3) 00B016 D709 2000 3000 00000 00000 13534+ XC 0(10,R2),0(R3) 00B01C D709 2000 3000 00000 00000 13535+ XC 0(10,R2),0(R3) 00B022 D709 2000 3000 00000 00000 13536+ XC 0(10,R2),0(R3) 00B028 D709 2000 3000 00000 00000 13537+ XC 0(10,R2),0(R3) 00B02E D709 2000 3000 00000 00000 13538+ XC 0(10,R2),0(R3) 00B034 D709 2000 3000 00000 00000 13539+ XC 0(10,R2),0(R3) 00B03A D709 2000 3000 00000 00000 13540+ XC 0(10,R2),0(R3) 00B040 D709 2000 3000 00000 00000 13541+ XC 0(10,R2),0(R3) 00B046 D709 2000 3000 00000 00000 13542+ XC 0(10,R2),0(R3) 00B04C D709 2000 3000 00000 00000 13543+ XC 0(10,R2),0(R3) 00B052 D709 2000 3000 00000 00000 13544+ XC 0(10,R2),0(R3) 00B058 D709 2000 3000 00000 00000 13545+ XC 0(10,R2),0(R3) 00B05E D709 2000 3000 00000 00000 13546+ XC 0(10,R2),0(R3) 00B064 D709 2000 3000 00000 00000 13547+ XC 0(10,R2),0(R3) 00B06A D709 2000 3000 00000 00000 13548+ XC 0(10,R2),0(R3) 00B070 D709 2000 3000 00000 00000 13549+ XC 0(10,R2),0(R3) 00B076 D709 2000 3000 00000 00000 13550+ XC 0(10,R2),0(R3) 00B07C D709 2000 3000 00000 00000 13551+ XC 0(10,R2),0(R3) PAGE 249 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00B082 D709 2000 3000 00000 00000 13552+ XC 0(10,R2),0(R3) 00B088 D709 2000 3000 00000 00000 13553+ XC 0(10,R2),0(R3) 00B08E D709 2000 3000 00000 00000 13554+ XC 0(10,R2),0(R3) 00B094 D709 2000 3000 00000 00000 13555+ XC 0(10,R2),0(R3) 00B09A D709 2000 3000 00000 00000 13556+ XC 0(10,R2),0(R3) 00B0A0 D709 2000 3000 00000 00000 13557+ XC 0(10,R2),0(R3) 00B0A6 D709 2000 3000 00000 00000 13558+ XC 0(10,R2),0(R3) 00B0AC D709 2000 3000 00000 00000 13559+ XC 0(10,R2),0(R3) 00B0B2 D709 2000 3000 00000 00000 13560+ XC 0(10,R2),0(R3) 00B0B8 D709 2000 3000 00000 00000 13561+ XC 0(10,R2),0(R3) 00B0BE D709 2000 3000 00000 00000 13562+ XC 0(10,R2),0(R3) 00B0C4 D709 2000 3000 00000 00000 13563+ XC 0(10,R2),0(R3) 00B0CA D709 2000 3000 00000 00000 13564+ XC 0(10,R2),0(R3) 00B0D0 D709 2000 3000 00000 00000 13565+ XC 0(10,R2),0(R3) 00B0D6 D709 2000 3000 00000 00000 13566+ XC 0(10,R2),0(R3) 00B0DC D709 2000 3000 00000 00000 13567+ XC 0(10,R2),0(R3) 00B0E2 D709 2000 3000 00000 00000 13568+ XC 0(10,R2),0(R3) 00B0E8 D709 2000 3000 00000 00000 13569+ XC 0(10,R2),0(R3) 00B0EE D709 2000 3000 00000 00000 13570+ XC 0(10,R2),0(R3) 00B0F4 D709 2000 3000 00000 00000 13571+ XC 0(10,R2),0(R3) 00B0FA D709 2000 3000 00000 00000 13572+ XC 0(10,R2),0(R3) 00B100 D709 2000 3000 00000 00000 13573+ XC 0(10,R2),0(R3) 00B106 D709 2000 3000 00000 00000 13574+ XC 0(10,R2),0(R3) 00B10C D709 2000 3000 00000 00000 13575+ XC 0(10,R2),0(R3) 00B112 D709 2000 3000 00000 00000 13576+ XC 0(10,R2),0(R3) 00B118 D709 2000 3000 00000 00000 13577+ XC 0(10,R2),0(R3) 00B11E D709 2000 3000 00000 00000 13578+ XC 0(10,R2),0(R3) 00B124 D709 2000 3000 00000 00000 13579+ XC 0(10,R2),0(R3) 13580+* 00B12A 06FB 13581 BCTR R15,R11 13582 TSIMRET 00B12C 58F0 C178 0B150 13583+ L R15,=A(SAVETST) R15 := current save area 00B130 58DF 0004 00004 13584+ L R13,4(R15) get old save area back 00B134 98EC D00C 0000C 13585+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00B138 07FE 13586+ BR 14 RETURN 02000000 13587 * 00B13A 1111111111111111 13588 T235V1 DC 10X'11' 00B144 FFFFFFFFFFFFFFFF 13589 T235V2 DC 10X'FF' 13590 TSIMEND 00B150 13591+ LTORG 00B150 00000458 13592 =A(SAVETST) 0B154 13593+T235TEND EQU * 13594 * 13595 * Test 236 -- XC m,m (100c) -------------------------------- 13596 * 13597 TSIMBEG T236,2500,20,1,C'XC m,m (100c)' 13598+* 002EE4 13599+TDSCDAT CSECT 002EE8 13600+ DS 0D 13601+* 002EE8 0000B158 13602+T236TDSC DC A(T236) // TENTRY 002EEC 0000017C 13603+ DC A(T236TEND-T236) // TLENGTH 002EF0 000009C4 13604+ DC F'2500' // TLRCNT 002EF4 00000014 13605+ DC F'20' // TIGCNT 002EF8 00000001 13606+ DC F'1' // TLTYPE PAGE 250 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0014A6 13607+TEXT CSECT 0014A6 E3F2F3F6 13608+SPTR1096 DC C'T236' 002EFC 13609+TDSCDAT CSECT 002EFC 13610+ DS 0F 002EFC 040014A6 13611+ DC AL1(L'SPTR1096),AL3(SPTR1096) 0014AA 13612+TEXT CSECT 0014AA E7C340946B94404D 13613+SPTR1097 DC C'XC m,m (100c)' 002F00 13614+TDSCDAT CSECT 002F00 13615+ DS 0F 002F00 0D0014AA 13616+ DC AL1(L'SPTR1097),AL3(SPTR1097) 13617+* 004B08 13618+TDSCTBL CSECT 04B08 13619+T236TPTR EQU * 004B08 00002EE8 13620+ DC A(T236TDSC) enabled test 13621+* 00B154 13622+TCODE CSECT 00B158 13623+ DS 0D ensure double word alignment for test 00B158 13624+T236 DS 0H 01650000 00B158 90EC D00C 0000C 13625+ STM 14,12,12(13) SAVE REGISTERS 02950000 00B15C 18CF 13626+ LR R12,R15 base register := entry address 0B158 13627+ USING T236,R12 declare code base register 00B15E 41B0 C026 0B17E 13628+ LA R11,T236L load loop target to R11 00B162 58F0 C178 0B2D0 13629+ L R15,=A(SAVETST) R15 := current save area 00B166 50DF 0004 00004 13630+ ST R13,4(R15) set back pointer in current save area 00B16A 182D 13631+ LR R2,R13 remember callers save area 00B16C 18DF 13632+ LR R13,R15 setup current save area 00B16E 50D2 0008 00008 13633+ ST R13,8(R2) set forw pointer in callers save area 00000 13634+ USING TDSC,R1 declare TDSC base register 00B172 58F0 1008 00008 13635+ L R15,TLRCNT load local repeat count to R15 13636+* 13637 * 00B176 4120 C0AE 0B206 13638 LA R2,T236V1 00B17A 4130 C112 0B26A 13639 LA R3,T236V2 13640 T236L REPINS XC,(0(100,R2),0(R3)) repeat: XC 0(100,R2),0(R3) 13641+* 13642+* build from sublist &ALIST a comma separated string &ARGS 13643+* 13644+* 13645+* 13646+* 13647+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13648+* this allows to transfer the repeat count from last TDSCGEN call 13649+* 13650+* 0B17E 13651+T236L EQU * 13652+* 13653+* write a comment indicating what REPINS does (in case NOGEN in effect) 13654+* 13655+*,// REPINS: do 20 times: 13656+* 13657+* MNOTE requires that ' is doubled for expanded variables 13658+* thus build &MASTR as a copy of '&ARGS with ' doubled 13659+* 13660+* 13661+*,// XC 0(100,R2),0(R3) PAGE 251 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 13662+* 13663+* finally generate code: &ICNT copies of &CODE &ARGS 13664+* 00B17E D763 2000 3000 00000 00000 13665+ XC 0(100,R2),0(R3) 00B184 D763 2000 3000 00000 00000 13666+ XC 0(100,R2),0(R3) 00B18A D763 2000 3000 00000 00000 13667+ XC 0(100,R2),0(R3) 00B190 D763 2000 3000 00000 00000 13668+ XC 0(100,R2),0(R3) 00B196 D763 2000 3000 00000 00000 13669+ XC 0(100,R2),0(R3) 00B19C D763 2000 3000 00000 00000 13670+ XC 0(100,R2),0(R3) 00B1A2 D763 2000 3000 00000 00000 13671+ XC 0(100,R2),0(R3) 00B1A8 D763 2000 3000 00000 00000 13672+ XC 0(100,R2),0(R3) 00B1AE D763 2000 3000 00000 00000 13673+ XC 0(100,R2),0(R3) 00B1B4 D763 2000 3000 00000 00000 13674+ XC 0(100,R2),0(R3) 00B1BA D763 2000 3000 00000 00000 13675+ XC 0(100,R2),0(R3) 00B1C0 D763 2000 3000 00000 00000 13676+ XC 0(100,R2),0(R3) 00B1C6 D763 2000 3000 00000 00000 13677+ XC 0(100,R2),0(R3) 00B1CC D763 2000 3000 00000 00000 13678+ XC 0(100,R2),0(R3) 00B1D2 D763 2000 3000 00000 00000 13679+ XC 0(100,R2),0(R3) 00B1D8 D763 2000 3000 00000 00000 13680+ XC 0(100,R2),0(R3) 00B1DE D763 2000 3000 00000 00000 13681+ XC 0(100,R2),0(R3) 00B1E4 D763 2000 3000 00000 00000 13682+ XC 0(100,R2),0(R3) 00B1EA D763 2000 3000 00000 00000 13683+ XC 0(100,R2),0(R3) 00B1F0 D763 2000 3000 00000 00000 13684+ XC 0(100,R2),0(R3) 13685+* 00B1F6 06FB 13686 BCTR R15,R11 13687 TSIMRET 00B1F8 58F0 C178 0B2D0 13688+ L R15,=A(SAVETST) R15 := current save area 00B1FC 58DF 0004 00004 13689+ L R13,4(R15) get old save area back 00B200 98EC D00C 0000C 13690+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00B204 07FE 13691+ BR 14 RETURN 02000000 13692 * 00B206 1111111111111111 13693 T236V1 DC 100X'11' 00B26A FFFFFFFFFFFFFFFF 13694 T236V2 DC 100X'FF' 13695 TSIMEND 00B2D0 13696+ LTORG 00B2D0 00000458 13697 =A(SAVETST) 0B2D4 13698+T236TEND EQU * 13699 * 13700 * Test 237 -- XC m,m (250c) -------------------------------- 13701 * 13702 TSIMBEG T237,1000,20,1,C'XC m,m (250c)' 13703+* 002F04 13704+TDSCDAT CSECT 002F08 13705+ DS 0D 13706+* 002F08 0000B2D8 13707+T237TDSC DC A(T237) // TENTRY 002F0C 000002AC 13708+ DC A(T237TEND-T237) // TLENGTH 002F10 000003E8 13709+ DC F'1000' // TLRCNT 002F14 00000014 13710+ DC F'20' // TIGCNT 002F18 00000001 13711+ DC F'1' // TLTYPE 0014B7 13712+TEXT CSECT 0014B7 E3F2F3F7 13713+SPTR1108 DC C'T237' 002F1C 13714+TDSCDAT CSECT 002F1C 13715+ DS 0F 002F1C 040014B7 13716+ DC AL1(L'SPTR1108),AL3(SPTR1108) PAGE 252 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0014BB 13717+TEXT CSECT 0014BB E7C340946B94404D 13718+SPTR1109 DC C'XC m,m (250c)' 002F20 13719+TDSCDAT CSECT 002F20 13720+ DS 0F 002F20 0D0014BB 13721+ DC AL1(L'SPTR1109),AL3(SPTR1109) 13722+* 004B0C 13723+TDSCTBL CSECT 04B0C 13724+T237TPTR EQU * 004B0C 00002F08 13725+ DC A(T237TDSC) enabled test 13726+* 00B2D4 13727+TCODE CSECT 00B2D8 13728+ DS 0D ensure double word alignment for test 00B2D8 13729+T237 DS 0H 01650000 00B2D8 90EC D00C 0000C 13730+ STM 14,12,12(13) SAVE REGISTERS 02950000 00B2DC 18CF 13731+ LR R12,R15 base register := entry address 0B2D8 13732+ USING T237,R12 declare code base register 00B2DE 41B0 C026 0B2FE 13733+ LA R11,T237L load loop target to R11 00B2E2 58F0 C2A8 0B580 13734+ L R15,=A(SAVETST) R15 := current save area 00B2E6 50DF 0004 00004 13735+ ST R13,4(R15) set back pointer in current save area 00B2EA 182D 13736+ LR R2,R13 remember callers save area 00B2EC 18DF 13737+ LR R13,R15 setup current save area 00B2EE 50D2 0008 00008 13738+ ST R13,8(R2) set forw pointer in callers save area 00000 13739+ USING TDSC,R1 declare TDSC base register 00B2F2 58F0 1008 00008 13740+ L R15,TLRCNT load local repeat count to R15 13741+* 13742 * 00B2F6 4120 C0AE 0B386 13743 LA R2,T237V1 00B2FA 4130 C1A8 0B480 13744 LA R3,T237V2 13745 T237L REPINS XC,(0(250,R2),0(R3)) repeat: XC 0(250,R2),0(R3) 13746+* 13747+* build from sublist &ALIST a comma separated string &ARGS 13748+* 13749+* 13750+* 13751+* 13752+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13753+* this allows to transfer the repeat count from last TDSCGEN call 13754+* 13755+* 0B2FE 13756+T237L EQU * 13757+* 13758+* write a comment indicating what REPINS does (in case NOGEN in effect) 13759+* 13760+*,// REPINS: do 20 times: 13761+* 13762+* MNOTE requires that ' is doubled for expanded variables 13763+* thus build &MASTR as a copy of '&ARGS with ' doubled 13764+* 13765+* 13766+*,// XC 0(250,R2),0(R3) 13767+* 13768+* finally generate code: &ICNT copies of &CODE &ARGS 13769+* 00B2FE D7F9 2000 3000 00000 00000 13770+ XC 0(250,R2),0(R3) 00B304 D7F9 2000 3000 00000 00000 13771+ XC 0(250,R2),0(R3) PAGE 253 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00B30A D7F9 2000 3000 00000 00000 13772+ XC 0(250,R2),0(R3) 00B310 D7F9 2000 3000 00000 00000 13773+ XC 0(250,R2),0(R3) 00B316 D7F9 2000 3000 00000 00000 13774+ XC 0(250,R2),0(R3) 00B31C D7F9 2000 3000 00000 00000 13775+ XC 0(250,R2),0(R3) 00B322 D7F9 2000 3000 00000 00000 13776+ XC 0(250,R2),0(R3) 00B328 D7F9 2000 3000 00000 00000 13777+ XC 0(250,R2),0(R3) 00B32E D7F9 2000 3000 00000 00000 13778+ XC 0(250,R2),0(R3) 00B334 D7F9 2000 3000 00000 00000 13779+ XC 0(250,R2),0(R3) 00B33A D7F9 2000 3000 00000 00000 13780+ XC 0(250,R2),0(R3) 00B340 D7F9 2000 3000 00000 00000 13781+ XC 0(250,R2),0(R3) 00B346 D7F9 2000 3000 00000 00000 13782+ XC 0(250,R2),0(R3) 00B34C D7F9 2000 3000 00000 00000 13783+ XC 0(250,R2),0(R3) 00B352 D7F9 2000 3000 00000 00000 13784+ XC 0(250,R2),0(R3) 00B358 D7F9 2000 3000 00000 00000 13785+ XC 0(250,R2),0(R3) 00B35E D7F9 2000 3000 00000 00000 13786+ XC 0(250,R2),0(R3) 00B364 D7F9 2000 3000 00000 00000 13787+ XC 0(250,R2),0(R3) 00B36A D7F9 2000 3000 00000 00000 13788+ XC 0(250,R2),0(R3) 00B370 D7F9 2000 3000 00000 00000 13789+ XC 0(250,R2),0(R3) 13790+* 00B376 06FB 13791 BCTR R15,R11 13792 TSIMRET 00B378 58F0 C2A8 0B580 13793+ L R15,=A(SAVETST) R15 := current save area 00B37C 58DF 0004 00004 13794+ L R13,4(R15) get old save area back 00B380 98EC D00C 0000C 13795+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00B384 07FE 13796+ BR 14 RETURN 02000000 13797 * 00B386 1111111111111111 13798 T237V1 DC 250X'11' 00B480 FFFFFFFFFFFFFFFF 13799 T237V2 DC 250X'FF' 13800 TSIMEND 00B580 13801+ LTORG 00B580 00000458 13802 =A(SAVETST) 0B584 13803+T237TEND EQU * 13804 * 13805 * Test 238 -- NR R,R --------------------------------------- 13806 * 13807 TSIMBEG T238,13000,100,1,C'NR R,R' 13808+* 002F24 13809+TDSCDAT CSECT 002F28 13810+ DS 0D 13811+* 002F28 0000B588 13812+T238TDSC DC A(T238) // TENTRY 002F2C 00000104 13813+ DC A(T238TEND-T238) // TLENGTH 002F30 000032C8 13814+ DC F'13000' // TLRCNT 002F34 00000064 13815+ DC F'100' // TIGCNT 002F38 00000001 13816+ DC F'1' // TLTYPE 0014C8 13817+TEXT CSECT 0014C8 E3F2F3F8 13818+SPTR1120 DC C'T238' 002F3C 13819+TDSCDAT CSECT 002F3C 13820+ DS 0F 002F3C 040014C8 13821+ DC AL1(L'SPTR1120),AL3(SPTR1120) 0014CC 13822+TEXT CSECT 0014CC D5D940D96BD9 13823+SPTR1121 DC C'NR R,R' 002F40 13824+TDSCDAT CSECT 002F40 13825+ DS 0F 002F40 060014CC 13826+ DC AL1(L'SPTR1121),AL3(SPTR1121) PAGE 254 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 13827+* 004B10 13828+TDSCTBL CSECT 04B10 13829+T238TPTR EQU * 004B10 00002F28 13830+ DC A(T238TDSC) enabled test 13831+* 00B584 13832+TCODE CSECT 00B588 13833+ DS 0D ensure double word alignment for test 00B588 13834+T238 DS 0H 01650000 00B588 90EC D00C 0000C 13835+ STM 14,12,12(13) SAVE REGISTERS 02950000 00B58C 18CF 13836+ LR R12,R15 base register := entry address 0B588 13837+ USING T238,R12 declare code base register 00B58E 41B0 C024 0B5AC 13838+ LA R11,T238L load loop target to R11 00B592 58F0 C100 0B688 13839+ L R15,=A(SAVETST) R15 := current save area 00B596 50DF 0004 00004 13840+ ST R13,4(R15) set back pointer in current save area 00B59A 182D 13841+ LR R2,R13 remember callers save area 00B59C 18DF 13842+ LR R13,R15 setup current save area 00B59E 50D2 0008 00008 13843+ ST R13,8(R2) set forw pointer in callers save area 00000 13844+ USING TDSC,R1 declare TDSC base register 00B5A2 58F0 1008 00008 13845+ L R15,TLRCNT load local repeat count to R15 13846+* 13847 * 00B5A6 1722 13848 XR R2,R2 00B5A8 4130 0001 00001 13849 LA R3,1 13850 T238L REPINS NR,(R2,R3) repeat: NR R2,R3 13851+* 13852+* build from sublist &ALIST a comma separated string &ARGS 13853+* 13854+* 13855+* 13856+* 13857+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 13858+* this allows to transfer the repeat count from last TDSCGEN call 13859+* 13860+* 0B5AC 13861+T238L EQU * 13862+* 13863+* write a comment indicating what REPINS does (in case NOGEN in effect) 13864+* 13865+*,// REPINS: do 100 times: 13866+* 13867+* MNOTE requires that ' is doubled for expanded variables 13868+* thus build &MASTR as a copy of '&ARGS with ' doubled 13869+* 13870+* 13871+*,// NR R2,R3 13872+* 13873+* finally generate code: &ICNT copies of &CODE &ARGS 13874+* 00B5AC 1423 13875+ NR R2,R3 00B5AE 1423 13876+ NR R2,R3 00B5B0 1423 13877+ NR R2,R3 00B5B2 1423 13878+ NR R2,R3 00B5B4 1423 13879+ NR R2,R3 00B5B6 1423 13880+ NR R2,R3 00B5B8 1423 13881+ NR R2,R3 PAGE 255 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00B5BA 1423 13882+ NR R2,R3 00B5BC 1423 13883+ NR R2,R3 00B5BE 1423 13884+ NR R2,R3 00B5C0 1423 13885+ NR R2,R3 00B5C2 1423 13886+ NR R2,R3 00B5C4 1423 13887+ NR R2,R3 00B5C6 1423 13888+ NR R2,R3 00B5C8 1423 13889+ NR R2,R3 00B5CA 1423 13890+ NR R2,R3 00B5CC 1423 13891+ NR R2,R3 00B5CE 1423 13892+ NR R2,R3 00B5D0 1423 13893+ NR R2,R3 00B5D2 1423 13894+ NR R2,R3 00B5D4 1423 13895+ NR R2,R3 00B5D6 1423 13896+ NR R2,R3 00B5D8 1423 13897+ NR R2,R3 00B5DA 1423 13898+ NR R2,R3 00B5DC 1423 13899+ NR R2,R3 00B5DE 1423 13900+ NR R2,R3 00B5E0 1423 13901+ NR R2,R3 00B5E2 1423 13902+ NR R2,R3 00B5E4 1423 13903+ NR R2,R3 00B5E6 1423 13904+ NR R2,R3 00B5E8 1423 13905+ NR R2,R3 00B5EA 1423 13906+ NR R2,R3 00B5EC 1423 13907+ NR R2,R3 00B5EE 1423 13908+ NR R2,R3 00B5F0 1423 13909+ NR R2,R3 00B5F2 1423 13910+ NR R2,R3 00B5F4 1423 13911+ NR R2,R3 00B5F6 1423 13912+ NR R2,R3 00B5F8 1423 13913+ NR R2,R3 00B5FA 1423 13914+ NR R2,R3 00B5FC 1423 13915+ NR R2,R3 00B5FE 1423 13916+ NR R2,R3 00B600 1423 13917+ NR R2,R3 00B602 1423 13918+ NR R2,R3 00B604 1423 13919+ NR R2,R3 00B606 1423 13920+ NR R2,R3 00B608 1423 13921+ NR R2,R3 00B60A 1423 13922+ NR R2,R3 00B60C 1423 13923+ NR R2,R3 00B60E 1423 13924+ NR R2,R3 00B610 1423 13925+ NR R2,R3 00B612 1423 13926+ NR R2,R3 00B614 1423 13927+ NR R2,R3 00B616 1423 13928+ NR R2,R3 00B618 1423 13929+ NR R2,R3 00B61A 1423 13930+ NR R2,R3 00B61C 1423 13931+ NR R2,R3 00B61E 1423 13932+ NR R2,R3 00B620 1423 13933+ NR R2,R3 00B622 1423 13934+ NR R2,R3 00B624 1423 13935+ NR R2,R3 00B626 1423 13936+ NR R2,R3 PAGE 256 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00B628 1423 13937+ NR R2,R3 00B62A 1423 13938+ NR R2,R3 00B62C 1423 13939+ NR R2,R3 00B62E 1423 13940+ NR R2,R3 00B630 1423 13941+ NR R2,R3 00B632 1423 13942+ NR R2,R3 00B634 1423 13943+ NR R2,R3 00B636 1423 13944+ NR R2,R3 00B638 1423 13945+ NR R2,R3 00B63A 1423 13946+ NR R2,R3 00B63C 1423 13947+ NR R2,R3 00B63E 1423 13948+ NR R2,R3 00B640 1423 13949+ NR R2,R3 00B642 1423 13950+ NR R2,R3 00B644 1423 13951+ NR R2,R3 00B646 1423 13952+ NR R2,R3 00B648 1423 13953+ NR R2,R3 00B64A 1423 13954+ NR R2,R3 00B64C 1423 13955+ NR R2,R3 00B64E 1423 13956+ NR R2,R3 00B650 1423 13957+ NR R2,R3 00B652 1423 13958+ NR R2,R3 00B654 1423 13959+ NR R2,R3 00B656 1423 13960+ NR R2,R3 00B658 1423 13961+ NR R2,R3 00B65A 1423 13962+ NR R2,R3 00B65C 1423 13963+ NR R2,R3 00B65E 1423 13964+ NR R2,R3 00B660 1423 13965+ NR R2,R3 00B662 1423 13966+ NR R2,R3 00B664 1423 13967+ NR R2,R3 00B666 1423 13968+ NR R2,R3 00B668 1423 13969+ NR R2,R3 00B66A 1423 13970+ NR R2,R3 00B66C 1423 13971+ NR R2,R3 00B66E 1423 13972+ NR R2,R3 00B670 1423 13973+ NR R2,R3 00B672 1423 13974+ NR R2,R3 13975+* 00B674 06FB 13976 BCTR R15,R11 13977 TSIMRET 00B676 58F0 C100 0B688 13978+ L R15,=A(SAVETST) R15 := current save area 00B67A 58DF 0004 00004 13979+ L R13,4(R15) get old save area back 00B67E 98EC D00C 0000C 13980+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00B682 07FE 13981+ BR 14 RETURN 02000000 13982 TSIMEND 00B688 13983+ LTORG 00B688 00000458 13984 =A(SAVETST) 0B68C 13985+T238TEND EQU * 13986 * 13987 * Test 239 -- OR R,R --------------------------------------- 13988 * 13989 TSIMBEG T239,14000,100,1,C'OR R,R' 13990+* 002F44 13991+TDSCDAT CSECT PAGE 257 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002F48 13992+ DS 0D 13993+* 002F48 0000B690 13994+T239TDSC DC A(T239) // TENTRY 002F4C 00000104 13995+ DC A(T239TEND-T239) // TLENGTH 002F50 000036B0 13996+ DC F'14000' // TLRCNT 002F54 00000064 13997+ DC F'100' // TIGCNT 002F58 00000001 13998+ DC F'1' // TLTYPE 0014D2 13999+TEXT CSECT 0014D2 E3F2F3F9 14000+SPTR1132 DC C'T239' 002F5C 14001+TDSCDAT CSECT 002F5C 14002+ DS 0F 002F5C 040014D2 14003+ DC AL1(L'SPTR1132),AL3(SPTR1132) 0014D6 14004+TEXT CSECT 0014D6 D6D940D96BD9 14005+SPTR1133 DC C'OR R,R' 002F60 14006+TDSCDAT CSECT 002F60 14007+ DS 0F 002F60 060014D6 14008+ DC AL1(L'SPTR1133),AL3(SPTR1133) 14009+* 004B14 14010+TDSCTBL CSECT 04B14 14011+T239TPTR EQU * 004B14 00002F48 14012+ DC A(T239TDSC) enabled test 14013+* 00B68C 14014+TCODE CSECT 00B690 14015+ DS 0D ensure double word alignment for test 00B690 14016+T239 DS 0H 01650000 00B690 90EC D00C 0000C 14017+ STM 14,12,12(13) SAVE REGISTERS 02950000 00B694 18CF 14018+ LR R12,R15 base register := entry address 0B690 14019+ USING T239,R12 declare code base register 00B696 41B0 C024 0B6B4 14020+ LA R11,T239L load loop target to R11 00B69A 58F0 C100 0B790 14021+ L R15,=A(SAVETST) R15 := current save area 00B69E 50DF 0004 00004 14022+ ST R13,4(R15) set back pointer in current save area 00B6A2 182D 14023+ LR R2,R13 remember callers save area 00B6A4 18DF 14024+ LR R13,R15 setup current save area 00B6A6 50D2 0008 00008 14025+ ST R13,8(R2) set forw pointer in callers save area 00000 14026+ USING TDSC,R1 declare TDSC base register 00B6AA 58F0 1008 00008 14027+ L R15,TLRCNT load local repeat count to R15 14028+* 14029 * 00B6AE 1722 14030 XR R2,R2 00B6B0 4130 0001 00001 14031 LA R3,1 14032 T239L REPINS OR,(R2,R3) repeat: OR R2,R3 14033+* 14034+* build from sublist &ALIST a comma separated string &ARGS 14035+* 14036+* 14037+* 14038+* 14039+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 14040+* this allows to transfer the repeat count from last TDSCGEN call 14041+* 14042+* 0B6B4 14043+T239L EQU * 14044+* 14045+* write a comment indicating what REPINS does (in case NOGEN in effect) 14046+* PAGE 258 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 14047+*,// REPINS: do 100 times: 14048+* 14049+* MNOTE requires that ' is doubled for expanded variables 14050+* thus build &MASTR as a copy of '&ARGS with ' doubled 14051+* 14052+* 14053+*,// OR R2,R3 14054+* 14055+* finally generate code: &ICNT copies of &CODE &ARGS 14056+* 00B6B4 1623 14057+ OR R2,R3 00B6B6 1623 14058+ OR R2,R3 00B6B8 1623 14059+ OR R2,R3 00B6BA 1623 14060+ OR R2,R3 00B6BC 1623 14061+ OR R2,R3 00B6BE 1623 14062+ OR R2,R3 00B6C0 1623 14063+ OR R2,R3 00B6C2 1623 14064+ OR R2,R3 00B6C4 1623 14065+ OR R2,R3 00B6C6 1623 14066+ OR R2,R3 00B6C8 1623 14067+ OR R2,R3 00B6CA 1623 14068+ OR R2,R3 00B6CC 1623 14069+ OR R2,R3 00B6CE 1623 14070+ OR R2,R3 00B6D0 1623 14071+ OR R2,R3 00B6D2 1623 14072+ OR R2,R3 00B6D4 1623 14073+ OR R2,R3 00B6D6 1623 14074+ OR R2,R3 00B6D8 1623 14075+ OR R2,R3 00B6DA 1623 14076+ OR R2,R3 00B6DC 1623 14077+ OR R2,R3 00B6DE 1623 14078+ OR R2,R3 00B6E0 1623 14079+ OR R2,R3 00B6E2 1623 14080+ OR R2,R3 00B6E4 1623 14081+ OR R2,R3 00B6E6 1623 14082+ OR R2,R3 00B6E8 1623 14083+ OR R2,R3 00B6EA 1623 14084+ OR R2,R3 00B6EC 1623 14085+ OR R2,R3 00B6EE 1623 14086+ OR R2,R3 00B6F0 1623 14087+ OR R2,R3 00B6F2 1623 14088+ OR R2,R3 00B6F4 1623 14089+ OR R2,R3 00B6F6 1623 14090+ OR R2,R3 00B6F8 1623 14091+ OR R2,R3 00B6FA 1623 14092+ OR R2,R3 00B6FC 1623 14093+ OR R2,R3 00B6FE 1623 14094+ OR R2,R3 00B700 1623 14095+ OR R2,R3 00B702 1623 14096+ OR R2,R3 00B704 1623 14097+ OR R2,R3 00B706 1623 14098+ OR R2,R3 00B708 1623 14099+ OR R2,R3 00B70A 1623 14100+ OR R2,R3 00B70C 1623 14101+ OR R2,R3 PAGE 259 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00B70E 1623 14102+ OR R2,R3 00B710 1623 14103+ OR R2,R3 00B712 1623 14104+ OR R2,R3 00B714 1623 14105+ OR R2,R3 00B716 1623 14106+ OR R2,R3 00B718 1623 14107+ OR R2,R3 00B71A 1623 14108+ OR R2,R3 00B71C 1623 14109+ OR R2,R3 00B71E 1623 14110+ OR R2,R3 00B720 1623 14111+ OR R2,R3 00B722 1623 14112+ OR R2,R3 00B724 1623 14113+ OR R2,R3 00B726 1623 14114+ OR R2,R3 00B728 1623 14115+ OR R2,R3 00B72A 1623 14116+ OR R2,R3 00B72C 1623 14117+ OR R2,R3 00B72E 1623 14118+ OR R2,R3 00B730 1623 14119+ OR R2,R3 00B732 1623 14120+ OR R2,R3 00B734 1623 14121+ OR R2,R3 00B736 1623 14122+ OR R2,R3 00B738 1623 14123+ OR R2,R3 00B73A 1623 14124+ OR R2,R3 00B73C 1623 14125+ OR R2,R3 00B73E 1623 14126+ OR R2,R3 00B740 1623 14127+ OR R2,R3 00B742 1623 14128+ OR R2,R3 00B744 1623 14129+ OR R2,R3 00B746 1623 14130+ OR R2,R3 00B748 1623 14131+ OR R2,R3 00B74A 1623 14132+ OR R2,R3 00B74C 1623 14133+ OR R2,R3 00B74E 1623 14134+ OR R2,R3 00B750 1623 14135+ OR R2,R3 00B752 1623 14136+ OR R2,R3 00B754 1623 14137+ OR R2,R3 00B756 1623 14138+ OR R2,R3 00B758 1623 14139+ OR R2,R3 00B75A 1623 14140+ OR R2,R3 00B75C 1623 14141+ OR R2,R3 00B75E 1623 14142+ OR R2,R3 00B760 1623 14143+ OR R2,R3 00B762 1623 14144+ OR R2,R3 00B764 1623 14145+ OR R2,R3 00B766 1623 14146+ OR R2,R3 00B768 1623 14147+ OR R2,R3 00B76A 1623 14148+ OR R2,R3 00B76C 1623 14149+ OR R2,R3 00B76E 1623 14150+ OR R2,R3 00B770 1623 14151+ OR R2,R3 00B772 1623 14152+ OR R2,R3 00B774 1623 14153+ OR R2,R3 00B776 1623 14154+ OR R2,R3 00B778 1623 14155+ OR R2,R3 00B77A 1623 14156+ OR R2,R3 PAGE 260 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 14157+* 00B77C 06FB 14158 BCTR R15,R11 14159 TSIMRET 00B77E 58F0 C100 0B790 14160+ L R15,=A(SAVETST) R15 := current save area 00B782 58DF 0004 00004 14161+ L R13,4(R15) get old save area back 00B786 98EC D00C 0000C 14162+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00B78A 07FE 14163+ BR 14 RETURN 02000000 14164 TSIMEND 00B790 14165+ LTORG 00B790 00000458 14166 =A(SAVETST) 0B794 14167+T239TEND EQU * 14168 * 14169 * Test 24x -- logical shifts =============================== 14170 * 14171 * Test 240 -- SLL R,1 -------------------------------------- 14172 * 14173 TSIMBEG T240,35000,30,4,C'SLL R,1' 14174+* 002F64 14175+TDSCDAT CSECT 002F68 14176+ DS 0D 14177+* 002F68 0000B798 14178+T240TDSC DC A(T240) // TENTRY 002F6C 000000B4 14179+ DC A(T240TEND-T240) // TLENGTH 002F70 000088B8 14180+ DC F'35000' // TLRCNT 002F74 0000001E 14181+ DC F'30' // TIGCNT 002F78 00000004 14182+ DC F'4' // TLTYPE 0014DC 14183+TEXT CSECT 0014DC E3F2F4F0 14184+SPTR1144 DC C'T240' 002F7C 14185+TDSCDAT CSECT 002F7C 14186+ DS 0F 002F7C 040014DC 14187+ DC AL1(L'SPTR1144),AL3(SPTR1144) 0014E0 14188+TEXT CSECT 0014E0 E2D3D340D96BF1 14189+SPTR1145 DC C'SLL R,1' 002F80 14190+TDSCDAT CSECT 002F80 14191+ DS 0F 002F80 070014E0 14192+ DC AL1(L'SPTR1145),AL3(SPTR1145) 14193+* 004B18 14194+TDSCTBL CSECT 04B18 14195+T240TPTR EQU * 004B18 00002F68 14196+ DC A(T240TDSC) enabled test 14197+* 00B794 14198+TCODE CSECT 00B798 14199+ DS 0D ensure double word alignment for test 00B798 14200+T240 DS 0H 01650000 00B798 90EC D00C 0000C 14201+ STM 14,12,12(13) SAVE REGISTERS 02950000 00B79C 18CF 14202+ LR R12,R15 base register := entry address 0B798 14203+ USING T240,R12 declare code base register 00B79E 41B0 C01E 0B7B6 14204+ LA R11,T240L load loop target to R11 00B7A2 58F0 C0B0 0B848 14205+ L R15,=A(SAVETST) R15 := current save area 00B7A6 50DF 0004 00004 14206+ ST R13,4(R15) set back pointer in current save area 00B7AA 182D 14207+ LR R2,R13 remember callers save area 00B7AC 18DF 14208+ LR R13,R15 setup current save area 00B7AE 50D2 0008 00008 14209+ ST R13,8(R2) set forw pointer in callers save area 00000 14210+ USING TDSC,R1 declare TDSC base register 00B7B2 58F0 1008 00008 14211+ L R15,TLRCNT load local repeat count to R15 PAGE 261 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 14212+* 14213 * 00B7B6 4120 0001 00001 14214 T240L LA R2,1 14215 REPINS SLL,(R2,1) repeat: SLL R2,1 14216+* 14217+* build from sublist &ALIST a comma separated string &ARGS 14218+* 14219+* 14220+* 14221+* 14222+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 14223+* this allows to transfer the repeat count from last TDSCGEN call 14224+* 14225+* 14226+* 14227+* write a comment indicating what REPINS does (in case NOGEN in effect) 14228+* 14229+*,// REPINS: do 30 times: 14230+* 14231+* MNOTE requires that ' is doubled for expanded variables 14232+* thus build &MASTR as a copy of '&ARGS with ' doubled 14233+* 14234+* 14235+*,// SLL R2,1 14236+* 14237+* finally generate code: &ICNT copies of &CODE &ARGS 14238+* 00B7BA 8920 0001 00001 14239+ SLL R2,1 00B7BE 8920 0001 00001 14240+ SLL R2,1 00B7C2 8920 0001 00001 14241+ SLL R2,1 00B7C6 8920 0001 00001 14242+ SLL R2,1 00B7CA 8920 0001 00001 14243+ SLL R2,1 00B7CE 8920 0001 00001 14244+ SLL R2,1 00B7D2 8920 0001 00001 14245+ SLL R2,1 00B7D6 8920 0001 00001 14246+ SLL R2,1 00B7DA 8920 0001 00001 14247+ SLL R2,1 00B7DE 8920 0001 00001 14248+ SLL R2,1 00B7E2 8920 0001 00001 14249+ SLL R2,1 00B7E6 8920 0001 00001 14250+ SLL R2,1 00B7EA 8920 0001 00001 14251+ SLL R2,1 00B7EE 8920 0001 00001 14252+ SLL R2,1 00B7F2 8920 0001 00001 14253+ SLL R2,1 00B7F6 8920 0001 00001 14254+ SLL R2,1 00B7FA 8920 0001 00001 14255+ SLL R2,1 00B7FE 8920 0001 00001 14256+ SLL R2,1 00B802 8920 0001 00001 14257+ SLL R2,1 00B806 8920 0001 00001 14258+ SLL R2,1 00B80A 8920 0001 00001 14259+ SLL R2,1 00B80E 8920 0001 00001 14260+ SLL R2,1 00B812 8920 0001 00001 14261+ SLL R2,1 00B816 8920 0001 00001 14262+ SLL R2,1 00B81A 8920 0001 00001 14263+ SLL R2,1 00B81E 8920 0001 00001 14264+ SLL R2,1 00B822 8920 0001 00001 14265+ SLL R2,1 00B826 8920 0001 00001 14266+ SLL R2,1 PAGE 262 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00B82A 8920 0001 00001 14267+ SLL R2,1 00B82E 8920 0001 00001 14268+ SLL R2,1 14269+* 00B832 06FB 14270 BCTR R15,R11 14271 TSIMRET 00B834 58F0 C0B0 0B848 14272+ L R15,=A(SAVETST) R15 := current save area 00B838 58DF 0004 00004 14273+ L R13,4(R15) get old save area back 00B83C 98EC D00C 0000C 14274+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00B840 07FE 14275+ BR 14 RETURN 02000000 14276 TSIMEND 00B848 14277+ LTORG 00B848 00000458 14278 =A(SAVETST) 0B84C 14279+T240TEND EQU * 14280 * 14281 * Test 241 -- SLDL R,1 ------------------------------------- 14282 * 14283 TSIMBEG T241,13000,60,5,C'SLDL R,1' 14284+* 002F84 14285+TDSCDAT CSECT 002F88 14286+ DS 0D 14287+* 002F88 0000B850 14288+T241TDSC DC A(T241) // TENTRY 002F8C 0000012C 14289+ DC A(T241TEND-T241) // TLENGTH 002F90 000032C8 14290+ DC F'13000' // TLRCNT 002F94 0000003C 14291+ DC F'60' // TIGCNT 002F98 00000005 14292+ DC F'5' // TLTYPE 0014E7 14293+TEXT CSECT 0014E7 E3F2F4F1 14294+SPTR1156 DC C'T241' 002F9C 14295+TDSCDAT CSECT 002F9C 14296+ DS 0F 002F9C 040014E7 14297+ DC AL1(L'SPTR1156),AL3(SPTR1156) 0014EB 14298+TEXT CSECT 0014EB E2D3C4D340D96BF1 14299+SPTR1157 DC C'SLDL R,1' 002FA0 14300+TDSCDAT CSECT 002FA0 14301+ DS 0F 002FA0 080014EB 14302+ DC AL1(L'SPTR1157),AL3(SPTR1157) 14303+* 004B1C 14304+TDSCTBL CSECT 04B1C 14305+T241TPTR EQU * 004B1C 00002F88 14306+ DC A(T241TDSC) enabled test 14307+* 00B84C 14308+TCODE CSECT 00B850 14309+ DS 0D ensure double word alignment for test 00B850 14310+T241 DS 0H 01650000 00B850 90EC D00C 0000C 14311+ STM 14,12,12(13) SAVE REGISTERS 02950000 00B854 18CF 14312+ LR R12,R15 base register := entry address 0B850 14313+ USING T241,R12 declare code base register 00B856 41B0 C01E 0B86E 14314+ LA R11,T241L load loop target to R11 00B85A 58F0 C128 0B978 14315+ L R15,=A(SAVETST) R15 := current save area 00B85E 50DF 0004 00004 14316+ ST R13,4(R15) set back pointer in current save area 00B862 182D 14317+ LR R2,R13 remember callers save area 00B864 18DF 14318+ LR R13,R15 setup current save area 00B866 50D2 0008 00008 14319+ ST R13,8(R2) set forw pointer in callers save area 00000 14320+ USING TDSC,R1 declare TDSC base register 00B86A 58F0 1008 00008 14321+ L R15,TLRCNT load local repeat count to R15 PAGE 263 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 14322+* 14323 * 00B86E 1722 14324 T241L XR R2,R2 00B870 4130 0001 00001 14325 LA R3,1 14326 REPINS SLDL,(R2,1) repeat: SLDL R2,1 14327+* 14328+* build from sublist &ALIST a comma separated string &ARGS 14329+* 14330+* 14331+* 14332+* 14333+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 14334+* this allows to transfer the repeat count from last TDSCGEN call 14335+* 14336+* 14337+* 14338+* write a comment indicating what REPINS does (in case NOGEN in effect) 14339+* 14340+*,// REPINS: do 60 times: 14341+* 14342+* MNOTE requires that ' is doubled for expanded variables 14343+* thus build &MASTR as a copy of '&ARGS with ' doubled 14344+* 14345+* 14346+*,// SLDL R2,1 14347+* 14348+* finally generate code: &ICNT copies of &CODE &ARGS 14349+* 00B874 8D20 0001 00001 14350+ SLDL R2,1 00B878 8D20 0001 00001 14351+ SLDL R2,1 00B87C 8D20 0001 00001 14352+ SLDL R2,1 00B880 8D20 0001 00001 14353+ SLDL R2,1 00B884 8D20 0001 00001 14354+ SLDL R2,1 00B888 8D20 0001 00001 14355+ SLDL R2,1 00B88C 8D20 0001 00001 14356+ SLDL R2,1 00B890 8D20 0001 00001 14357+ SLDL R2,1 00B894 8D20 0001 00001 14358+ SLDL R2,1 00B898 8D20 0001 00001 14359+ SLDL R2,1 00B89C 8D20 0001 00001 14360+ SLDL R2,1 00B8A0 8D20 0001 00001 14361+ SLDL R2,1 00B8A4 8D20 0001 00001 14362+ SLDL R2,1 00B8A8 8D20 0001 00001 14363+ SLDL R2,1 00B8AC 8D20 0001 00001 14364+ SLDL R2,1 00B8B0 8D20 0001 00001 14365+ SLDL R2,1 00B8B4 8D20 0001 00001 14366+ SLDL R2,1 00B8B8 8D20 0001 00001 14367+ SLDL R2,1 00B8BC 8D20 0001 00001 14368+ SLDL R2,1 00B8C0 8D20 0001 00001 14369+ SLDL R2,1 00B8C4 8D20 0001 00001 14370+ SLDL R2,1 00B8C8 8D20 0001 00001 14371+ SLDL R2,1 00B8CC 8D20 0001 00001 14372+ SLDL R2,1 00B8D0 8D20 0001 00001 14373+ SLDL R2,1 00B8D4 8D20 0001 00001 14374+ SLDL R2,1 00B8D8 8D20 0001 00001 14375+ SLDL R2,1 00B8DC 8D20 0001 00001 14376+ SLDL R2,1 PAGE 264 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00B8E0 8D20 0001 00001 14377+ SLDL R2,1 00B8E4 8D20 0001 00001 14378+ SLDL R2,1 00B8E8 8D20 0001 00001 14379+ SLDL R2,1 00B8EC 8D20 0001 00001 14380+ SLDL R2,1 00B8F0 8D20 0001 00001 14381+ SLDL R2,1 00B8F4 8D20 0001 00001 14382+ SLDL R2,1 00B8F8 8D20 0001 00001 14383+ SLDL R2,1 00B8FC 8D20 0001 00001 14384+ SLDL R2,1 00B900 8D20 0001 00001 14385+ SLDL R2,1 00B904 8D20 0001 00001 14386+ SLDL R2,1 00B908 8D20 0001 00001 14387+ SLDL R2,1 00B90C 8D20 0001 00001 14388+ SLDL R2,1 00B910 8D20 0001 00001 14389+ SLDL R2,1 00B914 8D20 0001 00001 14390+ SLDL R2,1 00B918 8D20 0001 00001 14391+ SLDL R2,1 00B91C 8D20 0001 00001 14392+ SLDL R2,1 00B920 8D20 0001 00001 14393+ SLDL R2,1 00B924 8D20 0001 00001 14394+ SLDL R2,1 00B928 8D20 0001 00001 14395+ SLDL R2,1 00B92C 8D20 0001 00001 14396+ SLDL R2,1 00B930 8D20 0001 00001 14397+ SLDL R2,1 00B934 8D20 0001 00001 14398+ SLDL R2,1 00B938 8D20 0001 00001 14399+ SLDL R2,1 00B93C 8D20 0001 00001 14400+ SLDL R2,1 00B940 8D20 0001 00001 14401+ SLDL R2,1 00B944 8D20 0001 00001 14402+ SLDL R2,1 00B948 8D20 0001 00001 14403+ SLDL R2,1 00B94C 8D20 0001 00001 14404+ SLDL R2,1 00B950 8D20 0001 00001 14405+ SLDL R2,1 00B954 8D20 0001 00001 14406+ SLDL R2,1 00B958 8D20 0001 00001 14407+ SLDL R2,1 00B95C 8D20 0001 00001 14408+ SLDL R2,1 00B960 8D20 0001 00001 14409+ SLDL R2,1 14410+* 00B964 06FB 14411 BCTR R15,R11 14412 TSIMRET 00B966 58F0 C128 0B978 14413+ L R15,=A(SAVETST) R15 := current save area 00B96A 58DF 0004 00004 14414+ L R13,4(R15) get old save area back 00B96E 98EC D00C 0000C 14415+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00B972 07FE 14416+ BR 14 RETURN 02000000 14417 TSIMEND 00B978 14418+ LTORG 00B978 00000458 14419 =A(SAVETST) 0B97C 14420+T241TEND EQU * 14421 * 14422 * Test 242 -- SRL R,1 -------------------------------------- 14423 * 14424 TSIMBEG T242,35000,30,4,C'SRL R,1' 14425+* 002FA4 14426+TDSCDAT CSECT 002FA8 14427+ DS 0D 14428+* 002FA8 0000B980 14429+T242TDSC DC A(T242) // TENTRY 002FAC 000000B4 14430+ DC A(T242TEND-T242) // TLENGTH 002FB0 000088B8 14431+ DC F'35000' // TLRCNT PAGE 265 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002FB4 0000001E 14432+ DC F'30' // TIGCNT 002FB8 00000004 14433+ DC F'4' // TLTYPE 0014F3 14434+TEXT CSECT 0014F3 E3F2F4F2 14435+SPTR1168 DC C'T242' 002FBC 14436+TDSCDAT CSECT 002FBC 14437+ DS 0F 002FBC 040014F3 14438+ DC AL1(L'SPTR1168),AL3(SPTR1168) 0014F7 14439+TEXT CSECT 0014F7 E2D9D340D96BF1 14440+SPTR1169 DC C'SRL R,1' 002FC0 14441+TDSCDAT CSECT 002FC0 14442+ DS 0F 002FC0 070014F7 14443+ DC AL1(L'SPTR1169),AL3(SPTR1169) 14444+* 004B20 14445+TDSCTBL CSECT 04B20 14446+T242TPTR EQU * 004B20 00002FA8 14447+ DC A(T242TDSC) enabled test 14448+* 00B97C 14449+TCODE CSECT 00B980 14450+ DS 0D ensure double word alignment for test 00B980 14451+T242 DS 0H 01650000 00B980 90EC D00C 0000C 14452+ STM 14,12,12(13) SAVE REGISTERS 02950000 00B984 18CF 14453+ LR R12,R15 base register := entry address 0B980 14454+ USING T242,R12 declare code base register 00B986 41B0 C01E 0B99E 14455+ LA R11,T242L load loop target to R11 00B98A 58F0 C0B0 0BA30 14456+ L R15,=A(SAVETST) R15 := current save area 00B98E 50DF 0004 00004 14457+ ST R13,4(R15) set back pointer in current save area 00B992 182D 14458+ LR R2,R13 remember callers save area 00B994 18DF 14459+ LR R13,R15 setup current save area 00B996 50D2 0008 00008 14460+ ST R13,8(R2) set forw pointer in callers save area 00000 14461+ USING TDSC,R1 declare TDSC base register 00B99A 58F0 1008 00008 14462+ L R15,TLRCNT load local repeat count to R15 14463+* 14464 * 00B99E 4120 0001 00001 14465 T242L LA R2,1 14466 REPINS SRL,(R2,1) repeat: SRL R2,1 14467+* 14468+* build from sublist &ALIST a comma separated string &ARGS 14469+* 14470+* 14471+* 14472+* 14473+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 14474+* this allows to transfer the repeat count from last TDSCGEN call 14475+* 14476+* 14477+* 14478+* write a comment indicating what REPINS does (in case NOGEN in effect) 14479+* 14480+*,// REPINS: do 30 times: 14481+* 14482+* MNOTE requires that ' is doubled for expanded variables 14483+* thus build &MASTR as a copy of '&ARGS with ' doubled 14484+* 14485+* 14486+*,// SRL R2,1 PAGE 266 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 14487+* 14488+* finally generate code: &ICNT copies of &CODE &ARGS 14489+* 00B9A2 8820 0001 00001 14490+ SRL R2,1 00B9A6 8820 0001 00001 14491+ SRL R2,1 00B9AA 8820 0001 00001 14492+ SRL R2,1 00B9AE 8820 0001 00001 14493+ SRL R2,1 00B9B2 8820 0001 00001 14494+ SRL R2,1 00B9B6 8820 0001 00001 14495+ SRL R2,1 00B9BA 8820 0001 00001 14496+ SRL R2,1 00B9BE 8820 0001 00001 14497+ SRL R2,1 00B9C2 8820 0001 00001 14498+ SRL R2,1 00B9C6 8820 0001 00001 14499+ SRL R2,1 00B9CA 8820 0001 00001 14500+ SRL R2,1 00B9CE 8820 0001 00001 14501+ SRL R2,1 00B9D2 8820 0001 00001 14502+ SRL R2,1 00B9D6 8820 0001 00001 14503+ SRL R2,1 00B9DA 8820 0001 00001 14504+ SRL R2,1 00B9DE 8820 0001 00001 14505+ SRL R2,1 00B9E2 8820 0001 00001 14506+ SRL R2,1 00B9E6 8820 0001 00001 14507+ SRL R2,1 00B9EA 8820 0001 00001 14508+ SRL R2,1 00B9EE 8820 0001 00001 14509+ SRL R2,1 00B9F2 8820 0001 00001 14510+ SRL R2,1 00B9F6 8820 0001 00001 14511+ SRL R2,1 00B9FA 8820 0001 00001 14512+ SRL R2,1 00B9FE 8820 0001 00001 14513+ SRL R2,1 00BA02 8820 0001 00001 14514+ SRL R2,1 00BA06 8820 0001 00001 14515+ SRL R2,1 00BA0A 8820 0001 00001 14516+ SRL R2,1 00BA0E 8820 0001 00001 14517+ SRL R2,1 00BA12 8820 0001 00001 14518+ SRL R2,1 00BA16 8820 0001 00001 14519+ SRL R2,1 14520+* 00BA1A 06FB 14521 BCTR R15,R11 14522 TSIMRET 00BA1C 58F0 C0B0 0BA30 14523+ L R15,=A(SAVETST) R15 := current save area 00BA20 58DF 0004 00004 14524+ L R13,4(R15) get old save area back 00BA24 98EC D00C 0000C 14525+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00BA28 07FE 14526+ BR 14 RETURN 02000000 14527 TSIMEND 00BA30 14528+ LTORG 00BA30 00000458 14529 =A(SAVETST) 0BA34 14530+T242TEND EQU * 14531 * 14532 * Test 243 -- SRDL R,1 ------------------------------------- 14533 * 14534 TSIMBEG T243,13000,60,5,C'SRDL R,1' 14535+* 002FC4 14536+TDSCDAT CSECT 002FC8 14537+ DS 0D 14538+* 002FC8 0000BA38 14539+T243TDSC DC A(T243) // TENTRY 002FCC 0000012C 14540+ DC A(T243TEND-T243) // TLENGTH 002FD0 000032C8 14541+ DC F'13000' // TLRCNT PAGE 267 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 002FD4 0000003C 14542+ DC F'60' // TIGCNT 002FD8 00000005 14543+ DC F'5' // TLTYPE 0014FE 14544+TEXT CSECT 0014FE E3F2F4F3 14545+SPTR1180 DC C'T243' 002FDC 14546+TDSCDAT CSECT 002FDC 14547+ DS 0F 002FDC 040014FE 14548+ DC AL1(L'SPTR1180),AL3(SPTR1180) 001502 14549+TEXT CSECT 001502 E2D9C4D340D96BF1 14550+SPTR1181 DC C'SRDL R,1' 002FE0 14551+TDSCDAT CSECT 002FE0 14552+ DS 0F 002FE0 08001502 14553+ DC AL1(L'SPTR1181),AL3(SPTR1181) 14554+* 004B24 14555+TDSCTBL CSECT 04B24 14556+T243TPTR EQU * 004B24 00002FC8 14557+ DC A(T243TDSC) enabled test 14558+* 00BA34 14559+TCODE CSECT 00BA38 14560+ DS 0D ensure double word alignment for test 00BA38 14561+T243 DS 0H 01650000 00BA38 90EC D00C 0000C 14562+ STM 14,12,12(13) SAVE REGISTERS 02950000 00BA3C 18CF 14563+ LR R12,R15 base register := entry address 0BA38 14564+ USING T243,R12 declare code base register 00BA3E 41B0 C01E 0BA56 14565+ LA R11,T243L load loop target to R11 00BA42 58F0 C128 0BB60 14566+ L R15,=A(SAVETST) R15 := current save area 00BA46 50DF 0004 00004 14567+ ST R13,4(R15) set back pointer in current save area 00BA4A 182D 14568+ LR R2,R13 remember callers save area 00BA4C 18DF 14569+ LR R13,R15 setup current save area 00BA4E 50D2 0008 00008 14570+ ST R13,8(R2) set forw pointer in callers save area 00000 14571+ USING TDSC,R1 declare TDSC base register 00BA52 58F0 1008 00008 14572+ L R15,TLRCNT load local repeat count to R15 14573+* 14574 * 00BA56 1722 14575 T243L XR R2,R2 00BA58 4130 0001 00001 14576 LA R3,1 14577 REPINS SRDL,(R2,1) repeat: SRDL R2,1 14578+* 14579+* build from sublist &ALIST a comma separated string &ARGS 14580+* 14581+* 14582+* 14583+* 14584+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 14585+* this allows to transfer the repeat count from last TDSCGEN call 14586+* 14587+* 14588+* 14589+* write a comment indicating what REPINS does (in case NOGEN in effect) 14590+* 14591+*,// REPINS: do 60 times: 14592+* 14593+* MNOTE requires that ' is doubled for expanded variables 14594+* thus build &MASTR as a copy of '&ARGS with ' doubled 14595+* 14596+* PAGE 268 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 14597+*,// SRDL R2,1 14598+* 14599+* finally generate code: &ICNT copies of &CODE &ARGS 14600+* 00BA5C 8C20 0001 00001 14601+ SRDL R2,1 00BA60 8C20 0001 00001 14602+ SRDL R2,1 00BA64 8C20 0001 00001 14603+ SRDL R2,1 00BA68 8C20 0001 00001 14604+ SRDL R2,1 00BA6C 8C20 0001 00001 14605+ SRDL R2,1 00BA70 8C20 0001 00001 14606+ SRDL R2,1 00BA74 8C20 0001 00001 14607+ SRDL R2,1 00BA78 8C20 0001 00001 14608+ SRDL R2,1 00BA7C 8C20 0001 00001 14609+ SRDL R2,1 00BA80 8C20 0001 00001 14610+ SRDL R2,1 00BA84 8C20 0001 00001 14611+ SRDL R2,1 00BA88 8C20 0001 00001 14612+ SRDL R2,1 00BA8C 8C20 0001 00001 14613+ SRDL R2,1 00BA90 8C20 0001 00001 14614+ SRDL R2,1 00BA94 8C20 0001 00001 14615+ SRDL R2,1 00BA98 8C20 0001 00001 14616+ SRDL R2,1 00BA9C 8C20 0001 00001 14617+ SRDL R2,1 00BAA0 8C20 0001 00001 14618+ SRDL R2,1 00BAA4 8C20 0001 00001 14619+ SRDL R2,1 00BAA8 8C20 0001 00001 14620+ SRDL R2,1 00BAAC 8C20 0001 00001 14621+ SRDL R2,1 00BAB0 8C20 0001 00001 14622+ SRDL R2,1 00BAB4 8C20 0001 00001 14623+ SRDL R2,1 00BAB8 8C20 0001 00001 14624+ SRDL R2,1 00BABC 8C20 0001 00001 14625+ SRDL R2,1 00BAC0 8C20 0001 00001 14626+ SRDL R2,1 00BAC4 8C20 0001 00001 14627+ SRDL R2,1 00BAC8 8C20 0001 00001 14628+ SRDL R2,1 00BACC 8C20 0001 00001 14629+ SRDL R2,1 00BAD0 8C20 0001 00001 14630+ SRDL R2,1 00BAD4 8C20 0001 00001 14631+ SRDL R2,1 00BAD8 8C20 0001 00001 14632+ SRDL R2,1 00BADC 8C20 0001 00001 14633+ SRDL R2,1 00BAE0 8C20 0001 00001 14634+ SRDL R2,1 00BAE4 8C20 0001 00001 14635+ SRDL R2,1 00BAE8 8C20 0001 00001 14636+ SRDL R2,1 00BAEC 8C20 0001 00001 14637+ SRDL R2,1 00BAF0 8C20 0001 00001 14638+ SRDL R2,1 00BAF4 8C20 0001 00001 14639+ SRDL R2,1 00BAF8 8C20 0001 00001 14640+ SRDL R2,1 00BAFC 8C20 0001 00001 14641+ SRDL R2,1 00BB00 8C20 0001 00001 14642+ SRDL R2,1 00BB04 8C20 0001 00001 14643+ SRDL R2,1 00BB08 8C20 0001 00001 14644+ SRDL R2,1 00BB0C 8C20 0001 00001 14645+ SRDL R2,1 00BB10 8C20 0001 00001 14646+ SRDL R2,1 00BB14 8C20 0001 00001 14647+ SRDL R2,1 00BB18 8C20 0001 00001 14648+ SRDL R2,1 00BB1C 8C20 0001 00001 14649+ SRDL R2,1 00BB20 8C20 0001 00001 14650+ SRDL R2,1 00BB24 8C20 0001 00001 14651+ SRDL R2,1 PAGE 269 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00BB28 8C20 0001 00001 14652+ SRDL R2,1 00BB2C 8C20 0001 00001 14653+ SRDL R2,1 00BB30 8C20 0001 00001 14654+ SRDL R2,1 00BB34 8C20 0001 00001 14655+ SRDL R2,1 00BB38 8C20 0001 00001 14656+ SRDL R2,1 00BB3C 8C20 0001 00001 14657+ SRDL R2,1 00BB40 8C20 0001 00001 14658+ SRDL R2,1 00BB44 8C20 0001 00001 14659+ SRDL R2,1 00BB48 8C20 0001 00001 14660+ SRDL R2,1 14661+* 00BB4C 06FB 14662 BCTR R15,R11 14663 TSIMRET 00BB4E 58F0 C128 0BB60 14664+ L R15,=A(SAVETST) R15 := current save area 00BB52 58DF 0004 00004 14665+ L R13,4(R15) get old save area back 00BB56 98EC D00C 0000C 14666+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00BB5A 07FE 14667+ BR 14 RETURN 02000000 14668 TSIMEND 00BB60 14669+ LTORG 00BB60 00000458 14670 =A(SAVETST) 0BB64 14671+T243TEND EQU * 14672 * 14673 * Test 244 -- SLL R,30 ------------------------------------- 14674 * 14675 TSIMBEG T244,35000,30,4,C'SLL R,30' 14676+* 002FE4 14677+TDSCDAT CSECT 002FE8 14678+ DS 0D 14679+* 002FE8 0000BB68 14680+T244TDSC DC A(T244) // TENTRY 002FEC 000000B4 14681+ DC A(T244TEND-T244) // TLENGTH 002FF0 000088B8 14682+ DC F'35000' // TLRCNT 002FF4 0000001E 14683+ DC F'30' // TIGCNT 002FF8 00000004 14684+ DC F'4' // TLTYPE 00150A 14685+TEXT CSECT 00150A E3F2F4F4 14686+SPTR1192 DC C'T244' 002FFC 14687+TDSCDAT CSECT 002FFC 14688+ DS 0F 002FFC 0400150A 14689+ DC AL1(L'SPTR1192),AL3(SPTR1192) 00150E 14690+TEXT CSECT 00150E E2D3D340D96BF3F0 14691+SPTR1193 DC C'SLL R,30' 003000 14692+TDSCDAT CSECT 003000 14693+ DS 0F 003000 0800150E 14694+ DC AL1(L'SPTR1193),AL3(SPTR1193) 14695+* 004B28 14696+TDSCTBL CSECT 04B28 14697+T244TPTR EQU * 004B28 00002FE8 14698+ DC A(T244TDSC) enabled test 14699+* 00BB64 14700+TCODE CSECT 00BB68 14701+ DS 0D ensure double word alignment for test 00BB68 14702+T244 DS 0H 01650000 00BB68 90EC D00C 0000C 14703+ STM 14,12,12(13) SAVE REGISTERS 02950000 00BB6C 18CF 14704+ LR R12,R15 base register := entry address 0BB68 14705+ USING T244,R12 declare code base register 00BB6E 41B0 C01E 0BB86 14706+ LA R11,T244L load loop target to R11 PAGE 270 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00BB72 58F0 C0B0 0BC18 14707+ L R15,=A(SAVETST) R15 := current save area 00BB76 50DF 0004 00004 14708+ ST R13,4(R15) set back pointer in current save area 00BB7A 182D 14709+ LR R2,R13 remember callers save area 00BB7C 18DF 14710+ LR R13,R15 setup current save area 00BB7E 50D2 0008 00008 14711+ ST R13,8(R2) set forw pointer in callers save area 00000 14712+ USING TDSC,R1 declare TDSC base register 00BB82 58F0 1008 00008 14713+ L R15,TLRCNT load local repeat count to R15 14714+* 14715 * 00BB86 4120 0001 00001 14716 T244L LA R2,1 14717 REPINS SLL,(R2,30) repeat: SLL R2,30 14718+* 14719+* build from sublist &ALIST a comma separated string &ARGS 14720+* 14721+* 14722+* 14723+* 14724+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 14725+* this allows to transfer the repeat count from last TDSCGEN call 14726+* 14727+* 14728+* 14729+* write a comment indicating what REPINS does (in case NOGEN in effect) 14730+* 14731+*,// REPINS: do 30 times: 14732+* 14733+* MNOTE requires that ' is doubled for expanded variables 14734+* thus build &MASTR as a copy of '&ARGS with ' doubled 14735+* 14736+* 14737+*,// SLL R2,30 14738+* 14739+* finally generate code: &ICNT copies of &CODE &ARGS 14740+* 00BB8A 8920 001E 0001E 14741+ SLL R2,30 00BB8E 8920 001E 0001E 14742+ SLL R2,30 00BB92 8920 001E 0001E 14743+ SLL R2,30 00BB96 8920 001E 0001E 14744+ SLL R2,30 00BB9A 8920 001E 0001E 14745+ SLL R2,30 00BB9E 8920 001E 0001E 14746+ SLL R2,30 00BBA2 8920 001E 0001E 14747+ SLL R2,30 00BBA6 8920 001E 0001E 14748+ SLL R2,30 00BBAA 8920 001E 0001E 14749+ SLL R2,30 00BBAE 8920 001E 0001E 14750+ SLL R2,30 00BBB2 8920 001E 0001E 14751+ SLL R2,30 00BBB6 8920 001E 0001E 14752+ SLL R2,30 00BBBA 8920 001E 0001E 14753+ SLL R2,30 00BBBE 8920 001E 0001E 14754+ SLL R2,30 00BBC2 8920 001E 0001E 14755+ SLL R2,30 00BBC6 8920 001E 0001E 14756+ SLL R2,30 00BBCA 8920 001E 0001E 14757+ SLL R2,30 00BBCE 8920 001E 0001E 14758+ SLL R2,30 00BBD2 8920 001E 0001E 14759+ SLL R2,30 00BBD6 8920 001E 0001E 14760+ SLL R2,30 00BBDA 8920 001E 0001E 14761+ SLL R2,30 PAGE 271 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00BBDE 8920 001E 0001E 14762+ SLL R2,30 00BBE2 8920 001E 0001E 14763+ SLL R2,30 00BBE6 8920 001E 0001E 14764+ SLL R2,30 00BBEA 8920 001E 0001E 14765+ SLL R2,30 00BBEE 8920 001E 0001E 14766+ SLL R2,30 00BBF2 8920 001E 0001E 14767+ SLL R2,30 00BBF6 8920 001E 0001E 14768+ SLL R2,30 00BBFA 8920 001E 0001E 14769+ SLL R2,30 00BBFE 8920 001E 0001E 14770+ SLL R2,30 14771+* 00BC02 06FB 14772 BCTR R15,R11 14773 TSIMRET 00BC04 58F0 C0B0 0BC18 14774+ L R15,=A(SAVETST) R15 := current save area 00BC08 58DF 0004 00004 14775+ L R13,4(R15) get old save area back 00BC0C 98EC D00C 0000C 14776+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00BC10 07FE 14777+ BR 14 RETURN 02000000 14778 TSIMEND 00BC18 14779+ LTORG 00BC18 00000458 14780 =A(SAVETST) 0BC1C 14781+T244TEND EQU * 14782 * 14783 * Test 245 -- SLDL R,60 ------------------------------------ 14784 * 14785 TSIMBEG T245,14000,60,5,C'SLDL R,60' 14786+* 003004 14787+TDSCDAT CSECT 003008 14788+ DS 0D 14789+* 003008 0000BC20 14790+T245TDSC DC A(T245) // TENTRY 00300C 0000012C 14791+ DC A(T245TEND-T245) // TLENGTH 003010 000036B0 14792+ DC F'14000' // TLRCNT 003014 0000003C 14793+ DC F'60' // TIGCNT 003018 00000005 14794+ DC F'5' // TLTYPE 001516 14795+TEXT CSECT 001516 E3F2F4F5 14796+SPTR1204 DC C'T245' 00301C 14797+TDSCDAT CSECT 00301C 14798+ DS 0F 00301C 04001516 14799+ DC AL1(L'SPTR1204),AL3(SPTR1204) 00151A 14800+TEXT CSECT 00151A E2D3C4D340D96BF6 14801+SPTR1205 DC C'SLDL R,60' 003020 14802+TDSCDAT CSECT 003020 14803+ DS 0F 003020 0900151A 14804+ DC AL1(L'SPTR1205),AL3(SPTR1205) 14805+* 004B2C 14806+TDSCTBL CSECT 04B2C 14807+T245TPTR EQU * 004B2C 00003008 14808+ DC A(T245TDSC) enabled test 14809+* 00BC1C 14810+TCODE CSECT 00BC20 14811+ DS 0D ensure double word alignment for test 00BC20 14812+T245 DS 0H 01650000 00BC20 90EC D00C 0000C 14813+ STM 14,12,12(13) SAVE REGISTERS 02950000 00BC24 18CF 14814+ LR R12,R15 base register := entry address 0BC20 14815+ USING T245,R12 declare code base register 00BC26 41B0 C01E 0BC3E 14816+ LA R11,T245L load loop target to R11 PAGE 272 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00BC2A 58F0 C128 0BD48 14817+ L R15,=A(SAVETST) R15 := current save area 00BC2E 50DF 0004 00004 14818+ ST R13,4(R15) set back pointer in current save area 00BC32 182D 14819+ LR R2,R13 remember callers save area 00BC34 18DF 14820+ LR R13,R15 setup current save area 00BC36 50D2 0008 00008 14821+ ST R13,8(R2) set forw pointer in callers save area 00000 14822+ USING TDSC,R1 declare TDSC base register 00BC3A 58F0 1008 00008 14823+ L R15,TLRCNT load local repeat count to R15 14824+* 14825 * 00BC3E 1722 14826 T245L XR R2,R2 00BC40 4130 0001 00001 14827 LA R3,1 14828 REPINS SLDL,(R2,60) repeat: SLDL R2,60 14829+* 14830+* build from sublist &ALIST a comma separated string &ARGS 14831+* 14832+* 14833+* 14834+* 14835+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 14836+* this allows to transfer the repeat count from last TDSCGEN call 14837+* 14838+* 14839+* 14840+* write a comment indicating what REPINS does (in case NOGEN in effect) 14841+* 14842+*,// REPINS: do 60 times: 14843+* 14844+* MNOTE requires that ' is doubled for expanded variables 14845+* thus build &MASTR as a copy of '&ARGS with ' doubled 14846+* 14847+* 14848+*,// SLDL R2,60 14849+* 14850+* finally generate code: &ICNT copies of &CODE &ARGS 14851+* 00BC44 8D20 003C 0003C 14852+ SLDL R2,60 00BC48 8D20 003C 0003C 14853+ SLDL R2,60 00BC4C 8D20 003C 0003C 14854+ SLDL R2,60 00BC50 8D20 003C 0003C 14855+ SLDL R2,60 00BC54 8D20 003C 0003C 14856+ SLDL R2,60 00BC58 8D20 003C 0003C 14857+ SLDL R2,60 00BC5C 8D20 003C 0003C 14858+ SLDL R2,60 00BC60 8D20 003C 0003C 14859+ SLDL R2,60 00BC64 8D20 003C 0003C 14860+ SLDL R2,60 00BC68 8D20 003C 0003C 14861+ SLDL R2,60 00BC6C 8D20 003C 0003C 14862+ SLDL R2,60 00BC70 8D20 003C 0003C 14863+ SLDL R2,60 00BC74 8D20 003C 0003C 14864+ SLDL R2,60 00BC78 8D20 003C 0003C 14865+ SLDL R2,60 00BC7C 8D20 003C 0003C 14866+ SLDL R2,60 00BC80 8D20 003C 0003C 14867+ SLDL R2,60 00BC84 8D20 003C 0003C 14868+ SLDL R2,60 00BC88 8D20 003C 0003C 14869+ SLDL R2,60 00BC8C 8D20 003C 0003C 14870+ SLDL R2,60 00BC90 8D20 003C 0003C 14871+ SLDL R2,60 PAGE 273 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00BC94 8D20 003C 0003C 14872+ SLDL R2,60 00BC98 8D20 003C 0003C 14873+ SLDL R2,60 00BC9C 8D20 003C 0003C 14874+ SLDL R2,60 00BCA0 8D20 003C 0003C 14875+ SLDL R2,60 00BCA4 8D20 003C 0003C 14876+ SLDL R2,60 00BCA8 8D20 003C 0003C 14877+ SLDL R2,60 00BCAC 8D20 003C 0003C 14878+ SLDL R2,60 00BCB0 8D20 003C 0003C 14879+ SLDL R2,60 00BCB4 8D20 003C 0003C 14880+ SLDL R2,60 00BCB8 8D20 003C 0003C 14881+ SLDL R2,60 00BCBC 8D20 003C 0003C 14882+ SLDL R2,60 00BCC0 8D20 003C 0003C 14883+ SLDL R2,60 00BCC4 8D20 003C 0003C 14884+ SLDL R2,60 00BCC8 8D20 003C 0003C 14885+ SLDL R2,60 00BCCC 8D20 003C 0003C 14886+ SLDL R2,60 00BCD0 8D20 003C 0003C 14887+ SLDL R2,60 00BCD4 8D20 003C 0003C 14888+ SLDL R2,60 00BCD8 8D20 003C 0003C 14889+ SLDL R2,60 00BCDC 8D20 003C 0003C 14890+ SLDL R2,60 00BCE0 8D20 003C 0003C 14891+ SLDL R2,60 00BCE4 8D20 003C 0003C 14892+ SLDL R2,60 00BCE8 8D20 003C 0003C 14893+ SLDL R2,60 00BCEC 8D20 003C 0003C 14894+ SLDL R2,60 00BCF0 8D20 003C 0003C 14895+ SLDL R2,60 00BCF4 8D20 003C 0003C 14896+ SLDL R2,60 00BCF8 8D20 003C 0003C 14897+ SLDL R2,60 00BCFC 8D20 003C 0003C 14898+ SLDL R2,60 00BD00 8D20 003C 0003C 14899+ SLDL R2,60 00BD04 8D20 003C 0003C 14900+ SLDL R2,60 00BD08 8D20 003C 0003C 14901+ SLDL R2,60 00BD0C 8D20 003C 0003C 14902+ SLDL R2,60 00BD10 8D20 003C 0003C 14903+ SLDL R2,60 00BD14 8D20 003C 0003C 14904+ SLDL R2,60 00BD18 8D20 003C 0003C 14905+ SLDL R2,60 00BD1C 8D20 003C 0003C 14906+ SLDL R2,60 00BD20 8D20 003C 0003C 14907+ SLDL R2,60 00BD24 8D20 003C 0003C 14908+ SLDL R2,60 00BD28 8D20 003C 0003C 14909+ SLDL R2,60 00BD2C 8D20 003C 0003C 14910+ SLDL R2,60 00BD30 8D20 003C 0003C 14911+ SLDL R2,60 14912+* 00BD34 06FB 14913 BCTR R15,R11 14914 TSIMRET 00BD36 58F0 C128 0BD48 14915+ L R15,=A(SAVETST) R15 := current save area 00BD3A 58DF 0004 00004 14916+ L R13,4(R15) get old save area back 00BD3E 98EC D00C 0000C 14917+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00BD42 07FE 14918+ BR 14 RETURN 02000000 14919 TSIMEND 00BD48 14920+ LTORG 00BD48 00000458 14921 =A(SAVETST) 0BD4C 14922+T245TEND EQU * 14923 * 14924 * Test 25x -- misc TM,TR,TRT =============================== 14925 * 14926 * Test 250 -- TM m,i --------------------------------------- PAGE 274 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 14927 * 14928 TSIMBEG T250,10000,50,1,C'TM m,i' 14929+* 003024 14930+TDSCDAT CSECT 003028 14931+ DS 0D 14932+* 003028 0000BD50 14933+T250TDSC DC A(T250) // TENTRY 00302C 000000FC 14934+ DC A(T250TEND-T250) // TLENGTH 003030 00002710 14935+ DC F'10000' // TLRCNT 003034 00000032 14936+ DC F'50' // TIGCNT 003038 00000001 14937+ DC F'1' // TLTYPE 001523 14938+TEXT CSECT 001523 E3F2F5F0 14939+SPTR1216 DC C'T250' 00303C 14940+TDSCDAT CSECT 00303C 14941+ DS 0F 00303C 04001523 14942+ DC AL1(L'SPTR1216),AL3(SPTR1216) 001527 14943+TEXT CSECT 001527 E3D440946B89 14944+SPTR1217 DC C'TM m,i' 003040 14945+TDSCDAT CSECT 003040 14946+ DS 0F 003040 06001527 14947+ DC AL1(L'SPTR1217),AL3(SPTR1217) 14948+* 004B30 14949+TDSCTBL CSECT 04B30 14950+T250TPTR EQU * 004B30 00003028 14951+ DC A(T250TDSC) enabled test 14952+* 00BD4C 14953+TCODE CSECT 00BD50 14954+ DS 0D ensure double word alignment for test 00BD50 14955+T250 DS 0H 01650000 00BD50 90EC D00C 0000C 14956+ STM 14,12,12(13) SAVE REGISTERS 02950000 00BD54 18CF 14957+ LR R12,R15 base register := entry address 0BD50 14958+ USING T250,R12 declare code base register 00BD56 41B0 C01E 0BD6E 14959+ LA R11,T250L load loop target to R11 00BD5A 58F0 C0F8 0BE48 14960+ L R15,=A(SAVETST) R15 := current save area 00BD5E 50DF 0004 00004 14961+ ST R13,4(R15) set back pointer in current save area 00BD62 182D 14962+ LR R2,R13 remember callers save area 00BD64 18DF 14963+ LR R13,R15 setup current save area 00BD66 50D2 0008 00008 14964+ ST R13,8(R2) set forw pointer in callers save area 00000 14965+ USING TDSC,R1 declare TDSC base register 00BD6A 58F0 1008 00008 14966+ L R15,TLRCNT load local repeat count to R15 14967+* 14968 * 14969 T250L REPINS TM,(T250V,X'01') repeat: TM T250V,X'01' 14970+* 14971+* build from sublist &ALIST a comma separated string &ARGS 14972+* 14973+* 14974+* 14975+* 14976+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 14977+* this allows to transfer the repeat count from last TDSCGEN call 14978+* 14979+* 0BD6E 14980+T250L EQU * 14981+* PAGE 275 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 14982+* write a comment indicating what REPINS does (in case NOGEN in effect) 14983+* 14984+*,// REPINS: do 50 times: 14985+* 14986+* MNOTE requires that ' is doubled for expanded variables 14987+* thus build &MASTR as a copy of '&ARGS with ' doubled 14988+* 14989+* 14990+*,// TM T250V,X'01' 14991+* 14992+* finally generate code: &ICNT copies of &CODE &ARGS 14993+* 00BD6E 9101 C0F6 0BE46 14994+ TM T250V,X'01' 00BD72 9101 C0F6 0BE46 14995+ TM T250V,X'01' 00BD76 9101 C0F6 0BE46 14996+ TM T250V,X'01' 00BD7A 9101 C0F6 0BE46 14997+ TM T250V,X'01' 00BD7E 9101 C0F6 0BE46 14998+ TM T250V,X'01' 00BD82 9101 C0F6 0BE46 14999+ TM T250V,X'01' 00BD86 9101 C0F6 0BE46 15000+ TM T250V,X'01' 00BD8A 9101 C0F6 0BE46 15001+ TM T250V,X'01' 00BD8E 9101 C0F6 0BE46 15002+ TM T250V,X'01' 00BD92 9101 C0F6 0BE46 15003+ TM T250V,X'01' 00BD96 9101 C0F6 0BE46 15004+ TM T250V,X'01' 00BD9A 9101 C0F6 0BE46 15005+ TM T250V,X'01' 00BD9E 9101 C0F6 0BE46 15006+ TM T250V,X'01' 00BDA2 9101 C0F6 0BE46 15007+ TM T250V,X'01' 00BDA6 9101 C0F6 0BE46 15008+ TM T250V,X'01' 00BDAA 9101 C0F6 0BE46 15009+ TM T250V,X'01' 00BDAE 9101 C0F6 0BE46 15010+ TM T250V,X'01' 00BDB2 9101 C0F6 0BE46 15011+ TM T250V,X'01' 00BDB6 9101 C0F6 0BE46 15012+ TM T250V,X'01' 00BDBA 9101 C0F6 0BE46 15013+ TM T250V,X'01' 00BDBE 9101 C0F6 0BE46 15014+ TM T250V,X'01' 00BDC2 9101 C0F6 0BE46 15015+ TM T250V,X'01' 00BDC6 9101 C0F6 0BE46 15016+ TM T250V,X'01' 00BDCA 9101 C0F6 0BE46 15017+ TM T250V,X'01' 00BDCE 9101 C0F6 0BE46 15018+ TM T250V,X'01' 00BDD2 9101 C0F6 0BE46 15019+ TM T250V,X'01' 00BDD6 9101 C0F6 0BE46 15020+ TM T250V,X'01' 00BDDA 9101 C0F6 0BE46 15021+ TM T250V,X'01' 00BDDE 9101 C0F6 0BE46 15022+ TM T250V,X'01' 00BDE2 9101 C0F6 0BE46 15023+ TM T250V,X'01' 00BDE6 9101 C0F6 0BE46 15024+ TM T250V,X'01' 00BDEA 9101 C0F6 0BE46 15025+ TM T250V,X'01' 00BDEE 9101 C0F6 0BE46 15026+ TM T250V,X'01' 00BDF2 9101 C0F6 0BE46 15027+ TM T250V,X'01' 00BDF6 9101 C0F6 0BE46 15028+ TM T250V,X'01' 00BDFA 9101 C0F6 0BE46 15029+ TM T250V,X'01' 00BDFE 9101 C0F6 0BE46 15030+ TM T250V,X'01' 00BE02 9101 C0F6 0BE46 15031+ TM T250V,X'01' 00BE06 9101 C0F6 0BE46 15032+ TM T250V,X'01' 00BE0A 9101 C0F6 0BE46 15033+ TM T250V,X'01' 00BE0E 9101 C0F6 0BE46 15034+ TM T250V,X'01' 00BE12 9101 C0F6 0BE46 15035+ TM T250V,X'01' 00BE16 9101 C0F6 0BE46 15036+ TM T250V,X'01' PAGE 276 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00BE1A 9101 C0F6 0BE46 15037+ TM T250V,X'01' 00BE1E 9101 C0F6 0BE46 15038+ TM T250V,X'01' 00BE22 9101 C0F6 0BE46 15039+ TM T250V,X'01' 00BE26 9101 C0F6 0BE46 15040+ TM T250V,X'01' 00BE2A 9101 C0F6 0BE46 15041+ TM T250V,X'01' 00BE2E 9101 C0F6 0BE46 15042+ TM T250V,X'01' 00BE32 9101 C0F6 0BE46 15043+ TM T250V,X'01' 15044+* 00BE36 06FB 15045 BCTR R15,R11 15046 TSIMRET 00BE38 58F0 C0F8 0BE48 15047+ L R15,=A(SAVETST) R15 := current save area 00BE3C 58DF 0004 00004 15048+ L R13,4(R15) get old save area back 00BE40 98EC D00C 0000C 15049+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00BE44 07FE 15050+ BR 14 RETURN 02000000 15051 * 00BE46 01 15052 T250V DC X'01' 15053 TSIMEND 00BE48 15054+ LTORG 00BE48 00000458 15055 =A(SAVETST) 0BE4C 15056+T250TEND EQU * 15057 * 15058 * Test 252 -- TR m,m (10c) --------------------------------- 15059 * 15060 TSIMBEG T252,3500,50,1,C'TR m,m (10c)' 15061+* 003044 15062+TDSCDAT CSECT 003048 15063+ DS 0D 15064+* 003048 0000BE50 15065+T252TDSC DC A(T252) // TENTRY 00304C 00000178 15066+ DC A(T252TEND-T252) // TLENGTH 003050 00000DAC 15067+ DC F'3500' // TLRCNT 003054 00000032 15068+ DC F'50' // TIGCNT 003058 00000001 15069+ DC F'1' // TLTYPE 00152D 15070+TEXT CSECT 00152D E3F2F5F2 15071+SPTR1228 DC C'T252' 00305C 15072+TDSCDAT CSECT 00305C 15073+ DS 0F 00305C 0400152D 15074+ DC AL1(L'SPTR1228),AL3(SPTR1228) 001531 15075+TEXT CSECT 001531 E3D940946B94404D 15076+SPTR1229 DC C'TR m,m (10c)' 003060 15077+TDSCDAT CSECT 003060 15078+ DS 0F 003060 0C001531 15079+ DC AL1(L'SPTR1229),AL3(SPTR1229) 15080+* 004B34 15081+TDSCTBL CSECT 04B34 15082+T252TPTR EQU * 004B34 00003048 15083+ DC A(T252TDSC) enabled test 15084+* 00BE4C 15085+TCODE CSECT 00BE50 15086+ DS 0D ensure double word alignment for test 00BE50 15087+T252 DS 0H 01650000 00BE50 90EC D00C 0000C 15088+ STM 14,12,12(13) SAVE REGISTERS 02950000 00BE54 18CF 15089+ LR R12,R15 base register := entry address 0BE50 15090+ USING T252,R12 declare code base register 00BE56 41B0 C026 0BE76 15091+ LA R11,T252L load loop target to R11 PAGE 277 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00BE5A 58F0 C170 0BFC0 15092+ L R15,=A(SAVETST) R15 := current save area 00BE5E 50DF 0004 00004 15093+ ST R13,4(R15) set back pointer in current save area 00BE62 182D 15094+ LR R2,R13 remember callers save area 00BE64 18DF 15095+ LR R13,R15 setup current save area 00BE66 50D2 0008 00008 15096+ ST R13,8(R2) set forw pointer in callers save area 00000 15097+ USING TDSC,R1 declare TDSC base register 00BE6A 58F0 1008 00008 15098+ L R15,TLRCNT load local repeat count to R15 15099+* 15100 * 00BE6E 4120 C162 0BFB2 15101 LA R2,T252V 00BE72 5830 C174 0BFC4 15102 L R3,=A(TRTBLINV) 15103 T252L REPINS TR,(0(10,R2),0(R3)) repeat: TR 0(10,R2),0(R3) 15104+* 15105+* build from sublist &ALIST a comma separated string &ARGS 15106+* 15107+* 15108+* 15109+* 15110+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 15111+* this allows to transfer the repeat count from last TDSCGEN call 15112+* 15113+* 0BE76 15114+T252L EQU * 15115+* 15116+* write a comment indicating what REPINS does (in case NOGEN in effect) 15117+* 15118+*,// REPINS: do 50 times: 15119+* 15120+* MNOTE requires that ' is doubled for expanded variables 15121+* thus build &MASTR as a copy of '&ARGS with ' doubled 15122+* 15123+* 15124+*,// TR 0(10,R2),0(R3) 15125+* 15126+* finally generate code: &ICNT copies of &CODE &ARGS 15127+* 00BE76 DC09 2000 3000 00000 00000 15128+ TR 0(10,R2),0(R3) 00BE7C DC09 2000 3000 00000 00000 15129+ TR 0(10,R2),0(R3) 00BE82 DC09 2000 3000 00000 00000 15130+ TR 0(10,R2),0(R3) 00BE88 DC09 2000 3000 00000 00000 15131+ TR 0(10,R2),0(R3) 00BE8E DC09 2000 3000 00000 00000 15132+ TR 0(10,R2),0(R3) 00BE94 DC09 2000 3000 00000 00000 15133+ TR 0(10,R2),0(R3) 00BE9A DC09 2000 3000 00000 00000 15134+ TR 0(10,R2),0(R3) 00BEA0 DC09 2000 3000 00000 00000 15135+ TR 0(10,R2),0(R3) 00BEA6 DC09 2000 3000 00000 00000 15136+ TR 0(10,R2),0(R3) 00BEAC DC09 2000 3000 00000 00000 15137+ TR 0(10,R2),0(R3) 00BEB2 DC09 2000 3000 00000 00000 15138+ TR 0(10,R2),0(R3) 00BEB8 DC09 2000 3000 00000 00000 15139+ TR 0(10,R2),0(R3) 00BEBE DC09 2000 3000 00000 00000 15140+ TR 0(10,R2),0(R3) 00BEC4 DC09 2000 3000 00000 00000 15141+ TR 0(10,R2),0(R3) 00BECA DC09 2000 3000 00000 00000 15142+ TR 0(10,R2),0(R3) 00BED0 DC09 2000 3000 00000 00000 15143+ TR 0(10,R2),0(R3) 00BED6 DC09 2000 3000 00000 00000 15144+ TR 0(10,R2),0(R3) 00BEDC DC09 2000 3000 00000 00000 15145+ TR 0(10,R2),0(R3) 00BEE2 DC09 2000 3000 00000 00000 15146+ TR 0(10,R2),0(R3) PAGE 278 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00BEE8 DC09 2000 3000 00000 00000 15147+ TR 0(10,R2),0(R3) 00BEEE DC09 2000 3000 00000 00000 15148+ TR 0(10,R2),0(R3) 00BEF4 DC09 2000 3000 00000 00000 15149+ TR 0(10,R2),0(R3) 00BEFA DC09 2000 3000 00000 00000 15150+ TR 0(10,R2),0(R3) 00BF00 DC09 2000 3000 00000 00000 15151+ TR 0(10,R2),0(R3) 00BF06 DC09 2000 3000 00000 00000 15152+ TR 0(10,R2),0(R3) 00BF0C DC09 2000 3000 00000 00000 15153+ TR 0(10,R2),0(R3) 00BF12 DC09 2000 3000 00000 00000 15154+ TR 0(10,R2),0(R3) 00BF18 DC09 2000 3000 00000 00000 15155+ TR 0(10,R2),0(R3) 00BF1E DC09 2000 3000 00000 00000 15156+ TR 0(10,R2),0(R3) 00BF24 DC09 2000 3000 00000 00000 15157+ TR 0(10,R2),0(R3) 00BF2A DC09 2000 3000 00000 00000 15158+ TR 0(10,R2),0(R3) 00BF30 DC09 2000 3000 00000 00000 15159+ TR 0(10,R2),0(R3) 00BF36 DC09 2000 3000 00000 00000 15160+ TR 0(10,R2),0(R3) 00BF3C DC09 2000 3000 00000 00000 15161+ TR 0(10,R2),0(R3) 00BF42 DC09 2000 3000 00000 00000 15162+ TR 0(10,R2),0(R3) 00BF48 DC09 2000 3000 00000 00000 15163+ TR 0(10,R2),0(R3) 00BF4E DC09 2000 3000 00000 00000 15164+ TR 0(10,R2),0(R3) 00BF54 DC09 2000 3000 00000 00000 15165+ TR 0(10,R2),0(R3) 00BF5A DC09 2000 3000 00000 00000 15166+ TR 0(10,R2),0(R3) 00BF60 DC09 2000 3000 00000 00000 15167+ TR 0(10,R2),0(R3) 00BF66 DC09 2000 3000 00000 00000 15168+ TR 0(10,R2),0(R3) 00BF6C DC09 2000 3000 00000 00000 15169+ TR 0(10,R2),0(R3) 00BF72 DC09 2000 3000 00000 00000 15170+ TR 0(10,R2),0(R3) 00BF78 DC09 2000 3000 00000 00000 15171+ TR 0(10,R2),0(R3) 00BF7E DC09 2000 3000 00000 00000 15172+ TR 0(10,R2),0(R3) 00BF84 DC09 2000 3000 00000 00000 15173+ TR 0(10,R2),0(R3) 00BF8A DC09 2000 3000 00000 00000 15174+ TR 0(10,R2),0(R3) 00BF90 DC09 2000 3000 00000 00000 15175+ TR 0(10,R2),0(R3) 00BF96 DC09 2000 3000 00000 00000 15176+ TR 0(10,R2),0(R3) 00BF9C DC09 2000 3000 00000 00000 15177+ TR 0(10,R2),0(R3) 15178+* 00BFA2 06FB 15179 BCTR R15,R11 15180 TSIMRET 00BFA4 58F0 C170 0BFC0 15181+ L R15,=A(SAVETST) R15 := current save area 00BFA8 58DF 0004 00004 15182+ L R13,4(R15) get old save area back 00BFAC 98EC D00C 0000C 15183+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00BFB0 07FE 15184+ BR 14 RETURN 02000000 15185 * 00BFB2 D8E6C5D9E3E8E4C9 15186 T252V DC C'QWERTYUIOP' 15187 TSIMEND 00BFC0 15188+ LTORG 00BFC0 00000458 15189 =A(SAVETST) 00BFC4 000023E8 15190 =A(TRTBLINV) 0BFC8 15191+T252TEND EQU * 15192 * 15193 * Test 253 -- TR m,m (100c) -------------------------------- 15194 * 15195 TSIMBEG T253,1600,20,1,C'TR m,m (100c)' 15196+* 003064 15197+TDSCDAT CSECT 003068 15198+ DS 0D 15199+* 003068 0000BFC8 15200+T253TDSC DC A(T253) // TENTRY 00306C 00000120 15201+ DC A(T253TEND-T253) // TLENGTH PAGE 279 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003070 00000640 15202+ DC F'1600' // TLRCNT 003074 00000014 15203+ DC F'20' // TIGCNT 003078 00000001 15204+ DC F'1' // TLTYPE 00153D 15205+TEXT CSECT 00153D E3F2F5F3 15206+SPTR1240 DC C'T253' 00307C 15207+TDSCDAT CSECT 00307C 15208+ DS 0F 00307C 0400153D 15209+ DC AL1(L'SPTR1240),AL3(SPTR1240) 001541 15210+TEXT CSECT 001541 E3D940946B94404D 15211+SPTR1241 DC C'TR m,m (100c)' 003080 15212+TDSCDAT CSECT 003080 15213+ DS 0F 003080 0D001541 15214+ DC AL1(L'SPTR1241),AL3(SPTR1241) 15215+* 004B38 15216+TDSCTBL CSECT 04B38 15217+T253TPTR EQU * 004B38 00003068 15218+ DC A(T253TDSC) enabled test 15219+* 00BFC8 15220+TCODE CSECT 00BFC8 15221+ DS 0D ensure double word alignment for test 00BFC8 15222+T253 DS 0H 01650000 00BFC8 90EC D00C 0000C 15223+ STM 14,12,12(13) SAVE REGISTERS 02950000 00BFCC 18CF 15224+ LR R12,R15 base register := entry address 0BFC8 15225+ USING T253,R12 declare code base register 00BFCE 41B0 C026 0BFEE 15226+ LA R11,T253L load loop target to R11 00BFD2 58F0 C118 0C0E0 15227+ L R15,=A(SAVETST) R15 := current save area 00BFD6 50DF 0004 00004 15228+ ST R13,4(R15) set back pointer in current save area 00BFDA 182D 15229+ LR R2,R13 remember callers save area 00BFDC 18DF 15230+ LR R13,R15 setup current save area 00BFDE 50D2 0008 00008 15231+ ST R13,8(R2) set forw pointer in callers save area 00000 15232+ USING TDSC,R1 declare TDSC base register 00BFE2 58F0 1008 00008 15233+ L R15,TLRCNT load local repeat count to R15 15234+* 15235 * 00BFE6 4120 C0AE 0C076 15236 LA R2,T253V 00BFEA 5830 C11C 0C0E4 15237 L R3,=A(TRTBLINV) 15238 T253L REPINS TR,(0(100,R2),0(R3)) repeat: TR 0(100,R2),0(R3) 15239+* 15240+* build from sublist &ALIST a comma separated string &ARGS 15241+* 15242+* 15243+* 15244+* 15245+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 15246+* this allows to transfer the repeat count from last TDSCGEN call 15247+* 15248+* 0BFEE 15249+T253L EQU * 15250+* 15251+* write a comment indicating what REPINS does (in case NOGEN in effect) 15252+* 15253+*,// REPINS: do 20 times: 15254+* 15255+* MNOTE requires that ' is doubled for expanded variables 15256+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 280 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 15257+* 15258+* 15259+*,// TR 0(100,R2),0(R3) 15260+* 15261+* finally generate code: &ICNT copies of &CODE &ARGS 15262+* 00BFEE DC63 2000 3000 00000 00000 15263+ TR 0(100,R2),0(R3) 00BFF4 DC63 2000 3000 00000 00000 15264+ TR 0(100,R2),0(R3) 00BFFA DC63 2000 3000 00000 00000 15265+ TR 0(100,R2),0(R3) 00C000 DC63 2000 3000 00000 00000 15266+ TR 0(100,R2),0(R3) 00C006 DC63 2000 3000 00000 00000 15267+ TR 0(100,R2),0(R3) 00C00C DC63 2000 3000 00000 00000 15268+ TR 0(100,R2),0(R3) 00C012 DC63 2000 3000 00000 00000 15269+ TR 0(100,R2),0(R3) 00C018 DC63 2000 3000 00000 00000 15270+ TR 0(100,R2),0(R3) 00C01E DC63 2000 3000 00000 00000 15271+ TR 0(100,R2),0(R3) 00C024 DC63 2000 3000 00000 00000 15272+ TR 0(100,R2),0(R3) 00C02A DC63 2000 3000 00000 00000 15273+ TR 0(100,R2),0(R3) 00C030 DC63 2000 3000 00000 00000 15274+ TR 0(100,R2),0(R3) 00C036 DC63 2000 3000 00000 00000 15275+ TR 0(100,R2),0(R3) 00C03C DC63 2000 3000 00000 00000 15276+ TR 0(100,R2),0(R3) 00C042 DC63 2000 3000 00000 00000 15277+ TR 0(100,R2),0(R3) 00C048 DC63 2000 3000 00000 00000 15278+ TR 0(100,R2),0(R3) 00C04E DC63 2000 3000 00000 00000 15279+ TR 0(100,R2),0(R3) 00C054 DC63 2000 3000 00000 00000 15280+ TR 0(100,R2),0(R3) 00C05A DC63 2000 3000 00000 00000 15281+ TR 0(100,R2),0(R3) 00C060 DC63 2000 3000 00000 00000 15282+ TR 0(100,R2),0(R3) 15283+* 00C066 06FB 15284 BCTR R15,R11 15285 TSIMRET 00C068 58F0 C118 0C0E0 15286+ L R15,=A(SAVETST) R15 := current save area 00C06C 58DF 0004 00004 15287+ L R13,4(R15) get old save area back 00C070 98EC D00C 0000C 15288+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00C074 07FE 15289+ BR 14 RETURN 02000000 15290 * 00C076 D8E6C5D9E3E8E4C9 15291 T253V DC C'QWERTYUIOPASDFGHJKLZXCVBN' 00C08F D5D4F1F2F3F4F5F6 15292 DC C'NM1234567890-=:<,>.?/!@#$' 00C0A8 6C5C4D5D6D604E7E 15293 DC C'%*()_-+=qwertyuiopasdfghj' 00C0C1 9293A9A783A58295 15294 DC C'klzxcvbnm9876543210!@#$%*' 15295 TSIMEND 00C0E0 15296+ LTORG 00C0E0 00000458 15297 =A(SAVETST) 00C0E4 000023E8 15298 =A(TRTBLINV) 0C0E8 15299+T253TEND EQU * 15300 * 15301 * Test 254 -- TR m,m (250c) -------------------------------- 15302 * 15303 TSIMBEG T254,700,20,1,C'TR m,m (250c)' 15304+* 003084 15305+TDSCDAT CSECT 003088 15306+ DS 0D 15307+* 003088 0000C0E8 15308+T254TDSC DC A(T254) // TENTRY 00308C 000001B0 15309+ DC A(T254TEND-T254) // TLENGTH 003090 000002BC 15310+ DC F'700' // TLRCNT 003094 00000014 15311+ DC F'20' // TIGCNT PAGE 281 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003098 00000001 15312+ DC F'1' // TLTYPE 00154E 15313+TEXT CSECT 00154E E3F2F5F4 15314+SPTR1252 DC C'T254' 00309C 15315+TDSCDAT CSECT 00309C 15316+ DS 0F 00309C 0400154E 15317+ DC AL1(L'SPTR1252),AL3(SPTR1252) 001552 15318+TEXT CSECT 001552 E3D940946B94404D 15319+SPTR1253 DC C'TR m,m (250c)' 0030A0 15320+TDSCDAT CSECT 0030A0 15321+ DS 0F 0030A0 0D001552 15322+ DC AL1(L'SPTR1253),AL3(SPTR1253) 15323+* 004B3C 15324+TDSCTBL CSECT 04B3C 15325+T254TPTR EQU * 004B3C 00003088 15326+ DC A(T254TDSC) enabled test 15327+* 00C0E8 15328+TCODE CSECT 00C0E8 15329+ DS 0D ensure double word alignment for test 00C0E8 15330+T254 DS 0H 01650000 00C0E8 90EC D00C 0000C 15331+ STM 14,12,12(13) SAVE REGISTERS 02950000 00C0EC 18CF 15332+ LR R12,R15 base register := entry address 0C0E8 15333+ USING T254,R12 declare code base register 00C0EE 41B0 C026 0C10E 15334+ LA R11,T254L load loop target to R11 00C0F2 58F0 C1A8 0C290 15335+ L R15,=A(SAVETST) R15 := current save area 00C0F6 50DF 0004 00004 15336+ ST R13,4(R15) set back pointer in current save area 00C0FA 182D 15337+ LR R2,R13 remember callers save area 00C0FC 18DF 15338+ LR R13,R15 setup current save area 00C0FE 50D2 0008 00008 15339+ ST R13,8(R2) set forw pointer in callers save area 00000 15340+ USING TDSC,R1 declare TDSC base register 00C102 58F0 1008 00008 15341+ L R15,TLRCNT load local repeat count to R15 15342+* 15343 * 00C106 4120 C0AE 0C196 15344 LA R2,T254V 00C10A 5830 C1AC 0C294 15345 L R3,=A(TRTBLINV) 15346 T254L REPINS TR,(0(250,R2),0(R3)) repeat: TR 0(250,R2),0(R3) 15347+* 15348+* build from sublist &ALIST a comma separated string &ARGS 15349+* 15350+* 15351+* 15352+* 15353+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 15354+* this allows to transfer the repeat count from last TDSCGEN call 15355+* 15356+* 0C10E 15357+T254L EQU * 15358+* 15359+* write a comment indicating what REPINS does (in case NOGEN in effect) 15360+* 15361+*,// REPINS: do 20 times: 15362+* 15363+* MNOTE requires that ' is doubled for expanded variables 15364+* thus build &MASTR as a copy of '&ARGS with ' doubled 15365+* 15366+* PAGE 282 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 15367+*,// TR 0(250,R2),0(R3) 15368+* 15369+* finally generate code: &ICNT copies of &CODE &ARGS 15370+* 00C10E DCF9 2000 3000 00000 00000 15371+ TR 0(250,R2),0(R3) 00C114 DCF9 2000 3000 00000 00000 15372+ TR 0(250,R2),0(R3) 00C11A DCF9 2000 3000 00000 00000 15373+ TR 0(250,R2),0(R3) 00C120 DCF9 2000 3000 00000 00000 15374+ TR 0(250,R2),0(R3) 00C126 DCF9 2000 3000 00000 00000 15375+ TR 0(250,R2),0(R3) 00C12C DCF9 2000 3000 00000 00000 15376+ TR 0(250,R2),0(R3) 00C132 DCF9 2000 3000 00000 00000 15377+ TR 0(250,R2),0(R3) 00C138 DCF9 2000 3000 00000 00000 15378+ TR 0(250,R2),0(R3) 00C13E DCF9 2000 3000 00000 00000 15379+ TR 0(250,R2),0(R3) 00C144 DCF9 2000 3000 00000 00000 15380+ TR 0(250,R2),0(R3) 00C14A DCF9 2000 3000 00000 00000 15381+ TR 0(250,R2),0(R3) 00C150 DCF9 2000 3000 00000 00000 15382+ TR 0(250,R2),0(R3) 00C156 DCF9 2000 3000 00000 00000 15383+ TR 0(250,R2),0(R3) 00C15C DCF9 2000 3000 00000 00000 15384+ TR 0(250,R2),0(R3) 00C162 DCF9 2000 3000 00000 00000 15385+ TR 0(250,R2),0(R3) 00C168 DCF9 2000 3000 00000 00000 15386+ TR 0(250,R2),0(R3) 00C16E DCF9 2000 3000 00000 00000 15387+ TR 0(250,R2),0(R3) 00C174 DCF9 2000 3000 00000 00000 15388+ TR 0(250,R2),0(R3) 00C17A DCF9 2000 3000 00000 00000 15389+ TR 0(250,R2),0(R3) 00C180 DCF9 2000 3000 00000 00000 15390+ TR 0(250,R2),0(R3) 15391+* 00C186 06FB 15392 BCTR R15,R11 15393 TSIMRET 00C188 58F0 C1A8 0C290 15394+ L R15,=A(SAVETST) R15 := current save area 00C18C 58DF 0004 00004 15395+ L R13,4(R15) get old save area back 00C190 98EC D00C 0000C 15396+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00C194 07FE 15397+ BR 14 RETURN 02000000 15398 * 00C196 D8E6C5D9E3E8E4C9 15399 T254V DC C'QWERTYUIOPASDFGHJKLZXCVBN' 00C1AF D5D4F1F2F3F4F5F6 15400 DC C'NM1234567890-=:<,>.?/!@#$' 00C1C8 6C5C4D5D6D604E7E 15401 DC C'%*()_-+=qwertyuiopasdfghj' 00C1E1 9293A9A783A58295 15402 DC C'klzxcvbnm9876543210!@#$%*' 00C1FA D8E6C5D9E3E8E4C9 15403 DC C'QWERTYUIOPASDFGHJKLZXCVBN' 00C213 D5D4F1F2F3F4F5F6 15404 DC C'NM1234567890-=:<,>.?/!@#$' 00C22C 6C5C4D5D6D604E7E 15405 DC C'%*()_-+=qwertyuiopasdfghj' 00C245 9293A9A783A58295 15406 DC C'klzxcvbnm9876543210!@#$%*' 00C25E D8E6C5D9E3E8E4C9 15407 DC C'QWERTYUIOPASDFGHJKLZXCVBN' 00C277 D5D4F1F2F3F4F5F6 15408 DC C'NM1234567890-=:<,>.?/!@#$' 15409 TSIMEND 00C290 15410+ LTORG 00C290 00000458 15411 =A(SAVETST) 00C294 000023E8 15412 =A(TRTBLINV) 0C298 15413+T254TEND EQU * 15414 * 15415 * Test 255 -- TRT m,m (10c,zero) --------------------------- 15416 * test TRT with an all-zero function table 15417 * 15418 TSIMBEG T255,1200,50,1,C'TRT m,m (10c,zero)' 15419+* 0030A4 15420+TDSCDAT CSECT 0030A8 15421+ DS 0D PAGE 283 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 15422+* 0030A8 0000C298 15423+T255TDSC DC A(T255) // TENTRY 0030AC 00000270 15424+ DC A(T255TEND-T255) // TLENGTH 0030B0 000004B0 15425+ DC F'1200' // TLRCNT 0030B4 00000032 15426+ DC F'50' // TIGCNT 0030B8 00000001 15427+ DC F'1' // TLTYPE 00155F 15428+TEXT CSECT 00155F E3F2F5F5 15429+SPTR1264 DC C'T255' 0030BC 15430+TDSCDAT CSECT 0030BC 15431+ DS 0F 0030BC 0400155F 15432+ DC AL1(L'SPTR1264),AL3(SPTR1264) 001563 15433+TEXT CSECT 001563 E3D9E340946B9440 15434+SPTR1265 DC C'TRT m,m (10c,zero)' 0030C0 15435+TDSCDAT CSECT 0030C0 15436+ DS 0F 0030C0 12001563 15437+ DC AL1(L'SPTR1265),AL3(SPTR1265) 15438+* 004B40 15439+TDSCTBL CSECT 04B40 15440+T255TPTR EQU * 004B40 000030A8 15441+ DC A(T255TDSC) enabled test 15442+* 00C298 15443+TCODE CSECT 00C298 15444+ DS 0D ensure double word alignment for test 00C298 15445+T255 DS 0H 01650000 00C298 90EC D00C 0000C 15446+ STM 14,12,12(13) SAVE REGISTERS 02950000 00C29C 18CF 15447+ LR R12,R15 base register := entry address 0C298 15448+ USING T255,R12 declare code base register 00C29E 41B0 C026 0C2BE 15449+ LA R11,T255L load loop target to R11 00C2A2 58F0 C268 0C500 15450+ L R15,=A(SAVETST) R15 := current save area 00C2A6 50DF 0004 00004 15451+ ST R13,4(R15) set back pointer in current save area 00C2AA 182D 15452+ LR R2,R13 remember callers save area 00C2AC 18DF 15453+ LR R13,R15 setup current save area 00C2AE 50D2 0008 00008 15454+ ST R13,8(R2) set forw pointer in callers save area 00000 15455+ USING TDSC,R1 declare TDSC base register 00C2B2 58F0 1008 00008 15456+ L R15,TLRCNT load local repeat count to R15 15457+* 15458 * 00C2B6 5840 C26C 0C504 15459 L R4,=A(TRTBLINV) 00C2BA 4150 C162 0C3FA 15460 LA R5,T255V 15461 T255L REPINS TRT,(0(10,R4),0(R5)) repeat: TRT 0(10,R4),0(R5) 15462+* 15463+* build from sublist &ALIST a comma separated string &ARGS 15464+* 15465+* 15466+* 15467+* 15468+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 15469+* this allows to transfer the repeat count from last TDSCGEN call 15470+* 15471+* 0C2BE 15472+T255L EQU * 15473+* 15474+* write a comment indicating what REPINS does (in case NOGEN in effect) 15475+* 15476+*,// REPINS: do 50 times: PAGE 284 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 15477+* 15478+* MNOTE requires that ' is doubled for expanded variables 15479+* thus build &MASTR as a copy of '&ARGS with ' doubled 15480+* 15481+* 15482+*,// TRT 0(10,R4),0(R5) 15483+* 15484+* finally generate code: &ICNT copies of &CODE &ARGS 15485+* 00C2BE DD09 4000 5000 00000 00000 15486+ TRT 0(10,R4),0(R5) 00C2C4 DD09 4000 5000 00000 00000 15487+ TRT 0(10,R4),0(R5) 00C2CA DD09 4000 5000 00000 00000 15488+ TRT 0(10,R4),0(R5) 00C2D0 DD09 4000 5000 00000 00000 15489+ TRT 0(10,R4),0(R5) 00C2D6 DD09 4000 5000 00000 00000 15490+ TRT 0(10,R4),0(R5) 00C2DC DD09 4000 5000 00000 00000 15491+ TRT 0(10,R4),0(R5) 00C2E2 DD09 4000 5000 00000 00000 15492+ TRT 0(10,R4),0(R5) 00C2E8 DD09 4000 5000 00000 00000 15493+ TRT 0(10,R4),0(R5) 00C2EE DD09 4000 5000 00000 00000 15494+ TRT 0(10,R4),0(R5) 00C2F4 DD09 4000 5000 00000 00000 15495+ TRT 0(10,R4),0(R5) 00C2FA DD09 4000 5000 00000 00000 15496+ TRT 0(10,R4),0(R5) 00C300 DD09 4000 5000 00000 00000 15497+ TRT 0(10,R4),0(R5) 00C306 DD09 4000 5000 00000 00000 15498+ TRT 0(10,R4),0(R5) 00C30C DD09 4000 5000 00000 00000 15499+ TRT 0(10,R4),0(R5) 00C312 DD09 4000 5000 00000 00000 15500+ TRT 0(10,R4),0(R5) 00C318 DD09 4000 5000 00000 00000 15501+ TRT 0(10,R4),0(R5) 00C31E DD09 4000 5000 00000 00000 15502+ TRT 0(10,R4),0(R5) 00C324 DD09 4000 5000 00000 00000 15503+ TRT 0(10,R4),0(R5) 00C32A DD09 4000 5000 00000 00000 15504+ TRT 0(10,R4),0(R5) 00C330 DD09 4000 5000 00000 00000 15505+ TRT 0(10,R4),0(R5) 00C336 DD09 4000 5000 00000 00000 15506+ TRT 0(10,R4),0(R5) 00C33C DD09 4000 5000 00000 00000 15507+ TRT 0(10,R4),0(R5) 00C342 DD09 4000 5000 00000 00000 15508+ TRT 0(10,R4),0(R5) 00C348 DD09 4000 5000 00000 00000 15509+ TRT 0(10,R4),0(R5) 00C34E DD09 4000 5000 00000 00000 15510+ TRT 0(10,R4),0(R5) 00C354 DD09 4000 5000 00000 00000 15511+ TRT 0(10,R4),0(R5) 00C35A DD09 4000 5000 00000 00000 15512+ TRT 0(10,R4),0(R5) 00C360 DD09 4000 5000 00000 00000 15513+ TRT 0(10,R4),0(R5) 00C366 DD09 4000 5000 00000 00000 15514+ TRT 0(10,R4),0(R5) 00C36C DD09 4000 5000 00000 00000 15515+ TRT 0(10,R4),0(R5) 00C372 DD09 4000 5000 00000 00000 15516+ TRT 0(10,R4),0(R5) 00C378 DD09 4000 5000 00000 00000 15517+ TRT 0(10,R4),0(R5) 00C37E DD09 4000 5000 00000 00000 15518+ TRT 0(10,R4),0(R5) 00C384 DD09 4000 5000 00000 00000 15519+ TRT 0(10,R4),0(R5) 00C38A DD09 4000 5000 00000 00000 15520+ TRT 0(10,R4),0(R5) 00C390 DD09 4000 5000 00000 00000 15521+ TRT 0(10,R4),0(R5) 00C396 DD09 4000 5000 00000 00000 15522+ TRT 0(10,R4),0(R5) 00C39C DD09 4000 5000 00000 00000 15523+ TRT 0(10,R4),0(R5) 00C3A2 DD09 4000 5000 00000 00000 15524+ TRT 0(10,R4),0(R5) 00C3A8 DD09 4000 5000 00000 00000 15525+ TRT 0(10,R4),0(R5) 00C3AE DD09 4000 5000 00000 00000 15526+ TRT 0(10,R4),0(R5) 00C3B4 DD09 4000 5000 00000 00000 15527+ TRT 0(10,R4),0(R5) 00C3BA DD09 4000 5000 00000 00000 15528+ TRT 0(10,R4),0(R5) 00C3C0 DD09 4000 5000 00000 00000 15529+ TRT 0(10,R4),0(R5) 00C3C6 DD09 4000 5000 00000 00000 15530+ TRT 0(10,R4),0(R5) 00C3CC DD09 4000 5000 00000 00000 15531+ TRT 0(10,R4),0(R5) PAGE 285 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00C3D2 DD09 4000 5000 00000 00000 15532+ TRT 0(10,R4),0(R5) 00C3D8 DD09 4000 5000 00000 00000 15533+ TRT 0(10,R4),0(R5) 00C3DE DD09 4000 5000 00000 00000 15534+ TRT 0(10,R4),0(R5) 00C3E4 DD09 4000 5000 00000 00000 15535+ TRT 0(10,R4),0(R5) 15536+* 00C3EA 06FB 15537 BCTR R15,R11 15538 TSIMRET 00C3EC 58F0 C268 0C500 15539+ L R15,=A(SAVETST) R15 := current save area 00C3F0 58DF 0004 00004 15540+ L R13,4(R15) get old save area back 00C3F4 98EC D00C 0000C 15541+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00C3F8 07FE 15542+ BR 14 RETURN 02000000 15543 * 00C3FA 0000000000000000 15544 T255V DC 256X'00' 15545 TSIMEND 00C500 15546+ LTORG 00C500 00000458 15547 =A(SAVETST) 00C504 000023E8 15548 =A(TRTBLINV) 0C508 15549+T255TEND EQU * 15550 * 15551 * Test 256 -- TRT m,m (100c,zero) -------------------------- 15552 * test TRT with an all-zero function table 15553 * 15554 TSIMBEG T256,300,20,1,C'TRT m,m (100c,zero)' 15555+* 0030C4 15556+TDSCDAT CSECT 0030C8 15557+ DS 0D 15558+* 0030C8 0000C508 15559+T256TDSC DC A(T256) // TENTRY 0030CC 000001B8 15560+ DC A(T256TEND-T256) // TLENGTH 0030D0 0000012C 15561+ DC F'300' // TLRCNT 0030D4 00000014 15562+ DC F'20' // TIGCNT 0030D8 00000001 15563+ DC F'1' // TLTYPE 001575 15564+TEXT CSECT 001575 E3F2F5F6 15565+SPTR1276 DC C'T256' 0030DC 15566+TDSCDAT CSECT 0030DC 15567+ DS 0F 0030DC 04001575 15568+ DC AL1(L'SPTR1276),AL3(SPTR1276) 001579 15569+TEXT CSECT 001579 E3D9E340946B9440 15570+SPTR1277 DC C'TRT m,m (100c,zero)' 0030E0 15571+TDSCDAT CSECT 0030E0 15572+ DS 0F 0030E0 13001579 15573+ DC AL1(L'SPTR1277),AL3(SPTR1277) 15574+* 004B44 15575+TDSCTBL CSECT 04B44 15576+T256TPTR EQU * 004B44 000030C8 15577+ DC A(T256TDSC) enabled test 15578+* 00C508 15579+TCODE CSECT 00C508 15580+ DS 0D ensure double word alignment for test 00C508 15581+T256 DS 0H 01650000 00C508 90EC D00C 0000C 15582+ STM 14,12,12(13) SAVE REGISTERS 02950000 00C50C 18CF 15583+ LR R12,R15 base register := entry address 0C508 15584+ USING T256,R12 declare code base register 00C50E 41B0 C026 0C52E 15585+ LA R11,T256L load loop target to R11 00C512 58F0 C1B0 0C6B8 15586+ L R15,=A(SAVETST) R15 := current save area PAGE 286 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00C516 50DF 0004 00004 15587+ ST R13,4(R15) set back pointer in current save area 00C51A 182D 15588+ LR R2,R13 remember callers save area 00C51C 18DF 15589+ LR R13,R15 setup current save area 00C51E 50D2 0008 00008 15590+ ST R13,8(R2) set forw pointer in callers save area 00000 15591+ USING TDSC,R1 declare TDSC base register 00C522 58F0 1008 00008 15592+ L R15,TLRCNT load local repeat count to R15 15593+* 15594 * 00C526 5840 C1B4 0C6BC 15595 L R4,=A(TRTBLINV) 00C52A 4150 C0AE 0C5B6 15596 LA R5,T256V 15597 T256L REPINS TRT,(0(100,R4),0(R5)) repeat: TRT 0(100,R4),0(R5) 15598+* 15599+* build from sublist &ALIST a comma separated string &ARGS 15600+* 15601+* 15602+* 15603+* 15604+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 15605+* this allows to transfer the repeat count from last TDSCGEN call 15606+* 15607+* 0C52E 15608+T256L EQU * 15609+* 15610+* write a comment indicating what REPINS does (in case NOGEN in effect) 15611+* 15612+*,// REPINS: do 20 times: 15613+* 15614+* MNOTE requires that ' is doubled for expanded variables 15615+* thus build &MASTR as a copy of '&ARGS with ' doubled 15616+* 15617+* 15618+*,// TRT 0(100,R4),0(R5) 15619+* 15620+* finally generate code: &ICNT copies of &CODE &ARGS 15621+* 00C52E DD63 4000 5000 00000 00000 15622+ TRT 0(100,R4),0(R5) 00C534 DD63 4000 5000 00000 00000 15623+ TRT 0(100,R4),0(R5) 00C53A DD63 4000 5000 00000 00000 15624+ TRT 0(100,R4),0(R5) 00C540 DD63 4000 5000 00000 00000 15625+ TRT 0(100,R4),0(R5) 00C546 DD63 4000 5000 00000 00000 15626+ TRT 0(100,R4),0(R5) 00C54C DD63 4000 5000 00000 00000 15627+ TRT 0(100,R4),0(R5) 00C552 DD63 4000 5000 00000 00000 15628+ TRT 0(100,R4),0(R5) 00C558 DD63 4000 5000 00000 00000 15629+ TRT 0(100,R4),0(R5) 00C55E DD63 4000 5000 00000 00000 15630+ TRT 0(100,R4),0(R5) 00C564 DD63 4000 5000 00000 00000 15631+ TRT 0(100,R4),0(R5) 00C56A DD63 4000 5000 00000 00000 15632+ TRT 0(100,R4),0(R5) 00C570 DD63 4000 5000 00000 00000 15633+ TRT 0(100,R4),0(R5) 00C576 DD63 4000 5000 00000 00000 15634+ TRT 0(100,R4),0(R5) 00C57C DD63 4000 5000 00000 00000 15635+ TRT 0(100,R4),0(R5) 00C582 DD63 4000 5000 00000 00000 15636+ TRT 0(100,R4),0(R5) 00C588 DD63 4000 5000 00000 00000 15637+ TRT 0(100,R4),0(R5) 00C58E DD63 4000 5000 00000 00000 15638+ TRT 0(100,R4),0(R5) 00C594 DD63 4000 5000 00000 00000 15639+ TRT 0(100,R4),0(R5) 00C59A DD63 4000 5000 00000 00000 15640+ TRT 0(100,R4),0(R5) 00C5A0 DD63 4000 5000 00000 00000 15641+ TRT 0(100,R4),0(R5) PAGE 287 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 15642+* 00C5A6 06FB 15643 BCTR R15,R11 15644 TSIMRET 00C5A8 58F0 C1B0 0C6B8 15645+ L R15,=A(SAVETST) R15 := current save area 00C5AC 58DF 0004 00004 15646+ L R13,4(R15) get old save area back 00C5B0 98EC D00C 0000C 15647+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00C5B4 07FE 15648+ BR 14 RETURN 02000000 15649 * 00C5B6 0000000000000000 15650 T256V DC 256X'00' 15651 TSIMEND 00C6B8 15652+ LTORG 00C6B8 00000458 15653 =A(SAVETST) 00C6BC 000023E8 15654 =A(TRTBLINV) 0C6C0 15655+T256TEND EQU * 15656 * 15657 * Test 257 -- TRT m,m (250c,zero) -------------------------- 15658 * test TRT with an all-zero function table 15659 * 15660 TSIMBEG T257,130,20,1,C'TRT m,m (250c,zero)' 15661+* 0030E4 15662+TDSCDAT CSECT 0030E8 15663+ DS 0D 15664+* 0030E8 0000C6C0 15665+T257TDSC DC A(T257) // TENTRY 0030EC 000001B8 15666+ DC A(T257TEND-T257) // TLENGTH 0030F0 00000082 15667+ DC F'130' // TLRCNT 0030F4 00000014 15668+ DC F'20' // TIGCNT 0030F8 00000001 15669+ DC F'1' // TLTYPE 00158C 15670+TEXT CSECT 00158C E3F2F5F7 15671+SPTR1288 DC C'T257' 0030FC 15672+TDSCDAT CSECT 0030FC 15673+ DS 0F 0030FC 0400158C 15674+ DC AL1(L'SPTR1288),AL3(SPTR1288) 001590 15675+TEXT CSECT 001590 E3D9E340946B9440 15676+SPTR1289 DC C'TRT m,m (250c,zero)' 003100 15677+TDSCDAT CSECT 003100 15678+ DS 0F 003100 13001590 15679+ DC AL1(L'SPTR1289),AL3(SPTR1289) 15680+* 004B48 15681+TDSCTBL CSECT 04B48 15682+T257TPTR EQU * 004B48 000030E8 15683+ DC A(T257TDSC) enabled test 15684+* 00C6C0 15685+TCODE CSECT 00C6C0 15686+ DS 0D ensure double word alignment for test 00C6C0 15687+T257 DS 0H 01650000 00C6C0 90EC D00C 0000C 15688+ STM 14,12,12(13) SAVE REGISTERS 02950000 00C6C4 18CF 15689+ LR R12,R15 base register := entry address 0C6C0 15690+ USING T257,R12 declare code base register 00C6C6 41B0 C026 0C6E6 15691+ LA R11,T257L load loop target to R11 00C6CA 58F0 C1B0 0C870 15692+ L R15,=A(SAVETST) R15 := current save area 00C6CE 50DF 0004 00004 15693+ ST R13,4(R15) set back pointer in current save area 00C6D2 182D 15694+ LR R2,R13 remember callers save area 00C6D4 18DF 15695+ LR R13,R15 setup current save area 00C6D6 50D2 0008 00008 15696+ ST R13,8(R2) set forw pointer in callers save area PAGE 288 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00000 15697+ USING TDSC,R1 declare TDSC base register 00C6DA 58F0 1008 00008 15698+ L R15,TLRCNT load local repeat count to R15 15699+* 15700 * 00C6DE 5840 C1B4 0C874 15701 L R4,=A(TRTBLINV) 00C6E2 4150 C0AE 0C76E 15702 LA R5,T257V 15703 T257L REPINS TRT,(0(250,R4),0(R5)) repeat: TRT 0(250,R4),0(R5) 15704+* 15705+* build from sublist &ALIST a comma separated string &ARGS 15706+* 15707+* 15708+* 15709+* 15710+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 15711+* this allows to transfer the repeat count from last TDSCGEN call 15712+* 15713+* 0C6E6 15714+T257L EQU * 15715+* 15716+* write a comment indicating what REPINS does (in case NOGEN in effect) 15717+* 15718+*,// REPINS: do 20 times: 15719+* 15720+* MNOTE requires that ' is doubled for expanded variables 15721+* thus build &MASTR as a copy of '&ARGS with ' doubled 15722+* 15723+* 15724+*,// TRT 0(250,R4),0(R5) 15725+* 15726+* finally generate code: &ICNT copies of &CODE &ARGS 15727+* 00C6E6 DDF9 4000 5000 00000 00000 15728+ TRT 0(250,R4),0(R5) 00C6EC DDF9 4000 5000 00000 00000 15729+ TRT 0(250,R4),0(R5) 00C6F2 DDF9 4000 5000 00000 00000 15730+ TRT 0(250,R4),0(R5) 00C6F8 DDF9 4000 5000 00000 00000 15731+ TRT 0(250,R4),0(R5) 00C6FE DDF9 4000 5000 00000 00000 15732+ TRT 0(250,R4),0(R5) 00C704 DDF9 4000 5000 00000 00000 15733+ TRT 0(250,R4),0(R5) 00C70A DDF9 4000 5000 00000 00000 15734+ TRT 0(250,R4),0(R5) 00C710 DDF9 4000 5000 00000 00000 15735+ TRT 0(250,R4),0(R5) 00C716 DDF9 4000 5000 00000 00000 15736+ TRT 0(250,R4),0(R5) 00C71C DDF9 4000 5000 00000 00000 15737+ TRT 0(250,R4),0(R5) 00C722 DDF9 4000 5000 00000 00000 15738+ TRT 0(250,R4),0(R5) 00C728 DDF9 4000 5000 00000 00000 15739+ TRT 0(250,R4),0(R5) 00C72E DDF9 4000 5000 00000 00000 15740+ TRT 0(250,R4),0(R5) 00C734 DDF9 4000 5000 00000 00000 15741+ TRT 0(250,R4),0(R5) 00C73A DDF9 4000 5000 00000 00000 15742+ TRT 0(250,R4),0(R5) 00C740 DDF9 4000 5000 00000 00000 15743+ TRT 0(250,R4),0(R5) 00C746 DDF9 4000 5000 00000 00000 15744+ TRT 0(250,R4),0(R5) 00C74C DDF9 4000 5000 00000 00000 15745+ TRT 0(250,R4),0(R5) 00C752 DDF9 4000 5000 00000 00000 15746+ TRT 0(250,R4),0(R5) 00C758 DDF9 4000 5000 00000 00000 15747+ TRT 0(250,R4),0(R5) 15748+* 00C75E 06FB 15749 BCTR R15,R11 15750 TSIMRET 00C760 58F0 C1B0 0C870 15751+ L R15,=A(SAVETST) R15 := current save area PAGE 289 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00C764 58DF 0004 00004 15752+ L R13,4(R15) get old save area back 00C768 98EC D00C 0000C 15753+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00C76C 07FE 15754+ BR 14 RETURN 02000000 15755 * 00C76E 0000000000000000 15756 T257V DC 256X'00' 15757 TSIMEND 00C870 15758+ LTORG 00C870 00000458 15759 =A(SAVETST) 00C874 000023E8 15760 =A(TRTBLINV) 0C878 15761+T257TEND EQU * 15762 * 15763 * Test 258 -- TRT m,m (250c,10b) --------------------------- 15764 * test TRT with a function table with match for 11th source byte 15765 * 15766 TSIMBEG T258,2500,20,1,C'TRT m,m (250c,10b)' 15767+* 003104 15768+TDSCDAT CSECT 003108 15769+ DS 0D 15770+* 003108 0000C878 15771+T258TDSC DC A(T258) // TENTRY 00310C 000001C0 15772+ DC A(T258TEND-T258) // TLENGTH 003110 000009C4 15773+ DC F'2500' // TLRCNT 003114 00000014 15774+ DC F'20' // TIGCNT 003118 00000001 15775+ DC F'1' // TLTYPE 0015A3 15776+TEXT CSECT 0015A3 E3F2F5F8 15777+SPTR1300 DC C'T258' 00311C 15778+TDSCDAT CSECT 00311C 15779+ DS 0F 00311C 040015A3 15780+ DC AL1(L'SPTR1300),AL3(SPTR1300) 0015A7 15781+TEXT CSECT 0015A7 E3D9E340946B9440 15782+SPTR1301 DC C'TRT m,m (250c,10b)' 003120 15783+TDSCDAT CSECT 003120 15784+ DS 0F 003120 120015A7 15785+ DC AL1(L'SPTR1301),AL3(SPTR1301) 15786+* 004B4C 15787+TDSCTBL CSECT 04B4C 15788+T258TPTR EQU * 004B4C 00003108 15789+ DC A(T258TDSC) enabled test 15790+* 00C878 15791+TCODE CSECT 00C878 15792+ DS 0D ensure double word alignment for test 00C878 15793+T258 DS 0H 01650000 00C878 90EC D00C 0000C 15794+ STM 14,12,12(13) SAVE REGISTERS 02950000 00C87C 18CF 15795+ LR R12,R15 base register := entry address 0C878 15796+ USING T258,R12 declare code base register 00C87E 41B0 C02A 0C8A2 15797+ LA R11,T258L load loop target to R11 00C882 58F0 C1B8 0CA30 15798+ L R15,=A(SAVETST) R15 := current save area 00C886 50DF 0004 00004 15799+ ST R13,4(R15) set back pointer in current save area 00C88A 182D 15800+ LR R2,R13 remember callers save area 00C88C 18DF 15801+ LR R13,R15 setup current save area 00C88E 50D2 0008 00008 15802+ ST R13,8(R2) set forw pointer in callers save area 00000 15803+ USING TDSC,R1 declare TDSC base register 00C892 58F0 1008 00008 15804+ L R15,TLRCNT load local repeat count to R15 15805+* 15806 * PAGE 290 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00C896 5840 C1BC 0CA34 15807 L R4,=A(TRTBLINV) 00C89A 4150 C0B2 0C92A 15808 LA R5,T258V 00C89E 92FF 50F5 000F5 15809 MVI 245(R5),X'FF' mark TRTBLINV[10]=0xf5=245 15810 T258L REPINS TRT,(0(250,R4),0(R5)) repeat: TRT 0(250,R4),0(R5) 15811+* 15812+* build from sublist &ALIST a comma separated string &ARGS 15813+* 15814+* 15815+* 15816+* 15817+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 15818+* this allows to transfer the repeat count from last TDSCGEN call 15819+* 15820+* 0C8A2 15821+T258L EQU * 15822+* 15823+* write a comment indicating what REPINS does (in case NOGEN in effect) 15824+* 15825+*,// REPINS: do 20 times: 15826+* 15827+* MNOTE requires that ' is doubled for expanded variables 15828+* thus build &MASTR as a copy of '&ARGS with ' doubled 15829+* 15830+* 15831+*,// TRT 0(250,R4),0(R5) 15832+* 15833+* finally generate code: &ICNT copies of &CODE &ARGS 15834+* 00C8A2 DDF9 4000 5000 00000 00000 15835+ TRT 0(250,R4),0(R5) 00C8A8 DDF9 4000 5000 00000 00000 15836+ TRT 0(250,R4),0(R5) 00C8AE DDF9 4000 5000 00000 00000 15837+ TRT 0(250,R4),0(R5) 00C8B4 DDF9 4000 5000 00000 00000 15838+ TRT 0(250,R4),0(R5) 00C8BA DDF9 4000 5000 00000 00000 15839+ TRT 0(250,R4),0(R5) 00C8C0 DDF9 4000 5000 00000 00000 15840+ TRT 0(250,R4),0(R5) 00C8C6 DDF9 4000 5000 00000 00000 15841+ TRT 0(250,R4),0(R5) 00C8CC DDF9 4000 5000 00000 00000 15842+ TRT 0(250,R4),0(R5) 00C8D2 DDF9 4000 5000 00000 00000 15843+ TRT 0(250,R4),0(R5) 00C8D8 DDF9 4000 5000 00000 00000 15844+ TRT 0(250,R4),0(R5) 00C8DE DDF9 4000 5000 00000 00000 15845+ TRT 0(250,R4),0(R5) 00C8E4 DDF9 4000 5000 00000 00000 15846+ TRT 0(250,R4),0(R5) 00C8EA DDF9 4000 5000 00000 00000 15847+ TRT 0(250,R4),0(R5) 00C8F0 DDF9 4000 5000 00000 00000 15848+ TRT 0(250,R4),0(R5) 00C8F6 DDF9 4000 5000 00000 00000 15849+ TRT 0(250,R4),0(R5) 00C8FC DDF9 4000 5000 00000 00000 15850+ TRT 0(250,R4),0(R5) 00C902 DDF9 4000 5000 00000 00000 15851+ TRT 0(250,R4),0(R5) 00C908 DDF9 4000 5000 00000 00000 15852+ TRT 0(250,R4),0(R5) 00C90E DDF9 4000 5000 00000 00000 15853+ TRT 0(250,R4),0(R5) 00C914 DDF9 4000 5000 00000 00000 15854+ TRT 0(250,R4),0(R5) 15855+* 00C91A 06FB 15856 BCTR R15,R11 15857 TSIMRET 00C91C 58F0 C1B8 0CA30 15858+ L R15,=A(SAVETST) R15 := current save area 00C920 58DF 0004 00004 15859+ L R13,4(R15) get old save area back 00C924 98EC D00C 0000C 15860+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00C928 07FE 15861+ BR 14 RETURN 02000000 PAGE 291 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 15862 * 00C92A 0000000000000000 15863 T258V DC 256X'00' 15864 TSIMEND 00CA30 15865+ LTORG 00CA30 00000458 15866 =A(SAVETST) 00CA34 000023E8 15867 =A(TRTBLINV) 0CA38 15868+T258TEND EQU * 15869 * 15870 * Test 259 -- TRT m,m (250c,100b) -------------------------- 15871 * test TRT with a function table with match for 101th source byte 15872 * 15873 TSIMBEG T259,300,20,1,C'TRT m,m (250c,100b)' 15874+* 003124 15875+TDSCDAT CSECT 003128 15876+ DS 0D 15877+* 003128 0000CA38 15878+T259TDSC DC A(T259) // TENTRY 00312C 000001C0 15879+ DC A(T259TEND-T259) // TLENGTH 003130 0000012C 15880+ DC F'300' // TLRCNT 003134 00000014 15881+ DC F'20' // TIGCNT 003138 00000001 15882+ DC F'1' // TLTYPE 0015B9 15883+TEXT CSECT 0015B9 E3F2F5F9 15884+SPTR1312 DC C'T259' 00313C 15885+TDSCDAT CSECT 00313C 15886+ DS 0F 00313C 040015B9 15887+ DC AL1(L'SPTR1312),AL3(SPTR1312) 0015BD 15888+TEXT CSECT 0015BD E3D9E340946B9440 15889+SPTR1313 DC C'TRT m,m (250c,100b)' 003140 15890+TDSCDAT CSECT 003140 15891+ DS 0F 003140 130015BD 15892+ DC AL1(L'SPTR1313),AL3(SPTR1313) 15893+* 004B50 15894+TDSCTBL CSECT 04B50 15895+T259TPTR EQU * 004B50 00003128 15896+ DC A(T259TDSC) enabled test 15897+* 00CA38 15898+TCODE CSECT 00CA38 15899+ DS 0D ensure double word alignment for test 00CA38 15900+T259 DS 0H 01650000 00CA38 90EC D00C 0000C 15901+ STM 14,12,12(13) SAVE REGISTERS 02950000 00CA3C 18CF 15902+ LR R12,R15 base register := entry address 0CA38 15903+ USING T259,R12 declare code base register 00CA3E 41B0 C02A 0CA62 15904+ LA R11,T259L load loop target to R11 00CA42 58F0 C1B8 0CBF0 15905+ L R15,=A(SAVETST) R15 := current save area 00CA46 50DF 0004 00004 15906+ ST R13,4(R15) set back pointer in current save area 00CA4A 182D 15907+ LR R2,R13 remember callers save area 00CA4C 18DF 15908+ LR R13,R15 setup current save area 00CA4E 50D2 0008 00008 15909+ ST R13,8(R2) set forw pointer in callers save area 00000 15910+ USING TDSC,R1 declare TDSC base register 00CA52 58F0 1008 00008 15911+ L R15,TLRCNT load local repeat count to R15 15912+* 15913 * 00CA56 5840 C1BC 0CBF4 15914 L R4,=A(TRTBLINV) 00CA5A 4150 C0B2 0CAEA 15915 LA R5,T259V 00CA5E 92FF 509B 0009B 15916 MVI 155(R5),X'FF' mark TRTBLINV[100]=0x9b=155 PAGE 292 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 15917 T259L REPINS TRT,(0(250,R4),0(R5)) repeat: TRT 0(250,R4),0(R5) 15918+* 15919+* build from sublist &ALIST a comma separated string &ARGS 15920+* 15921+* 15922+* 15923+* 15924+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 15925+* this allows to transfer the repeat count from last TDSCGEN call 15926+* 15927+* 0CA62 15928+T259L EQU * 15929+* 15930+* write a comment indicating what REPINS does (in case NOGEN in effect) 15931+* 15932+*,// REPINS: do 20 times: 15933+* 15934+* MNOTE requires that ' is doubled for expanded variables 15935+* thus build &MASTR as a copy of '&ARGS with ' doubled 15936+* 15937+* 15938+*,// TRT 0(250,R4),0(R5) 15939+* 15940+* finally generate code: &ICNT copies of &CODE &ARGS 15941+* 00CA62 DDF9 4000 5000 00000 00000 15942+ TRT 0(250,R4),0(R5) 00CA68 DDF9 4000 5000 00000 00000 15943+ TRT 0(250,R4),0(R5) 00CA6E DDF9 4000 5000 00000 00000 15944+ TRT 0(250,R4),0(R5) 00CA74 DDF9 4000 5000 00000 00000 15945+ TRT 0(250,R4),0(R5) 00CA7A DDF9 4000 5000 00000 00000 15946+ TRT 0(250,R4),0(R5) 00CA80 DDF9 4000 5000 00000 00000 15947+ TRT 0(250,R4),0(R5) 00CA86 DDF9 4000 5000 00000 00000 15948+ TRT 0(250,R4),0(R5) 00CA8C DDF9 4000 5000 00000 00000 15949+ TRT 0(250,R4),0(R5) 00CA92 DDF9 4000 5000 00000 00000 15950+ TRT 0(250,R4),0(R5) 00CA98 DDF9 4000 5000 00000 00000 15951+ TRT 0(250,R4),0(R5) 00CA9E DDF9 4000 5000 00000 00000 15952+ TRT 0(250,R4),0(R5) 00CAA4 DDF9 4000 5000 00000 00000 15953+ TRT 0(250,R4),0(R5) 00CAAA DDF9 4000 5000 00000 00000 15954+ TRT 0(250,R4),0(R5) 00CAB0 DDF9 4000 5000 00000 00000 15955+ TRT 0(250,R4),0(R5) 00CAB6 DDF9 4000 5000 00000 00000 15956+ TRT 0(250,R4),0(R5) 00CABC DDF9 4000 5000 00000 00000 15957+ TRT 0(250,R4),0(R5) 00CAC2 DDF9 4000 5000 00000 00000 15958+ TRT 0(250,R4),0(R5) 00CAC8 DDF9 4000 5000 00000 00000 15959+ TRT 0(250,R4),0(R5) 00CACE DDF9 4000 5000 00000 00000 15960+ TRT 0(250,R4),0(R5) 00CAD4 DDF9 4000 5000 00000 00000 15961+ TRT 0(250,R4),0(R5) 15962+* 00CADA 06FB 15963 BCTR R15,R11 15964 TSIMRET 00CADC 58F0 C1B8 0CBF0 15965+ L R15,=A(SAVETST) R15 := current save area 00CAE0 58DF 0004 00004 15966+ L R13,4(R15) get old save area back 00CAE4 98EC D00C 0000C 15967+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00CAE8 07FE 15968+ BR 14 RETURN 02000000 15969 * 00CAEA 0000000000000000 15970 T259V DC 256X'00' 15971 TSIMEND PAGE 293 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00CBF0 15972+ LTORG 00CBF0 00000458 15973 =A(SAVETST) 00CBF4 000023E8 15974 =A(TRTBLINV) 0CBF8 15975+T259TEND EQU * 15976 * 15977 * Test 26x -- compare ====================================== 15978 * 15979 * Test 260 -- CR R,R --------------------------------------- 15980 * 15981 TSIMBEG T260,17000,100,1,C'CR R,R' 15982+* 003144 15983+TDSCDAT CSECT 003148 15984+ DS 0D 15985+* 003148 0000CBF8 15986+T260TDSC DC A(T260) // TENTRY 00314C 00000104 15987+ DC A(T260TEND-T260) // TLENGTH 003150 00004268 15988+ DC F'17000' // TLRCNT 003154 00000064 15989+ DC F'100' // TIGCNT 003158 00000001 15990+ DC F'1' // TLTYPE 0015D0 15991+TEXT CSECT 0015D0 E3F2F6F0 15992+SPTR1324 DC C'T260' 00315C 15993+TDSCDAT CSECT 00315C 15994+ DS 0F 00315C 040015D0 15995+ DC AL1(L'SPTR1324),AL3(SPTR1324) 0015D4 15996+TEXT CSECT 0015D4 C3D940D96BD9 15997+SPTR1325 DC C'CR R,R' 003160 15998+TDSCDAT CSECT 003160 15999+ DS 0F 003160 060015D4 16000+ DC AL1(L'SPTR1325),AL3(SPTR1325) 16001+* 004B54 16002+TDSCTBL CSECT 04B54 16003+T260TPTR EQU * 004B54 00003148 16004+ DC A(T260TDSC) enabled test 16005+* 00CBF8 16006+TCODE CSECT 00CBF8 16007+ DS 0D ensure double word alignment for test 00CBF8 16008+T260 DS 0H 01650000 00CBF8 90EC D00C 0000C 16009+ STM 14,12,12(13) SAVE REGISTERS 02950000 00CBFC 18CF 16010+ LR R12,R15 base register := entry address 0CBF8 16011+ USING T260,R12 declare code base register 00CBFE 41B0 C024 0CC1C 16012+ LA R11,T260L load loop target to R11 00CC02 58F0 C100 0CCF8 16013+ L R15,=A(SAVETST) R15 := current save area 00CC06 50DF 0004 00004 16014+ ST R13,4(R15) set back pointer in current save area 00CC0A 182D 16015+ LR R2,R13 remember callers save area 00CC0C 18DF 16016+ LR R13,R15 setup current save area 00CC0E 50D2 0008 00008 16017+ ST R13,8(R2) set forw pointer in callers save area 00000 16018+ USING TDSC,R1 declare TDSC base register 00CC12 58F0 1008 00008 16019+ L R15,TLRCNT load local repeat count to R15 16020+* 16021 * 00CC16 1722 16022 XR R2,R2 00CC18 4130 0001 00001 16023 LA R3,1 16024 T260L REPINS CR,(R2,R3) repeat: CR R2,R3 16025+* 16026+* build from sublist &ALIST a comma separated string &ARGS PAGE 294 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 16027+* 16028+* 16029+* 16030+* 16031+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 16032+* this allows to transfer the repeat count from last TDSCGEN call 16033+* 16034+* 0CC1C 16035+T260L EQU * 16036+* 16037+* write a comment indicating what REPINS does (in case NOGEN in effect) 16038+* 16039+*,// REPINS: do 100 times: 16040+* 16041+* MNOTE requires that ' is doubled for expanded variables 16042+* thus build &MASTR as a copy of '&ARGS with ' doubled 16043+* 16044+* 16045+*,// CR R2,R3 16046+* 16047+* finally generate code: &ICNT copies of &CODE &ARGS 16048+* 00CC1C 1923 16049+ CR R2,R3 00CC1E 1923 16050+ CR R2,R3 00CC20 1923 16051+ CR R2,R3 00CC22 1923 16052+ CR R2,R3 00CC24 1923 16053+ CR R2,R3 00CC26 1923 16054+ CR R2,R3 00CC28 1923 16055+ CR R2,R3 00CC2A 1923 16056+ CR R2,R3 00CC2C 1923 16057+ CR R2,R3 00CC2E 1923 16058+ CR R2,R3 00CC30 1923 16059+ CR R2,R3 00CC32 1923 16060+ CR R2,R3 00CC34 1923 16061+ CR R2,R3 00CC36 1923 16062+ CR R2,R3 00CC38 1923 16063+ CR R2,R3 00CC3A 1923 16064+ CR R2,R3 00CC3C 1923 16065+ CR R2,R3 00CC3E 1923 16066+ CR R2,R3 00CC40 1923 16067+ CR R2,R3 00CC42 1923 16068+ CR R2,R3 00CC44 1923 16069+ CR R2,R3 00CC46 1923 16070+ CR R2,R3 00CC48 1923 16071+ CR R2,R3 00CC4A 1923 16072+ CR R2,R3 00CC4C 1923 16073+ CR R2,R3 00CC4E 1923 16074+ CR R2,R3 00CC50 1923 16075+ CR R2,R3 00CC52 1923 16076+ CR R2,R3 00CC54 1923 16077+ CR R2,R3 00CC56 1923 16078+ CR R2,R3 00CC58 1923 16079+ CR R2,R3 00CC5A 1923 16080+ CR R2,R3 00CC5C 1923 16081+ CR R2,R3 PAGE 295 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00CC5E 1923 16082+ CR R2,R3 00CC60 1923 16083+ CR R2,R3 00CC62 1923 16084+ CR R2,R3 00CC64 1923 16085+ CR R2,R3 00CC66 1923 16086+ CR R2,R3 00CC68 1923 16087+ CR R2,R3 00CC6A 1923 16088+ CR R2,R3 00CC6C 1923 16089+ CR R2,R3 00CC6E 1923 16090+ CR R2,R3 00CC70 1923 16091+ CR R2,R3 00CC72 1923 16092+ CR R2,R3 00CC74 1923 16093+ CR R2,R3 00CC76 1923 16094+ CR R2,R3 00CC78 1923 16095+ CR R2,R3 00CC7A 1923 16096+ CR R2,R3 00CC7C 1923 16097+ CR R2,R3 00CC7E 1923 16098+ CR R2,R3 00CC80 1923 16099+ CR R2,R3 00CC82 1923 16100+ CR R2,R3 00CC84 1923 16101+ CR R2,R3 00CC86 1923 16102+ CR R2,R3 00CC88 1923 16103+ CR R2,R3 00CC8A 1923 16104+ CR R2,R3 00CC8C 1923 16105+ CR R2,R3 00CC8E 1923 16106+ CR R2,R3 00CC90 1923 16107+ CR R2,R3 00CC92 1923 16108+ CR R2,R3 00CC94 1923 16109+ CR R2,R3 00CC96 1923 16110+ CR R2,R3 00CC98 1923 16111+ CR R2,R3 00CC9A 1923 16112+ CR R2,R3 00CC9C 1923 16113+ CR R2,R3 00CC9E 1923 16114+ CR R2,R3 00CCA0 1923 16115+ CR R2,R3 00CCA2 1923 16116+ CR R2,R3 00CCA4 1923 16117+ CR R2,R3 00CCA6 1923 16118+ CR R2,R3 00CCA8 1923 16119+ CR R2,R3 00CCAA 1923 16120+ CR R2,R3 00CCAC 1923 16121+ CR R2,R3 00CCAE 1923 16122+ CR R2,R3 00CCB0 1923 16123+ CR R2,R3 00CCB2 1923 16124+ CR R2,R3 00CCB4 1923 16125+ CR R2,R3 00CCB6 1923 16126+ CR R2,R3 00CCB8 1923 16127+ CR R2,R3 00CCBA 1923 16128+ CR R2,R3 00CCBC 1923 16129+ CR R2,R3 00CCBE 1923 16130+ CR R2,R3 00CCC0 1923 16131+ CR R2,R3 00CCC2 1923 16132+ CR R2,R3 00CCC4 1923 16133+ CR R2,R3 00CCC6 1923 16134+ CR R2,R3 00CCC8 1923 16135+ CR R2,R3 00CCCA 1923 16136+ CR R2,R3 PAGE 296 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00CCCC 1923 16137+ CR R2,R3 00CCCE 1923 16138+ CR R2,R3 00CCD0 1923 16139+ CR R2,R3 00CCD2 1923 16140+ CR R2,R3 00CCD4 1923 16141+ CR R2,R3 00CCD6 1923 16142+ CR R2,R3 00CCD8 1923 16143+ CR R2,R3 00CCDA 1923 16144+ CR R2,R3 00CCDC 1923 16145+ CR R2,R3 00CCDE 1923 16146+ CR R2,R3 00CCE0 1923 16147+ CR R2,R3 00CCE2 1923 16148+ CR R2,R3 16149+* 00CCE4 06FB 16150 BCTR R15,R11 16151 TSIMRET 00CCE6 58F0 C100 0CCF8 16152+ L R15,=A(SAVETST) R15 := current save area 00CCEA 58DF 0004 00004 16153+ L R13,4(R15) get old save area back 00CCEE 98EC D00C 0000C 16154+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00CCF2 07FE 16155+ BR 14 RETURN 02000000 16156 TSIMEND 00CCF8 16157+ LTORG 00CCF8 00000458 16158 =A(SAVETST) 0CCFC 16159+T260TEND EQU * 16160 * 16161 * Test 261 -- C R,m ---------------------------------------- 16162 * 16163 TSIMBEG T261,11000,50,1,C'C R,m' 16164+* 003164 16165+TDSCDAT CSECT 003168 16166+ DS 0D 16167+* 003168 0000CD00 16168+T261TDSC DC A(T261) // TENTRY 00316C 00000100 16169+ DC A(T261TEND-T261) // TLENGTH 003170 00002AF8 16170+ DC F'11000' // TLRCNT 003174 00000032 16171+ DC F'50' // TIGCNT 003178 00000001 16172+ DC F'1' // TLTYPE 0015DA 16173+TEXT CSECT 0015DA E3F2F6F1 16174+SPTR1336 DC C'T261' 00317C 16175+TDSCDAT CSECT 00317C 16176+ DS 0F 00317C 040015DA 16177+ DC AL1(L'SPTR1336),AL3(SPTR1336) 0015DE 16178+TEXT CSECT 0015DE C340D96B94 16179+SPTR1337 DC C'C R,m' 003180 16180+TDSCDAT CSECT 003180 16181+ DS 0F 003180 050015DE 16182+ DC AL1(L'SPTR1337),AL3(SPTR1337) 16183+* 004B58 16184+TDSCTBL CSECT 04B58 16185+T261TPTR EQU * 004B58 00003168 16186+ DC A(T261TDSC) enabled test 16187+* 00CCFC 16188+TCODE CSECT 00CD00 16189+ DS 0D ensure double word alignment for test 00CD00 16190+T261 DS 0H 01650000 00CD00 90EC D00C 0000C 16191+ STM 14,12,12(13) SAVE REGISTERS 02950000 PAGE 297 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00CD04 18CF 16192+ LR R12,R15 base register := entry address 0CD00 16193+ USING T261,R12 declare code base register 00CD06 41B0 C020 0CD20 16194+ LA R11,T261L load loop target to R11 00CD0A 58F0 C0F8 0CDF8 16195+ L R15,=A(SAVETST) R15 := current save area 00CD0E 50DF 0004 00004 16196+ ST R13,4(R15) set back pointer in current save area 00CD12 182D 16197+ LR R2,R13 remember callers save area 00CD14 18DF 16198+ LR R13,R15 setup current save area 00CD16 50D2 0008 00008 16199+ ST R13,8(R2) set forw pointer in callers save area 00000 16200+ USING TDSC,R1 declare TDSC base register 00CD1A 58F0 1008 00008 16201+ L R15,TLRCNT load local repeat count to R15 16202+* 16203 * 00CD1E 1722 16204 XR R2,R2 16205 T261L REPINS C,(R2,=F'1') repeat: C R2,=F'1' 16206+* 16207+* build from sublist &ALIST a comma separated string &ARGS 16208+* 16209+* 16210+* 16211+* 16212+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 16213+* this allows to transfer the repeat count from last TDSCGEN call 16214+* 16215+* 0CD20 16216+T261L EQU * 16217+* 16218+* write a comment indicating what REPINS does (in case NOGEN in effect) 16219+* 16220+*,// REPINS: do 50 times: 16221+* 16222+* MNOTE requires that ' is doubled for expanded variables 16223+* thus build &MASTR as a copy of '&ARGS with ' doubled 16224+* 16225+* 16226+*,// C R2,=F'1' 16227+* 16228+* finally generate code: &ICNT copies of &CODE &ARGS 16229+* 00CD20 5920 C0FC 0CDFC 16230+ C R2,=F'1' 00CD24 5920 C0FC 0CDFC 16231+ C R2,=F'1' 00CD28 5920 C0FC 0CDFC 16232+ C R2,=F'1' 00CD2C 5920 C0FC 0CDFC 16233+ C R2,=F'1' 00CD30 5920 C0FC 0CDFC 16234+ C R2,=F'1' 00CD34 5920 C0FC 0CDFC 16235+ C R2,=F'1' 00CD38 5920 C0FC 0CDFC 16236+ C R2,=F'1' 00CD3C 5920 C0FC 0CDFC 16237+ C R2,=F'1' 00CD40 5920 C0FC 0CDFC 16238+ C R2,=F'1' 00CD44 5920 C0FC 0CDFC 16239+ C R2,=F'1' 00CD48 5920 C0FC 0CDFC 16240+ C R2,=F'1' 00CD4C 5920 C0FC 0CDFC 16241+ C R2,=F'1' 00CD50 5920 C0FC 0CDFC 16242+ C R2,=F'1' 00CD54 5920 C0FC 0CDFC 16243+ C R2,=F'1' 00CD58 5920 C0FC 0CDFC 16244+ C R2,=F'1' 00CD5C 5920 C0FC 0CDFC 16245+ C R2,=F'1' 00CD60 5920 C0FC 0CDFC 16246+ C R2,=F'1' PAGE 298 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00CD64 5920 C0FC 0CDFC 16247+ C R2,=F'1' 00CD68 5920 C0FC 0CDFC 16248+ C R2,=F'1' 00CD6C 5920 C0FC 0CDFC 16249+ C R2,=F'1' 00CD70 5920 C0FC 0CDFC 16250+ C R2,=F'1' 00CD74 5920 C0FC 0CDFC 16251+ C R2,=F'1' 00CD78 5920 C0FC 0CDFC 16252+ C R2,=F'1' 00CD7C 5920 C0FC 0CDFC 16253+ C R2,=F'1' 00CD80 5920 C0FC 0CDFC 16254+ C R2,=F'1' 00CD84 5920 C0FC 0CDFC 16255+ C R2,=F'1' 00CD88 5920 C0FC 0CDFC 16256+ C R2,=F'1' 00CD8C 5920 C0FC 0CDFC 16257+ C R2,=F'1' 00CD90 5920 C0FC 0CDFC 16258+ C R2,=F'1' 00CD94 5920 C0FC 0CDFC 16259+ C R2,=F'1' 00CD98 5920 C0FC 0CDFC 16260+ C R2,=F'1' 00CD9C 5920 C0FC 0CDFC 16261+ C R2,=F'1' 00CDA0 5920 C0FC 0CDFC 16262+ C R2,=F'1' 00CDA4 5920 C0FC 0CDFC 16263+ C R2,=F'1' 00CDA8 5920 C0FC 0CDFC 16264+ C R2,=F'1' 00CDAC 5920 C0FC 0CDFC 16265+ C R2,=F'1' 00CDB0 5920 C0FC 0CDFC 16266+ C R2,=F'1' 00CDB4 5920 C0FC 0CDFC 16267+ C R2,=F'1' 00CDB8 5920 C0FC 0CDFC 16268+ C R2,=F'1' 00CDBC 5920 C0FC 0CDFC 16269+ C R2,=F'1' 00CDC0 5920 C0FC 0CDFC 16270+ C R2,=F'1' 00CDC4 5920 C0FC 0CDFC 16271+ C R2,=F'1' 00CDC8 5920 C0FC 0CDFC 16272+ C R2,=F'1' 00CDCC 5920 C0FC 0CDFC 16273+ C R2,=F'1' 00CDD0 5920 C0FC 0CDFC 16274+ C R2,=F'1' 00CDD4 5920 C0FC 0CDFC 16275+ C R2,=F'1' 00CDD8 5920 C0FC 0CDFC 16276+ C R2,=F'1' 00CDDC 5920 C0FC 0CDFC 16277+ C R2,=F'1' 00CDE0 5920 C0FC 0CDFC 16278+ C R2,=F'1' 00CDE4 5920 C0FC 0CDFC 16279+ C R2,=F'1' 16280+* 00CDE8 06FB 16281 BCTR R15,R11 16282 TSIMRET 00CDEA 58F0 C0F8 0CDF8 16283+ L R15,=A(SAVETST) R15 := current save area 00CDEE 58DF 0004 00004 16284+ L R13,4(R15) get old save area back 00CDF2 98EC D00C 0000C 16285+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00CDF6 07FE 16286+ BR 14 RETURN 02000000 16287 TSIMEND 00CDF8 16288+ LTORG 00CDF8 00000458 16289 =A(SAVETST) 00CDFC 00000001 16290 =F'1' 0CE00 16291+T261TEND EQU * 16292 * 16293 * Test 262 -- CH R,m --------------------------------------- 16294 TSIMBEG T262,12000,50,1,C'CH R,m' 16295+* 003184 16296+TDSCDAT CSECT 003188 16297+ DS 0D 16298+* 003188 0000CE00 16299+T262TDSC DC A(T262) // TENTRY 00318C 000000FE 16300+ DC A(T262TEND-T262) // TLENGTH 003190 00002EE0 16301+ DC F'12000' // TLRCNT PAGE 299 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003194 00000032 16302+ DC F'50' // TIGCNT 003198 00000001 16303+ DC F'1' // TLTYPE 0015E3 16304+TEXT CSECT 0015E3 E3F2F6F2 16305+SPTR1348 DC C'T262' 00319C 16306+TDSCDAT CSECT 00319C 16307+ DS 0F 00319C 040015E3 16308+ DC AL1(L'SPTR1348),AL3(SPTR1348) 0015E7 16309+TEXT CSECT 0015E7 C3C840D96B94 16310+SPTR1349 DC C'CH R,m' 0031A0 16311+TDSCDAT CSECT 0031A0 16312+ DS 0F 0031A0 060015E7 16313+ DC AL1(L'SPTR1349),AL3(SPTR1349) 16314+* 004B5C 16315+TDSCTBL CSECT 04B5C 16316+T262TPTR EQU * 004B5C 00003188 16317+ DC A(T262TDSC) enabled test 16318+* 00CE00 16319+TCODE CSECT 00CE00 16320+ DS 0D ensure double word alignment for test 00CE00 16321+T262 DS 0H 01650000 00CE00 90EC D00C 0000C 16322+ STM 14,12,12(13) SAVE REGISTERS 02950000 00CE04 18CF 16323+ LR R12,R15 base register := entry address 0CE00 16324+ USING T262,R12 declare code base register 00CE06 41B0 C020 0CE20 16325+ LA R11,T262L load loop target to R11 00CE0A 58F0 C0F8 0CEF8 16326+ L R15,=A(SAVETST) R15 := current save area 00CE0E 50DF 0004 00004 16327+ ST R13,4(R15) set back pointer in current save area 00CE12 182D 16328+ LR R2,R13 remember callers save area 00CE14 18DF 16329+ LR R13,R15 setup current save area 00CE16 50D2 0008 00008 16330+ ST R13,8(R2) set forw pointer in callers save area 00000 16331+ USING TDSC,R1 declare TDSC base register 00CE1A 58F0 1008 00008 16332+ L R15,TLRCNT load local repeat count to R15 16333+* 16334 * 00CE1E 1722 16335 XR R2,R2 16336 T262L REPINS CH,(R2,=H'1') repeat: CH R2,=H'1' 16337+* 16338+* build from sublist &ALIST a comma separated string &ARGS 16339+* 16340+* 16341+* 16342+* 16343+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 16344+* this allows to transfer the repeat count from last TDSCGEN call 16345+* 16346+* 0CE20 16347+T262L EQU * 16348+* 16349+* write a comment indicating what REPINS does (in case NOGEN in effect) 16350+* 16351+*,// REPINS: do 50 times: 16352+* 16353+* MNOTE requires that ' is doubled for expanded variables 16354+* thus build &MASTR as a copy of '&ARGS with ' doubled 16355+* 16356+* PAGE 300 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 16357+*,// CH R2,=H'1' 16358+* 16359+* finally generate code: &ICNT copies of &CODE &ARGS 16360+* 00CE20 4920 C0FC 0CEFC 16361+ CH R2,=H'1' 00CE24 4920 C0FC 0CEFC 16362+ CH R2,=H'1' 00CE28 4920 C0FC 0CEFC 16363+ CH R2,=H'1' 00CE2C 4920 C0FC 0CEFC 16364+ CH R2,=H'1' 00CE30 4920 C0FC 0CEFC 16365+ CH R2,=H'1' 00CE34 4920 C0FC 0CEFC 16366+ CH R2,=H'1' 00CE38 4920 C0FC 0CEFC 16367+ CH R2,=H'1' 00CE3C 4920 C0FC 0CEFC 16368+ CH R2,=H'1' 00CE40 4920 C0FC 0CEFC 16369+ CH R2,=H'1' 00CE44 4920 C0FC 0CEFC 16370+ CH R2,=H'1' 00CE48 4920 C0FC 0CEFC 16371+ CH R2,=H'1' 00CE4C 4920 C0FC 0CEFC 16372+ CH R2,=H'1' 00CE50 4920 C0FC 0CEFC 16373+ CH R2,=H'1' 00CE54 4920 C0FC 0CEFC 16374+ CH R2,=H'1' 00CE58 4920 C0FC 0CEFC 16375+ CH R2,=H'1' 00CE5C 4920 C0FC 0CEFC 16376+ CH R2,=H'1' 00CE60 4920 C0FC 0CEFC 16377+ CH R2,=H'1' 00CE64 4920 C0FC 0CEFC 16378+ CH R2,=H'1' 00CE68 4920 C0FC 0CEFC 16379+ CH R2,=H'1' 00CE6C 4920 C0FC 0CEFC 16380+ CH R2,=H'1' 00CE70 4920 C0FC 0CEFC 16381+ CH R2,=H'1' 00CE74 4920 C0FC 0CEFC 16382+ CH R2,=H'1' 00CE78 4920 C0FC 0CEFC 16383+ CH R2,=H'1' 00CE7C 4920 C0FC 0CEFC 16384+ CH R2,=H'1' 00CE80 4920 C0FC 0CEFC 16385+ CH R2,=H'1' 00CE84 4920 C0FC 0CEFC 16386+ CH R2,=H'1' 00CE88 4920 C0FC 0CEFC 16387+ CH R2,=H'1' 00CE8C 4920 C0FC 0CEFC 16388+ CH R2,=H'1' 00CE90 4920 C0FC 0CEFC 16389+ CH R2,=H'1' 00CE94 4920 C0FC 0CEFC 16390+ CH R2,=H'1' 00CE98 4920 C0FC 0CEFC 16391+ CH R2,=H'1' 00CE9C 4920 C0FC 0CEFC 16392+ CH R2,=H'1' 00CEA0 4920 C0FC 0CEFC 16393+ CH R2,=H'1' 00CEA4 4920 C0FC 0CEFC 16394+ CH R2,=H'1' 00CEA8 4920 C0FC 0CEFC 16395+ CH R2,=H'1' 00CEAC 4920 C0FC 0CEFC 16396+ CH R2,=H'1' 00CEB0 4920 C0FC 0CEFC 16397+ CH R2,=H'1' 00CEB4 4920 C0FC 0CEFC 16398+ CH R2,=H'1' 00CEB8 4920 C0FC 0CEFC 16399+ CH R2,=H'1' 00CEBC 4920 C0FC 0CEFC 16400+ CH R2,=H'1' 00CEC0 4920 C0FC 0CEFC 16401+ CH R2,=H'1' 00CEC4 4920 C0FC 0CEFC 16402+ CH R2,=H'1' 00CEC8 4920 C0FC 0CEFC 16403+ CH R2,=H'1' 00CECC 4920 C0FC 0CEFC 16404+ CH R2,=H'1' 00CED0 4920 C0FC 0CEFC 16405+ CH R2,=H'1' 00CED4 4920 C0FC 0CEFC 16406+ CH R2,=H'1' 00CED8 4920 C0FC 0CEFC 16407+ CH R2,=H'1' 00CEDC 4920 C0FC 0CEFC 16408+ CH R2,=H'1' 00CEE0 4920 C0FC 0CEFC 16409+ CH R2,=H'1' 00CEE4 4920 C0FC 0CEFC 16410+ CH R2,=H'1' 16411+* PAGE 301 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00CEE8 06FB 16412 BCTR R15,R11 16413 TSIMRET 00CEEA 58F0 C0F8 0CEF8 16414+ L R15,=A(SAVETST) R15 := current save area 00CEEE 58DF 0004 00004 16415+ L R13,4(R15) get old save area back 00CEF2 98EC D00C 0000C 16416+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00CEF6 07FE 16417+ BR 14 RETURN 02000000 16418 TSIMEND 00CEF8 16419+ LTORG 00CEF8 00000458 16420 =A(SAVETST) 00CEFC 0001 16421 =H'1' 0CEFE 16422+T262TEND EQU * 16423 * 16424 * Test 263 -- CLR R,R -------------------------------------- 16425 * 16426 TSIMBEG T263,18000,100,1,C'CLR R,R' 16427+* 0031A4 16428+TDSCDAT CSECT 0031A8 16429+ DS 0D 16430+* 0031A8 0000CF00 16431+T263TDSC DC A(T263) // TENTRY 0031AC 00000104 16432+ DC A(T263TEND-T263) // TLENGTH 0031B0 00004650 16433+ DC F'18000' // TLRCNT 0031B4 00000064 16434+ DC F'100' // TIGCNT 0031B8 00000001 16435+ DC F'1' // TLTYPE 0015ED 16436+TEXT CSECT 0015ED E3F2F6F3 16437+SPTR1360 DC C'T263' 0031BC 16438+TDSCDAT CSECT 0031BC 16439+ DS 0F 0031BC 040015ED 16440+ DC AL1(L'SPTR1360),AL3(SPTR1360) 0015F1 16441+TEXT CSECT 0015F1 C3D3D940D96BD9 16442+SPTR1361 DC C'CLR R,R' 0031C0 16443+TDSCDAT CSECT 0031C0 16444+ DS 0F 0031C0 070015F1 16445+ DC AL1(L'SPTR1361),AL3(SPTR1361) 16446+* 004B60 16447+TDSCTBL CSECT 04B60 16448+T263TPTR EQU * 004B60 000031A8 16449+ DC A(T263TDSC) enabled test 16450+* 00CEFE 16451+TCODE CSECT 00CF00 16452+ DS 0D ensure double word alignment for test 00CF00 16453+T263 DS 0H 01650000 00CF00 90EC D00C 0000C 16454+ STM 14,12,12(13) SAVE REGISTERS 02950000 00CF04 18CF 16455+ LR R12,R15 base register := entry address 0CF00 16456+ USING T263,R12 declare code base register 00CF06 41B0 C024 0CF24 16457+ LA R11,T263L load loop target to R11 00CF0A 58F0 C100 0D000 16458+ L R15,=A(SAVETST) R15 := current save area 00CF0E 50DF 0004 00004 16459+ ST R13,4(R15) set back pointer in current save area 00CF12 182D 16460+ LR R2,R13 remember callers save area 00CF14 18DF 16461+ LR R13,R15 setup current save area 00CF16 50D2 0008 00008 16462+ ST R13,8(R2) set forw pointer in callers save area 00000 16463+ USING TDSC,R1 declare TDSC base register 00CF1A 58F0 1008 00008 16464+ L R15,TLRCNT load local repeat count to R15 16465+* 16466 * PAGE 302 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00CF1E 1722 16467 XR R2,R2 00CF20 4130 0001 00001 16468 LA R3,1 16469 T263L REPINS CLR,(R2,R3) repeat: CLR R2,R3 16470+* 16471+* build from sublist &ALIST a comma separated string &ARGS 16472+* 16473+* 16474+* 16475+* 16476+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 16477+* this allows to transfer the repeat count from last TDSCGEN call 16478+* 16479+* 0CF24 16480+T263L EQU * 16481+* 16482+* write a comment indicating what REPINS does (in case NOGEN in effect) 16483+* 16484+*,// REPINS: do 100 times: 16485+* 16486+* MNOTE requires that ' is doubled for expanded variables 16487+* thus build &MASTR as a copy of '&ARGS with ' doubled 16488+* 16489+* 16490+*,// CLR R2,R3 16491+* 16492+* finally generate code: &ICNT copies of &CODE &ARGS 16493+* 00CF24 1523 16494+ CLR R2,R3 00CF26 1523 16495+ CLR R2,R3 00CF28 1523 16496+ CLR R2,R3 00CF2A 1523 16497+ CLR R2,R3 00CF2C 1523 16498+ CLR R2,R3 00CF2E 1523 16499+ CLR R2,R3 00CF30 1523 16500+ CLR R2,R3 00CF32 1523 16501+ CLR R2,R3 00CF34 1523 16502+ CLR R2,R3 00CF36 1523 16503+ CLR R2,R3 00CF38 1523 16504+ CLR R2,R3 00CF3A 1523 16505+ CLR R2,R3 00CF3C 1523 16506+ CLR R2,R3 00CF3E 1523 16507+ CLR R2,R3 00CF40 1523 16508+ CLR R2,R3 00CF42 1523 16509+ CLR R2,R3 00CF44 1523 16510+ CLR R2,R3 00CF46 1523 16511+ CLR R2,R3 00CF48 1523 16512+ CLR R2,R3 00CF4A 1523 16513+ CLR R2,R3 00CF4C 1523 16514+ CLR R2,R3 00CF4E 1523 16515+ CLR R2,R3 00CF50 1523 16516+ CLR R2,R3 00CF52 1523 16517+ CLR R2,R3 00CF54 1523 16518+ CLR R2,R3 00CF56 1523 16519+ CLR R2,R3 00CF58 1523 16520+ CLR R2,R3 00CF5A 1523 16521+ CLR R2,R3 PAGE 303 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00CF5C 1523 16522+ CLR R2,R3 00CF5E 1523 16523+ CLR R2,R3 00CF60 1523 16524+ CLR R2,R3 00CF62 1523 16525+ CLR R2,R3 00CF64 1523 16526+ CLR R2,R3 00CF66 1523 16527+ CLR R2,R3 00CF68 1523 16528+ CLR R2,R3 00CF6A 1523 16529+ CLR R2,R3 00CF6C 1523 16530+ CLR R2,R3 00CF6E 1523 16531+ CLR R2,R3 00CF70 1523 16532+ CLR R2,R3 00CF72 1523 16533+ CLR R2,R3 00CF74 1523 16534+ CLR R2,R3 00CF76 1523 16535+ CLR R2,R3 00CF78 1523 16536+ CLR R2,R3 00CF7A 1523 16537+ CLR R2,R3 00CF7C 1523 16538+ CLR R2,R3 00CF7E 1523 16539+ CLR R2,R3 00CF80 1523 16540+ CLR R2,R3 00CF82 1523 16541+ CLR R2,R3 00CF84 1523 16542+ CLR R2,R3 00CF86 1523 16543+ CLR R2,R3 00CF88 1523 16544+ CLR R2,R3 00CF8A 1523 16545+ CLR R2,R3 00CF8C 1523 16546+ CLR R2,R3 00CF8E 1523 16547+ CLR R2,R3 00CF90 1523 16548+ CLR R2,R3 00CF92 1523 16549+ CLR R2,R3 00CF94 1523 16550+ CLR R2,R3 00CF96 1523 16551+ CLR R2,R3 00CF98 1523 16552+ CLR R2,R3 00CF9A 1523 16553+ CLR R2,R3 00CF9C 1523 16554+ CLR R2,R3 00CF9E 1523 16555+ CLR R2,R3 00CFA0 1523 16556+ CLR R2,R3 00CFA2 1523 16557+ CLR R2,R3 00CFA4 1523 16558+ CLR R2,R3 00CFA6 1523 16559+ CLR R2,R3 00CFA8 1523 16560+ CLR R2,R3 00CFAA 1523 16561+ CLR R2,R3 00CFAC 1523 16562+ CLR R2,R3 00CFAE 1523 16563+ CLR R2,R3 00CFB0 1523 16564+ CLR R2,R3 00CFB2 1523 16565+ CLR R2,R3 00CFB4 1523 16566+ CLR R2,R3 00CFB6 1523 16567+ CLR R2,R3 00CFB8 1523 16568+ CLR R2,R3 00CFBA 1523 16569+ CLR R2,R3 00CFBC 1523 16570+ CLR R2,R3 00CFBE 1523 16571+ CLR R2,R3 00CFC0 1523 16572+ CLR R2,R3 00CFC2 1523 16573+ CLR R2,R3 00CFC4 1523 16574+ CLR R2,R3 00CFC6 1523 16575+ CLR R2,R3 00CFC8 1523 16576+ CLR R2,R3 PAGE 304 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00CFCA 1523 16577+ CLR R2,R3 00CFCC 1523 16578+ CLR R2,R3 00CFCE 1523 16579+ CLR R2,R3 00CFD0 1523 16580+ CLR R2,R3 00CFD2 1523 16581+ CLR R2,R3 00CFD4 1523 16582+ CLR R2,R3 00CFD6 1523 16583+ CLR R2,R3 00CFD8 1523 16584+ CLR R2,R3 00CFDA 1523 16585+ CLR R2,R3 00CFDC 1523 16586+ CLR R2,R3 00CFDE 1523 16587+ CLR R2,R3 00CFE0 1523 16588+ CLR R2,R3 00CFE2 1523 16589+ CLR R2,R3 00CFE4 1523 16590+ CLR R2,R3 00CFE6 1523 16591+ CLR R2,R3 00CFE8 1523 16592+ CLR R2,R3 00CFEA 1523 16593+ CLR R2,R3 16594+* 00CFEC 06FB 16595 BCTR R15,R11 16596 TSIMRET 00CFEE 58F0 C100 0D000 16597+ L R15,=A(SAVETST) R15 := current save area 00CFF2 58DF 0004 00004 16598+ L R13,4(R15) get old save area back 00CFF6 98EC D00C 0000C 16599+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00CFFA 07FE 16600+ BR 14 RETURN 02000000 16601 TSIMEND 00D000 16602+ LTORG 00D000 00000458 16603 =A(SAVETST) 0D004 16604+T263TEND EQU * 16605 * 16606 * Test 264 -- CL R,m --------------------------------------- 16607 * 16608 TSIMBEG T264,12000,50,1,C'CL R,m' 16609+* 0031C4 16610+TDSCDAT CSECT 0031C8 16611+ DS 0D 16612+* 0031C8 0000D008 16613+T264TDSC DC A(T264) // TENTRY 0031CC 00000100 16614+ DC A(T264TEND-T264) // TLENGTH 0031D0 00002EE0 16615+ DC F'12000' // TLRCNT 0031D4 00000032 16616+ DC F'50' // TIGCNT 0031D8 00000001 16617+ DC F'1' // TLTYPE 0015F8 16618+TEXT CSECT 0015F8 E3F2F6F4 16619+SPTR1372 DC C'T264' 0031DC 16620+TDSCDAT CSECT 0031DC 16621+ DS 0F 0031DC 040015F8 16622+ DC AL1(L'SPTR1372),AL3(SPTR1372) 0015FC 16623+TEXT CSECT 0015FC C3D340D96B94 16624+SPTR1373 DC C'CL R,m' 0031E0 16625+TDSCDAT CSECT 0031E0 16626+ DS 0F 0031E0 060015FC 16627+ DC AL1(L'SPTR1373),AL3(SPTR1373) 16628+* 004B64 16629+TDSCTBL CSECT 04B64 16630+T264TPTR EQU * 004B64 000031C8 16631+ DC A(T264TDSC) enabled test PAGE 305 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 16632+* 00D004 16633+TCODE CSECT 00D008 16634+ DS 0D ensure double word alignment for test 00D008 16635+T264 DS 0H 01650000 00D008 90EC D00C 0000C 16636+ STM 14,12,12(13) SAVE REGISTERS 02950000 00D00C 18CF 16637+ LR R12,R15 base register := entry address 0D008 16638+ USING T264,R12 declare code base register 00D00E 41B0 C020 0D028 16639+ LA R11,T264L load loop target to R11 00D012 58F0 C0F8 0D100 16640+ L R15,=A(SAVETST) R15 := current save area 00D016 50DF 0004 00004 16641+ ST R13,4(R15) set back pointer in current save area 00D01A 182D 16642+ LR R2,R13 remember callers save area 00D01C 18DF 16643+ LR R13,R15 setup current save area 00D01E 50D2 0008 00008 16644+ ST R13,8(R2) set forw pointer in callers save area 00000 16645+ USING TDSC,R1 declare TDSC base register 00D022 58F0 1008 00008 16646+ L R15,TLRCNT load local repeat count to R15 16647+* 16648 * 00D026 1722 16649 XR R2,R2 16650 T264L REPINS CL,(R2,=F'1') repeat: CL R2,=F'1' 16651+* 16652+* build from sublist &ALIST a comma separated string &ARGS 16653+* 16654+* 16655+* 16656+* 16657+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 16658+* this allows to transfer the repeat count from last TDSCGEN call 16659+* 16660+* 0D028 16661+T264L EQU * 16662+* 16663+* write a comment indicating what REPINS does (in case NOGEN in effect) 16664+* 16665+*,// REPINS: do 50 times: 16666+* 16667+* MNOTE requires that ' is doubled for expanded variables 16668+* thus build &MASTR as a copy of '&ARGS with ' doubled 16669+* 16670+* 16671+*,// CL R2,=F'1' 16672+* 16673+* finally generate code: &ICNT copies of &CODE &ARGS 16674+* 00D028 5520 C0FC 0D104 16675+ CL R2,=F'1' 00D02C 5520 C0FC 0D104 16676+ CL R2,=F'1' 00D030 5520 C0FC 0D104 16677+ CL R2,=F'1' 00D034 5520 C0FC 0D104 16678+ CL R2,=F'1' 00D038 5520 C0FC 0D104 16679+ CL R2,=F'1' 00D03C 5520 C0FC 0D104 16680+ CL R2,=F'1' 00D040 5520 C0FC 0D104 16681+ CL R2,=F'1' 00D044 5520 C0FC 0D104 16682+ CL R2,=F'1' 00D048 5520 C0FC 0D104 16683+ CL R2,=F'1' 00D04C 5520 C0FC 0D104 16684+ CL R2,=F'1' 00D050 5520 C0FC 0D104 16685+ CL R2,=F'1' 00D054 5520 C0FC 0D104 16686+ CL R2,=F'1' PAGE 306 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00D058 5520 C0FC 0D104 16687+ CL R2,=F'1' 00D05C 5520 C0FC 0D104 16688+ CL R2,=F'1' 00D060 5520 C0FC 0D104 16689+ CL R2,=F'1' 00D064 5520 C0FC 0D104 16690+ CL R2,=F'1' 00D068 5520 C0FC 0D104 16691+ CL R2,=F'1' 00D06C 5520 C0FC 0D104 16692+ CL R2,=F'1' 00D070 5520 C0FC 0D104 16693+ CL R2,=F'1' 00D074 5520 C0FC 0D104 16694+ CL R2,=F'1' 00D078 5520 C0FC 0D104 16695+ CL R2,=F'1' 00D07C 5520 C0FC 0D104 16696+ CL R2,=F'1' 00D080 5520 C0FC 0D104 16697+ CL R2,=F'1' 00D084 5520 C0FC 0D104 16698+ CL R2,=F'1' 00D088 5520 C0FC 0D104 16699+ CL R2,=F'1' 00D08C 5520 C0FC 0D104 16700+ CL R2,=F'1' 00D090 5520 C0FC 0D104 16701+ CL R2,=F'1' 00D094 5520 C0FC 0D104 16702+ CL R2,=F'1' 00D098 5520 C0FC 0D104 16703+ CL R2,=F'1' 00D09C 5520 C0FC 0D104 16704+ CL R2,=F'1' 00D0A0 5520 C0FC 0D104 16705+ CL R2,=F'1' 00D0A4 5520 C0FC 0D104 16706+ CL R2,=F'1' 00D0A8 5520 C0FC 0D104 16707+ CL R2,=F'1' 00D0AC 5520 C0FC 0D104 16708+ CL R2,=F'1' 00D0B0 5520 C0FC 0D104 16709+ CL R2,=F'1' 00D0B4 5520 C0FC 0D104 16710+ CL R2,=F'1' 00D0B8 5520 C0FC 0D104 16711+ CL R2,=F'1' 00D0BC 5520 C0FC 0D104 16712+ CL R2,=F'1' 00D0C0 5520 C0FC 0D104 16713+ CL R2,=F'1' 00D0C4 5520 C0FC 0D104 16714+ CL R2,=F'1' 00D0C8 5520 C0FC 0D104 16715+ CL R2,=F'1' 00D0CC 5520 C0FC 0D104 16716+ CL R2,=F'1' 00D0D0 5520 C0FC 0D104 16717+ CL R2,=F'1' 00D0D4 5520 C0FC 0D104 16718+ CL R2,=F'1' 00D0D8 5520 C0FC 0D104 16719+ CL R2,=F'1' 00D0DC 5520 C0FC 0D104 16720+ CL R2,=F'1' 00D0E0 5520 C0FC 0D104 16721+ CL R2,=F'1' 00D0E4 5520 C0FC 0D104 16722+ CL R2,=F'1' 00D0E8 5520 C0FC 0D104 16723+ CL R2,=F'1' 00D0EC 5520 C0FC 0D104 16724+ CL R2,=F'1' 16725+* 00D0F0 06FB 16726 BCTR R15,R11 16727 TSIMRET 00D0F2 58F0 C0F8 0D100 16728+ L R15,=A(SAVETST) R15 := current save area 00D0F6 58DF 0004 00004 16729+ L R13,4(R15) get old save area back 00D0FA 98EC D00C 0000C 16730+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00D0FE 07FE 16731+ BR 14 RETURN 02000000 16732 TSIMEND 00D100 16733+ LTORG 00D100 00000458 16734 =A(SAVETST) 00D104 00000001 16735 =F'1' 0D108 16736+T264TEND EQU * 16737 * 16738 * Test 265 -- CLI m,i -------------------------------------- 16739 * 16740 TSIMBEG T265,10000,50,1,C'CLI m,i' 16741+* PAGE 307 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0031E4 16742+TDSCDAT CSECT 0031E8 16743+ DS 0D 16744+* 0031E8 0000D108 16745+T265TDSC DC A(T265) // TENTRY 0031EC 000000FC 16746+ DC A(T265TEND-T265) // TLENGTH 0031F0 00002710 16747+ DC F'10000' // TLRCNT 0031F4 00000032 16748+ DC F'50' // TIGCNT 0031F8 00000001 16749+ DC F'1' // TLTYPE 001602 16750+TEXT CSECT 001602 E3F2F6F5 16751+SPTR1384 DC C'T265' 0031FC 16752+TDSCDAT CSECT 0031FC 16753+ DS 0F 0031FC 04001602 16754+ DC AL1(L'SPTR1384),AL3(SPTR1384) 001606 16755+TEXT CSECT 001606 C3D3C940946B89 16756+SPTR1385 DC C'CLI m,i' 003200 16757+TDSCDAT CSECT 003200 16758+ DS 0F 003200 07001606 16759+ DC AL1(L'SPTR1385),AL3(SPTR1385) 16760+* 004B68 16761+TDSCTBL CSECT 04B68 16762+T265TPTR EQU * 004B68 000031E8 16763+ DC A(T265TDSC) enabled test 16764+* 00D108 16765+TCODE CSECT 00D108 16766+ DS 0D ensure double word alignment for test 00D108 16767+T265 DS 0H 01650000 00D108 90EC D00C 0000C 16768+ STM 14,12,12(13) SAVE REGISTERS 02950000 00D10C 18CF 16769+ LR R12,R15 base register := entry address 0D108 16770+ USING T265,R12 declare code base register 00D10E 41B0 C01E 0D126 16771+ LA R11,T265L load loop target to R11 00D112 58F0 C0F8 0D200 16772+ L R15,=A(SAVETST) R15 := current save area 00D116 50DF 0004 00004 16773+ ST R13,4(R15) set back pointer in current save area 00D11A 182D 16774+ LR R2,R13 remember callers save area 00D11C 18DF 16775+ LR R13,R15 setup current save area 00D11E 50D2 0008 00008 16776+ ST R13,8(R2) set forw pointer in callers save area 00000 16777+ USING TDSC,R1 declare TDSC base register 00D122 58F0 1008 00008 16778+ L R15,TLRCNT load local repeat count to R15 16779+* 16780 * 16781 T265L REPINS CLI,(T265V,X'00') repeat: CLI T265V,X'00' 16782+* 16783+* build from sublist &ALIST a comma separated string &ARGS 16784+* 16785+* 16786+* 16787+* 16788+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 16789+* this allows to transfer the repeat count from last TDSCGEN call 16790+* 16791+* 0D126 16792+T265L EQU * 16793+* 16794+* write a comment indicating what REPINS does (in case NOGEN in effect) 16795+* 16796+*,// REPINS: do 50 times: PAGE 308 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 16797+* 16798+* MNOTE requires that ' is doubled for expanded variables 16799+* thus build &MASTR as a copy of '&ARGS with ' doubled 16800+* 16801+* 16802+*,// CLI T265V,X'00' 16803+* 16804+* finally generate code: &ICNT copies of &CODE &ARGS 16805+* 00D126 9500 C0F6 0D1FE 16806+ CLI T265V,X'00' 00D12A 9500 C0F6 0D1FE 16807+ CLI T265V,X'00' 00D12E 9500 C0F6 0D1FE 16808+ CLI T265V,X'00' 00D132 9500 C0F6 0D1FE 16809+ CLI T265V,X'00' 00D136 9500 C0F6 0D1FE 16810+ CLI T265V,X'00' 00D13A 9500 C0F6 0D1FE 16811+ CLI T265V,X'00' 00D13E 9500 C0F6 0D1FE 16812+ CLI T265V,X'00' 00D142 9500 C0F6 0D1FE 16813+ CLI T265V,X'00' 00D146 9500 C0F6 0D1FE 16814+ CLI T265V,X'00' 00D14A 9500 C0F6 0D1FE 16815+ CLI T265V,X'00' 00D14E 9500 C0F6 0D1FE 16816+ CLI T265V,X'00' 00D152 9500 C0F6 0D1FE 16817+ CLI T265V,X'00' 00D156 9500 C0F6 0D1FE 16818+ CLI T265V,X'00' 00D15A 9500 C0F6 0D1FE 16819+ CLI T265V,X'00' 00D15E 9500 C0F6 0D1FE 16820+ CLI T265V,X'00' 00D162 9500 C0F6 0D1FE 16821+ CLI T265V,X'00' 00D166 9500 C0F6 0D1FE 16822+ CLI T265V,X'00' 00D16A 9500 C0F6 0D1FE 16823+ CLI T265V,X'00' 00D16E 9500 C0F6 0D1FE 16824+ CLI T265V,X'00' 00D172 9500 C0F6 0D1FE 16825+ CLI T265V,X'00' 00D176 9500 C0F6 0D1FE 16826+ CLI T265V,X'00' 00D17A 9500 C0F6 0D1FE 16827+ CLI T265V,X'00' 00D17E 9500 C0F6 0D1FE 16828+ CLI T265V,X'00' 00D182 9500 C0F6 0D1FE 16829+ CLI T265V,X'00' 00D186 9500 C0F6 0D1FE 16830+ CLI T265V,X'00' 00D18A 9500 C0F6 0D1FE 16831+ CLI T265V,X'00' 00D18E 9500 C0F6 0D1FE 16832+ CLI T265V,X'00' 00D192 9500 C0F6 0D1FE 16833+ CLI T265V,X'00' 00D196 9500 C0F6 0D1FE 16834+ CLI T265V,X'00' 00D19A 9500 C0F6 0D1FE 16835+ CLI T265V,X'00' 00D19E 9500 C0F6 0D1FE 16836+ CLI T265V,X'00' 00D1A2 9500 C0F6 0D1FE 16837+ CLI T265V,X'00' 00D1A6 9500 C0F6 0D1FE 16838+ CLI T265V,X'00' 00D1AA 9500 C0F6 0D1FE 16839+ CLI T265V,X'00' 00D1AE 9500 C0F6 0D1FE 16840+ CLI T265V,X'00' 00D1B2 9500 C0F6 0D1FE 16841+ CLI T265V,X'00' 00D1B6 9500 C0F6 0D1FE 16842+ CLI T265V,X'00' 00D1BA 9500 C0F6 0D1FE 16843+ CLI T265V,X'00' 00D1BE 9500 C0F6 0D1FE 16844+ CLI T265V,X'00' 00D1C2 9500 C0F6 0D1FE 16845+ CLI T265V,X'00' 00D1C6 9500 C0F6 0D1FE 16846+ CLI T265V,X'00' 00D1CA 9500 C0F6 0D1FE 16847+ CLI T265V,X'00' 00D1CE 9500 C0F6 0D1FE 16848+ CLI T265V,X'00' 00D1D2 9500 C0F6 0D1FE 16849+ CLI T265V,X'00' 00D1D6 9500 C0F6 0D1FE 16850+ CLI T265V,X'00' 00D1DA 9500 C0F6 0D1FE 16851+ CLI T265V,X'00' PAGE 309 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00D1DE 9500 C0F6 0D1FE 16852+ CLI T265V,X'00' 00D1E2 9500 C0F6 0D1FE 16853+ CLI T265V,X'00' 00D1E6 9500 C0F6 0D1FE 16854+ CLI T265V,X'00' 00D1EA 9500 C0F6 0D1FE 16855+ CLI T265V,X'00' 16856+* 00D1EE 06FB 16857 BCTR R15,R11 16858 TSIMRET 00D1F0 58F0 C0F8 0D200 16859+ L R15,=A(SAVETST) R15 := current save area 00D1F4 58DF 0004 00004 16860+ L R13,4(R15) get old save area back 00D1F8 98EC D00C 0000C 16861+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00D1FC 07FE 16862+ BR 14 RETURN 02000000 16863 * 00D1FE 01 16864 T265V DC X'01' 16865 TSIMEND 00D200 16866+ LTORG 00D200 00000458 16867 =A(SAVETST) 0D204 16868+T265TEND EQU * 16869 * 16870 * Test 266 -- CLM R,i,m ------------------------------------ 16871 * 16872 TSIMBEG T266,8000,50,1,C'CLM R,i,m' 16873+* 003204 16874+TDSCDAT CSECT 003208 16875+ DS 0D 16876+* 003208 0000D208 16877+T266TDSC DC A(T266) // TENTRY 00320C 00000104 16878+ DC A(T266TEND-T266) // TLENGTH 003210 00001F40 16879+ DC F'8000' // TLRCNT 003214 00000032 16880+ DC F'50' // TIGCNT 003218 00000001 16881+ DC F'1' // TLTYPE 00160D 16882+TEXT CSECT 00160D E3F2F6F6 16883+SPTR1396 DC C'T266' 00321C 16884+TDSCDAT CSECT 00321C 16885+ DS 0F 00321C 0400160D 16886+ DC AL1(L'SPTR1396),AL3(SPTR1396) 001611 16887+TEXT CSECT 001611 C3D3D440D96B896B 16888+SPTR1397 DC C'CLM R,i,m' 003220 16889+TDSCDAT CSECT 003220 16890+ DS 0F 003220 09001611 16891+ DC AL1(L'SPTR1397),AL3(SPTR1397) 16892+* 004B6C 16893+TDSCTBL CSECT 04B6C 16894+T266TPTR EQU * 004B6C 00003208 16895+ DC A(T266TDSC) enabled test 16896+* 00D204 16897+TCODE CSECT 00D208 16898+ DS 0D ensure double word alignment for test 00D208 16899+T266 DS 0H 01650000 00D208 90EC D00C 0000C 16900+ STM 14,12,12(13) SAVE REGISTERS 02950000 00D20C 18CF 16901+ LR R12,R15 base register := entry address 0D208 16902+ USING T266,R12 declare code base register 00D20E 41B0 C022 0D22A 16903+ LA R11,T266L load loop target to R11 00D212 58F0 C100 0D308 16904+ L R15,=A(SAVETST) R15 := current save area 00D216 50DF 0004 00004 16905+ ST R13,4(R15) set back pointer in current save area 00D21A 182D 16906+ LR R2,R13 remember callers save area PAGE 310 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00D21C 18DF 16907+ LR R13,R15 setup current save area 00D21E 50D2 0008 00008 16908+ ST R13,8(R2) set forw pointer in callers save area 00000 16909+ USING TDSC,R1 declare TDSC base register 00D222 58F0 1008 00008 16910+ L R15,TLRCNT load local repeat count to R15 16911+* 16912 * 00D226 5820 C0FC 0D304 16913 L R2,T266V 16914 T266L REPINS CLM,(R2,X'7',T266V) repeat: CLM R2,X'7',T266V 16915+* 16916+* build from sublist &ALIST a comma separated string &ARGS 16917+* 16918+* 16919+* 16920+* 16921+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 16922+* this allows to transfer the repeat count from last TDSCGEN call 16923+* 16924+* 0D22A 16925+T266L EQU * 16926+* 16927+* write a comment indicating what REPINS does (in case NOGEN in effect) 16928+* 16929+*,// REPINS: do 50 times: 16930+* 16931+* MNOTE requires that ' is doubled for expanded variables 16932+* thus build &MASTR as a copy of '&ARGS with ' doubled 16933+* 16934+* 16935+*,// CLM R2,X'7',T266V 16936+* 16937+* finally generate code: &ICNT copies of &CODE &ARGS 16938+* 00D22A BD27 C0FC 0D304 16939+ CLM R2,X'7',T266V 00D22E BD27 C0FC 0D304 16940+ CLM R2,X'7',T266V 00D232 BD27 C0FC 0D304 16941+ CLM R2,X'7',T266V 00D236 BD27 C0FC 0D304 16942+ CLM R2,X'7',T266V 00D23A BD27 C0FC 0D304 16943+ CLM R2,X'7',T266V 00D23E BD27 C0FC 0D304 16944+ CLM R2,X'7',T266V 00D242 BD27 C0FC 0D304 16945+ CLM R2,X'7',T266V 00D246 BD27 C0FC 0D304 16946+ CLM R2,X'7',T266V 00D24A BD27 C0FC 0D304 16947+ CLM R2,X'7',T266V 00D24E BD27 C0FC 0D304 16948+ CLM R2,X'7',T266V 00D252 BD27 C0FC 0D304 16949+ CLM R2,X'7',T266V 00D256 BD27 C0FC 0D304 16950+ CLM R2,X'7',T266V 00D25A BD27 C0FC 0D304 16951+ CLM R2,X'7',T266V 00D25E BD27 C0FC 0D304 16952+ CLM R2,X'7',T266V 00D262 BD27 C0FC 0D304 16953+ CLM R2,X'7',T266V 00D266 BD27 C0FC 0D304 16954+ CLM R2,X'7',T266V 00D26A BD27 C0FC 0D304 16955+ CLM R2,X'7',T266V 00D26E BD27 C0FC 0D304 16956+ CLM R2,X'7',T266V 00D272 BD27 C0FC 0D304 16957+ CLM R2,X'7',T266V 00D276 BD27 C0FC 0D304 16958+ CLM R2,X'7',T266V 00D27A BD27 C0FC 0D304 16959+ CLM R2,X'7',T266V 00D27E BD27 C0FC 0D304 16960+ CLM R2,X'7',T266V 00D282 BD27 C0FC 0D304 16961+ CLM R2,X'7',T266V PAGE 311 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00D286 BD27 C0FC 0D304 16962+ CLM R2,X'7',T266V 00D28A BD27 C0FC 0D304 16963+ CLM R2,X'7',T266V 00D28E BD27 C0FC 0D304 16964+ CLM R2,X'7',T266V 00D292 BD27 C0FC 0D304 16965+ CLM R2,X'7',T266V 00D296 BD27 C0FC 0D304 16966+ CLM R2,X'7',T266V 00D29A BD27 C0FC 0D304 16967+ CLM R2,X'7',T266V 00D29E BD27 C0FC 0D304 16968+ CLM R2,X'7',T266V 00D2A2 BD27 C0FC 0D304 16969+ CLM R2,X'7',T266V 00D2A6 BD27 C0FC 0D304 16970+ CLM R2,X'7',T266V 00D2AA BD27 C0FC 0D304 16971+ CLM R2,X'7',T266V 00D2AE BD27 C0FC 0D304 16972+ CLM R2,X'7',T266V 00D2B2 BD27 C0FC 0D304 16973+ CLM R2,X'7',T266V 00D2B6 BD27 C0FC 0D304 16974+ CLM R2,X'7',T266V 00D2BA BD27 C0FC 0D304 16975+ CLM R2,X'7',T266V 00D2BE BD27 C0FC 0D304 16976+ CLM R2,X'7',T266V 00D2C2 BD27 C0FC 0D304 16977+ CLM R2,X'7',T266V 00D2C6 BD27 C0FC 0D304 16978+ CLM R2,X'7',T266V 00D2CA BD27 C0FC 0D304 16979+ CLM R2,X'7',T266V 00D2CE BD27 C0FC 0D304 16980+ CLM R2,X'7',T266V 00D2D2 BD27 C0FC 0D304 16981+ CLM R2,X'7',T266V 00D2D6 BD27 C0FC 0D304 16982+ CLM R2,X'7',T266V 00D2DA BD27 C0FC 0D304 16983+ CLM R2,X'7',T266V 00D2DE BD27 C0FC 0D304 16984+ CLM R2,X'7',T266V 00D2E2 BD27 C0FC 0D304 16985+ CLM R2,X'7',T266V 00D2E6 BD27 C0FC 0D304 16986+ CLM R2,X'7',T266V 00D2EA BD27 C0FC 0D304 16987+ CLM R2,X'7',T266V 00D2EE BD27 C0FC 0D304 16988+ CLM R2,X'7',T266V 16989+* 00D2F2 06FB 16990 BCTR R15,R11 16991 TSIMRET 00D2F4 58F0 C100 0D308 16992+ L R15,=A(SAVETST) R15 := current save area 00D2F8 58DF 0004 00004 16993+ L R13,4(R15) get old save area back 00D2FC 98EC D00C 0000C 16994+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00D300 07FE 16995+ BR 14 RETURN 02000000 16996 * 00D304 16997 DS 0F 00D304 010203FF 16998 T266V DC X'010203FF' 16999 TSIMEND 00D308 17000+ LTORG 00D308 00000458 17001 =A(SAVETST) 0D30C 17002+T266TEND EQU * 17003 * 17004 * Test 27x -- CLC ========================================== 17005 * 17006 * Test 270 -- CLC m,m (10c,eq)------------------------------ 17007 * 17008 TSIMBEG T270,7000,20,1,C'CLC m,m (10c,eq)' 17009+* 003224 17010+TDSCDAT CSECT 003228 17011+ DS 0D 17012+* 003228 0000D310 17013+T270TDSC DC A(T270) // TENTRY 00322C 000000B4 17014+ DC A(T270TEND-T270) // TLENGTH 003230 00001B58 17015+ DC F'7000' // TLRCNT 003234 00000014 17016+ DC F'20' // TIGCNT PAGE 312 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003238 00000001 17017+ DC F'1' // TLTYPE 00161A 17018+TEXT CSECT 00161A E3F2F7F0 17019+SPTR1408 DC C'T270' 00323C 17020+TDSCDAT CSECT 00323C 17021+ DS 0F 00323C 0400161A 17022+ DC AL1(L'SPTR1408),AL3(SPTR1408) 00161E 17023+TEXT CSECT 00161E C3D3C340946B9440 17024+SPTR1409 DC C'CLC m,m (10c,eq)' 003240 17025+TDSCDAT CSECT 003240 17026+ DS 0F 003240 1000161E 17027+ DC AL1(L'SPTR1409),AL3(SPTR1409) 17028+* 004B70 17029+TDSCTBL CSECT 04B70 17030+T270TPTR EQU * 004B70 00003228 17031+ DC A(T270TDSC) enabled test 17032+* 00D30C 17033+TCODE CSECT 00D310 17034+ DS 0D ensure double word alignment for test 00D310 17035+T270 DS 0H 01650000 00D310 90EC D00C 0000C 17036+ STM 14,12,12(13) SAVE REGISTERS 02950000 00D314 18CF 17037+ LR R12,R15 base register := entry address 0D310 17038+ USING T270,R12 declare code base register 00D316 41B0 C01E 0D32E 17039+ LA R11,T270L load loop target to R11 00D31A 58F0 C0B0 0D3C0 17040+ L R15,=A(SAVETST) R15 := current save area 00D31E 50DF 0004 00004 17041+ ST R13,4(R15) set back pointer in current save area 00D322 182D 17042+ LR R2,R13 remember callers save area 00D324 18DF 17043+ LR R13,R15 setup current save area 00D326 50D2 0008 00008 17044+ ST R13,8(R2) set forw pointer in callers save area 00000 17045+ USING TDSC,R1 declare TDSC base register 00D32A 58F0 1008 00008 17046+ L R15,TLRCNT load local repeat count to R15 17047+* 17048 * 17049 T270L REPINS CLC,(T270V1,T270V1) repeat: CLC T270V1,T270V1 17050+* 17051+* build from sublist &ALIST a comma separated string &ARGS 17052+* 17053+* 17054+* 17055+* 17056+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 17057+* this allows to transfer the repeat count from last TDSCGEN call 17058+* 17059+* 0D32E 17060+T270L EQU * 17061+* 17062+* write a comment indicating what REPINS does (in case NOGEN in effect) 17063+* 17064+*,// REPINS: do 20 times: 17065+* 17066+* MNOTE requires that ' is doubled for expanded variables 17067+* thus build &MASTR as a copy of '&ARGS with ' doubled 17068+* 17069+* 17070+*,// CLC T270V1,T270V1 17071+* PAGE 313 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 17072+* finally generate code: &ICNT copies of &CODE &ARGS 17073+* 00D32E D509 C0A6 C0A6 0D3B6 0D3B6 17074+ CLC T270V1,T270V1 00D334 D509 C0A6 C0A6 0D3B6 0D3B6 17075+ CLC T270V1,T270V1 00D33A D509 C0A6 C0A6 0D3B6 0D3B6 17076+ CLC T270V1,T270V1 00D340 D509 C0A6 C0A6 0D3B6 0D3B6 17077+ CLC T270V1,T270V1 00D346 D509 C0A6 C0A6 0D3B6 0D3B6 17078+ CLC T270V1,T270V1 00D34C D509 C0A6 C0A6 0D3B6 0D3B6 17079+ CLC T270V1,T270V1 00D352 D509 C0A6 C0A6 0D3B6 0D3B6 17080+ CLC T270V1,T270V1 00D358 D509 C0A6 C0A6 0D3B6 0D3B6 17081+ CLC T270V1,T270V1 00D35E D509 C0A6 C0A6 0D3B6 0D3B6 17082+ CLC T270V1,T270V1 00D364 D509 C0A6 C0A6 0D3B6 0D3B6 17083+ CLC T270V1,T270V1 00D36A D509 C0A6 C0A6 0D3B6 0D3B6 17084+ CLC T270V1,T270V1 00D370 D509 C0A6 C0A6 0D3B6 0D3B6 17085+ CLC T270V1,T270V1 00D376 D509 C0A6 C0A6 0D3B6 0D3B6 17086+ CLC T270V1,T270V1 00D37C D509 C0A6 C0A6 0D3B6 0D3B6 17087+ CLC T270V1,T270V1 00D382 D509 C0A6 C0A6 0D3B6 0D3B6 17088+ CLC T270V1,T270V1 00D388 D509 C0A6 C0A6 0D3B6 0D3B6 17089+ CLC T270V1,T270V1 00D38E D509 C0A6 C0A6 0D3B6 0D3B6 17090+ CLC T270V1,T270V1 00D394 D509 C0A6 C0A6 0D3B6 0D3B6 17091+ CLC T270V1,T270V1 00D39A D509 C0A6 C0A6 0D3B6 0D3B6 17092+ CLC T270V1,T270V1 00D3A0 D509 C0A6 C0A6 0D3B6 0D3B6 17093+ CLC T270V1,T270V1 17094+* 00D3A6 06FB 17095 BCTR R15,R11 17096 TSIMRET 00D3A8 58F0 C0B0 0D3C0 17097+ L R15,=A(SAVETST) R15 := current save area 00D3AC 58DF 0004 00004 17098+ L R13,4(R15) get old save area back 00D3B0 98EC D00C 0000C 17099+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00D3B4 07FE 17100+ BR 14 RETURN 02000000 17101 * 00D3B6 F1F2F3F4F5F6F7F8 17102 T270V1 DC C'1234567890' 17103 TSIMEND 00D3C0 17104+ LTORG 00D3C0 00000458 17105 =A(SAVETST) 0D3C4 17106+T270TEND EQU * 17107 * 17108 * Test 271 -- CLC m,m (10c,ne)------------------------------ 17109 * 17110 TSIMBEG T271,8000,20,1,C'CLC m,m (10c,ne)' 17111+* 003244 17112+TDSCDAT CSECT 003248 17113+ DS 0D 17114+* 003248 0000D3C8 17115+T271TDSC DC A(T271) // TENTRY 00324C 000000C4 17116+ DC A(T271TEND-T271) // TLENGTH 003250 00001F40 17117+ DC F'8000' // TLRCNT 003254 00000014 17118+ DC F'20' // TIGCNT 003258 00000001 17119+ DC F'1' // TLTYPE 00162E 17120+TEXT CSECT 00162E E3F2F7F1 17121+SPTR1420 DC C'T271' 00325C 17122+TDSCDAT CSECT 00325C 17123+ DS 0F 00325C 0400162E 17124+ DC AL1(L'SPTR1420),AL3(SPTR1420) 001632 17125+TEXT CSECT 001632 C3D3C340946B9440 17126+SPTR1421 DC C'CLC m,m (10c,ne)' PAGE 314 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003260 17127+TDSCDAT CSECT 003260 17128+ DS 0F 003260 10001632 17129+ DC AL1(L'SPTR1421),AL3(SPTR1421) 17130+* 004B74 17131+TDSCTBL CSECT 04B74 17132+T271TPTR EQU * 004B74 00003248 17133+ DC A(T271TDSC) enabled test 17134+* 00D3C4 17135+TCODE CSECT 00D3C8 17136+ DS 0D ensure double word alignment for test 00D3C8 17137+T271 DS 0H 01650000 00D3C8 90EC D00C 0000C 17138+ STM 14,12,12(13) SAVE REGISTERS 02950000 00D3CC 18CF 17139+ LR R12,R15 base register := entry address 0D3C8 17140+ USING T271,R12 declare code base register 00D3CE 41B0 C01E 0D3E6 17141+ LA R11,T271L load loop target to R11 00D3D2 58F0 C0C0 0D488 17142+ L R15,=A(SAVETST) R15 := current save area 00D3D6 50DF 0004 00004 17143+ ST R13,4(R15) set back pointer in current save area 00D3DA 182D 17144+ LR R2,R13 remember callers save area 00D3DC 18DF 17145+ LR R13,R15 setup current save area 00D3DE 50D2 0008 00008 17146+ ST R13,8(R2) set forw pointer in callers save area 00000 17147+ USING TDSC,R1 declare TDSC base register 00D3E2 58F0 1008 00008 17148+ L R15,TLRCNT load local repeat count to R15 17149+* 17150 * 17151 T271L REPINS CLC,(T271V1,T271V2) repeat: CLC T271V1,T271V2 17152+* 17153+* build from sublist &ALIST a comma separated string &ARGS 17154+* 17155+* 17156+* 17157+* 17158+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 17159+* this allows to transfer the repeat count from last TDSCGEN call 17160+* 17161+* 0D3E6 17162+T271L EQU * 17163+* 17164+* write a comment indicating what REPINS does (in case NOGEN in effect) 17165+* 17166+*,// REPINS: do 20 times: 17167+* 17168+* MNOTE requires that ' is doubled for expanded variables 17169+* thus build &MASTR as a copy of '&ARGS with ' doubled 17170+* 17171+* 17172+*,// CLC T271V1,T271V2 17173+* 17174+* finally generate code: &ICNT copies of &CODE &ARGS 17175+* 00D3E6 D509 C0A6 C0B0 0D46E 0D478 17176+ CLC T271V1,T271V2 00D3EC D509 C0A6 C0B0 0D46E 0D478 17177+ CLC T271V1,T271V2 00D3F2 D509 C0A6 C0B0 0D46E 0D478 17178+ CLC T271V1,T271V2 00D3F8 D509 C0A6 C0B0 0D46E 0D478 17179+ CLC T271V1,T271V2 00D3FE D509 C0A6 C0B0 0D46E 0D478 17180+ CLC T271V1,T271V2 00D404 D509 C0A6 C0B0 0D46E 0D478 17181+ CLC T271V1,T271V2 PAGE 315 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00D40A D509 C0A6 C0B0 0D46E 0D478 17182+ CLC T271V1,T271V2 00D410 D509 C0A6 C0B0 0D46E 0D478 17183+ CLC T271V1,T271V2 00D416 D509 C0A6 C0B0 0D46E 0D478 17184+ CLC T271V1,T271V2 00D41C D509 C0A6 C0B0 0D46E 0D478 17185+ CLC T271V1,T271V2 00D422 D509 C0A6 C0B0 0D46E 0D478 17186+ CLC T271V1,T271V2 00D428 D509 C0A6 C0B0 0D46E 0D478 17187+ CLC T271V1,T271V2 00D42E D509 C0A6 C0B0 0D46E 0D478 17188+ CLC T271V1,T271V2 00D434 D509 C0A6 C0B0 0D46E 0D478 17189+ CLC T271V1,T271V2 00D43A D509 C0A6 C0B0 0D46E 0D478 17190+ CLC T271V1,T271V2 00D440 D509 C0A6 C0B0 0D46E 0D478 17191+ CLC T271V1,T271V2 00D446 D509 C0A6 C0B0 0D46E 0D478 17192+ CLC T271V1,T271V2 00D44C D509 C0A6 C0B0 0D46E 0D478 17193+ CLC T271V1,T271V2 00D452 D509 C0A6 C0B0 0D46E 0D478 17194+ CLC T271V1,T271V2 00D458 D509 C0A6 C0B0 0D46E 0D478 17195+ CLC T271V1,T271V2 17196+* 00D45E 06FB 17197 BCTR R15,R11 17198 TSIMRET 00D460 58F0 C0C0 0D488 17199+ L R15,=A(SAVETST) R15 := current save area 00D464 58DF 0004 00004 17200+ L R13,4(R15) get old save area back 00D468 98EC D00C 0000C 17201+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00D46C 07FE 17202+ BR 14 RETURN 02000000 17203 * 00D46E F1F2F3F4F5F6F7F8 17204 T271V1 DC C'1234567890' 00D478 F2F3F4F5F6F7F8F9 17205 T271V2 DC C'2345678901' 17206 TSIMEND 00D488 17207+ LTORG 00D488 00000458 17208 =A(SAVETST) 0D48C 17209+T271TEND EQU * 17210 * 17211 * Test 272 -- CLC m,m (30c,eq)------------------------------ 17212 * 17213 TSIMBEG T272,5000,20,1,C'CLC m,m (30c,eq)' 17214+* 003264 17215+TDSCDAT CSECT 003268 17216+ DS 0D 17217+* 003268 0000D490 17218+T272TDSC DC A(T272) // TENTRY 00326C 000000CC 17219+ DC A(T272TEND-T272) // TLENGTH 003270 00001388 17220+ DC F'5000' // TLRCNT 003274 00000014 17221+ DC F'20' // TIGCNT 003278 00000001 17222+ DC F'1' // TLTYPE 001642 17223+TEXT CSECT 001642 E3F2F7F2 17224+SPTR1432 DC C'T272' 00327C 17225+TDSCDAT CSECT 00327C 17226+ DS 0F 00327C 04001642 17227+ DC AL1(L'SPTR1432),AL3(SPTR1432) 001646 17228+TEXT CSECT 001646 C3D3C340946B9440 17229+SPTR1433 DC C'CLC m,m (30c,eq)' 003280 17230+TDSCDAT CSECT 003280 17231+ DS 0F 003280 10001646 17232+ DC AL1(L'SPTR1433),AL3(SPTR1433) 17233+* 004B78 17234+TDSCTBL CSECT 04B78 17235+T272TPTR EQU * 004B78 00003268 17236+ DC A(T272TDSC) enabled test PAGE 316 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 17237+* 00D48C 17238+TCODE CSECT 00D490 17239+ DS 0D ensure double word alignment for test 00D490 17240+T272 DS 0H 01650000 00D490 90EC D00C 0000C 17241+ STM 14,12,12(13) SAVE REGISTERS 02950000 00D494 18CF 17242+ LR R12,R15 base register := entry address 0D490 17243+ USING T272,R12 declare code base register 00D496 41B0 C01E 0D4AE 17244+ LA R11,T272L load loop target to R11 00D49A 58F0 C0C8 0D558 17245+ L R15,=A(SAVETST) R15 := current save area 00D49E 50DF 0004 00004 17246+ ST R13,4(R15) set back pointer in current save area 00D4A2 182D 17247+ LR R2,R13 remember callers save area 00D4A4 18DF 17248+ LR R13,R15 setup current save area 00D4A6 50D2 0008 00008 17249+ ST R13,8(R2) set forw pointer in callers save area 00000 17250+ USING TDSC,R1 declare TDSC base register 00D4AA 58F0 1008 00008 17251+ L R15,TLRCNT load local repeat count to R15 17252+* 17253 * 17254 T272L REPINS CLC,(T272V1,T272V1) repeat: CLC T272V1,T272V1 17255+* 17256+* build from sublist &ALIST a comma separated string &ARGS 17257+* 17258+* 17259+* 17260+* 17261+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 17262+* this allows to transfer the repeat count from last TDSCGEN call 17263+* 17264+* 0D4AE 17265+T272L EQU * 17266+* 17267+* write a comment indicating what REPINS does (in case NOGEN in effect) 17268+* 17269+*,// REPINS: do 20 times: 17270+* 17271+* MNOTE requires that ' is doubled for expanded variables 17272+* thus build &MASTR as a copy of '&ARGS with ' doubled 17273+* 17274+* 17275+*,// CLC T272V1,T272V1 17276+* 17277+* finally generate code: &ICNT copies of &CODE &ARGS 17278+* 00D4AE D51D C0A6 C0A6 0D536 0D536 17279+ CLC T272V1,T272V1 00D4B4 D51D C0A6 C0A6 0D536 0D536 17280+ CLC T272V1,T272V1 00D4BA D51D C0A6 C0A6 0D536 0D536 17281+ CLC T272V1,T272V1 00D4C0 D51D C0A6 C0A6 0D536 0D536 17282+ CLC T272V1,T272V1 00D4C6 D51D C0A6 C0A6 0D536 0D536 17283+ CLC T272V1,T272V1 00D4CC D51D C0A6 C0A6 0D536 0D536 17284+ CLC T272V1,T272V1 00D4D2 D51D C0A6 C0A6 0D536 0D536 17285+ CLC T272V1,T272V1 00D4D8 D51D C0A6 C0A6 0D536 0D536 17286+ CLC T272V1,T272V1 00D4DE D51D C0A6 C0A6 0D536 0D536 17287+ CLC T272V1,T272V1 00D4E4 D51D C0A6 C0A6 0D536 0D536 17288+ CLC T272V1,T272V1 00D4EA D51D C0A6 C0A6 0D536 0D536 17289+ CLC T272V1,T272V1 00D4F0 D51D C0A6 C0A6 0D536 0D536 17290+ CLC T272V1,T272V1 00D4F6 D51D C0A6 C0A6 0D536 0D536 17291+ CLC T272V1,T272V1 PAGE 317 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00D4FC D51D C0A6 C0A6 0D536 0D536 17292+ CLC T272V1,T272V1 00D502 D51D C0A6 C0A6 0D536 0D536 17293+ CLC T272V1,T272V1 00D508 D51D C0A6 C0A6 0D536 0D536 17294+ CLC T272V1,T272V1 00D50E D51D C0A6 C0A6 0D536 0D536 17295+ CLC T272V1,T272V1 00D514 D51D C0A6 C0A6 0D536 0D536 17296+ CLC T272V1,T272V1 00D51A D51D C0A6 C0A6 0D536 0D536 17297+ CLC T272V1,T272V1 00D520 D51D C0A6 C0A6 0D536 0D536 17298+ CLC T272V1,T272V1 17299+* 00D526 06FB 17300 BCTR R15,R11 17301 TSIMRET 00D528 58F0 C0C8 0D558 17302+ L R15,=A(SAVETST) R15 := current save area 00D52C 58DF 0004 00004 17303+ L R13,4(R15) get old save area back 00D530 98EC D00C 0000C 17304+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00D534 07FE 17305+ BR 14 RETURN 02000000 17306 * 00D536 F1F2F3F4F5F6F7F8 17307 T272V1 DC C'123456789012345678901234567890' 17308 TSIMEND 00D558 17309+ LTORG 00D558 00000458 17310 =A(SAVETST) 0D55C 17311+T272TEND EQU * 17312 * 17313 * Test 273 -- CLC m,m (30c,ne)------------------------------ 17314 * 17315 TSIMBEG T273,8000,20,1,C'CLC m,m (30c,ne)' 17316+* 003284 17317+TDSCDAT CSECT 003288 17318+ DS 0D 17319+* 003288 0000D560 17320+T273TDSC DC A(T273) // TENTRY 00328C 000000EC 17321+ DC A(T273TEND-T273) // TLENGTH 003290 00001F40 17322+ DC F'8000' // TLRCNT 003294 00000014 17323+ DC F'20' // TIGCNT 003298 00000001 17324+ DC F'1' // TLTYPE 001656 17325+TEXT CSECT 001656 E3F2F7F3 17326+SPTR1444 DC C'T273' 00329C 17327+TDSCDAT CSECT 00329C 17328+ DS 0F 00329C 04001656 17329+ DC AL1(L'SPTR1444),AL3(SPTR1444) 00165A 17330+TEXT CSECT 00165A C3D3C340946B9440 17331+SPTR1445 DC C'CLC m,m (30c,ne)' 0032A0 17332+TDSCDAT CSECT 0032A0 17333+ DS 0F 0032A0 1000165A 17334+ DC AL1(L'SPTR1445),AL3(SPTR1445) 17335+* 004B7C 17336+TDSCTBL CSECT 04B7C 17337+T273TPTR EQU * 004B7C 00003288 17338+ DC A(T273TDSC) enabled test 17339+* 00D55C 17340+TCODE CSECT 00D560 17341+ DS 0D ensure double word alignment for test 00D560 17342+T273 DS 0H 01650000 00D560 90EC D00C 0000C 17343+ STM 14,12,12(13) SAVE REGISTERS 02950000 00D564 18CF 17344+ LR R12,R15 base register := entry address 0D560 17345+ USING T273,R12 declare code base register 00D566 41B0 C01E 0D57E 17346+ LA R11,T273L load loop target to R11 PAGE 318 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00D56A 58F0 C0E8 0D648 17347+ L R15,=A(SAVETST) R15 := current save area 00D56E 50DF 0004 00004 17348+ ST R13,4(R15) set back pointer in current save area 00D572 182D 17349+ LR R2,R13 remember callers save area 00D574 18DF 17350+ LR R13,R15 setup current save area 00D576 50D2 0008 00008 17351+ ST R13,8(R2) set forw pointer in callers save area 00000 17352+ USING TDSC,R1 declare TDSC base register 00D57A 58F0 1008 00008 17353+ L R15,TLRCNT load local repeat count to R15 17354+* 17355 * 17356 T273L REPINS CLC,(T273V1,T273V2) repeat: CLC T273V1,T273V2 17357+* 17358+* build from sublist &ALIST a comma separated string &ARGS 17359+* 17360+* 17361+* 17362+* 17363+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 17364+* this allows to transfer the repeat count from last TDSCGEN call 17365+* 17366+* 0D57E 17367+T273L EQU * 17368+* 17369+* write a comment indicating what REPINS does (in case NOGEN in effect) 17370+* 17371+*,// REPINS: do 20 times: 17372+* 17373+* MNOTE requires that ' is doubled for expanded variables 17374+* thus build &MASTR as a copy of '&ARGS with ' doubled 17375+* 17376+* 17377+*,// CLC T273V1,T273V2 17378+* 17379+* finally generate code: &ICNT copies of &CODE &ARGS 17380+* 00D57E D51D C0A6 C0C4 0D606 0D624 17381+ CLC T273V1,T273V2 00D584 D51D C0A6 C0C4 0D606 0D624 17382+ CLC T273V1,T273V2 00D58A D51D C0A6 C0C4 0D606 0D624 17383+ CLC T273V1,T273V2 00D590 D51D C0A6 C0C4 0D606 0D624 17384+ CLC T273V1,T273V2 00D596 D51D C0A6 C0C4 0D606 0D624 17385+ CLC T273V1,T273V2 00D59C D51D C0A6 C0C4 0D606 0D624 17386+ CLC T273V1,T273V2 00D5A2 D51D C0A6 C0C4 0D606 0D624 17387+ CLC T273V1,T273V2 00D5A8 D51D C0A6 C0C4 0D606 0D624 17388+ CLC T273V1,T273V2 00D5AE D51D C0A6 C0C4 0D606 0D624 17389+ CLC T273V1,T273V2 00D5B4 D51D C0A6 C0C4 0D606 0D624 17390+ CLC T273V1,T273V2 00D5BA D51D C0A6 C0C4 0D606 0D624 17391+ CLC T273V1,T273V2 00D5C0 D51D C0A6 C0C4 0D606 0D624 17392+ CLC T273V1,T273V2 00D5C6 D51D C0A6 C0C4 0D606 0D624 17393+ CLC T273V1,T273V2 00D5CC D51D C0A6 C0C4 0D606 0D624 17394+ CLC T273V1,T273V2 00D5D2 D51D C0A6 C0C4 0D606 0D624 17395+ CLC T273V1,T273V2 00D5D8 D51D C0A6 C0C4 0D606 0D624 17396+ CLC T273V1,T273V2 00D5DE D51D C0A6 C0C4 0D606 0D624 17397+ CLC T273V1,T273V2 00D5E4 D51D C0A6 C0C4 0D606 0D624 17398+ CLC T273V1,T273V2 00D5EA D51D C0A6 C0C4 0D606 0D624 17399+ CLC T273V1,T273V2 00D5F0 D51D C0A6 C0C4 0D606 0D624 17400+ CLC T273V1,T273V2 17401+* PAGE 319 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00D5F6 06FB 17402 BCTR R15,R11 17403 TSIMRET 00D5F8 58F0 C0E8 0D648 17404+ L R15,=A(SAVETST) R15 := current save area 00D5FC 58DF 0004 00004 17405+ L R13,4(R15) get old save area back 00D600 98EC D00C 0000C 17406+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00D604 07FE 17407+ BR 14 RETURN 02000000 17408 * 00D606 F1F2F3F4F5F6F7F8 17409 T273V1 DC C'123456789012345678901234567890' 00D624 F2F3F4F5F6F7F8F9 17410 T273V2 DC C'234567890123456789012345678901' 17411 TSIMEND 00D648 17412+ LTORG 00D648 00000458 17413 =A(SAVETST) 0D64C 17414+T273TEND EQU * 17415 * 17416 * Test 274 -- CLC m,m (100c,eq)----------------------------- 17417 * 17418 TSIMBEG T274,2900,20,1,C'CLC m,m (100c,eq)' 17419+* 0032A4 17420+TDSCDAT CSECT 0032A8 17421+ DS 0D 17422+* 0032A8 0000D650 17423+T274TDSC DC A(T274) // TENTRY 0032AC 00000174 17424+ DC A(T274TEND-T274) // TLENGTH 0032B0 00000B54 17425+ DC F'2900' // TLRCNT 0032B4 00000014 17426+ DC F'20' // TIGCNT 0032B8 00000001 17427+ DC F'1' // TLTYPE 00166A 17428+TEXT CSECT 00166A E3F2F7F4 17429+SPTR1456 DC C'T274' 0032BC 17430+TDSCDAT CSECT 0032BC 17431+ DS 0F 0032BC 0400166A 17432+ DC AL1(L'SPTR1456),AL3(SPTR1456) 00166E 17433+TEXT CSECT 00166E C3D3C340946B9440 17434+SPTR1457 DC C'CLC m,m (100c,eq)' 0032C0 17435+TDSCDAT CSECT 0032C0 17436+ DS 0F 0032C0 1100166E 17437+ DC AL1(L'SPTR1457),AL3(SPTR1457) 17438+* 004B80 17439+TDSCTBL CSECT 04B80 17440+T274TPTR EQU * 004B80 000032A8 17441+ DC A(T274TDSC) enabled test 17442+* 00D64C 17443+TCODE CSECT 00D650 17444+ DS 0D ensure double word alignment for test 00D650 17445+T274 DS 0H 01650000 00D650 90EC D00C 0000C 17446+ STM 14,12,12(13) SAVE REGISTERS 02950000 00D654 18CF 17447+ LR R12,R15 base register := entry address 0D650 17448+ USING T274,R12 declare code base register 00D656 41B0 C01E 0D66E 17449+ LA R11,T274L load loop target to R11 00D65A 58F0 C170 0D7C0 17450+ L R15,=A(SAVETST) R15 := current save area 00D65E 50DF 0004 00004 17451+ ST R13,4(R15) set back pointer in current save area 00D662 182D 17452+ LR R2,R13 remember callers save area 00D664 18DF 17453+ LR R13,R15 setup current save area 00D666 50D2 0008 00008 17454+ ST R13,8(R2) set forw pointer in callers save area 00000 17455+ USING TDSC,R1 declare TDSC base register 00D66A 58F0 1008 00008 17456+ L R15,TLRCNT load local repeat count to R15 PAGE 320 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 17457+* 17458 * 17459 T274L REPINS CLC,(T274V1(100),T274V2) repeat: CLC T274V1(100),T274V2 17460+* 17461+* build from sublist &ALIST a comma separated string &ARGS 17462+* 17463+* 17464+* 17465+* 17466+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 17467+* this allows to transfer the repeat count from last TDSCGEN call 17468+* 17469+* 0D66E 17470+T274L EQU * 17471+* 17472+* write a comment indicating what REPINS does (in case NOGEN in effect) 17473+* 17474+*,// REPINS: do 20 times: 17475+* 17476+* MNOTE requires that ' is doubled for expanded variables 17477+* thus build &MASTR as a copy of '&ARGS with ' doubled 17478+* 17479+* 17480+*,// CLC T274V1(100),T274V2 17481+* 17482+* finally generate code: &ICNT copies of &CODE &ARGS 17483+* 00D66E D563 C0A6 C10A 0D6F6 0D75A 17484+ CLC T274V1(100),T274V2 00D674 D563 C0A6 C10A 0D6F6 0D75A 17485+ CLC T274V1(100),T274V2 00D67A D563 C0A6 C10A 0D6F6 0D75A 17486+ CLC T274V1(100),T274V2 00D680 D563 C0A6 C10A 0D6F6 0D75A 17487+ CLC T274V1(100),T274V2 00D686 D563 C0A6 C10A 0D6F6 0D75A 17488+ CLC T274V1(100),T274V2 00D68C D563 C0A6 C10A 0D6F6 0D75A 17489+ CLC T274V1(100),T274V2 00D692 D563 C0A6 C10A 0D6F6 0D75A 17490+ CLC T274V1(100),T274V2 00D698 D563 C0A6 C10A 0D6F6 0D75A 17491+ CLC T274V1(100),T274V2 00D69E D563 C0A6 C10A 0D6F6 0D75A 17492+ CLC T274V1(100),T274V2 00D6A4 D563 C0A6 C10A 0D6F6 0D75A 17493+ CLC T274V1(100),T274V2 00D6AA D563 C0A6 C10A 0D6F6 0D75A 17494+ CLC T274V1(100),T274V2 00D6B0 D563 C0A6 C10A 0D6F6 0D75A 17495+ CLC T274V1(100),T274V2 00D6B6 D563 C0A6 C10A 0D6F6 0D75A 17496+ CLC T274V1(100),T274V2 00D6BC D563 C0A6 C10A 0D6F6 0D75A 17497+ CLC T274V1(100),T274V2 00D6C2 D563 C0A6 C10A 0D6F6 0D75A 17498+ CLC T274V1(100),T274V2 00D6C8 D563 C0A6 C10A 0D6F6 0D75A 17499+ CLC T274V1(100),T274V2 00D6CE D563 C0A6 C10A 0D6F6 0D75A 17500+ CLC T274V1(100),T274V2 00D6D4 D563 C0A6 C10A 0D6F6 0D75A 17501+ CLC T274V1(100),T274V2 00D6DA D563 C0A6 C10A 0D6F6 0D75A 17502+ CLC T274V1(100),T274V2 00D6E0 D563 C0A6 C10A 0D6F6 0D75A 17503+ CLC T274V1(100),T274V2 17504+* 00D6E6 06FB 17505 BCTR R15,R11 17506 TSIMRET 00D6E8 58F0 C170 0D7C0 17507+ L R15,=A(SAVETST) R15 := current save area 00D6EC 58DF 0004 00004 17508+ L R13,4(R15) get old save area back 00D6F0 98EC D00C 0000C 17509+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00D6F4 07FE 17510+ BR 14 RETURN 02000000 17511 * PAGE 321 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00D6F6 E7E7E7E7E7E7E7E7 17512 T274V1 DC 100C'X' 00D75A E7E7E7E7E7E7E7E7 17513 T274V2 DC 100C'X' 17514 TSIMEND 00D7C0 17515+ LTORG 00D7C0 00000458 17516 =A(SAVETST) 0D7C4 17517+T274TEND EQU * 17518 * 17519 * Test 275 -- CLC m,m (100c,ne)----------------------------- 17520 * 17521 TSIMBEG T275,8000,20,1,C'CLC m,m (100c,ne)' 17522+* 0032C4 17523+TDSCDAT CSECT 0032C8 17524+ DS 0D 17525+* 0032C8 0000D7C8 17526+T275TDSC DC A(T275) // TENTRY 0032CC 00000174 17527+ DC A(T275TEND-T275) // TLENGTH 0032D0 00001F40 17528+ DC F'8000' // TLRCNT 0032D4 00000014 17529+ DC F'20' // TIGCNT 0032D8 00000001 17530+ DC F'1' // TLTYPE 00167F 17531+TEXT CSECT 00167F E3F2F7F5 17532+SPTR1468 DC C'T275' 0032DC 17533+TDSCDAT CSECT 0032DC 17534+ DS 0F 0032DC 0400167F 17535+ DC AL1(L'SPTR1468),AL3(SPTR1468) 001683 17536+TEXT CSECT 001683 C3D3C340946B9440 17537+SPTR1469 DC C'CLC m,m (100c,ne)' 0032E0 17538+TDSCDAT CSECT 0032E0 17539+ DS 0F 0032E0 11001683 17540+ DC AL1(L'SPTR1469),AL3(SPTR1469) 17541+* 004B84 17542+TDSCTBL CSECT 04B84 17543+T275TPTR EQU * 004B84 000032C8 17544+ DC A(T275TDSC) enabled test 17545+* 00D7C4 17546+TCODE CSECT 00D7C8 17547+ DS 0D ensure double word alignment for test 00D7C8 17548+T275 DS 0H 01650000 00D7C8 90EC D00C 0000C 17549+ STM 14,12,12(13) SAVE REGISTERS 02950000 00D7CC 18CF 17550+ LR R12,R15 base register := entry address 0D7C8 17551+ USING T275,R12 declare code base register 00D7CE 41B0 C01E 0D7E6 17552+ LA R11,T275L load loop target to R11 00D7D2 58F0 C170 0D938 17553+ L R15,=A(SAVETST) R15 := current save area 00D7D6 50DF 0004 00004 17554+ ST R13,4(R15) set back pointer in current save area 00D7DA 182D 17555+ LR R2,R13 remember callers save area 00D7DC 18DF 17556+ LR R13,R15 setup current save area 00D7DE 50D2 0008 00008 17557+ ST R13,8(R2) set forw pointer in callers save area 00000 17558+ USING TDSC,R1 declare TDSC base register 00D7E2 58F0 1008 00008 17559+ L R15,TLRCNT load local repeat count to R15 17560+* 17561 * 17562 T275L REPINS CLC,(T275V1(100),T275V2) repeat: CLC T275V1(100),T275V2 17563+* 17564+* build from sublist &ALIST a comma separated string &ARGS 17565+* 17566+* PAGE 322 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 17567+* 17568+* 17569+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 17570+* this allows to transfer the repeat count from last TDSCGEN call 17571+* 17572+* 0D7E6 17573+T275L EQU * 17574+* 17575+* write a comment indicating what REPINS does (in case NOGEN in effect) 17576+* 17577+*,// REPINS: do 20 times: 17578+* 17579+* MNOTE requires that ' is doubled for expanded variables 17580+* thus build &MASTR as a copy of '&ARGS with ' doubled 17581+* 17582+* 17583+*,// CLC T275V1(100),T275V2 17584+* 17585+* finally generate code: &ICNT copies of &CODE &ARGS 17586+* 00D7E6 D563 C0A6 C10A 0D86E 0D8D2 17587+ CLC T275V1(100),T275V2 00D7EC D563 C0A6 C10A 0D86E 0D8D2 17588+ CLC T275V1(100),T275V2 00D7F2 D563 C0A6 C10A 0D86E 0D8D2 17589+ CLC T275V1(100),T275V2 00D7F8 D563 C0A6 C10A 0D86E 0D8D2 17590+ CLC T275V1(100),T275V2 00D7FE D563 C0A6 C10A 0D86E 0D8D2 17591+ CLC T275V1(100),T275V2 00D804 D563 C0A6 C10A 0D86E 0D8D2 17592+ CLC T275V1(100),T275V2 00D80A D563 C0A6 C10A 0D86E 0D8D2 17593+ CLC T275V1(100),T275V2 00D810 D563 C0A6 C10A 0D86E 0D8D2 17594+ CLC T275V1(100),T275V2 00D816 D563 C0A6 C10A 0D86E 0D8D2 17595+ CLC T275V1(100),T275V2 00D81C D563 C0A6 C10A 0D86E 0D8D2 17596+ CLC T275V1(100),T275V2 00D822 D563 C0A6 C10A 0D86E 0D8D2 17597+ CLC T275V1(100),T275V2 00D828 D563 C0A6 C10A 0D86E 0D8D2 17598+ CLC T275V1(100),T275V2 00D82E D563 C0A6 C10A 0D86E 0D8D2 17599+ CLC T275V1(100),T275V2 00D834 D563 C0A6 C10A 0D86E 0D8D2 17600+ CLC T275V1(100),T275V2 00D83A D563 C0A6 C10A 0D86E 0D8D2 17601+ CLC T275V1(100),T275V2 00D840 D563 C0A6 C10A 0D86E 0D8D2 17602+ CLC T275V1(100),T275V2 00D846 D563 C0A6 C10A 0D86E 0D8D2 17603+ CLC T275V1(100),T275V2 00D84C D563 C0A6 C10A 0D86E 0D8D2 17604+ CLC T275V1(100),T275V2 00D852 D563 C0A6 C10A 0D86E 0D8D2 17605+ CLC T275V1(100),T275V2 00D858 D563 C0A6 C10A 0D86E 0D8D2 17606+ CLC T275V1(100),T275V2 17607+* 00D85E 06FB 17608 BCTR R15,R11 17609 TSIMRET 00D860 58F0 C170 0D938 17610+ L R15,=A(SAVETST) R15 := current save area 00D864 58DF 0004 00004 17611+ L R13,4(R15) get old save area back 00D868 98EC D00C 0000C 17612+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00D86C 07FE 17613+ BR 14 RETURN 02000000 17614 * 00D86E E7E7E7E7E7E7E7E7 17615 T275V1 DC 100C'X' 00D8D2 E8E8E8E8E8E8E8E8 17616 T275V2 DC 100C'Y' 17617 TSIMEND 00D938 17618+ LTORG 00D938 00000458 17619 =A(SAVETST) 0D93C 17620+T275TEND EQU * 17621 * PAGE 323 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 17622 * Test 276 -- CLC m,m (250c,eq)----------------------------- 17623 * 17624 TSIMBEG T276,1500,20,1,C'CLC m,m (250c,eq)' 17625+* 0032E4 17626+TDSCDAT CSECT 0032E8 17627+ DS 0D 17628+* 0032E8 0000D940 17629+T276TDSC DC A(T276) // TENTRY 0032EC 000002A4 17630+ DC A(T276TEND-T276) // TLENGTH 0032F0 000005DC 17631+ DC F'1500' // TLRCNT 0032F4 00000014 17632+ DC F'20' // TIGCNT 0032F8 00000001 17633+ DC F'1' // TLTYPE 001694 17634+TEXT CSECT 001694 E3F2F7F6 17635+SPTR1480 DC C'T276' 0032FC 17636+TDSCDAT CSECT 0032FC 17637+ DS 0F 0032FC 04001694 17638+ DC AL1(L'SPTR1480),AL3(SPTR1480) 001698 17639+TEXT CSECT 001698 C3D3C340946B9440 17640+SPTR1481 DC C'CLC m,m (250c,eq)' 003300 17641+TDSCDAT CSECT 003300 17642+ DS 0F 003300 11001698 17643+ DC AL1(L'SPTR1481),AL3(SPTR1481) 17644+* 004B88 17645+TDSCTBL CSECT 04B88 17646+T276TPTR EQU * 004B88 000032E8 17647+ DC A(T276TDSC) enabled test 17648+* 00D93C 17649+TCODE CSECT 00D940 17650+ DS 0D ensure double word alignment for test 00D940 17651+T276 DS 0H 01650000 00D940 90EC D00C 0000C 17652+ STM 14,12,12(13) SAVE REGISTERS 02950000 00D944 18CF 17653+ LR R12,R15 base register := entry address 0D940 17654+ USING T276,R12 declare code base register 00D946 41B0 C01E 0D95E 17655+ LA R11,T276L load loop target to R11 00D94A 58F0 C2A0 0DBE0 17656+ L R15,=A(SAVETST) R15 := current save area 00D94E 50DF 0004 00004 17657+ ST R13,4(R15) set back pointer in current save area 00D952 182D 17658+ LR R2,R13 remember callers save area 00D954 18DF 17659+ LR R13,R15 setup current save area 00D956 50D2 0008 00008 17660+ ST R13,8(R2) set forw pointer in callers save area 00000 17661+ USING TDSC,R1 declare TDSC base register 00D95A 58F0 1008 00008 17662+ L R15,TLRCNT load local repeat count to R15 17663+* 17664 * 17665 T276L REPINS CLC,(T276V1(250),T276V2) repeat: CLC T276V1(250),T276V2 17666+* 17667+* build from sublist &ALIST a comma separated string &ARGS 17668+* 17669+* 17670+* 17671+* 17672+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 17673+* this allows to transfer the repeat count from last TDSCGEN call 17674+* 17675+* 0D95E 17676+T276L EQU * PAGE 324 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 17677+* 17678+* write a comment indicating what REPINS does (in case NOGEN in effect) 17679+* 17680+*,// REPINS: do 20 times: 17681+* 17682+* MNOTE requires that ' is doubled for expanded variables 17683+* thus build &MASTR as a copy of '&ARGS with ' doubled 17684+* 17685+* 17686+*,// CLC T276V1(250),T276V2 17687+* 17688+* finally generate code: &ICNT copies of &CODE &ARGS 17689+* 00D95E D5F9 C0A6 C1A0 0D9E6 0DAE0 17690+ CLC T276V1(250),T276V2 00D964 D5F9 C0A6 C1A0 0D9E6 0DAE0 17691+ CLC T276V1(250),T276V2 00D96A D5F9 C0A6 C1A0 0D9E6 0DAE0 17692+ CLC T276V1(250),T276V2 00D970 D5F9 C0A6 C1A0 0D9E6 0DAE0 17693+ CLC T276V1(250),T276V2 00D976 D5F9 C0A6 C1A0 0D9E6 0DAE0 17694+ CLC T276V1(250),T276V2 00D97C D5F9 C0A6 C1A0 0D9E6 0DAE0 17695+ CLC T276V1(250),T276V2 00D982 D5F9 C0A6 C1A0 0D9E6 0DAE0 17696+ CLC T276V1(250),T276V2 00D988 D5F9 C0A6 C1A0 0D9E6 0DAE0 17697+ CLC T276V1(250),T276V2 00D98E D5F9 C0A6 C1A0 0D9E6 0DAE0 17698+ CLC T276V1(250),T276V2 00D994 D5F9 C0A6 C1A0 0D9E6 0DAE0 17699+ CLC T276V1(250),T276V2 00D99A D5F9 C0A6 C1A0 0D9E6 0DAE0 17700+ CLC T276V1(250),T276V2 00D9A0 D5F9 C0A6 C1A0 0D9E6 0DAE0 17701+ CLC T276V1(250),T276V2 00D9A6 D5F9 C0A6 C1A0 0D9E6 0DAE0 17702+ CLC T276V1(250),T276V2 00D9AC D5F9 C0A6 C1A0 0D9E6 0DAE0 17703+ CLC T276V1(250),T276V2 00D9B2 D5F9 C0A6 C1A0 0D9E6 0DAE0 17704+ CLC T276V1(250),T276V2 00D9B8 D5F9 C0A6 C1A0 0D9E6 0DAE0 17705+ CLC T276V1(250),T276V2 00D9BE D5F9 C0A6 C1A0 0D9E6 0DAE0 17706+ CLC T276V1(250),T276V2 00D9C4 D5F9 C0A6 C1A0 0D9E6 0DAE0 17707+ CLC T276V1(250),T276V2 00D9CA D5F9 C0A6 C1A0 0D9E6 0DAE0 17708+ CLC T276V1(250),T276V2 00D9D0 D5F9 C0A6 C1A0 0D9E6 0DAE0 17709+ CLC T276V1(250),T276V2 17710+* 00D9D6 06FB 17711 BCTR R15,R11 17712 TSIMRET 00D9D8 58F0 C2A0 0DBE0 17713+ L R15,=A(SAVETST) R15 := current save area 00D9DC 58DF 0004 00004 17714+ L R13,4(R15) get old save area back 00D9E0 98EC D00C 0000C 17715+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00D9E4 07FE 17716+ BR 14 RETURN 02000000 17717 * 00D9E6 E7E7E7E7E7E7E7E7 17718 T276V1 DC 250C'X' 00DAE0 E7E7E7E7E7E7E7E7 17719 T276V2 DC 250C'X' 17720 TSIMEND 00DBE0 17721+ LTORG 00DBE0 00000458 17722 =A(SAVETST) 0DBE4 17723+T276TEND EQU * 17724 * 17725 * Test 277 -- CLC m,m (250c,ne)----------------------------- 17726 * 17727 TSIMBEG T277,8000,20,1,C'CLC m,m (250c,ne)' 17728+* 003304 17729+TDSCDAT CSECT 003308 17730+ DS 0D 17731+* PAGE 325 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003308 0000DBE8 17732+T277TDSC DC A(T277) // TENTRY 00330C 000002A4 17733+ DC A(T277TEND-T277) // TLENGTH 003310 00001F40 17734+ DC F'8000' // TLRCNT 003314 00000014 17735+ DC F'20' // TIGCNT 003318 00000001 17736+ DC F'1' // TLTYPE 0016A9 17737+TEXT CSECT 0016A9 E3F2F7F7 17738+SPTR1492 DC C'T277' 00331C 17739+TDSCDAT CSECT 00331C 17740+ DS 0F 00331C 040016A9 17741+ DC AL1(L'SPTR1492),AL3(SPTR1492) 0016AD 17742+TEXT CSECT 0016AD C3D3C340946B9440 17743+SPTR1493 DC C'CLC m,m (250c,ne)' 003320 17744+TDSCDAT CSECT 003320 17745+ DS 0F 003320 110016AD 17746+ DC AL1(L'SPTR1493),AL3(SPTR1493) 17747+* 004B8C 17748+TDSCTBL CSECT 04B8C 17749+T277TPTR EQU * 004B8C 00003308 17750+ DC A(T277TDSC) enabled test 17751+* 00DBE4 17752+TCODE CSECT 00DBE8 17753+ DS 0D ensure double word alignment for test 00DBE8 17754+T277 DS 0H 01650000 00DBE8 90EC D00C 0000C 17755+ STM 14,12,12(13) SAVE REGISTERS 02950000 00DBEC 18CF 17756+ LR R12,R15 base register := entry address 0DBE8 17757+ USING T277,R12 declare code base register 00DBEE 41B0 C01E 0DC06 17758+ LA R11,T277L load loop target to R11 00DBF2 58F0 C2A0 0DE88 17759+ L R15,=A(SAVETST) R15 := current save area 00DBF6 50DF 0004 00004 17760+ ST R13,4(R15) set back pointer in current save area 00DBFA 182D 17761+ LR R2,R13 remember callers save area 00DBFC 18DF 17762+ LR R13,R15 setup current save area 00DBFE 50D2 0008 00008 17763+ ST R13,8(R2) set forw pointer in callers save area 00000 17764+ USING TDSC,R1 declare TDSC base register 00DC02 58F0 1008 00008 17765+ L R15,TLRCNT load local repeat count to R15 17766+* 17767 * 17768 T277L REPINS CLC,(T277V1(250),T277V2) repeat: CLC T277V1(250),T277V2 17769+* 17770+* build from sublist &ALIST a comma separated string &ARGS 17771+* 17772+* 17773+* 17774+* 17775+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 17776+* this allows to transfer the repeat count from last TDSCGEN call 17777+* 17778+* 0DC06 17779+T277L EQU * 17780+* 17781+* write a comment indicating what REPINS does (in case NOGEN in effect) 17782+* 17783+*,// REPINS: do 20 times: 17784+* 17785+* MNOTE requires that ' is doubled for expanded variables 17786+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 326 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 17787+* 17788+* 17789+*,// CLC T277V1(250),T277V2 17790+* 17791+* finally generate code: &ICNT copies of &CODE &ARGS 17792+* 00DC06 D5F9 C0A6 C1A0 0DC8E 0DD88 17793+ CLC T277V1(250),T277V2 00DC0C D5F9 C0A6 C1A0 0DC8E 0DD88 17794+ CLC T277V1(250),T277V2 00DC12 D5F9 C0A6 C1A0 0DC8E 0DD88 17795+ CLC T277V1(250),T277V2 00DC18 D5F9 C0A6 C1A0 0DC8E 0DD88 17796+ CLC T277V1(250),T277V2 00DC1E D5F9 C0A6 C1A0 0DC8E 0DD88 17797+ CLC T277V1(250),T277V2 00DC24 D5F9 C0A6 C1A0 0DC8E 0DD88 17798+ CLC T277V1(250),T277V2 00DC2A D5F9 C0A6 C1A0 0DC8E 0DD88 17799+ CLC T277V1(250),T277V2 00DC30 D5F9 C0A6 C1A0 0DC8E 0DD88 17800+ CLC T277V1(250),T277V2 00DC36 D5F9 C0A6 C1A0 0DC8E 0DD88 17801+ CLC T277V1(250),T277V2 00DC3C D5F9 C0A6 C1A0 0DC8E 0DD88 17802+ CLC T277V1(250),T277V2 00DC42 D5F9 C0A6 C1A0 0DC8E 0DD88 17803+ CLC T277V1(250),T277V2 00DC48 D5F9 C0A6 C1A0 0DC8E 0DD88 17804+ CLC T277V1(250),T277V2 00DC4E D5F9 C0A6 C1A0 0DC8E 0DD88 17805+ CLC T277V1(250),T277V2 00DC54 D5F9 C0A6 C1A0 0DC8E 0DD88 17806+ CLC T277V1(250),T277V2 00DC5A D5F9 C0A6 C1A0 0DC8E 0DD88 17807+ CLC T277V1(250),T277V2 00DC60 D5F9 C0A6 C1A0 0DC8E 0DD88 17808+ CLC T277V1(250),T277V2 00DC66 D5F9 C0A6 C1A0 0DC8E 0DD88 17809+ CLC T277V1(250),T277V2 00DC6C D5F9 C0A6 C1A0 0DC8E 0DD88 17810+ CLC T277V1(250),T277V2 00DC72 D5F9 C0A6 C1A0 0DC8E 0DD88 17811+ CLC T277V1(250),T277V2 00DC78 D5F9 C0A6 C1A0 0DC8E 0DD88 17812+ CLC T277V1(250),T277V2 17813+* 00DC7E 06FB 17814 BCTR R15,R11 17815 TSIMRET 00DC80 58F0 C2A0 0DE88 17816+ L R15,=A(SAVETST) R15 := current save area 00DC84 58DF 0004 00004 17817+ L R13,4(R15) get old save area back 00DC88 98EC D00C 0000C 17818+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00DC8C 07FE 17819+ BR 14 RETURN 02000000 17820 * 00DC8E E7E7E7E7E7E7E7E7 17821 T277V1 DC 250C'X' 00DD88 E8E8E8E8E8E8E8E8 17822 T277V2 DC 250C'Y' 17823 TSIMEND 00DE88 17824+ LTORG 00DE88 00000458 17825 =A(SAVETST) 0DE8C 17826+T277TEND EQU * 17827 * 17828 * Test 28x -- CLCL ========================================= 17829 * 17830 * Test 280 -- CLCL m,m (100b,10b) -------------------------- 17831 * 17832 TSIMBEG T280,4500,10,1,C'4*LR;CLCL (100b,10b)' 17833+* 003324 17834+TDSCDAT CSECT 003328 17835+ DS 0D 17836+* 003328 0000DE90 17837+T280TDSC DC A(T280) // TENTRY 00332C 000000D8 17838+ DC A(T280TEND-T280) // TLENGTH 003330 00001194 17839+ DC F'4500' // TLRCNT 003334 0000000A 17840+ DC F'10' // TIGCNT 003338 00000001 17841+ DC F'1' // TLTYPE PAGE 327 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0016BE 17842+TEXT CSECT 0016BE E3F2F8F0 17843+SPTR1504 DC C'T280' 00333C 17844+TDSCDAT CSECT 00333C 17845+ DS 0F 00333C 040016BE 17846+ DC AL1(L'SPTR1504),AL3(SPTR1504) 0016C2 17847+TEXT CSECT 0016C2 F45CD3D95EC3D3C3 17848+SPTR1505 DC C'4*LR;CLCL (100b,10b)' 003340 17849+TDSCDAT CSECT 003340 17850+ DS 0F 003340 140016C2 17851+ DC AL1(L'SPTR1505),AL3(SPTR1505) 17852+* 004B90 17853+TDSCTBL CSECT 04B90 17854+T280TPTR EQU * 004B90 00003328 17855+ DC A(T280TDSC) enabled test 17856+* 00DE8C 17857+TCODE CSECT 00DE90 17858+ DS 0D ensure double word alignment for test 00DE90 17859+T280 DS 0H 01650000 00DE90 90EC D00C 0000C 17860+ STM 14,12,12(13) SAVE REGISTERS 02950000 00DE94 18CF 17861+ LR R12,R15 base register := entry address 0DE90 17862+ USING T280,R12 declare code base register 00DE96 41B0 C054 0DEE4 17863+ LA R11,T280L load loop target to R11 00DE9A 58F0 C0C8 0DF58 17864+ L R15,=A(SAVETST) R15 := current save area 00DE9E 50DF 0004 00004 17865+ ST R13,4(R15) set back pointer in current save area 00DEA2 182D 17866+ LR R2,R13 remember callers save area 00DEA4 18DF 17867+ LR R13,R15 setup current save area 00DEA6 50D2 0008 00008 17868+ ST R13,8(R2) set forw pointer in callers save area 00000 17869+ USING TDSC,R1 declare TDSC base register 00DEAA 58F0 1008 00008 17870+ L R15,TLRCNT load local repeat count to R15 17871+* 17872 * 17873 * use sequence 17874 * LR R2,R6 dest addr 17875 * LR R3,R7 dest length 17876 * LR R4,R8 source addr 17877 * LR R5,R7 source length 17878 * CLCL R2,R4 doit 17879 * 00DEAE 5860 C0CC 0DF5C 17880 L R6,=A(PBUF4K1) get ptr to ptr 00DEB2 5866 0000 00000 17881 L R6,0(R6) get ptr to BUF4K1 00DEB6 5880 C0D0 0DF60 17882 L R8,=A(PBUF4K2) get ptr to ptr 00DEBA 5888 0000 00000 17883 L R8,0(R8) get ptr to BUF4K2 00DEBE 5870 C0D4 0DF64 17884 L R7,=F'100' transfer length 17885 * 00DEC2 1826 17886 LR R2,R6 dst = BUF4K1 00DEC4 1837 17887 LR R3,R7 length = 100 00DEC6 4140 0000 00000 17888 LA R4,0 setup zero fill 00DECA 4150 0000 00000 17889 LA R5,0 00DECE 0E24 17890 MVCL R2,R4 clear BUF4K1 (dst) 00DED0 1828 17891 LR R2,R8 dst = BUF4K2 00DED2 1837 17892 LR R3,R7 length = 100 00DED4 4140 0000 00000 17893 LA R4,0 setup zero fill 00DED8 4150 0000 00000 17894 LA R5,0 00DEDC 0E24 17895 MVCL R2,R4 clear BUF4K2 (src) 00DEDE 1826 17896 LR R2,R6 PAGE 328 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00DEE0 92FF 600A 0000A 17897 MVI 10(R6),X'FF' and set src[10] to 0xff 17898 * 17899 T280L REPINSN LR,(R2,R6),LR,(R3,R7), X LR,(R4,R8),LR,(R5,R7), X CLCL,(R2,R4) 17900+* 17901+* build from sublist &ALIST* a comma separated string &ARGS* 17902+* 17903+* 17904+* 17905+* 17906+* 17907+* 17908+* 17909+* 17910+* 17911+* 17912+* 17913+* 0DEE4 17914+T280L EQU * 17915+* 17916+* 17917+* write a comment indicating what REPINSN does (if NOGEN in effect) 17918+* 17919+*,// REPINSN: do 10 times: 17920+* 17921+* MNOTE requires that ' is doubled for expanded variables 17922+* thus build &MASTR as a copy of '&ARGS with ' doubled 17923+* 17924+* 17925+*,// LR R2,R6 17926+* 17927+* MNOTE requires that ' is doubled for expanded variables 17928+* thus build &MASTR as a copy of '&ARGS with ' doubled 17929+* 17930+* 17931+*,// LR R3,R7 17932+* 17933+* MNOTE requires that ' is doubled for expanded variables 17934+* thus build &MASTR as a copy of '&ARGS with ' doubled 17935+* 17936+* 17937+*,// LR R4,R8 17938+* 17939+* MNOTE requires that ' is doubled for expanded variables 17940+* thus build &MASTR as a copy of '&ARGS with ' doubled 17941+* 17942+* 17943+*,// LR R5,R7 17944+* 17945+* MNOTE requires that ' is doubled for expanded variables 17946+* thus build &MASTR as a copy of '&ARGS with ' doubled 17947+* 17948+* 17949+*,// CLCL R2,R4 PAGE 329 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 17950+* 17951+* finally generate code: &ICNT copies of &CO1 ... 17952+* 00DEE4 1826 17953+ LR R2,R6 00DEE6 1837 17954+ LR R3,R7 00DEE8 1848 17955+ LR R4,R8 00DEEA 1857 17956+ LR R5,R7 00DEEC 0F24 17957+ CLCL R2,R4 00DEEE 1826 17958+ LR R2,R6 00DEF0 1837 17959+ LR R3,R7 00DEF2 1848 17960+ LR R4,R8 00DEF4 1857 17961+ LR R5,R7 00DEF6 0F24 17962+ CLCL R2,R4 00DEF8 1826 17963+ LR R2,R6 00DEFA 1837 17964+ LR R3,R7 00DEFC 1848 17965+ LR R4,R8 00DEFE 1857 17966+ LR R5,R7 00DF00 0F24 17967+ CLCL R2,R4 00DF02 1826 17968+ LR R2,R6 00DF04 1837 17969+ LR R3,R7 00DF06 1848 17970+ LR R4,R8 00DF08 1857 17971+ LR R5,R7 00DF0A 0F24 17972+ CLCL R2,R4 00DF0C 1826 17973+ LR R2,R6 00DF0E 1837 17974+ LR R3,R7 00DF10 1848 17975+ LR R4,R8 00DF12 1857 17976+ LR R5,R7 00DF14 0F24 17977+ CLCL R2,R4 00DF16 1826 17978+ LR R2,R6 00DF18 1837 17979+ LR R3,R7 00DF1A 1848 17980+ LR R4,R8 00DF1C 1857 17981+ LR R5,R7 00DF1E 0F24 17982+ CLCL R2,R4 00DF20 1826 17983+ LR R2,R6 00DF22 1837 17984+ LR R3,R7 00DF24 1848 17985+ LR R4,R8 00DF26 1857 17986+ LR R5,R7 00DF28 0F24 17987+ CLCL R2,R4 00DF2A 1826 17988+ LR R2,R6 00DF2C 1837 17989+ LR R3,R7 00DF2E 1848 17990+ LR R4,R8 00DF30 1857 17991+ LR R5,R7 00DF32 0F24 17992+ CLCL R2,R4 00DF34 1826 17993+ LR R2,R6 00DF36 1837 17994+ LR R3,R7 00DF38 1848 17995+ LR R4,R8 00DF3A 1857 17996+ LR R5,R7 00DF3C 0F24 17997+ CLCL R2,R4 00DF3E 1826 17998+ LR R2,R6 00DF40 1837 17999+ LR R3,R7 00DF42 1848 18000+ LR R4,R8 00DF44 1857 18001+ LR R5,R7 00DF46 0F24 18002+ CLCL R2,R4 18003+* 00DF48 06FB 18004 BCTR R15,R11 PAGE 330 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 18005 TSIMRET 00DF4A 58F0 C0C8 0DF58 18006+ L R15,=A(SAVETST) R15 := current save area 00DF4E 58DF 0004 00004 18007+ L R13,4(R15) get old save area back 00DF52 98EC D00C 0000C 18008+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00DF56 07FE 18009+ BR 14 RETURN 02000000 18010 TSIMEND 00DF58 18011+ LTORG 00DF58 00000458 18012 =A(SAVETST) 00DF5C 000004B4 18013 =A(PBUF4K1) 00DF60 000004B8 18014 =A(PBUF4K2) 00DF64 00000064 18015 =F'100' 0DF68 18016+T280TEND EQU * 18017 * 18018 * Test 281 -- CLCL m,m (4kb,10b) --------------------------- 18019 * 18020 TSIMBEG T281,4500,10,1,C'4*LR;CLCL (4kb,10b)' 18021+* 003344 18022+TDSCDAT CSECT 003348 18023+ DS 0D 18024+* 003348 0000DF68 18025+T281TDSC DC A(T281) // TENTRY 00334C 000000D8 18026+ DC A(T281TEND-T281) // TLENGTH 003350 00001194 18027+ DC F'4500' // TLRCNT 003354 0000000A 18028+ DC F'10' // TIGCNT 003358 00000001 18029+ DC F'1' // TLTYPE 0016D6 18030+TEXT CSECT 0016D6 E3F2F8F1 18031+SPTR1524 DC C'T281' 00335C 18032+TDSCDAT CSECT 00335C 18033+ DS 0F 00335C 040016D6 18034+ DC AL1(L'SPTR1524),AL3(SPTR1524) 0016DA 18035+TEXT CSECT 0016DA F45CD3D95EC3D3C3 18036+SPTR1525 DC C'4*LR;CLCL (4kb,10b)' 003360 18037+TDSCDAT CSECT 003360 18038+ DS 0F 003360 130016DA 18039+ DC AL1(L'SPTR1525),AL3(SPTR1525) 18040+* 004B94 18041+TDSCTBL CSECT 04B94 18042+T281TPTR EQU * 004B94 00003348 18043+ DC A(T281TDSC) enabled test 18044+* 00DF68 18045+TCODE CSECT 00DF68 18046+ DS 0D ensure double word alignment for test 00DF68 18047+T281 DS 0H 01650000 00DF68 90EC D00C 0000C 18048+ STM 14,12,12(13) SAVE REGISTERS 02950000 00DF6C 18CF 18049+ LR R12,R15 base register := entry address 0DF68 18050+ USING T281,R12 declare code base register 00DF6E 41B0 C054 0DFBC 18051+ LA R11,T281L load loop target to R11 00DF72 58F0 C0C8 0E030 18052+ L R15,=A(SAVETST) R15 := current save area 00DF76 50DF 0004 00004 18053+ ST R13,4(R15) set back pointer in current save area 00DF7A 182D 18054+ LR R2,R13 remember callers save area 00DF7C 18DF 18055+ LR R13,R15 setup current save area 00DF7E 50D2 0008 00008 18056+ ST R13,8(R2) set forw pointer in callers save area 00000 18057+ USING TDSC,R1 declare TDSC base register 00DF82 58F0 1008 00008 18058+ L R15,TLRCNT load local repeat count to R15 18059+* PAGE 331 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 18060 * 18061 * use sequence 18062 * LR R2,R6 dest addr 18063 * LR R3,R7 dest length 18064 * LR R4,R8 source addr 18065 * LR R5,R7 source length 18066 * CLCL R2,R4 doit 18067 * 00DF86 5860 C0CC 0E034 18068 L R6,=A(PBUF4K1) get ptr to ptr 00DF8A 5866 0000 00000 18069 L R6,0(R6) get ptr to BUF4K1 00DF8E 5880 C0D0 0E038 18070 L R8,=A(PBUF4K2) get ptr to ptr 00DF92 5888 0000 00000 18071 L R8,0(R8) get ptr to BUF4K2 00DF96 5870 C0D4 0E03C 18072 L R7,=F'4096' transfer length 18073 * 00DF9A 1826 18074 LR R2,R6 dst = BUF4K1 00DF9C 1837 18075 LR R3,R7 length = 4k 00DF9E 4140 0000 00000 18076 LA R4,0 setup zero fill 00DFA2 4150 0000 00000 18077 LA R5,0 00DFA6 0E24 18078 MVCL R2,R4 clear BUF4K1 (dst) 00DFA8 1828 18079 LR R2,R8 dst = BUF4K2 00DFAA 1837 18080 LR R3,R7 length = 4k 00DFAC 4140 0000 00000 18081 LA R4,0 setup zero fill 00DFB0 4150 0000 00000 18082 LA R5,0 00DFB4 0E24 18083 MVCL R2,R4 clear BUF4K2 (src) 00DFB6 1826 18084 LR R2,R6 00DFB8 92FF 600A 0000A 18085 MVI 10(R6),X'FF' and set src[10] to 0xff 18086 * 18087 T281L REPINSN LR,(R2,R6),LR,(R3,R7), X LR,(R4,R8),LR,(R5,R7), X CLCL,(R2,R4) 18088+* 18089+* build from sublist &ALIST* a comma separated string &ARGS* 18090+* 18091+* 18092+* 18093+* 18094+* 18095+* 18096+* 18097+* 18098+* 18099+* 18100+* 18101+* 0DFBC 18102+T281L EQU * 18103+* 18104+* 18105+* write a comment indicating what REPINSN does (if NOGEN in effect) 18106+* 18107+*,// REPINSN: do 10 times: 18108+* 18109+* MNOTE requires that ' is doubled for expanded variables 18110+* thus build &MASTR as a copy of '&ARGS with ' doubled 18111+* 18112+* PAGE 332 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 18113+*,// LR R2,R6 18114+* 18115+* MNOTE requires that ' is doubled for expanded variables 18116+* thus build &MASTR as a copy of '&ARGS with ' doubled 18117+* 18118+* 18119+*,// LR R3,R7 18120+* 18121+* MNOTE requires that ' is doubled for expanded variables 18122+* thus build &MASTR as a copy of '&ARGS with ' doubled 18123+* 18124+* 18125+*,// LR R4,R8 18126+* 18127+* MNOTE requires that ' is doubled for expanded variables 18128+* thus build &MASTR as a copy of '&ARGS with ' doubled 18129+* 18130+* 18131+*,// LR R5,R7 18132+* 18133+* MNOTE requires that ' is doubled for expanded variables 18134+* thus build &MASTR as a copy of '&ARGS with ' doubled 18135+* 18136+* 18137+*,// CLCL R2,R4 18138+* 18139+* finally generate code: &ICNT copies of &CO1 ... 18140+* 00DFBC 1826 18141+ LR R2,R6 00DFBE 1837 18142+ LR R3,R7 00DFC0 1848 18143+ LR R4,R8 00DFC2 1857 18144+ LR R5,R7 00DFC4 0F24 18145+ CLCL R2,R4 00DFC6 1826 18146+ LR R2,R6 00DFC8 1837 18147+ LR R3,R7 00DFCA 1848 18148+ LR R4,R8 00DFCC 1857 18149+ LR R5,R7 00DFCE 0F24 18150+ CLCL R2,R4 00DFD0 1826 18151+ LR R2,R6 00DFD2 1837 18152+ LR R3,R7 00DFD4 1848 18153+ LR R4,R8 00DFD6 1857 18154+ LR R5,R7 00DFD8 0F24 18155+ CLCL R2,R4 00DFDA 1826 18156+ LR R2,R6 00DFDC 1837 18157+ LR R3,R7 00DFDE 1848 18158+ LR R4,R8 00DFE0 1857 18159+ LR R5,R7 00DFE2 0F24 18160+ CLCL R2,R4 00DFE4 1826 18161+ LR R2,R6 00DFE6 1837 18162+ LR R3,R7 00DFE8 1848 18163+ LR R4,R8 00DFEA 1857 18164+ LR R5,R7 00DFEC 0F24 18165+ CLCL R2,R4 00DFEE 1826 18166+ LR R2,R6 00DFF0 1837 18167+ LR R3,R7 PAGE 333 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00DFF2 1848 18168+ LR R4,R8 00DFF4 1857 18169+ LR R5,R7 00DFF6 0F24 18170+ CLCL R2,R4 00DFF8 1826 18171+ LR R2,R6 00DFFA 1837 18172+ LR R3,R7 00DFFC 1848 18173+ LR R4,R8 00DFFE 1857 18174+ LR R5,R7 00E000 0F24 18175+ CLCL R2,R4 00E002 1826 18176+ LR R2,R6 00E004 1837 18177+ LR R3,R7 00E006 1848 18178+ LR R4,R8 00E008 1857 18179+ LR R5,R7 00E00A 0F24 18180+ CLCL R2,R4 00E00C 1826 18181+ LR R2,R6 00E00E 1837 18182+ LR R3,R7 00E010 1848 18183+ LR R4,R8 00E012 1857 18184+ LR R5,R7 00E014 0F24 18185+ CLCL R2,R4 00E016 1826 18186+ LR R2,R6 00E018 1837 18187+ LR R3,R7 00E01A 1848 18188+ LR R4,R8 00E01C 1857 18189+ LR R5,R7 00E01E 0F24 18190+ CLCL R2,R4 18191+* 00E020 06FB 18192 BCTR R15,R11 18193 TSIMRET 00E022 58F0 C0C8 0E030 18194+ L R15,=A(SAVETST) R15 := current save area 00E026 58DF 0004 00004 18195+ L R13,4(R15) get old save area back 00E02A 98EC D00C 0000C 18196+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E02E 07FE 18197+ BR 14 RETURN 02000000 18198 TSIMEND 00E030 18199+ LTORG 00E030 00000458 18200 =A(SAVETST) 00E034 000004B4 18201 =A(PBUF4K1) 00E038 000004B8 18202 =A(PBUF4K2) 00E03C 00001000 18203 =F'4096' 0E040 18204+T281TEND EQU * 18205 * 18206 * Test 282 -- CLCL m,m (4kb,100b) -------------------------- 18207 * 18208 TSIMBEG T282,600,10,1,C'4*LR;CLCL (4kb,100b)' 18209+* 003364 18210+TDSCDAT CSECT 003368 18211+ DS 0D 18212+* 003368 0000E040 18213+T282TDSC DC A(T282) // TENTRY 00336C 000000D8 18214+ DC A(T282TEND-T282) // TLENGTH 003370 00000258 18215+ DC F'600' // TLRCNT 003374 0000000A 18216+ DC F'10' // TIGCNT 003378 00000001 18217+ DC F'1' // TLTYPE 0016ED 18218+TEXT CSECT 0016ED E3F2F8F2 18219+SPTR1544 DC C'T282' 00337C 18220+TDSCDAT CSECT 00337C 18221+ DS 0F 00337C 040016ED 18222+ DC AL1(L'SPTR1544),AL3(SPTR1544) PAGE 334 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0016F1 18223+TEXT CSECT 0016F1 F45CD3D95EC3D3C3 18224+SPTR1545 DC C'4*LR;CLCL (4kb,100b)' 003380 18225+TDSCDAT CSECT 003380 18226+ DS 0F 003380 140016F1 18227+ DC AL1(L'SPTR1545),AL3(SPTR1545) 18228+* 004B98 18229+TDSCTBL CSECT 04B98 18230+T282TPTR EQU * 004B98 00003368 18231+ DC A(T282TDSC) enabled test 18232+* 00E040 18233+TCODE CSECT 00E040 18234+ DS 0D ensure double word alignment for test 00E040 18235+T282 DS 0H 01650000 00E040 90EC D00C 0000C 18236+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E044 18CF 18237+ LR R12,R15 base register := entry address 0E040 18238+ USING T282,R12 declare code base register 00E046 41B0 C054 0E094 18239+ LA R11,T282L load loop target to R11 00E04A 58F0 C0C8 0E108 18240+ L R15,=A(SAVETST) R15 := current save area 00E04E 50DF 0004 00004 18241+ ST R13,4(R15) set back pointer in current save area 00E052 182D 18242+ LR R2,R13 remember callers save area 00E054 18DF 18243+ LR R13,R15 setup current save area 00E056 50D2 0008 00008 18244+ ST R13,8(R2) set forw pointer in callers save area 00000 18245+ USING TDSC,R1 declare TDSC base register 00E05A 58F0 1008 00008 18246+ L R15,TLRCNT load local repeat count to R15 18247+* 18248 * 18249 * use sequence 18250 * LR R2,R6 dest addr 18251 * LR R3,R7 dest length 18252 * LR R4,R8 source addr 18253 * LR R5,R7 source length 18254 * CLCL R2,R4 doit 18255 * 00E05E 5860 C0CC 0E10C 18256 L R6,=A(PBUF4K1) get ptr to ptr 00E062 5866 0000 00000 18257 L R6,0(R6) get ptr to BUF4K1 00E066 5880 C0D0 0E110 18258 L R8,=A(PBUF4K2) get ptr to ptr 00E06A 5888 0000 00000 18259 L R8,0(R8) get ptr to BUF4K2 00E06E 5870 C0D4 0E114 18260 L R7,=F'4096' transfer length 18261 * 00E072 1826 18262 LR R2,R6 dst = BUF4K1 00E074 1837 18263 LR R3,R7 length = 4k 00E076 4140 0000 00000 18264 LA R4,0 setup zero fill 00E07A 4150 0000 00000 18265 LA R5,0 00E07E 0E24 18266 MVCL R2,R4 clear BUF4K1 (dst) 00E080 1828 18267 LR R2,R8 dst = BUF4K2 00E082 1837 18268 LR R3,R7 length = 4k 00E084 4140 0000 00000 18269 LA R4,0 setup zero fill 00E088 4150 0000 00000 18270 LA R5,0 00E08C 0E24 18271 MVCL R2,R4 clear BUF4K2 (src) 00E08E 1826 18272 LR R2,R6 00E090 92FF 6064 00064 18273 MVI 100(R6),X'FF' and set src[100] to 0xff 18274 * 18275 T282L REPINSN LR,(R2,R6),LR,(R3,R7), X LR,(R4,R8),LR,(R5,R7), X CLCL,(R2,R4) PAGE 335 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 18276+* 18277+* build from sublist &ALIST* a comma separated string &ARGS* 18278+* 18279+* 18280+* 18281+* 18282+* 18283+* 18284+* 18285+* 18286+* 18287+* 18288+* 18289+* 0E094 18290+T282L EQU * 18291+* 18292+* 18293+* write a comment indicating what REPINSN does (if NOGEN in effect) 18294+* 18295+*,// REPINSN: do 10 times: 18296+* 18297+* MNOTE requires that ' is doubled for expanded variables 18298+* thus build &MASTR as a copy of '&ARGS with ' doubled 18299+* 18300+* 18301+*,// LR R2,R6 18302+* 18303+* MNOTE requires that ' is doubled for expanded variables 18304+* thus build &MASTR as a copy of '&ARGS with ' doubled 18305+* 18306+* 18307+*,// LR R3,R7 18308+* 18309+* MNOTE requires that ' is doubled for expanded variables 18310+* thus build &MASTR as a copy of '&ARGS with ' doubled 18311+* 18312+* 18313+*,// LR R4,R8 18314+* 18315+* MNOTE requires that ' is doubled for expanded variables 18316+* thus build &MASTR as a copy of '&ARGS with ' doubled 18317+* 18318+* 18319+*,// LR R5,R7 18320+* 18321+* MNOTE requires that ' is doubled for expanded variables 18322+* thus build &MASTR as a copy of '&ARGS with ' doubled 18323+* 18324+* 18325+*,// CLCL R2,R4 18326+* 18327+* finally generate code: &ICNT copies of &CO1 ... 18328+* 00E094 1826 18329+ LR R2,R6 00E096 1837 18330+ LR R3,R7 PAGE 336 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E098 1848 18331+ LR R4,R8 00E09A 1857 18332+ LR R5,R7 00E09C 0F24 18333+ CLCL R2,R4 00E09E 1826 18334+ LR R2,R6 00E0A0 1837 18335+ LR R3,R7 00E0A2 1848 18336+ LR R4,R8 00E0A4 1857 18337+ LR R5,R7 00E0A6 0F24 18338+ CLCL R2,R4 00E0A8 1826 18339+ LR R2,R6 00E0AA 1837 18340+ LR R3,R7 00E0AC 1848 18341+ LR R4,R8 00E0AE 1857 18342+ LR R5,R7 00E0B0 0F24 18343+ CLCL R2,R4 00E0B2 1826 18344+ LR R2,R6 00E0B4 1837 18345+ LR R3,R7 00E0B6 1848 18346+ LR R4,R8 00E0B8 1857 18347+ LR R5,R7 00E0BA 0F24 18348+ CLCL R2,R4 00E0BC 1826 18349+ LR R2,R6 00E0BE 1837 18350+ LR R3,R7 00E0C0 1848 18351+ LR R4,R8 00E0C2 1857 18352+ LR R5,R7 00E0C4 0F24 18353+ CLCL R2,R4 00E0C6 1826 18354+ LR R2,R6 00E0C8 1837 18355+ LR R3,R7 00E0CA 1848 18356+ LR R4,R8 00E0CC 1857 18357+ LR R5,R7 00E0CE 0F24 18358+ CLCL R2,R4 00E0D0 1826 18359+ LR R2,R6 00E0D2 1837 18360+ LR R3,R7 00E0D4 1848 18361+ LR R4,R8 00E0D6 1857 18362+ LR R5,R7 00E0D8 0F24 18363+ CLCL R2,R4 00E0DA 1826 18364+ LR R2,R6 00E0DC 1837 18365+ LR R3,R7 00E0DE 1848 18366+ LR R4,R8 00E0E0 1857 18367+ LR R5,R7 00E0E2 0F24 18368+ CLCL R2,R4 00E0E4 1826 18369+ LR R2,R6 00E0E6 1837 18370+ LR R3,R7 00E0E8 1848 18371+ LR R4,R8 00E0EA 1857 18372+ LR R5,R7 00E0EC 0F24 18373+ CLCL R2,R4 00E0EE 1826 18374+ LR R2,R6 00E0F0 1837 18375+ LR R3,R7 00E0F2 1848 18376+ LR R4,R8 00E0F4 1857 18377+ LR R5,R7 00E0F6 0F24 18378+ CLCL R2,R4 18379+* 00E0F8 06FB 18380 BCTR R15,R11 18381 TSIMRET 00E0FA 58F0 C0C8 0E108 18382+ L R15,=A(SAVETST) R15 := current save area 00E0FE 58DF 0004 00004 18383+ L R13,4(R15) get old save area back 00E102 98EC D00C 0000C 18384+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E106 07FE 18385+ BR 14 RETURN 02000000 PAGE 337 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 18386 TSIMEND 00E108 18387+ LTORG 00E108 00000458 18388 =A(SAVETST) 00E10C 000004B4 18389 =A(PBUF4K1) 00E110 000004B8 18390 =A(PBUF4K2) 00E114 00001000 18391 =F'4096' 0E118 18392+T282TEND EQU * 18393 * 18394 * Test 283 -- CLCL m,m (4kb,250b) -------------------------- 18395 * 18396 TSIMBEG T283,220,10,1,C'4*LR;CLCL (4kb,250b)' 18397+* 003384 18398+TDSCDAT CSECT 003388 18399+ DS 0D 18400+* 003388 0000E118 18401+T283TDSC DC A(T283) // TENTRY 00338C 000000D8 18402+ DC A(T283TEND-T283) // TLENGTH 003390 000000DC 18403+ DC F'220' // TLRCNT 003394 0000000A 18404+ DC F'10' // TIGCNT 003398 00000001 18405+ DC F'1' // TLTYPE 001705 18406+TEXT CSECT 001705 E3F2F8F3 18407+SPTR1564 DC C'T283' 00339C 18408+TDSCDAT CSECT 00339C 18409+ DS 0F 00339C 04001705 18410+ DC AL1(L'SPTR1564),AL3(SPTR1564) 001709 18411+TEXT CSECT 001709 F45CD3D95EC3D3C3 18412+SPTR1565 DC C'4*LR;CLCL (4kb,250b)' 0033A0 18413+TDSCDAT CSECT 0033A0 18414+ DS 0F 0033A0 14001709 18415+ DC AL1(L'SPTR1565),AL3(SPTR1565) 18416+* 004B9C 18417+TDSCTBL CSECT 04B9C 18418+T283TPTR EQU * 004B9C 00003388 18419+ DC A(T283TDSC) enabled test 18420+* 00E118 18421+TCODE CSECT 00E118 18422+ DS 0D ensure double word alignment for test 00E118 18423+T283 DS 0H 01650000 00E118 90EC D00C 0000C 18424+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E11C 18CF 18425+ LR R12,R15 base register := entry address 0E118 18426+ USING T283,R12 declare code base register 00E11E 41B0 C054 0E16C 18427+ LA R11,T283L load loop target to R11 00E122 58F0 C0C8 0E1E0 18428+ L R15,=A(SAVETST) R15 := current save area 00E126 50DF 0004 00004 18429+ ST R13,4(R15) set back pointer in current save area 00E12A 182D 18430+ LR R2,R13 remember callers save area 00E12C 18DF 18431+ LR R13,R15 setup current save area 00E12E 50D2 0008 00008 18432+ ST R13,8(R2) set forw pointer in callers save area 00000 18433+ USING TDSC,R1 declare TDSC base register 00E132 58F0 1008 00008 18434+ L R15,TLRCNT load local repeat count to R15 18435+* 18436 * 18437 * use sequence 18438 * LR R2,R6 dest addr 18439 * LR R3,R7 dest length 18440 * LR R4,R8 source addr PAGE 338 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 18441 * LR R5,R7 source length 18442 * CLCL R2,R4 doit 18443 * 00E136 5860 C0CC 0E1E4 18444 L R6,=A(PBUF4K1) get ptr to ptr 00E13A 5866 0000 00000 18445 L R6,0(R6) get ptr to BUF4K1 00E13E 5880 C0D0 0E1E8 18446 L R8,=A(PBUF4K2) get ptr to ptr 00E142 5888 0000 00000 18447 L R8,0(R8) get ptr to BUF4K2 00E146 5870 C0D4 0E1EC 18448 L R7,=F'4096' transfer length 18449 * 00E14A 1826 18450 LR R2,R6 dst = BUF4K1 00E14C 1837 18451 LR R3,R7 length = 4k 00E14E 4140 0000 00000 18452 LA R4,0 setup zero fill 00E152 4150 0000 00000 18453 LA R5,0 00E156 0E24 18454 MVCL R2,R4 clear BUF4K1 (dst) 00E158 1828 18455 LR R2,R8 dst = BUF4K2 00E15A 1837 18456 LR R3,R7 length = 4k 00E15C 4140 0000 00000 18457 LA R4,0 setup zero fill 00E160 4150 0000 00000 18458 LA R5,0 00E164 0E24 18459 MVCL R2,R4 clear BUF4K2 (src) 00E166 1826 18460 LR R2,R6 00E168 92FF 60FA 000FA 18461 MVI 250(R6),X'FF' and set src[250] to 0xff 18462 * 18463 T283L REPINSN LR,(R2,R6),LR,(R3,R7), X LR,(R4,R8),LR,(R5,R7), X CLCL,(R2,R4) 18464+* 18465+* build from sublist &ALIST* a comma separated string &ARGS* 18466+* 18467+* 18468+* 18469+* 18470+* 18471+* 18472+* 18473+* 18474+* 18475+* 18476+* 18477+* 0E16C 18478+T283L EQU * 18479+* 18480+* 18481+* write a comment indicating what REPINSN does (if NOGEN in effect) 18482+* 18483+*,// REPINSN: do 10 times: 18484+* 18485+* MNOTE requires that ' is doubled for expanded variables 18486+* thus build &MASTR as a copy of '&ARGS with ' doubled 18487+* 18488+* 18489+*,// LR R2,R6 18490+* 18491+* MNOTE requires that ' is doubled for expanded variables 18492+* thus build &MASTR as a copy of '&ARGS with ' doubled 18493+* PAGE 339 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 18494+* 18495+*,// LR R3,R7 18496+* 18497+* MNOTE requires that ' is doubled for expanded variables 18498+* thus build &MASTR as a copy of '&ARGS with ' doubled 18499+* 18500+* 18501+*,// LR R4,R8 18502+* 18503+* MNOTE requires that ' is doubled for expanded variables 18504+* thus build &MASTR as a copy of '&ARGS with ' doubled 18505+* 18506+* 18507+*,// LR R5,R7 18508+* 18509+* MNOTE requires that ' is doubled for expanded variables 18510+* thus build &MASTR as a copy of '&ARGS with ' doubled 18511+* 18512+* 18513+*,// CLCL R2,R4 18514+* 18515+* finally generate code: &ICNT copies of &CO1 ... 18516+* 00E16C 1826 18517+ LR R2,R6 00E16E 1837 18518+ LR R3,R7 00E170 1848 18519+ LR R4,R8 00E172 1857 18520+ LR R5,R7 00E174 0F24 18521+ CLCL R2,R4 00E176 1826 18522+ LR R2,R6 00E178 1837 18523+ LR R3,R7 00E17A 1848 18524+ LR R4,R8 00E17C 1857 18525+ LR R5,R7 00E17E 0F24 18526+ CLCL R2,R4 00E180 1826 18527+ LR R2,R6 00E182 1837 18528+ LR R3,R7 00E184 1848 18529+ LR R4,R8 00E186 1857 18530+ LR R5,R7 00E188 0F24 18531+ CLCL R2,R4 00E18A 1826 18532+ LR R2,R6 00E18C 1837 18533+ LR R3,R7 00E18E 1848 18534+ LR R4,R8 00E190 1857 18535+ LR R5,R7 00E192 0F24 18536+ CLCL R2,R4 00E194 1826 18537+ LR R2,R6 00E196 1837 18538+ LR R3,R7 00E198 1848 18539+ LR R4,R8 00E19A 1857 18540+ LR R5,R7 00E19C 0F24 18541+ CLCL R2,R4 00E19E 1826 18542+ LR R2,R6 00E1A0 1837 18543+ LR R3,R7 00E1A2 1848 18544+ LR R4,R8 00E1A4 1857 18545+ LR R5,R7 00E1A6 0F24 18546+ CLCL R2,R4 00E1A8 1826 18547+ LR R2,R6 00E1AA 1837 18548+ LR R3,R7 PAGE 340 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E1AC 1848 18549+ LR R4,R8 00E1AE 1857 18550+ LR R5,R7 00E1B0 0F24 18551+ CLCL R2,R4 00E1B2 1826 18552+ LR R2,R6 00E1B4 1837 18553+ LR R3,R7 00E1B6 1848 18554+ LR R4,R8 00E1B8 1857 18555+ LR R5,R7 00E1BA 0F24 18556+ CLCL R2,R4 00E1BC 1826 18557+ LR R2,R6 00E1BE 1837 18558+ LR R3,R7 00E1C0 1848 18559+ LR R4,R8 00E1C2 1857 18560+ LR R5,R7 00E1C4 0F24 18561+ CLCL R2,R4 00E1C6 1826 18562+ LR R2,R6 00E1C8 1837 18563+ LR R3,R7 00E1CA 1848 18564+ LR R4,R8 00E1CC 1857 18565+ LR R5,R7 00E1CE 0F24 18566+ CLCL R2,R4 18567+* 00E1D0 06FB 18568 BCTR R15,R11 18569 TSIMRET 00E1D2 58F0 C0C8 0E1E0 18570+ L R15,=A(SAVETST) R15 := current save area 00E1D6 58DF 0004 00004 18571+ L R13,4(R15) get old save area back 00E1DA 98EC D00C 0000C 18572+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E1DE 07FE 18573+ BR 14 RETURN 02000000 18574 TSIMEND 00E1E0 18575+ LTORG 00E1E0 00000458 18576 =A(SAVETST) 00E1E4 000004B4 18577 =A(PBUF4K1) 00E1E8 000004B8 18578 =A(PBUF4K2) 00E1EC 00001000 18579 =F'4096' 0E1F0 18580+T283TEND EQU * 18581 * 18582 * Test 284 -- CLCL m,m (4kb,1kb) --------------------------- 18583 * 18584 TSIMBEG T284,80,10,1,C'4*LR;CLCL (4kb,1kb)',DIS=1 18585+* 0033A4 18586+TDSCDAT CSECT 0033A8 18587+ DS 0D 18588+* 0033A8 0000E1F0 18589+T284TDSC DC A(T284) // TENTRY 0033AC 000000D8 18590+ DC A(T284TEND-T284) // TLENGTH 0033B0 00000050 18591+ DC F'80' // TLRCNT 0033B4 0000000A 18592+ DC F'10' // TIGCNT 0033B8 00000001 18593+ DC F'1' // TLTYPE 00171D 18594+TEXT CSECT 00171D E3F2F8F4 18595+SPTR1584 DC C'T284' 0033BC 18596+TDSCDAT CSECT 0033BC 18597+ DS 0F 0033BC 0400171D 18598+ DC AL1(L'SPTR1584),AL3(SPTR1584) 001721 18599+TEXT CSECT 001721 F45CD3D95EC3D3C3 18600+SPTR1585 DC C'4*LR;CLCL (4kb,1kb)' 0033C0 18601+TDSCDAT CSECT 0033C0 18602+ DS 0F 0033C0 13001721 18603+ DC AL1(L'SPTR1585),AL3(SPTR1585) PAGE 341 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 18604+* 004BA0 18605+TDSCTBL CSECT 04BA0 18606+T284TPTR EQU * 004BA0 010033A8 18607+ DC X'01',AL3(T284TDSC) disabled test 18608+* 00E1F0 18609+TCODE CSECT 00E1F0 18610+ DS 0D ensure double word alignment for test 00E1F0 18611+T284 DS 0H 01650000 00E1F0 90EC D00C 0000C 18612+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E1F4 18CF 18613+ LR R12,R15 base register := entry address 0E1F0 18614+ USING T284,R12 declare code base register 00E1F6 41B0 C054 0E244 18615+ LA R11,T284L load loop target to R11 00E1FA 58F0 C0C8 0E2B8 18616+ L R15,=A(SAVETST) R15 := current save area 00E1FE 50DF 0004 00004 18617+ ST R13,4(R15) set back pointer in current save area 00E202 182D 18618+ LR R2,R13 remember callers save area 00E204 18DF 18619+ LR R13,R15 setup current save area 00E206 50D2 0008 00008 18620+ ST R13,8(R2) set forw pointer in callers save area 00000 18621+ USING TDSC,R1 declare TDSC base register 00E20A 58F0 1008 00008 18622+ L R15,TLRCNT load local repeat count to R15 18623+* 18624 * 18625 * use sequence 18626 * LR R2,R6 dest addr 18627 * LR R3,R7 dest length 18628 * LR R4,R8 source addr 18629 * LR R5,R7 source length 18630 * CLCL R2,R4 doit 18631 * 00E20E 5860 C0CC 0E2BC 18632 L R6,=A(PBUF4K1) get ptr to ptr 00E212 5866 0000 00000 18633 L R6,0(R6) get ptr to BUF4K1 00E216 5880 C0D0 0E2C0 18634 L R8,=A(PBUF4K2) get ptr to ptr 00E21A 5888 0000 00000 18635 L R8,0(R8) get ptr to BUF4K2 00E21E 5870 C0D4 0E2C4 18636 L R7,=F'4096' transfer length 18637 * 00E222 1826 18638 LR R2,R6 dst = BUF4K1 00E224 1837 18639 LR R3,R7 length = 4k 00E226 4140 0000 00000 18640 LA R4,0 setup zero fill 00E22A 4150 0000 00000 18641 LA R5,0 00E22E 0E24 18642 MVCL R2,R4 clear BUF4K1 (dst) 00E230 1828 18643 LR R2,R8 dst = BUF4K2 00E232 1837 18644 LR R3,R7 length = 4k 00E234 4140 0000 00000 18645 LA R4,0 setup zero fill 00E238 4150 0000 00000 18646 LA R5,0 00E23C 0E24 18647 MVCL R2,R4 clear BUF4K2 (src) 00E23E 1826 18648 LR R2,R6 00E240 92FF 6400 00400 18649 MVI 1024(R6),X'FF' and set src[1024] to 0xff 18650 * 18651 T284L REPINSN LR,(R2,R6),LR,(R3,R7), X LR,(R4,R8),LR,(R5,R7), X CLCL,(R2,R4) 18652+* 18653+* build from sublist &ALIST* a comma separated string &ARGS* 18654+* 18655+* 18656+* PAGE 342 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 18657+* 18658+* 18659+* 18660+* 18661+* 18662+* 18663+* 18664+* 18665+* 0E244 18666+T284L EQU * 18667+* 18668+* 18669+* write a comment indicating what REPINSN does (if NOGEN in effect) 18670+* 18671+*,// REPINSN: do 10 times: 18672+* 18673+* MNOTE requires that ' is doubled for expanded variables 18674+* thus build &MASTR as a copy of '&ARGS with ' doubled 18675+* 18676+* 18677+*,// LR R2,R6 18678+* 18679+* MNOTE requires that ' is doubled for expanded variables 18680+* thus build &MASTR as a copy of '&ARGS with ' doubled 18681+* 18682+* 18683+*,// LR R3,R7 18684+* 18685+* MNOTE requires that ' is doubled for expanded variables 18686+* thus build &MASTR as a copy of '&ARGS with ' doubled 18687+* 18688+* 18689+*,// LR R4,R8 18690+* 18691+* MNOTE requires that ' is doubled for expanded variables 18692+* thus build &MASTR as a copy of '&ARGS with ' doubled 18693+* 18694+* 18695+*,// LR R5,R7 18696+* 18697+* MNOTE requires that ' is doubled for expanded variables 18698+* thus build &MASTR as a copy of '&ARGS with ' doubled 18699+* 18700+* 18701+*,// CLCL R2,R4 18702+* 18703+* finally generate code: &ICNT copies of &CO1 ... 18704+* 00E244 1826 18705+ LR R2,R6 00E246 1837 18706+ LR R3,R7 00E248 1848 18707+ LR R4,R8 00E24A 1857 18708+ LR R5,R7 00E24C 0F24 18709+ CLCL R2,R4 00E24E 1826 18710+ LR R2,R6 00E250 1837 18711+ LR R3,R7 PAGE 343 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E252 1848 18712+ LR R4,R8 00E254 1857 18713+ LR R5,R7 00E256 0F24 18714+ CLCL R2,R4 00E258 1826 18715+ LR R2,R6 00E25A 1837 18716+ LR R3,R7 00E25C 1848 18717+ LR R4,R8 00E25E 1857 18718+ LR R5,R7 00E260 0F24 18719+ CLCL R2,R4 00E262 1826 18720+ LR R2,R6 00E264 1837 18721+ LR R3,R7 00E266 1848 18722+ LR R4,R8 00E268 1857 18723+ LR R5,R7 00E26A 0F24 18724+ CLCL R2,R4 00E26C 1826 18725+ LR R2,R6 00E26E 1837 18726+ LR R3,R7 00E270 1848 18727+ LR R4,R8 00E272 1857 18728+ LR R5,R7 00E274 0F24 18729+ CLCL R2,R4 00E276 1826 18730+ LR R2,R6 00E278 1837 18731+ LR R3,R7 00E27A 1848 18732+ LR R4,R8 00E27C 1857 18733+ LR R5,R7 00E27E 0F24 18734+ CLCL R2,R4 00E280 1826 18735+ LR R2,R6 00E282 1837 18736+ LR R3,R7 00E284 1848 18737+ LR R4,R8 00E286 1857 18738+ LR R5,R7 00E288 0F24 18739+ CLCL R2,R4 00E28A 1826 18740+ LR R2,R6 00E28C 1837 18741+ LR R3,R7 00E28E 1848 18742+ LR R4,R8 00E290 1857 18743+ LR R5,R7 00E292 0F24 18744+ CLCL R2,R4 00E294 1826 18745+ LR R2,R6 00E296 1837 18746+ LR R3,R7 00E298 1848 18747+ LR R4,R8 00E29A 1857 18748+ LR R5,R7 00E29C 0F24 18749+ CLCL R2,R4 00E29E 1826 18750+ LR R2,R6 00E2A0 1837 18751+ LR R3,R7 00E2A2 1848 18752+ LR R4,R8 00E2A4 1857 18753+ LR R5,R7 00E2A6 0F24 18754+ CLCL R2,R4 18755+* 00E2A8 06FB 18756 BCTR R15,R11 18757 TSIMRET 00E2AA 58F0 C0C8 0E2B8 18758+ L R15,=A(SAVETST) R15 := current save area 00E2AE 58DF 0004 00004 18759+ L R13,4(R15) get old save area back 00E2B2 98EC D00C 0000C 18760+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E2B6 07FE 18761+ BR 14 RETURN 02000000 18762 TSIMEND 00E2B8 18763+ LTORG 00E2B8 00000458 18764 =A(SAVETST) 00E2BC 000004B4 18765 =A(PBUF4K1) 00E2C0 000004B8 18766 =A(PBUF4K2) PAGE 344 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E2C4 00001000 18767 =F'4096' 0E2C8 18768+T284TEND EQU * 18769 * 18770 * Test 285 -- CLCL m,m (4kb,4kb) --------------------------- 18771 * 18772 TSIMBEG T285,5,10,1,C'4*LR;CLCL (4kb,4kb)',DIS=1 18773+* 0033C4 18774+TDSCDAT CSECT 0033C8 18775+ DS 0D 18776+* 0033C8 0000E2C8 18777+T285TDSC DC A(T285) // TENTRY 0033CC 000000D8 18778+ DC A(T285TEND-T285) // TLENGTH 0033D0 00000005 18779+ DC F'5' // TLRCNT 0033D4 0000000A 18780+ DC F'10' // TIGCNT 0033D8 00000001 18781+ DC F'1' // TLTYPE 001734 18782+TEXT CSECT 001734 E3F2F8F5 18783+SPTR1604 DC C'T285' 0033DC 18784+TDSCDAT CSECT 0033DC 18785+ DS 0F 0033DC 04001734 18786+ DC AL1(L'SPTR1604),AL3(SPTR1604) 001738 18787+TEXT CSECT 001738 F45CD3D95EC3D3C3 18788+SPTR1605 DC C'4*LR;CLCL (4kb,4kb)' 0033E0 18789+TDSCDAT CSECT 0033E0 18790+ DS 0F 0033E0 13001738 18791+ DC AL1(L'SPTR1605),AL3(SPTR1605) 18792+* 004BA4 18793+TDSCTBL CSECT 04BA4 18794+T285TPTR EQU * 004BA4 010033C8 18795+ DC X'01',AL3(T285TDSC) disabled test 18796+* 00E2C8 18797+TCODE CSECT 00E2C8 18798+ DS 0D ensure double word alignment for test 00E2C8 18799+T285 DS 0H 01650000 00E2C8 90EC D00C 0000C 18800+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E2CC 18CF 18801+ LR R12,R15 base register := entry address 0E2C8 18802+ USING T285,R12 declare code base register 00E2CE 41B0 C050 0E318 18803+ LA R11,T285L load loop target to R11 00E2D2 58F0 C0C8 0E390 18804+ L R15,=A(SAVETST) R15 := current save area 00E2D6 50DF 0004 00004 18805+ ST R13,4(R15) set back pointer in current save area 00E2DA 182D 18806+ LR R2,R13 remember callers save area 00E2DC 18DF 18807+ LR R13,R15 setup current save area 00E2DE 50D2 0008 00008 18808+ ST R13,8(R2) set forw pointer in callers save area 00000 18809+ USING TDSC,R1 declare TDSC base register 00E2E2 58F0 1008 00008 18810+ L R15,TLRCNT load local repeat count to R15 18811+* 18812 * 18813 * use sequence 18814 * LR R2,R6 dest addr 18815 * LR R3,R7 dest length 18816 * LR R4,R8 source addr 18817 * LR R5,R7 source length 18818 * CLCL R2,R4 doit 18819 * 00E2E6 5860 C0CC 0E394 18820 L R6,=A(PBUF4K1) get ptr to ptr 00E2EA 5866 0000 00000 18821 L R6,0(R6) get ptr to BUF4K1 PAGE 345 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E2EE 5880 C0D0 0E398 18822 L R8,=A(PBUF4K2) get ptr to ptr 00E2F2 5888 0000 00000 18823 L R8,0(R8) get ptr to BUF4K2 00E2F6 5870 C0D4 0E39C 18824 L R7,=F'4096' transfer length 18825 * 00E2FA 1826 18826 LR R2,R6 dst = BUF4K1 00E2FC 1837 18827 LR R3,R7 length = 4k 00E2FE 4140 0000 00000 18828 LA R4,0 setup zero fill 00E302 4150 0000 00000 18829 LA R5,0 00E306 0E24 18830 MVCL R2,R4 clear BUF4K1 (dst) 00E308 1828 18831 LR R2,R8 dst = BUF4K2 00E30A 1837 18832 LR R3,R7 length = 4k 00E30C 4140 0000 00000 18833 LA R4,0 setup zero fill 00E310 4150 0000 00000 18834 LA R5,0 00E314 0E24 18835 MVCL R2,R4 clear BUF4K2 (src) 00E316 1826 18836 LR R2,R6 18837 * leave dst zero'ed !! 18838 * 18839 T285L REPINSN LR,(R2,R6),LR,(R3,R7), X LR,(R4,R8),LR,(R5,R7), X CLCL,(R2,R4) 18840+* 18841+* build from sublist &ALIST* a comma separated string &ARGS* 18842+* 18843+* 18844+* 18845+* 18846+* 18847+* 18848+* 18849+* 18850+* 18851+* 18852+* 18853+* 0E318 18854+T285L EQU * 18855+* 18856+* 18857+* write a comment indicating what REPINSN does (if NOGEN in effect) 18858+* 18859+*,// REPINSN: do 10 times: 18860+* 18861+* MNOTE requires that ' is doubled for expanded variables 18862+* thus build &MASTR as a copy of '&ARGS with ' doubled 18863+* 18864+* 18865+*,// LR R2,R6 18866+* 18867+* MNOTE requires that ' is doubled for expanded variables 18868+* thus build &MASTR as a copy of '&ARGS with ' doubled 18869+* 18870+* 18871+*,// LR R3,R7 18872+* 18873+* MNOTE requires that ' is doubled for expanded variables 18874+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 346 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 18875+* 18876+* 18877+*,// LR R4,R8 18878+* 18879+* MNOTE requires that ' is doubled for expanded variables 18880+* thus build &MASTR as a copy of '&ARGS with ' doubled 18881+* 18882+* 18883+*,// LR R5,R7 18884+* 18885+* MNOTE requires that ' is doubled for expanded variables 18886+* thus build &MASTR as a copy of '&ARGS with ' doubled 18887+* 18888+* 18889+*,// CLCL R2,R4 18890+* 18891+* finally generate code: &ICNT copies of &CO1 ... 18892+* 00E318 1826 18893+ LR R2,R6 00E31A 1837 18894+ LR R3,R7 00E31C 1848 18895+ LR R4,R8 00E31E 1857 18896+ LR R5,R7 00E320 0F24 18897+ CLCL R2,R4 00E322 1826 18898+ LR R2,R6 00E324 1837 18899+ LR R3,R7 00E326 1848 18900+ LR R4,R8 00E328 1857 18901+ LR R5,R7 00E32A 0F24 18902+ CLCL R2,R4 00E32C 1826 18903+ LR R2,R6 00E32E 1837 18904+ LR R3,R7 00E330 1848 18905+ LR R4,R8 00E332 1857 18906+ LR R5,R7 00E334 0F24 18907+ CLCL R2,R4 00E336 1826 18908+ LR R2,R6 00E338 1837 18909+ LR R3,R7 00E33A 1848 18910+ LR R4,R8 00E33C 1857 18911+ LR R5,R7 00E33E 0F24 18912+ CLCL R2,R4 00E340 1826 18913+ LR R2,R6 00E342 1837 18914+ LR R3,R7 00E344 1848 18915+ LR R4,R8 00E346 1857 18916+ LR R5,R7 00E348 0F24 18917+ CLCL R2,R4 00E34A 1826 18918+ LR R2,R6 00E34C 1837 18919+ LR R3,R7 00E34E 1848 18920+ LR R4,R8 00E350 1857 18921+ LR R5,R7 00E352 0F24 18922+ CLCL R2,R4 00E354 1826 18923+ LR R2,R6 00E356 1837 18924+ LR R3,R7 00E358 1848 18925+ LR R4,R8 00E35A 1857 18926+ LR R5,R7 00E35C 0F24 18927+ CLCL R2,R4 00E35E 1826 18928+ LR R2,R6 00E360 1837 18929+ LR R3,R7 PAGE 347 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E362 1848 18930+ LR R4,R8 00E364 1857 18931+ LR R5,R7 00E366 0F24 18932+ CLCL R2,R4 00E368 1826 18933+ LR R2,R6 00E36A 1837 18934+ LR R3,R7 00E36C 1848 18935+ LR R4,R8 00E36E 1857 18936+ LR R5,R7 00E370 0F24 18937+ CLCL R2,R4 00E372 1826 18938+ LR R2,R6 00E374 1837 18939+ LR R3,R7 00E376 1848 18940+ LR R4,R8 00E378 1857 18941+ LR R5,R7 00E37A 0F24 18942+ CLCL R2,R4 18943+* 00E37C 06FB 18944 BCTR R15,R11 18945 TSIMRET 00E37E 58F0 C0C8 0E390 18946+ L R15,=A(SAVETST) R15 := current save area 00E382 58DF 0004 00004 18947+ L R13,4(R15) get old save area back 00E386 98EC D00C 0000C 18948+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E38A 07FE 18949+ BR 14 RETURN 02000000 18950 TSIMEND 00E390 18951+ LTORG 00E390 00000458 18952 =A(SAVETST) 00E394 000004B4 18953 =A(PBUF4K1) 00E398 000004B8 18954 =A(PBUF4K2) 00E39C 00001000 18955 =F'4096' 0E3A0 18956+T285TEND EQU * 18957 * 18958 * Test 29x -- CS,CDS ======================================= 18959 * 18960 * Test 290 -- CS R,R,m (eq,eq) ----------------------------- 18961 * 18962 TSIMBEG T290,6000,20,1,C'LR;CS R,R,m (eq,eq)' 18963+* 0033E4 18964+TDSCDAT CSECT 0033E8 18965+ DS 0D 18966+* 0033E8 0000E3A0 18967+T290TDSC DC A(T290) // TENTRY 0033EC 000000C4 18968+ DC A(T290TEND-T290) // TLENGTH 0033F0 00001770 18969+ DC F'6000' // TLRCNT 0033F4 00000014 18970+ DC F'20' // TIGCNT 0033F8 00000001 18971+ DC F'1' // TLTYPE 00174B 18972+TEXT CSECT 00174B E3F2F9F0 18973+SPTR1624 DC C'T290' 0033FC 18974+TDSCDAT CSECT 0033FC 18975+ DS 0F 0033FC 0400174B 18976+ DC AL1(L'SPTR1624),AL3(SPTR1624) 00174F 18977+TEXT CSECT 00174F D3D95EC3E240D96B 18978+SPTR1625 DC C'LR;CS R,R,m (eq,eq)' 003400 18979+TDSCDAT CSECT 003400 18980+ DS 0F 003400 1300174F 18981+ DC AL1(L'SPTR1625),AL3(SPTR1625) 18982+* 004BA8 18983+TDSCTBL CSECT 04BA8 18984+T290TPTR EQU * PAGE 348 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004BA8 000033E8 18985+ DC A(T290TDSC) enabled test 18986+* 00E3A0 18987+TCODE CSECT 00E3A0 18988+ DS 0D ensure double word alignment for test 00E3A0 18989+T290 DS 0H 01650000 00E3A0 90EC D00C 0000C 18990+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E3A4 18CF 18991+ LR R12,R15 base register := entry address 0E3A0 18992+ USING T290,R12 declare code base register 00E3A6 41B0 C02E 0E3CE 18993+ LA R11,T290L load loop target to R11 00E3AA 58F0 C0C0 0E460 18994+ L R15,=A(SAVETST) R15 := current save area 00E3AE 50DF 0004 00004 18995+ ST R13,4(R15) set back pointer in current save area 00E3B2 182D 18996+ LR R2,R13 remember callers save area 00E3B4 18DF 18997+ LR R13,R15 setup current save area 00E3B6 50D2 0008 00008 18998+ ST R13,8(R2) set forw pointer in callers save area 00000 18999+ USING TDSC,R1 declare TDSC base register 00E3BA 58F0 1008 00008 19000+ L R15,TLRCNT load local repeat count to R15 19001+* 19002 * 19003 * CS OP1,OP3,OP2 - if OP1==OP2 then OP2:=OP3 19004 * if OP1!=OP2 then OP1:=OP2 19005 * 00E3BE 4120 0001 00001 19006 LA R2,1 init OP1 00E3C2 5020 C0B8 0E458 19007 ST R2,T290V init OP2, OP2==OP1 00E3C6 4140 0001 00001 19008 LA R4,1 init OP3, OP3==OP1 00E3CA 4160 0001 00001 19009 LA R6,1 restore OP1 19010 T290L REPINSN LR,(R2,R6),CS,(R2,R4,T290V) 19011+* 19012+* build from sublist &ALIST* a comma separated string &ARGS* 19013+* 19014+* 19015+* 19016+* 19017+* 19018+* 0E3CE 19019+T290L EQU * 19020+* 19021+* 19022+* write a comment indicating what REPINSN does (if NOGEN in effect) 19023+* 19024+*,// REPINSN: do 20 times: 19025+* 19026+* MNOTE requires that ' is doubled for expanded variables 19027+* thus build &MASTR as a copy of '&ARGS with ' doubled 19028+* 19029+* 19030+*,// LR R2,R6 19031+* 19032+* MNOTE requires that ' is doubled for expanded variables 19033+* thus build &MASTR as a copy of '&ARGS with ' doubled 19034+* 19035+* 19036+*,// CS R2,R4,T290V 19037+* 19038+* finally generate code: &ICNT copies of &CO1 ... 19039+* PAGE 349 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E3CE 1826 19040+ LR R2,R6 00E3D0 BA24 C0B8 0E458 19041+ CS R2,R4,T290V 00E3D4 1826 19042+ LR R2,R6 00E3D6 BA24 C0B8 0E458 19043+ CS R2,R4,T290V 00E3DA 1826 19044+ LR R2,R6 00E3DC BA24 C0B8 0E458 19045+ CS R2,R4,T290V 00E3E0 1826 19046+ LR R2,R6 00E3E2 BA24 C0B8 0E458 19047+ CS R2,R4,T290V 00E3E6 1826 19048+ LR R2,R6 00E3E8 BA24 C0B8 0E458 19049+ CS R2,R4,T290V 00E3EC 1826 19050+ LR R2,R6 00E3EE BA24 C0B8 0E458 19051+ CS R2,R4,T290V 00E3F2 1826 19052+ LR R2,R6 00E3F4 BA24 C0B8 0E458 19053+ CS R2,R4,T290V 00E3F8 1826 19054+ LR R2,R6 00E3FA BA24 C0B8 0E458 19055+ CS R2,R4,T290V 00E3FE 1826 19056+ LR R2,R6 00E400 BA24 C0B8 0E458 19057+ CS R2,R4,T290V 00E404 1826 19058+ LR R2,R6 00E406 BA24 C0B8 0E458 19059+ CS R2,R4,T290V 00E40A 1826 19060+ LR R2,R6 00E40C BA24 C0B8 0E458 19061+ CS R2,R4,T290V 00E410 1826 19062+ LR R2,R6 00E412 BA24 C0B8 0E458 19063+ CS R2,R4,T290V 00E416 1826 19064+ LR R2,R6 00E418 BA24 C0B8 0E458 19065+ CS R2,R4,T290V 00E41C 1826 19066+ LR R2,R6 00E41E BA24 C0B8 0E458 19067+ CS R2,R4,T290V 00E422 1826 19068+ LR R2,R6 00E424 BA24 C0B8 0E458 19069+ CS R2,R4,T290V 00E428 1826 19070+ LR R2,R6 00E42A BA24 C0B8 0E458 19071+ CS R2,R4,T290V 00E42E 1826 19072+ LR R2,R6 00E430 BA24 C0B8 0E458 19073+ CS R2,R4,T290V 00E434 1826 19074+ LR R2,R6 00E436 BA24 C0B8 0E458 19075+ CS R2,R4,T290V 00E43A 1826 19076+ LR R2,R6 00E43C BA24 C0B8 0E458 19077+ CS R2,R4,T290V 00E440 1826 19078+ LR R2,R6 00E442 BA24 C0B8 0E458 19079+ CS R2,R4,T290V 19080+* 00E446 06FB 19081 BCTR R15,R11 19082 TSIMRET 00E448 58F0 C0C0 0E460 19083+ L R15,=A(SAVETST) R15 := current save area 00E44C 58DF 0004 00004 19084+ L R13,4(R15) get old save area back 00E450 98EC D00C 0000C 19085+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E454 07FE 19086+ BR 14 RETURN 02000000 19087 * 00E456 0000 00E458 FFFFFFFF 19088 T290V DC F'-1' will be set 19089 TSIMEND 00E460 19090+ LTORG 00E460 00000458 19091 =A(SAVETST) 0E464 19092+T290TEND EQU * 19093 * PAGE 350 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 19094 * Test 291 -- CS R,R,m (eq,ne) ----------------------------- 19095 * 19096 TSIMBEG T291,6000,20,1,C'LR;CS R,R,m (eq,ne)' 19097+* 003404 19098+TDSCDAT CSECT 003408 19099+ DS 0D 19100+* 003408 0000E468 19101+T291TDSC DC A(T291) // TENTRY 00340C 000000BC 19102+ DC A(T291TEND-T291) // TLENGTH 003410 00001770 19103+ DC F'6000' // TLRCNT 003414 00000014 19104+ DC F'20' // TIGCNT 003418 00000001 19105+ DC F'1' // TLTYPE 001762 19106+TEXT CSECT 001762 E3F2F9F1 19107+SPTR1638 DC C'T291' 00341C 19108+TDSCDAT CSECT 00341C 19109+ DS 0F 00341C 04001762 19110+ DC AL1(L'SPTR1638),AL3(SPTR1638) 001766 19111+TEXT CSECT 001766 D3D95EC3E240D96B 19112+SPTR1639 DC C'LR;CS R,R,m (eq,ne)' 003420 19113+TDSCDAT CSECT 003420 19114+ DS 0F 003420 13001766 19115+ DC AL1(L'SPTR1639),AL3(SPTR1639) 19116+* 004BAC 19117+TDSCTBL CSECT 04BAC 19118+T291TPTR EQU * 004BAC 00003408 19119+ DC A(T291TDSC) enabled test 19120+* 00E464 19121+TCODE CSECT 00E468 19122+ DS 0D ensure double word alignment for test 00E468 19123+T291 DS 0H 01650000 00E468 90EC D00C 0000C 19124+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E46C 18CF 19125+ LR R12,R15 base register := entry address 0E468 19126+ USING T291,R12 declare code base register 00E46E 41B0 C028 0E490 19127+ LA R11,T291L load loop target to R11 00E472 58F0 C0B8 0E520 19128+ L R15,=A(SAVETST) R15 := current save area 00E476 50DF 0004 00004 19129+ ST R13,4(R15) set back pointer in current save area 00E47A 182D 19130+ LR R2,R13 remember callers save area 00E47C 18DF 19131+ LR R13,R15 setup current save area 00E47E 50D2 0008 00008 19132+ ST R13,8(R2) set forw pointer in callers save area 00000 19133+ USING TDSC,R1 declare TDSC base register 00E482 58F0 1008 00008 19134+ L R15,TLRCNT load local repeat count to R15 19135+* 19136 * 00E486 4120 0000 00000 19137 LA R2,0 init OP1 00E48A 5020 C0B0 0E518 19138 ST R2,T291V init OP2, OP2==OP1 00E48E 184F 19139 LR R4,R15 init OP3 (counter) 19140 T291L REPINSN CS,(R2,R4,T291V),LR,(R2,R4) 19141+* 19142+* build from sublist &ALIST* a comma separated string &ARGS* 19143+* 19144+* 19145+* 19146+* 19147+* 19148+* PAGE 351 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0E490 19149+T291L EQU * 19150+* 19151+* 19152+* write a comment indicating what REPINSN does (if NOGEN in effect) 19153+* 19154+*,// REPINSN: do 20 times: 19155+* 19156+* MNOTE requires that ' is doubled for expanded variables 19157+* thus build &MASTR as a copy of '&ARGS with ' doubled 19158+* 19159+* 19160+*,// CS R2,R4,T291V 19161+* 19162+* MNOTE requires that ' is doubled for expanded variables 19163+* thus build &MASTR as a copy of '&ARGS with ' doubled 19164+* 19165+* 19166+*,// LR R2,R4 19167+* 19168+* finally generate code: &ICNT copies of &CO1 ... 19169+* 00E490 BA24 C0B0 0E518 19170+ CS R2,R4,T291V 00E494 1824 19171+ LR R2,R4 00E496 BA24 C0B0 0E518 19172+ CS R2,R4,T291V 00E49A 1824 19173+ LR R2,R4 00E49C BA24 C0B0 0E518 19174+ CS R2,R4,T291V 00E4A0 1824 19175+ LR R2,R4 00E4A2 BA24 C0B0 0E518 19176+ CS R2,R4,T291V 00E4A6 1824 19177+ LR R2,R4 00E4A8 BA24 C0B0 0E518 19178+ CS R2,R4,T291V 00E4AC 1824 19179+ LR R2,R4 00E4AE BA24 C0B0 0E518 19180+ CS R2,R4,T291V 00E4B2 1824 19181+ LR R2,R4 00E4B4 BA24 C0B0 0E518 19182+ CS R2,R4,T291V 00E4B8 1824 19183+ LR R2,R4 00E4BA BA24 C0B0 0E518 19184+ CS R2,R4,T291V 00E4BE 1824 19185+ LR R2,R4 00E4C0 BA24 C0B0 0E518 19186+ CS R2,R4,T291V 00E4C4 1824 19187+ LR R2,R4 00E4C6 BA24 C0B0 0E518 19188+ CS R2,R4,T291V 00E4CA 1824 19189+ LR R2,R4 00E4CC BA24 C0B0 0E518 19190+ CS R2,R4,T291V 00E4D0 1824 19191+ LR R2,R4 00E4D2 BA24 C0B0 0E518 19192+ CS R2,R4,T291V 00E4D6 1824 19193+ LR R2,R4 00E4D8 BA24 C0B0 0E518 19194+ CS R2,R4,T291V 00E4DC 1824 19195+ LR R2,R4 00E4DE BA24 C0B0 0E518 19196+ CS R2,R4,T291V 00E4E2 1824 19197+ LR R2,R4 00E4E4 BA24 C0B0 0E518 19198+ CS R2,R4,T291V 00E4E8 1824 19199+ LR R2,R4 00E4EA BA24 C0B0 0E518 19200+ CS R2,R4,T291V 00E4EE 1824 19201+ LR R2,R4 00E4F0 BA24 C0B0 0E518 19202+ CS R2,R4,T291V 00E4F4 1824 19203+ LR R2,R4 PAGE 352 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E4F6 BA24 C0B0 0E518 19204+ CS R2,R4,T291V 00E4FA 1824 19205+ LR R2,R4 00E4FC BA24 C0B0 0E518 19206+ CS R2,R4,T291V 00E500 1824 19207+ LR R2,R4 00E502 BA24 C0B0 0E518 19208+ CS R2,R4,T291V 00E506 1824 19209+ LR R2,R4 19210+* 00E508 064B 19211 BCTR R4,R11 counter is R4 here !! 19212 TSIMRET 00E50A 58F0 C0B8 0E520 19213+ L R15,=A(SAVETST) R15 := current save area 00E50E 58DF 0004 00004 19214+ L R13,4(R15) get old save area back 00E512 98EC D00C 0000C 19215+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E516 07FE 19216+ BR 14 RETURN 02000000 19217 * 00E518 FFFFFFFF 19218 T291V DC F'-1' will be setup 19219 TSIMEND 00E520 19220+ LTORG 00E520 00000458 19221 =A(SAVETST) 0E524 19222+T291TEND EQU * 19223 * 19224 * Test 292 -- CS R,R,m (ne) -------------------------------- 19225 * 19226 TSIMBEG T292,1400,20,1,C'LR;CS R,R,m (ne)' 19227+* 003424 19228+TDSCDAT CSECT 003428 19229+ DS 0D 19230+* 003428 0000E528 19231+T292TDSC DC A(T292) // TENTRY 00342C 000000BC 19232+ DC A(T292TEND-T292) // TLENGTH 003430 00000578 19233+ DC F'1400' // TLRCNT 003434 00000014 19234+ DC F'20' // TIGCNT 003438 00000001 19235+ DC F'1' // TLTYPE 001779 19236+TEXT CSECT 001779 E3F2F9F2 19237+SPTR1652 DC C'T292' 00343C 19238+TDSCDAT CSECT 00343C 19239+ DS 0F 00343C 04001779 19240+ DC AL1(L'SPTR1652),AL3(SPTR1652) 00177D 19241+TEXT CSECT 00177D D3D95EC3E240D96B 19242+SPTR1653 DC C'LR;CS R,R,m (ne)' 003440 19243+TDSCDAT CSECT 003440 19244+ DS 0F 003440 1000177D 19245+ DC AL1(L'SPTR1653),AL3(SPTR1653) 19246+* 004BB0 19247+TDSCTBL CSECT 04BB0 19248+T292TPTR EQU * 004BB0 00003428 19249+ DC A(T292TDSC) enabled test 19250+* 00E524 19251+TCODE CSECT 00E528 19252+ DS 0D ensure double word alignment for test 00E528 19253+T292 DS 0H 01650000 00E528 90EC D00C 0000C 19254+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E52C 18CF 19255+ LR R12,R15 base register := entry address 0E528 19256+ USING T292,R12 declare code base register 00E52E 41B0 C02A 0E552 19257+ LA R11,T292L load loop target to R11 00E532 58F0 C0B8 0E5E0 19258+ L R15,=A(SAVETST) R15 := current save area PAGE 353 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E536 50DF 0004 00004 19259+ ST R13,4(R15) set back pointer in current save area 00E53A 182D 19260+ LR R2,R13 remember callers save area 00E53C 18DF 19261+ LR R13,R15 setup current save area 00E53E 50D2 0008 00008 19262+ ST R13,8(R2) set forw pointer in callers save area 00000 19263+ USING TDSC,R1 declare TDSC base register 00E542 58F0 1008 00008 19264+ L R15,TLRCNT load local repeat count to R15 19265+* 19266 * 00E546 4120 0064 00064 19267 LA R2,100 init OP1, OP1!=OP2 00E54A 4140 0001 00001 19268 LA R4,1 init OP3 00E54E 4160 0064 00064 19269 LA R6,100 restore OP1 19270 T292L REPINSN LR,(R2,R6),CS,(R2,R4,T292V) 19271+* 19272+* build from sublist &ALIST* a comma separated string &ARGS* 19273+* 19274+* 19275+* 19276+* 19277+* 19278+* 0E552 19279+T292L EQU * 19280+* 19281+* 19282+* write a comment indicating what REPINSN does (if NOGEN in effect) 19283+* 19284+*,// REPINSN: do 20 times: 19285+* 19286+* MNOTE requires that ' is doubled for expanded variables 19287+* thus build &MASTR as a copy of '&ARGS with ' doubled 19288+* 19289+* 19290+*,// LR R2,R6 19291+* 19292+* MNOTE requires that ' is doubled for expanded variables 19293+* thus build &MASTR as a copy of '&ARGS with ' doubled 19294+* 19295+* 19296+*,// CS R2,R4,T292V 19297+* 19298+* finally generate code: &ICNT copies of &CO1 ... 19299+* 00E552 1826 19300+ LR R2,R6 00E554 BA24 C0B4 0E5DC 19301+ CS R2,R4,T292V 00E558 1826 19302+ LR R2,R6 00E55A BA24 C0B4 0E5DC 19303+ CS R2,R4,T292V 00E55E 1826 19304+ LR R2,R6 00E560 BA24 C0B4 0E5DC 19305+ CS R2,R4,T292V 00E564 1826 19306+ LR R2,R6 00E566 BA24 C0B4 0E5DC 19307+ CS R2,R4,T292V 00E56A 1826 19308+ LR R2,R6 00E56C BA24 C0B4 0E5DC 19309+ CS R2,R4,T292V 00E570 1826 19310+ LR R2,R6 00E572 BA24 C0B4 0E5DC 19311+ CS R2,R4,T292V 00E576 1826 19312+ LR R2,R6 00E578 BA24 C0B4 0E5DC 19313+ CS R2,R4,T292V PAGE 354 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E57C 1826 19314+ LR R2,R6 00E57E BA24 C0B4 0E5DC 19315+ CS R2,R4,T292V 00E582 1826 19316+ LR R2,R6 00E584 BA24 C0B4 0E5DC 19317+ CS R2,R4,T292V 00E588 1826 19318+ LR R2,R6 00E58A BA24 C0B4 0E5DC 19319+ CS R2,R4,T292V 00E58E 1826 19320+ LR R2,R6 00E590 BA24 C0B4 0E5DC 19321+ CS R2,R4,T292V 00E594 1826 19322+ LR R2,R6 00E596 BA24 C0B4 0E5DC 19323+ CS R2,R4,T292V 00E59A 1826 19324+ LR R2,R6 00E59C BA24 C0B4 0E5DC 19325+ CS R2,R4,T292V 00E5A0 1826 19326+ LR R2,R6 00E5A2 BA24 C0B4 0E5DC 19327+ CS R2,R4,T292V 00E5A6 1826 19328+ LR R2,R6 00E5A8 BA24 C0B4 0E5DC 19329+ CS R2,R4,T292V 00E5AC 1826 19330+ LR R2,R6 00E5AE BA24 C0B4 0E5DC 19331+ CS R2,R4,T292V 00E5B2 1826 19332+ LR R2,R6 00E5B4 BA24 C0B4 0E5DC 19333+ CS R2,R4,T292V 00E5B8 1826 19334+ LR R2,R6 00E5BA BA24 C0B4 0E5DC 19335+ CS R2,R4,T292V 00E5BE 1826 19336+ LR R2,R6 00E5C0 BA24 C0B4 0E5DC 19337+ CS R2,R4,T292V 00E5C4 1826 19338+ LR R2,R6 00E5C6 BA24 C0B4 0E5DC 19339+ CS R2,R4,T292V 19340+* 00E5CA 06FB 19341 BCTR R15,R11 19342 TSIMRET 00E5CC 58F0 C0B8 0E5E0 19343+ L R15,=A(SAVETST) R15 := current save area 00E5D0 58DF 0004 00004 19344+ L R13,4(R15) get old save area back 00E5D4 98EC D00C 0000C 19345+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E5D8 07FE 19346+ BR 14 RETURN 02000000 19347 * 00E5DA 0000 00E5DC 00000001 19348 T292V DC F'1' init OP2 19349 TSIMEND 00E5E0 19350+ LTORG 00E5E0 00000458 19351 =A(SAVETST) 0E5E4 19352+T292TEND EQU * 19353 * 19354 * Test 295 -- CDS R,R,m (eq,eq) ---------------------------- 19355 * 19356 TSIMBEG T295,6000,20,1,C'LR;CDS R,R,m (eq,eq)' 19357+* 003444 19358+TDSCDAT CSECT 003448 19359+ DS 0D 19360+* 003448 0000E5E8 19361+T295TDSC DC A(T295) // TENTRY 00344C 000000D4 19362+ DC A(T295TEND-T295) // TLENGTH 003450 00001770 19363+ DC F'6000' // TLRCNT 003454 00000014 19364+ DC F'20' // TIGCNT 003458 00000001 19365+ DC F'1' // TLTYPE 00178D 19366+TEXT CSECT 00178D E3F2F9F5 19367+SPTR1666 DC C'T295' PAGE 355 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00345C 19368+TDSCDAT CSECT 00345C 19369+ DS 0F 00345C 0400178D 19370+ DC AL1(L'SPTR1666),AL3(SPTR1666) 001791 19371+TEXT CSECT 001791 D3D95EC3C4E240D9 19372+SPTR1667 DC C'LR;CDS R,R,m (eq,eq)' 003460 19373+TDSCDAT CSECT 003460 19374+ DS 0F 003460 14001791 19375+ DC AL1(L'SPTR1667),AL3(SPTR1667) 19376+* 004BB4 19377+TDSCTBL CSECT 04BB4 19378+T295TPTR EQU * 004BB4 00003448 19379+ DC A(T295TDSC) enabled test 19380+* 00E5E4 19381+TCODE CSECT 00E5E8 19382+ DS 0D ensure double word alignment for test 00E5E8 19383+T295 DS 0H 01650000 00E5E8 90EC D00C 0000C 19384+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E5EC 18CF 19385+ LR R12,R15 base register := entry address 0E5E8 19386+ USING T295,R12 declare code base register 00E5EE 41B0 C03A 0E622 19387+ LA R11,T295L load loop target to R11 00E5F2 58F0 C0D0 0E6B8 19388+ L R15,=A(SAVETST) R15 := current save area 00E5F6 50DF 0004 00004 19389+ ST R13,4(R15) set back pointer in current save area 00E5FA 182D 19390+ LR R2,R13 remember callers save area 00E5FC 18DF 19391+ LR R13,R15 setup current save area 00E5FE 50D2 0008 00008 19392+ ST R13,8(R2) set forw pointer in callers save area 00000 19393+ USING TDSC,R1 declare TDSC base register 00E602 58F0 1008 00008 19394+ L R15,TLRCNT load local repeat count to R15 19395+* 19396 * 19397 * CDS OP1,OP3,OP2 - if OP1==OP2 then OP2:=OP3 19398 * if OP1!=OP2 then OP1:=OP2 19399 * 00E606 4120 000B 0000B 19400 LA R2,11 init OP1 00E60A 4130 0016 00016 19401 LA R3,22 upper part 00E60E 5020 C0C8 0E6B0 19402 ST R2,T295V init OP2, OP2==OP1 00E612 5030 C0CC 0E6B4 19403 ST R3,T295V+4 upper part 00E616 4140 000B 0000B 19404 LA R4,11 init OP3 00E61A 4150 0016 00016 19405 LA R5,22 upper part 00E61E 4160 000B 0000B 19406 LA R6,11 restore OP1 19407 T295L REPINSN LR,(R2,R6),CDS,(R2,R4,T295V) 19408+* 19409+* build from sublist &ALIST* a comma separated string &ARGS* 19410+* 19411+* 19412+* 19413+* 19414+* 19415+* 0E622 19416+T295L EQU * 19417+* 19418+* 19419+* write a comment indicating what REPINSN does (if NOGEN in effect) 19420+* 19421+*,// REPINSN: do 20 times: 19422+* PAGE 356 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 19423+* MNOTE requires that ' is doubled for expanded variables 19424+* thus build &MASTR as a copy of '&ARGS with ' doubled 19425+* 19426+* 19427+*,// LR R2,R6 19428+* 19429+* MNOTE requires that ' is doubled for expanded variables 19430+* thus build &MASTR as a copy of '&ARGS with ' doubled 19431+* 19432+* 19433+*,// CDS R2,R4,T295V 19434+* 19435+* finally generate code: &ICNT copies of &CO1 ... 19436+* 00E622 1826 19437+ LR R2,R6 00E624 BB24 C0C8 0E6B0 19438+ CDS R2,R4,T295V 00E628 1826 19439+ LR R2,R6 00E62A BB24 C0C8 0E6B0 19440+ CDS R2,R4,T295V 00E62E 1826 19441+ LR R2,R6 00E630 BB24 C0C8 0E6B0 19442+ CDS R2,R4,T295V 00E634 1826 19443+ LR R2,R6 00E636 BB24 C0C8 0E6B0 19444+ CDS R2,R4,T295V 00E63A 1826 19445+ LR R2,R6 00E63C BB24 C0C8 0E6B0 19446+ CDS R2,R4,T295V 00E640 1826 19447+ LR R2,R6 00E642 BB24 C0C8 0E6B0 19448+ CDS R2,R4,T295V 00E646 1826 19449+ LR R2,R6 00E648 BB24 C0C8 0E6B0 19450+ CDS R2,R4,T295V 00E64C 1826 19451+ LR R2,R6 00E64E BB24 C0C8 0E6B0 19452+ CDS R2,R4,T295V 00E652 1826 19453+ LR R2,R6 00E654 BB24 C0C8 0E6B0 19454+ CDS R2,R4,T295V 00E658 1826 19455+ LR R2,R6 00E65A BB24 C0C8 0E6B0 19456+ CDS R2,R4,T295V 00E65E 1826 19457+ LR R2,R6 00E660 BB24 C0C8 0E6B0 19458+ CDS R2,R4,T295V 00E664 1826 19459+ LR R2,R6 00E666 BB24 C0C8 0E6B0 19460+ CDS R2,R4,T295V 00E66A 1826 19461+ LR R2,R6 00E66C BB24 C0C8 0E6B0 19462+ CDS R2,R4,T295V 00E670 1826 19463+ LR R2,R6 00E672 BB24 C0C8 0E6B0 19464+ CDS R2,R4,T295V 00E676 1826 19465+ LR R2,R6 00E678 BB24 C0C8 0E6B0 19466+ CDS R2,R4,T295V 00E67C 1826 19467+ LR R2,R6 00E67E BB24 C0C8 0E6B0 19468+ CDS R2,R4,T295V 00E682 1826 19469+ LR R2,R6 00E684 BB24 C0C8 0E6B0 19470+ CDS R2,R4,T295V 00E688 1826 19471+ LR R2,R6 00E68A BB24 C0C8 0E6B0 19472+ CDS R2,R4,T295V 00E68E 1826 19473+ LR R2,R6 00E690 BB24 C0C8 0E6B0 19474+ CDS R2,R4,T295V 00E694 1826 19475+ LR R2,R6 00E696 BB24 C0C8 0E6B0 19476+ CDS R2,R4,T295V 19477+* PAGE 357 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E69A 06FB 19478 BCTR R15,R11 19479 TSIMRET 00E69C 58F0 C0D0 0E6B8 19480+ L R15,=A(SAVETST) R15 := current save area 00E6A0 58DF 0004 00004 19481+ L R13,4(R15) get old save area back 00E6A4 98EC D00C 0000C 19482+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E6A8 07FE 19483+ BR 14 RETURN 02000000 19484 * 00E6B0 19485 DS 0D 00E6B0 FFFFFFFFFFFFFFFE 19486 T295V DC F'-1',F'-2' will be set 19487 TSIMEND 00E6B8 19488+ LTORG 00E6B8 00000458 19489 =A(SAVETST) 0E6BC 19490+T295TEND EQU * 19491 * 19492 * Test 296 -- CDS R,R,m (eq,ne) ---------------------------- 19493 * 19494 TSIMBEG T296,6000,20,1,C'LR;CDS R,R,m (eq,ne)' 19495+* 003464 19496+TDSCDAT CSECT 003468 19497+ DS 0D 19498+* 003468 0000E6C0 19499+T296TDSC DC A(T296) // TENTRY 00346C 000000CC 19500+ DC A(T296TEND-T296) // TLENGTH 003470 00001770 19501+ DC F'6000' // TLRCNT 003474 00000014 19502+ DC F'20' // TIGCNT 003478 00000001 19503+ DC F'1' // TLTYPE 0017A5 19504+TEXT CSECT 0017A5 E3F2F9F6 19505+SPTR1680 DC C'T296' 00347C 19506+TDSCDAT CSECT 00347C 19507+ DS 0F 00347C 040017A5 19508+ DC AL1(L'SPTR1680),AL3(SPTR1680) 0017A9 19509+TEXT CSECT 0017A9 D3D95EC3C4E240D9 19510+SPTR1681 DC C'LR;CDS R,R,m (eq,ne)' 003480 19511+TDSCDAT CSECT 003480 19512+ DS 0F 003480 140017A9 19513+ DC AL1(L'SPTR1681),AL3(SPTR1681) 19514+* 004BB8 19515+TDSCTBL CSECT 04BB8 19516+T296TPTR EQU * 004BB8 00003468 19517+ DC A(T296TDSC) enabled test 19518+* 00E6BC 19519+TCODE CSECT 00E6C0 19520+ DS 0D ensure double word alignment for test 00E6C0 19521+T296 DS 0H 01650000 00E6C0 90EC D00C 0000C 19522+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E6C4 18CF 19523+ LR R12,R15 base register := entry address 0E6C0 19524+ USING T296,R12 declare code base register 00E6C6 41B0 C032 0E6F2 19525+ LA R11,T296L load loop target to R11 00E6CA 58F0 C0C8 0E788 19526+ L R15,=A(SAVETST) R15 := current save area 00E6CE 50DF 0004 00004 19527+ ST R13,4(R15) set back pointer in current save area 00E6D2 182D 19528+ LR R2,R13 remember callers save area 00E6D4 18DF 19529+ LR R13,R15 setup current save area 00E6D6 50D2 0008 00008 19530+ ST R13,8(R2) set forw pointer in callers save area 00000 19531+ USING TDSC,R1 declare TDSC base register 00E6DA 58F0 1008 00008 19532+ L R15,TLRCNT load local repeat count to R15 PAGE 358 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 19533+* 19534 * 00E6DE 4120 0000 00000 19535 LA R2,0 init OP1 00E6E2 4130 0001 00001 19536 LA R3,1 upper part 00E6E6 5020 C0C0 0E780 19537 ST R2,T296V init OP2 00E6EA 5030 C0C4 0E784 19538 ST R3,T296V+4 upper part 00E6EE 184F 19539 LR R4,R15 init OP3 (counter) 00E6F0 1853 19540 LR R5,R3 upper part 19541 T296L REPINSN CDS,(R2,R4,T296V),LR,(R2,R4) 19542+* 19543+* build from sublist &ALIST* a comma separated string &ARGS* 19544+* 19545+* 19546+* 19547+* 19548+* 19549+* 0E6F2 19550+T296L EQU * 19551+* 19552+* 19553+* write a comment indicating what REPINSN does (if NOGEN in effect) 19554+* 19555+*,// REPINSN: do 20 times: 19556+* 19557+* MNOTE requires that ' is doubled for expanded variables 19558+* thus build &MASTR as a copy of '&ARGS with ' doubled 19559+* 19560+* 19561+*,// CDS R2,R4,T296V 19562+* 19563+* MNOTE requires that ' is doubled for expanded variables 19564+* thus build &MASTR as a copy of '&ARGS with ' doubled 19565+* 19566+* 19567+*,// LR R2,R4 19568+* 19569+* finally generate code: &ICNT copies of &CO1 ... 19570+* 00E6F2 BB24 C0C0 0E780 19571+ CDS R2,R4,T296V 00E6F6 1824 19572+ LR R2,R4 00E6F8 BB24 C0C0 0E780 19573+ CDS R2,R4,T296V 00E6FC 1824 19574+ LR R2,R4 00E6FE BB24 C0C0 0E780 19575+ CDS R2,R4,T296V 00E702 1824 19576+ LR R2,R4 00E704 BB24 C0C0 0E780 19577+ CDS R2,R4,T296V 00E708 1824 19578+ LR R2,R4 00E70A BB24 C0C0 0E780 19579+ CDS R2,R4,T296V 00E70E 1824 19580+ LR R2,R4 00E710 BB24 C0C0 0E780 19581+ CDS R2,R4,T296V 00E714 1824 19582+ LR R2,R4 00E716 BB24 C0C0 0E780 19583+ CDS R2,R4,T296V 00E71A 1824 19584+ LR R2,R4 00E71C BB24 C0C0 0E780 19585+ CDS R2,R4,T296V 00E720 1824 19586+ LR R2,R4 00E722 BB24 C0C0 0E780 19587+ CDS R2,R4,T296V PAGE 359 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E726 1824 19588+ LR R2,R4 00E728 BB24 C0C0 0E780 19589+ CDS R2,R4,T296V 00E72C 1824 19590+ LR R2,R4 00E72E BB24 C0C0 0E780 19591+ CDS R2,R4,T296V 00E732 1824 19592+ LR R2,R4 00E734 BB24 C0C0 0E780 19593+ CDS R2,R4,T296V 00E738 1824 19594+ LR R2,R4 00E73A BB24 C0C0 0E780 19595+ CDS R2,R4,T296V 00E73E 1824 19596+ LR R2,R4 00E740 BB24 C0C0 0E780 19597+ CDS R2,R4,T296V 00E744 1824 19598+ LR R2,R4 00E746 BB24 C0C0 0E780 19599+ CDS R2,R4,T296V 00E74A 1824 19600+ LR R2,R4 00E74C BB24 C0C0 0E780 19601+ CDS R2,R4,T296V 00E750 1824 19602+ LR R2,R4 00E752 BB24 C0C0 0E780 19603+ CDS R2,R4,T296V 00E756 1824 19604+ LR R2,R4 00E758 BB24 C0C0 0E780 19605+ CDS R2,R4,T296V 00E75C 1824 19606+ LR R2,R4 00E75E BB24 C0C0 0E780 19607+ CDS R2,R4,T296V 00E762 1824 19608+ LR R2,R4 00E764 BB24 C0C0 0E780 19609+ CDS R2,R4,T296V 00E768 1824 19610+ LR R2,R4 19611+* 00E76A 064B 19612 BCTR R4,R11 counter is R4 here !! 19613 TSIMRET 00E76C 58F0 C0C8 0E788 19614+ L R15,=A(SAVETST) R15 := current save area 00E770 58DF 0004 00004 19615+ L R13,4(R15) get old save area back 00E774 98EC D00C 0000C 19616+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E778 07FE 19617+ BR 14 RETURN 02000000 19618 * 00E780 19619 DS 0D 00E780 FFFFFFFFFFFFFFFE 19620 T296V DC F'-1',F'-2' will be setup 19621 TSIMEND 00E788 19622+ LTORG 00E788 00000458 19623 =A(SAVETST) 0E78C 19624+T296TEND EQU * 19625 * 19626 * Test 297 -- CDS R,R,m (ne) ------------------------------- 19627 * 19628 TSIMBEG T297,1400,20,1,C'LR;CDS R,R,m (ne)' 19629+* 003484 19630+TDSCDAT CSECT 003488 19631+ DS 0D 19632+* 003488 0000E790 19633+T297TDSC DC A(T297) // TENTRY 00348C 000000CC 19634+ DC A(T297TEND-T297) // TLENGTH 003490 00000578 19635+ DC F'1400' // TLRCNT 003494 00000014 19636+ DC F'20' // TIGCNT 003498 00000001 19637+ DC F'1' // TLTYPE 0017BD 19638+TEXT CSECT 0017BD E3F2F9F7 19639+SPTR1694 DC C'T297' 00349C 19640+TDSCDAT CSECT 00349C 19641+ DS 0F 00349C 040017BD 19642+ DC AL1(L'SPTR1694),AL3(SPTR1694) PAGE 360 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0017C1 19643+TEXT CSECT 0017C1 D3D95EC3C4E240D9 19644+SPTR1695 DC C'LR;CDS R,R,m (ne)' 0034A0 19645+TDSCDAT CSECT 0034A0 19646+ DS 0F 0034A0 110017C1 19647+ DC AL1(L'SPTR1695),AL3(SPTR1695) 19648+* 004BBC 19649+TDSCTBL CSECT 04BBC 19650+T297TPTR EQU * 004BBC 00003488 19651+ DC A(T297TDSC) enabled test 19652+* 00E78C 19653+TCODE CSECT 00E790 19654+ DS 0D ensure double word alignment for test 00E790 19655+T297 DS 0H 01650000 00E790 90EC D00C 0000C 19656+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E794 18CF 19657+ LR R12,R15 base register := entry address 0E790 19658+ USING T297,R12 declare code base register 00E796 41B0 C032 0E7C2 19659+ LA R11,T297L load loop target to R11 00E79A 58F0 C0C8 0E858 19660+ L R15,=A(SAVETST) R15 := current save area 00E79E 50DF 0004 00004 19661+ ST R13,4(R15) set back pointer in current save area 00E7A2 182D 19662+ LR R2,R13 remember callers save area 00E7A4 18DF 19663+ LR R13,R15 setup current save area 00E7A6 50D2 0008 00008 19664+ ST R13,8(R2) set forw pointer in callers save area 00000 19665+ USING TDSC,R1 declare TDSC base register 00E7AA 58F0 1008 00008 19666+ L R15,TLRCNT load local repeat count to R15 19667+* 19668 * 00E7AE 4120 006E 0006E 19669 LA R2,110 init OP1, OP1!=OP2 00E7B2 4130 00DC 000DC 19670 LA R3,220 upper part 00E7B6 4140 000B 0000B 19671 LA R4,11 init OP3 00E7BA 4150 0016 00016 19672 LA R5,22 upper part 00E7BE 4160 006E 0006E 19673 LA R6,110 restore OP1 19674 T297L REPINSN LR,(R2,R6),CDS,(R2,R4,T297V) 19675+* 19676+* build from sublist &ALIST* a comma separated string &ARGS* 19677+* 19678+* 19679+* 19680+* 19681+* 19682+* 0E7C2 19683+T297L EQU * 19684+* 19685+* 19686+* write a comment indicating what REPINSN does (if NOGEN in effect) 19687+* 19688+*,// REPINSN: do 20 times: 19689+* 19690+* MNOTE requires that ' is doubled for expanded variables 19691+* thus build &MASTR as a copy of '&ARGS with ' doubled 19692+* 19693+* 19694+*,// LR R2,R6 19695+* 19696+* MNOTE requires that ' is doubled for expanded variables 19697+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 361 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 19698+* 19699+* 19700+*,// CDS R2,R4,T297V 19701+* 19702+* finally generate code: &ICNT copies of &CO1 ... 19703+* 00E7C2 1826 19704+ LR R2,R6 00E7C4 BB24 C0C0 0E850 19705+ CDS R2,R4,T297V 00E7C8 1826 19706+ LR R2,R6 00E7CA BB24 C0C0 0E850 19707+ CDS R2,R4,T297V 00E7CE 1826 19708+ LR R2,R6 00E7D0 BB24 C0C0 0E850 19709+ CDS R2,R4,T297V 00E7D4 1826 19710+ LR R2,R6 00E7D6 BB24 C0C0 0E850 19711+ CDS R2,R4,T297V 00E7DA 1826 19712+ LR R2,R6 00E7DC BB24 C0C0 0E850 19713+ CDS R2,R4,T297V 00E7E0 1826 19714+ LR R2,R6 00E7E2 BB24 C0C0 0E850 19715+ CDS R2,R4,T297V 00E7E6 1826 19716+ LR R2,R6 00E7E8 BB24 C0C0 0E850 19717+ CDS R2,R4,T297V 00E7EC 1826 19718+ LR R2,R6 00E7EE BB24 C0C0 0E850 19719+ CDS R2,R4,T297V 00E7F2 1826 19720+ LR R2,R6 00E7F4 BB24 C0C0 0E850 19721+ CDS R2,R4,T297V 00E7F8 1826 19722+ LR R2,R6 00E7FA BB24 C0C0 0E850 19723+ CDS R2,R4,T297V 00E7FE 1826 19724+ LR R2,R6 00E800 BB24 C0C0 0E850 19725+ CDS R2,R4,T297V 00E804 1826 19726+ LR R2,R6 00E806 BB24 C0C0 0E850 19727+ CDS R2,R4,T297V 00E80A 1826 19728+ LR R2,R6 00E80C BB24 C0C0 0E850 19729+ CDS R2,R4,T297V 00E810 1826 19730+ LR R2,R6 00E812 BB24 C0C0 0E850 19731+ CDS R2,R4,T297V 00E816 1826 19732+ LR R2,R6 00E818 BB24 C0C0 0E850 19733+ CDS R2,R4,T297V 00E81C 1826 19734+ LR R2,R6 00E81E BB24 C0C0 0E850 19735+ CDS R2,R4,T297V 00E822 1826 19736+ LR R2,R6 00E824 BB24 C0C0 0E850 19737+ CDS R2,R4,T297V 00E828 1826 19738+ LR R2,R6 00E82A BB24 C0C0 0E850 19739+ CDS R2,R4,T297V 00E82E 1826 19740+ LR R2,R6 00E830 BB24 C0C0 0E850 19741+ CDS R2,R4,T297V 00E834 1826 19742+ LR R2,R6 00E836 BB24 C0C0 0E850 19743+ CDS R2,R4,T297V 19744+* 00E83A 06FB 19745 BCTR R15,R11 19746 TSIMRET 00E83C 58F0 C0C8 0E858 19747+ L R15,=A(SAVETST) R15 := current save area 00E840 58DF 0004 00004 19748+ L R13,4(R15) get old save area back 00E844 98EC D00C 0000C 19749+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E848 07FE 19750+ BR 14 RETURN 02000000 19751 * 00E850 19752 DS 0D PAGE 362 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E850 0000000B00000016 19753 T297V DC F'11',F'22' init OP2 19754 TSIMEND 00E858 19755+ LTORG 00E858 00000458 19756 =A(SAVETST) 0E85C 19757+T297TEND EQU * 19758 * 19759 * Test 3xx -- flow control ====================================== 19760 * 19761 * Test 300 -- BCR 0,0 -------------------------------------- 19762 * 19763 TSIMBEG T300,20000,100,1,C'BCR 0,0 (noop)' 19764+* 0034A4 19765+TDSCDAT CSECT 0034A8 19766+ DS 0D 19767+* 0034A8 0000E860 19768+T300TDSC DC A(T300) // TENTRY 0034AC 000000FC 19769+ DC A(T300TEND-T300) // TLENGTH 0034B0 00004E20 19770+ DC F'20000' // TLRCNT 0034B4 00000064 19771+ DC F'100' // TIGCNT 0034B8 00000001 19772+ DC F'1' // TLTYPE 0017D2 19773+TEXT CSECT 0017D2 E3F3F0F0 19774+SPTR1708 DC C'T300' 0034BC 19775+TDSCDAT CSECT 0034BC 19776+ DS 0F 0034BC 040017D2 19777+ DC AL1(L'SPTR1708),AL3(SPTR1708) 0017D6 19778+TEXT CSECT 0017D6 C2C3D940F06BF040 19779+SPTR1709 DC C'BCR 0,0 (noop)' 0034C0 19780+TDSCDAT CSECT 0034C0 19781+ DS 0F 0034C0 0E0017D6 19782+ DC AL1(L'SPTR1709),AL3(SPTR1709) 19783+* 004BC0 19784+TDSCTBL CSECT 04BC0 19785+T300TPTR EQU * 004BC0 000034A8 19786+ DC A(T300TDSC) enabled test 19787+* 00E85C 19788+TCODE CSECT 00E860 19789+ DS 0D ensure double word alignment for test 00E860 19790+T300 DS 0H 01650000 00E860 90EC D00C 0000C 19791+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E864 18CF 19792+ LR R12,R15 base register := entry address 0E860 19793+ USING T300,R12 declare code base register 00E866 41B0 C01E 0E87E 19794+ LA R11,T300L load loop target to R11 00E86A 58F0 C0F8 0E958 19795+ L R15,=A(SAVETST) R15 := current save area 00E86E 50DF 0004 00004 19796+ ST R13,4(R15) set back pointer in current save area 00E872 182D 19797+ LR R2,R13 remember callers save area 00E874 18DF 19798+ LR R13,R15 setup current save area 00E876 50D2 0008 00008 19799+ ST R13,8(R2) set forw pointer in callers save area 00000 19800+ USING TDSC,R1 declare TDSC base register 00E87A 58F0 1008 00008 19801+ L R15,TLRCNT load local repeat count to R15 19802+* 19803 * 19804 T300L REPINS BCR,(0,0) repeat: BCR 0,0 19805+* 19806+* build from sublist &ALIST a comma separated string &ARGS 19807+* PAGE 363 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 19808+* 19809+* 19810+* 19811+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 19812+* this allows to transfer the repeat count from last TDSCGEN call 19813+* 19814+* 0E87E 19815+T300L EQU * 19816+* 19817+* write a comment indicating what REPINS does (in case NOGEN in effect) 19818+* 19819+*,// REPINS: do 100 times: 19820+* 19821+* MNOTE requires that ' is doubled for expanded variables 19822+* thus build &MASTR as a copy of '&ARGS with ' doubled 19823+* 19824+* 19825+*,// BCR 0,0 19826+* 19827+* finally generate code: &ICNT copies of &CODE &ARGS 19828+* 00E87E 0700 19829+ BCR 0,0 00E880 0700 19830+ BCR 0,0 00E882 0700 19831+ BCR 0,0 00E884 0700 19832+ BCR 0,0 00E886 0700 19833+ BCR 0,0 00E888 0700 19834+ BCR 0,0 00E88A 0700 19835+ BCR 0,0 00E88C 0700 19836+ BCR 0,0 00E88E 0700 19837+ BCR 0,0 00E890 0700 19838+ BCR 0,0 00E892 0700 19839+ BCR 0,0 00E894 0700 19840+ BCR 0,0 00E896 0700 19841+ BCR 0,0 00E898 0700 19842+ BCR 0,0 00E89A 0700 19843+ BCR 0,0 00E89C 0700 19844+ BCR 0,0 00E89E 0700 19845+ BCR 0,0 00E8A0 0700 19846+ BCR 0,0 00E8A2 0700 19847+ BCR 0,0 00E8A4 0700 19848+ BCR 0,0 00E8A6 0700 19849+ BCR 0,0 00E8A8 0700 19850+ BCR 0,0 00E8AA 0700 19851+ BCR 0,0 00E8AC 0700 19852+ BCR 0,0 00E8AE 0700 19853+ BCR 0,0 00E8B0 0700 19854+ BCR 0,0 00E8B2 0700 19855+ BCR 0,0 00E8B4 0700 19856+ BCR 0,0 00E8B6 0700 19857+ BCR 0,0 00E8B8 0700 19858+ BCR 0,0 00E8BA 0700 19859+ BCR 0,0 00E8BC 0700 19860+ BCR 0,0 00E8BE 0700 19861+ BCR 0,0 00E8C0 0700 19862+ BCR 0,0 PAGE 364 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E8C2 0700 19863+ BCR 0,0 00E8C4 0700 19864+ BCR 0,0 00E8C6 0700 19865+ BCR 0,0 00E8C8 0700 19866+ BCR 0,0 00E8CA 0700 19867+ BCR 0,0 00E8CC 0700 19868+ BCR 0,0 00E8CE 0700 19869+ BCR 0,0 00E8D0 0700 19870+ BCR 0,0 00E8D2 0700 19871+ BCR 0,0 00E8D4 0700 19872+ BCR 0,0 00E8D6 0700 19873+ BCR 0,0 00E8D8 0700 19874+ BCR 0,0 00E8DA 0700 19875+ BCR 0,0 00E8DC 0700 19876+ BCR 0,0 00E8DE 0700 19877+ BCR 0,0 00E8E0 0700 19878+ BCR 0,0 00E8E2 0700 19879+ BCR 0,0 00E8E4 0700 19880+ BCR 0,0 00E8E6 0700 19881+ BCR 0,0 00E8E8 0700 19882+ BCR 0,0 00E8EA 0700 19883+ BCR 0,0 00E8EC 0700 19884+ BCR 0,0 00E8EE 0700 19885+ BCR 0,0 00E8F0 0700 19886+ BCR 0,0 00E8F2 0700 19887+ BCR 0,0 00E8F4 0700 19888+ BCR 0,0 00E8F6 0700 19889+ BCR 0,0 00E8F8 0700 19890+ BCR 0,0 00E8FA 0700 19891+ BCR 0,0 00E8FC 0700 19892+ BCR 0,0 00E8FE 0700 19893+ BCR 0,0 00E900 0700 19894+ BCR 0,0 00E902 0700 19895+ BCR 0,0 00E904 0700 19896+ BCR 0,0 00E906 0700 19897+ BCR 0,0 00E908 0700 19898+ BCR 0,0 00E90A 0700 19899+ BCR 0,0 00E90C 0700 19900+ BCR 0,0 00E90E 0700 19901+ BCR 0,0 00E910 0700 19902+ BCR 0,0 00E912 0700 19903+ BCR 0,0 00E914 0700 19904+ BCR 0,0 00E916 0700 19905+ BCR 0,0 00E918 0700 19906+ BCR 0,0 00E91A 0700 19907+ BCR 0,0 00E91C 0700 19908+ BCR 0,0 00E91E 0700 19909+ BCR 0,0 00E920 0700 19910+ BCR 0,0 00E922 0700 19911+ BCR 0,0 00E924 0700 19912+ BCR 0,0 00E926 0700 19913+ BCR 0,0 00E928 0700 19914+ BCR 0,0 00E92A 0700 19915+ BCR 0,0 00E92C 0700 19916+ BCR 0,0 00E92E 0700 19917+ BCR 0,0 PAGE 365 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E930 0700 19918+ BCR 0,0 00E932 0700 19919+ BCR 0,0 00E934 0700 19920+ BCR 0,0 00E936 0700 19921+ BCR 0,0 00E938 0700 19922+ BCR 0,0 00E93A 0700 19923+ BCR 0,0 00E93C 0700 19924+ BCR 0,0 00E93E 0700 19925+ BCR 0,0 00E940 0700 19926+ BCR 0,0 00E942 0700 19927+ BCR 0,0 00E944 0700 19928+ BCR 0,0 19929+* 00E946 06FB 19930 BCTR R15,R11 19931 TSIMRET 00E948 58F0 C0F8 0E958 19932+ L R15,=A(SAVETST) R15 := current save area 00E94C 58DF 0004 00004 19933+ L R13,4(R15) get old save area back 00E950 98EC D00C 0000C 19934+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00E954 07FE 19935+ BR 14 RETURN 02000000 19936 TSIMEND 00E958 19937+ LTORG 00E958 00000458 19938 =A(SAVETST) 0E95C 19939+T300TEND EQU * 19940 * 19941 * Test 301 -- BNZ l (no br) -------------------------------- 19942 * 19943 TSIMBEG T301,22000,100,1,C'BNZ l (no br)' 19944+* 0034C4 19945+TDSCDAT CSECT 0034C8 19946+ DS 0D 19947+* 0034C8 0000E960 19948+T301TDSC DC A(T301) // TENTRY 0034CC 000001CC 19949+ DC A(T301TEND-T301) // TLENGTH 0034D0 000055F0 19950+ DC F'22000' // TLRCNT 0034D4 00000064 19951+ DC F'100' // TIGCNT 0034D8 00000001 19952+ DC F'1' // TLTYPE 0017E4 19953+TEXT CSECT 0017E4 E3F3F0F1 19954+SPTR1720 DC C'T301' 0034DC 19955+TDSCDAT CSECT 0034DC 19956+ DS 0F 0034DC 040017E4 19957+ DC AL1(L'SPTR1720),AL3(SPTR1720) 0017E8 19958+TEXT CSECT 0017E8 C2D5E94093404D95 19959+SPTR1721 DC C'BNZ l (no br)' 0034E0 19960+TDSCDAT CSECT 0034E0 19961+ DS 0F 0034E0 0D0017E8 19962+ DC AL1(L'SPTR1721),AL3(SPTR1721) 19963+* 004BC4 19964+TDSCTBL CSECT 04BC4 19965+T301TPTR EQU * 004BC4 000034C8 19966+ DC A(T301TDSC) enabled test 19967+* 00E95C 19968+TCODE CSECT 00E960 19969+ DS 0D ensure double word alignment for test 00E960 19970+T301 DS 0H 01650000 00E960 90EC D00C 0000C 19971+ STM 14,12,12(13) SAVE REGISTERS 02950000 00E964 18CF 19972+ LR R12,R15 base register := entry address PAGE 366 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0E960 19973+ USING T301,R12 declare code base register 00E966 41B0 C020 0E980 19974+ LA R11,T301L load loop target to R11 00E96A 58F0 C1C8 0EB28 19975+ L R15,=A(SAVETST) R15 := current save area 00E96E 50DF 0004 00004 19976+ ST R13,4(R15) set back pointer in current save area 00E972 182D 19977+ LR R2,R13 remember callers save area 00E974 18DF 19978+ LR R13,R15 setup current save area 00E976 50D2 0008 00008 19979+ ST R13,8(R2) set forw pointer in callers save area 00000 19980+ USING TDSC,R1 declare TDSC base register 00E97A 58F0 1008 00008 19981+ L R15,TLRCNT load local repeat count to R15 19982+* 19983 * 00E97E 1700 19984 XR R0,R0 clear, ensure Z cond set 19985 T301L REPINS BNZ,(T301BAD) repeat: BNZ T301BAD 19986+* 19987+* build from sublist &ALIST a comma separated string &ARGS 19988+* 19989+* 19990+* 19991+* 19992+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 19993+* this allows to transfer the repeat count from last TDSCGEN call 19994+* 19995+* 0E980 19996+T301L EQU * 19997+* 19998+* write a comment indicating what REPINS does (in case NOGEN in effect) 19999+* 20000+*,// REPINS: do 100 times: 20001+* 20002+* MNOTE requires that ' is doubled for expanded variables 20003+* thus build &MASTR as a copy of '&ARGS with ' doubled 20004+* 20005+* 20006+*,// BNZ T301BAD 20007+* 20008+* finally generate code: &ICNT copies of &CODE &ARGS 20009+* 00E980 4770 C1C0 0EB20 20010+ BNZ T301BAD 00E984 4770 C1C0 0EB20 20011+ BNZ T301BAD 00E988 4770 C1C0 0EB20 20012+ BNZ T301BAD 00E98C 4770 C1C0 0EB20 20013+ BNZ T301BAD 00E990 4770 C1C0 0EB20 20014+ BNZ T301BAD 00E994 4770 C1C0 0EB20 20015+ BNZ T301BAD 00E998 4770 C1C0 0EB20 20016+ BNZ T301BAD 00E99C 4770 C1C0 0EB20 20017+ BNZ T301BAD 00E9A0 4770 C1C0 0EB20 20018+ BNZ T301BAD 00E9A4 4770 C1C0 0EB20 20019+ BNZ T301BAD 00E9A8 4770 C1C0 0EB20 20020+ BNZ T301BAD 00E9AC 4770 C1C0 0EB20 20021+ BNZ T301BAD 00E9B0 4770 C1C0 0EB20 20022+ BNZ T301BAD 00E9B4 4770 C1C0 0EB20 20023+ BNZ T301BAD 00E9B8 4770 C1C0 0EB20 20024+ BNZ T301BAD 00E9BC 4770 C1C0 0EB20 20025+ BNZ T301BAD 00E9C0 4770 C1C0 0EB20 20026+ BNZ T301BAD 00E9C4 4770 C1C0 0EB20 20027+ BNZ T301BAD PAGE 367 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00E9C8 4770 C1C0 0EB20 20028+ BNZ T301BAD 00E9CC 4770 C1C0 0EB20 20029+ BNZ T301BAD 00E9D0 4770 C1C0 0EB20 20030+ BNZ T301BAD 00E9D4 4770 C1C0 0EB20 20031+ BNZ T301BAD 00E9D8 4770 C1C0 0EB20 20032+ BNZ T301BAD 00E9DC 4770 C1C0 0EB20 20033+ BNZ T301BAD 00E9E0 4770 C1C0 0EB20 20034+ BNZ T301BAD 00E9E4 4770 C1C0 0EB20 20035+ BNZ T301BAD 00E9E8 4770 C1C0 0EB20 20036+ BNZ T301BAD 00E9EC 4770 C1C0 0EB20 20037+ BNZ T301BAD 00E9F0 4770 C1C0 0EB20 20038+ BNZ T301BAD 00E9F4 4770 C1C0 0EB20 20039+ BNZ T301BAD 00E9F8 4770 C1C0 0EB20 20040+ BNZ T301BAD 00E9FC 4770 C1C0 0EB20 20041+ BNZ T301BAD 00EA00 4770 C1C0 0EB20 20042+ BNZ T301BAD 00EA04 4770 C1C0 0EB20 20043+ BNZ T301BAD 00EA08 4770 C1C0 0EB20 20044+ BNZ T301BAD 00EA0C 4770 C1C0 0EB20 20045+ BNZ T301BAD 00EA10 4770 C1C0 0EB20 20046+ BNZ T301BAD 00EA14 4770 C1C0 0EB20 20047+ BNZ T301BAD 00EA18 4770 C1C0 0EB20 20048+ BNZ T301BAD 00EA1C 4770 C1C0 0EB20 20049+ BNZ T301BAD 00EA20 4770 C1C0 0EB20 20050+ BNZ T301BAD 00EA24 4770 C1C0 0EB20 20051+ BNZ T301BAD 00EA28 4770 C1C0 0EB20 20052+ BNZ T301BAD 00EA2C 4770 C1C0 0EB20 20053+ BNZ T301BAD 00EA30 4770 C1C0 0EB20 20054+ BNZ T301BAD 00EA34 4770 C1C0 0EB20 20055+ BNZ T301BAD 00EA38 4770 C1C0 0EB20 20056+ BNZ T301BAD 00EA3C 4770 C1C0 0EB20 20057+ BNZ T301BAD 00EA40 4770 C1C0 0EB20 20058+ BNZ T301BAD 00EA44 4770 C1C0 0EB20 20059+ BNZ T301BAD 00EA48 4770 C1C0 0EB20 20060+ BNZ T301BAD 00EA4C 4770 C1C0 0EB20 20061+ BNZ T301BAD 00EA50 4770 C1C0 0EB20 20062+ BNZ T301BAD 00EA54 4770 C1C0 0EB20 20063+ BNZ T301BAD 00EA58 4770 C1C0 0EB20 20064+ BNZ T301BAD 00EA5C 4770 C1C0 0EB20 20065+ BNZ T301BAD 00EA60 4770 C1C0 0EB20 20066+ BNZ T301BAD 00EA64 4770 C1C0 0EB20 20067+ BNZ T301BAD 00EA68 4770 C1C0 0EB20 20068+ BNZ T301BAD 00EA6C 4770 C1C0 0EB20 20069+ BNZ T301BAD 00EA70 4770 C1C0 0EB20 20070+ BNZ T301BAD 00EA74 4770 C1C0 0EB20 20071+ BNZ T301BAD 00EA78 4770 C1C0 0EB20 20072+ BNZ T301BAD 00EA7C 4770 C1C0 0EB20 20073+ BNZ T301BAD 00EA80 4770 C1C0 0EB20 20074+ BNZ T301BAD 00EA84 4770 C1C0 0EB20 20075+ BNZ T301BAD 00EA88 4770 C1C0 0EB20 20076+ BNZ T301BAD 00EA8C 4770 C1C0 0EB20 20077+ BNZ T301BAD 00EA90 4770 C1C0 0EB20 20078+ BNZ T301BAD 00EA94 4770 C1C0 0EB20 20079+ BNZ T301BAD 00EA98 4770 C1C0 0EB20 20080+ BNZ T301BAD 00EA9C 4770 C1C0 0EB20 20081+ BNZ T301BAD 00EAA0 4770 C1C0 0EB20 20082+ BNZ T301BAD PAGE 368 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00EAA4 4770 C1C0 0EB20 20083+ BNZ T301BAD 00EAA8 4770 C1C0 0EB20 20084+ BNZ T301BAD 00EAAC 4770 C1C0 0EB20 20085+ BNZ T301BAD 00EAB0 4770 C1C0 0EB20 20086+ BNZ T301BAD 00EAB4 4770 C1C0 0EB20 20087+ BNZ T301BAD 00EAB8 4770 C1C0 0EB20 20088+ BNZ T301BAD 00EABC 4770 C1C0 0EB20 20089+ BNZ T301BAD 00EAC0 4770 C1C0 0EB20 20090+ BNZ T301BAD 00EAC4 4770 C1C0 0EB20 20091+ BNZ T301BAD 00EAC8 4770 C1C0 0EB20 20092+ BNZ T301BAD 00EACC 4770 C1C0 0EB20 20093+ BNZ T301BAD 00EAD0 4770 C1C0 0EB20 20094+ BNZ T301BAD 00EAD4 4770 C1C0 0EB20 20095+ BNZ T301BAD 00EAD8 4770 C1C0 0EB20 20096+ BNZ T301BAD 00EADC 4770 C1C0 0EB20 20097+ BNZ T301BAD 00EAE0 4770 C1C0 0EB20 20098+ BNZ T301BAD 00EAE4 4770 C1C0 0EB20 20099+ BNZ T301BAD 00EAE8 4770 C1C0 0EB20 20100+ BNZ T301BAD 00EAEC 4770 C1C0 0EB20 20101+ BNZ T301BAD 00EAF0 4770 C1C0 0EB20 20102+ BNZ T301BAD 00EAF4 4770 C1C0 0EB20 20103+ BNZ T301BAD 00EAF8 4770 C1C0 0EB20 20104+ BNZ T301BAD 00EAFC 4770 C1C0 0EB20 20105+ BNZ T301BAD 00EB00 4770 C1C0 0EB20 20106+ BNZ T301BAD 00EB04 4770 C1C0 0EB20 20107+ BNZ T301BAD 00EB08 4770 C1C0 0EB20 20108+ BNZ T301BAD 00EB0C 4770 C1C0 0EB20 20109+ BNZ T301BAD 20110+* 00EB10 06FB 20111 BCTR R15,R11 20112 TSIMRET 00EB12 58F0 C1C8 0EB28 20113+ L R15,=A(SAVETST) R15 := current save area 00EB16 58DF 0004 00004 20114+ L R13,4(R15) get old save area back 00EB1A 98EC D00C 0000C 20115+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00EB1E 07FE 20116+ BR 14 RETURN 02000000 20117 * 20118 T301BAD ABEND 50 00EB20 20119+T301BAD DS 0H 00400002 00EB20 4110 0032 00032 20120+ LA 1,50 LOAD PARAMETER REG 1 01900002 00EB24 0A0D 20121+ SVC 13 LINK TO ABEND ROUTINE 02050002 20122 TSIMEND 00EB28 20123+ LTORG 00EB28 00000458 20124 =A(SAVETST) 0EB2C 20125+T301TEND EQU * 20126 * 20127 * Test 302 -- BNZ l (do br) -------------------------------- 20128 * 20129 TSIMBEG T302,12000,60,1,C'BNZ l (do br)' 20130+* 0034E4 20131+TDSCDAT CSECT 0034E8 20132+ DS 0D 20133+* 0034E8 0000EB30 20134+T302TDSC DC A(T302) // TENTRY 0034EC 00000140 20135+ DC A(T302TEND-T302) // TLENGTH 0034F0 00002EE0 20136+ DC F'12000' // TLRCNT 0034F4 0000003C 20137+ DC F'60' // TIGCNT PAGE 369 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0034F8 00000001 20138+ DC F'1' // TLTYPE 0017F5 20139+TEXT CSECT 0017F5 E3F3F0F2 20140+SPTR1734 DC C'T302' 0034FC 20141+TDSCDAT CSECT 0034FC 20142+ DS 0F 0034FC 040017F5 20143+ DC AL1(L'SPTR1734),AL3(SPTR1734) 0017F9 20144+TEXT CSECT 0017F9 C2D5E94093404D84 20145+SPTR1735 DC C'BNZ l (do br)' 003500 20146+TDSCDAT CSECT 003500 20147+ DS 0F 003500 0D0017F9 20148+ DC AL1(L'SPTR1735),AL3(SPTR1735) 20149+* 004BC8 20150+TDSCTBL CSECT 04BC8 20151+T302TPTR EQU * 004BC8 000034E8 20152+ DC A(T302TDSC) enabled test 20153+* 00EB2C 20154+TCODE CSECT 00EB30 20155+ DS 0D ensure double word alignment for test 00EB30 20156+T302 DS 0H 01650000 00EB30 90EC D00C 0000C 20157+ STM 14,12,12(13) SAVE REGISTERS 02950000 00EB34 18CF 20158+ LR R12,R15 base register := entry address 0EB30 20159+ USING T302,R12 declare code base register 00EB36 41B0 C024 0EB54 20160+ LA R11,T302L load loop target to R11 00EB3A 58F0 C138 0EC68 20161+ L R15,=A(SAVETST) R15 := current save area 00EB3E 50DF 0004 00004 20162+ ST R13,4(R15) set back pointer in current save area 00EB42 182D 20163+ LR R2,R13 remember callers save area 00EB44 18DF 20164+ LR R13,R15 setup current save area 00EB46 50D2 0008 00008 20165+ ST R13,8(R2) set forw pointer in callers save area 00000 20166+ USING TDSC,R1 declare TDSC base register 00EB4A 58F0 1008 00008 20167+ L R15,TLRCNT load local repeat count to R15 20168+* 20169 * 00EB4E 1700 20170 XR R0,R0 clear, ensure Z cond set 00EB50 5A00 C13C 0EC6C 20171 A R0,=F'1' inc, ensure Z cond not set 0EB54 20172 T302L EQU * 00EB54 4770 C0A8 0EBD8 20173 BNZ T302D01 1st branch 00EB58 4770 C0AC 0EBDC 20174 T302U01 BNZ T302D02 3rd branch 00EB5C 4770 C0B0 0EBE0 20175 T302U02 BNZ T302D03 5th branch 00EB60 4770 C0B4 0EBE4 20176 T302U03 BNZ T302D04 00EB64 4770 C0B8 0EBE8 20177 T302U04 BNZ T302D05 00EB68 4770 C0BC 0EBEC 20178 T302U05 BNZ T302D06 00EB6C 4770 C0C0 0EBF0 20179 T302U06 BNZ T302D07 00EB70 4770 C0C4 0EBF4 20180 T302U07 BNZ T302D08 00EB74 4770 C0C8 0EBF8 20181 T302U08 BNZ T302D09 00EB78 4770 C0CC 0EBFC 20182 T302U09 BNZ T302D10 00EB7C 4770 C0D0 0EC00 20183 T302U10 BNZ T302D11 00EB80 4770 C0D4 0EC04 20184 T302U11 BNZ T302D12 00EB84 4770 C0D8 0EC08 20185 T302U12 BNZ T302D13 00EB88 4770 C0DC 0EC0C 20186 T302U13 BNZ T302D14 00EB8C 4770 C0E0 0EC10 20187 T302U14 BNZ T302D15 00EB90 4770 C0E4 0EC14 20188 T302U15 BNZ T302D16 00EB94 4770 C0E8 0EC18 20189 T302U16 BNZ T302D17 00EB98 4770 C0EC 0EC1C 20190 T302U17 BNZ T302D18 00EB9C 4770 C0F0 0EC20 20191 T302U18 BNZ T302D19 00EBA0 4770 C0F4 0EC24 20192 T302U19 BNZ T302D20 PAGE 370 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00EBA4 4770 C0F8 0EC28 20193 T302U20 BNZ T302D21 00EBA8 4770 C0FC 0EC2C 20194 T302U21 BNZ T302D22 00EBAC 4770 C100 0EC30 20195 T302U22 BNZ T302D23 00EBB0 4770 C104 0EC34 20196 T302U23 BNZ T302D24 00EBB4 4770 C108 0EC38 20197 T302U24 BNZ T302D25 00EBB8 4770 C10C 0EC3C 20198 T302U25 BNZ T302D26 00EBBC 4770 C110 0EC40 20199 T302U26 BNZ T302D27 00EBC0 4770 C114 0EC44 20200 T302U27 BNZ T302D28 00EBC4 4770 C118 0EC48 20201 T302U28 BNZ T302D29 57th branch 00EBC8 4770 C11C 0EC4C 20202 T302U29 BNZ T302D30 59th branch 20203 ABEND 50 00EBCC 20204+ DS 0H 00400002 00EBCC 4110 0032 00032 20205+ LA 1,50 LOAD PARAMETER REG 1 01900002 00EBD0 0A0D 20206+ SVC 13 LINK TO ABEND ROUTINE 02050002 20207 * 00EBD2 06FB 20208 T302U30 BCTR R15,R11 inner loop closure 00EBD4 47F0 C126 0EC56 20209 B T302END before bottom half of maze 20210 * 00EBD8 4770 C028 0EB58 20211 T302D01 BNZ T302U01 2nd branch 00EBDC 4770 C02C 0EB5C 20212 T302D02 BNZ T302U02 4th branch 00EBE0 4770 C030 0EB60 20213 T302D03 BNZ T302U03 00EBE4 4770 C034 0EB64 20214 T302D04 BNZ T302U04 00EBE8 4770 C038 0EB68 20215 T302D05 BNZ T302U05 00EBEC 4770 C03C 0EB6C 20216 T302D06 BNZ T302U06 00EBF0 4770 C040 0EB70 20217 T302D07 BNZ T302U07 00EBF4 4770 C044 0EB74 20218 T302D08 BNZ T302U08 00EBF8 4770 C048 0EB78 20219 T302D09 BNZ T302U09 00EBFC 4770 C04C 0EB7C 20220 T302D10 BNZ T302U10 00EC00 4770 C050 0EB80 20221 T302D11 BNZ T302U11 00EC04 4770 C054 0EB84 20222 T302D12 BNZ T302U12 00EC08 4770 C058 0EB88 20223 T302D13 BNZ T302U13 00EC0C 4770 C05C 0EB8C 20224 T302D14 BNZ T302U14 00EC10 4770 C060 0EB90 20225 T302D15 BNZ T302U15 00EC14 4770 C064 0EB94 20226 T302D16 BNZ T302U16 00EC18 4770 C068 0EB98 20227 T302D17 BNZ T302U17 00EC1C 4770 C06C 0EB9C 20228 T302D18 BNZ T302U18 00EC20 4770 C070 0EBA0 20229 T302D19 BNZ T302U19 00EC24 4770 C074 0EBA4 20230 T302D20 BNZ T302U20 00EC28 4770 C078 0EBA8 20231 T302D21 BNZ T302U21 00EC2C 4770 C07C 0EBAC 20232 T302D22 BNZ T302U22 00EC30 4770 C080 0EBB0 20233 T302D23 BNZ T302U23 00EC34 4770 C084 0EBB4 20234 T302D24 BNZ T302U24 00EC38 4770 C088 0EBB8 20235 T302D25 BNZ T302U25 00EC3C 4770 C08C 0EBBC 20236 T302D26 BNZ T302U26 00EC40 4770 C090 0EBC0 20237 T302D27 BNZ T302U27 00EC44 4770 C094 0EBC4 20238 T302D28 BNZ T302U28 00EC48 4770 C098 0EBC8 20239 T302D29 BNZ T302U29 00EC4C 4770 C0A2 0EBD2 20240 T302D30 BNZ T302U30 60th branch 20241 ABEND 50 00EC50 20242+ DS 0H 00400002 00EC50 4110 0032 00032 20243+ LA 1,50 LOAD PARAMETER REG 1 01900002 00EC54 0A0D 20244+ SVC 13 LINK TO ABEND ROUTINE 02050002 20245 * 0EC56 20246 T302END EQU * 20247 TSIMRET PAGE 371 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00EC56 58F0 C138 0EC68 20248+ L R15,=A(SAVETST) R15 := current save area 00EC5A 58DF 0004 00004 20249+ L R13,4(R15) get old save area back 00EC5E 98EC D00C 0000C 20250+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00EC62 07FE 20251+ BR 14 RETURN 02000000 20252 TSIMEND 00EC68 20253+ LTORG 00EC68 00000458 20254 =A(SAVETST) 00EC6C 00000001 20255 =F'1' 0EC70 20256+T302TEND EQU * 20257 * 20258 * Test 303 -- BNZ l (do br) -------------------------------- 20259 * 20260 TSIMBEG T303,6000,60,1,C'BNZ l (do br, far)',NBASE=2 20261+* 003504 20262+TDSCDAT CSECT 003508 20263+ DS 0D 20264+* 003508 0000EC70 20265+T303TDSC DC A(T303) // TENTRY 00350C 00001148 20266+ DC A(T303TEND-T303) // TLENGTH 003510 00001770 20267+ DC F'6000' // TLRCNT 003514 0000003C 20268+ DC F'60' // TIGCNT 003518 00000001 20269+ DC F'1' // TLTYPE 001806 20270+TEXT CSECT 001806 E3F3F0F3 20271+SPTR1747 DC C'T303' 00351C 20272+TDSCDAT CSECT 00351C 20273+ DS 0F 00351C 04001806 20274+ DC AL1(L'SPTR1747),AL3(SPTR1747) 00180A 20275+TEXT CSECT 00180A C2D5E94093404D84 20276+SPTR1748 DC C'BNZ l (do br, far)' 003520 20277+TDSCDAT CSECT 003520 20278+ DS 0F 003520 1200180A 20279+ DC AL1(L'SPTR1748),AL3(SPTR1748) 20280+* 004BCC 20281+TDSCTBL CSECT 04BCC 20282+T303TPTR EQU * 004BCC 00003508 20283+ DC A(T303TDSC) enabled test 20284+* 00EC70 20285+TCODE CSECT 00EC70 20286+ DS 0D ensure double word alignment for test 00EC70 20287+T303 DS 0H 01650000 00EC70 90EC D00C 0000C 20288+ STM 14,12,12(13) SAVE REGISTERS 02950000 00EC74 18BF 20289+ LR R11,R15 base register 1 := entry address 00EC76 41CB 0800 00800 20290+ LA R12,2048(R11) 00EC7A 41CC 0800 00800 20291+ LA R12,2048(R12) base register 1 := entry address+4k 0EC70 20292+ USING T303,R11,R12 declare code base registers 00EC7E 41A0 B02C 0EC9C 20293+ LA R10,T303L load loop target to R10 00EC82 58F0 C140 0FDB0 20294+ L R15,=A(SAVETST) R15 := current save area 00EC86 50DF 0004 00004 20295+ ST R13,4(R15) set back pointer in current save area 00EC8A 182D 20296+ LR R2,R13 remember callers save area 00EC8C 18DF 20297+ LR R13,R15 setup current save area 00EC8E 50D2 0008 00008 20298+ ST R13,8(R2) set forw pointer in callers save area 00000 20299+ USING TDSC,R1 declare TDSC base register 00EC92 58F0 1008 00008 20300+ L R15,TLRCNT load local repeat count to R15 20301+* 20302 * PAGE 372 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00EC96 1700 20303 XR R0,R0 clear, ensure Z cond set 00EC98 5A00 C144 0FDB4 20304 A R0,=F'1' inc, ensure Z cond not set 0EC9C 20305 T303L EQU * 00EC9C 4770 C0B0 0FD20 20306 BNZ T303D01 1st branch 00ECA0 4770 C0B4 0FD24 20307 T303U01 BNZ T303D02 3rd branch 00ECA4 4770 C0B8 0FD28 20308 T303U02 BNZ T303D03 5th branch 00ECA8 4770 C0BC 0FD2C 20309 T303U03 BNZ T303D04 00ECAC 4770 C0C0 0FD30 20310 T303U04 BNZ T303D05 00ECB0 4770 C0C4 0FD34 20311 T303U05 BNZ T303D06 00ECB4 4770 C0C8 0FD38 20312 T303U06 BNZ T303D07 00ECB8 4770 C0CC 0FD3C 20313 T303U07 BNZ T303D08 00ECBC 4770 C0D0 0FD40 20314 T303U08 BNZ T303D09 00ECC0 4770 C0D4 0FD44 20315 T303U09 BNZ T303D10 00ECC4 4770 C0D8 0FD48 20316 T303U10 BNZ T303D11 00ECC8 4770 C0DC 0FD4C 20317 T303U11 BNZ T303D12 00ECCC 4770 C0E0 0FD50 20318 T303U12 BNZ T303D13 00ECD0 4770 C0E4 0FD54 20319 T303U13 BNZ T303D14 00ECD4 4770 C0E8 0FD58 20320 T303U14 BNZ T303D15 00ECD8 4770 C0EC 0FD5C 20321 T303U15 BNZ T303D16 00ECDC 4770 C0F0 0FD60 20322 T303U16 BNZ T303D17 00ECE0 4770 C0F4 0FD64 20323 T303U17 BNZ T303D18 00ECE4 4770 C0F8 0FD68 20324 T303U18 BNZ T303D19 00ECE8 4770 C0FC 0FD6C 20325 T303U19 BNZ T303D20 00ECEC 4770 C100 0FD70 20326 T303U20 BNZ T303D21 00ECF0 4770 C104 0FD74 20327 T303U21 BNZ T303D22 00ECF4 4770 C108 0FD78 20328 T303U22 BNZ T303D23 00ECF8 4770 C10C 0FD7C 20329 T303U23 BNZ T303D24 00ECFC 4770 C110 0FD80 20330 T303U24 BNZ T303D25 00ED00 4770 C114 0FD84 20331 T303U25 BNZ T303D26 00ED04 4770 C118 0FD88 20332 T303U26 BNZ T303D27 00ED08 4770 C11C 0FD8C 20333 T303U27 BNZ T303D28 00ED0C 4770 C120 0FD90 20334 T303U28 BNZ T303D29 57th branch 00ED10 4770 C124 0FD94 20335 T303U29 BNZ T303D30 59th branch 20336 ABEND 50 00ED14 20337+ DS 0H 00400002 00ED14 4110 0032 00032 20338+ LA 1,50 LOAD PARAMETER REG 1 01900002 00ED18 0A0D 20339+ SVC 13 LINK TO ABEND ROUTINE 02050002 20340 * 00ED1A 06FA 20341 T303U30 BCTR R15,R10 R10 is loop target !! 00ED1C 47F0 C12E 0FD9E 20342 B T303END before bottom half of maze 20343 * ensure that BCTR is not 'far' 20344 * 00ED20 20345 DS 2048H force next page 20346 * 00FD20 4770 B030 0ECA0 20347 T303D01 BNZ T303U01 2nd branch 00FD24 4770 B034 0ECA4 20348 T303D02 BNZ T303U02 4th branch 00FD28 4770 B038 0ECA8 20349 T303D03 BNZ T303U03 00FD2C 4770 B03C 0ECAC 20350 T303D04 BNZ T303U04 00FD30 4770 B040 0ECB0 20351 T303D05 BNZ T303U05 00FD34 4770 B044 0ECB4 20352 T303D06 BNZ T303U06 00FD38 4770 B048 0ECB8 20353 T303D07 BNZ T303U07 00FD3C 4770 B04C 0ECBC 20354 T303D08 BNZ T303U08 00FD40 4770 B050 0ECC0 20355 T303D09 BNZ T303U09 00FD44 4770 B054 0ECC4 20356 T303D10 BNZ T303U10 00FD48 4770 B058 0ECC8 20357 T303D11 BNZ T303U11 PAGE 373 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00FD4C 4770 B05C 0ECCC 20358 T303D12 BNZ T303U12 00FD50 4770 B060 0ECD0 20359 T303D13 BNZ T303U13 00FD54 4770 B064 0ECD4 20360 T303D14 BNZ T303U14 00FD58 4770 B068 0ECD8 20361 T303D15 BNZ T303U15 00FD5C 4770 B06C 0ECDC 20362 T303D16 BNZ T303U16 00FD60 4770 B070 0ECE0 20363 T303D17 BNZ T303U17 00FD64 4770 B074 0ECE4 20364 T303D18 BNZ T303U18 00FD68 4770 B078 0ECE8 20365 T303D19 BNZ T303U19 00FD6C 4770 B07C 0ECEC 20366 T303D20 BNZ T303U20 00FD70 4770 B080 0ECF0 20367 T303D21 BNZ T303U21 00FD74 4770 B084 0ECF4 20368 T303D22 BNZ T303U22 00FD78 4770 B088 0ECF8 20369 T303D23 BNZ T303U23 00FD7C 4770 B08C 0ECFC 20370 T303D24 BNZ T303U24 00FD80 4770 B090 0ED00 20371 T303D25 BNZ T303U25 00FD84 4770 B094 0ED04 20372 T303D26 BNZ T303U26 00FD88 4770 B098 0ED08 20373 T303D27 BNZ T303U27 00FD8C 4770 B09C 0ED0C 20374 T303D28 BNZ T303U28 00FD90 4770 B0A0 0ED10 20375 T303D29 BNZ T303U29 00FD94 4770 B0AA 0ED1A 20376 T303D30 BNZ T303U30 60th branch 20377 ABEND 50 00FD98 20378+ DS 0H 00400002 00FD98 4110 0032 00032 20379+ LA 1,50 LOAD PARAMETER REG 1 01900002 00FD9C 0A0D 20380+ SVC 13 LINK TO ABEND ROUTINE 02050002 20381 * 0FD9E 20382 T303END EQU * 20383 TSIMRET 00FD9E 58F0 C140 0FDB0 20384+ L R15,=A(SAVETST) R15 := current save area 00FDA2 58DF 0004 00004 20385+ L R13,4(R15) get old save area back 00FDA6 98EC D00C 0000C 20386+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 00FDAA 07FE 20387+ BR 14 RETURN 02000000 20388 TSIMEND 00FDB0 20389+ LTORG 00FDB0 00000458 20390 =A(SAVETST) 00FDB4 00000001 20391 =F'1' 0FDB8 20392+T303TEND EQU * 20393 * 20394 * Test 304 -- BR R ----------------------------------------- 20395 * 20396 TSIMBEG T304,70000,10,1,C'BR R' 20397+* 003524 20398+TDSCDAT CSECT 003528 20399+ DS 0D 20400+* 003528 0000FDB8 20401+T304TDSC DC A(T304) // TENTRY 00352C 00000074 20402+ DC A(T304TEND-T304) // TLENGTH 003530 00011170 20403+ DC F'70000' // TLRCNT 003534 0000000A 20404+ DC F'10' // TIGCNT 003538 00000001 20405+ DC F'1' // TLTYPE 00181C 20406+TEXT CSECT 00181C E3F3F0F4 20407+SPTR1760 DC C'T304' 00353C 20408+TDSCDAT CSECT 00353C 20409+ DS 0F 00353C 0400181C 20410+ DC AL1(L'SPTR1760),AL3(SPTR1760) 001820 20411+TEXT CSECT 001820 C2D940D9 20412+SPTR1761 DC C'BR R' PAGE 374 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003540 20413+TDSCDAT CSECT 003540 20414+ DS 0F 003540 04001820 20415+ DC AL1(L'SPTR1761),AL3(SPTR1761) 20416+* 004BD0 20417+TDSCTBL CSECT 04BD0 20418+T304TPTR EQU * 004BD0 00003528 20419+ DC A(T304TDSC) enabled test 20420+* 00FDB8 20421+TCODE CSECT 00FDB8 20422+ DS 0D ensure double word alignment for test 00FDB8 20423+T304 DS 0H 01650000 00FDB8 90EC D00C 0000C 20424+ STM 14,12,12(13) SAVE REGISTERS 02950000 00FDBC 18CF 20425+ LR R12,R15 base register := entry address 0FDB8 20426+ USING T304,R12 declare code base register 00FDBE 41B0 C046 0FDFE 20427+ LA R11,T304L load loop target to R11 00FDC2 58F0 C070 0FE28 20428+ L R15,=A(SAVETST) R15 := current save area 00FDC6 50DF 0004 00004 20429+ ST R13,4(R15) set back pointer in current save area 00FDCA 182D 20430+ LR R2,R13 remember callers save area 00FDCC 18DF 20431+ LR R13,R15 setup current save area 00FDCE 50D2 0008 00008 20432+ ST R13,8(R2) set forw pointer in callers save area 00000 20433+ USING TDSC,R1 declare TDSC base register 00FDD2 58F0 1008 00008 20434+ L R15,TLRCNT load local repeat count to R15 20435+* 20436 * 00FDD6 4100 C056 0FE0E 20437 LA R0,T304TR0 00FDDA 4110 C058 0FE10 20438 LA R1,T304TR1 00FDDE 4120 C05A 0FE12 20439 LA R2,T304TR2 00FDE2 4130 C05C 0FE14 20440 LA R3,T304TR3 00FDE6 4140 C05E 0FE16 20441 LA R4,T304TR4 00FDEA 4150 C048 0FE00 20442 LA R5,T304TR5 00FDEE 4160 C04A 0FE02 20443 LA R6,T304TR6 00FDF2 4170 C04C 0FE04 20444 LA R7,T304TR7 00FDF6 4180 C04E 0FE06 20445 LA R8,T304TR8 00FDFA 4190 C050 0FE08 20446 LA R9,T304TR9 20447 * 00FDFE 07F0 20448 T304L BR R0 1st branch 00FE00 07F1 20449 T304TR5 BR R1 3rd branch 00FE02 07F2 20450 T304TR6 BR R2 5th branch 00FE04 07F3 20451 T304TR7 BR R3 7th branch 00FE06 07F4 20452 T304TR8 BR R4 9th branch 20453 * 00FE08 06FB 20454 T304TR9 BCTR R15,R11 00FE0A 47F0 C060 0FE18 20455 B T304END 20456 * 00FE0E 07F5 20457 T304TR0 BR R5 2nd branch 00FE10 07F6 20458 T304TR1 BR R6 4th branch 00FE12 07F7 20459 T304TR2 BR R7 6th branch 00FE14 07F8 20460 T304TR3 BR R8 8th branch 00FE16 07F9 20461 T304TR4 BR R9 10st branch 20462 * 0FE18 20463 T304END EQU * 20464 TSIMRET 00FE18 58F0 C070 0FE28 20465+ L R15,=A(SAVETST) R15 := current save area 00FE1C 58DF 0004 00004 20466+ L R13,4(R15) get old save area back 00FE20 98EC D00C 0000C 20467+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 PAGE 375 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00FE24 07FE 20468+ BR 14 RETURN 02000000 20469 TSIMEND 00FE28 20470+ LTORG 00FE28 00000458 20471 =A(SAVETST) 0FE2C 20472+T304TEND EQU * 20473 * 20474 * Test 305 -- BR R ----------------------------------------- 20475 * 20476 TSIMBEG T305,45000,10,1,C'BR R (far)',NBASE=2 20477+* 003544 20478+TDSCDAT CSECT 003548 20479+ DS 0D 20480+* 003548 0000FE30 20481+T305TDSC DC A(T305) // TENTRY 00354C 0000107C 20482+ DC A(T305TEND-T305) // TLENGTH 003550 0000AFC8 20483+ DC F'45000' // TLRCNT 003554 0000000A 20484+ DC F'10' // TIGCNT 003558 00000001 20485+ DC F'1' // TLTYPE 001824 20486+TEXT CSECT 001824 E3F3F0F5 20487+SPTR1769 DC C'T305' 00355C 20488+TDSCDAT CSECT 00355C 20489+ DS 0F 00355C 04001824 20490+ DC AL1(L'SPTR1769),AL3(SPTR1769) 001828 20491+TEXT CSECT 001828 C2D940D9404D8681 20492+SPTR1770 DC C'BR R (far)' 003560 20493+TDSCDAT CSECT 003560 20494+ DS 0F 003560 0A001828 20495+ DC AL1(L'SPTR1770),AL3(SPTR1770) 20496+* 004BD4 20497+TDSCTBL CSECT 04BD4 20498+T305TPTR EQU * 004BD4 00003548 20499+ DC A(T305TDSC) enabled test 20500+* 00FE2C 20501+TCODE CSECT 00FE30 20502+ DS 0D ensure double word alignment for test 00FE30 20503+T305 DS 0H 01650000 00FE30 90EC D00C 0000C 20504+ STM 14,12,12(13) SAVE REGISTERS 02950000 00FE34 18BF 20505+ LR R11,R15 base register 1 := entry address 00FE36 41CB 0800 00800 20506+ LA R12,2048(R11) 00FE3A 41CC 0800 00800 20507+ LA R12,2048(R12) base register 1 := entry address+4k 0FE30 20508+ USING T305,R11,R12 declare code base registers 00FE3E 41A0 B04E 0FE7E 20509+ LA R10,T305L load loop target to R10 00FE42 58F0 C078 10EA8 20510+ L R15,=A(SAVETST) R15 := current save area 00FE46 50DF 0004 00004 20511+ ST R13,4(R15) set back pointer in current save area 00FE4A 182D 20512+ LR R2,R13 remember callers save area 00FE4C 18DF 20513+ LR R13,R15 setup current save area 00FE4E 50D2 0008 00008 20514+ ST R13,8(R2) set forw pointer in callers save area 00000 20515+ USING TDSC,R1 declare TDSC base register 00FE52 58F0 1008 00008 20516+ L R15,TLRCNT load local repeat count to R15 20517+* 20518 * 00FE56 4100 C05E 10E8E 20519 LA R0,T305TR0 00FE5A 4110 C060 10E90 20520 LA R1,T305TR1 00FE5E 4120 C062 10E92 20521 LA R2,T305TR2 00FE62 4130 C064 10E94 20522 LA R3,T305TR3 PAGE 376 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00FE66 4140 C066 10E96 20523 LA R4,T305TR4 00FE6A 4150 B050 0FE80 20524 LA R5,T305TR5 00FE6E 4160 B052 0FE82 20525 LA R6,T305TR6 00FE72 4170 B054 0FE84 20526 LA R7,T305TR7 00FE76 4180 B056 0FE86 20527 LA R8,T305TR8 00FE7A 4190 B058 0FE88 20528 LA R9,T305TR9 20529 * 00FE7E 07F0 20530 T305L BR R0 1st branch 00FE80 07F1 20531 T305TR5 BR R1 3rd branch 00FE82 07F2 20532 T305TR6 BR R2 5th branch 00FE84 07F3 20533 T305TR7 BR R3 7th branch 00FE86 07F4 20534 T305TR8 BR R4 9th branch 20535 * 00FE88 06FA 20536 T305TR9 BCTR R15,R10 R10 is loop target !! 00FE8A 47F0 C068 10E98 20537 B T305END 20538 * 00FE8E 20539 DS 2048H force next page 20540 * 010E8E 07F5 20541 T305TR0 BR R5 2nd branch 010E90 07F6 20542 T305TR1 BR R6 4th branch 010E92 07F7 20543 T305TR2 BR R7 6th branch 010E94 07F8 20544 T305TR3 BR R8 8th branch 010E96 07F9 20545 T305TR4 BR R9 10st branch 20546 * 10E98 20547 T305END EQU * 20548 TSIMRET 010E98 58F0 C078 10EA8 20549+ L R15,=A(SAVETST) R15 := current save area 010E9C 58DF 0004 00004 20550+ L R13,4(R15) get old save area back 010EA0 98EC D00C 0000C 20551+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 010EA4 07FE 20552+ BR 14 RETURN 02000000 20553 TSIMEND 010EA8 20554+ LTORG 010EA8 00000458 20555 =A(SAVETST) 10EAC 20556+T305TEND EQU * 20557 * 20558 * Test 310 -- BCTR R,0 ------------------------------------- 20559 * 20560 TSIMBEG T310,15000,100,1,C'BCTR R,0' 20561+* 003564 20562+TDSCDAT CSECT 003568 20563+ DS 0D 20564+* 003568 00010EB0 20565+T310TDSC DC A(T310) // TENTRY 00356C 00000108 20566+ DC A(T310TEND-T310) // TLENGTH 003570 00003A98 20567+ DC F'15000' // TLRCNT 003574 00000064 20568+ DC F'100' // TIGCNT 003578 00000001 20569+ DC F'1' // TLTYPE 001832 20570+TEXT CSECT 001832 E3F3F1F0 20571+SPTR1778 DC C'T310' 00357C 20572+TDSCDAT CSECT 00357C 20573+ DS 0F 00357C 04001832 20574+ DC AL1(L'SPTR1778),AL3(SPTR1778) 001836 20575+TEXT CSECT 001836 C2C3E3D940D96BF0 20576+SPTR1779 DC C'BCTR R,0' 003580 20577+TDSCDAT CSECT PAGE 377 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003580 20578+ DS 0F 003580 08001836 20579+ DC AL1(L'SPTR1779),AL3(SPTR1779) 20580+* 004BD8 20581+TDSCTBL CSECT 04BD8 20582+T310TPTR EQU * 004BD8 00003568 20583+ DC A(T310TDSC) enabled test 20584+* 010EAC 20585+TCODE CSECT 010EB0 20586+ DS 0D ensure double word alignment for test 010EB0 20587+T310 DS 0H 01650000 010EB0 90EC D00C 0000C 20588+ STM 14,12,12(13) SAVE REGISTERS 02950000 010EB4 18CF 20589+ LR R12,R15 base register := entry address 10EB0 20590+ USING T310,R12 declare code base register 010EB6 41B0 C022 10ED2 20591+ LA R11,T310L load loop target to R11 010EBA 58F0 C100 10FB0 20592+ L R15,=A(SAVETST) R15 := current save area 010EBE 50DF 0004 00004 20593+ ST R13,4(R15) set back pointer in current save area 010EC2 182D 20594+ LR R2,R13 remember callers save area 010EC4 18DF 20595+ LR R13,R15 setup current save area 010EC6 50D2 0008 00008 20596+ ST R13,8(R2) set forw pointer in callers save area 00000 20597+ USING TDSC,R1 declare TDSC base register 010ECA 58F0 1008 00008 20598+ L R15,TLRCNT load local repeat count to R15 20599+* 20600 * 010ECE 5820 C104 10FB4 20601 L R2,=F'1000000000' init counter 20602 T310L REPINS BCTR,(R2,0) repeat: BCTR R2,0 20603+* 20604+* build from sublist &ALIST a comma separated string &ARGS 20605+* 20606+* 20607+* 20608+* 20609+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 20610+* this allows to transfer the repeat count from last TDSCGEN call 20611+* 20612+* 10ED2 20613+T310L EQU * 20614+* 20615+* write a comment indicating what REPINS does (in case NOGEN in effect) 20616+* 20617+*,// REPINS: do 100 times: 20618+* 20619+* MNOTE requires that ' is doubled for expanded variables 20620+* thus build &MASTR as a copy of '&ARGS with ' doubled 20621+* 20622+* 20623+*,// BCTR R2,0 20624+* 20625+* finally generate code: &ICNT copies of &CODE &ARGS 20626+* 010ED2 0620 20627+ BCTR R2,0 010ED4 0620 20628+ BCTR R2,0 010ED6 0620 20629+ BCTR R2,0 010ED8 0620 20630+ BCTR R2,0 010EDA 0620 20631+ BCTR R2,0 010EDC 0620 20632+ BCTR R2,0 PAGE 378 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 010EDE 0620 20633+ BCTR R2,0 010EE0 0620 20634+ BCTR R2,0 010EE2 0620 20635+ BCTR R2,0 010EE4 0620 20636+ BCTR R2,0 010EE6 0620 20637+ BCTR R2,0 010EE8 0620 20638+ BCTR R2,0 010EEA 0620 20639+ BCTR R2,0 010EEC 0620 20640+ BCTR R2,0 010EEE 0620 20641+ BCTR R2,0 010EF0 0620 20642+ BCTR R2,0 010EF2 0620 20643+ BCTR R2,0 010EF4 0620 20644+ BCTR R2,0 010EF6 0620 20645+ BCTR R2,0 010EF8 0620 20646+ BCTR R2,0 010EFA 0620 20647+ BCTR R2,0 010EFC 0620 20648+ BCTR R2,0 010EFE 0620 20649+ BCTR R2,0 010F00 0620 20650+ BCTR R2,0 010F02 0620 20651+ BCTR R2,0 010F04 0620 20652+ BCTR R2,0 010F06 0620 20653+ BCTR R2,0 010F08 0620 20654+ BCTR R2,0 010F0A 0620 20655+ BCTR R2,0 010F0C 0620 20656+ BCTR R2,0 010F0E 0620 20657+ BCTR R2,0 010F10 0620 20658+ BCTR R2,0 010F12 0620 20659+ BCTR R2,0 010F14 0620 20660+ BCTR R2,0 010F16 0620 20661+ BCTR R2,0 010F18 0620 20662+ BCTR R2,0 010F1A 0620 20663+ BCTR R2,0 010F1C 0620 20664+ BCTR R2,0 010F1E 0620 20665+ BCTR R2,0 010F20 0620 20666+ BCTR R2,0 010F22 0620 20667+ BCTR R2,0 010F24 0620 20668+ BCTR R2,0 010F26 0620 20669+ BCTR R2,0 010F28 0620 20670+ BCTR R2,0 010F2A 0620 20671+ BCTR R2,0 010F2C 0620 20672+ BCTR R2,0 010F2E 0620 20673+ BCTR R2,0 010F30 0620 20674+ BCTR R2,0 010F32 0620 20675+ BCTR R2,0 010F34 0620 20676+ BCTR R2,0 010F36 0620 20677+ BCTR R2,0 010F38 0620 20678+ BCTR R2,0 010F3A 0620 20679+ BCTR R2,0 010F3C 0620 20680+ BCTR R2,0 010F3E 0620 20681+ BCTR R2,0 010F40 0620 20682+ BCTR R2,0 010F42 0620 20683+ BCTR R2,0 010F44 0620 20684+ BCTR R2,0 010F46 0620 20685+ BCTR R2,0 010F48 0620 20686+ BCTR R2,0 010F4A 0620 20687+ BCTR R2,0 PAGE 379 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 010F4C 0620 20688+ BCTR R2,0 010F4E 0620 20689+ BCTR R2,0 010F50 0620 20690+ BCTR R2,0 010F52 0620 20691+ BCTR R2,0 010F54 0620 20692+ BCTR R2,0 010F56 0620 20693+ BCTR R2,0 010F58 0620 20694+ BCTR R2,0 010F5A 0620 20695+ BCTR R2,0 010F5C 0620 20696+ BCTR R2,0 010F5E 0620 20697+ BCTR R2,0 010F60 0620 20698+ BCTR R2,0 010F62 0620 20699+ BCTR R2,0 010F64 0620 20700+ BCTR R2,0 010F66 0620 20701+ BCTR R2,0 010F68 0620 20702+ BCTR R2,0 010F6A 0620 20703+ BCTR R2,0 010F6C 0620 20704+ BCTR R2,0 010F6E 0620 20705+ BCTR R2,0 010F70 0620 20706+ BCTR R2,0 010F72 0620 20707+ BCTR R2,0 010F74 0620 20708+ BCTR R2,0 010F76 0620 20709+ BCTR R2,0 010F78 0620 20710+ BCTR R2,0 010F7A 0620 20711+ BCTR R2,0 010F7C 0620 20712+ BCTR R2,0 010F7E 0620 20713+ BCTR R2,0 010F80 0620 20714+ BCTR R2,0 010F82 0620 20715+ BCTR R2,0 010F84 0620 20716+ BCTR R2,0 010F86 0620 20717+ BCTR R2,0 010F88 0620 20718+ BCTR R2,0 010F8A 0620 20719+ BCTR R2,0 010F8C 0620 20720+ BCTR R2,0 010F8E 0620 20721+ BCTR R2,0 010F90 0620 20722+ BCTR R2,0 010F92 0620 20723+ BCTR R2,0 010F94 0620 20724+ BCTR R2,0 010F96 0620 20725+ BCTR R2,0 010F98 0620 20726+ BCTR R2,0 20727+* 010F9A 06FB 20728 BCTR R15,R11 20729 TSIMRET 010F9C 58F0 C100 10FB0 20730+ L R15,=A(SAVETST) R15 := current save area 010FA0 58DF 0004 00004 20731+ L R13,4(R15) get old save area back 010FA4 98EC D00C 0000C 20732+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 010FA8 07FE 20733+ BR 14 RETURN 02000000 20734 TSIMEND 010FB0 20735+ LTORG 010FB0 00000458 20736 =A(SAVETST) 010FB4 3B9ACA00 20737 =F'1000000000' 10FB8 20738+T310TEND EQU * 20739 * 20740 * Test 311 -- BCTR R,R ------------------------------------- 20741 * 20742 TSIMBEG T311,700000,1,0,C'BCTR R,R' PAGE 380 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 20743+* 003584 20744+TDSCDAT CSECT 003588 20745+ DS 0D 20746+* 003588 00010FB8 20747+T311TDSC DC A(T311) // TENTRY 00358C 00000034 20748+ DC A(T311TEND-T311) // TLENGTH 003590 000AAE60 20749+ DC F'700000' // TLRCNT 003594 00000001 20750+ DC F'1' // TIGCNT 003598 00000000 20751+ DC F'0' // TLTYPE 00183E 20752+TEXT CSECT 00183E E3F3F1F1 20753+SPTR1790 DC C'T311' 00359C 20754+TDSCDAT CSECT 00359C 20755+ DS 0F 00359C 0400183E 20756+ DC AL1(L'SPTR1790),AL3(SPTR1790) 001842 20757+TEXT CSECT 001842 C2C3E3D940D96BD9 20758+SPTR1791 DC C'BCTR R,R' 0035A0 20759+TDSCDAT CSECT 0035A0 20760+ DS 0F 0035A0 08001842 20761+ DC AL1(L'SPTR1791),AL3(SPTR1791) 20762+* 004BDC 20763+TDSCTBL CSECT 04BDC 20764+T311TPTR EQU * 004BDC 00003588 20765+ DC A(T311TDSC) enabled test 20766+* 010FB8 20767+TCODE CSECT 010FB8 20768+ DS 0D ensure double word alignment for test 010FB8 20769+T311 DS 0H 01650000 010FB8 90EC D00C 0000C 20770+ STM 14,12,12(13) SAVE REGISTERS 02950000 010FBC 18CF 20771+ LR R12,R15 base register := entry address 10FB8 20772+ USING T311,R12 declare code base register 010FBE 41B0 C01E 10FD6 20773+ LA R11,T311L load loop target to R11 010FC2 58F0 C030 10FE8 20774+ L R15,=A(SAVETST) R15 := current save area 010FC6 50DF 0004 00004 20775+ ST R13,4(R15) set back pointer in current save area 010FCA 182D 20776+ LR R2,R13 remember callers save area 010FCC 18DF 20777+ LR R13,R15 setup current save area 010FCE 50D2 0008 00008 20778+ ST R13,8(R2) set forw pointer in callers save area 00000 20779+ USING TDSC,R1 declare TDSC base register 010FD2 58F0 1008 00008 20780+ L R15,TLRCNT load local repeat count to R15 20781+* 20782 * 10FD6 20783 T311L EQU * no test body, just test BCTR 010FD6 06FB 20784 BCTR R15,R11 20785 TSIMRET 010FD8 58F0 C030 10FE8 20786+ L R15,=A(SAVETST) R15 := current save area 010FDC 58DF 0004 00004 20787+ L R13,4(R15) get old save area back 010FE0 98EC D00C 0000C 20788+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 010FE4 07FE 20789+ BR 14 RETURN 02000000 20790 TSIMEND 010FE8 20791+ LTORG 010FE8 00000458 20792 =A(SAVETST) 10FEC 20793+T311TEND EQU * 20794 * 20795 * Test 312 -- BCT R,l -------------------------------------- 20796 * 20797 TSIMBEG T312,600000,1,0,C'BCT R,l' PAGE 381 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 20798+* 0035A4 20799+TDSCDAT CSECT 0035A8 20800+ DS 0D 20801+* 0035A8 00010FF0 20802+T312TDSC DC A(T312) // TENTRY 0035AC 00000034 20803+ DC A(T312TEND-T312) // TLENGTH 0035B0 000927C0 20804+ DC F'600000' // TLRCNT 0035B4 00000001 20805+ DC F'1' // TIGCNT 0035B8 00000000 20806+ DC F'0' // TLTYPE 00184A 20807+TEXT CSECT 00184A E3F3F1F2 20808+SPTR1799 DC C'T312' 0035BC 20809+TDSCDAT CSECT 0035BC 20810+ DS 0F 0035BC 0400184A 20811+ DC AL1(L'SPTR1799),AL3(SPTR1799) 00184E 20812+TEXT CSECT 00184E C2C3E340D96B93 20813+SPTR1800 DC C'BCT R,l' 0035C0 20814+TDSCDAT CSECT 0035C0 20815+ DS 0F 0035C0 0700184E 20816+ DC AL1(L'SPTR1800),AL3(SPTR1800) 20817+* 004BE0 20818+TDSCTBL CSECT 04BE0 20819+T312TPTR EQU * 004BE0 000035A8 20820+ DC A(T312TDSC) enabled test 20821+* 010FEC 20822+TCODE CSECT 010FF0 20823+ DS 0D ensure double word alignment for test 010FF0 20824+T312 DS 0H 01650000 010FF0 90EC D00C 0000C 20825+ STM 14,12,12(13) SAVE REGISTERS 02950000 010FF4 18CF 20826+ LR R12,R15 base register := entry address 10FF0 20827+ USING T312,R12 declare code base register 010FF6 41B0 C01E 1100E 20828+ LA R11,T312L load loop target to R11 010FFA 58F0 C030 11020 20829+ L R15,=A(SAVETST) R15 := current save area 010FFE 50DF 0004 00004 20830+ ST R13,4(R15) set back pointer in current save area 011002 182D 20831+ LR R2,R13 remember callers save area 011004 18DF 20832+ LR R13,R15 setup current save area 011006 50D2 0008 00008 20833+ ST R13,8(R2) set forw pointer in callers save area 00000 20834+ USING TDSC,R1 declare TDSC base register 01100A 58F0 1008 00008 20835+ L R15,TLRCNT load local repeat count to R15 20836+* 20837 * 1100E 20838 T312L EQU * no test body, just test BCT 01100E 46F0 C01E 1100E 20839 BCT R15,T312L 20840 TSIMRET 011012 58F0 C030 11020 20841+ L R15,=A(SAVETST) R15 := current save area 011016 58DF 0004 00004 20842+ L R13,4(R15) get old save area back 01101A 98EC D00C 0000C 20843+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01101E 07FE 20844+ BR 14 RETURN 02000000 20845 TSIMEND 011020 20846+ LTORG 011020 00000458 20847 =A(SAVETST) 11024 20848+T312TEND EQU * 20849 * 20850 * Test 315 -- BXLE R,R,l ----------------------------------- 20851 * 20852 TSIMBEG T315,6000,100,6,C'BXLE R,R,l' PAGE 382 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 20853+* 0035C4 20854+TDSCDAT CSECT 0035C8 20855+ DS 0D 20856+* 0035C8 00011028 20857+T315TDSC DC A(T315) // TENTRY 0035CC 00000044 20858+ DC A(T315TEND-T315) // TLENGTH 0035D0 00001770 20859+ DC F'6000' // TLRCNT 0035D4 00000064 20860+ DC F'100' // TIGCNT 0035D8 00000006 20861+ DC F'6' // TLTYPE 001855 20862+TEXT CSECT 001855 E3F3F1F5 20863+SPTR1808 DC C'T315' 0035DC 20864+TDSCDAT CSECT 0035DC 20865+ DS 0F 0035DC 04001855 20866+ DC AL1(L'SPTR1808),AL3(SPTR1808) 001859 20867+TEXT CSECT 001859 C2E7D3C540D96BD9 20868+SPTR1809 DC C'BXLE R,R,l' 0035E0 20869+TDSCDAT CSECT 0035E0 20870+ DS 0F 0035E0 0A001859 20871+ DC AL1(L'SPTR1809),AL3(SPTR1809) 20872+* 004BE4 20873+TDSCTBL CSECT 04BE4 20874+T315TPTR EQU * 004BE4 000035C8 20875+ DC A(T315TDSC) enabled test 20876+* 011024 20877+TCODE CSECT 011028 20878+ DS 0D ensure double word alignment for test 011028 20879+T315 DS 0H 01650000 011028 90EC D00C 0000C 20880+ STM 14,12,12(13) SAVE REGISTERS 02950000 01102C 18CF 20881+ LR R12,R15 base register := entry address 11028 20882+ USING T315,R12 declare code base register 01102E 41B0 C01E 11046 20883+ LA R11,T315L load loop target to R11 011032 58F0 C040 11068 20884+ L R15,=A(SAVETST) R15 := current save area 011036 50DF 0004 00004 20885+ ST R13,4(R15) set back pointer in current save area 01103A 182D 20886+ LR R2,R13 remember callers save area 01103C 18DF 20887+ LR R13,R15 setup current save area 01103E 50D2 0008 00008 20888+ ST R13,8(R2) set forw pointer in callers save area 00000 20889+ USING TDSC,R1 declare TDSC base register 011042 58F0 1008 00008 20890+ L R15,TLRCNT load local repeat count to R15 20891+* 20892 * 011046 4130 0000 00000 20893 T315L LA R3,0 index begin 01104A 4140 0001 00001 20894 LA R4,1 index increment 01104E 4150 0063 00063 20895 LA R5,99 index end 11052 20896 T315LL EQU * no inner loop body 011052 8734 C02A 11052 20897 BXLE R3,R4,T315LL will be executed 100 times 011056 06FB 20898 BCTR R15,R11 20899 TSIMRET 011058 58F0 C040 11068 20900+ L R15,=A(SAVETST) R15 := current save area 01105C 58DF 0004 00004 20901+ L R13,4(R15) get old save area back 011060 98EC D00C 0000C 20902+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 011064 07FE 20903+ BR 14 RETURN 02000000 20904 TSIMEND 011068 20905+ LTORG 011068 00000458 20906 =A(SAVETST) 1106C 20907+T315TEND EQU * PAGE 383 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 20908 * 20909 * Test 320 -- BALR R,R; BR R ------------------------------- 20910 * 20911 TSIMBEG T320,8000,50,1,C'BALR R,R; BR R' 20912+* 0035E4 20913+TDSCDAT CSECT 0035E8 20914+ DS 0D 20915+* 0035E8 00011070 20916+T320TDSC DC A(T320) // TENTRY 0035EC 0000009C 20917+ DC A(T320TEND-T320) // TLENGTH 0035F0 00001F40 20918+ DC F'8000' // TLRCNT 0035F4 00000032 20919+ DC F'50' // TIGCNT 0035F8 00000001 20920+ DC F'1' // TLTYPE 001863 20921+TEXT CSECT 001863 E3F3F2F0 20922+SPTR1817 DC C'T320' 0035FC 20923+TDSCDAT CSECT 0035FC 20924+ DS 0F 0035FC 04001863 20925+ DC AL1(L'SPTR1817),AL3(SPTR1817) 001867 20926+TEXT CSECT 001867 C2C1D3D940D96BD9 20927+SPTR1818 DC C'BALR R,R; BR R' 003600 20928+TDSCDAT CSECT 003600 20929+ DS 0F 003600 0E001867 20930+ DC AL1(L'SPTR1818),AL3(SPTR1818) 20931+* 004BE8 20932+TDSCTBL CSECT 04BE8 20933+T320TPTR EQU * 004BE8 000035E8 20934+ DC A(T320TDSC) enabled test 20935+* 01106C 20936+TCODE CSECT 011070 20937+ DS 0D ensure double word alignment for test 011070 20938+T320 DS 0H 01650000 011070 90EC D00C 0000C 20939+ STM 14,12,12(13) SAVE REGISTERS 02950000 011074 18CF 20940+ LR R12,R15 base register := entry address 11070 20941+ USING T320,R12 declare code base register 011076 41B0 C022 11092 20942+ LA R11,T320L load loop target to R11 01107A 58F0 C098 11108 20943+ L R15,=A(SAVETST) R15 := current save area 01107E 50DF 0004 00004 20944+ ST R13,4(R15) set back pointer in current save area 011082 182D 20945+ LR R2,R13 remember callers save area 011084 18DF 20946+ LR R13,R15 setup current save area 011086 50D2 0008 00008 20947+ ST R13,8(R2) set forw pointer in callers save area 00000 20948+ USING TDSC,R1 declare TDSC base register 01108A 58F0 1008 00008 20949+ L R15,TLRCNT load local repeat count to R15 20950+* 20951 * 01108E 4120 C096 11106 20952 LA R2,T320R load target address 20953 T320L REPINS BALR,(R14,R2) repeat: BALR R14,R2 20954+* 20955+* build from sublist &ALIST a comma separated string &ARGS 20956+* 20957+* 20958+* 20959+* 20960+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 20961+* this allows to transfer the repeat count from last TDSCGEN call 20962+* PAGE 384 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 20963+* 11092 20964+T320L EQU * 20965+* 20966+* write a comment indicating what REPINS does (in case NOGEN in effect) 20967+* 20968+*,// REPINS: do 50 times: 20969+* 20970+* MNOTE requires that ' is doubled for expanded variables 20971+* thus build &MASTR as a copy of '&ARGS with ' doubled 20972+* 20973+* 20974+*,// BALR R14,R2 20975+* 20976+* finally generate code: &ICNT copies of &CODE &ARGS 20977+* 011092 05E2 20978+ BALR R14,R2 011094 05E2 20979+ BALR R14,R2 011096 05E2 20980+ BALR R14,R2 011098 05E2 20981+ BALR R14,R2 01109A 05E2 20982+ BALR R14,R2 01109C 05E2 20983+ BALR R14,R2 01109E 05E2 20984+ BALR R14,R2 0110A0 05E2 20985+ BALR R14,R2 0110A2 05E2 20986+ BALR R14,R2 0110A4 05E2 20987+ BALR R14,R2 0110A6 05E2 20988+ BALR R14,R2 0110A8 05E2 20989+ BALR R14,R2 0110AA 05E2 20990+ BALR R14,R2 0110AC 05E2 20991+ BALR R14,R2 0110AE 05E2 20992+ BALR R14,R2 0110B0 05E2 20993+ BALR R14,R2 0110B2 05E2 20994+ BALR R14,R2 0110B4 05E2 20995+ BALR R14,R2 0110B6 05E2 20996+ BALR R14,R2 0110B8 05E2 20997+ BALR R14,R2 0110BA 05E2 20998+ BALR R14,R2 0110BC 05E2 20999+ BALR R14,R2 0110BE 05E2 21000+ BALR R14,R2 0110C0 05E2 21001+ BALR R14,R2 0110C2 05E2 21002+ BALR R14,R2 0110C4 05E2 21003+ BALR R14,R2 0110C6 05E2 21004+ BALR R14,R2 0110C8 05E2 21005+ BALR R14,R2 0110CA 05E2 21006+ BALR R14,R2 0110CC 05E2 21007+ BALR R14,R2 0110CE 05E2 21008+ BALR R14,R2 0110D0 05E2 21009+ BALR R14,R2 0110D2 05E2 21010+ BALR R14,R2 0110D4 05E2 21011+ BALR R14,R2 0110D6 05E2 21012+ BALR R14,R2 0110D8 05E2 21013+ BALR R14,R2 0110DA 05E2 21014+ BALR R14,R2 0110DC 05E2 21015+ BALR R14,R2 0110DE 05E2 21016+ BALR R14,R2 0110E0 05E2 21017+ BALR R14,R2 PAGE 385 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0110E2 05E2 21018+ BALR R14,R2 0110E4 05E2 21019+ BALR R14,R2 0110E6 05E2 21020+ BALR R14,R2 0110E8 05E2 21021+ BALR R14,R2 0110EA 05E2 21022+ BALR R14,R2 0110EC 05E2 21023+ BALR R14,R2 0110EE 05E2 21024+ BALR R14,R2 0110F0 05E2 21025+ BALR R14,R2 0110F2 05E2 21026+ BALR R14,R2 0110F4 05E2 21027+ BALR R14,R2 21028+* 0110F6 06FB 21029 BCTR R15,R11 21030 TSIMRET 0110F8 58F0 C098 11108 21031+ L R15,=A(SAVETST) R15 := current save area 0110FC 58DF 0004 00004 21032+ L R13,4(R15) get old save area back 011100 98EC D00C 0000C 21033+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 011104 07FE 21034+ BR 14 RETURN 02000000 21035 * 011106 21036 DS 0H 011106 07FE 21037 T320R BR R14 21038 TSIMEND 011108 21039+ LTORG 011108 00000458 21040 =A(SAVETST) 1110C 21041+T320TEND EQU * 21042 * 21043 * Test 321 -- BALR R,R; BR R (far) ------------------------- 21044 * 21045 TSIMBEG T321,2500,50,1,C'BALR R,R; BR R (far)' 21046+* 003604 21047+TDSCDAT CSECT 003608 21048+ DS 0D 21049+* 003608 00011110 21050+T321TDSC DC A(T321) // TENTRY 00360C 000000A0 21051+ DC A(T321TEND-T321) // TLENGTH 003610 000009C4 21052+ DC F'2500' // TLRCNT 003614 00000032 21053+ DC F'50' // TIGCNT 003618 00000001 21054+ DC F'1' // TLTYPE 001875 21055+TEXT CSECT 001875 E3F3F2F1 21056+SPTR1829 DC C'T321' 00361C 21057+TDSCDAT CSECT 00361C 21058+ DS 0F 00361C 04001875 21059+ DC AL1(L'SPTR1829),AL3(SPTR1829) 001879 21060+TEXT CSECT 001879 C2C1D3D940D96BD9 21061+SPTR1830 DC C'BALR R,R; BR R (far)' 003620 21062+TDSCDAT CSECT 003620 21063+ DS 0F 003620 14001879 21064+ DC AL1(L'SPTR1830),AL3(SPTR1830) 21065+* 004BEC 21066+TDSCTBL CSECT 04BEC 21067+T321TPTR EQU * 004BEC 00003608 21068+ DC A(T321TDSC) enabled test 21069+* 01110C 21070+TCODE CSECT 011110 21071+ DS 0D ensure double word alignment for test 011110 21072+T321 DS 0H 01650000 PAGE 386 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 011110 90EC D00C 0000C 21073+ STM 14,12,12(13) SAVE REGISTERS 02950000 011114 18CF 21074+ LR R12,R15 base register := entry address 11110 21075+ USING T321,R12 declare code base register 011116 41B0 C022 11132 21076+ LA R11,T321L load loop target to R11 01111A 58F0 C098 111A8 21077+ L R15,=A(SAVETST) R15 := current save area 01111E 50DF 0004 00004 21078+ ST R13,4(R15) set back pointer in current save area 011122 182D 21079+ LR R2,R13 remember callers save area 011124 18DF 21080+ LR R13,R15 setup current save area 011126 50D2 0008 00008 21081+ ST R13,8(R2) set forw pointer in callers save area 00000 21082+ USING TDSC,R1 declare TDSC base register 01112A 58F0 1008 00008 21083+ L R15,TLRCNT load local repeat count to R15 21084+* 21085 * 01112E 5820 C09C 111AC 21086 L R2,=A(BR14FAR) load target address 21087 T321L REPINS BALR,(R14,R2) repeat: BALR R14,R2 21088+* 21089+* build from sublist &ALIST a comma separated string &ARGS 21090+* 21091+* 21092+* 21093+* 21094+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 21095+* this allows to transfer the repeat count from last TDSCGEN call 21096+* 21097+* 11132 21098+T321L EQU * 21099+* 21100+* write a comment indicating what REPINS does (in case NOGEN in effect) 21101+* 21102+*,// REPINS: do 50 times: 21103+* 21104+* MNOTE requires that ' is doubled for expanded variables 21105+* thus build &MASTR as a copy of '&ARGS with ' doubled 21106+* 21107+* 21108+*,// BALR R14,R2 21109+* 21110+* finally generate code: &ICNT copies of &CODE &ARGS 21111+* 011132 05E2 21112+ BALR R14,R2 011134 05E2 21113+ BALR R14,R2 011136 05E2 21114+ BALR R14,R2 011138 05E2 21115+ BALR R14,R2 01113A 05E2 21116+ BALR R14,R2 01113C 05E2 21117+ BALR R14,R2 01113E 05E2 21118+ BALR R14,R2 011140 05E2 21119+ BALR R14,R2 011142 05E2 21120+ BALR R14,R2 011144 05E2 21121+ BALR R14,R2 011146 05E2 21122+ BALR R14,R2 011148 05E2 21123+ BALR R14,R2 01114A 05E2 21124+ BALR R14,R2 01114C 05E2 21125+ BALR R14,R2 01114E 05E2 21126+ BALR R14,R2 011150 05E2 21127+ BALR R14,R2 PAGE 387 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 011152 05E2 21128+ BALR R14,R2 011154 05E2 21129+ BALR R14,R2 011156 05E2 21130+ BALR R14,R2 011158 05E2 21131+ BALR R14,R2 01115A 05E2 21132+ BALR R14,R2 01115C 05E2 21133+ BALR R14,R2 01115E 05E2 21134+ BALR R14,R2 011160 05E2 21135+ BALR R14,R2 011162 05E2 21136+ BALR R14,R2 011164 05E2 21137+ BALR R14,R2 011166 05E2 21138+ BALR R14,R2 011168 05E2 21139+ BALR R14,R2 01116A 05E2 21140+ BALR R14,R2 01116C 05E2 21141+ BALR R14,R2 01116E 05E2 21142+ BALR R14,R2 011170 05E2 21143+ BALR R14,R2 011172 05E2 21144+ BALR R14,R2 011174 05E2 21145+ BALR R14,R2 011176 05E2 21146+ BALR R14,R2 011178 05E2 21147+ BALR R14,R2 01117A 05E2 21148+ BALR R14,R2 01117C 05E2 21149+ BALR R14,R2 01117E 05E2 21150+ BALR R14,R2 011180 05E2 21151+ BALR R14,R2 011182 05E2 21152+ BALR R14,R2 011184 05E2 21153+ BALR R14,R2 011186 05E2 21154+ BALR R14,R2 011188 05E2 21155+ BALR R14,R2 01118A 05E2 21156+ BALR R14,R2 01118C 05E2 21157+ BALR R14,R2 01118E 05E2 21158+ BALR R14,R2 011190 05E2 21159+ BALR R14,R2 011192 05E2 21160+ BALR R14,R2 011194 05E2 21161+ BALR R14,R2 21162+* 011196 06FB 21163 BCTR R15,R11 21164 TSIMRET 011198 58F0 C098 111A8 21165+ L R15,=A(SAVETST) R15 := current save area 01119C 58DF 0004 00004 21166+ L R13,4(R15) get old save area back 0111A0 98EC D00C 0000C 21167+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0111A4 07FE 21168+ BR 14 RETURN 02000000 21169 TSIMEND 0111A8 21170+ LTORG 0111A8 00000458 21171 =A(SAVETST) 0111AC 000005D8 21172 =A(BR14FAR) 111B0 21173+T321TEND EQU * 21174 * 21175 * Test 322 -- BAL R,l; BR R -------------------------------- 21176 * 21177 TSIMBEG T322,7000,50,1,C'BAL R,l; BR R' 21178+* 003624 21179+TDSCDAT CSECT 003628 21180+ DS 0D 21181+* 003628 000111B0 21182+T322TDSC DC A(T322) // TENTRY PAGE 388 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00362C 000000FC 21183+ DC A(T322TEND-T322) // TLENGTH 003630 00001B58 21184+ DC F'7000' // TLRCNT 003634 00000032 21185+ DC F'50' // TIGCNT 003638 00000001 21186+ DC F'1' // TLTYPE 00188D 21187+TEXT CSECT 00188D E3F3F2F2 21188+SPTR1841 DC C'T322' 00363C 21189+TDSCDAT CSECT 00363C 21190+ DS 0F 00363C 0400188D 21191+ DC AL1(L'SPTR1841),AL3(SPTR1841) 001891 21192+TEXT CSECT 001891 C2C1D340D96B935E 21193+SPTR1842 DC C'BAL R,l; BR R' 003640 21194+TDSCDAT CSECT 003640 21195+ DS 0F 003640 0D001891 21196+ DC AL1(L'SPTR1842),AL3(SPTR1842) 21197+* 004BF0 21198+TDSCTBL CSECT 04BF0 21199+T322TPTR EQU * 004BF0 00003628 21200+ DC A(T322TDSC) enabled test 21201+* 0111B0 21202+TCODE CSECT 0111B0 21203+ DS 0D ensure double word alignment for test 0111B0 21204+T322 DS 0H 01650000 0111B0 90EC D00C 0000C 21205+ STM 14,12,12(13) SAVE REGISTERS 02950000 0111B4 18CF 21206+ LR R12,R15 base register := entry address 111B0 21207+ USING T322,R12 declare code base register 0111B6 41B0 C01E 111CE 21208+ LA R11,T322L load loop target to R11 0111BA 58F0 C0F8 112A8 21209+ L R15,=A(SAVETST) R15 := current save area 0111BE 50DF 0004 00004 21210+ ST R13,4(R15) set back pointer in current save area 0111C2 182D 21211+ LR R2,R13 remember callers save area 0111C4 18DF 21212+ LR R13,R15 setup current save area 0111C6 50D2 0008 00008 21213+ ST R13,8(R2) set forw pointer in callers save area 00000 21214+ USING TDSC,R1 declare TDSC base register 0111CA 58F0 1008 00008 21215+ L R15,TLRCNT load local repeat count to R15 21216+* 21217 * 21218 T322L REPINS BAL,(R14,T322R) repeat: BAL R14,T322R 21219+* 21220+* build from sublist &ALIST a comma separated string &ARGS 21221+* 21222+* 21223+* 21224+* 21225+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 21226+* this allows to transfer the repeat count from last TDSCGEN call 21227+* 21228+* 111CE 21229+T322L EQU * 21230+* 21231+* write a comment indicating what REPINS does (in case NOGEN in effect) 21232+* 21233+*,// REPINS: do 50 times: 21234+* 21235+* MNOTE requires that ' is doubled for expanded variables 21236+* thus build &MASTR as a copy of '&ARGS with ' doubled 21237+* PAGE 389 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 21238+* 21239+*,// BAL R14,T322R 21240+* 21241+* finally generate code: &ICNT copies of &CODE &ARGS 21242+* 0111CE 45E0 C0F6 112A6 21243+ BAL R14,T322R 0111D2 45E0 C0F6 112A6 21244+ BAL R14,T322R 0111D6 45E0 C0F6 112A6 21245+ BAL R14,T322R 0111DA 45E0 C0F6 112A6 21246+ BAL R14,T322R 0111DE 45E0 C0F6 112A6 21247+ BAL R14,T322R 0111E2 45E0 C0F6 112A6 21248+ BAL R14,T322R 0111E6 45E0 C0F6 112A6 21249+ BAL R14,T322R 0111EA 45E0 C0F6 112A6 21250+ BAL R14,T322R 0111EE 45E0 C0F6 112A6 21251+ BAL R14,T322R 0111F2 45E0 C0F6 112A6 21252+ BAL R14,T322R 0111F6 45E0 C0F6 112A6 21253+ BAL R14,T322R 0111FA 45E0 C0F6 112A6 21254+ BAL R14,T322R 0111FE 45E0 C0F6 112A6 21255+ BAL R14,T322R 011202 45E0 C0F6 112A6 21256+ BAL R14,T322R 011206 45E0 C0F6 112A6 21257+ BAL R14,T322R 01120A 45E0 C0F6 112A6 21258+ BAL R14,T322R 01120E 45E0 C0F6 112A6 21259+ BAL R14,T322R 011212 45E0 C0F6 112A6 21260+ BAL R14,T322R 011216 45E0 C0F6 112A6 21261+ BAL R14,T322R 01121A 45E0 C0F6 112A6 21262+ BAL R14,T322R 01121E 45E0 C0F6 112A6 21263+ BAL R14,T322R 011222 45E0 C0F6 112A6 21264+ BAL R14,T322R 011226 45E0 C0F6 112A6 21265+ BAL R14,T322R 01122A 45E0 C0F6 112A6 21266+ BAL R14,T322R 01122E 45E0 C0F6 112A6 21267+ BAL R14,T322R 011232 45E0 C0F6 112A6 21268+ BAL R14,T322R 011236 45E0 C0F6 112A6 21269+ BAL R14,T322R 01123A 45E0 C0F6 112A6 21270+ BAL R14,T322R 01123E 45E0 C0F6 112A6 21271+ BAL R14,T322R 011242 45E0 C0F6 112A6 21272+ BAL R14,T322R 011246 45E0 C0F6 112A6 21273+ BAL R14,T322R 01124A 45E0 C0F6 112A6 21274+ BAL R14,T322R 01124E 45E0 C0F6 112A6 21275+ BAL R14,T322R 011252 45E0 C0F6 112A6 21276+ BAL R14,T322R 011256 45E0 C0F6 112A6 21277+ BAL R14,T322R 01125A 45E0 C0F6 112A6 21278+ BAL R14,T322R 01125E 45E0 C0F6 112A6 21279+ BAL R14,T322R 011262 45E0 C0F6 112A6 21280+ BAL R14,T322R 011266 45E0 C0F6 112A6 21281+ BAL R14,T322R 01126A 45E0 C0F6 112A6 21282+ BAL R14,T322R 01126E 45E0 C0F6 112A6 21283+ BAL R14,T322R 011272 45E0 C0F6 112A6 21284+ BAL R14,T322R 011276 45E0 C0F6 112A6 21285+ BAL R14,T322R 01127A 45E0 C0F6 112A6 21286+ BAL R14,T322R 01127E 45E0 C0F6 112A6 21287+ BAL R14,T322R 011282 45E0 C0F6 112A6 21288+ BAL R14,T322R 011286 45E0 C0F6 112A6 21289+ BAL R14,T322R 01128A 45E0 C0F6 112A6 21290+ BAL R14,T322R 01128E 45E0 C0F6 112A6 21291+ BAL R14,T322R 011292 45E0 C0F6 112A6 21292+ BAL R14,T322R PAGE 390 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 21293+* 011296 06FB 21294 BCTR R15,R11 21295 TSIMRET 011298 58F0 C0F8 112A8 21296+ L R15,=A(SAVETST) R15 := current save area 01129C 58DF 0004 00004 21297+ L R13,4(R15) get old save area back 0112A0 98EC D00C 0000C 21298+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0112A4 07FE 21299+ BR 14 RETURN 02000000 21300 * 0112A6 21301 DS 0H 0112A6 07FE 21302 T322R BR R14 21303 TSIMEND 0112A8 21304+ LTORG 0112A8 00000458 21305 =A(SAVETST) 112AC 21306+T322TEND EQU * 21307 * 21308 * Test 323 -- BAL R,l; BR R (far) -------------------------- 21309 * 21310 TSIMBEG T323,3500,50,1,C'BAL R,l; BR R (far)' 21311+* 003644 21312+TDSCDAT CSECT 003648 21313+ DS 0D 21314+* 003648 000112B0 21315+T323TDSC DC A(T323) // TENTRY 00364C 00000108 21316+ DC A(T323TEND-T323) // TLENGTH 003650 00000DAC 21317+ DC F'3500' // TLRCNT 003654 00000032 21318+ DC F'50' // TIGCNT 003658 00000001 21319+ DC F'1' // TLTYPE 00189E 21320+TEXT CSECT 00189E E3F3F2F3 21321+SPTR1853 DC C'T323' 00365C 21322+TDSCDAT CSECT 00365C 21323+ DS 0F 00365C 0400189E 21324+ DC AL1(L'SPTR1853),AL3(SPTR1853) 0018A2 21325+TEXT CSECT 0018A2 C2C1D340D96B935E 21326+SPTR1854 DC C'BAL R,l; BR R (far)' 003660 21327+TDSCDAT CSECT 003660 21328+ DS 0F 003660 130018A2 21329+ DC AL1(L'SPTR1854),AL3(SPTR1854) 21330+* 004BF4 21331+TDSCTBL CSECT 04BF4 21332+T323TPTR EQU * 004BF4 00003648 21333+ DC A(T323TDSC) enabled test 21334+* 0112AC 21335+TCODE CSECT 0112B0 21336+ DS 0D ensure double word alignment for test 0112B0 21337+T323 DS 0H 01650000 0112B0 90EC D00C 0000C 21338+ STM 14,12,12(13) SAVE REGISTERS 02950000 0112B4 18CF 21339+ LR R12,R15 base register := entry address 112B0 21340+ USING T323,R12 declare code base register 0112B6 41B0 C022 112D2 21341+ LA R11,T323L load loop target to R11 0112BA 58F0 C100 113B0 21342+ L R15,=A(SAVETST) R15 := current save area 0112BE 50DF 0004 00004 21343+ ST R13,4(R15) set back pointer in current save area 0112C2 182D 21344+ LR R2,R13 remember callers save area 0112C4 18DF 21345+ LR R13,R15 setup current save area 0112C6 50D2 0008 00008 21346+ ST R13,8(R2) set forw pointer in callers save area 00000 21347+ USING TDSC,R1 declare TDSC base register PAGE 391 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0112CA 58F0 1008 00008 21348+ L R15,TLRCNT load local repeat count to R15 21349+* 21350 * 0112CE 5820 C104 113B4 21351 L R2,=A(BR14FAR) load target address 21352 T323L REPINS BAL,(R14,0(R2)) repeat: BAL R14,0(R2) 21353+* 21354+* build from sublist &ALIST a comma separated string &ARGS 21355+* 21356+* 21357+* 21358+* 21359+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 21360+* this allows to transfer the repeat count from last TDSCGEN call 21361+* 21362+* 112D2 21363+T323L EQU * 21364+* 21365+* write a comment indicating what REPINS does (in case NOGEN in effect) 21366+* 21367+*,// REPINS: do 50 times: 21368+* 21369+* MNOTE requires that ' is doubled for expanded variables 21370+* thus build &MASTR as a copy of '&ARGS with ' doubled 21371+* 21372+* 21373+*,// BAL R14,0(R2) 21374+* 21375+* finally generate code: &ICNT copies of &CODE &ARGS 21376+* 0112D2 45E2 0000 00000 21377+ BAL R14,0(R2) 0112D6 45E2 0000 00000 21378+ BAL R14,0(R2) 0112DA 45E2 0000 00000 21379+ BAL R14,0(R2) 0112DE 45E2 0000 00000 21380+ BAL R14,0(R2) 0112E2 45E2 0000 00000 21381+ BAL R14,0(R2) 0112E6 45E2 0000 00000 21382+ BAL R14,0(R2) 0112EA 45E2 0000 00000 21383+ BAL R14,0(R2) 0112EE 45E2 0000 00000 21384+ BAL R14,0(R2) 0112F2 45E2 0000 00000 21385+ BAL R14,0(R2) 0112F6 45E2 0000 00000 21386+ BAL R14,0(R2) 0112FA 45E2 0000 00000 21387+ BAL R14,0(R2) 0112FE 45E2 0000 00000 21388+ BAL R14,0(R2) 011302 45E2 0000 00000 21389+ BAL R14,0(R2) 011306 45E2 0000 00000 21390+ BAL R14,0(R2) 01130A 45E2 0000 00000 21391+ BAL R14,0(R2) 01130E 45E2 0000 00000 21392+ BAL R14,0(R2) 011312 45E2 0000 00000 21393+ BAL R14,0(R2) 011316 45E2 0000 00000 21394+ BAL R14,0(R2) 01131A 45E2 0000 00000 21395+ BAL R14,0(R2) 01131E 45E2 0000 00000 21396+ BAL R14,0(R2) 011322 45E2 0000 00000 21397+ BAL R14,0(R2) 011326 45E2 0000 00000 21398+ BAL R14,0(R2) 01132A 45E2 0000 00000 21399+ BAL R14,0(R2) 01132E 45E2 0000 00000 21400+ BAL R14,0(R2) 011332 45E2 0000 00000 21401+ BAL R14,0(R2) 011336 45E2 0000 00000 21402+ BAL R14,0(R2) PAGE 392 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01133A 45E2 0000 00000 21403+ BAL R14,0(R2) 01133E 45E2 0000 00000 21404+ BAL R14,0(R2) 011342 45E2 0000 00000 21405+ BAL R14,0(R2) 011346 45E2 0000 00000 21406+ BAL R14,0(R2) 01134A 45E2 0000 00000 21407+ BAL R14,0(R2) 01134E 45E2 0000 00000 21408+ BAL R14,0(R2) 011352 45E2 0000 00000 21409+ BAL R14,0(R2) 011356 45E2 0000 00000 21410+ BAL R14,0(R2) 01135A 45E2 0000 00000 21411+ BAL R14,0(R2) 01135E 45E2 0000 00000 21412+ BAL R14,0(R2) 011362 45E2 0000 00000 21413+ BAL R14,0(R2) 011366 45E2 0000 00000 21414+ BAL R14,0(R2) 01136A 45E2 0000 00000 21415+ BAL R14,0(R2) 01136E 45E2 0000 00000 21416+ BAL R14,0(R2) 011372 45E2 0000 00000 21417+ BAL R14,0(R2) 011376 45E2 0000 00000 21418+ BAL R14,0(R2) 01137A 45E2 0000 00000 21419+ BAL R14,0(R2) 01137E 45E2 0000 00000 21420+ BAL R14,0(R2) 011382 45E2 0000 00000 21421+ BAL R14,0(R2) 011386 45E2 0000 00000 21422+ BAL R14,0(R2) 01138A 45E2 0000 00000 21423+ BAL R14,0(R2) 01138E 45E2 0000 00000 21424+ BAL R14,0(R2) 011392 45E2 0000 00000 21425+ BAL R14,0(R2) 011396 45E2 0000 00000 21426+ BAL R14,0(R2) 21427+* 01139A 06FB 21428 BCTR R15,R11 21429 TSIMRET 01139C 58F0 C100 113B0 21430+ L R15,=A(SAVETST) R15 := current save area 0113A0 58DF 0004 00004 21431+ L R13,4(R15) get old save area back 0113A4 98EC D00C 0000C 21432+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0113A8 07FE 21433+ BR 14 RETURN 02000000 21434 TSIMEND 0113B0 21435+ LTORG 0113B0 00000458 21436 =A(SAVETST) 0113B4 000005D8 21437 =A(BR14FAR) 113B8 21438+T323TEND EQU * 21439 * 21440 * old IFOX versions don't handle BAS and BASR. That's why the next 21441 * two tests can be disabled by setting DISBAS to 1 in the preamble. 21442 * 21443 AIF (&DISBAS).DISBAS 21444 * 21445 * Test 324 -- BASR R,R; BR R ------------------------------- 21446 * 21447 TSIMBEG T324,8000,50,1,C'BASR R,R; BR R' 21448+* 003664 21449+TDSCDAT CSECT 003668 21450+ DS 0D 21451+* 003668 000113B8 21452+T324TDSC DC A(T324) // TENTRY 00366C 0000009C 21453+ DC A(T324TEND-T324) // TLENGTH 003670 00001F40 21454+ DC F'8000' // TLRCNT 003674 00000032 21455+ DC F'50' // TIGCNT 003678 00000001 21456+ DC F'1' // TLTYPE 0018B5 21457+TEXT CSECT PAGE 393 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0018B5 E3F3F2F4 21458+SPTR1865 DC C'T324' 00367C 21459+TDSCDAT CSECT 00367C 21460+ DS 0F 00367C 040018B5 21461+ DC AL1(L'SPTR1865),AL3(SPTR1865) 0018B9 21462+TEXT CSECT 0018B9 C2C1E2D940D96BD9 21463+SPTR1866 DC C'BASR R,R; BR R' 003680 21464+TDSCDAT CSECT 003680 21465+ DS 0F 003680 0E0018B9 21466+ DC AL1(L'SPTR1866),AL3(SPTR1866) 21467+* 004BF8 21468+TDSCTBL CSECT 04BF8 21469+T324TPTR EQU * 004BF8 00003668 21470+ DC A(T324TDSC) enabled test 21471+* 0113B8 21472+TCODE CSECT 0113B8 21473+ DS 0D ensure double word alignment for test 0113B8 21474+T324 DS 0H 01650000 0113B8 90EC D00C 0000C 21475+ STM 14,12,12(13) SAVE REGISTERS 02950000 0113BC 18CF 21476+ LR R12,R15 base register := entry address 113B8 21477+ USING T324,R12 declare code base register 0113BE 41B0 C022 113DA 21478+ LA R11,T324L load loop target to R11 0113C2 58F0 C098 11450 21479+ L R15,=A(SAVETST) R15 := current save area 0113C6 50DF 0004 00004 21480+ ST R13,4(R15) set back pointer in current save area 0113CA 182D 21481+ LR R2,R13 remember callers save area 0113CC 18DF 21482+ LR R13,R15 setup current save area 0113CE 50D2 0008 00008 21483+ ST R13,8(R2) set forw pointer in callers save area 00000 21484+ USING TDSC,R1 declare TDSC base register 0113D2 58F0 1008 00008 21485+ L R15,TLRCNT load local repeat count to R15 21486+* 21487 * 0113D6 4120 C096 1144E 21488 LA R2,T324R load target address 21489 T324L REPINS BASR,(R14,R2) repeat: BASR R14,R2 21490+* 21491+* build from sublist &ALIST a comma separated string &ARGS 21492+* 21493+* 21494+* 21495+* 21496+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 21497+* this allows to transfer the repeat count from last TDSCGEN call 21498+* 21499+* 113DA 21500+T324L EQU * 21501+* 21502+* write a comment indicating what REPINS does (in case NOGEN in effect) 21503+* 21504+*,// REPINS: do 50 times: 21505+* 21506+* MNOTE requires that ' is doubled for expanded variables 21507+* thus build &MASTR as a copy of '&ARGS with ' doubled 21508+* 21509+* 21510+*,// BASR R14,R2 21511+* 21512+* finally generate code: &ICNT copies of &CODE &ARGS PAGE 394 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 21513+* 0113DA 0DE2 21514+ BASR R14,R2 0113DC 0DE2 21515+ BASR R14,R2 0113DE 0DE2 21516+ BASR R14,R2 0113E0 0DE2 21517+ BASR R14,R2 0113E2 0DE2 21518+ BASR R14,R2 0113E4 0DE2 21519+ BASR R14,R2 0113E6 0DE2 21520+ BASR R14,R2 0113E8 0DE2 21521+ BASR R14,R2 0113EA 0DE2 21522+ BASR R14,R2 0113EC 0DE2 21523+ BASR R14,R2 0113EE 0DE2 21524+ BASR R14,R2 0113F0 0DE2 21525+ BASR R14,R2 0113F2 0DE2 21526+ BASR R14,R2 0113F4 0DE2 21527+ BASR R14,R2 0113F6 0DE2 21528+ BASR R14,R2 0113F8 0DE2 21529+ BASR R14,R2 0113FA 0DE2 21530+ BASR R14,R2 0113FC 0DE2 21531+ BASR R14,R2 0113FE 0DE2 21532+ BASR R14,R2 011400 0DE2 21533+ BASR R14,R2 011402 0DE2 21534+ BASR R14,R2 011404 0DE2 21535+ BASR R14,R2 011406 0DE2 21536+ BASR R14,R2 011408 0DE2 21537+ BASR R14,R2 01140A 0DE2 21538+ BASR R14,R2 01140C 0DE2 21539+ BASR R14,R2 01140E 0DE2 21540+ BASR R14,R2 011410 0DE2 21541+ BASR R14,R2 011412 0DE2 21542+ BASR R14,R2 011414 0DE2 21543+ BASR R14,R2 011416 0DE2 21544+ BASR R14,R2 011418 0DE2 21545+ BASR R14,R2 01141A 0DE2 21546+ BASR R14,R2 01141C 0DE2 21547+ BASR R14,R2 01141E 0DE2 21548+ BASR R14,R2 011420 0DE2 21549+ BASR R14,R2 011422 0DE2 21550+ BASR R14,R2 011424 0DE2 21551+ BASR R14,R2 011426 0DE2 21552+ BASR R14,R2 011428 0DE2 21553+ BASR R14,R2 01142A 0DE2 21554+ BASR R14,R2 01142C 0DE2 21555+ BASR R14,R2 01142E 0DE2 21556+ BASR R14,R2 011430 0DE2 21557+ BASR R14,R2 011432 0DE2 21558+ BASR R14,R2 011434 0DE2 21559+ BASR R14,R2 011436 0DE2 21560+ BASR R14,R2 011438 0DE2 21561+ BASR R14,R2 01143A 0DE2 21562+ BASR R14,R2 01143C 0DE2 21563+ BASR R14,R2 21564+* 01143E 06FB 21565 BCTR R15,R11 21566 TSIMRET 011440 58F0 C098 11450 21567+ L R15,=A(SAVETST) R15 := current save area PAGE 395 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 011444 58DF 0004 00004 21568+ L R13,4(R15) get old save area back 011448 98EC D00C 0000C 21569+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01144C 07FE 21570+ BR 14 RETURN 02000000 21571 * 01144E 21572 DS 0H 01144E 07FE 21573 T324R BR R14 21574 TSIMEND 011450 21575+ LTORG 011450 00000458 21576 =A(SAVETST) 11454 21577+T324TEND EQU * 21578 * 21579 * Test 325 -- BAS R,l; BR R -------------------------------- 21580 * 21581 TSIMBEG T325,7000,50,1,C'BAS R,l; BR R' 21582+* 003684 21583+TDSCDAT CSECT 003688 21584+ DS 0D 21585+* 003688 00011458 21586+T325TDSC DC A(T325) // TENTRY 00368C 000000FC 21587+ DC A(T325TEND-T325) // TLENGTH 003690 00001B58 21588+ DC F'7000' // TLRCNT 003694 00000032 21589+ DC F'50' // TIGCNT 003698 00000001 21590+ DC F'1' // TLTYPE 0018C7 21591+TEXT CSECT 0018C7 E3F3F2F5 21592+SPTR1877 DC C'T325' 00369C 21593+TDSCDAT CSECT 00369C 21594+ DS 0F 00369C 040018C7 21595+ DC AL1(L'SPTR1877),AL3(SPTR1877) 0018CB 21596+TEXT CSECT 0018CB C2C1E240D96B935E 21597+SPTR1878 DC C'BAS R,l; BR R' 0036A0 21598+TDSCDAT CSECT 0036A0 21599+ DS 0F 0036A0 0D0018CB 21600+ DC AL1(L'SPTR1878),AL3(SPTR1878) 21601+* 004BFC 21602+TDSCTBL CSECT 04BFC 21603+T325TPTR EQU * 004BFC 00003688 21604+ DC A(T325TDSC) enabled test 21605+* 011454 21606+TCODE CSECT 011458 21607+ DS 0D ensure double word alignment for test 011458 21608+T325 DS 0H 01650000 011458 90EC D00C 0000C 21609+ STM 14,12,12(13) SAVE REGISTERS 02950000 01145C 18CF 21610+ LR R12,R15 base register := entry address 11458 21611+ USING T325,R12 declare code base register 01145E 41B0 C01E 11476 21612+ LA R11,T325L load loop target to R11 011462 58F0 C0F8 11550 21613+ L R15,=A(SAVETST) R15 := current save area 011466 50DF 0004 00004 21614+ ST R13,4(R15) set back pointer in current save area 01146A 182D 21615+ LR R2,R13 remember callers save area 01146C 18DF 21616+ LR R13,R15 setup current save area 01146E 50D2 0008 00008 21617+ ST R13,8(R2) set forw pointer in callers save area 00000 21618+ USING TDSC,R1 declare TDSC base register 011472 58F0 1008 00008 21619+ L R15,TLRCNT load local repeat count to R15 21620+* 21621 * 21622 T325L REPINS BAS,(R14,T325R) repeat: BAS R14,T325R PAGE 396 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 21623+* 21624+* build from sublist &ALIST a comma separated string &ARGS 21625+* 21626+* 21627+* 21628+* 21629+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 21630+* this allows to transfer the repeat count from last TDSCGEN call 21631+* 21632+* 11476 21633+T325L EQU * 21634+* 21635+* write a comment indicating what REPINS does (in case NOGEN in effect) 21636+* 21637+*,// REPINS: do 50 times: 21638+* 21639+* MNOTE requires that ' is doubled for expanded variables 21640+* thus build &MASTR as a copy of '&ARGS with ' doubled 21641+* 21642+* 21643+*,// BAS R14,T325R 21644+* 21645+* finally generate code: &ICNT copies of &CODE &ARGS 21646+* 011476 4DE0 C0F6 1154E 21647+ BAS R14,T325R 01147A 4DE0 C0F6 1154E 21648+ BAS R14,T325R 01147E 4DE0 C0F6 1154E 21649+ BAS R14,T325R 011482 4DE0 C0F6 1154E 21650+ BAS R14,T325R 011486 4DE0 C0F6 1154E 21651+ BAS R14,T325R 01148A 4DE0 C0F6 1154E 21652+ BAS R14,T325R 01148E 4DE0 C0F6 1154E 21653+ BAS R14,T325R 011492 4DE0 C0F6 1154E 21654+ BAS R14,T325R 011496 4DE0 C0F6 1154E 21655+ BAS R14,T325R 01149A 4DE0 C0F6 1154E 21656+ BAS R14,T325R 01149E 4DE0 C0F6 1154E 21657+ BAS R14,T325R 0114A2 4DE0 C0F6 1154E 21658+ BAS R14,T325R 0114A6 4DE0 C0F6 1154E 21659+ BAS R14,T325R 0114AA 4DE0 C0F6 1154E 21660+ BAS R14,T325R 0114AE 4DE0 C0F6 1154E 21661+ BAS R14,T325R 0114B2 4DE0 C0F6 1154E 21662+ BAS R14,T325R 0114B6 4DE0 C0F6 1154E 21663+ BAS R14,T325R 0114BA 4DE0 C0F6 1154E 21664+ BAS R14,T325R 0114BE 4DE0 C0F6 1154E 21665+ BAS R14,T325R 0114C2 4DE0 C0F6 1154E 21666+ BAS R14,T325R 0114C6 4DE0 C0F6 1154E 21667+ BAS R14,T325R 0114CA 4DE0 C0F6 1154E 21668+ BAS R14,T325R 0114CE 4DE0 C0F6 1154E 21669+ BAS R14,T325R 0114D2 4DE0 C0F6 1154E 21670+ BAS R14,T325R 0114D6 4DE0 C0F6 1154E 21671+ BAS R14,T325R 0114DA 4DE0 C0F6 1154E 21672+ BAS R14,T325R 0114DE 4DE0 C0F6 1154E 21673+ BAS R14,T325R 0114E2 4DE0 C0F6 1154E 21674+ BAS R14,T325R 0114E6 4DE0 C0F6 1154E 21675+ BAS R14,T325R 0114EA 4DE0 C0F6 1154E 21676+ BAS R14,T325R 0114EE 4DE0 C0F6 1154E 21677+ BAS R14,T325R PAGE 397 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0114F2 4DE0 C0F6 1154E 21678+ BAS R14,T325R 0114F6 4DE0 C0F6 1154E 21679+ BAS R14,T325R 0114FA 4DE0 C0F6 1154E 21680+ BAS R14,T325R 0114FE 4DE0 C0F6 1154E 21681+ BAS R14,T325R 011502 4DE0 C0F6 1154E 21682+ BAS R14,T325R 011506 4DE0 C0F6 1154E 21683+ BAS R14,T325R 01150A 4DE0 C0F6 1154E 21684+ BAS R14,T325R 01150E 4DE0 C0F6 1154E 21685+ BAS R14,T325R 011512 4DE0 C0F6 1154E 21686+ BAS R14,T325R 011516 4DE0 C0F6 1154E 21687+ BAS R14,T325R 01151A 4DE0 C0F6 1154E 21688+ BAS R14,T325R 01151E 4DE0 C0F6 1154E 21689+ BAS R14,T325R 011522 4DE0 C0F6 1154E 21690+ BAS R14,T325R 011526 4DE0 C0F6 1154E 21691+ BAS R14,T325R 01152A 4DE0 C0F6 1154E 21692+ BAS R14,T325R 01152E 4DE0 C0F6 1154E 21693+ BAS R14,T325R 011532 4DE0 C0F6 1154E 21694+ BAS R14,T325R 011536 4DE0 C0F6 1154E 21695+ BAS R14,T325R 01153A 4DE0 C0F6 1154E 21696+ BAS R14,T325R 21697+* 01153E 06FB 21698 BCTR R15,R11 21699 TSIMRET 011540 58F0 C0F8 11550 21700+ L R15,=A(SAVETST) R15 := current save area 011544 58DF 0004 00004 21701+ L R13,4(R15) get old save area back 011548 98EC D00C 0000C 21702+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01154C 07FE 21703+ BR 14 RETURN 02000000 21704 * 01154E 21705 DS 0H 01154E 07FE 21706 T325R BR R14 21707 TSIMEND 011550 21708+ LTORG 011550 00000458 21709 =A(SAVETST) 11554 21710+T325TEND EQU * 21711 * 21712 .DISBAS ANOP 21713 * 21714 * Test 330 -- L;BALR;SAV;RET -------------------------------- 21715 * 21716 TSIMBEG T330,4500,10,1,C'L;BALR;SAV(14,12);RET' 21717+* 0036A4 21718+TDSCDAT CSECT 0036A8 21719+ DS 0D 21720+* 0036A8 00011558 21721+T330TDSC DC A(T330) // TENTRY 0036AC 00000078 21722+ DC A(T330TEND-T330) // TLENGTH 0036B0 00001194 21723+ DC F'4500' // TLRCNT 0036B4 0000000A 21724+ DC F'10' // TIGCNT 0036B8 00000001 21725+ DC F'1' // TLTYPE 0018D8 21726+TEXT CSECT 0018D8 E3F3F3F0 21727+SPTR1889 DC C'T330' 0036BC 21728+TDSCDAT CSECT 0036BC 21729+ DS 0F 0036BC 040018D8 21730+ DC AL1(L'SPTR1889),AL3(SPTR1889) 0018DC 21731+TEXT CSECT 0018DC D35EC2C1D3D95EE2 21732+SPTR1890 DC C'L;BALR;SAV(14,12);RET' PAGE 398 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0036C0 21733+TDSCDAT CSECT 0036C0 21734+ DS 0F 0036C0 150018DC 21735+ DC AL1(L'SPTR1890),AL3(SPTR1890) 21736+* 004C00 21737+TDSCTBL CSECT 04C00 21738+T330TPTR EQU * 004C00 000036A8 21739+ DC A(T330TDSC) enabled test 21740+* 011554 21741+TCODE CSECT 011558 21742+ DS 0D ensure double word alignment for test 011558 21743+T330 DS 0H 01650000 011558 90EC D00C 0000C 21744+ STM 14,12,12(13) SAVE REGISTERS 02950000 01155C 18CF 21745+ LR R12,R15 base register := entry address 11558 21746+ USING T330,R12 declare code base register 01155E 41B0 C020 11578 21747+ LA R11,T330L load loop target to R11 011562 58F0 C070 115C8 21748+ L R15,=A(SAVETST) R15 := current save area 011566 50DF 0004 00004 21749+ ST R13,4(R15) set back pointer in current save area 01156A 182D 21750+ LR R2,R13 remember callers save area 01156C 18DF 21751+ LR R13,R15 setup current save area 01156E 50D2 0008 00008 21752+ ST R13,8(R2) set forw pointer in callers save area 00000 21753+ USING TDSC,R1 declare TDSC base register 011572 58F0 1008 00008 21754+ L R15,TLRCNT load local repeat count to R15 21755+* 21756 * 21757 * use sequence 21758 * L R15,=A(T330R) load target addres 21759 * BALR R14,R15 and call it 21760 * 011576 18AF 21761 LR R10,R15 use R10 as repeat count 21762 T330L REPINSN L,(R15,=A(T330R)),BALR,(R14,R15) 21763+* 21764+* build from sublist &ALIST* a comma separated string &ARGS* 21765+* 21766+* 21767+* 21768+* 21769+* 21770+* 11578 21771+T330L EQU * 21772+* 21773+* 21774+* write a comment indicating what REPINSN does (if NOGEN in effect) 21775+* 21776+*,// REPINSN: do 10 times: 21777+* 21778+* MNOTE requires that ' is doubled for expanded variables 21779+* thus build &MASTR as a copy of '&ARGS with ' doubled 21780+* 21781+* 21782+*,// L R15,=A(T330R) 21783+* 21784+* MNOTE requires that ' is doubled for expanded variables 21785+* thus build &MASTR as a copy of '&ARGS with ' doubled 21786+* 21787+* PAGE 399 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 21788+*,// BALR R14,R15 21789+* 21790+* finally generate code: &ICNT copies of &CO1 ... 21791+* 011578 58F0 C074 115CC 21792+ L R15,=A(T330R) 01157C 05EF 21793+ BALR R14,R15 01157E 58F0 C074 115CC 21794+ L R15,=A(T330R) 011582 05EF 21795+ BALR R14,R15 011584 58F0 C074 115CC 21796+ L R15,=A(T330R) 011588 05EF 21797+ BALR R14,R15 01158A 58F0 C074 115CC 21798+ L R15,=A(T330R) 01158E 05EF 21799+ BALR R14,R15 011590 58F0 C074 115CC 21800+ L R15,=A(T330R) 011594 05EF 21801+ BALR R14,R15 011596 58F0 C074 115CC 21802+ L R15,=A(T330R) 01159A 05EF 21803+ BALR R14,R15 01159C 58F0 C074 115CC 21804+ L R15,=A(T330R) 0115A0 05EF 21805+ BALR R14,R15 0115A2 58F0 C074 115CC 21806+ L R15,=A(T330R) 0115A6 05EF 21807+ BALR R14,R15 0115A8 58F0 C074 115CC 21808+ L R15,=A(T330R) 0115AC 05EF 21809+ BALR R14,R15 0115AE 58F0 C074 115CC 21810+ L R15,=A(T330R) 0115B2 05EF 21811+ BALR R14,R15 21812+* 0115B4 06AB 21813 BCTR R10,R11 21814 TSIMRET 0115B6 58F0 C070 115C8 21815+ L R15,=A(SAVETST) R15 := current save area 0115BA 58DF 0004 00004 21816+ L R13,4(R15) get old save area back 0115BE 98EC D00C 0000C 21817+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0115C2 07FE 21818+ BR 14 RETURN 02000000 21819 TSIMEND 0115C8 21820+ LTORG 0115C8 00000458 21821 =A(SAVETST) 0115CC 00018048 21822 =A(T330R) 115D0 21823+T330TEND EQU * 21824 * 018048 21825 T330CS CSECT call target in separate CSECT 21826 T330R SAVE (14,12) Save input registers 018048 21827+T330R DS 0H 01650000 018048 90EC D00C 0000C 21828+ STM 14,12,12(13) SAVE REGISTERS 02950000 01804C 18CF 21829 LR R12,R15 base register := entry address 18048 21830 USING T330R,R12 declare base register 01804E 50D0 C024 1806C 21831 ST R13,T330SAV+4 set back pointer in current save area 018052 182D 21832 LR R2,R13 remember callers save area 018054 41D0 C020 18068 21833 LA R13,T330SAV setup current save area 018058 50D2 0008 00008 21834 ST R13,8(R2) set forw pointer in callers save area 21835 * <-- empty body of procedure 01805C 58D0 C024 1806C 21836 L R13,T330SAV+4 get old save area back 21837 RETURN (14,12) return to OS (will setup RC) 018060 98EC D00C 0000C 21838+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 018064 07FE 21839+ BR 14 RETURN 02000000 21840 DROP R12 21841 * 018068 21842 T330SAV DS 18F save area (for T330R) PAGE 400 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 21843 * 21844 * Test 4xx -- packed/decimal ==================================== 21845 * 21846 * Test 40x -- convert/pack/unpack ========================== 21847 * 21848 * Test 400 -- CVB R,m -------------------------------------- 21849 * 21850 TSIMBEG T400,2500,50,1,C'CVB R,m' 21851+* 0036C4 21852+TDSCDAT CSECT 0036C8 21853+ DS 0D 21854+* 0036C8 000115D0 21855+T400TDSC DC A(T400) // TENTRY 0036CC 00000104 21856+ DC A(T400TEND-T400) // TLENGTH 0036D0 000009C4 21857+ DC F'2500' // TLRCNT 0036D4 00000032 21858+ DC F'50' // TIGCNT 0036D8 00000001 21859+ DC F'1' // TLTYPE 0018F1 21860+TEXT CSECT 0018F1 E3F4F0F0 21861+SPTR1905 DC C'T400' 0036DC 21862+TDSCDAT CSECT 0036DC 21863+ DS 0F 0036DC 040018F1 21864+ DC AL1(L'SPTR1905),AL3(SPTR1905) 0018F5 21865+TEXT CSECT 0018F5 C3E5C240D96B94 21866+SPTR1906 DC C'CVB R,m' 0036E0 21867+TDSCDAT CSECT 0036E0 21868+ DS 0F 0036E0 070018F5 21869+ DC AL1(L'SPTR1906),AL3(SPTR1906) 21870+* 004C04 21871+TDSCTBL CSECT 04C04 21872+T400TPTR EQU * 004C04 000036C8 21873+ DC A(T400TDSC) enabled test 21874+* 0115D0 21875+TCODE CSECT 0115D0 21876+ DS 0D ensure double word alignment for test 0115D0 21877+T400 DS 0H 01650000 0115D0 90EC D00C 0000C 21878+ STM 14,12,12(13) SAVE REGISTERS 02950000 0115D4 18CF 21879+ LR R12,R15 base register := entry address 115D0 21880+ USING T400,R12 declare code base register 0115D6 41B0 C01E 115EE 21881+ LA R11,T400L load loop target to R11 0115DA 58F0 C100 116D0 21882+ L R15,=A(SAVETST) R15 := current save area 0115DE 50DF 0004 00004 21883+ ST R13,4(R15) set back pointer in current save area 0115E2 182D 21884+ LR R2,R13 remember callers save area 0115E4 18DF 21885+ LR R13,R15 setup current save area 0115E6 50D2 0008 00008 21886+ ST R13,8(R2) set forw pointer in callers save area 00000 21887+ USING TDSC,R1 declare TDSC base register 0115EA 58F0 1008 00008 21888+ L R15,TLRCNT load local repeat count to R15 21889+* 21890 * 21891 T400L REPINS CVB,(R2,T400V) repeat: CVB R2,T400V 21892+* 21893+* build from sublist &ALIST a comma separated string &ARGS 21894+* 21895+* 21896+* 21897+* PAGE 401 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 21898+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 21899+* this allows to transfer the repeat count from last TDSCGEN call 21900+* 21901+* 115EE 21902+T400L EQU * 21903+* 21904+* write a comment indicating what REPINS does (in case NOGEN in effect) 21905+* 21906+*,// REPINS: do 50 times: 21907+* 21908+* MNOTE requires that ' is doubled for expanded variables 21909+* thus build &MASTR as a copy of '&ARGS with ' doubled 21910+* 21911+* 21912+*,// CVB R2,T400V 21913+* 21914+* finally generate code: &ICNT copies of &CODE &ARGS 21915+* 0115EE 4F20 C0F8 116C8 21916+ CVB R2,T400V 0115F2 4F20 C0F8 116C8 21917+ CVB R2,T400V 0115F6 4F20 C0F8 116C8 21918+ CVB R2,T400V 0115FA 4F20 C0F8 116C8 21919+ CVB R2,T400V 0115FE 4F20 C0F8 116C8 21920+ CVB R2,T400V 011602 4F20 C0F8 116C8 21921+ CVB R2,T400V 011606 4F20 C0F8 116C8 21922+ CVB R2,T400V 01160A 4F20 C0F8 116C8 21923+ CVB R2,T400V 01160E 4F20 C0F8 116C8 21924+ CVB R2,T400V 011612 4F20 C0F8 116C8 21925+ CVB R2,T400V 011616 4F20 C0F8 116C8 21926+ CVB R2,T400V 01161A 4F20 C0F8 116C8 21927+ CVB R2,T400V 01161E 4F20 C0F8 116C8 21928+ CVB R2,T400V 011622 4F20 C0F8 116C8 21929+ CVB R2,T400V 011626 4F20 C0F8 116C8 21930+ CVB R2,T400V 01162A 4F20 C0F8 116C8 21931+ CVB R2,T400V 01162E 4F20 C0F8 116C8 21932+ CVB R2,T400V 011632 4F20 C0F8 116C8 21933+ CVB R2,T400V 011636 4F20 C0F8 116C8 21934+ CVB R2,T400V 01163A 4F20 C0F8 116C8 21935+ CVB R2,T400V 01163E 4F20 C0F8 116C8 21936+ CVB R2,T400V 011642 4F20 C0F8 116C8 21937+ CVB R2,T400V 011646 4F20 C0F8 116C8 21938+ CVB R2,T400V 01164A 4F20 C0F8 116C8 21939+ CVB R2,T400V 01164E 4F20 C0F8 116C8 21940+ CVB R2,T400V 011652 4F20 C0F8 116C8 21941+ CVB R2,T400V 011656 4F20 C0F8 116C8 21942+ CVB R2,T400V 01165A 4F20 C0F8 116C8 21943+ CVB R2,T400V 01165E 4F20 C0F8 116C8 21944+ CVB R2,T400V 011662 4F20 C0F8 116C8 21945+ CVB R2,T400V 011666 4F20 C0F8 116C8 21946+ CVB R2,T400V 01166A 4F20 C0F8 116C8 21947+ CVB R2,T400V 01166E 4F20 C0F8 116C8 21948+ CVB R2,T400V 011672 4F20 C0F8 116C8 21949+ CVB R2,T400V 011676 4F20 C0F8 116C8 21950+ CVB R2,T400V 01167A 4F20 C0F8 116C8 21951+ CVB R2,T400V 01167E 4F20 C0F8 116C8 21952+ CVB R2,T400V PAGE 402 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 011682 4F20 C0F8 116C8 21953+ CVB R2,T400V 011686 4F20 C0F8 116C8 21954+ CVB R2,T400V 01168A 4F20 C0F8 116C8 21955+ CVB R2,T400V 01168E 4F20 C0F8 116C8 21956+ CVB R2,T400V 011692 4F20 C0F8 116C8 21957+ CVB R2,T400V 011696 4F20 C0F8 116C8 21958+ CVB R2,T400V 01169A 4F20 C0F8 116C8 21959+ CVB R2,T400V 01169E 4F20 C0F8 116C8 21960+ CVB R2,T400V 0116A2 4F20 C0F8 116C8 21961+ CVB R2,T400V 0116A6 4F20 C0F8 116C8 21962+ CVB R2,T400V 0116AA 4F20 C0F8 116C8 21963+ CVB R2,T400V 0116AE 4F20 C0F8 116C8 21964+ CVB R2,T400V 0116B2 4F20 C0F8 116C8 21965+ CVB R2,T400V 21966+* 0116B6 06FB 21967 BCTR R15,R11 21968 TSIMRET 0116B8 58F0 C100 116D0 21969+ L R15,=A(SAVETST) R15 := current save area 0116BC 58DF 0004 00004 21970+ L R13,4(R15) get old save area back 0116C0 98EC D00C 0000C 21971+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0116C4 07FE 21972+ BR 14 RETURN 02000000 21973 * 0116C8 21974 DS 0D 0116C8 000001234567890C 21975 T400V DC PL8'1234567890' 21976 TSIMEND 0116D0 21977+ LTORG 0116D0 00000458 21978 =A(SAVETST) 116D4 21979+T400TEND EQU * 21980 * 21981 * Test 401 -- CVD R,m -------------------------------------- 21982 * 21983 TSIMBEG T401,2500,50,1,C'CVD R,m' 21984+* 0036E4 21985+TDSCDAT CSECT 0036E8 21986+ DS 0D 21987+* 0036E8 000116D8 21988+T401TDSC DC A(T401) // TENTRY 0036EC 00000110 21989+ DC A(T401TEND-T401) // TLENGTH 0036F0 000009C4 21990+ DC F'2500' // TLRCNT 0036F4 00000032 21991+ DC F'50' // TIGCNT 0036F8 00000001 21992+ DC F'1' // TLTYPE 0018FC 21993+TEXT CSECT 0018FC E3F4F0F1 21994+SPTR1917 DC C'T401' 0036FC 21995+TDSCDAT CSECT 0036FC 21996+ DS 0F 0036FC 040018FC 21997+ DC AL1(L'SPTR1917),AL3(SPTR1917) 001900 21998+TEXT CSECT 001900 C3E5C440D96B94 21999+SPTR1918 DC C'CVD R,m' 003700 22000+TDSCDAT CSECT 003700 22001+ DS 0F 003700 07001900 22002+ DC AL1(L'SPTR1918),AL3(SPTR1918) 22003+* 004C08 22004+TDSCTBL CSECT 04C08 22005+T401TPTR EQU * 004C08 000036E8 22006+ DC A(T401TDSC) enabled test 22007+* PAGE 403 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0116D4 22008+TCODE CSECT 0116D8 22009+ DS 0D ensure double word alignment for test 0116D8 22010+T401 DS 0H 01650000 0116D8 90EC D00C 0000C 22011+ STM 14,12,12(13) SAVE REGISTERS 02950000 0116DC 18CF 22012+ LR R12,R15 base register := entry address 116D8 22013+ USING T401,R12 declare code base register 0116DE 41B0 C022 116FA 22014+ LA R11,T401L load loop target to R11 0116E2 58F0 C108 117E0 22015+ L R15,=A(SAVETST) R15 := current save area 0116E6 50DF 0004 00004 22016+ ST R13,4(R15) set back pointer in current save area 0116EA 182D 22017+ LR R2,R13 remember callers save area 0116EC 18DF 22018+ LR R13,R15 setup current save area 0116EE 50D2 0008 00008 22019+ ST R13,8(R2) set forw pointer in callers save area 00000 22020+ USING TDSC,R1 declare TDSC base register 0116F2 58F0 1008 00008 22021+ L R15,TLRCNT load local repeat count to R15 22022+* 22023 * 0116F6 5820 C10C 117E4 22024 L R2,=F'123456789' 22025 T401L REPINS CVD,(R2,T401V) repeat: CVD R2,T401V 22026+* 22027+* build from sublist &ALIST a comma separated string &ARGS 22028+* 22029+* 22030+* 22031+* 22032+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 22033+* this allows to transfer the repeat count from last TDSCGEN call 22034+* 22035+* 116FA 22036+T401L EQU * 22037+* 22038+* write a comment indicating what REPINS does (in case NOGEN in effect) 22039+* 22040+*,// REPINS: do 50 times: 22041+* 22042+* MNOTE requires that ' is doubled for expanded variables 22043+* thus build &MASTR as a copy of '&ARGS with ' doubled 22044+* 22045+* 22046+*,// CVD R2,T401V 22047+* 22048+* finally generate code: &ICNT copies of &CODE &ARGS 22049+* 0116FA 4E20 C100 117D8 22050+ CVD R2,T401V 0116FE 4E20 C100 117D8 22051+ CVD R2,T401V 011702 4E20 C100 117D8 22052+ CVD R2,T401V 011706 4E20 C100 117D8 22053+ CVD R2,T401V 01170A 4E20 C100 117D8 22054+ CVD R2,T401V 01170E 4E20 C100 117D8 22055+ CVD R2,T401V 011712 4E20 C100 117D8 22056+ CVD R2,T401V 011716 4E20 C100 117D8 22057+ CVD R2,T401V 01171A 4E20 C100 117D8 22058+ CVD R2,T401V 01171E 4E20 C100 117D8 22059+ CVD R2,T401V 011722 4E20 C100 117D8 22060+ CVD R2,T401V 011726 4E20 C100 117D8 22061+ CVD R2,T401V 01172A 4E20 C100 117D8 22062+ CVD R2,T401V PAGE 404 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01172E 4E20 C100 117D8 22063+ CVD R2,T401V 011732 4E20 C100 117D8 22064+ CVD R2,T401V 011736 4E20 C100 117D8 22065+ CVD R2,T401V 01173A 4E20 C100 117D8 22066+ CVD R2,T401V 01173E 4E20 C100 117D8 22067+ CVD R2,T401V 011742 4E20 C100 117D8 22068+ CVD R2,T401V 011746 4E20 C100 117D8 22069+ CVD R2,T401V 01174A 4E20 C100 117D8 22070+ CVD R2,T401V 01174E 4E20 C100 117D8 22071+ CVD R2,T401V 011752 4E20 C100 117D8 22072+ CVD R2,T401V 011756 4E20 C100 117D8 22073+ CVD R2,T401V 01175A 4E20 C100 117D8 22074+ CVD R2,T401V 01175E 4E20 C100 117D8 22075+ CVD R2,T401V 011762 4E20 C100 117D8 22076+ CVD R2,T401V 011766 4E20 C100 117D8 22077+ CVD R2,T401V 01176A 4E20 C100 117D8 22078+ CVD R2,T401V 01176E 4E20 C100 117D8 22079+ CVD R2,T401V 011772 4E20 C100 117D8 22080+ CVD R2,T401V 011776 4E20 C100 117D8 22081+ CVD R2,T401V 01177A 4E20 C100 117D8 22082+ CVD R2,T401V 01177E 4E20 C100 117D8 22083+ CVD R2,T401V 011782 4E20 C100 117D8 22084+ CVD R2,T401V 011786 4E20 C100 117D8 22085+ CVD R2,T401V 01178A 4E20 C100 117D8 22086+ CVD R2,T401V 01178E 4E20 C100 117D8 22087+ CVD R2,T401V 011792 4E20 C100 117D8 22088+ CVD R2,T401V 011796 4E20 C100 117D8 22089+ CVD R2,T401V 01179A 4E20 C100 117D8 22090+ CVD R2,T401V 01179E 4E20 C100 117D8 22091+ CVD R2,T401V 0117A2 4E20 C100 117D8 22092+ CVD R2,T401V 0117A6 4E20 C100 117D8 22093+ CVD R2,T401V 0117AA 4E20 C100 117D8 22094+ CVD R2,T401V 0117AE 4E20 C100 117D8 22095+ CVD R2,T401V 0117B2 4E20 C100 117D8 22096+ CVD R2,T401V 0117B6 4E20 C100 117D8 22097+ CVD R2,T401V 0117BA 4E20 C100 117D8 22098+ CVD R2,T401V 0117BE 4E20 C100 117D8 22099+ CVD R2,T401V 22100+* 0117C2 06FB 22101 BCTR R15,R11 22102 TSIMRET 0117C4 58F0 C108 117E0 22103+ L R15,=A(SAVETST) R15 := current save area 0117C8 58DF 0004 00004 22104+ L R13,4(R15) get old save area back 0117CC 98EC D00C 0000C 22105+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0117D0 07FE 22106+ BR 14 RETURN 02000000 22107 * 0117D8 22108 T401V DS 1D allocate 8 bytes aligned 22109 TSIMEND 0117E0 22110+ LTORG 0117E0 00000458 22111 =A(SAVETST) 0117E4 075BCD15 22112 =F'123456789' 117E8 22113+T401TEND EQU * 22114 * 22115 * Test 402 -- PACK m,m (5d) -------------------------------- 22116 * 22117 TSIMBEG T402,6000,20,1,C'PACK m,m (5d)' PAGE 405 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 22118+* 003704 22119+TDSCDAT CSECT 003708 22120+ DS 0D 22121+* 003708 000117E8 22122+T402TDSC DC A(T402) // TENTRY 00370C 000000B4 22123+ DC A(T402TEND-T402) // TLENGTH 003710 00001770 22124+ DC F'6000' // TLRCNT 003714 00000014 22125+ DC F'20' // TIGCNT 003718 00000001 22126+ DC F'1' // TLTYPE 001907 22127+TEXT CSECT 001907 E3F4F0F2 22128+SPTR1929 DC C'T402' 00371C 22129+TDSCDAT CSECT 00371C 22130+ DS 0F 00371C 04001907 22131+ DC AL1(L'SPTR1929),AL3(SPTR1929) 00190B 22132+TEXT CSECT 00190B D7C1C3D240946B94 22133+SPTR1930 DC C'PACK m,m (5d)' 003720 22134+TDSCDAT CSECT 003720 22135+ DS 0F 003720 0D00190B 22136+ DC AL1(L'SPTR1930),AL3(SPTR1930) 22137+* 004C0C 22138+TDSCTBL CSECT 04C0C 22139+T402TPTR EQU * 004C0C 00003708 22140+ DC A(T402TDSC) enabled test 22141+* 0117E8 22142+TCODE CSECT 0117E8 22143+ DS 0D ensure double word alignment for test 0117E8 22144+T402 DS 0H 01650000 0117E8 90EC D00C 0000C 22145+ STM 14,12,12(13) SAVE REGISTERS 02950000 0117EC 18CF 22146+ LR R12,R15 base register := entry address 117E8 22147+ USING T402,R12 declare code base register 0117EE 41B0 C01E 11806 22148+ LA R11,T402L load loop target to R11 0117F2 58F0 C0B0 11898 22149+ L R15,=A(SAVETST) R15 := current save area 0117F6 50DF 0004 00004 22150+ ST R13,4(R15) set back pointer in current save area 0117FA 182D 22151+ LR R2,R13 remember callers save area 0117FC 18DF 22152+ LR R13,R15 setup current save area 0117FE 50D2 0008 00008 22153+ ST R13,8(R2) set forw pointer in callers save area 00000 22154+ USING TDSC,R1 declare TDSC base register 011802 58F0 1008 00008 22155+ L R15,TLRCNT load local repeat count to R15 22156+* 22157 * 22158 T402L REPINS PACK,(T402V1,T402V2) repeat: PACK T402V1,T402V2 22159+* 22160+* build from sublist &ALIST a comma separated string &ARGS 22161+* 22162+* 22163+* 22164+* 22165+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 22166+* this allows to transfer the repeat count from last TDSCGEN call 22167+* 22168+* 11806 22169+T402L EQU * 22170+* 22171+* write a comment indicating what REPINS does (in case NOGEN in effect) 22172+* PAGE 406 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 22173+*,// REPINS: do 20 times: 22174+* 22175+* MNOTE requires that ' is doubled for expanded variables 22176+* thus build &MASTR as a copy of '&ARGS with ' doubled 22177+* 22178+* 22179+*,// PACK T402V1,T402V2 22180+* 22181+* finally generate code: &ICNT copies of &CODE &ARGS 22182+* 011806 F225 C0A6 C0A9 1188E 11891 22183+ PACK T402V1,T402V2 01180C F225 C0A6 C0A9 1188E 11891 22184+ PACK T402V1,T402V2 011812 F225 C0A6 C0A9 1188E 11891 22185+ PACK T402V1,T402V2 011818 F225 C0A6 C0A9 1188E 11891 22186+ PACK T402V1,T402V2 01181E F225 C0A6 C0A9 1188E 11891 22187+ PACK T402V1,T402V2 011824 F225 C0A6 C0A9 1188E 11891 22188+ PACK T402V1,T402V2 01182A F225 C0A6 C0A9 1188E 11891 22189+ PACK T402V1,T402V2 011830 F225 C0A6 C0A9 1188E 11891 22190+ PACK T402V1,T402V2 011836 F225 C0A6 C0A9 1188E 11891 22191+ PACK T402V1,T402V2 01183C F225 C0A6 C0A9 1188E 11891 22192+ PACK T402V1,T402V2 011842 F225 C0A6 C0A9 1188E 11891 22193+ PACK T402V1,T402V2 011848 F225 C0A6 C0A9 1188E 11891 22194+ PACK T402V1,T402V2 01184E F225 C0A6 C0A9 1188E 11891 22195+ PACK T402V1,T402V2 011854 F225 C0A6 C0A9 1188E 11891 22196+ PACK T402V1,T402V2 01185A F225 C0A6 C0A9 1188E 11891 22197+ PACK T402V1,T402V2 011860 F225 C0A6 C0A9 1188E 11891 22198+ PACK T402V1,T402V2 011866 F225 C0A6 C0A9 1188E 11891 22199+ PACK T402V1,T402V2 01186C F225 C0A6 C0A9 1188E 11891 22200+ PACK T402V1,T402V2 011872 F225 C0A6 C0A9 1188E 11891 22201+ PACK T402V1,T402V2 011878 F225 C0A6 C0A9 1188E 11891 22202+ PACK T402V1,T402V2 22203+* 01187E 06FB 22204 BCTR R15,R11 22205 TSIMRET 011880 58F0 C0B0 11898 22206+ L R15,=A(SAVETST) R15 := current save area 011884 58DF 0004 00004 22207+ L R13,4(R15) get old save area back 011888 98EC D00C 0000C 22208+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01188C 07FE 22209+ BR 14 RETURN 02000000 22210 * 01188E 00000C 22211 T402V1 DC PL3'0' 011891 F0F1F2F3F4C5 22212 T402V2 DC ZL6'12345' 22213 TSIMEND 011898 22214+ LTORG 011898 00000458 22215 =A(SAVETST) 1189C 22216+T402TEND EQU * 22217 * 22218 * Test 403 -- PACK m,m (15d) ------------------------------- 22219 * 22220 TSIMBEG T403,2500,20,1,C'PACK m,m (15d)' 22221+* 003724 22222+TDSCDAT CSECT 003728 22223+ DS 0D 22224+* 003728 000118A0 22225+T403TDSC DC A(T403) // TENTRY 00372C 000000C4 22226+ DC A(T403TEND-T403) // TLENGTH 003730 000009C4 22227+ DC F'2500' // TLRCNT PAGE 407 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003734 00000014 22228+ DC F'20' // TIGCNT 003738 00000001 22229+ DC F'1' // TLTYPE 001918 22230+TEXT CSECT 001918 E3F4F0F3 22231+SPTR1941 DC C'T403' 00373C 22232+TDSCDAT CSECT 00373C 22233+ DS 0F 00373C 04001918 22234+ DC AL1(L'SPTR1941),AL3(SPTR1941) 00191C 22235+TEXT CSECT 00191C D7C1C3D240946B94 22236+SPTR1942 DC C'PACK m,m (15d)' 003740 22237+TDSCDAT CSECT 003740 22238+ DS 0F 003740 0E00191C 22239+ DC AL1(L'SPTR1942),AL3(SPTR1942) 22240+* 004C10 22241+TDSCTBL CSECT 04C10 22242+T403TPTR EQU * 004C10 00003728 22243+ DC A(T403TDSC) enabled test 22244+* 01189C 22245+TCODE CSECT 0118A0 22246+ DS 0D ensure double word alignment for test 0118A0 22247+T403 DS 0H 01650000 0118A0 90EC D00C 0000C 22248+ STM 14,12,12(13) SAVE REGISTERS 02950000 0118A4 18CF 22249+ LR R12,R15 base register := entry address 118A0 22250+ USING T403,R12 declare code base register 0118A6 41B0 C01E 118BE 22251+ LA R11,T403L load loop target to R11 0118AA 58F0 C0C0 11960 22252+ L R15,=A(SAVETST) R15 := current save area 0118AE 50DF 0004 00004 22253+ ST R13,4(R15) set back pointer in current save area 0118B2 182D 22254+ LR R2,R13 remember callers save area 0118B4 18DF 22255+ LR R13,R15 setup current save area 0118B6 50D2 0008 00008 22256+ ST R13,8(R2) set forw pointer in callers save area 00000 22257+ USING TDSC,R1 declare TDSC base register 0118BA 58F0 1008 00008 22258+ L R15,TLRCNT load local repeat count to R15 22259+* 22260 * 22261 T403L REPINS PACK,(T403V1,T403V2) repeat: PACK T403V1,T403V2 22262+* 22263+* build from sublist &ALIST a comma separated string &ARGS 22264+* 22265+* 22266+* 22267+* 22268+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 22269+* this allows to transfer the repeat count from last TDSCGEN call 22270+* 22271+* 118BE 22272+T403L EQU * 22273+* 22274+* write a comment indicating what REPINS does (in case NOGEN in effect) 22275+* 22276+*,// REPINS: do 20 times: 22277+* 22278+* MNOTE requires that ' is doubled for expanded variables 22279+* thus build &MASTR as a copy of '&ARGS with ' doubled 22280+* 22281+* 22282+*,// PACK T403V1,T403V2 PAGE 408 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 22283+* 22284+* finally generate code: &ICNT copies of &CODE &ARGS 22285+* 0118BE F27F C0A6 C0AE 11946 1194E 22286+ PACK T403V1,T403V2 0118C4 F27F C0A6 C0AE 11946 1194E 22287+ PACK T403V1,T403V2 0118CA F27F C0A6 C0AE 11946 1194E 22288+ PACK T403V1,T403V2 0118D0 F27F C0A6 C0AE 11946 1194E 22289+ PACK T403V1,T403V2 0118D6 F27F C0A6 C0AE 11946 1194E 22290+ PACK T403V1,T403V2 0118DC F27F C0A6 C0AE 11946 1194E 22291+ PACK T403V1,T403V2 0118E2 F27F C0A6 C0AE 11946 1194E 22292+ PACK T403V1,T403V2 0118E8 F27F C0A6 C0AE 11946 1194E 22293+ PACK T403V1,T403V2 0118EE F27F C0A6 C0AE 11946 1194E 22294+ PACK T403V1,T403V2 0118F4 F27F C0A6 C0AE 11946 1194E 22295+ PACK T403V1,T403V2 0118FA F27F C0A6 C0AE 11946 1194E 22296+ PACK T403V1,T403V2 011900 F27F C0A6 C0AE 11946 1194E 22297+ PACK T403V1,T403V2 011906 F27F C0A6 C0AE 11946 1194E 22298+ PACK T403V1,T403V2 01190C F27F C0A6 C0AE 11946 1194E 22299+ PACK T403V1,T403V2 011912 F27F C0A6 C0AE 11946 1194E 22300+ PACK T403V1,T403V2 011918 F27F C0A6 C0AE 11946 1194E 22301+ PACK T403V1,T403V2 01191E F27F C0A6 C0AE 11946 1194E 22302+ PACK T403V1,T403V2 011924 F27F C0A6 C0AE 11946 1194E 22303+ PACK T403V1,T403V2 01192A F27F C0A6 C0AE 11946 1194E 22304+ PACK T403V1,T403V2 011930 F27F C0A6 C0AE 11946 1194E 22305+ PACK T403V1,T403V2 22306+* 011936 06FB 22307 BCTR R15,R11 22308 TSIMRET 011938 58F0 C0C0 11960 22309+ L R15,=A(SAVETST) R15 := current save area 01193C 58DF 0004 00004 22310+ L R13,4(R15) get old save area back 011940 98EC D00C 0000C 22311+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 011944 07FE 22312+ BR 14 RETURN 02000000 22313 * 011946 000000000000000C 22314 T403V1 DC PL8'0' 01194E F0F1F2F3F4F5F6F7 22315 T403V2 DC ZL16'123456789012345' 22316 TSIMEND 011960 22317+ LTORG 011960 00000458 22318 =A(SAVETST) 11964 22319+T403TEND EQU * 22320 * 22321 * Test 404 -- UNPK m,m (5d) -------------------------------- 22322 * 22323 TSIMBEG T404,6000,20,1,C'UNPK m,m (5d)' 22324+* 003744 22325+TDSCDAT CSECT 003748 22326+ DS 0D 22327+* 003748 00011968 22328+T404TDSC DC A(T404) // TENTRY 00374C 000000B4 22329+ DC A(T404TEND-T404) // TLENGTH 003750 00001770 22330+ DC F'6000' // TLRCNT 003754 00000014 22331+ DC F'20' // TIGCNT 003758 00000001 22332+ DC F'1' // TLTYPE 00192A 22333+TEXT CSECT 00192A E3F4F0F4 22334+SPTR1953 DC C'T404' 00375C 22335+TDSCDAT CSECT 00375C 22336+ DS 0F 00375C 0400192A 22337+ DC AL1(L'SPTR1953),AL3(SPTR1953) PAGE 409 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00192E 22338+TEXT CSECT 00192E E4D5D7D240946B94 22339+SPTR1954 DC C'UNPK m,m (5d)' 003760 22340+TDSCDAT CSECT 003760 22341+ DS 0F 003760 0D00192E 22342+ DC AL1(L'SPTR1954),AL3(SPTR1954) 22343+* 004C14 22344+TDSCTBL CSECT 04C14 22345+T404TPTR EQU * 004C14 00003748 22346+ DC A(T404TDSC) enabled test 22347+* 011964 22348+TCODE CSECT 011968 22349+ DS 0D ensure double word alignment for test 011968 22350+T404 DS 0H 01650000 011968 90EC D00C 0000C 22351+ STM 14,12,12(13) SAVE REGISTERS 02950000 01196C 18CF 22352+ LR R12,R15 base register := entry address 11968 22353+ USING T404,R12 declare code base register 01196E 41B0 C01E 11986 22354+ LA R11,T404L load loop target to R11 011972 58F0 C0B0 11A18 22355+ L R15,=A(SAVETST) R15 := current save area 011976 50DF 0004 00004 22356+ ST R13,4(R15) set back pointer in current save area 01197A 182D 22357+ LR R2,R13 remember callers save area 01197C 18DF 22358+ LR R13,R15 setup current save area 01197E 50D2 0008 00008 22359+ ST R13,8(R2) set forw pointer in callers save area 00000 22360+ USING TDSC,R1 declare TDSC base register 011982 58F0 1008 00008 22361+ L R15,TLRCNT load local repeat count to R15 22362+* 22363 * 22364 T404L REPINS UNPK,(T404V1,T404V2) repeat: UNPK T404V1,T404V2 22365+* 22366+* build from sublist &ALIST a comma separated string &ARGS 22367+* 22368+* 22369+* 22370+* 22371+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 22372+* this allows to transfer the repeat count from last TDSCGEN call 22373+* 22374+* 11986 22375+T404L EQU * 22376+* 22377+* write a comment indicating what REPINS does (in case NOGEN in effect) 22378+* 22379+*,// REPINS: do 20 times: 22380+* 22381+* MNOTE requires that ' is doubled for expanded variables 22382+* thus build &MASTR as a copy of '&ARGS with ' doubled 22383+* 22384+* 22385+*,// UNPK T404V1,T404V2 22386+* 22387+* finally generate code: &ICNT copies of &CODE &ARGS 22388+* 011986 F352 C0A6 C0AC 11A0E 11A14 22389+ UNPK T404V1,T404V2 01198C F352 C0A6 C0AC 11A0E 11A14 22390+ UNPK T404V1,T404V2 011992 F352 C0A6 C0AC 11A0E 11A14 22391+ UNPK T404V1,T404V2 011998 F352 C0A6 C0AC 11A0E 11A14 22392+ UNPK T404V1,T404V2 PAGE 410 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01199E F352 C0A6 C0AC 11A0E 11A14 22393+ UNPK T404V1,T404V2 0119A4 F352 C0A6 C0AC 11A0E 11A14 22394+ UNPK T404V1,T404V2 0119AA F352 C0A6 C0AC 11A0E 11A14 22395+ UNPK T404V1,T404V2 0119B0 F352 C0A6 C0AC 11A0E 11A14 22396+ UNPK T404V1,T404V2 0119B6 F352 C0A6 C0AC 11A0E 11A14 22397+ UNPK T404V1,T404V2 0119BC F352 C0A6 C0AC 11A0E 11A14 22398+ UNPK T404V1,T404V2 0119C2 F352 C0A6 C0AC 11A0E 11A14 22399+ UNPK T404V1,T404V2 0119C8 F352 C0A6 C0AC 11A0E 11A14 22400+ UNPK T404V1,T404V2 0119CE F352 C0A6 C0AC 11A0E 11A14 22401+ UNPK T404V1,T404V2 0119D4 F352 C0A6 C0AC 11A0E 11A14 22402+ UNPK T404V1,T404V2 0119DA F352 C0A6 C0AC 11A0E 11A14 22403+ UNPK T404V1,T404V2 0119E0 F352 C0A6 C0AC 11A0E 11A14 22404+ UNPK T404V1,T404V2 0119E6 F352 C0A6 C0AC 11A0E 11A14 22405+ UNPK T404V1,T404V2 0119EC F352 C0A6 C0AC 11A0E 11A14 22406+ UNPK T404V1,T404V2 0119F2 F352 C0A6 C0AC 11A0E 11A14 22407+ UNPK T404V1,T404V2 0119F8 F352 C0A6 C0AC 11A0E 11A14 22408+ UNPK T404V1,T404V2 22409+* 0119FE 06FB 22410 BCTR R15,R11 22411 TSIMRET 011A00 58F0 C0B0 11A18 22412+ L R15,=A(SAVETST) R15 := current save area 011A04 58DF 0004 00004 22413+ L R13,4(R15) get old save area back 011A08 98EC D00C 0000C 22414+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 011A0C 07FE 22415+ BR 14 RETURN 02000000 22416 * 011A0E F0F0F0F0F0C0 22417 T404V1 DC ZL6'0' 011A14 12345C 22418 T404V2 DC PL3'12345' 22419 TSIMEND 011A18 22420+ LTORG 011A18 00000458 22421 =A(SAVETST) 11A1C 22422+T404TEND EQU * 22423 * 22424 * Test 405 -- UNPK m,m (15d) ------------------------------- 22425 * 22426 TSIMBEG T405,2500,20,1,C'UNPK m,m (15d)' 22427+* 003764 22428+TDSCDAT CSECT 003768 22429+ DS 0D 22430+* 003768 00011A20 22431+T405TDSC DC A(T405) // TENTRY 00376C 000000C4 22432+ DC A(T405TEND-T405) // TLENGTH 003770 000009C4 22433+ DC F'2500' // TLRCNT 003774 00000014 22434+ DC F'20' // TIGCNT 003778 00000001 22435+ DC F'1' // TLTYPE 00193B 22436+TEXT CSECT 00193B E3F4F0F5 22437+SPTR1965 DC C'T405' 00377C 22438+TDSCDAT CSECT 00377C 22439+ DS 0F 00377C 0400193B 22440+ DC AL1(L'SPTR1965),AL3(SPTR1965) 00193F 22441+TEXT CSECT 00193F E4D5D7D240946B94 22442+SPTR1966 DC C'UNPK m,m (15d)' 003780 22443+TDSCDAT CSECT 003780 22444+ DS 0F 003780 0E00193F 22445+ DC AL1(L'SPTR1966),AL3(SPTR1966) 22446+* 004C18 22447+TDSCTBL CSECT PAGE 411 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04C18 22448+T405TPTR EQU * 004C18 00003768 22449+ DC A(T405TDSC) enabled test 22450+* 011A1C 22451+TCODE CSECT 011A20 22452+ DS 0D ensure double word alignment for test 011A20 22453+T405 DS 0H 01650000 011A20 90EC D00C 0000C 22454+ STM 14,12,12(13) SAVE REGISTERS 02950000 011A24 18CF 22455+ LR R12,R15 base register := entry address 11A20 22456+ USING T405,R12 declare code base register 011A26 41B0 C01E 11A3E 22457+ LA R11,T405L load loop target to R11 011A2A 58F0 C0C0 11AE0 22458+ L R15,=A(SAVETST) R15 := current save area 011A2E 50DF 0004 00004 22459+ ST R13,4(R15) set back pointer in current save area 011A32 182D 22460+ LR R2,R13 remember callers save area 011A34 18DF 22461+ LR R13,R15 setup current save area 011A36 50D2 0008 00008 22462+ ST R13,8(R2) set forw pointer in callers save area 00000 22463+ USING TDSC,R1 declare TDSC base register 011A3A 58F0 1008 00008 22464+ L R15,TLRCNT load local repeat count to R15 22465+* 22466 * 22467 T405L REPINS UNPK,(T405V1,T405V2) repeat: UNPK T405V1,T405V2 22468+* 22469+* build from sublist &ALIST a comma separated string &ARGS 22470+* 22471+* 22472+* 22473+* 22474+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 22475+* this allows to transfer the repeat count from last TDSCGEN call 22476+* 22477+* 11A3E 22478+T405L EQU * 22479+* 22480+* write a comment indicating what REPINS does (in case NOGEN in effect) 22481+* 22482+*,// REPINS: do 20 times: 22483+* 22484+* MNOTE requires that ' is doubled for expanded variables 22485+* thus build &MASTR as a copy of '&ARGS with ' doubled 22486+* 22487+* 22488+*,// UNPK T405V1,T405V2 22489+* 22490+* finally generate code: &ICNT copies of &CODE &ARGS 22491+* 011A3E F3F7 C0A6 C0B6 11AC6 11AD6 22492+ UNPK T405V1,T405V2 011A44 F3F7 C0A6 C0B6 11AC6 11AD6 22493+ UNPK T405V1,T405V2 011A4A F3F7 C0A6 C0B6 11AC6 11AD6 22494+ UNPK T405V1,T405V2 011A50 F3F7 C0A6 C0B6 11AC6 11AD6 22495+ UNPK T405V1,T405V2 011A56 F3F7 C0A6 C0B6 11AC6 11AD6 22496+ UNPK T405V1,T405V2 011A5C F3F7 C0A6 C0B6 11AC6 11AD6 22497+ UNPK T405V1,T405V2 011A62 F3F7 C0A6 C0B6 11AC6 11AD6 22498+ UNPK T405V1,T405V2 011A68 F3F7 C0A6 C0B6 11AC6 11AD6 22499+ UNPK T405V1,T405V2 011A6E F3F7 C0A6 C0B6 11AC6 11AD6 22500+ UNPK T405V1,T405V2 011A74 F3F7 C0A6 C0B6 11AC6 11AD6 22501+ UNPK T405V1,T405V2 011A7A F3F7 C0A6 C0B6 11AC6 11AD6 22502+ UNPK T405V1,T405V2 PAGE 412 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 011A80 F3F7 C0A6 C0B6 11AC6 11AD6 22503+ UNPK T405V1,T405V2 011A86 F3F7 C0A6 C0B6 11AC6 11AD6 22504+ UNPK T405V1,T405V2 011A8C F3F7 C0A6 C0B6 11AC6 11AD6 22505+ UNPK T405V1,T405V2 011A92 F3F7 C0A6 C0B6 11AC6 11AD6 22506+ UNPK T405V1,T405V2 011A98 F3F7 C0A6 C0B6 11AC6 11AD6 22507+ UNPK T405V1,T405V2 011A9E F3F7 C0A6 C0B6 11AC6 11AD6 22508+ UNPK T405V1,T405V2 011AA4 F3F7 C0A6 C0B6 11AC6 11AD6 22509+ UNPK T405V1,T405V2 011AAA F3F7 C0A6 C0B6 11AC6 11AD6 22510+ UNPK T405V1,T405V2 011AB0 F3F7 C0A6 C0B6 11AC6 11AD6 22511+ UNPK T405V1,T405V2 22512+* 011AB6 06FB 22513 BCTR R15,R11 22514 TSIMRET 011AB8 58F0 C0C0 11AE0 22515+ L R15,=A(SAVETST) R15 := current save area 011ABC 58DF 0004 00004 22516+ L R13,4(R15) get old save area back 011AC0 98EC D00C 0000C 22517+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 011AC4 07FE 22518+ BR 14 RETURN 02000000 22519 * 011AC6 F0F0F0F0F0F0F0F0 22520 T405V1 DC ZL16'0' 011AD6 123456789012345C 22521 T405V2 DC PL8'123456789012345' 22522 TSIMEND 011AE0 22523+ LTORG 011AE0 00000458 22524 =A(SAVETST) 11AE4 22525+T405TEND EQU * 22526 * 22527 * Test 41x -- edit ========================================= 22528 * 22529 * Test 410 -- MVC;ED (10c) --------------------------------- 22530 * 22531 TSIMBEG T410,3300,10,1,C'MVC;ED (10c)' 22532+* 003784 22533+TDSCDAT CSECT 003788 22534+ DS 0D 22535+* 003788 00011AE8 22536+T410TDSC DC A(T410) // TENTRY 00378C 000000E0 22537+ DC A(T410TEND-T410) // TLENGTH 003790 00000CE4 22538+ DC F'3300' // TLRCNT 003794 0000000A 22539+ DC F'10' // TIGCNT 003798 00000001 22540+ DC F'1' // TLTYPE 00194D 22541+TEXT CSECT 00194D E3F4F1F0 22542+SPTR1977 DC C'T410' 00379C 22543+TDSCDAT CSECT 00379C 22544+ DS 0F 00379C 0400194D 22545+ DC AL1(L'SPTR1977),AL3(SPTR1977) 001951 22546+TEXT CSECT 001951 D4E5C35EC5C4404D 22547+SPTR1978 DC C'MVC;ED (10c)' 0037A0 22548+TDSCDAT CSECT 0037A0 22549+ DS 0F 0037A0 0C001951 22550+ DC AL1(L'SPTR1978),AL3(SPTR1978) 22551+* 004C1C 22552+TDSCTBL CSECT 04C1C 22553+T410TPTR EQU * 004C1C 00003788 22554+ DC A(T410TDSC) enabled test 22555+* 011AE4 22556+TCODE CSECT 011AE8 22557+ DS 0D ensure double word alignment for test PAGE 413 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 011AE8 22558+T410 DS 0H 01650000 011AE8 90EC D00C 0000C 22559+ STM 14,12,12(13) SAVE REGISTERS 02950000 011AEC 18CF 22560+ LR R12,R15 base register := entry address 11AE8 22561+ USING T410,R12 declare code base register 011AEE 41B0 C02A 11B12 22562+ LA R11,T410L load loop target to R11 011AF2 58F0 C0D8 11BC0 22563+ L R15,=A(SAVETST) R15 := current save area 011AF6 50DF 0004 00004 22564+ ST R13,4(R15) set back pointer in current save area 011AFA 182D 22565+ LR R2,R13 remember callers save area 011AFC 18DF 22566+ LR R13,R15 setup current save area 011AFE 50D2 0008 00008 22567+ ST R13,8(R2) set forw pointer in callers save area 00000 22568+ USING TDSC,R1 declare TDSC base register 011B02 58F0 1008 00008 22569+ L R15,TLRCNT load local repeat count to R15 22570+* 22571 * 22572 * use sequence 22573 * MVC 0(10,R3),T410V3 setup edit pattern 22574 * ED 0(10,R3),T410V1+3 and do it 22575 * 011B06 5820 C0DC 11BC4 22576 L R2,=F'123456789' 011B0A 4E20 C0B8 11BA0 22577 CVD R2,T410V1 011B0E 4130 C0C0 11BA8 22578 LA R3,T410V2 points to edit position 22579 * 22580 T410L REPINSN MVC,(0(10,R3),T410V3),ED,(0(10,R3),T410V1+3) 22581+* 22582+* build from sublist &ALIST* a comma separated string &ARGS* 22583+* 22584+* 22585+* 22586+* 22587+* 22588+* 11B12 22589+T410L EQU * 22590+* 22591+* 22592+* write a comment indicating what REPINSN does (if NOGEN in effect) 22593+* 22594+*,// REPINSN: do 10 times: 22595+* 22596+* MNOTE requires that ' is doubled for expanded variables 22597+* thus build &MASTR as a copy of '&ARGS with ' doubled 22598+* 22599+* 22600+*,// MVC 0(10,R3),T410V3 22601+* 22602+* MNOTE requires that ' is doubled for expanded variables 22603+* thus build &MASTR as a copy of '&ARGS with ' doubled 22604+* 22605+* 22606+*,// ED 0(10,R3),T410V1+3 22607+* 22608+* finally generate code: &ICNT copies of &CO1 ... 22609+* 011B12 D209 3000 C0CA 00000 11BB2 22610+ MVC 0(10,R3),T410V3 011B18 DE09 3000 C0BB 00000 11BA3 22611+ ED 0(10,R3),T410V1+3 011B1E D209 3000 C0CA 00000 11BB2 22612+ MVC 0(10,R3),T410V3 PAGE 414 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 011B24 DE09 3000 C0BB 00000 11BA3 22613+ ED 0(10,R3),T410V1+3 011B2A D209 3000 C0CA 00000 11BB2 22614+ MVC 0(10,R3),T410V3 011B30 DE09 3000 C0BB 00000 11BA3 22615+ ED 0(10,R3),T410V1+3 011B36 D209 3000 C0CA 00000 11BB2 22616+ MVC 0(10,R3),T410V3 011B3C DE09 3000 C0BB 00000 11BA3 22617+ ED 0(10,R3),T410V1+3 011B42 D209 3000 C0CA 00000 11BB2 22618+ MVC 0(10,R3),T410V3 011B48 DE09 3000 C0BB 00000 11BA3 22619+ ED 0(10,R3),T410V1+3 011B4E D209 3000 C0CA 00000 11BB2 22620+ MVC 0(10,R3),T410V3 011B54 DE09 3000 C0BB 00000 11BA3 22621+ ED 0(10,R3),T410V1+3 011B5A D209 3000 C0CA 00000 11BB2 22622+ MVC 0(10,R3),T410V3 011B60 DE09 3000 C0BB 00000 11BA3 22623+ ED 0(10,R3),T410V1+3 011B66 D209 3000 C0CA 00000 11BB2 22624+ MVC 0(10,R3),T410V3 011B6C DE09 3000 C0BB 00000 11BA3 22625+ ED 0(10,R3),T410V1+3 011B72 D209 3000 C0CA 00000 11BB2 22626+ MVC 0(10,R3),T410V3 011B78 DE09 3000 C0BB 00000 11BA3 22627+ ED 0(10,R3),T410V1+3 011B7E D209 3000 C0CA 00000 11BB2 22628+ MVC 0(10,R3),T410V3 011B84 DE09 3000 C0BB 00000 11BA3 22629+ ED 0(10,R3),T410V1+3 22630+* 011B8A 06FB 22631 BCTR R15,R11 22632 TSIMRET 011B8C 58F0 C0D8 11BC0 22633+ L R15,=A(SAVETST) R15 := current save area 011B90 58DF 0004 00004 22634+ L R13,4(R15) get old save area back 011B94 98EC D00C 0000C 22635+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 011B98 07FE 22636+ BR 14 RETURN 02000000 22637 * 011BA0 22638 T410V1 DS 1D 011BA8 22639 T410V2 DS 10C 011BB2 4020202020202020 22640 T410V3 DC C' ',7X'20',X'21',X'20' 22641 TSIMEND 011BC0 22642+ LTORG 011BC0 00000458 22643 =A(SAVETST) 011BC4 075BCD15 22644 =F'123456789' 11BC8 22645+T410TEND EQU * 22646 * 22647 * Test 411 -- MVC;ED (30c) --------------------------------- 22648 * 22649 TSIMBEG T411,1200,10,1,C'MVC;ED (30c)' 22650+* 0037A4 22651+TDSCDAT CSECT 0037A8 22652+ DS 0D 22653+* 0037A8 00011BC8 22654+T411TDSC DC A(T411) // TENTRY 0037AC 000000FC 22655+ DC A(T411TEND-T411) // TLENGTH 0037B0 000004B0 22656+ DC F'1200' // TLRCNT 0037B4 0000000A 22657+ DC F'10' // TIGCNT 0037B8 00000001 22658+ DC F'1' // TLTYPE 00195D 22659+TEXT CSECT 00195D E3F4F1F1 22660+SPTR1991 DC C'T411' 0037BC 22661+TDSCDAT CSECT 0037BC 22662+ DS 0F 0037BC 0400195D 22663+ DC AL1(L'SPTR1991),AL3(SPTR1991) 001961 22664+TEXT CSECT 001961 D4E5C35EC5C4404D 22665+SPTR1992 DC C'MVC;ED (30c)' 0037C0 22666+TDSCDAT CSECT 0037C0 22667+ DS 0F PAGE 415 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0037C0 0C001961 22668+ DC AL1(L'SPTR1992),AL3(SPTR1992) 22669+* 004C20 22670+TDSCTBL CSECT 04C20 22671+T411TPTR EQU * 004C20 000037A8 22672+ DC A(T411TDSC) enabled test 22673+* 011BC8 22674+TCODE CSECT 011BC8 22675+ DS 0D ensure double word alignment for test 011BC8 22676+T411 DS 0H 01650000 011BC8 90EC D00C 0000C 22677+ STM 14,12,12(13) SAVE REGISTERS 02950000 011BCC 18CF 22678+ LR R12,R15 base register := entry address 11BC8 22679+ USING T411,R12 declare code base register 011BCE 41B0 C022 11BEA 22680+ LA R11,T411L load loop target to R11 011BD2 58F0 C0F8 11CC0 22681+ L R15,=A(SAVETST) R15 := current save area 011BD6 50DF 0004 00004 22682+ ST R13,4(R15) set back pointer in current save area 011BDA 182D 22683+ LR R2,R13 remember callers save area 011BDC 18DF 22684+ LR R13,R15 setup current save area 011BDE 50D2 0008 00008 22685+ ST R13,8(R2) set forw pointer in callers save area 00000 22686+ USING TDSC,R1 declare TDSC base register 011BE2 58F0 1008 00008 22687+ L R15,TLRCNT load local repeat count to R15 22688+* 22689 * 22690 * use sequence 22691 * MVC 0(30,R3),T411V3 setup edit pattern 22692 * ED 0(30,R3),T411V1 and do it 22693 * 011BE6 4130 C0B9 11C81 22694 LA R3,T411V2 points to edit position 22695 * 22696 T411L REPINSN MVC,(0(30,R3),T411V3),ED,(0(30,R3),T411V1) 22697+* 22698+* build from sublist &ALIST* a comma separated string &ARGS* 22699+* 22700+* 22701+* 22702+* 22703+* 22704+* 11BEA 22705+T411L EQU * 22706+* 22707+* 22708+* write a comment indicating what REPINSN does (if NOGEN in effect) 22709+* 22710+*,// REPINSN: do 10 times: 22711+* 22712+* MNOTE requires that ' is doubled for expanded variables 22713+* thus build &MASTR as a copy of '&ARGS with ' doubled 22714+* 22715+* 22716+*,// MVC 0(30,R3),T411V3 22717+* 22718+* MNOTE requires that ' is doubled for expanded variables 22719+* thus build &MASTR as a copy of '&ARGS with ' doubled 22720+* 22721+* 22722+*,// ED 0(30,R3),T411V1 PAGE 416 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 22723+* 22724+* finally generate code: &ICNT copies of &CO1 ... 22725+* 011BEA D21D 3000 C0D7 00000 11C9F 22726+ MVC 0(30,R3),T411V3 011BF0 DE1D 3000 C0AA 00000 11C72 22727+ ED 0(30,R3),T411V1 011BF6 D21D 3000 C0D7 00000 11C9F 22728+ MVC 0(30,R3),T411V3 011BFC DE1D 3000 C0AA 00000 11C72 22729+ ED 0(30,R3),T411V1 011C02 D21D 3000 C0D7 00000 11C9F 22730+ MVC 0(30,R3),T411V3 011C08 DE1D 3000 C0AA 00000 11C72 22731+ ED 0(30,R3),T411V1 011C0E D21D 3000 C0D7 00000 11C9F 22732+ MVC 0(30,R3),T411V3 011C14 DE1D 3000 C0AA 00000 11C72 22733+ ED 0(30,R3),T411V1 011C1A D21D 3000 C0D7 00000 11C9F 22734+ MVC 0(30,R3),T411V3 011C20 DE1D 3000 C0AA 00000 11C72 22735+ ED 0(30,R3),T411V1 011C26 D21D 3000 C0D7 00000 11C9F 22736+ MVC 0(30,R3),T411V3 011C2C DE1D 3000 C0AA 00000 11C72 22737+ ED 0(30,R3),T411V1 011C32 D21D 3000 C0D7 00000 11C9F 22738+ MVC 0(30,R3),T411V3 011C38 DE1D 3000 C0AA 00000 11C72 22739+ ED 0(30,R3),T411V1 011C3E D21D 3000 C0D7 00000 11C9F 22740+ MVC 0(30,R3),T411V3 011C44 DE1D 3000 C0AA 00000 11C72 22741+ ED 0(30,R3),T411V1 011C4A D21D 3000 C0D7 00000 11C9F 22742+ MVC 0(30,R3),T411V3 011C50 DE1D 3000 C0AA 00000 11C72 22743+ ED 0(30,R3),T411V1 011C56 D21D 3000 C0D7 00000 11C9F 22744+ MVC 0(30,R3),T411V3 011C5C DE1D 3000 C0AA 00000 11C72 22745+ ED 0(30,R3),T411V1 22746+* 011C62 06FB 22747 BCTR R15,R11 22748 TSIMRET 011C64 58F0 C0F8 11CC0 22749+ L R15,=A(SAVETST) R15 := current save area 011C68 58DF 0004 00004 22750+ L R13,4(R15) get old save area back 011C6C 98EC D00C 0000C 22751+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 011C70 07FE 22752+ BR 14 RETURN 02000000 22753 * 011C72 0123456789012345 22754 T411V1 DC PL15'1234567890123456789012345678' 011C81 22755 T411V2 DS 30C 011C9F 4020202020202020 22756 T411V3 DC C' ',27X'20',X'21',X'20' 22757 TSIMEND 011CC0 22758+ LTORG 011CC0 00000458 22759 =A(SAVETST) 11CC4 22760+T411TEND EQU * 22761 * 22762 * Test 415 -- MVC;EDMK (10c) ------------------------------- 22763 * 22764 TSIMBEG T415,3300,10,1,C'MVC;EDMK (10c)' 22765+* 0037C4 22766+TDSCDAT CSECT 0037C8 22767+ DS 0D 22768+* 0037C8 00011CC8 22769+T415TDSC DC A(T415) // TENTRY 0037CC 000000E0 22770+ DC A(T415TEND-T415) // TLENGTH 0037D0 00000CE4 22771+ DC F'3300' // TLRCNT 0037D4 0000000A 22772+ DC F'10' // TIGCNT 0037D8 00000001 22773+ DC F'1' // TLTYPE 00196D 22774+TEXT CSECT 00196D E3F4F1F5 22775+SPTR2005 DC C'T415' 0037DC 22776+TDSCDAT CSECT 0037DC 22777+ DS 0F PAGE 417 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0037DC 0400196D 22778+ DC AL1(L'SPTR2005),AL3(SPTR2005) 001971 22779+TEXT CSECT 001971 D4E5C35EC5C4D4D2 22780+SPTR2006 DC C'MVC;EDMK (10c)' 0037E0 22781+TDSCDAT CSECT 0037E0 22782+ DS 0F 0037E0 0E001971 22783+ DC AL1(L'SPTR2006),AL3(SPTR2006) 22784+* 004C24 22785+TDSCTBL CSECT 04C24 22786+T415TPTR EQU * 004C24 000037C8 22787+ DC A(T415TDSC) enabled test 22788+* 011CC4 22789+TCODE CSECT 011CC8 22790+ DS 0D ensure double word alignment for test 011CC8 22791+T415 DS 0H 01650000 011CC8 90EC D00C 0000C 22792+ STM 14,12,12(13) SAVE REGISTERS 02950000 011CCC 18CF 22793+ LR R12,R15 base register := entry address 11CC8 22794+ USING T415,R12 declare code base register 011CCE 41B0 C02A 11CF2 22795+ LA R11,T415L load loop target to R11 011CD2 58F0 C0D8 11DA0 22796+ L R15,=A(SAVETST) R15 := current save area 011CD6 50DF 0004 00004 22797+ ST R13,4(R15) set back pointer in current save area 011CDA 182D 22798+ LR R2,R13 remember callers save area 011CDC 18DF 22799+ LR R13,R15 setup current save area 011CDE 50D2 0008 00008 22800+ ST R13,8(R2) set forw pointer in callers save area 00000 22801+ USING TDSC,R1 declare TDSC base register 011CE2 58F0 1008 00008 22802+ L R15,TLRCNT load local repeat count to R15 22803+* 22804 * 22805 * use sequence 22806 * MVC 0(10,R3),T415V3 setup edit pattern 22807 * EDMK 0(10,R3),T415V1+3 and do it 22808 * 011CE6 5820 C0DC 11DA4 22809 L R2,=F'123456789' 011CEA 4E20 C0B8 11D80 22810 CVD R2,T415V1 011CEE 4130 C0C0 11D88 22811 LA R3,T415V2 points to edit position 22812 * 22813 T415L REPINSN MVC,(0(10,R3),T415V3),EDMK,(0(10,R3),T415V1+3) 22814+* 22815+* build from sublist &ALIST* a comma separated string &ARGS* 22816+* 22817+* 22818+* 22819+* 22820+* 22821+* 11CF2 22822+T415L EQU * 22823+* 22824+* 22825+* write a comment indicating what REPINSN does (if NOGEN in effect) 22826+* 22827+*,// REPINSN: do 10 times: 22828+* 22829+* MNOTE requires that ' is doubled for expanded variables 22830+* thus build &MASTR as a copy of '&ARGS with ' doubled 22831+* 22832+* PAGE 418 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 22833+*,// MVC 0(10,R3),T415V3 22834+* 22835+* MNOTE requires that ' is doubled for expanded variables 22836+* thus build &MASTR as a copy of '&ARGS with ' doubled 22837+* 22838+* 22839+*,// EDMK 0(10,R3),T415V1+3 22840+* 22841+* finally generate code: &ICNT copies of &CO1 ... 22842+* 011CF2 D209 3000 C0CA 00000 11D92 22843+ MVC 0(10,R3),T415V3 011CF8 DF09 3000 C0BB 00000 11D83 22844+ EDMK 0(10,R3),T415V1+3 011CFE D209 3000 C0CA 00000 11D92 22845+ MVC 0(10,R3),T415V3 011D04 DF09 3000 C0BB 00000 11D83 22846+ EDMK 0(10,R3),T415V1+3 011D0A D209 3000 C0CA 00000 11D92 22847+ MVC 0(10,R3),T415V3 011D10 DF09 3000 C0BB 00000 11D83 22848+ EDMK 0(10,R3),T415V1+3 011D16 D209 3000 C0CA 00000 11D92 22849+ MVC 0(10,R3),T415V3 011D1C DF09 3000 C0BB 00000 11D83 22850+ EDMK 0(10,R3),T415V1+3 011D22 D209 3000 C0CA 00000 11D92 22851+ MVC 0(10,R3),T415V3 011D28 DF09 3000 C0BB 00000 11D83 22852+ EDMK 0(10,R3),T415V1+3 011D2E D209 3000 C0CA 00000 11D92 22853+ MVC 0(10,R3),T415V3 011D34 DF09 3000 C0BB 00000 11D83 22854+ EDMK 0(10,R3),T415V1+3 011D3A D209 3000 C0CA 00000 11D92 22855+ MVC 0(10,R3),T415V3 011D40 DF09 3000 C0BB 00000 11D83 22856+ EDMK 0(10,R3),T415V1+3 011D46 D209 3000 C0CA 00000 11D92 22857+ MVC 0(10,R3),T415V3 011D4C DF09 3000 C0BB 00000 11D83 22858+ EDMK 0(10,R3),T415V1+3 011D52 D209 3000 C0CA 00000 11D92 22859+ MVC 0(10,R3),T415V3 011D58 DF09 3000 C0BB 00000 11D83 22860+ EDMK 0(10,R3),T415V1+3 011D5E D209 3000 C0CA 00000 11D92 22861+ MVC 0(10,R3),T415V3 011D64 DF09 3000 C0BB 00000 11D83 22862+ EDMK 0(10,R3),T415V1+3 22863+* 011D6A 06FB 22864 BCTR R15,R11 22865 TSIMRET 011D6C 58F0 C0D8 11DA0 22866+ L R15,=A(SAVETST) R15 := current save area 011D70 58DF 0004 00004 22867+ L R13,4(R15) get old save area back 011D74 98EC D00C 0000C 22868+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 011D78 07FE 22869+ BR 14 RETURN 02000000 22870 * 011D80 22871 T415V1 DS 1D 011D88 22872 T415V2 DS 10C 011D92 4020202020202020 22873 T415V3 DC C' ',7X'20',X'21',X'20' 22874 TSIMEND 011DA0 22875+ LTORG 011DA0 00000458 22876 =A(SAVETST) 011DA4 075BCD15 22877 =F'123456789' 11DA8 22878+T415TEND EQU * 22879 * 22880 * Test 42x -- decimal add/mul/div ========================== 22881 * 22882 * Test 420 -- AP m,m (10d) --------------------------------- 22883 * 22884 TSIMBEG T420,700,30,7,C'AP m,m (10d)' 22885+* 0037E4 22886+TDSCDAT CSECT 0037E8 22887+ DS 0D PAGE 419 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 22888+* 0037E8 00011DA8 22889+T420TDSC DC A(T420) // TENTRY 0037EC 000000FC 22890+ DC A(T420TEND-T420) // TLENGTH 0037F0 000002BC 22891+ DC F'700' // TLRCNT 0037F4 0000001E 22892+ DC F'30' // TIGCNT 0037F8 00000007 22893+ DC F'7' // TLTYPE 00197F 22894+TEXT CSECT 00197F E3F4F2F0 22895+SPTR2019 DC C'T420' 0037FC 22896+TDSCDAT CSECT 0037FC 22897+ DS 0F 0037FC 0400197F 22898+ DC AL1(L'SPTR2019),AL3(SPTR2019) 001983 22899+TEXT CSECT 001983 C1D740946B94404D 22900+SPTR2020 DC C'AP m,m (10d)' 003800 22901+TDSCDAT CSECT 003800 22902+ DS 0F 003800 0C001983 22903+ DC AL1(L'SPTR2020),AL3(SPTR2020) 22904+* 004C28 22905+TDSCTBL CSECT 04C28 22906+T420TPTR EQU * 004C28 000037E8 22907+ DC A(T420TDSC) enabled test 22908+* 011DA8 22909+TCODE CSECT 011DA8 22910+ DS 0D ensure double word alignment for test 011DA8 22911+T420 DS 0H 01650000 011DA8 90EC D00C 0000C 22912+ STM 14,12,12(13) SAVE REGISTERS 02950000 011DAC 18CF 22913+ LR R12,R15 base register := entry address 11DA8 22914+ USING T420,R12 declare code base register 011DAE 41B0 C01E 11DC6 22915+ LA R11,T420L load loop target to R11 011DB2 58F0 C0F8 11EA0 22916+ L R15,=A(SAVETST) R15 := current save area 011DB6 50DF 0004 00004 22917+ ST R13,4(R15) set back pointer in current save area 011DBA 182D 22918+ LR R2,R13 remember callers save area 011DBC 18DF 22919+ LR R13,R15 setup current save area 011DBE 50D2 0008 00008 22920+ ST R13,8(R2) set forw pointer in callers save area 00000 22921+ USING TDSC,R1 declare TDSC base register 011DC2 58F0 1008 00008 22922+ L R15,TLRCNT load local repeat count to R15 22923+* 22924 * 22925 * value range *-999999999: start at -999999999, add 66666660 22926 * 011DC6 D204 C0E8 C0F2 11E90 11E9A 22927 T420L MVC T420V1,T420V3 22928 REPINS AP,(T420V1,T420V2) repeat: AP T420V1,T420V2 22929+* 22930+* build from sublist &ALIST a comma separated string &ARGS 22931+* 22932+* 22933+* 22934+* 22935+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 22936+* this allows to transfer the repeat count from last TDSCGEN call 22937+* 22938+* 22939+* 22940+* write a comment indicating what REPINS does (in case NOGEN in effect) 22941+* 22942+*,// REPINS: do 30 times: PAGE 420 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 22943+* 22944+* MNOTE requires that ' is doubled for expanded variables 22945+* thus build &MASTR as a copy of '&ARGS with ' doubled 22946+* 22947+* 22948+*,// AP T420V1,T420V2 22949+* 22950+* finally generate code: &ICNT copies of &CODE &ARGS 22951+* 011DCC FA44 C0E8 C0ED 11E90 11E95 22952+ AP T420V1,T420V2 011DD2 FA44 C0E8 C0ED 11E90 11E95 22953+ AP T420V1,T420V2 011DD8 FA44 C0E8 C0ED 11E90 11E95 22954+ AP T420V1,T420V2 011DDE FA44 C0E8 C0ED 11E90 11E95 22955+ AP T420V1,T420V2 011DE4 FA44 C0E8 C0ED 11E90 11E95 22956+ AP T420V1,T420V2 011DEA FA44 C0E8 C0ED 11E90 11E95 22957+ AP T420V1,T420V2 011DF0 FA44 C0E8 C0ED 11E90 11E95 22958+ AP T420V1,T420V2 011DF6 FA44 C0E8 C0ED 11E90 11E95 22959+ AP T420V1,T420V2 011DFC FA44 C0E8 C0ED 11E90 11E95 22960+ AP T420V1,T420V2 011E02 FA44 C0E8 C0ED 11E90 11E95 22961+ AP T420V1,T420V2 011E08 FA44 C0E8 C0ED 11E90 11E95 22962+ AP T420V1,T420V2 011E0E FA44 C0E8 C0ED 11E90 11E95 22963+ AP T420V1,T420V2 011E14 FA44 C0E8 C0ED 11E90 11E95 22964+ AP T420V1,T420V2 011E1A FA44 C0E8 C0ED 11E90 11E95 22965+ AP T420V1,T420V2 011E20 FA44 C0E8 C0ED 11E90 11E95 22966+ AP T420V1,T420V2 011E26 FA44 C0E8 C0ED 11E90 11E95 22967+ AP T420V1,T420V2 011E2C FA44 C0E8 C0ED 11E90 11E95 22968+ AP T420V1,T420V2 011E32 FA44 C0E8 C0ED 11E90 11E95 22969+ AP T420V1,T420V2 011E38 FA44 C0E8 C0ED 11E90 11E95 22970+ AP T420V1,T420V2 011E3E FA44 C0E8 C0ED 11E90 11E95 22971+ AP T420V1,T420V2 011E44 FA44 C0E8 C0ED 11E90 11E95 22972+ AP T420V1,T420V2 011E4A FA44 C0E8 C0ED 11E90 11E95 22973+ AP T420V1,T420V2 011E50 FA44 C0E8 C0ED 11E90 11E95 22974+ AP T420V1,T420V2 011E56 FA44 C0E8 C0ED 11E90 11E95 22975+ AP T420V1,T420V2 011E5C FA44 C0E8 C0ED 11E90 11E95 22976+ AP T420V1,T420V2 011E62 FA44 C0E8 C0ED 11E90 11E95 22977+ AP T420V1,T420V2 011E68 FA44 C0E8 C0ED 11E90 11E95 22978+ AP T420V1,T420V2 011E6E FA44 C0E8 C0ED 11E90 11E95 22979+ AP T420V1,T420V2 011E74 FA44 C0E8 C0ED 11E90 11E95 22980+ AP T420V1,T420V2 011E7A FA44 C0E8 C0ED 11E90 11E95 22981+ AP T420V1,T420V2 22982+* 011E80 06FB 22983 BCTR R15,R11 22984 TSIMRET 011E82 58F0 C0F8 11EA0 22985+ L R15,=A(SAVETST) R15 := current save area 011E86 58DF 0004 00004 22986+ L R13,4(R15) get old save area back 011E8A 98EC D00C 0000C 22987+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 011E8E 07FE 22988+ BR 14 RETURN 02000000 22989 * 011E90 000000000C 22990 T420V1 DC PL5'0' accululator 011E95 066666660C 22991 T420V2 DC PL5'66666660' increment value 011E9A 999999999D 22992 T420V3 DC PL5'-999999999' initial value 22993 TSIMEND 011EA0 22994+ LTORG 011EA0 00000458 22995 =A(SAVETST) 11EA4 22996+T420TEND EQU * 22997 * PAGE 421 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 22998 * Test 421 -- AP m,m (30d) --------------------------------- 22999 * 23000 TSIMBEG T421,700,30,8,C'AP m,m (30d)' 23001+* 003804 23002+TDSCDAT CSECT 003808 23003+ DS 0D 23004+* 003808 00011EA8 23005+T421TDSC DC A(T421) // TENTRY 00380C 0000011C 23006+ DC A(T421TEND-T421) // TLENGTH 003810 000002BC 23007+ DC F'700' // TLRCNT 003814 0000001E 23008+ DC F'30' // TIGCNT 003818 00000008 23009+ DC F'8' // TLTYPE 00198F 23010+TEXT CSECT 00198F E3F4F2F1 23011+SPTR2031 DC C'T421' 00381C 23012+TDSCDAT CSECT 00381C 23013+ DS 0F 00381C 0400198F 23014+ DC AL1(L'SPTR2031),AL3(SPTR2031) 001993 23015+TEXT CSECT 001993 C1D740946B94404D 23016+SPTR2032 DC C'AP m,m (30d)' 003820 23017+TDSCDAT CSECT 003820 23018+ DS 0F 003820 0C001993 23019+ DC AL1(L'SPTR2032),AL3(SPTR2032) 23020+* 004C2C 23021+TDSCTBL CSECT 04C2C 23022+T421TPTR EQU * 004C2C 00003808 23023+ DC A(T421TDSC) enabled test 23024+* 011EA4 23025+TCODE CSECT 011EA8 23026+ DS 0D ensure double word alignment for test 011EA8 23027+T421 DS 0H 01650000 011EA8 90EC D00C 0000C 23028+ STM 14,12,12(13) SAVE REGISTERS 02950000 011EAC 18CF 23029+ LR R12,R15 base register := entry address 11EA8 23030+ USING T421,R12 declare code base register 011EAE 41B0 C01E 11EC6 23031+ LA R11,T421L load loop target to R11 011EB2 58F0 C118 11FC0 23032+ L R15,=A(SAVETST) R15 := current save area 011EB6 50DF 0004 00004 23033+ ST R13,4(R15) set back pointer in current save area 011EBA 182D 23034+ LR R2,R13 remember callers save area 011EBC 18DF 23035+ LR R13,R15 setup current save area 011EBE 50D2 0008 00008 23036+ ST R13,8(R2) set forw pointer in callers save area 00000 23037+ USING TDSC,R1 declare TDSC base register 011EC2 58F0 1008 00008 23038+ L R15,TLRCNT load local repeat count to R15 23039+* 23040 * 011EC6 D20E C0E8 C106 11F90 11FAE 23041 T421L MVC T421V1,T421V3 23042 REPINS AP,(T421V1,T421V2) repeat: AP T421V1,T421V2 23043+* 23044+* build from sublist &ALIST a comma separated string &ARGS 23045+* 23046+* 23047+* 23048+* 23049+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 23050+* this allows to transfer the repeat count from last TDSCGEN call 23051+* 23052+* PAGE 422 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 23053+* 23054+* write a comment indicating what REPINS does (in case NOGEN in effect) 23055+* 23056+*,// REPINS: do 30 times: 23057+* 23058+* MNOTE requires that ' is doubled for expanded variables 23059+* thus build &MASTR as a copy of '&ARGS with ' doubled 23060+* 23061+* 23062+*,// AP T421V1,T421V2 23063+* 23064+* finally generate code: &ICNT copies of &CODE &ARGS 23065+* 011ECC FAEE C0E8 C0F7 11F90 11F9F 23066+ AP T421V1,T421V2 011ED2 FAEE C0E8 C0F7 11F90 11F9F 23067+ AP T421V1,T421V2 011ED8 FAEE C0E8 C0F7 11F90 11F9F 23068+ AP T421V1,T421V2 011EDE FAEE C0E8 C0F7 11F90 11F9F 23069+ AP T421V1,T421V2 011EE4 FAEE C0E8 C0F7 11F90 11F9F 23070+ AP T421V1,T421V2 011EEA FAEE C0E8 C0F7 11F90 11F9F 23071+ AP T421V1,T421V2 011EF0 FAEE C0E8 C0F7 11F90 11F9F 23072+ AP T421V1,T421V2 011EF6 FAEE C0E8 C0F7 11F90 11F9F 23073+ AP T421V1,T421V2 011EFC FAEE C0E8 C0F7 11F90 11F9F 23074+ AP T421V1,T421V2 011F02 FAEE C0E8 C0F7 11F90 11F9F 23075+ AP T421V1,T421V2 011F08 FAEE C0E8 C0F7 11F90 11F9F 23076+ AP T421V1,T421V2 011F0E FAEE C0E8 C0F7 11F90 11F9F 23077+ AP T421V1,T421V2 011F14 FAEE C0E8 C0F7 11F90 11F9F 23078+ AP T421V1,T421V2 011F1A FAEE C0E8 C0F7 11F90 11F9F 23079+ AP T421V1,T421V2 011F20 FAEE C0E8 C0F7 11F90 11F9F 23080+ AP T421V1,T421V2 011F26 FAEE C0E8 C0F7 11F90 11F9F 23081+ AP T421V1,T421V2 011F2C FAEE C0E8 C0F7 11F90 11F9F 23082+ AP T421V1,T421V2 011F32 FAEE C0E8 C0F7 11F90 11F9F 23083+ AP T421V1,T421V2 011F38 FAEE C0E8 C0F7 11F90 11F9F 23084+ AP T421V1,T421V2 011F3E FAEE C0E8 C0F7 11F90 11F9F 23085+ AP T421V1,T421V2 011F44 FAEE C0E8 C0F7 11F90 11F9F 23086+ AP T421V1,T421V2 011F4A FAEE C0E8 C0F7 11F90 11F9F 23087+ AP T421V1,T421V2 011F50 FAEE C0E8 C0F7 11F90 11F9F 23088+ AP T421V1,T421V2 011F56 FAEE C0E8 C0F7 11F90 11F9F 23089+ AP T421V1,T421V2 011F5C FAEE C0E8 C0F7 11F90 11F9F 23090+ AP T421V1,T421V2 011F62 FAEE C0E8 C0F7 11F90 11F9F 23091+ AP T421V1,T421V2 011F68 FAEE C0E8 C0F7 11F90 11F9F 23092+ AP T421V1,T421V2 011F6E FAEE C0E8 C0F7 11F90 11F9F 23093+ AP T421V1,T421V2 011F74 FAEE C0E8 C0F7 11F90 11F9F 23094+ AP T421V1,T421V2 011F7A FAEE C0E8 C0F7 11F90 11F9F 23095+ AP T421V1,T421V2 23096+* 011F80 06FB 23097 BCTR R15,R11 23098 TSIMRET 011F82 58F0 C118 11FC0 23099+ L R15,=A(SAVETST) R15 := current save area 011F86 58DF 0004 00004 23100+ L R13,4(R15) get old save area back 011F8A 98EC D00C 0000C 23101+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 011F8E 07FE 23102+ BR 14 RETURN 02000000 23103 * 011F90 0000000000000000 23104 T421V1 DC PL15'0' accululator 011F9F 0000012345678901 23105 T421V2 DC PL15'123456789012345678901234' incr (24 sign.dig) 011FAE 0123456789012345 23106 T421V3 DC PL15'1234567890123456789012345678' init (28 sign.dig) 23107 TSIMEND PAGE 423 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 011FC0 23108+ LTORG 011FC0 00000458 23109 =A(SAVETST) 11FC4 23110+T421TEND EQU * 23111 * 23112 * Test 422 -- SP m,m (10d) --------------------------------- 23113 * 23114 TSIMBEG T422,700,30,7,C'SP m,m (10d)' 23115+* 003824 23116+TDSCDAT CSECT 003828 23117+ DS 0D 23118+* 003828 00011FC8 23119+T422TDSC DC A(T422) // TENTRY 00382C 000000FC 23120+ DC A(T422TEND-T422) // TLENGTH 003830 000002BC 23121+ DC F'700' // TLRCNT 003834 0000001E 23122+ DC F'30' // TIGCNT 003838 00000007 23123+ DC F'7' // TLTYPE 00199F 23124+TEXT CSECT 00199F E3F4F2F2 23125+SPTR2043 DC C'T422' 00383C 23126+TDSCDAT CSECT 00383C 23127+ DS 0F 00383C 0400199F 23128+ DC AL1(L'SPTR2043),AL3(SPTR2043) 0019A3 23129+TEXT CSECT 0019A3 E2D740946B94404D 23130+SPTR2044 DC C'SP m,m (10d)' 003840 23131+TDSCDAT CSECT 003840 23132+ DS 0F 003840 0C0019A3 23133+ DC AL1(L'SPTR2044),AL3(SPTR2044) 23134+* 004C30 23135+TDSCTBL CSECT 04C30 23136+T422TPTR EQU * 004C30 00003828 23137+ DC A(T422TDSC) enabled test 23138+* 011FC4 23139+TCODE CSECT 011FC8 23140+ DS 0D ensure double word alignment for test 011FC8 23141+T422 DS 0H 01650000 011FC8 90EC D00C 0000C 23142+ STM 14,12,12(13) SAVE REGISTERS 02950000 011FCC 18CF 23143+ LR R12,R15 base register := entry address 11FC8 23144+ USING T422,R12 declare code base register 011FCE 41B0 C01E 11FE6 23145+ LA R11,T422L load loop target to R11 011FD2 58F0 C0F8 120C0 23146+ L R15,=A(SAVETST) R15 := current save area 011FD6 50DF 0004 00004 23147+ ST R13,4(R15) set back pointer in current save area 011FDA 182D 23148+ LR R2,R13 remember callers save area 011FDC 18DF 23149+ LR R13,R15 setup current save area 011FDE 50D2 0008 00008 23150+ ST R13,8(R2) set forw pointer in callers save area 00000 23151+ USING TDSC,R1 declare TDSC base register 011FE2 58F0 1008 00008 23152+ L R15,TLRCNT load local repeat count to R15 23153+* 23154 * 23155 * value range *-999999999: start at +999999999, sub 66666660 23156 * 011FE6 D204 C0E8 C0F2 120B0 120BA 23157 T422L MVC T422V1,T422V3 23158 REPINS SP,(T422V1,T422V2) repeat: SP T422V1,T422V2 23159+* 23160+* build from sublist &ALIST a comma separated string &ARGS 23161+* 23162+* PAGE 424 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 23163+* 23164+* 23165+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 23166+* this allows to transfer the repeat count from last TDSCGEN call 23167+* 23168+* 23169+* 23170+* write a comment indicating what REPINS does (in case NOGEN in effect) 23171+* 23172+*,// REPINS: do 30 times: 23173+* 23174+* MNOTE requires that ' is doubled for expanded variables 23175+* thus build &MASTR as a copy of '&ARGS with ' doubled 23176+* 23177+* 23178+*,// SP T422V1,T422V2 23179+* 23180+* finally generate code: &ICNT copies of &CODE &ARGS 23181+* 011FEC FB44 C0E8 C0ED 120B0 120B5 23182+ SP T422V1,T422V2 011FF2 FB44 C0E8 C0ED 120B0 120B5 23183+ SP T422V1,T422V2 011FF8 FB44 C0E8 C0ED 120B0 120B5 23184+ SP T422V1,T422V2 011FFE FB44 C0E8 C0ED 120B0 120B5 23185+ SP T422V1,T422V2 012004 FB44 C0E8 C0ED 120B0 120B5 23186+ SP T422V1,T422V2 01200A FB44 C0E8 C0ED 120B0 120B5 23187+ SP T422V1,T422V2 012010 FB44 C0E8 C0ED 120B0 120B5 23188+ SP T422V1,T422V2 012016 FB44 C0E8 C0ED 120B0 120B5 23189+ SP T422V1,T422V2 01201C FB44 C0E8 C0ED 120B0 120B5 23190+ SP T422V1,T422V2 012022 FB44 C0E8 C0ED 120B0 120B5 23191+ SP T422V1,T422V2 012028 FB44 C0E8 C0ED 120B0 120B5 23192+ SP T422V1,T422V2 01202E FB44 C0E8 C0ED 120B0 120B5 23193+ SP T422V1,T422V2 012034 FB44 C0E8 C0ED 120B0 120B5 23194+ SP T422V1,T422V2 01203A FB44 C0E8 C0ED 120B0 120B5 23195+ SP T422V1,T422V2 012040 FB44 C0E8 C0ED 120B0 120B5 23196+ SP T422V1,T422V2 012046 FB44 C0E8 C0ED 120B0 120B5 23197+ SP T422V1,T422V2 01204C FB44 C0E8 C0ED 120B0 120B5 23198+ SP T422V1,T422V2 012052 FB44 C0E8 C0ED 120B0 120B5 23199+ SP T422V1,T422V2 012058 FB44 C0E8 C0ED 120B0 120B5 23200+ SP T422V1,T422V2 01205E FB44 C0E8 C0ED 120B0 120B5 23201+ SP T422V1,T422V2 012064 FB44 C0E8 C0ED 120B0 120B5 23202+ SP T422V1,T422V2 01206A FB44 C0E8 C0ED 120B0 120B5 23203+ SP T422V1,T422V2 012070 FB44 C0E8 C0ED 120B0 120B5 23204+ SP T422V1,T422V2 012076 FB44 C0E8 C0ED 120B0 120B5 23205+ SP T422V1,T422V2 01207C FB44 C0E8 C0ED 120B0 120B5 23206+ SP T422V1,T422V2 012082 FB44 C0E8 C0ED 120B0 120B5 23207+ SP T422V1,T422V2 012088 FB44 C0E8 C0ED 120B0 120B5 23208+ SP T422V1,T422V2 01208E FB44 C0E8 C0ED 120B0 120B5 23209+ SP T422V1,T422V2 012094 FB44 C0E8 C0ED 120B0 120B5 23210+ SP T422V1,T422V2 01209A FB44 C0E8 C0ED 120B0 120B5 23211+ SP T422V1,T422V2 23212+* 0120A0 06FB 23213 BCTR R15,R11 23214 TSIMRET 0120A2 58F0 C0F8 120C0 23215+ L R15,=A(SAVETST) R15 := current save area 0120A6 58DF 0004 00004 23216+ L R13,4(R15) get old save area back 0120AA 98EC D00C 0000C 23217+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 PAGE 425 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0120AE 07FE 23218+ BR 14 RETURN 02000000 23219 * 0120B0 000000000C 23220 T422V1 DC PL5'0' accululator 0120B5 066666660C 23221 T422V2 DC PL5'66666660' increment value 0120BA 999999999C 23222 T422V3 DC PL5'999999999' initial value 23223 TSIMEND 0120C0 23224+ LTORG 0120C0 00000458 23225 =A(SAVETST) 120C4 23226+T422TEND EQU * 23227 * 23228 * Test 423 -- SP m,m (30d) --------------------------------- 23229 * 23230 TSIMBEG T423,700,30,8,C'SP m,m (30d)' 23231+* 003844 23232+TDSCDAT CSECT 003848 23233+ DS 0D 23234+* 003848 000120C8 23235+T423TDSC DC A(T423) // TENTRY 00384C 0000011C 23236+ DC A(T423TEND-T423) // TLENGTH 003850 000002BC 23237+ DC F'700' // TLRCNT 003854 0000001E 23238+ DC F'30' // TIGCNT 003858 00000008 23239+ DC F'8' // TLTYPE 0019AF 23240+TEXT CSECT 0019AF E3F4F2F3 23241+SPTR2055 DC C'T423' 00385C 23242+TDSCDAT CSECT 00385C 23243+ DS 0F 00385C 040019AF 23244+ DC AL1(L'SPTR2055),AL3(SPTR2055) 0019B3 23245+TEXT CSECT 0019B3 E2D740946B94404D 23246+SPTR2056 DC C'SP m,m (30d)' 003860 23247+TDSCDAT CSECT 003860 23248+ DS 0F 003860 0C0019B3 23249+ DC AL1(L'SPTR2056),AL3(SPTR2056) 23250+* 004C34 23251+TDSCTBL CSECT 04C34 23252+T423TPTR EQU * 004C34 00003848 23253+ DC A(T423TDSC) enabled test 23254+* 0120C4 23255+TCODE CSECT 0120C8 23256+ DS 0D ensure double word alignment for test 0120C8 23257+T423 DS 0H 01650000 0120C8 90EC D00C 0000C 23258+ STM 14,12,12(13) SAVE REGISTERS 02950000 0120CC 18CF 23259+ LR R12,R15 base register := entry address 120C8 23260+ USING T423,R12 declare code base register 0120CE 41B0 C01E 120E6 23261+ LA R11,T423L load loop target to R11 0120D2 58F0 C118 121E0 23262+ L R15,=A(SAVETST) R15 := current save area 0120D6 50DF 0004 00004 23263+ ST R13,4(R15) set back pointer in current save area 0120DA 182D 23264+ LR R2,R13 remember callers save area 0120DC 18DF 23265+ LR R13,R15 setup current save area 0120DE 50D2 0008 00008 23266+ ST R13,8(R2) set forw pointer in callers save area 00000 23267+ USING TDSC,R1 declare TDSC base register 0120E2 58F0 1008 00008 23268+ L R15,TLRCNT load local repeat count to R15 23269+* 23270 * 0120E6 D20E C0E8 C106 121B0 121CE 23271 T423L MVC T423V1,T423V3 23272 REPINS SP,(T423V1,T423V2) repeat: SP T423V1,T423V2 PAGE 426 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 23273+* 23274+* build from sublist &ALIST a comma separated string &ARGS 23275+* 23276+* 23277+* 23278+* 23279+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 23280+* this allows to transfer the repeat count from last TDSCGEN call 23281+* 23282+* 23283+* 23284+* write a comment indicating what REPINS does (in case NOGEN in effect) 23285+* 23286+*,// REPINS: do 30 times: 23287+* 23288+* MNOTE requires that ' is doubled for expanded variables 23289+* thus build &MASTR as a copy of '&ARGS with ' doubled 23290+* 23291+* 23292+*,// SP T423V1,T423V2 23293+* 23294+* finally generate code: &ICNT copies of &CODE &ARGS 23295+* 0120EC FBEE C0E8 C0F7 121B0 121BF 23296+ SP T423V1,T423V2 0120F2 FBEE C0E8 C0F7 121B0 121BF 23297+ SP T423V1,T423V2 0120F8 FBEE C0E8 C0F7 121B0 121BF 23298+ SP T423V1,T423V2 0120FE FBEE C0E8 C0F7 121B0 121BF 23299+ SP T423V1,T423V2 012104 FBEE C0E8 C0F7 121B0 121BF 23300+ SP T423V1,T423V2 01210A FBEE C0E8 C0F7 121B0 121BF 23301+ SP T423V1,T423V2 012110 FBEE C0E8 C0F7 121B0 121BF 23302+ SP T423V1,T423V2 012116 FBEE C0E8 C0F7 121B0 121BF 23303+ SP T423V1,T423V2 01211C FBEE C0E8 C0F7 121B0 121BF 23304+ SP T423V1,T423V2 012122 FBEE C0E8 C0F7 121B0 121BF 23305+ SP T423V1,T423V2 012128 FBEE C0E8 C0F7 121B0 121BF 23306+ SP T423V1,T423V2 01212E FBEE C0E8 C0F7 121B0 121BF 23307+ SP T423V1,T423V2 012134 FBEE C0E8 C0F7 121B0 121BF 23308+ SP T423V1,T423V2 01213A FBEE C0E8 C0F7 121B0 121BF 23309+ SP T423V1,T423V2 012140 FBEE C0E8 C0F7 121B0 121BF 23310+ SP T423V1,T423V2 012146 FBEE C0E8 C0F7 121B0 121BF 23311+ SP T423V1,T423V2 01214C FBEE C0E8 C0F7 121B0 121BF 23312+ SP T423V1,T423V2 012152 FBEE C0E8 C0F7 121B0 121BF 23313+ SP T423V1,T423V2 012158 FBEE C0E8 C0F7 121B0 121BF 23314+ SP T423V1,T423V2 01215E FBEE C0E8 C0F7 121B0 121BF 23315+ SP T423V1,T423V2 012164 FBEE C0E8 C0F7 121B0 121BF 23316+ SP T423V1,T423V2 01216A FBEE C0E8 C0F7 121B0 121BF 23317+ SP T423V1,T423V2 012170 FBEE C0E8 C0F7 121B0 121BF 23318+ SP T423V1,T423V2 012176 FBEE C0E8 C0F7 121B0 121BF 23319+ SP T423V1,T423V2 01217C FBEE C0E8 C0F7 121B0 121BF 23320+ SP T423V1,T423V2 012182 FBEE C0E8 C0F7 121B0 121BF 23321+ SP T423V1,T423V2 012188 FBEE C0E8 C0F7 121B0 121BF 23322+ SP T423V1,T423V2 01218E FBEE C0E8 C0F7 121B0 121BF 23323+ SP T423V1,T423V2 012194 FBEE C0E8 C0F7 121B0 121BF 23324+ SP T423V1,T423V2 01219A FBEE C0E8 C0F7 121B0 121BF 23325+ SP T423V1,T423V2 23326+* 0121A0 06FB 23327 BCTR R15,R11 PAGE 427 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 23328 TSIMRET 0121A2 58F0 C118 121E0 23329+ L R15,=A(SAVETST) R15 := current save area 0121A6 58DF 0004 00004 23330+ L R13,4(R15) get old save area back 0121AA 98EC D00C 0000C 23331+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0121AE 07FE 23332+ BR 14 RETURN 02000000 23333 * 0121B0 0000000000000000 23334 T423V1 DC PL15'0' accululator 0121BF 0000012345678901 23335 T423V2 DC PL15'123456789012345678901234' decr (24 sign.dig) 0121CE 0123456789012345 23336 T423V3 DC PL15'1234567890123456789012345678' init (28 sign.dig) 23337 TSIMEND 0121E0 23338+ LTORG 0121E0 00000458 23339 =A(SAVETST) 121E4 23340+T423TEND EQU * 23341 * 23342 * Test 424 -- MP m,m (10d) --------------------------------- 23343 * 23344 TSIMBEG T424,900,20,7,C'MP m,m (10d)' 23345+* 003864 23346+TDSCDAT CSECT 003868 23347+ DS 0D 23348+* 003868 000121E8 23349+T424TDSC DC A(T424) // TENTRY 00386C 000000BC 23350+ DC A(T424TEND-T424) // TLENGTH 003870 00000384 23351+ DC F'900' // TLRCNT 003874 00000014 23352+ DC F'20' // TIGCNT 003878 00000007 23353+ DC F'7' // TLTYPE 0019BF 23354+TEXT CSECT 0019BF E3F4F2F4 23355+SPTR2067 DC C'T424' 00387C 23356+TDSCDAT CSECT 00387C 23357+ DS 0F 00387C 040019BF 23358+ DC AL1(L'SPTR2067),AL3(SPTR2067) 0019C3 23359+TEXT CSECT 0019C3 D4D740946B94404D 23360+SPTR2068 DC C'MP m,m (10d)' 003880 23361+TDSCDAT CSECT 003880 23362+ DS 0F 003880 0C0019C3 23363+ DC AL1(L'SPTR2068),AL3(SPTR2068) 23364+* 004C38 23365+TDSCTBL CSECT 04C38 23366+T424TPTR EQU * 004C38 00003868 23367+ DC A(T424TDSC) enabled test 23368+* 0121E4 23369+TCODE CSECT 0121E8 23370+ DS 0D ensure double word alignment for test 0121E8 23371+T424 DS 0H 01650000 0121E8 90EC D00C 0000C 23372+ STM 14,12,12(13) SAVE REGISTERS 02950000 0121EC 18CF 23373+ LR R12,R15 base register := entry address 121E8 23374+ USING T424,R12 declare code base register 0121EE 41B0 C01E 12206 23375+ LA R11,T424L load loop target to R11 0121F2 58F0 C0B8 122A0 23376+ L R15,=A(SAVETST) R15 := current save area 0121F6 50DF 0004 00004 23377+ ST R13,4(R15) set back pointer in current save area 0121FA 182D 23378+ LR R2,R13 remember callers save area 0121FC 18DF 23379+ LR R13,R15 setup current save area 0121FE 50D2 0008 00008 23380+ ST R13,8(R2) set forw pointer in callers save area 00000 23381+ USING TDSC,R1 declare TDSC base register 012202 58F0 1008 00008 23382+ L R15,TLRCNT load local repeat count to R15 PAGE 428 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 23383+* 23384 * 012206 D204 C0AC C0B2 12294 1229A 23385 T424L MVC T424V1,T424V3 23386 REPINS MP,(T424V1,T424V2) repeat: MP T424V1,T424V2 23387+* 23388+* build from sublist &ALIST a comma separated string &ARGS 23389+* 23390+* 23391+* 23392+* 23393+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 23394+* this allows to transfer the repeat count from last TDSCGEN call 23395+* 23396+* 23397+* 23398+* write a comment indicating what REPINS does (in case NOGEN in effect) 23399+* 23400+*,// REPINS: do 20 times: 23401+* 23402+* MNOTE requires that ' is doubled for expanded variables 23403+* thus build &MASTR as a copy of '&ARGS with ' doubled 23404+* 23405+* 23406+*,// MP T424V1,T424V2 23407+* 23408+* finally generate code: &ICNT copies of &CODE &ARGS 23409+* 01220C FC40 C0AC C0B1 12294 12299 23410+ MP T424V1,T424V2 012212 FC40 C0AC C0B1 12294 12299 23411+ MP T424V1,T424V2 012218 FC40 C0AC C0B1 12294 12299 23412+ MP T424V1,T424V2 01221E FC40 C0AC C0B1 12294 12299 23413+ MP T424V1,T424V2 012224 FC40 C0AC C0B1 12294 12299 23414+ MP T424V1,T424V2 01222A FC40 C0AC C0B1 12294 12299 23415+ MP T424V1,T424V2 012230 FC40 C0AC C0B1 12294 12299 23416+ MP T424V1,T424V2 012236 FC40 C0AC C0B1 12294 12299 23417+ MP T424V1,T424V2 01223C FC40 C0AC C0B1 12294 12299 23418+ MP T424V1,T424V2 012242 FC40 C0AC C0B1 12294 12299 23419+ MP T424V1,T424V2 012248 FC40 C0AC C0B1 12294 12299 23420+ MP T424V1,T424V2 01224E FC40 C0AC C0B1 12294 12299 23421+ MP T424V1,T424V2 012254 FC40 C0AC C0B1 12294 12299 23422+ MP T424V1,T424V2 01225A FC40 C0AC C0B1 12294 12299 23423+ MP T424V1,T424V2 012260 FC40 C0AC C0B1 12294 12299 23424+ MP T424V1,T424V2 012266 FC40 C0AC C0B1 12294 12299 23425+ MP T424V1,T424V2 01226C FC40 C0AC C0B1 12294 12299 23426+ MP T424V1,T424V2 012272 FC40 C0AC C0B1 12294 12299 23427+ MP T424V1,T424V2 012278 FC40 C0AC C0B1 12294 12299 23428+ MP T424V1,T424V2 01227E FC40 C0AC C0B1 12294 12299 23429+ MP T424V1,T424V2 23430+* 012284 06FB 23431 BCTR R15,R11 23432 TSIMRET 012286 58F0 C0B8 122A0 23433+ L R15,=A(SAVETST) R15 := current save area 01228A 58DF 0004 00004 23434+ L R13,4(R15) get old save area back 01228E 98EC D00C 0000C 23435+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012292 07FE 23436+ BR 14 RETURN 02000000 23437 * PAGE 429 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012294 000000000C 23438 T424V1 DC PL5'0' 012299 2C 23439 T424V2 DC PL1'2' 01229A 000000001C 23440 T424V3 DC PL5'1' 23441 TSIMEND 0122A0 23442+ LTORG 0122A0 00000458 23443 =A(SAVETST) 122A4 23444+T424TEND EQU * 23445 * 23446 * Test 425 -- MP m,m (30d) --------------------------------- 23447 * 23448 TSIMBEG T425,900,20,8,C'MP m,m (30d)' 23449+* 003884 23450+TDSCDAT CSECT 003888 23451+ DS 0D 23452+* 003888 000122A8 23453+T425TDSC DC A(T425) // TENTRY 00388C 000000D4 23454+ DC A(T425TEND-T425) // TLENGTH 003890 00000384 23455+ DC F'900' // TLRCNT 003894 00000014 23456+ DC F'20' // TIGCNT 003898 00000008 23457+ DC F'8' // TLTYPE 0019CF 23458+TEXT CSECT 0019CF E3F4F2F5 23459+SPTR2079 DC C'T425' 00389C 23460+TDSCDAT CSECT 00389C 23461+ DS 0F 00389C 040019CF 23462+ DC AL1(L'SPTR2079),AL3(SPTR2079) 0019D3 23463+TEXT CSECT 0019D3 D4D740946B94404D 23464+SPTR2080 DC C'MP m,m (30d)' 0038A0 23465+TDSCDAT CSECT 0038A0 23466+ DS 0F 0038A0 0C0019D3 23467+ DC AL1(L'SPTR2080),AL3(SPTR2080) 23468+* 004C3C 23469+TDSCTBL CSECT 04C3C 23470+T425TPTR EQU * 004C3C 00003888 23471+ DC A(T425TDSC) enabled test 23472+* 0122A4 23473+TCODE CSECT 0122A8 23474+ DS 0D ensure double word alignment for test 0122A8 23475+T425 DS 0H 01650000 0122A8 90EC D00C 0000C 23476+ STM 14,12,12(13) SAVE REGISTERS 02950000 0122AC 18CF 23477+ LR R12,R15 base register := entry address 122A8 23478+ USING T425,R12 declare code base register 0122AE 41B0 C01E 122C6 23479+ LA R11,T425L load loop target to R11 0122B2 58F0 C0D0 12378 23480+ L R15,=A(SAVETST) R15 := current save area 0122B6 50DF 0004 00004 23481+ ST R13,4(R15) set back pointer in current save area 0122BA 182D 23482+ LR R2,R13 remember callers save area 0122BC 18DF 23483+ LR R13,R15 setup current save area 0122BE 50D2 0008 00008 23484+ ST R13,8(R2) set forw pointer in callers save area 00000 23485+ USING TDSC,R1 declare TDSC base register 0122C2 58F0 1008 00008 23486+ L R15,TLRCNT load local repeat count to R15 23487+* 23488 * 0122C6 D20E C0AC C0BC 12354 12364 23489 T425L MVC T425V1,T425V3 23490 REPINS MP,(T425V1,T425V2) repeat: MP T425V1,T425V2 23491+* 23492+* build from sublist &ALIST a comma separated string &ARGS PAGE 430 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 23493+* 23494+* 23495+* 23496+* 23497+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 23498+* this allows to transfer the repeat count from last TDSCGEN call 23499+* 23500+* 23501+* 23502+* write a comment indicating what REPINS does (in case NOGEN in effect) 23503+* 23504+*,// REPINS: do 20 times: 23505+* 23506+* MNOTE requires that ' is doubled for expanded variables 23507+* thus build &MASTR as a copy of '&ARGS with ' doubled 23508+* 23509+* 23510+*,// MP T425V1,T425V2 23511+* 23512+* finally generate code: &ICNT copies of &CODE &ARGS 23513+* 0122CC FCE0 C0AC C0BB 12354 12363 23514+ MP T425V1,T425V2 0122D2 FCE0 C0AC C0BB 12354 12363 23515+ MP T425V1,T425V2 0122D8 FCE0 C0AC C0BB 12354 12363 23516+ MP T425V1,T425V2 0122DE FCE0 C0AC C0BB 12354 12363 23517+ MP T425V1,T425V2 0122E4 FCE0 C0AC C0BB 12354 12363 23518+ MP T425V1,T425V2 0122EA FCE0 C0AC C0BB 12354 12363 23519+ MP T425V1,T425V2 0122F0 FCE0 C0AC C0BB 12354 12363 23520+ MP T425V1,T425V2 0122F6 FCE0 C0AC C0BB 12354 12363 23521+ MP T425V1,T425V2 0122FC FCE0 C0AC C0BB 12354 12363 23522+ MP T425V1,T425V2 012302 FCE0 C0AC C0BB 12354 12363 23523+ MP T425V1,T425V2 012308 FCE0 C0AC C0BB 12354 12363 23524+ MP T425V1,T425V2 01230E FCE0 C0AC C0BB 12354 12363 23525+ MP T425V1,T425V2 012314 FCE0 C0AC C0BB 12354 12363 23526+ MP T425V1,T425V2 01231A FCE0 C0AC C0BB 12354 12363 23527+ MP T425V1,T425V2 012320 FCE0 C0AC C0BB 12354 12363 23528+ MP T425V1,T425V2 012326 FCE0 C0AC C0BB 12354 12363 23529+ MP T425V1,T425V2 01232C FCE0 C0AC C0BB 12354 12363 23530+ MP T425V1,T425V2 012332 FCE0 C0AC C0BB 12354 12363 23531+ MP T425V1,T425V2 012338 FCE0 C0AC C0BB 12354 12363 23532+ MP T425V1,T425V2 01233E FCE0 C0AC C0BB 12354 12363 23533+ MP T425V1,T425V2 23534+* 012344 06FB 23535 BCTR R15,R11 23536 TSIMRET 012346 58F0 C0D0 12378 23537+ L R15,=A(SAVETST) R15 := current save area 01234A 58DF 0004 00004 23538+ L R13,4(R15) get old save area back 01234E 98EC D00C 0000C 23539+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012352 07FE 23540+ BR 14 RETURN 02000000 23541 * 012354 0000000000000000 23542 T425V1 DC PL15'0' 012363 9D 23543 T425V2 DC PL1'-9' 012364 0000000000000000 23544 T425V3 DC PL15'1' 23545 TSIMEND 012378 23546+ LTORG 012378 00000458 23547 =A(SAVETST) PAGE 431 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 1237C 23548+T425TEND EQU * 23549 * 23550 * Test 426 -- DP m,m (10d) --------------------------------- 23551 * 23552 TSIMBEG T426,1000,10,1,C'MVC;DP m,m (10d)' 23553+* 0038A4 23554+TDSCDAT CSECT 0038A8 23555+ DS 0D 23556+* 0038A8 00012380 23557+T426TDSC DC A(T426) // TENTRY 0038AC 000000E4 23558+ DC A(T426TEND-T426) // TLENGTH 0038B0 000003E8 23559+ DC F'1000' // TLRCNT 0038B4 0000000A 23560+ DC F'10' // TIGCNT 0038B8 00000001 23561+ DC F'1' // TLTYPE 0019DF 23562+TEXT CSECT 0019DF E3F4F2F6 23563+SPTR2091 DC C'T426' 0038BC 23564+TDSCDAT CSECT 0038BC 23565+ DS 0F 0038BC 040019DF 23566+ DC AL1(L'SPTR2091),AL3(SPTR2091) 0019E3 23567+TEXT CSECT 0019E3 D4E5C35EC4D74094 23568+SPTR2092 DC C'MVC;DP m,m (10d)' 0038C0 23569+TDSCDAT CSECT 0038C0 23570+ DS 0F 0038C0 100019E3 23571+ DC AL1(L'SPTR2092),AL3(SPTR2092) 23572+* 004C40 23573+TDSCTBL CSECT 04C40 23574+T426TPTR EQU * 004C40 000038A8 23575+ DC A(T426TDSC) enabled test 23576+* 01237C 23577+TCODE CSECT 012380 23578+ DS 0D ensure double word alignment for test 012380 23579+T426 DS 0H 01650000 012380 90EC D00C 0000C 23580+ STM 14,12,12(13) SAVE REGISTERS 02950000 012384 18CF 23581+ LR R12,R15 base register := entry address 12380 23582+ USING T426,R12 declare code base register 012386 41B0 C01E 1239E 23583+ LA R11,T426L load loop target to R11 01238A 58F0 C0E0 12460 23584+ L R15,=A(SAVETST) R15 := current save area 01238E 50DF 0004 00004 23585+ ST R13,4(R15) set back pointer in current save area 012392 182D 23586+ LR R2,R13 remember callers save area 012394 18DF 23587+ LR R13,R15 setup current save area 012396 50D2 0008 00008 23588+ ST R13,8(R2) set forw pointer in callers save area 00000 23589+ USING TDSC,R1 declare TDSC base register 01239A 58F0 1008 00008 23590+ L R15,TLRCNT load local repeat count to R15 23591+* 23592 * 01239E D204 C0A6 C0AD 12426 1242D 23593 T426L MVC T426V1,T426V10 0123A4 FD41 C0A6 C0AB 12426 1242B 23594 DP T426V1,T426V2 0123AA D204 C0A6 C0B2 12426 12432 23595 MVC T426V1,T426V11 0123B0 FD41 C0A6 C0AB 12426 1242B 23596 DP T426V1,T426V2 0123B6 D204 C0A6 C0B7 12426 12437 23597 MVC T426V1,T426V12 0123BC FD41 C0A6 C0AB 12426 1242B 23598 DP T426V1,T426V2 0123C2 D204 C0A6 C0BC 12426 1243C 23599 MVC T426V1,T426V13 0123C8 FD41 C0A6 C0AB 12426 1242B 23600 DP T426V1,T426V2 0123CE D204 C0A6 C0C1 12426 12441 23601 MVC T426V1,T426V14 0123D4 FD41 C0A6 C0AB 12426 1242B 23602 DP T426V1,T426V2 PAGE 432 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0123DA D204 C0A6 C0C6 12426 12446 23603 MVC T426V1,T426V15 0123E0 FD41 C0A6 C0AB 12426 1242B 23604 DP T426V1,T426V2 0123E6 D204 C0A6 C0CB 12426 1244B 23605 MVC T426V1,T426V16 0123EC FD41 C0A6 C0AB 12426 1242B 23606 DP T426V1,T426V2 0123F2 D204 C0A6 C0D0 12426 12450 23607 MVC T426V1,T426V17 0123F8 FD41 C0A6 C0AB 12426 1242B 23608 DP T426V1,T426V2 0123FE D204 C0A6 C0D5 12426 12455 23609 MVC T426V1,T426V18 012404 FD41 C0A6 C0AB 12426 1242B 23610 DP T426V1,T426V2 01240A D204 C0A6 C0DA 12426 1245A 23611 MVC T426V1,T426V19 012410 FD41 C0A6 C0AB 12426 1242B 23612 DP T426V1,T426V2 012416 06FB 23613 BCTR R15,R11 23614 TSIMRET 012418 58F0 C0E0 12460 23615+ L R15,=A(SAVETST) R15 := current save area 01241C 58DF 0004 00004 23616+ L R13,4(R15) get old save area back 012420 98EC D00C 0000C 23617+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012424 07FE 23618+ BR 14 RETURN 02000000 23619 * 012426 000000000C 23620 T426V1 DC PL5'0' 01242B 017C 23621 T426V2 DC PL2'17' 01242D 000987654C 23622 T426V10 DC PL5'987654' 012432 000876543C 23623 T426V11 DC PL5'876543' 012437 000765432C 23624 T426V12 DC PL5'765432' 01243C 000654321C 23625 T426V13 DC PL5'654321' 012441 000543210C 23626 T426V14 DC PL5'543210' 012446 000432109C 23627 T426V15 DC PL5'432109' 01244B 000321098C 23628 T426V16 DC PL5'321098' 012450 000210987C 23629 T426V17 DC PL5'210987' 012455 000109876C 23630 T426V18 DC PL5'109876' 01245A 000098765C 23631 T426V19 DC PL5'98765' 23632 TSIMEND 012460 23633+ LTORG 012460 00000458 23634 =A(SAVETST) 12464 23635+T426TEND EQU * 23636 * 23637 * Test 427 -- DP m,m (30d) --------------------------------- 23638 * 23639 TSIMBEG T427,500,10,1,C'MVC;DP m,m (30d)' 23640+* 0038C4 23641+TDSCDAT CSECT 0038C8 23642+ DS 0D 23643+* 0038C8 00012468 23644+T427TDSC DC A(T427) // TENTRY 0038CC 00000154 23645+ DC A(T427TEND-T427) // TLENGTH 0038D0 000001F4 23646+ DC F'500' // TLRCNT 0038D4 0000000A 23647+ DC F'10' // TIGCNT 0038D8 00000001 23648+ DC F'1' // TLTYPE 0019F3 23649+TEXT CSECT 0019F3 E3F4F2F7 23650+SPTR2100 DC C'T427' 0038DC 23651+TDSCDAT CSECT 0038DC 23652+ DS 0F 0038DC 040019F3 23653+ DC AL1(L'SPTR2100),AL3(SPTR2100) 0019F7 23654+TEXT CSECT 0019F7 D4E5C35EC4D74094 23655+SPTR2101 DC C'MVC;DP m,m (30d)' 0038E0 23656+TDSCDAT CSECT 0038E0 23657+ DS 0F PAGE 433 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0038E0 100019F7 23658+ DC AL1(L'SPTR2101),AL3(SPTR2101) 23659+* 004C44 23660+TDSCTBL CSECT 04C44 23661+T427TPTR EQU * 004C44 000038C8 23662+ DC A(T427TDSC) enabled test 23663+* 012464 23664+TCODE CSECT 012468 23665+ DS 0D ensure double word alignment for test 012468 23666+T427 DS 0H 01650000 012468 90EC D00C 0000C 23667+ STM 14,12,12(13) SAVE REGISTERS 02950000 01246C 18CF 23668+ LR R12,R15 base register := entry address 12468 23669+ USING T427,R12 declare code base register 01246E 41B0 C01E 12486 23670+ LA R11,T427L load loop target to R11 012472 58F0 C150 125B8 23671+ L R15,=A(SAVETST) R15 := current save area 012476 50DF 0004 00004 23672+ ST R13,4(R15) set back pointer in current save area 01247A 182D 23673+ LR R2,R13 remember callers save area 01247C 18DF 23674+ LR R13,R15 setup current save area 01247E 50D2 0008 00008 23675+ ST R13,8(R2) set forw pointer in callers save area 00000 23676+ USING TDSC,R1 declare TDSC base register 012482 58F0 1008 00008 23677+ L R15,TLRCNT load local repeat count to R15 23678+* 23679 * 012486 D20E C0A6 C0B7 1250E 1251F 23680 T427L MVC T427V1,T427V10 01248C FDE1 C0A6 C0B5 1250E 1251D 23681 DP T427V1,T427V2 012492 D20E C0A6 C0C6 1250E 1252E 23682 MVC T427V1,T427V11 012498 FDE1 C0A6 C0B5 1250E 1251D 23683 DP T427V1,T427V2 01249E D20E C0A6 C0D5 1250E 1253D 23684 MVC T427V1,T427V12 0124A4 FDE1 C0A6 C0B5 1250E 1251D 23685 DP T427V1,T427V2 0124AA D20E C0A6 C0E4 1250E 1254C 23686 MVC T427V1,T427V13 0124B0 FDE1 C0A6 C0B5 1250E 1251D 23687 DP T427V1,T427V2 0124B6 D20E C0A6 C0F3 1250E 1255B 23688 MVC T427V1,T427V14 0124BC FDE1 C0A6 C0B5 1250E 1251D 23689 DP T427V1,T427V2 0124C2 D20E C0A6 C102 1250E 1256A 23690 MVC T427V1,T427V15 0124C8 FDE1 C0A6 C0B5 1250E 1251D 23691 DP T427V1,T427V2 0124CE D20E C0A6 C111 1250E 12579 23692 MVC T427V1,T427V16 0124D4 FDE1 C0A6 C0B5 1250E 1251D 23693 DP T427V1,T427V2 0124DA D20E C0A6 C120 1250E 12588 23694 MVC T427V1,T427V17 0124E0 FDE1 C0A6 C0B5 1250E 1251D 23695 DP T427V1,T427V2 0124E6 D20E C0A6 C12F 1250E 12597 23696 MVC T427V1,T427V18 0124EC FDE1 C0A6 C0B5 1250E 1251D 23697 DP T427V1,T427V2 0124F2 D20E C0A6 C13E 1250E 125A6 23698 MVC T427V1,T427V19 0124F8 FDE1 C0A6 C0B5 1250E 1251D 23699 DP T427V1,T427V2 0124FE 06FB 23700 BCTR R15,R11 23701 TSIMRET 012500 58F0 C150 125B8 23702+ L R15,=A(SAVETST) R15 := current save area 012504 58DF 0004 00004 23703+ L R13,4(R15) get old save area back 012508 98EC D00C 0000C 23704+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01250C 07FE 23705+ BR 14 RETURN 02000000 23706 * 01250E 0000000000000000 23707 T427V1 DC PL15'0' 01251D 177C 23708 T427V2 DC PL2'177' 01251F 0009876543210987 23709 T427V10 DC PL15'98765432109876543210987654' 01252E 0008765432109876 23710 T427V11 DC PL15'87654321098765432109876543' 01253D 0007654321098765 23711 T427V12 DC PL15'76543210987654321098765432' 01254C 0006543210987654 23712 T427V13 DC PL15'65432109876543210987654321' PAGE 434 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01255B 0005432109876543 23713 T427V14 DC PL15'54321098765432109876543210' 01256A 0004321098765432 23714 T427V15 DC PL15'43210987654321098765432109' 012579 0003210987654321 23715 T427V16 DC PL15'32109876543210987654321098' 012588 0002109876543210 23716 T427V17 DC PL15'21098765432109876543210987' 012597 0001098765432109 23717 T427V18 DC PL15'10987654321098765432109876' 0125A6 0000987654321098 23718 T427V19 DC PL15'9876543210987654321098765' 23719 TSIMEND 0125B8 23720+ LTORG 0125B8 00000458 23721 =A(SAVETST) 125BC 23722+T427TEND EQU * 23723 * 23724 * Test 43x -- decimal compare ============================== 23725 * 23726 * Test 430 -- CP m,m (10d) --------------------------------- 23727 * 23728 TSIMBEG T430,1000,30,1,C'CP m,m (10d)' 23729+* 0038E4 23730+TDSCDAT CSECT 0038E8 23731+ DS 0D 23732+* 0038E8 000125C0 23733+T430TDSC DC A(T430) // TENTRY 0038EC 000000F4 23734+ DC A(T430TEND-T430) // TLENGTH 0038F0 000003E8 23735+ DC F'1000' // TLRCNT 0038F4 0000001E 23736+ DC F'30' // TIGCNT 0038F8 00000001 23737+ DC F'1' // TLTYPE 001A07 23738+TEXT CSECT 001A07 E3F4F3F0 23739+SPTR2109 DC C'T430' 0038FC 23740+TDSCDAT CSECT 0038FC 23741+ DS 0F 0038FC 04001A07 23742+ DC AL1(L'SPTR2109),AL3(SPTR2109) 001A0B 23743+TEXT CSECT 001A0B C3D740946B94404D 23744+SPTR2110 DC C'CP m,m (10d)' 003900 23745+TDSCDAT CSECT 003900 23746+ DS 0F 003900 0C001A0B 23747+ DC AL1(L'SPTR2110),AL3(SPTR2110) 23748+* 004C48 23749+TDSCTBL CSECT 04C48 23750+T430TPTR EQU * 004C48 000038E8 23751+ DC A(T430TDSC) enabled test 23752+* 0125BC 23753+TCODE CSECT 0125C0 23754+ DS 0D ensure double word alignment for test 0125C0 23755+T430 DS 0H 01650000 0125C0 90EC D00C 0000C 23756+ STM 14,12,12(13) SAVE REGISTERS 02950000 0125C4 18CF 23757+ LR R12,R15 base register := entry address 125C0 23758+ USING T430,R12 declare code base register 0125C6 41B0 C01E 125DE 23759+ LA R11,T430L load loop target to R11 0125CA 58F0 C0F0 126B0 23760+ L R15,=A(SAVETST) R15 := current save area 0125CE 50DF 0004 00004 23761+ ST R13,4(R15) set back pointer in current save area 0125D2 182D 23762+ LR R2,R13 remember callers save area 0125D4 18DF 23763+ LR R13,R15 setup current save area 0125D6 50D2 0008 00008 23764+ ST R13,8(R2) set forw pointer in callers save area 00000 23765+ USING TDSC,R1 declare TDSC base register 0125DA 58F0 1008 00008 23766+ L R15,TLRCNT load local repeat count to R15 23767+* PAGE 435 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 23768 * 23769 T430L REPINS CP,(T430V1,T430V2) repeat: CP T430V1,T430V2 23770+* 23771+* build from sublist &ALIST a comma separated string &ARGS 23772+* 23773+* 23774+* 23775+* 23776+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 23777+* this allows to transfer the repeat count from last TDSCGEN call 23778+* 23779+* 125DE 23780+T430L EQU * 23781+* 23782+* write a comment indicating what REPINS does (in case NOGEN in effect) 23783+* 23784+*,// REPINS: do 30 times: 23785+* 23786+* MNOTE requires that ' is doubled for expanded variables 23787+* thus build &MASTR as a copy of '&ARGS with ' doubled 23788+* 23789+* 23790+*,// CP T430V1,T430V2 23791+* 23792+* finally generate code: &ICNT copies of &CODE &ARGS 23793+* 0125DE F944 C0E2 C0E7 126A2 126A7 23794+ CP T430V1,T430V2 0125E4 F944 C0E2 C0E7 126A2 126A7 23795+ CP T430V1,T430V2 0125EA F944 C0E2 C0E7 126A2 126A7 23796+ CP T430V1,T430V2 0125F0 F944 C0E2 C0E7 126A2 126A7 23797+ CP T430V1,T430V2 0125F6 F944 C0E2 C0E7 126A2 126A7 23798+ CP T430V1,T430V2 0125FC F944 C0E2 C0E7 126A2 126A7 23799+ CP T430V1,T430V2 012602 F944 C0E2 C0E7 126A2 126A7 23800+ CP T430V1,T430V2 012608 F944 C0E2 C0E7 126A2 126A7 23801+ CP T430V1,T430V2 01260E F944 C0E2 C0E7 126A2 126A7 23802+ CP T430V1,T430V2 012614 F944 C0E2 C0E7 126A2 126A7 23803+ CP T430V1,T430V2 01261A F944 C0E2 C0E7 126A2 126A7 23804+ CP T430V1,T430V2 012620 F944 C0E2 C0E7 126A2 126A7 23805+ CP T430V1,T430V2 012626 F944 C0E2 C0E7 126A2 126A7 23806+ CP T430V1,T430V2 01262C F944 C0E2 C0E7 126A2 126A7 23807+ CP T430V1,T430V2 012632 F944 C0E2 C0E7 126A2 126A7 23808+ CP T430V1,T430V2 012638 F944 C0E2 C0E7 126A2 126A7 23809+ CP T430V1,T430V2 01263E F944 C0E2 C0E7 126A2 126A7 23810+ CP T430V1,T430V2 012644 F944 C0E2 C0E7 126A2 126A7 23811+ CP T430V1,T430V2 01264A F944 C0E2 C0E7 126A2 126A7 23812+ CP T430V1,T430V2 012650 F944 C0E2 C0E7 126A2 126A7 23813+ CP T430V1,T430V2 012656 F944 C0E2 C0E7 126A2 126A7 23814+ CP T430V1,T430V2 01265C F944 C0E2 C0E7 126A2 126A7 23815+ CP T430V1,T430V2 012662 F944 C0E2 C0E7 126A2 126A7 23816+ CP T430V1,T430V2 012668 F944 C0E2 C0E7 126A2 126A7 23817+ CP T430V1,T430V2 01266E F944 C0E2 C0E7 126A2 126A7 23818+ CP T430V1,T430V2 012674 F944 C0E2 C0E7 126A2 126A7 23819+ CP T430V1,T430V2 01267A F944 C0E2 C0E7 126A2 126A7 23820+ CP T430V1,T430V2 012680 F944 C0E2 C0E7 126A2 126A7 23821+ CP T430V1,T430V2 012686 F944 C0E2 C0E7 126A2 126A7 23822+ CP T430V1,T430V2 PAGE 436 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01268C F944 C0E2 C0E7 126A2 126A7 23823+ CP T430V1,T430V2 23824+* 012692 06FB 23825 BCTR R15,R11 23826 TSIMRET 012694 58F0 C0F0 126B0 23827+ L R15,=A(SAVETST) R15 := current save area 012698 58DF 0004 00004 23828+ L R13,4(R15) get old save area back 01269C 98EC D00C 0000C 23829+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0126A0 07FE 23830+ BR 14 RETURN 02000000 23831 * 0126A2 999999999C 23832 T430V1 DC PL5'999999999' 0126A7 999999998C 23833 T430V2 DC PL5'999999998' 23834 TSIMEND 0126B0 23835+ LTORG 0126B0 00000458 23836 =A(SAVETST) 126B4 23837+T430TEND EQU * 23838 * 23839 * Test 431 -- CP m,m (30d) --------------------------------- 23840 * 23841 TSIMBEG T431,1000,30,1,C'CP m,m (30d)' 23842+* 003904 23843+TDSCDAT CSECT 003908 23844+ DS 0D 23845+* 003908 000126B8 23846+T431TDSC DC A(T431) // TENTRY 00390C 00000104 23847+ DC A(T431TEND-T431) // TLENGTH 003910 000003E8 23848+ DC F'1000' // TLRCNT 003914 0000001E 23849+ DC F'30' // TIGCNT 003918 00000001 23850+ DC F'1' // TLTYPE 001A17 23851+TEXT CSECT 001A17 E3F4F3F1 23852+SPTR2121 DC C'T431' 00391C 23853+TDSCDAT CSECT 00391C 23854+ DS 0F 00391C 04001A17 23855+ DC AL1(L'SPTR2121),AL3(SPTR2121) 001A1B 23856+TEXT CSECT 001A1B C3D740946B94404D 23857+SPTR2122 DC C'CP m,m (30d)' 003920 23858+TDSCDAT CSECT 003920 23859+ DS 0F 003920 0C001A1B 23860+ DC AL1(L'SPTR2122),AL3(SPTR2122) 23861+* 004C4C 23862+TDSCTBL CSECT 04C4C 23863+T431TPTR EQU * 004C4C 00003908 23864+ DC A(T431TDSC) enabled test 23865+* 0126B4 23866+TCODE CSECT 0126B8 23867+ DS 0D ensure double word alignment for test 0126B8 23868+T431 DS 0H 01650000 0126B8 90EC D00C 0000C 23869+ STM 14,12,12(13) SAVE REGISTERS 02950000 0126BC 18CF 23870+ LR R12,R15 base register := entry address 126B8 23871+ USING T431,R12 declare code base register 0126BE 41B0 C01E 126D6 23872+ LA R11,T431L load loop target to R11 0126C2 58F0 C100 127B8 23873+ L R15,=A(SAVETST) R15 := current save area 0126C6 50DF 0004 00004 23874+ ST R13,4(R15) set back pointer in current save area 0126CA 182D 23875+ LR R2,R13 remember callers save area 0126CC 18DF 23876+ LR R13,R15 setup current save area 0126CE 50D2 0008 00008 23877+ ST R13,8(R2) set forw pointer in callers save area PAGE 437 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00000 23878+ USING TDSC,R1 declare TDSC base register 0126D2 58F0 1008 00008 23879+ L R15,TLRCNT load local repeat count to R15 23880+* 23881 * 23882 T431L REPINS CP,(T431V1,T431V2) repeat: CP T431V1,T431V2 23883+* 23884+* build from sublist &ALIST a comma separated string &ARGS 23885+* 23886+* 23887+* 23888+* 23889+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 23890+* this allows to transfer the repeat count from last TDSCGEN call 23891+* 23892+* 126D6 23893+T431L EQU * 23894+* 23895+* write a comment indicating what REPINS does (in case NOGEN in effect) 23896+* 23897+*,// REPINS: do 30 times: 23898+* 23899+* MNOTE requires that ' is doubled for expanded variables 23900+* thus build &MASTR as a copy of '&ARGS with ' doubled 23901+* 23902+* 23903+*,// CP T431V1,T431V2 23904+* 23905+* finally generate code: &ICNT copies of &CODE &ARGS 23906+* 0126D6 F9EE C0E2 C0F1 1279A 127A9 23907+ CP T431V1,T431V2 0126DC F9EE C0E2 C0F1 1279A 127A9 23908+ CP T431V1,T431V2 0126E2 F9EE C0E2 C0F1 1279A 127A9 23909+ CP T431V1,T431V2 0126E8 F9EE C0E2 C0F1 1279A 127A9 23910+ CP T431V1,T431V2 0126EE F9EE C0E2 C0F1 1279A 127A9 23911+ CP T431V1,T431V2 0126F4 F9EE C0E2 C0F1 1279A 127A9 23912+ CP T431V1,T431V2 0126FA F9EE C0E2 C0F1 1279A 127A9 23913+ CP T431V1,T431V2 012700 F9EE C0E2 C0F1 1279A 127A9 23914+ CP T431V1,T431V2 012706 F9EE C0E2 C0F1 1279A 127A9 23915+ CP T431V1,T431V2 01270C F9EE C0E2 C0F1 1279A 127A9 23916+ CP T431V1,T431V2 012712 F9EE C0E2 C0F1 1279A 127A9 23917+ CP T431V1,T431V2 012718 F9EE C0E2 C0F1 1279A 127A9 23918+ CP T431V1,T431V2 01271E F9EE C0E2 C0F1 1279A 127A9 23919+ CP T431V1,T431V2 012724 F9EE C0E2 C0F1 1279A 127A9 23920+ CP T431V1,T431V2 01272A F9EE C0E2 C0F1 1279A 127A9 23921+ CP T431V1,T431V2 012730 F9EE C0E2 C0F1 1279A 127A9 23922+ CP T431V1,T431V2 012736 F9EE C0E2 C0F1 1279A 127A9 23923+ CP T431V1,T431V2 01273C F9EE C0E2 C0F1 1279A 127A9 23924+ CP T431V1,T431V2 012742 F9EE C0E2 C0F1 1279A 127A9 23925+ CP T431V1,T431V2 012748 F9EE C0E2 C0F1 1279A 127A9 23926+ CP T431V1,T431V2 01274E F9EE C0E2 C0F1 1279A 127A9 23927+ CP T431V1,T431V2 012754 F9EE C0E2 C0F1 1279A 127A9 23928+ CP T431V1,T431V2 01275A F9EE C0E2 C0F1 1279A 127A9 23929+ CP T431V1,T431V2 012760 F9EE C0E2 C0F1 1279A 127A9 23930+ CP T431V1,T431V2 012766 F9EE C0E2 C0F1 1279A 127A9 23931+ CP T431V1,T431V2 01276C F9EE C0E2 C0F1 1279A 127A9 23932+ CP T431V1,T431V2 PAGE 438 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012772 F9EE C0E2 C0F1 1279A 127A9 23933+ CP T431V1,T431V2 012778 F9EE C0E2 C0F1 1279A 127A9 23934+ CP T431V1,T431V2 01277E F9EE C0E2 C0F1 1279A 127A9 23935+ CP T431V1,T431V2 012784 F9EE C0E2 C0F1 1279A 127A9 23936+ CP T431V1,T431V2 23937+* 01278A 06FB 23938 BCTR R15,R11 23939 TSIMRET 01278C 58F0 C100 127B8 23940+ L R15,=A(SAVETST) R15 := current save area 012790 58DF 0004 00004 23941+ L R13,4(R15) get old save area back 012794 98EC D00C 0000C 23942+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012798 07FE 23943+ BR 14 RETURN 02000000 23944 * 01279A 0123456789012345 23945 T431V1 DC PL15'1234567890123456789012345678' 0127A9 0123456789012345 23946 T431V2 DC PL15'1234567890123456789012345677' 23947 TSIMEND 0127B8 23948+ LTORG 0127B8 00000458 23949 =A(SAVETST) 127BC 23950+T431TEND EQU * 23951 * 23952 * Test 44x -- ZAP,SRP ====================================== 23953 * 23954 * 23955 * Test 440 -- ZAP m,m (10d,10d) ---------------------------- 23956 * 23957 TSIMBEG T440,1600,30,1,C'ZAP m,m (10d,10d)' 23958+* 003924 23959+TDSCDAT CSECT 003928 23960+ DS 0D 23961+* 003928 000127C0 23962+T440TDSC DC A(T440) // TENTRY 00392C 000000F4 23963+ DC A(T440TEND-T440) // TLENGTH 003930 00000640 23964+ DC F'1600' // TLRCNT 003934 0000001E 23965+ DC F'30' // TIGCNT 003938 00000001 23966+ DC F'1' // TLTYPE 001A27 23967+TEXT CSECT 001A27 E3F4F4F0 23968+SPTR2133 DC C'T440' 00393C 23969+TDSCDAT CSECT 00393C 23970+ DS 0F 00393C 04001A27 23971+ DC AL1(L'SPTR2133),AL3(SPTR2133) 001A2B 23972+TEXT CSECT 001A2B E9C1D740946B9440 23973+SPTR2134 DC C'ZAP m,m (10d,10d)' 003940 23974+TDSCDAT CSECT 003940 23975+ DS 0F 003940 11001A2B 23976+ DC AL1(L'SPTR2134),AL3(SPTR2134) 23977+* 004C50 23978+TDSCTBL CSECT 04C50 23979+T440TPTR EQU * 004C50 00003928 23980+ DC A(T440TDSC) enabled test 23981+* 0127BC 23982+TCODE CSECT 0127C0 23983+ DS 0D ensure double word alignment for test 0127C0 23984+T440 DS 0H 01650000 0127C0 90EC D00C 0000C 23985+ STM 14,12,12(13) SAVE REGISTERS 02950000 0127C4 18CF 23986+ LR R12,R15 base register := entry address 127C0 23987+ USING T440,R12 declare code base register PAGE 439 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0127C6 41B0 C01E 127DE 23988+ LA R11,T440L load loop target to R11 0127CA 58F0 C0F0 128B0 23989+ L R15,=A(SAVETST) R15 := current save area 0127CE 50DF 0004 00004 23990+ ST R13,4(R15) set back pointer in current save area 0127D2 182D 23991+ LR R2,R13 remember callers save area 0127D4 18DF 23992+ LR R13,R15 setup current save area 0127D6 50D2 0008 00008 23993+ ST R13,8(R2) set forw pointer in callers save area 00000 23994+ USING TDSC,R1 declare TDSC base register 0127DA 58F0 1008 00008 23995+ L R15,TLRCNT load local repeat count to R15 23996+* 23997 * 23998 T440L REPINS ZAP,(T440V1,T440V2) repeat: ZAP T440V1,T440V2 23999+* 24000+* build from sublist &ALIST a comma separated string &ARGS 24001+* 24002+* 24003+* 24004+* 24005+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 24006+* this allows to transfer the repeat count from last TDSCGEN call 24007+* 24008+* 127DE 24009+T440L EQU * 24010+* 24011+* write a comment indicating what REPINS does (in case NOGEN in effect) 24012+* 24013+*,// REPINS: do 30 times: 24014+* 24015+* MNOTE requires that ' is doubled for expanded variables 24016+* thus build &MASTR as a copy of '&ARGS with ' doubled 24017+* 24018+* 24019+*,// ZAP T440V1,T440V2 24020+* 24021+* finally generate code: &ICNT copies of &CODE &ARGS 24022+* 0127DE F844 C0E2 C0E7 128A2 128A7 24023+ ZAP T440V1,T440V2 0127E4 F844 C0E2 C0E7 128A2 128A7 24024+ ZAP T440V1,T440V2 0127EA F844 C0E2 C0E7 128A2 128A7 24025+ ZAP T440V1,T440V2 0127F0 F844 C0E2 C0E7 128A2 128A7 24026+ ZAP T440V1,T440V2 0127F6 F844 C0E2 C0E7 128A2 128A7 24027+ ZAP T440V1,T440V2 0127FC F844 C0E2 C0E7 128A2 128A7 24028+ ZAP T440V1,T440V2 012802 F844 C0E2 C0E7 128A2 128A7 24029+ ZAP T440V1,T440V2 012808 F844 C0E2 C0E7 128A2 128A7 24030+ ZAP T440V1,T440V2 01280E F844 C0E2 C0E7 128A2 128A7 24031+ ZAP T440V1,T440V2 012814 F844 C0E2 C0E7 128A2 128A7 24032+ ZAP T440V1,T440V2 01281A F844 C0E2 C0E7 128A2 128A7 24033+ ZAP T440V1,T440V2 012820 F844 C0E2 C0E7 128A2 128A7 24034+ ZAP T440V1,T440V2 012826 F844 C0E2 C0E7 128A2 128A7 24035+ ZAP T440V1,T440V2 01282C F844 C0E2 C0E7 128A2 128A7 24036+ ZAP T440V1,T440V2 012832 F844 C0E2 C0E7 128A2 128A7 24037+ ZAP T440V1,T440V2 012838 F844 C0E2 C0E7 128A2 128A7 24038+ ZAP T440V1,T440V2 01283E F844 C0E2 C0E7 128A2 128A7 24039+ ZAP T440V1,T440V2 012844 F844 C0E2 C0E7 128A2 128A7 24040+ ZAP T440V1,T440V2 01284A F844 C0E2 C0E7 128A2 128A7 24041+ ZAP T440V1,T440V2 012850 F844 C0E2 C0E7 128A2 128A7 24042+ ZAP T440V1,T440V2 PAGE 440 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012856 F844 C0E2 C0E7 128A2 128A7 24043+ ZAP T440V1,T440V2 01285C F844 C0E2 C0E7 128A2 128A7 24044+ ZAP T440V1,T440V2 012862 F844 C0E2 C0E7 128A2 128A7 24045+ ZAP T440V1,T440V2 012868 F844 C0E2 C0E7 128A2 128A7 24046+ ZAP T440V1,T440V2 01286E F844 C0E2 C0E7 128A2 128A7 24047+ ZAP T440V1,T440V2 012874 F844 C0E2 C0E7 128A2 128A7 24048+ ZAP T440V1,T440V2 01287A F844 C0E2 C0E7 128A2 128A7 24049+ ZAP T440V1,T440V2 012880 F844 C0E2 C0E7 128A2 128A7 24050+ ZAP T440V1,T440V2 012886 F844 C0E2 C0E7 128A2 128A7 24051+ ZAP T440V1,T440V2 01288C F844 C0E2 C0E7 128A2 128A7 24052+ ZAP T440V1,T440V2 24053+* 012892 06FB 24054 BCTR R15,R11 24055 TSIMRET 012894 58F0 C0F0 128B0 24056+ L R15,=A(SAVETST) R15 := current save area 012898 58DF 0004 00004 24057+ L R13,4(R15) get old save area back 01289C 98EC D00C 0000C 24058+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0128A0 07FE 24059+ BR 14 RETURN 02000000 24060 * 0128A2 000000000C 24061 T440V1 DC PL5'0' 0128A7 999999999C 24062 T440V2 DC PL5'999999999' 24063 TSIMEND 0128B0 24064+ LTORG 0128B0 00000458 24065 =A(SAVETST) 128B4 24066+T440TEND EQU * 24067 * 24068 * Test 441 -- ZAP m,m (30d,30d) ---------------------------- 24069 * 24070 TSIMBEG T441,1600,30,1,C'ZAP m,m (30d,30d)' 24071+* 003944 24072+TDSCDAT CSECT 003948 24073+ DS 0D 24074+* 003948 000128B8 24075+T441TDSC DC A(T441) // TENTRY 00394C 00000104 24076+ DC A(T441TEND-T441) // TLENGTH 003950 00000640 24077+ DC F'1600' // TLRCNT 003954 0000001E 24078+ DC F'30' // TIGCNT 003958 00000001 24079+ DC F'1' // TLTYPE 001A3C 24080+TEXT CSECT 001A3C E3F4F4F1 24081+SPTR2145 DC C'T441' 00395C 24082+TDSCDAT CSECT 00395C 24083+ DS 0F 00395C 04001A3C 24084+ DC AL1(L'SPTR2145),AL3(SPTR2145) 001A40 24085+TEXT CSECT 001A40 E9C1D740946B9440 24086+SPTR2146 DC C'ZAP m,m (30d,30d)' 003960 24087+TDSCDAT CSECT 003960 24088+ DS 0F 003960 11001A40 24089+ DC AL1(L'SPTR2146),AL3(SPTR2146) 24090+* 004C54 24091+TDSCTBL CSECT 04C54 24092+T441TPTR EQU * 004C54 00003948 24093+ DC A(T441TDSC) enabled test 24094+* 0128B4 24095+TCODE CSECT 0128B8 24096+ DS 0D ensure double word alignment for test 0128B8 24097+T441 DS 0H 01650000 PAGE 441 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0128B8 90EC D00C 0000C 24098+ STM 14,12,12(13) SAVE REGISTERS 02950000 0128BC 18CF 24099+ LR R12,R15 base register := entry address 128B8 24100+ USING T441,R12 declare code base register 0128BE 41B0 C01E 128D6 24101+ LA R11,T441L load loop target to R11 0128C2 58F0 C100 129B8 24102+ L R15,=A(SAVETST) R15 := current save area 0128C6 50DF 0004 00004 24103+ ST R13,4(R15) set back pointer in current save area 0128CA 182D 24104+ LR R2,R13 remember callers save area 0128CC 18DF 24105+ LR R13,R15 setup current save area 0128CE 50D2 0008 00008 24106+ ST R13,8(R2) set forw pointer in callers save area 00000 24107+ USING TDSC,R1 declare TDSC base register 0128D2 58F0 1008 00008 24108+ L R15,TLRCNT load local repeat count to R15 24109+* 24110 * 24111 T441L REPINS ZAP,(T441V1,T441V2) repeat: ZAP T441V1,T441V2 24112+* 24113+* build from sublist &ALIST a comma separated string &ARGS 24114+* 24115+* 24116+* 24117+* 24118+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 24119+* this allows to transfer the repeat count from last TDSCGEN call 24120+* 24121+* 128D6 24122+T441L EQU * 24123+* 24124+* write a comment indicating what REPINS does (in case NOGEN in effect) 24125+* 24126+*,// REPINS: do 30 times: 24127+* 24128+* MNOTE requires that ' is doubled for expanded variables 24129+* thus build &MASTR as a copy of '&ARGS with ' doubled 24130+* 24131+* 24132+*,// ZAP T441V1,T441V2 24133+* 24134+* finally generate code: &ICNT copies of &CODE &ARGS 24135+* 0128D6 F8EE C0E2 C0F1 1299A 129A9 24136+ ZAP T441V1,T441V2 0128DC F8EE C0E2 C0F1 1299A 129A9 24137+ ZAP T441V1,T441V2 0128E2 F8EE C0E2 C0F1 1299A 129A9 24138+ ZAP T441V1,T441V2 0128E8 F8EE C0E2 C0F1 1299A 129A9 24139+ ZAP T441V1,T441V2 0128EE F8EE C0E2 C0F1 1299A 129A9 24140+ ZAP T441V1,T441V2 0128F4 F8EE C0E2 C0F1 1299A 129A9 24141+ ZAP T441V1,T441V2 0128FA F8EE C0E2 C0F1 1299A 129A9 24142+ ZAP T441V1,T441V2 012900 F8EE C0E2 C0F1 1299A 129A9 24143+ ZAP T441V1,T441V2 012906 F8EE C0E2 C0F1 1299A 129A9 24144+ ZAP T441V1,T441V2 01290C F8EE C0E2 C0F1 1299A 129A9 24145+ ZAP T441V1,T441V2 012912 F8EE C0E2 C0F1 1299A 129A9 24146+ ZAP T441V1,T441V2 012918 F8EE C0E2 C0F1 1299A 129A9 24147+ ZAP T441V1,T441V2 01291E F8EE C0E2 C0F1 1299A 129A9 24148+ ZAP T441V1,T441V2 012924 F8EE C0E2 C0F1 1299A 129A9 24149+ ZAP T441V1,T441V2 01292A F8EE C0E2 C0F1 1299A 129A9 24150+ ZAP T441V1,T441V2 012930 F8EE C0E2 C0F1 1299A 129A9 24151+ ZAP T441V1,T441V2 012936 F8EE C0E2 C0F1 1299A 129A9 24152+ ZAP T441V1,T441V2 PAGE 442 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01293C F8EE C0E2 C0F1 1299A 129A9 24153+ ZAP T441V1,T441V2 012942 F8EE C0E2 C0F1 1299A 129A9 24154+ ZAP T441V1,T441V2 012948 F8EE C0E2 C0F1 1299A 129A9 24155+ ZAP T441V1,T441V2 01294E F8EE C0E2 C0F1 1299A 129A9 24156+ ZAP T441V1,T441V2 012954 F8EE C0E2 C0F1 1299A 129A9 24157+ ZAP T441V1,T441V2 01295A F8EE C0E2 C0F1 1299A 129A9 24158+ ZAP T441V1,T441V2 012960 F8EE C0E2 C0F1 1299A 129A9 24159+ ZAP T441V1,T441V2 012966 F8EE C0E2 C0F1 1299A 129A9 24160+ ZAP T441V1,T441V2 01296C F8EE C0E2 C0F1 1299A 129A9 24161+ ZAP T441V1,T441V2 012972 F8EE C0E2 C0F1 1299A 129A9 24162+ ZAP T441V1,T441V2 012978 F8EE C0E2 C0F1 1299A 129A9 24163+ ZAP T441V1,T441V2 01297E F8EE C0E2 C0F1 1299A 129A9 24164+ ZAP T441V1,T441V2 012984 F8EE C0E2 C0F1 1299A 129A9 24165+ ZAP T441V1,T441V2 24166+* 01298A 06FB 24167 BCTR R15,R11 24168 TSIMRET 01298C 58F0 C100 129B8 24169+ L R15,=A(SAVETST) R15 := current save area 012990 58DF 0004 00004 24170+ L R13,4(R15) get old save area back 012994 98EC D00C 0000C 24171+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012998 07FE 24172+ BR 14 RETURN 02000000 24173 * 01299A 0000000000000000 24174 T441V1 DC PL15'0' 0129A9 0123456789012345 24175 T441V2 DC PL15'1234567890123456789012345677' 24176 TSIMEND 0129B8 24177+ LTORG 0129B8 00000458 24178 =A(SAVETST) 129BC 24179+T441TEND EQU * 24180 * 24181 * Test 442 -- ZAP m,m (10d,30d) ---------------------------- 24182 * 24183 TSIMBEG T442,1600,30,1,C'ZAP m,m (10d,30d)' 24184+* 003964 24185+TDSCDAT CSECT 003968 24186+ DS 0D 24187+* 003968 000129C0 24188+T442TDSC DC A(T442) // TENTRY 00396C 000000FC 24189+ DC A(T442TEND-T442) // TLENGTH 003970 00000640 24190+ DC F'1600' // TLRCNT 003974 0000001E 24191+ DC F'30' // TIGCNT 003978 00000001 24192+ DC F'1' // TLTYPE 001A51 24193+TEXT CSECT 001A51 E3F4F4F2 24194+SPTR2157 DC C'T442' 00397C 24195+TDSCDAT CSECT 00397C 24196+ DS 0F 00397C 04001A51 24197+ DC AL1(L'SPTR2157),AL3(SPTR2157) 001A55 24198+TEXT CSECT 001A55 E9C1D740946B9440 24199+SPTR2158 DC C'ZAP m,m (10d,30d)' 003980 24200+TDSCDAT CSECT 003980 24201+ DS 0F 003980 11001A55 24202+ DC AL1(L'SPTR2158),AL3(SPTR2158) 24203+* 004C58 24204+TDSCTBL CSECT 04C58 24205+T442TPTR EQU * 004C58 00003968 24206+ DC A(T442TDSC) enabled test 24207+* PAGE 443 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0129BC 24208+TCODE CSECT 0129C0 24209+ DS 0D ensure double word alignment for test 0129C0 24210+T442 DS 0H 01650000 0129C0 90EC D00C 0000C 24211+ STM 14,12,12(13) SAVE REGISTERS 02950000 0129C4 18CF 24212+ LR R12,R15 base register := entry address 129C0 24213+ USING T442,R12 declare code base register 0129C6 41B0 C01E 129DE 24214+ LA R11,T442L load loop target to R11 0129CA 58F0 C0F8 12AB8 24215+ L R15,=A(SAVETST) R15 := current save area 0129CE 50DF 0004 00004 24216+ ST R13,4(R15) set back pointer in current save area 0129D2 182D 24217+ LR R2,R13 remember callers save area 0129D4 18DF 24218+ LR R13,R15 setup current save area 0129D6 50D2 0008 00008 24219+ ST R13,8(R2) set forw pointer in callers save area 00000 24220+ USING TDSC,R1 declare TDSC base register 0129DA 58F0 1008 00008 24221+ L R15,TLRCNT load local repeat count to R15 24222+* 24223 * 24224 T442L REPINS ZAP,(T442V1,T442V2) repeat: ZAP T442V1,T442V2 24225+* 24226+* build from sublist &ALIST a comma separated string &ARGS 24227+* 24228+* 24229+* 24230+* 24231+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 24232+* this allows to transfer the repeat count from last TDSCGEN call 24233+* 24234+* 129DE 24235+T442L EQU * 24236+* 24237+* write a comment indicating what REPINS does (in case NOGEN in effect) 24238+* 24239+*,// REPINS: do 30 times: 24240+* 24241+* MNOTE requires that ' is doubled for expanded variables 24242+* thus build &MASTR as a copy of '&ARGS with ' doubled 24243+* 24244+* 24245+*,// ZAP T442V1,T442V2 24246+* 24247+* finally generate code: &ICNT copies of &CODE &ARGS 24248+* 0129DE F84E C0E2 C0E7 12AA2 12AA7 24249+ ZAP T442V1,T442V2 0129E4 F84E C0E2 C0E7 12AA2 12AA7 24250+ ZAP T442V1,T442V2 0129EA F84E C0E2 C0E7 12AA2 12AA7 24251+ ZAP T442V1,T442V2 0129F0 F84E C0E2 C0E7 12AA2 12AA7 24252+ ZAP T442V1,T442V2 0129F6 F84E C0E2 C0E7 12AA2 12AA7 24253+ ZAP T442V1,T442V2 0129FC F84E C0E2 C0E7 12AA2 12AA7 24254+ ZAP T442V1,T442V2 012A02 F84E C0E2 C0E7 12AA2 12AA7 24255+ ZAP T442V1,T442V2 012A08 F84E C0E2 C0E7 12AA2 12AA7 24256+ ZAP T442V1,T442V2 012A0E F84E C0E2 C0E7 12AA2 12AA7 24257+ ZAP T442V1,T442V2 012A14 F84E C0E2 C0E7 12AA2 12AA7 24258+ ZAP T442V1,T442V2 012A1A F84E C0E2 C0E7 12AA2 12AA7 24259+ ZAP T442V1,T442V2 012A20 F84E C0E2 C0E7 12AA2 12AA7 24260+ ZAP T442V1,T442V2 012A26 F84E C0E2 C0E7 12AA2 12AA7 24261+ ZAP T442V1,T442V2 012A2C F84E C0E2 C0E7 12AA2 12AA7 24262+ ZAP T442V1,T442V2 PAGE 444 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012A32 F84E C0E2 C0E7 12AA2 12AA7 24263+ ZAP T442V1,T442V2 012A38 F84E C0E2 C0E7 12AA2 12AA7 24264+ ZAP T442V1,T442V2 012A3E F84E C0E2 C0E7 12AA2 12AA7 24265+ ZAP T442V1,T442V2 012A44 F84E C0E2 C0E7 12AA2 12AA7 24266+ ZAP T442V1,T442V2 012A4A F84E C0E2 C0E7 12AA2 12AA7 24267+ ZAP T442V1,T442V2 012A50 F84E C0E2 C0E7 12AA2 12AA7 24268+ ZAP T442V1,T442V2 012A56 F84E C0E2 C0E7 12AA2 12AA7 24269+ ZAP T442V1,T442V2 012A5C F84E C0E2 C0E7 12AA2 12AA7 24270+ ZAP T442V1,T442V2 012A62 F84E C0E2 C0E7 12AA2 12AA7 24271+ ZAP T442V1,T442V2 012A68 F84E C0E2 C0E7 12AA2 12AA7 24272+ ZAP T442V1,T442V2 012A6E F84E C0E2 C0E7 12AA2 12AA7 24273+ ZAP T442V1,T442V2 012A74 F84E C0E2 C0E7 12AA2 12AA7 24274+ ZAP T442V1,T442V2 012A7A F84E C0E2 C0E7 12AA2 12AA7 24275+ ZAP T442V1,T442V2 012A80 F84E C0E2 C0E7 12AA2 12AA7 24276+ ZAP T442V1,T442V2 012A86 F84E C0E2 C0E7 12AA2 12AA7 24277+ ZAP T442V1,T442V2 012A8C F84E C0E2 C0E7 12AA2 12AA7 24278+ ZAP T442V1,T442V2 24279+* 012A92 06FB 24280 BCTR R15,R11 24281 TSIMRET 012A94 58F0 C0F8 12AB8 24282+ L R15,=A(SAVETST) R15 := current save area 012A98 58DF 0004 00004 24283+ L R13,4(R15) get old save area back 012A9C 98EC D00C 0000C 24284+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012AA0 07FE 24285+ BR 14 RETURN 02000000 24286 * 012AA2 000000000C 24287 T442V1 DC PL5'0' 012AA7 0000000000000000 24288 T442V2 DC PL15'999999999' 24289 TSIMEND 012AB8 24290+ LTORG 012AB8 00000458 24291 =A(SAVETST) 12ABC 24292+T442TEND EQU * 24293 * 24294 * Test 443 -- ZAP m,m (30d,10d) ---------------------------- 24295 * 24296 TSIMBEG T443,1600,30,1,C'ZAP m,m (30d,10d)' 24297+* 003984 24298+TDSCDAT CSECT 003988 24299+ DS 0D 24300+* 003988 00012AC0 24301+T443TDSC DC A(T443) // TENTRY 00398C 000000FC 24302+ DC A(T443TEND-T443) // TLENGTH 003990 00000640 24303+ DC F'1600' // TLRCNT 003994 0000001E 24304+ DC F'30' // TIGCNT 003998 00000001 24305+ DC F'1' // TLTYPE 001A66 24306+TEXT CSECT 001A66 E3F4F4F3 24307+SPTR2169 DC C'T443' 00399C 24308+TDSCDAT CSECT 00399C 24309+ DS 0F 00399C 04001A66 24310+ DC AL1(L'SPTR2169),AL3(SPTR2169) 001A6A 24311+TEXT CSECT 001A6A E9C1D740946B9440 24312+SPTR2170 DC C'ZAP m,m (30d,10d)' 0039A0 24313+TDSCDAT CSECT 0039A0 24314+ DS 0F 0039A0 11001A6A 24315+ DC AL1(L'SPTR2170),AL3(SPTR2170) 24316+* 004C5C 24317+TDSCTBL CSECT PAGE 445 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04C5C 24318+T443TPTR EQU * 004C5C 00003988 24319+ DC A(T443TDSC) enabled test 24320+* 012ABC 24321+TCODE CSECT 012AC0 24322+ DS 0D ensure double word alignment for test 012AC0 24323+T443 DS 0H 01650000 012AC0 90EC D00C 0000C 24324+ STM 14,12,12(13) SAVE REGISTERS 02950000 012AC4 18CF 24325+ LR R12,R15 base register := entry address 12AC0 24326+ USING T443,R12 declare code base register 012AC6 41B0 C01E 12ADE 24327+ LA R11,T443L load loop target to R11 012ACA 58F0 C0F8 12BB8 24328+ L R15,=A(SAVETST) R15 := current save area 012ACE 50DF 0004 00004 24329+ ST R13,4(R15) set back pointer in current save area 012AD2 182D 24330+ LR R2,R13 remember callers save area 012AD4 18DF 24331+ LR R13,R15 setup current save area 012AD6 50D2 0008 00008 24332+ ST R13,8(R2) set forw pointer in callers save area 00000 24333+ USING TDSC,R1 declare TDSC base register 012ADA 58F0 1008 00008 24334+ L R15,TLRCNT load local repeat count to R15 24335+* 24336 * 24337 T443L REPINS ZAP,(T443V1,T443V2) repeat: ZAP T443V1,T443V2 24338+* 24339+* build from sublist &ALIST a comma separated string &ARGS 24340+* 24341+* 24342+* 24343+* 24344+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 24345+* this allows to transfer the repeat count from last TDSCGEN call 24346+* 24347+* 12ADE 24348+T443L EQU * 24349+* 24350+* write a comment indicating what REPINS does (in case NOGEN in effect) 24351+* 24352+*,// REPINS: do 30 times: 24353+* 24354+* MNOTE requires that ' is doubled for expanded variables 24355+* thus build &MASTR as a copy of '&ARGS with ' doubled 24356+* 24357+* 24358+*,// ZAP T443V1,T443V2 24359+* 24360+* finally generate code: &ICNT copies of &CODE &ARGS 24361+* 012ADE F8E4 C0E2 C0F1 12BA2 12BB1 24362+ ZAP T443V1,T443V2 012AE4 F8E4 C0E2 C0F1 12BA2 12BB1 24363+ ZAP T443V1,T443V2 012AEA F8E4 C0E2 C0F1 12BA2 12BB1 24364+ ZAP T443V1,T443V2 012AF0 F8E4 C0E2 C0F1 12BA2 12BB1 24365+ ZAP T443V1,T443V2 012AF6 F8E4 C0E2 C0F1 12BA2 12BB1 24366+ ZAP T443V1,T443V2 012AFC F8E4 C0E2 C0F1 12BA2 12BB1 24367+ ZAP T443V1,T443V2 012B02 F8E4 C0E2 C0F1 12BA2 12BB1 24368+ ZAP T443V1,T443V2 012B08 F8E4 C0E2 C0F1 12BA2 12BB1 24369+ ZAP T443V1,T443V2 012B0E F8E4 C0E2 C0F1 12BA2 12BB1 24370+ ZAP T443V1,T443V2 012B14 F8E4 C0E2 C0F1 12BA2 12BB1 24371+ ZAP T443V1,T443V2 012B1A F8E4 C0E2 C0F1 12BA2 12BB1 24372+ ZAP T443V1,T443V2 PAGE 446 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012B20 F8E4 C0E2 C0F1 12BA2 12BB1 24373+ ZAP T443V1,T443V2 012B26 F8E4 C0E2 C0F1 12BA2 12BB1 24374+ ZAP T443V1,T443V2 012B2C F8E4 C0E2 C0F1 12BA2 12BB1 24375+ ZAP T443V1,T443V2 012B32 F8E4 C0E2 C0F1 12BA2 12BB1 24376+ ZAP T443V1,T443V2 012B38 F8E4 C0E2 C0F1 12BA2 12BB1 24377+ ZAP T443V1,T443V2 012B3E F8E4 C0E2 C0F1 12BA2 12BB1 24378+ ZAP T443V1,T443V2 012B44 F8E4 C0E2 C0F1 12BA2 12BB1 24379+ ZAP T443V1,T443V2 012B4A F8E4 C0E2 C0F1 12BA2 12BB1 24380+ ZAP T443V1,T443V2 012B50 F8E4 C0E2 C0F1 12BA2 12BB1 24381+ ZAP T443V1,T443V2 012B56 F8E4 C0E2 C0F1 12BA2 12BB1 24382+ ZAP T443V1,T443V2 012B5C F8E4 C0E2 C0F1 12BA2 12BB1 24383+ ZAP T443V1,T443V2 012B62 F8E4 C0E2 C0F1 12BA2 12BB1 24384+ ZAP T443V1,T443V2 012B68 F8E4 C0E2 C0F1 12BA2 12BB1 24385+ ZAP T443V1,T443V2 012B6E F8E4 C0E2 C0F1 12BA2 12BB1 24386+ ZAP T443V1,T443V2 012B74 F8E4 C0E2 C0F1 12BA2 12BB1 24387+ ZAP T443V1,T443V2 012B7A F8E4 C0E2 C0F1 12BA2 12BB1 24388+ ZAP T443V1,T443V2 012B80 F8E4 C0E2 C0F1 12BA2 12BB1 24389+ ZAP T443V1,T443V2 012B86 F8E4 C0E2 C0F1 12BA2 12BB1 24390+ ZAP T443V1,T443V2 012B8C F8E4 C0E2 C0F1 12BA2 12BB1 24391+ ZAP T443V1,T443V2 24392+* 012B92 06FB 24393 BCTR R15,R11 24394 TSIMRET 012B94 58F0 C0F8 12BB8 24395+ L R15,=A(SAVETST) R15 := current save area 012B98 58DF 0004 00004 24396+ L R13,4(R15) get old save area back 012B9C 98EC D00C 0000C 24397+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012BA0 07FE 24398+ BR 14 RETURN 02000000 24399 * 012BA2 0000000000000000 24400 T443V1 DC PL15'0' 012BB1 999999999C 24401 T443V2 DC PL5'999999999' 24402 TSIMEND 012BB8 24403+ LTORG 012BB8 00000458 24404 =A(SAVETST) 12BBC 24405+T443TEND EQU * 24406 * 24407 * Test 445 -- SRP m,i,i (30d,<<) ------------------------- 24408 * 24409 TSIMBEG T445,1600,25,8,C'SRP m,i,i (30d,<<)' 24410+* 0039A4 24411+TDSCDAT CSECT 0039A8 24412+ DS 0D 24413+* 0039A8 00012BC0 24414+T445TDSC DC A(T445) // TENTRY 0039AC 000000EC 24415+ DC A(T445TEND-T445) // TLENGTH 0039B0 00000640 24416+ DC F'1600' // TLRCNT 0039B4 00000019 24417+ DC F'25' // TIGCNT 0039B8 00000008 24418+ DC F'8' // TLTYPE 001A7B 24419+TEXT CSECT 001A7B E3F4F4F5 24420+SPTR2181 DC C'T445' 0039BC 24421+TDSCDAT CSECT 0039BC 24422+ DS 0F 0039BC 04001A7B 24423+ DC AL1(L'SPTR2181),AL3(SPTR2181) 001A7F 24424+TEXT CSECT 001A7F E2D9D740946B896B 24425+SPTR2182 DC C'SRP m,i,i (30d,<<)' 0039C0 24426+TDSCDAT CSECT 0039C0 24427+ DS 0F PAGE 447 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0039C0 12001A7F 24428+ DC AL1(L'SPTR2182),AL3(SPTR2182) 24429+* 004C60 24430+TDSCTBL CSECT 04C60 24431+T445TPTR EQU * 004C60 000039A8 24432+ DC A(T445TDSC) enabled test 24433+* 012BBC 24434+TCODE CSECT 012BC0 24435+ DS 0D ensure double word alignment for test 012BC0 24436+T445 DS 0H 01650000 012BC0 90EC D00C 0000C 24437+ STM 14,12,12(13) SAVE REGISTERS 02950000 012BC4 18CF 24438+ LR R12,R15 base register := entry address 12BC0 24439+ USING T445,R12 declare code base register 012BC6 41B0 C01E 12BDE 24440+ LA R11,T445L load loop target to R11 012BCA 58F0 C0E8 12CA8 24441+ L R15,=A(SAVETST) R15 := current save area 012BCE 50DF 0004 00004 24442+ ST R13,4(R15) set back pointer in current save area 012BD2 182D 24443+ LR R2,R13 remember callers save area 012BD4 18DF 24444+ LR R13,R15 setup current save area 012BD6 50D2 0008 00008 24445+ ST R13,8(R2) set forw pointer in callers save area 00000 24446+ USING TDSC,R1 declare TDSC base register 012BDA 58F0 1008 00008 24447+ L R15,TLRCNT load local repeat count to R15 24448+* 24449 * 012BDE D20E C0CA C0D9 12C8A 12C99 24450 T445L MVC T445V1,T445V2 24451 REPINS SRP,(T445V1,1,0) repeat: SRP T445V1,1,0 24452+* 24453+* build from sublist &ALIST a comma separated string &ARGS 24454+* 24455+* 24456+* 24457+* 24458+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 24459+* this allows to transfer the repeat count from last TDSCGEN call 24460+* 24461+* 24462+* 24463+* write a comment indicating what REPINS does (in case NOGEN in effect) 24464+* 24465+*,// REPINS: do 25 times: 24466+* 24467+* MNOTE requires that ' is doubled for expanded variables 24468+* thus build &MASTR as a copy of '&ARGS with ' doubled 24469+* 24470+* 24471+*,// SRP T445V1,1,0 24472+* 24473+* finally generate code: &ICNT copies of &CODE &ARGS 24474+* 012BE4 F0E0 C0CA 0001 12C8A 00001 24475+ SRP T445V1,1,0 012BEA F0E0 C0CA 0001 12C8A 00001 24476+ SRP T445V1,1,0 012BF0 F0E0 C0CA 0001 12C8A 00001 24477+ SRP T445V1,1,0 012BF6 F0E0 C0CA 0001 12C8A 00001 24478+ SRP T445V1,1,0 012BFC F0E0 C0CA 0001 12C8A 00001 24479+ SRP T445V1,1,0 012C02 F0E0 C0CA 0001 12C8A 00001 24480+ SRP T445V1,1,0 012C08 F0E0 C0CA 0001 12C8A 00001 24481+ SRP T445V1,1,0 012C0E F0E0 C0CA 0001 12C8A 00001 24482+ SRP T445V1,1,0 PAGE 448 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012C14 F0E0 C0CA 0001 12C8A 00001 24483+ SRP T445V1,1,0 012C1A F0E0 C0CA 0001 12C8A 00001 24484+ SRP T445V1,1,0 012C20 F0E0 C0CA 0001 12C8A 00001 24485+ SRP T445V1,1,0 012C26 F0E0 C0CA 0001 12C8A 00001 24486+ SRP T445V1,1,0 012C2C F0E0 C0CA 0001 12C8A 00001 24487+ SRP T445V1,1,0 012C32 F0E0 C0CA 0001 12C8A 00001 24488+ SRP T445V1,1,0 012C38 F0E0 C0CA 0001 12C8A 00001 24489+ SRP T445V1,1,0 012C3E F0E0 C0CA 0001 12C8A 00001 24490+ SRP T445V1,1,0 012C44 F0E0 C0CA 0001 12C8A 00001 24491+ SRP T445V1,1,0 012C4A F0E0 C0CA 0001 12C8A 00001 24492+ SRP T445V1,1,0 012C50 F0E0 C0CA 0001 12C8A 00001 24493+ SRP T445V1,1,0 012C56 F0E0 C0CA 0001 12C8A 00001 24494+ SRP T445V1,1,0 012C5C F0E0 C0CA 0001 12C8A 00001 24495+ SRP T445V1,1,0 012C62 F0E0 C0CA 0001 12C8A 00001 24496+ SRP T445V1,1,0 012C68 F0E0 C0CA 0001 12C8A 00001 24497+ SRP T445V1,1,0 012C6E F0E0 C0CA 0001 12C8A 00001 24498+ SRP T445V1,1,0 012C74 F0E0 C0CA 0001 12C8A 00001 24499+ SRP T445V1,1,0 24500+* 012C7A 06FB 24501 BCTR R15,R11 24502 TSIMRET 012C7C 58F0 C0E8 12CA8 24503+ L R15,=A(SAVETST) R15 := current save area 012C80 58DF 0004 00004 24504+ L R13,4(R15) get old save area back 012C84 98EC D00C 0000C 24505+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012C88 07FE 24506+ BR 14 RETURN 02000000 24507 * 012C8A 0000000000000000 24508 T445V1 DC PL15'0' 012C99 0000000000000000 24509 T445V2 DC PL15'1' 24510 TSIMEND 012CA8 24511+ LTORG 012CA8 00000458 24512 =A(SAVETST) 12CAC 24513+T445TEND EQU * 24514 * 24515 * Test 446 -- SRP m,i,i (30d,>>) --------------------------- 24516 * 24517 TSIMBEG T446,1000,25,8,C'SRP m,i,i (30d,>>)' 24518+* 0039C4 24519+TDSCDAT CSECT 0039C8 24520+ DS 0D 24521+* 0039C8 00012CB0 24522+T446TDSC DC A(T446) // TENTRY 0039CC 000000EC 24523+ DC A(T446TEND-T446) // TLENGTH 0039D0 000003E8 24524+ DC F'1000' // TLRCNT 0039D4 00000019 24525+ DC F'25' // TIGCNT 0039D8 00000008 24526+ DC F'8' // TLTYPE 001A91 24527+TEXT CSECT 001A91 E3F4F4F6 24528+SPTR2193 DC C'T446' 0039DC 24529+TDSCDAT CSECT 0039DC 24530+ DS 0F 0039DC 04001A91 24531+ DC AL1(L'SPTR2193),AL3(SPTR2193) 001A95 24532+TEXT CSECT 001A95 E2D9D740946B896B 24533+SPTR2194 DC C'SRP m,i,i (30d,>>)' 0039E0 24534+TDSCDAT CSECT 0039E0 24535+ DS 0F 0039E0 12001A95 24536+ DC AL1(L'SPTR2194),AL3(SPTR2194) 24537+* PAGE 449 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004C64 24538+TDSCTBL CSECT 04C64 24539+T446TPTR EQU * 004C64 000039C8 24540+ DC A(T446TDSC) enabled test 24541+* 012CAC 24542+TCODE CSECT 012CB0 24543+ DS 0D ensure double word alignment for test 012CB0 24544+T446 DS 0H 01650000 012CB0 90EC D00C 0000C 24545+ STM 14,12,12(13) SAVE REGISTERS 02950000 012CB4 18CF 24546+ LR R12,R15 base register := entry address 12CB0 24547+ USING T446,R12 declare code base register 012CB6 41B0 C01E 12CCE 24548+ LA R11,T446L load loop target to R11 012CBA 58F0 C0E8 12D98 24549+ L R15,=A(SAVETST) R15 := current save area 012CBE 50DF 0004 00004 24550+ ST R13,4(R15) set back pointer in current save area 012CC2 182D 24551+ LR R2,R13 remember callers save area 012CC4 18DF 24552+ LR R13,R15 setup current save area 012CC6 50D2 0008 00008 24553+ ST R13,8(R2) set forw pointer in callers save area 00000 24554+ USING TDSC,R1 declare TDSC base register 012CCA 58F0 1008 00008 24555+ L R15,TLRCNT load local repeat count to R15 24556+* 24557 * 012CCE D20E C0CA C0D9 12D7A 12D89 24558 T446L MVC T446V1,T446V2 24559 REPINS SRP,(T446V1,64-1,5) repeat: SRP T446V1,64-1,5 24560+* 24561+* build from sublist &ALIST a comma separated string &ARGS 24562+* 24563+* 24564+* 24565+* 24566+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 24567+* this allows to transfer the repeat count from last TDSCGEN call 24568+* 24569+* 24570+* 24571+* write a comment indicating what REPINS does (in case NOGEN in effect) 24572+* 24573+*,// REPINS: do 25 times: 24574+* 24575+* MNOTE requires that ' is doubled for expanded variables 24576+* thus build &MASTR as a copy of '&ARGS with ' doubled 24577+* 24578+* 24579+*,// SRP T446V1,64-1,5 24580+* 24581+* finally generate code: &ICNT copies of &CODE &ARGS 24582+* 012CD4 F0E5 C0CA 003F 12D7A 0003F 24583+ SRP T446V1,64-1,5 012CDA F0E5 C0CA 003F 12D7A 0003F 24584+ SRP T446V1,64-1,5 012CE0 F0E5 C0CA 003F 12D7A 0003F 24585+ SRP T446V1,64-1,5 012CE6 F0E5 C0CA 003F 12D7A 0003F 24586+ SRP T446V1,64-1,5 012CEC F0E5 C0CA 003F 12D7A 0003F 24587+ SRP T446V1,64-1,5 012CF2 F0E5 C0CA 003F 12D7A 0003F 24588+ SRP T446V1,64-1,5 012CF8 F0E5 C0CA 003F 12D7A 0003F 24589+ SRP T446V1,64-1,5 012CFE F0E5 C0CA 003F 12D7A 0003F 24590+ SRP T446V1,64-1,5 012D04 F0E5 C0CA 003F 12D7A 0003F 24591+ SRP T446V1,64-1,5 012D0A F0E5 C0CA 003F 12D7A 0003F 24592+ SRP T446V1,64-1,5 PAGE 450 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012D10 F0E5 C0CA 003F 12D7A 0003F 24593+ SRP T446V1,64-1,5 012D16 F0E5 C0CA 003F 12D7A 0003F 24594+ SRP T446V1,64-1,5 012D1C F0E5 C0CA 003F 12D7A 0003F 24595+ SRP T446V1,64-1,5 012D22 F0E5 C0CA 003F 12D7A 0003F 24596+ SRP T446V1,64-1,5 012D28 F0E5 C0CA 003F 12D7A 0003F 24597+ SRP T446V1,64-1,5 012D2E F0E5 C0CA 003F 12D7A 0003F 24598+ SRP T446V1,64-1,5 012D34 F0E5 C0CA 003F 12D7A 0003F 24599+ SRP T446V1,64-1,5 012D3A F0E5 C0CA 003F 12D7A 0003F 24600+ SRP T446V1,64-1,5 012D40 F0E5 C0CA 003F 12D7A 0003F 24601+ SRP T446V1,64-1,5 012D46 F0E5 C0CA 003F 12D7A 0003F 24602+ SRP T446V1,64-1,5 012D4C F0E5 C0CA 003F 12D7A 0003F 24603+ SRP T446V1,64-1,5 012D52 F0E5 C0CA 003F 12D7A 0003F 24604+ SRP T446V1,64-1,5 012D58 F0E5 C0CA 003F 12D7A 0003F 24605+ SRP T446V1,64-1,5 012D5E F0E5 C0CA 003F 12D7A 0003F 24606+ SRP T446V1,64-1,5 012D64 F0E5 C0CA 003F 12D7A 0003F 24607+ SRP T446V1,64-1,5 24608+* 012D6A 06FB 24609 BCTR R15,R11 24610 TSIMRET 012D6C 58F0 C0E8 12D98 24611+ L R15,=A(SAVETST) R15 := current save area 012D70 58DF 0004 00004 24612+ L R13,4(R15) get old save area back 012D74 98EC D00C 0000C 24613+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012D78 07FE 24614+ BR 14 RETURN 02000000 24615 * 012D7A 0000000000000000 24616 T446V1 DC PL15'0' 012D89 0001919191919191 24617 T446V2 DC PL15'19191919191919191919191919' 24618 TSIMEND 012D98 24619+ LTORG 012D98 00000458 24620 =A(SAVETST) 12D9C 24621+T446TEND EQU * 24622 * 24623 * Test 450 -- MVO m,m (10d) -------------------------------- 24624 * 24625 TSIMBEG T450,5000,20,1,C'MVO m,m (10d)' 24626+* 0039E4 24627+TDSCDAT CSECT 0039E8 24628+ DS 0D 24629+* 0039E8 00012DA0 24630+T450TDSC DC A(T450) // TENTRY 0039EC 000000B4 24631+ DC A(T450TEND-T450) // TLENGTH 0039F0 00001388 24632+ DC F'5000' // TLRCNT 0039F4 00000014 24633+ DC F'20' // TIGCNT 0039F8 00000001 24634+ DC F'1' // TLTYPE 001AA7 24635+TEXT CSECT 001AA7 E3F4F5F0 24636+SPTR2205 DC C'T450' 0039FC 24637+TDSCDAT CSECT 0039FC 24638+ DS 0F 0039FC 04001AA7 24639+ DC AL1(L'SPTR2205),AL3(SPTR2205) 001AAB 24640+TEXT CSECT 001AAB D4E5D640946B9440 24641+SPTR2206 DC C'MVO m,m (10d)' 003A00 24642+TDSCDAT CSECT 003A00 24643+ DS 0F 003A00 0D001AAB 24644+ DC AL1(L'SPTR2206),AL3(SPTR2206) 24645+* 004C68 24646+TDSCTBL CSECT 04C68 24647+T450TPTR EQU * PAGE 451 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004C68 000039E8 24648+ DC A(T450TDSC) enabled test 24649+* 012D9C 24650+TCODE CSECT 012DA0 24651+ DS 0D ensure double word alignment for test 012DA0 24652+T450 DS 0H 01650000 012DA0 90EC D00C 0000C 24653+ STM 14,12,12(13) SAVE REGISTERS 02950000 012DA4 18CF 24654+ LR R12,R15 base register := entry address 12DA0 24655+ USING T450,R12 declare code base register 012DA6 41B0 C01E 12DBE 24656+ LA R11,T450L load loop target to R11 012DAA 58F0 C0B0 12E50 24657+ L R15,=A(SAVETST) R15 := current save area 012DAE 50DF 0004 00004 24658+ ST R13,4(R15) set back pointer in current save area 012DB2 182D 24659+ LR R2,R13 remember callers save area 012DB4 18DF 24660+ LR R13,R15 setup current save area 012DB6 50D2 0008 00008 24661+ ST R13,8(R2) set forw pointer in callers save area 00000 24662+ USING TDSC,R1 declare TDSC base register 012DBA 58F0 1008 00008 24663+ L R15,TLRCNT load local repeat count to R15 24664+* 24665 * 24666 T450L REPINS MVO,(T450V1,T450V2) repeat: MVO T450V1,T450V2 24667+* 24668+* build from sublist &ALIST a comma separated string &ARGS 24669+* 24670+* 24671+* 24672+* 24673+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 24674+* this allows to transfer the repeat count from last TDSCGEN call 24675+* 24676+* 12DBE 24677+T450L EQU * 24678+* 24679+* write a comment indicating what REPINS does (in case NOGEN in effect) 24680+* 24681+*,// REPINS: do 20 times: 24682+* 24683+* MNOTE requires that ' is doubled for expanded variables 24684+* thus build &MASTR as a copy of '&ARGS with ' doubled 24685+* 24686+* 24687+*,// MVO T450V1,T450V2 24688+* 24689+* finally generate code: &ICNT copies of &CODE &ARGS 24690+* 012DBE F144 C0A6 C0AB 12E46 12E4B 24691+ MVO T450V1,T450V2 012DC4 F144 C0A6 C0AB 12E46 12E4B 24692+ MVO T450V1,T450V2 012DCA F144 C0A6 C0AB 12E46 12E4B 24693+ MVO T450V1,T450V2 012DD0 F144 C0A6 C0AB 12E46 12E4B 24694+ MVO T450V1,T450V2 012DD6 F144 C0A6 C0AB 12E46 12E4B 24695+ MVO T450V1,T450V2 012DDC F144 C0A6 C0AB 12E46 12E4B 24696+ MVO T450V1,T450V2 012DE2 F144 C0A6 C0AB 12E46 12E4B 24697+ MVO T450V1,T450V2 012DE8 F144 C0A6 C0AB 12E46 12E4B 24698+ MVO T450V1,T450V2 012DEE F144 C0A6 C0AB 12E46 12E4B 24699+ MVO T450V1,T450V2 012DF4 F144 C0A6 C0AB 12E46 12E4B 24700+ MVO T450V1,T450V2 012DFA F144 C0A6 C0AB 12E46 12E4B 24701+ MVO T450V1,T450V2 012E00 F144 C0A6 C0AB 12E46 12E4B 24702+ MVO T450V1,T450V2 PAGE 452 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012E06 F144 C0A6 C0AB 12E46 12E4B 24703+ MVO T450V1,T450V2 012E0C F144 C0A6 C0AB 12E46 12E4B 24704+ MVO T450V1,T450V2 012E12 F144 C0A6 C0AB 12E46 12E4B 24705+ MVO T450V1,T450V2 012E18 F144 C0A6 C0AB 12E46 12E4B 24706+ MVO T450V1,T450V2 012E1E F144 C0A6 C0AB 12E46 12E4B 24707+ MVO T450V1,T450V2 012E24 F144 C0A6 C0AB 12E46 12E4B 24708+ MVO T450V1,T450V2 012E2A F144 C0A6 C0AB 12E46 12E4B 24709+ MVO T450V1,T450V2 012E30 F144 C0A6 C0AB 12E46 12E4B 24710+ MVO T450V1,T450V2 24711+* 012E36 06FB 24712 BCTR R15,R11 24713 TSIMRET 012E38 58F0 C0B0 12E50 24714+ L R15,=A(SAVETST) R15 := current save area 012E3C 58DF 0004 00004 24715+ L R13,4(R15) get old save area back 012E40 98EC D00C 0000C 24716+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012E44 07FE 24717+ BR 14 RETURN 02000000 24718 * 012E46 000000123C 24719 T450V1 DC PL5'123' 012E4B 000004567C 24720 T450V2 DC PL5'4567' 24721 TSIMEND 012E50 24722+ LTORG 012E50 00000458 24723 =A(SAVETST) 12E54 24724+T450TEND EQU * 24725 * 24726 * Test 451 -- MVO m,m (30d) -------------------------------- 24727 * 24728 TSIMBEG T451,2000,20,1,C'MVO m,m (30d)' 24729+* 003A04 24730+TDSCDAT CSECT 003A08 24731+ DS 0D 24732+* 003A08 00012E58 24733+T451TDSC DC A(T451) // TENTRY 003A0C 000000CC 24734+ DC A(T451TEND-T451) // TLENGTH 003A10 000007D0 24735+ DC F'2000' // TLRCNT 003A14 00000014 24736+ DC F'20' // TIGCNT 003A18 00000001 24737+ DC F'1' // TLTYPE 001AB8 24738+TEXT CSECT 001AB8 E3F4F5F1 24739+SPTR2217 DC C'T451' 003A1C 24740+TDSCDAT CSECT 003A1C 24741+ DS 0F 003A1C 04001AB8 24742+ DC AL1(L'SPTR2217),AL3(SPTR2217) 001ABC 24743+TEXT CSECT 001ABC D4E5D640946B9440 24744+SPTR2218 DC C'MVO m,m (30d)' 003A20 24745+TDSCDAT CSECT 003A20 24746+ DS 0F 003A20 0D001ABC 24747+ DC AL1(L'SPTR2218),AL3(SPTR2218) 24748+* 004C6C 24749+TDSCTBL CSECT 04C6C 24750+T451TPTR EQU * 004C6C 00003A08 24751+ DC A(T451TDSC) enabled test 24752+* 012E54 24753+TCODE CSECT 012E58 24754+ DS 0D ensure double word alignment for test 012E58 24755+T451 DS 0H 01650000 012E58 90EC D00C 0000C 24756+ STM 14,12,12(13) SAVE REGISTERS 02950000 012E5C 18CF 24757+ LR R12,R15 base register := entry address PAGE 453 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 12E58 24758+ USING T451,R12 declare code base register 012E5E 41B0 C01E 12E76 24759+ LA R11,T451L load loop target to R11 012E62 58F0 C0C8 12F20 24760+ L R15,=A(SAVETST) R15 := current save area 012E66 50DF 0004 00004 24761+ ST R13,4(R15) set back pointer in current save area 012E6A 182D 24762+ LR R2,R13 remember callers save area 012E6C 18DF 24763+ LR R13,R15 setup current save area 012E6E 50D2 0008 00008 24764+ ST R13,8(R2) set forw pointer in callers save area 00000 24765+ USING TDSC,R1 declare TDSC base register 012E72 58F0 1008 00008 24766+ L R15,TLRCNT load local repeat count to R15 24767+* 24768 * 24769 T451L REPINS MVO,(T451V1,T451V2) repeat: MVO T451V1,T451V2 24770+* 24771+* build from sublist &ALIST a comma separated string &ARGS 24772+* 24773+* 24774+* 24775+* 24776+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 24777+* this allows to transfer the repeat count from last TDSCGEN call 24778+* 24779+* 12E76 24780+T451L EQU * 24781+* 24782+* write a comment indicating what REPINS does (in case NOGEN in effect) 24783+* 24784+*,// REPINS: do 20 times: 24785+* 24786+* MNOTE requires that ' is doubled for expanded variables 24787+* thus build &MASTR as a copy of '&ARGS with ' doubled 24788+* 24789+* 24790+*,// MVO T451V1,T451V2 24791+* 24792+* finally generate code: &ICNT copies of &CODE &ARGS 24793+* 012E76 F1EE C0A6 C0B5 12EFE 12F0D 24794+ MVO T451V1,T451V2 012E7C F1EE C0A6 C0B5 12EFE 12F0D 24795+ MVO T451V1,T451V2 012E82 F1EE C0A6 C0B5 12EFE 12F0D 24796+ MVO T451V1,T451V2 012E88 F1EE C0A6 C0B5 12EFE 12F0D 24797+ MVO T451V1,T451V2 012E8E F1EE C0A6 C0B5 12EFE 12F0D 24798+ MVO T451V1,T451V2 012E94 F1EE C0A6 C0B5 12EFE 12F0D 24799+ MVO T451V1,T451V2 012E9A F1EE C0A6 C0B5 12EFE 12F0D 24800+ MVO T451V1,T451V2 012EA0 F1EE C0A6 C0B5 12EFE 12F0D 24801+ MVO T451V1,T451V2 012EA6 F1EE C0A6 C0B5 12EFE 12F0D 24802+ MVO T451V1,T451V2 012EAC F1EE C0A6 C0B5 12EFE 12F0D 24803+ MVO T451V1,T451V2 012EB2 F1EE C0A6 C0B5 12EFE 12F0D 24804+ MVO T451V1,T451V2 012EB8 F1EE C0A6 C0B5 12EFE 12F0D 24805+ MVO T451V1,T451V2 012EBE F1EE C0A6 C0B5 12EFE 12F0D 24806+ MVO T451V1,T451V2 012EC4 F1EE C0A6 C0B5 12EFE 12F0D 24807+ MVO T451V1,T451V2 012ECA F1EE C0A6 C0B5 12EFE 12F0D 24808+ MVO T451V1,T451V2 012ED0 F1EE C0A6 C0B5 12EFE 12F0D 24809+ MVO T451V1,T451V2 012ED6 F1EE C0A6 C0B5 12EFE 12F0D 24810+ MVO T451V1,T451V2 012EDC F1EE C0A6 C0B5 12EFE 12F0D 24811+ MVO T451V1,T451V2 012EE2 F1EE C0A6 C0B5 12EFE 12F0D 24812+ MVO T451V1,T451V2 PAGE 454 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012EE8 F1EE C0A6 C0B5 12EFE 12F0D 24813+ MVO T451V1,T451V2 24814+* 012EEE 06FB 24815 BCTR R15,R11 24816 TSIMRET 012EF0 58F0 C0C8 12F20 24817+ L R15,=A(SAVETST) R15 := current save area 012EF4 58DF 0004 00004 24818+ L R13,4(R15) get old save area back 012EF8 98EC D00C 0000C 24819+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 012EFC 07FE 24820+ BR 14 RETURN 02000000 24821 * 012EFE 0000000000000000 24822 T451V1 DC PL15'123' 012F0D 0001919191919191 24823 T451V2 DC PL15'19191919191919191919191919' 24824 TSIMEND 012F20 24825+ LTORG 012F20 00000458 24826 =A(SAVETST) 12F24 24827+T451TEND EQU * 24828 * 24829 * Test 5xx -- floating point ==================================== 24830 * 24831 * Test 50x -- short float load/store ======================= 24832 * 24833 * Test 500 -- LER R,R -------------------------------------- 24834 * 24835 TSIMBEG T500,10000,100,1,C'LER R,R' 24836+* 003A24 24837+TDSCDAT CSECT 003A28 24838+ DS 0D 24839+* 003A28 00012F28 24840+T500TDSC DC A(T500) // TENTRY 003A2C 00000108 24841+ DC A(T500TEND-T500) // TLENGTH 003A30 00002710 24842+ DC F'10000' // TLRCNT 003A34 00000064 24843+ DC F'100' // TIGCNT 003A38 00000001 24844+ DC F'1' // TLTYPE 001AC9 24845+TEXT CSECT 001AC9 E3F5F0F0 24846+SPTR2229 DC C'T500' 003A3C 24847+TDSCDAT CSECT 003A3C 24848+ DS 0F 003A3C 04001AC9 24849+ DC AL1(L'SPTR2229),AL3(SPTR2229) 001ACD 24850+TEXT CSECT 001ACD D3C5D940D96BD9 24851+SPTR2230 DC C'LER R,R' 003A40 24852+TDSCDAT CSECT 003A40 24853+ DS 0F 003A40 07001ACD 24854+ DC AL1(L'SPTR2230),AL3(SPTR2230) 24855+* 004C70 24856+TDSCTBL CSECT 04C70 24857+T500TPTR EQU * 004C70 00003A28 24858+ DC A(T500TDSC) enabled test 24859+* 012F24 24860+TCODE CSECT 012F28 24861+ DS 0D ensure double word alignment for test 012F28 24862+T500 DS 0H 01650000 012F28 90EC D00C 0000C 24863+ STM 14,12,12(13) SAVE REGISTERS 02950000 012F2C 18CF 24864+ LR R12,R15 base register := entry address 12F28 24865+ USING T500,R12 declare code base register 012F2E 41B0 C022 12F4A 24866+ LA R11,T500L load loop target to R11 012F32 58F0 C100 13028 24867+ L R15,=A(SAVETST) R15 := current save area PAGE 455 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012F36 50DF 0004 00004 24868+ ST R13,4(R15) set back pointer in current save area 012F3A 182D 24869+ LR R2,R13 remember callers save area 012F3C 18DF 24870+ LR R13,R15 setup current save area 012F3E 50D2 0008 00008 24871+ ST R13,8(R2) set forw pointer in callers save area 00000 24872+ USING TDSC,R1 declare TDSC base register 012F42 58F0 1008 00008 24873+ L R15,TLRCNT load local repeat count to R15 24874+* 24875 * 012F46 7820 C104 1302C 24876 LE FR2,=E'1.1' 24877 T500L REPINS LER,(FR0,FR2) repeat: LER FR0,FR2 24878+* 24879+* build from sublist &ALIST a comma separated string &ARGS 24880+* 24881+* 24882+* 24883+* 24884+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 24885+* this allows to transfer the repeat count from last TDSCGEN call 24886+* 24887+* 12F4A 24888+T500L EQU * 24889+* 24890+* write a comment indicating what REPINS does (in case NOGEN in effect) 24891+* 24892+*,// REPINS: do 100 times: 24893+* 24894+* MNOTE requires that ' is doubled for expanded variables 24895+* thus build &MASTR as a copy of '&ARGS with ' doubled 24896+* 24897+* 24898+*,// LER FR0,FR2 24899+* 24900+* finally generate code: &ICNT copies of &CODE &ARGS 24901+* 012F4A 3802 24902+ LER FR0,FR2 012F4C 3802 24903+ LER FR0,FR2 012F4E 3802 24904+ LER FR0,FR2 012F50 3802 24905+ LER FR0,FR2 012F52 3802 24906+ LER FR0,FR2 012F54 3802 24907+ LER FR0,FR2 012F56 3802 24908+ LER FR0,FR2 012F58 3802 24909+ LER FR0,FR2 012F5A 3802 24910+ LER FR0,FR2 012F5C 3802 24911+ LER FR0,FR2 012F5E 3802 24912+ LER FR0,FR2 012F60 3802 24913+ LER FR0,FR2 012F62 3802 24914+ LER FR0,FR2 012F64 3802 24915+ LER FR0,FR2 012F66 3802 24916+ LER FR0,FR2 012F68 3802 24917+ LER FR0,FR2 012F6A 3802 24918+ LER FR0,FR2 012F6C 3802 24919+ LER FR0,FR2 012F6E 3802 24920+ LER FR0,FR2 012F70 3802 24921+ LER FR0,FR2 012F72 3802 24922+ LER FR0,FR2 PAGE 456 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012F74 3802 24923+ LER FR0,FR2 012F76 3802 24924+ LER FR0,FR2 012F78 3802 24925+ LER FR0,FR2 012F7A 3802 24926+ LER FR0,FR2 012F7C 3802 24927+ LER FR0,FR2 012F7E 3802 24928+ LER FR0,FR2 012F80 3802 24929+ LER FR0,FR2 012F82 3802 24930+ LER FR0,FR2 012F84 3802 24931+ LER FR0,FR2 012F86 3802 24932+ LER FR0,FR2 012F88 3802 24933+ LER FR0,FR2 012F8A 3802 24934+ LER FR0,FR2 012F8C 3802 24935+ LER FR0,FR2 012F8E 3802 24936+ LER FR0,FR2 012F90 3802 24937+ LER FR0,FR2 012F92 3802 24938+ LER FR0,FR2 012F94 3802 24939+ LER FR0,FR2 012F96 3802 24940+ LER FR0,FR2 012F98 3802 24941+ LER FR0,FR2 012F9A 3802 24942+ LER FR0,FR2 012F9C 3802 24943+ LER FR0,FR2 012F9E 3802 24944+ LER FR0,FR2 012FA0 3802 24945+ LER FR0,FR2 012FA2 3802 24946+ LER FR0,FR2 012FA4 3802 24947+ LER FR0,FR2 012FA6 3802 24948+ LER FR0,FR2 012FA8 3802 24949+ LER FR0,FR2 012FAA 3802 24950+ LER FR0,FR2 012FAC 3802 24951+ LER FR0,FR2 012FAE 3802 24952+ LER FR0,FR2 012FB0 3802 24953+ LER FR0,FR2 012FB2 3802 24954+ LER FR0,FR2 012FB4 3802 24955+ LER FR0,FR2 012FB6 3802 24956+ LER FR0,FR2 012FB8 3802 24957+ LER FR0,FR2 012FBA 3802 24958+ LER FR0,FR2 012FBC 3802 24959+ LER FR0,FR2 012FBE 3802 24960+ LER FR0,FR2 012FC0 3802 24961+ LER FR0,FR2 012FC2 3802 24962+ LER FR0,FR2 012FC4 3802 24963+ LER FR0,FR2 012FC6 3802 24964+ LER FR0,FR2 012FC8 3802 24965+ LER FR0,FR2 012FCA 3802 24966+ LER FR0,FR2 012FCC 3802 24967+ LER FR0,FR2 012FCE 3802 24968+ LER FR0,FR2 012FD0 3802 24969+ LER FR0,FR2 012FD2 3802 24970+ LER FR0,FR2 012FD4 3802 24971+ LER FR0,FR2 012FD6 3802 24972+ LER FR0,FR2 012FD8 3802 24973+ LER FR0,FR2 012FDA 3802 24974+ LER FR0,FR2 012FDC 3802 24975+ LER FR0,FR2 012FDE 3802 24976+ LER FR0,FR2 012FE0 3802 24977+ LER FR0,FR2 PAGE 457 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 012FE2 3802 24978+ LER FR0,FR2 012FE4 3802 24979+ LER FR0,FR2 012FE6 3802 24980+ LER FR0,FR2 012FE8 3802 24981+ LER FR0,FR2 012FEA 3802 24982+ LER FR0,FR2 012FEC 3802 24983+ LER FR0,FR2 012FEE 3802 24984+ LER FR0,FR2 012FF0 3802 24985+ LER FR0,FR2 012FF2 3802 24986+ LER FR0,FR2 012FF4 3802 24987+ LER FR0,FR2 012FF6 3802 24988+ LER FR0,FR2 012FF8 3802 24989+ LER FR0,FR2 012FFA 3802 24990+ LER FR0,FR2 012FFC 3802 24991+ LER FR0,FR2 012FFE 3802 24992+ LER FR0,FR2 013000 3802 24993+ LER FR0,FR2 013002 3802 24994+ LER FR0,FR2 013004 3802 24995+ LER FR0,FR2 013006 3802 24996+ LER FR0,FR2 013008 3802 24997+ LER FR0,FR2 01300A 3802 24998+ LER FR0,FR2 01300C 3802 24999+ LER FR0,FR2 01300E 3802 25000+ LER FR0,FR2 013010 3802 25001+ LER FR0,FR2 25002+* 013012 06FB 25003 BCTR R15,R11 25004 TSIMRET 013014 58F0 C100 13028 25005+ L R15,=A(SAVETST) R15 := current save area 013018 58DF 0004 00004 25006+ L R13,4(R15) get old save area back 01301C 98EC D00C 0000C 25007+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013020 07FE 25008+ BR 14 RETURN 02000000 25009 TSIMEND 013028 25010+ LTORG 013028 00000458 25011 =A(SAVETST) 01302C 4111999A 25012 =E'1.1' 13030 25013+T500TEND EQU * 25014 * 25015 * Test 501 -- LE R,m --------------------------------------- 25016 * 25017 TSIMBEG T501,10000,50,1,C'LE R,m' 25018+* 003A44 25019+TDSCDAT CSECT 003A48 25020+ DS 0D 25021+* 003A48 00013030 25022+T501TDSC DC A(T501) // TENTRY 003A4C 00000100 25023+ DC A(T501TEND-T501) // TLENGTH 003A50 00002710 25024+ DC F'10000' // TLRCNT 003A54 00000032 25025+ DC F'50' // TIGCNT 003A58 00000001 25026+ DC F'1' // TLTYPE 001AD4 25027+TEXT CSECT 001AD4 E3F5F0F1 25028+SPTR2241 DC C'T501' 003A5C 25029+TDSCDAT CSECT 003A5C 25030+ DS 0F 003A5C 04001AD4 25031+ DC AL1(L'SPTR2241),AL3(SPTR2241) 001AD8 25032+TEXT CSECT PAGE 458 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 001AD8 D3C540D96B94 25033+SPTR2242 DC C'LE R,m' 003A60 25034+TDSCDAT CSECT 003A60 25035+ DS 0F 003A60 06001AD8 25036+ DC AL1(L'SPTR2242),AL3(SPTR2242) 25037+* 004C74 25038+TDSCTBL CSECT 04C74 25039+T501TPTR EQU * 004C74 00003A48 25040+ DC A(T501TDSC) enabled test 25041+* 013030 25042+TCODE CSECT 013030 25043+ DS 0D ensure double word alignment for test 013030 25044+T501 DS 0H 01650000 013030 90EC D00C 0000C 25045+ STM 14,12,12(13) SAVE REGISTERS 02950000 013034 18CF 25046+ LR R12,R15 base register := entry address 13030 25047+ USING T501,R12 declare code base register 013036 41B0 C01E 1304E 25048+ LA R11,T501L load loop target to R11 01303A 58F0 C0F8 13128 25049+ L R15,=A(SAVETST) R15 := current save area 01303E 50DF 0004 00004 25050+ ST R13,4(R15) set back pointer in current save area 013042 182D 25051+ LR R2,R13 remember callers save area 013044 18DF 25052+ LR R13,R15 setup current save area 013046 50D2 0008 00008 25053+ ST R13,8(R2) set forw pointer in callers save area 00000 25054+ USING TDSC,R1 declare TDSC base register 01304A 58F0 1008 00008 25055+ L R15,TLRCNT load local repeat count to R15 25056+* 25057 * 25058 T501L REPINS LE,(FR0,=E'1.0') repeat: LE FR0,=E'1.0' 25059+* 25060+* build from sublist &ALIST a comma separated string &ARGS 25061+* 25062+* 25063+* 25064+* 25065+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 25066+* this allows to transfer the repeat count from last TDSCGEN call 25067+* 25068+* 1304E 25069+T501L EQU * 25070+* 25071+* write a comment indicating what REPINS does (in case NOGEN in effect) 25072+* 25073+*,// REPINS: do 50 times: 25074+* 25075+* MNOTE requires that ' is doubled for expanded variables 25076+* thus build &MASTR as a copy of '&ARGS with ' doubled 25077+* 25078+* 25079+*,// LE FR0,=E'1.0' 25080+* 25081+* finally generate code: &ICNT copies of &CODE &ARGS 25082+* 01304E 7800 C0FC 1312C 25083+ LE FR0,=E'1.0' 013052 7800 C0FC 1312C 25084+ LE FR0,=E'1.0' 013056 7800 C0FC 1312C 25085+ LE FR0,=E'1.0' 01305A 7800 C0FC 1312C 25086+ LE FR0,=E'1.0' 01305E 7800 C0FC 1312C 25087+ LE FR0,=E'1.0' PAGE 459 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013062 7800 C0FC 1312C 25088+ LE FR0,=E'1.0' 013066 7800 C0FC 1312C 25089+ LE FR0,=E'1.0' 01306A 7800 C0FC 1312C 25090+ LE FR0,=E'1.0' 01306E 7800 C0FC 1312C 25091+ LE FR0,=E'1.0' 013072 7800 C0FC 1312C 25092+ LE FR0,=E'1.0' 013076 7800 C0FC 1312C 25093+ LE FR0,=E'1.0' 01307A 7800 C0FC 1312C 25094+ LE FR0,=E'1.0' 01307E 7800 C0FC 1312C 25095+ LE FR0,=E'1.0' 013082 7800 C0FC 1312C 25096+ LE FR0,=E'1.0' 013086 7800 C0FC 1312C 25097+ LE FR0,=E'1.0' 01308A 7800 C0FC 1312C 25098+ LE FR0,=E'1.0' 01308E 7800 C0FC 1312C 25099+ LE FR0,=E'1.0' 013092 7800 C0FC 1312C 25100+ LE FR0,=E'1.0' 013096 7800 C0FC 1312C 25101+ LE FR0,=E'1.0' 01309A 7800 C0FC 1312C 25102+ LE FR0,=E'1.0' 01309E 7800 C0FC 1312C 25103+ LE FR0,=E'1.0' 0130A2 7800 C0FC 1312C 25104+ LE FR0,=E'1.0' 0130A6 7800 C0FC 1312C 25105+ LE FR0,=E'1.0' 0130AA 7800 C0FC 1312C 25106+ LE FR0,=E'1.0' 0130AE 7800 C0FC 1312C 25107+ LE FR0,=E'1.0' 0130B2 7800 C0FC 1312C 25108+ LE FR0,=E'1.0' 0130B6 7800 C0FC 1312C 25109+ LE FR0,=E'1.0' 0130BA 7800 C0FC 1312C 25110+ LE FR0,=E'1.0' 0130BE 7800 C0FC 1312C 25111+ LE FR0,=E'1.0' 0130C2 7800 C0FC 1312C 25112+ LE FR0,=E'1.0' 0130C6 7800 C0FC 1312C 25113+ LE FR0,=E'1.0' 0130CA 7800 C0FC 1312C 25114+ LE FR0,=E'1.0' 0130CE 7800 C0FC 1312C 25115+ LE FR0,=E'1.0' 0130D2 7800 C0FC 1312C 25116+ LE FR0,=E'1.0' 0130D6 7800 C0FC 1312C 25117+ LE FR0,=E'1.0' 0130DA 7800 C0FC 1312C 25118+ LE FR0,=E'1.0' 0130DE 7800 C0FC 1312C 25119+ LE FR0,=E'1.0' 0130E2 7800 C0FC 1312C 25120+ LE FR0,=E'1.0' 0130E6 7800 C0FC 1312C 25121+ LE FR0,=E'1.0' 0130EA 7800 C0FC 1312C 25122+ LE FR0,=E'1.0' 0130EE 7800 C0FC 1312C 25123+ LE FR0,=E'1.0' 0130F2 7800 C0FC 1312C 25124+ LE FR0,=E'1.0' 0130F6 7800 C0FC 1312C 25125+ LE FR0,=E'1.0' 0130FA 7800 C0FC 1312C 25126+ LE FR0,=E'1.0' 0130FE 7800 C0FC 1312C 25127+ LE FR0,=E'1.0' 013102 7800 C0FC 1312C 25128+ LE FR0,=E'1.0' 013106 7800 C0FC 1312C 25129+ LE FR0,=E'1.0' 01310A 7800 C0FC 1312C 25130+ LE FR0,=E'1.0' 01310E 7800 C0FC 1312C 25131+ LE FR0,=E'1.0' 013112 7800 C0FC 1312C 25132+ LE FR0,=E'1.0' 25133+* 013116 06FB 25134 BCTR R15,R11 25135 TSIMRET 013118 58F0 C0F8 13128 25136+ L R15,=A(SAVETST) R15 := current save area 01311C 58DF 0004 00004 25137+ L R13,4(R15) get old save area back 013120 98EC D00C 0000C 25138+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013124 07FE 25139+ BR 14 RETURN 02000000 25140 TSIMEND 013128 25141+ LTORG 013128 00000458 25142 =A(SAVETST) PAGE 460 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01312C 41100000 25143 =E'1.0' 13130 25144+T501TEND EQU * 25145 * 25146 * Test 502 -- LE R,m (unal) -------------------------------- 25147 * 25148 TSIMBEG T502,10000,50,1,C'LE R,m (unal)' 25149+* 003A64 25150+TDSCDAT CSECT 003A68 25151+ DS 0D 25152+* 003A68 00013130 25153+T502TDSC DC A(T502) // TENTRY 003A6C 0000010C 25154+ DC A(T502TEND-T502) // TLENGTH 003A70 00002710 25155+ DC F'10000' // TLRCNT 003A74 00000032 25156+ DC F'50' // TIGCNT 003A78 00000001 25157+ DC F'1' // TLTYPE 001ADE 25158+TEXT CSECT 001ADE E3F5F0F2 25159+SPTR2253 DC C'T502' 003A7C 25160+TDSCDAT CSECT 003A7C 25161+ DS 0F 003A7C 04001ADE 25162+ DC AL1(L'SPTR2253),AL3(SPTR2253) 001AE2 25163+TEXT CSECT 001AE2 D3C540D96B94404D 25164+SPTR2254 DC C'LE R,m (unal)' 003A80 25165+TDSCDAT CSECT 003A80 25166+ DS 0F 003A80 0D001AE2 25167+ DC AL1(L'SPTR2254),AL3(SPTR2254) 25168+* 004C78 25169+TDSCTBL CSECT 04C78 25170+T502TPTR EQU * 004C78 00003A68 25171+ DC A(T502TDSC) enabled test 25172+* 013130 25173+TCODE CSECT 013130 25174+ DS 0D ensure double word alignment for test 013130 25175+T502 DS 0H 01650000 013130 90EC D00C 0000C 25176+ STM 14,12,12(13) SAVE REGISTERS 02950000 013134 18CF 25177+ LR R12,R15 base register := entry address 13130 25178+ USING T502,R12 declare code base register 013136 41B0 C022 13152 25179+ LA R11,T502L load loop target to R11 01313A 58F0 C108 13238 25180+ L R15,=A(SAVETST) R15 := current save area 01313E 50DF 0004 00004 25181+ ST R13,4(R15) set back pointer in current save area 013142 182D 25182+ LR R2,R13 remember callers save area 013144 18DF 25183+ LR R13,R15 setup current save area 013146 50D2 0008 00008 25184+ ST R13,8(R2) set forw pointer in callers save area 00000 25185+ USING TDSC,R1 declare TDSC base register 01314A 58F0 1008 00008 25186+ L R15,TLRCNT load local repeat count to R15 25187+* 25188 * 01314E 4130 C0FC 1322C 25189 LA R3,T502V 25190 T502L REPINS LE,(FR0,1(R3)) repeat: LE FR0,1(R3)' 25191+* 25192+* build from sublist &ALIST a comma separated string &ARGS 25193+* 25194+* 25195+* 25196+* 25197+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT PAGE 461 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 25198+* this allows to transfer the repeat count from last TDSCGEN call 25199+* 25200+* 13152 25201+T502L EQU * 25202+* 25203+* write a comment indicating what REPINS does (in case NOGEN in effect) 25204+* 25205+*,// REPINS: do 50 times: 25206+* 25207+* MNOTE requires that ' is doubled for expanded variables 25208+* thus build &MASTR as a copy of '&ARGS with ' doubled 25209+* 25210+* 25211+*,// LE FR0,1(R3) 25212+* 25213+* finally generate code: &ICNT copies of &CODE &ARGS 25214+* 013152 7803 0001 00001 25215+ LE FR0,1(R3) 013156 7803 0001 00001 25216+ LE FR0,1(R3) 01315A 7803 0001 00001 25217+ LE FR0,1(R3) 01315E 7803 0001 00001 25218+ LE FR0,1(R3) 013162 7803 0001 00001 25219+ LE FR0,1(R3) 013166 7803 0001 00001 25220+ LE FR0,1(R3) 01316A 7803 0001 00001 25221+ LE FR0,1(R3) 01316E 7803 0001 00001 25222+ LE FR0,1(R3) 013172 7803 0001 00001 25223+ LE FR0,1(R3) 013176 7803 0001 00001 25224+ LE FR0,1(R3) 01317A 7803 0001 00001 25225+ LE FR0,1(R3) 01317E 7803 0001 00001 25226+ LE FR0,1(R3) 013182 7803 0001 00001 25227+ LE FR0,1(R3) 013186 7803 0001 00001 25228+ LE FR0,1(R3) 01318A 7803 0001 00001 25229+ LE FR0,1(R3) 01318E 7803 0001 00001 25230+ LE FR0,1(R3) 013192 7803 0001 00001 25231+ LE FR0,1(R3) 013196 7803 0001 00001 25232+ LE FR0,1(R3) 01319A 7803 0001 00001 25233+ LE FR0,1(R3) 01319E 7803 0001 00001 25234+ LE FR0,1(R3) 0131A2 7803 0001 00001 25235+ LE FR0,1(R3) 0131A6 7803 0001 00001 25236+ LE FR0,1(R3) 0131AA 7803 0001 00001 25237+ LE FR0,1(R3) 0131AE 7803 0001 00001 25238+ LE FR0,1(R3) 0131B2 7803 0001 00001 25239+ LE FR0,1(R3) 0131B6 7803 0001 00001 25240+ LE FR0,1(R3) 0131BA 7803 0001 00001 25241+ LE FR0,1(R3) 0131BE 7803 0001 00001 25242+ LE FR0,1(R3) 0131C2 7803 0001 00001 25243+ LE FR0,1(R3) 0131C6 7803 0001 00001 25244+ LE FR0,1(R3) 0131CA 7803 0001 00001 25245+ LE FR0,1(R3) 0131CE 7803 0001 00001 25246+ LE FR0,1(R3) 0131D2 7803 0001 00001 25247+ LE FR0,1(R3) 0131D6 7803 0001 00001 25248+ LE FR0,1(R3) 0131DA 7803 0001 00001 25249+ LE FR0,1(R3) 0131DE 7803 0001 00001 25250+ LE FR0,1(R3) 0131E2 7803 0001 00001 25251+ LE FR0,1(R3) 0131E6 7803 0001 00001 25252+ LE FR0,1(R3) PAGE 462 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0131EA 7803 0001 00001 25253+ LE FR0,1(R3) 0131EE 7803 0001 00001 25254+ LE FR0,1(R3) 0131F2 7803 0001 00001 25255+ LE FR0,1(R3) 0131F6 7803 0001 00001 25256+ LE FR0,1(R3) 0131FA 7803 0001 00001 25257+ LE FR0,1(R3) 0131FE 7803 0001 00001 25258+ LE FR0,1(R3) 013202 7803 0001 00001 25259+ LE FR0,1(R3) 013206 7803 0001 00001 25260+ LE FR0,1(R3) 01320A 7803 0001 00001 25261+ LE FR0,1(R3) 01320E 7803 0001 00001 25262+ LE FR0,1(R3) 013212 7803 0001 00001 25263+ LE FR0,1(R3) 013216 7803 0001 00001 25264+ LE FR0,1(R3) 25265+* 01321A 06FB 25266 BCTR R15,R11 25267 TSIMRET 01321C 58F0 C108 13238 25268+ L R15,=A(SAVETST) R15 := current save area 013220 58DF 0004 00004 25269+ L R13,4(R15) get old save area back 013224 98EC D00C 0000C 25270+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013228 07FE 25271+ BR 14 RETURN 02000000 25272 * 01322C 25273 DS 0E 01322C 4E4E4E4E4E4E4E4E 25274 T502V DC 2X'4E4E4E4E' target for unaligned load 25275 TSIMEND 013238 25276+ LTORG 013238 00000458 25277 =A(SAVETST) 1323C 25278+T502TEND EQU * 25279 * 25280 * Test 503 -- LTER R,R ------------------------------------- 25281 * 25282 TSIMBEG T503,10000,100,1,C'LTER R,R' 25283+* 003A84 25284+TDSCDAT CSECT 003A88 25285+ DS 0D 25286+* 003A88 00013240 25287+T503TDSC DC A(T503) // TENTRY 003A8C 00000108 25288+ DC A(T503TEND-T503) // TLENGTH 003A90 00002710 25289+ DC F'10000' // TLRCNT 003A94 00000064 25290+ DC F'100' // TIGCNT 003A98 00000001 25291+ DC F'1' // TLTYPE 001AEF 25292+TEXT CSECT 001AEF E3F5F0F3 25293+SPTR2265 DC C'T503' 003A9C 25294+TDSCDAT CSECT 003A9C 25295+ DS 0F 003A9C 04001AEF 25296+ DC AL1(L'SPTR2265),AL3(SPTR2265) 001AF3 25297+TEXT CSECT 001AF3 D3E3C5D940D96BD9 25298+SPTR2266 DC C'LTER R,R' 003AA0 25299+TDSCDAT CSECT 003AA0 25300+ DS 0F 003AA0 08001AF3 25301+ DC AL1(L'SPTR2266),AL3(SPTR2266) 25302+* 004C7C 25303+TDSCTBL CSECT 04C7C 25304+T503TPTR EQU * 004C7C 00003A88 25305+ DC A(T503TDSC) enabled test 25306+* 01323C 25307+TCODE CSECT PAGE 463 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013240 25308+ DS 0D ensure double word alignment for test 013240 25309+T503 DS 0H 01650000 013240 90EC D00C 0000C 25310+ STM 14,12,12(13) SAVE REGISTERS 02950000 013244 18CF 25311+ LR R12,R15 base register := entry address 13240 25312+ USING T503,R12 declare code base register 013246 41B0 C022 13262 25313+ LA R11,T503L load loop target to R11 01324A 58F0 C100 13340 25314+ L R15,=A(SAVETST) R15 := current save area 01324E 50DF 0004 00004 25315+ ST R13,4(R15) set back pointer in current save area 013252 182D 25316+ LR R2,R13 remember callers save area 013254 18DF 25317+ LR R13,R15 setup current save area 013256 50D2 0008 00008 25318+ ST R13,8(R2) set forw pointer in callers save area 00000 25319+ USING TDSC,R1 declare TDSC base register 01325A 58F0 1008 00008 25320+ L R15,TLRCNT load local repeat count to R15 25321+* 25322 * 01325E 7820 C104 13344 25323 LE FR2,=E'1.0' 25324 T503L REPINS LTER,(FR0,FR2) repeat: LTER FR0,FR2 25325+* 25326+* build from sublist &ALIST a comma separated string &ARGS 25327+* 25328+* 25329+* 25330+* 25331+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 25332+* this allows to transfer the repeat count from last TDSCGEN call 25333+* 25334+* 13262 25335+T503L EQU * 25336+* 25337+* write a comment indicating what REPINS does (in case NOGEN in effect) 25338+* 25339+*,// REPINS: do 100 times: 25340+* 25341+* MNOTE requires that ' is doubled for expanded variables 25342+* thus build &MASTR as a copy of '&ARGS with ' doubled 25343+* 25344+* 25345+*,// LTER FR0,FR2 25346+* 25347+* finally generate code: &ICNT copies of &CODE &ARGS 25348+* 013262 3202 25349+ LTER FR0,FR2 013264 3202 25350+ LTER FR0,FR2 013266 3202 25351+ LTER FR0,FR2 013268 3202 25352+ LTER FR0,FR2 01326A 3202 25353+ LTER FR0,FR2 01326C 3202 25354+ LTER FR0,FR2 01326E 3202 25355+ LTER FR0,FR2 013270 3202 25356+ LTER FR0,FR2 013272 3202 25357+ LTER FR0,FR2 013274 3202 25358+ LTER FR0,FR2 013276 3202 25359+ LTER FR0,FR2 013278 3202 25360+ LTER FR0,FR2 01327A 3202 25361+ LTER FR0,FR2 01327C 3202 25362+ LTER FR0,FR2 PAGE 464 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01327E 3202 25363+ LTER FR0,FR2 013280 3202 25364+ LTER FR0,FR2 013282 3202 25365+ LTER FR0,FR2 013284 3202 25366+ LTER FR0,FR2 013286 3202 25367+ LTER FR0,FR2 013288 3202 25368+ LTER FR0,FR2 01328A 3202 25369+ LTER FR0,FR2 01328C 3202 25370+ LTER FR0,FR2 01328E 3202 25371+ LTER FR0,FR2 013290 3202 25372+ LTER FR0,FR2 013292 3202 25373+ LTER FR0,FR2 013294 3202 25374+ LTER FR0,FR2 013296 3202 25375+ LTER FR0,FR2 013298 3202 25376+ LTER FR0,FR2 01329A 3202 25377+ LTER FR0,FR2 01329C 3202 25378+ LTER FR0,FR2 01329E 3202 25379+ LTER FR0,FR2 0132A0 3202 25380+ LTER FR0,FR2 0132A2 3202 25381+ LTER FR0,FR2 0132A4 3202 25382+ LTER FR0,FR2 0132A6 3202 25383+ LTER FR0,FR2 0132A8 3202 25384+ LTER FR0,FR2 0132AA 3202 25385+ LTER FR0,FR2 0132AC 3202 25386+ LTER FR0,FR2 0132AE 3202 25387+ LTER FR0,FR2 0132B0 3202 25388+ LTER FR0,FR2 0132B2 3202 25389+ LTER FR0,FR2 0132B4 3202 25390+ LTER FR0,FR2 0132B6 3202 25391+ LTER FR0,FR2 0132B8 3202 25392+ LTER FR0,FR2 0132BA 3202 25393+ LTER FR0,FR2 0132BC 3202 25394+ LTER FR0,FR2 0132BE 3202 25395+ LTER FR0,FR2 0132C0 3202 25396+ LTER FR0,FR2 0132C2 3202 25397+ LTER FR0,FR2 0132C4 3202 25398+ LTER FR0,FR2 0132C6 3202 25399+ LTER FR0,FR2 0132C8 3202 25400+ LTER FR0,FR2 0132CA 3202 25401+ LTER FR0,FR2 0132CC 3202 25402+ LTER FR0,FR2 0132CE 3202 25403+ LTER FR0,FR2 0132D0 3202 25404+ LTER FR0,FR2 0132D2 3202 25405+ LTER FR0,FR2 0132D4 3202 25406+ LTER FR0,FR2 0132D6 3202 25407+ LTER FR0,FR2 0132D8 3202 25408+ LTER FR0,FR2 0132DA 3202 25409+ LTER FR0,FR2 0132DC 3202 25410+ LTER FR0,FR2 0132DE 3202 25411+ LTER FR0,FR2 0132E0 3202 25412+ LTER FR0,FR2 0132E2 3202 25413+ LTER FR0,FR2 0132E4 3202 25414+ LTER FR0,FR2 0132E6 3202 25415+ LTER FR0,FR2 0132E8 3202 25416+ LTER FR0,FR2 0132EA 3202 25417+ LTER FR0,FR2 PAGE 465 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0132EC 3202 25418+ LTER FR0,FR2 0132EE 3202 25419+ LTER FR0,FR2 0132F0 3202 25420+ LTER FR0,FR2 0132F2 3202 25421+ LTER FR0,FR2 0132F4 3202 25422+ LTER FR0,FR2 0132F6 3202 25423+ LTER FR0,FR2 0132F8 3202 25424+ LTER FR0,FR2 0132FA 3202 25425+ LTER FR0,FR2 0132FC 3202 25426+ LTER FR0,FR2 0132FE 3202 25427+ LTER FR0,FR2 013300 3202 25428+ LTER FR0,FR2 013302 3202 25429+ LTER FR0,FR2 013304 3202 25430+ LTER FR0,FR2 013306 3202 25431+ LTER FR0,FR2 013308 3202 25432+ LTER FR0,FR2 01330A 3202 25433+ LTER FR0,FR2 01330C 3202 25434+ LTER FR0,FR2 01330E 3202 25435+ LTER FR0,FR2 013310 3202 25436+ LTER FR0,FR2 013312 3202 25437+ LTER FR0,FR2 013314 3202 25438+ LTER FR0,FR2 013316 3202 25439+ LTER FR0,FR2 013318 3202 25440+ LTER FR0,FR2 01331A 3202 25441+ LTER FR0,FR2 01331C 3202 25442+ LTER FR0,FR2 01331E 3202 25443+ LTER FR0,FR2 013320 3202 25444+ LTER FR0,FR2 013322 3202 25445+ LTER FR0,FR2 013324 3202 25446+ LTER FR0,FR2 013326 3202 25447+ LTER FR0,FR2 013328 3202 25448+ LTER FR0,FR2 25449+* 01332A 06FB 25450 BCTR R15,R11 25451 TSIMRET 01332C 58F0 C100 13340 25452+ L R15,=A(SAVETST) R15 := current save area 013330 58DF 0004 00004 25453+ L R13,4(R15) get old save area back 013334 98EC D00C 0000C 25454+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013338 07FE 25455+ BR 14 RETURN 02000000 25456 TSIMEND 013340 25457+ LTORG 013340 00000458 25458 =A(SAVETST) 013344 41100000 25459 =E'1.0' 13348 25460+T503TEND EQU * 25461 * 25462 * Test 504 -- LCER R,R ------------------------------------- 25463 * 25464 TSIMBEG T504,10000,100,1,C'LCER R,R' 25465+* 003AA4 25466+TDSCDAT CSECT 003AA8 25467+ DS 0D 25468+* 003AA8 00013348 25469+T504TDSC DC A(T504) // TENTRY 003AAC 00000108 25470+ DC A(T504TEND-T504) // TLENGTH 003AB0 00002710 25471+ DC F'10000' // TLRCNT 003AB4 00000064 25472+ DC F'100' // TIGCNT PAGE 466 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003AB8 00000001 25473+ DC F'1' // TLTYPE 001AFB 25474+TEXT CSECT 001AFB E3F5F0F4 25475+SPTR2277 DC C'T504' 003ABC 25476+TDSCDAT CSECT 003ABC 25477+ DS 0F 003ABC 04001AFB 25478+ DC AL1(L'SPTR2277),AL3(SPTR2277) 001AFF 25479+TEXT CSECT 001AFF D3C3C5D940D96BD9 25480+SPTR2278 DC C'LCER R,R' 003AC0 25481+TDSCDAT CSECT 003AC0 25482+ DS 0F 003AC0 08001AFF 25483+ DC AL1(L'SPTR2278),AL3(SPTR2278) 25484+* 004C80 25485+TDSCTBL CSECT 04C80 25486+T504TPTR EQU * 004C80 00003AA8 25487+ DC A(T504TDSC) enabled test 25488+* 013348 25489+TCODE CSECT 013348 25490+ DS 0D ensure double word alignment for test 013348 25491+T504 DS 0H 01650000 013348 90EC D00C 0000C 25492+ STM 14,12,12(13) SAVE REGISTERS 02950000 01334C 18CF 25493+ LR R12,R15 base register := entry address 13348 25494+ USING T504,R12 declare code base register 01334E 41B0 C022 1336A 25495+ LA R11,T504L load loop target to R11 013352 58F0 C100 13448 25496+ L R15,=A(SAVETST) R15 := current save area 013356 50DF 0004 00004 25497+ ST R13,4(R15) set back pointer in current save area 01335A 182D 25498+ LR R2,R13 remember callers save area 01335C 18DF 25499+ LR R13,R15 setup current save area 01335E 50D2 0008 00008 25500+ ST R13,8(R2) set forw pointer in callers save area 00000 25501+ USING TDSC,R1 declare TDSC base register 013362 58F0 1008 00008 25502+ L R15,TLRCNT load local repeat count to R15 25503+* 25504 * 013366 7820 C104 1344C 25505 LE FR2,=E'1.0' 25506 T504L REPINS LCER,(FR0,FR2) repeat: LCER FR0,FR2 25507+* 25508+* build from sublist &ALIST a comma separated string &ARGS 25509+* 25510+* 25511+* 25512+* 25513+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 25514+* this allows to transfer the repeat count from last TDSCGEN call 25515+* 25516+* 1336A 25517+T504L EQU * 25518+* 25519+* write a comment indicating what REPINS does (in case NOGEN in effect) 25520+* 25521+*,// REPINS: do 100 times: 25522+* 25523+* MNOTE requires that ' is doubled for expanded variables 25524+* thus build &MASTR as a copy of '&ARGS with ' doubled 25525+* 25526+* 25527+*,// LCER FR0,FR2 PAGE 467 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 25528+* 25529+* finally generate code: &ICNT copies of &CODE &ARGS 25530+* 01336A 3302 25531+ LCER FR0,FR2 01336C 3302 25532+ LCER FR0,FR2 01336E 3302 25533+ LCER FR0,FR2 013370 3302 25534+ LCER FR0,FR2 013372 3302 25535+ LCER FR0,FR2 013374 3302 25536+ LCER FR0,FR2 013376 3302 25537+ LCER FR0,FR2 013378 3302 25538+ LCER FR0,FR2 01337A 3302 25539+ LCER FR0,FR2 01337C 3302 25540+ LCER FR0,FR2 01337E 3302 25541+ LCER FR0,FR2 013380 3302 25542+ LCER FR0,FR2 013382 3302 25543+ LCER FR0,FR2 013384 3302 25544+ LCER FR0,FR2 013386 3302 25545+ LCER FR0,FR2 013388 3302 25546+ LCER FR0,FR2 01338A 3302 25547+ LCER FR0,FR2 01338C 3302 25548+ LCER FR0,FR2 01338E 3302 25549+ LCER FR0,FR2 013390 3302 25550+ LCER FR0,FR2 013392 3302 25551+ LCER FR0,FR2 013394 3302 25552+ LCER FR0,FR2 013396 3302 25553+ LCER FR0,FR2 013398 3302 25554+ LCER FR0,FR2 01339A 3302 25555+ LCER FR0,FR2 01339C 3302 25556+ LCER FR0,FR2 01339E 3302 25557+ LCER FR0,FR2 0133A0 3302 25558+ LCER FR0,FR2 0133A2 3302 25559+ LCER FR0,FR2 0133A4 3302 25560+ LCER FR0,FR2 0133A6 3302 25561+ LCER FR0,FR2 0133A8 3302 25562+ LCER FR0,FR2 0133AA 3302 25563+ LCER FR0,FR2 0133AC 3302 25564+ LCER FR0,FR2 0133AE 3302 25565+ LCER FR0,FR2 0133B0 3302 25566+ LCER FR0,FR2 0133B2 3302 25567+ LCER FR0,FR2 0133B4 3302 25568+ LCER FR0,FR2 0133B6 3302 25569+ LCER FR0,FR2 0133B8 3302 25570+ LCER FR0,FR2 0133BA 3302 25571+ LCER FR0,FR2 0133BC 3302 25572+ LCER FR0,FR2 0133BE 3302 25573+ LCER FR0,FR2 0133C0 3302 25574+ LCER FR0,FR2 0133C2 3302 25575+ LCER FR0,FR2 0133C4 3302 25576+ LCER FR0,FR2 0133C6 3302 25577+ LCER FR0,FR2 0133C8 3302 25578+ LCER FR0,FR2 0133CA 3302 25579+ LCER FR0,FR2 0133CC 3302 25580+ LCER FR0,FR2 0133CE 3302 25581+ LCER FR0,FR2 0133D0 3302 25582+ LCER FR0,FR2 PAGE 468 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0133D2 3302 25583+ LCER FR0,FR2 0133D4 3302 25584+ LCER FR0,FR2 0133D6 3302 25585+ LCER FR0,FR2 0133D8 3302 25586+ LCER FR0,FR2 0133DA 3302 25587+ LCER FR0,FR2 0133DC 3302 25588+ LCER FR0,FR2 0133DE 3302 25589+ LCER FR0,FR2 0133E0 3302 25590+ LCER FR0,FR2 0133E2 3302 25591+ LCER FR0,FR2 0133E4 3302 25592+ LCER FR0,FR2 0133E6 3302 25593+ LCER FR0,FR2 0133E8 3302 25594+ LCER FR0,FR2 0133EA 3302 25595+ LCER FR0,FR2 0133EC 3302 25596+ LCER FR0,FR2 0133EE 3302 25597+ LCER FR0,FR2 0133F0 3302 25598+ LCER FR0,FR2 0133F2 3302 25599+ LCER FR0,FR2 0133F4 3302 25600+ LCER FR0,FR2 0133F6 3302 25601+ LCER FR0,FR2 0133F8 3302 25602+ LCER FR0,FR2 0133FA 3302 25603+ LCER FR0,FR2 0133FC 3302 25604+ LCER FR0,FR2 0133FE 3302 25605+ LCER FR0,FR2 013400 3302 25606+ LCER FR0,FR2 013402 3302 25607+ LCER FR0,FR2 013404 3302 25608+ LCER FR0,FR2 013406 3302 25609+ LCER FR0,FR2 013408 3302 25610+ LCER FR0,FR2 01340A 3302 25611+ LCER FR0,FR2 01340C 3302 25612+ LCER FR0,FR2 01340E 3302 25613+ LCER FR0,FR2 013410 3302 25614+ LCER FR0,FR2 013412 3302 25615+ LCER FR0,FR2 013414 3302 25616+ LCER FR0,FR2 013416 3302 25617+ LCER FR0,FR2 013418 3302 25618+ LCER FR0,FR2 01341A 3302 25619+ LCER FR0,FR2 01341C 3302 25620+ LCER FR0,FR2 01341E 3302 25621+ LCER FR0,FR2 013420 3302 25622+ LCER FR0,FR2 013422 3302 25623+ LCER FR0,FR2 013424 3302 25624+ LCER FR0,FR2 013426 3302 25625+ LCER FR0,FR2 013428 3302 25626+ LCER FR0,FR2 01342A 3302 25627+ LCER FR0,FR2 01342C 3302 25628+ LCER FR0,FR2 01342E 3302 25629+ LCER FR0,FR2 013430 3302 25630+ LCER FR0,FR2 25631+* 013432 06FB 25632 BCTR R15,R11 25633 TSIMRET 013434 58F0 C100 13448 25634+ L R15,=A(SAVETST) R15 := current save area 013438 58DF 0004 00004 25635+ L R13,4(R15) get old save area back 01343C 98EC D00C 0000C 25636+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013440 07FE 25637+ BR 14 RETURN 02000000 PAGE 469 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 25638 TSIMEND 013448 25639+ LTORG 013448 00000458 25640 =A(SAVETST) 01344C 41100000 25641 =E'1.0' 13450 25642+T504TEND EQU * 25643 * 25644 * Test 505 -- LNER R,R ------------------------------------- 25645 * 25646 TSIMBEG T505,10000,100,1,C'LNER R,R' 25647+* 003AC4 25648+TDSCDAT CSECT 003AC8 25649+ DS 0D 25650+* 003AC8 00013450 25651+T505TDSC DC A(T505) // TENTRY 003ACC 00000108 25652+ DC A(T505TEND-T505) // TLENGTH 003AD0 00002710 25653+ DC F'10000' // TLRCNT 003AD4 00000064 25654+ DC F'100' // TIGCNT 003AD8 00000001 25655+ DC F'1' // TLTYPE 001B07 25656+TEXT CSECT 001B07 E3F5F0F5 25657+SPTR2289 DC C'T505' 003ADC 25658+TDSCDAT CSECT 003ADC 25659+ DS 0F 003ADC 04001B07 25660+ DC AL1(L'SPTR2289),AL3(SPTR2289) 001B0B 25661+TEXT CSECT 001B0B D3D5C5D940D96BD9 25662+SPTR2290 DC C'LNER R,R' 003AE0 25663+TDSCDAT CSECT 003AE0 25664+ DS 0F 003AE0 08001B0B 25665+ DC AL1(L'SPTR2290),AL3(SPTR2290) 25666+* 004C84 25667+TDSCTBL CSECT 04C84 25668+T505TPTR EQU * 004C84 00003AC8 25669+ DC A(T505TDSC) enabled test 25670+* 013450 25671+TCODE CSECT 013450 25672+ DS 0D ensure double word alignment for test 013450 25673+T505 DS 0H 01650000 013450 90EC D00C 0000C 25674+ STM 14,12,12(13) SAVE REGISTERS 02950000 013454 18CF 25675+ LR R12,R15 base register := entry address 13450 25676+ USING T505,R12 declare code base register 013456 41B0 C022 13472 25677+ LA R11,T505L load loop target to R11 01345A 58F0 C100 13550 25678+ L R15,=A(SAVETST) R15 := current save area 01345E 50DF 0004 00004 25679+ ST R13,4(R15) set back pointer in current save area 013462 182D 25680+ LR R2,R13 remember callers save area 013464 18DF 25681+ LR R13,R15 setup current save area 013466 50D2 0008 00008 25682+ ST R13,8(R2) set forw pointer in callers save area 00000 25683+ USING TDSC,R1 declare TDSC base register 01346A 58F0 1008 00008 25684+ L R15,TLRCNT load local repeat count to R15 25685+* 25686 * 01346E 7820 C104 13554 25687 LE FR2,=E'1.0' 25688 T505L REPINS LNER,(FR0,FR2) repeat: LNER FR0,FR2 25689+* 25690+* build from sublist &ALIST a comma separated string &ARGS 25691+* 25692+* PAGE 470 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 25693+* 25694+* 25695+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 25696+* this allows to transfer the repeat count from last TDSCGEN call 25697+* 25698+* 13472 25699+T505L EQU * 25700+* 25701+* write a comment indicating what REPINS does (in case NOGEN in effect) 25702+* 25703+*,// REPINS: do 100 times: 25704+* 25705+* MNOTE requires that ' is doubled for expanded variables 25706+* thus build &MASTR as a copy of '&ARGS with ' doubled 25707+* 25708+* 25709+*,// LNER FR0,FR2 25710+* 25711+* finally generate code: &ICNT copies of &CODE &ARGS 25712+* 013472 3102 25713+ LNER FR0,FR2 013474 3102 25714+ LNER FR0,FR2 013476 3102 25715+ LNER FR0,FR2 013478 3102 25716+ LNER FR0,FR2 01347A 3102 25717+ LNER FR0,FR2 01347C 3102 25718+ LNER FR0,FR2 01347E 3102 25719+ LNER FR0,FR2 013480 3102 25720+ LNER FR0,FR2 013482 3102 25721+ LNER FR0,FR2 013484 3102 25722+ LNER FR0,FR2 013486 3102 25723+ LNER FR0,FR2 013488 3102 25724+ LNER FR0,FR2 01348A 3102 25725+ LNER FR0,FR2 01348C 3102 25726+ LNER FR0,FR2 01348E 3102 25727+ LNER FR0,FR2 013490 3102 25728+ LNER FR0,FR2 013492 3102 25729+ LNER FR0,FR2 013494 3102 25730+ LNER FR0,FR2 013496 3102 25731+ LNER FR0,FR2 013498 3102 25732+ LNER FR0,FR2 01349A 3102 25733+ LNER FR0,FR2 01349C 3102 25734+ LNER FR0,FR2 01349E 3102 25735+ LNER FR0,FR2 0134A0 3102 25736+ LNER FR0,FR2 0134A2 3102 25737+ LNER FR0,FR2 0134A4 3102 25738+ LNER FR0,FR2 0134A6 3102 25739+ LNER FR0,FR2 0134A8 3102 25740+ LNER FR0,FR2 0134AA 3102 25741+ LNER FR0,FR2 0134AC 3102 25742+ LNER FR0,FR2 0134AE 3102 25743+ LNER FR0,FR2 0134B0 3102 25744+ LNER FR0,FR2 0134B2 3102 25745+ LNER FR0,FR2 0134B4 3102 25746+ LNER FR0,FR2 0134B6 3102 25747+ LNER FR0,FR2 PAGE 471 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0134B8 3102 25748+ LNER FR0,FR2 0134BA 3102 25749+ LNER FR0,FR2 0134BC 3102 25750+ LNER FR0,FR2 0134BE 3102 25751+ LNER FR0,FR2 0134C0 3102 25752+ LNER FR0,FR2 0134C2 3102 25753+ LNER FR0,FR2 0134C4 3102 25754+ LNER FR0,FR2 0134C6 3102 25755+ LNER FR0,FR2 0134C8 3102 25756+ LNER FR0,FR2 0134CA 3102 25757+ LNER FR0,FR2 0134CC 3102 25758+ LNER FR0,FR2 0134CE 3102 25759+ LNER FR0,FR2 0134D0 3102 25760+ LNER FR0,FR2 0134D2 3102 25761+ LNER FR0,FR2 0134D4 3102 25762+ LNER FR0,FR2 0134D6 3102 25763+ LNER FR0,FR2 0134D8 3102 25764+ LNER FR0,FR2 0134DA 3102 25765+ LNER FR0,FR2 0134DC 3102 25766+ LNER FR0,FR2 0134DE 3102 25767+ LNER FR0,FR2 0134E0 3102 25768+ LNER FR0,FR2 0134E2 3102 25769+ LNER FR0,FR2 0134E4 3102 25770+ LNER FR0,FR2 0134E6 3102 25771+ LNER FR0,FR2 0134E8 3102 25772+ LNER FR0,FR2 0134EA 3102 25773+ LNER FR0,FR2 0134EC 3102 25774+ LNER FR0,FR2 0134EE 3102 25775+ LNER FR0,FR2 0134F0 3102 25776+ LNER FR0,FR2 0134F2 3102 25777+ LNER FR0,FR2 0134F4 3102 25778+ LNER FR0,FR2 0134F6 3102 25779+ LNER FR0,FR2 0134F8 3102 25780+ LNER FR0,FR2 0134FA 3102 25781+ LNER FR0,FR2 0134FC 3102 25782+ LNER FR0,FR2 0134FE 3102 25783+ LNER FR0,FR2 013500 3102 25784+ LNER FR0,FR2 013502 3102 25785+ LNER FR0,FR2 013504 3102 25786+ LNER FR0,FR2 013506 3102 25787+ LNER FR0,FR2 013508 3102 25788+ LNER FR0,FR2 01350A 3102 25789+ LNER FR0,FR2 01350C 3102 25790+ LNER FR0,FR2 01350E 3102 25791+ LNER FR0,FR2 013510 3102 25792+ LNER FR0,FR2 013512 3102 25793+ LNER FR0,FR2 013514 3102 25794+ LNER FR0,FR2 013516 3102 25795+ LNER FR0,FR2 013518 3102 25796+ LNER FR0,FR2 01351A 3102 25797+ LNER FR0,FR2 01351C 3102 25798+ LNER FR0,FR2 01351E 3102 25799+ LNER FR0,FR2 013520 3102 25800+ LNER FR0,FR2 013522 3102 25801+ LNER FR0,FR2 013524 3102 25802+ LNER FR0,FR2 PAGE 472 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013526 3102 25803+ LNER FR0,FR2 013528 3102 25804+ LNER FR0,FR2 01352A 3102 25805+ LNER FR0,FR2 01352C 3102 25806+ LNER FR0,FR2 01352E 3102 25807+ LNER FR0,FR2 013530 3102 25808+ LNER FR0,FR2 013532 3102 25809+ LNER FR0,FR2 013534 3102 25810+ LNER FR0,FR2 013536 3102 25811+ LNER FR0,FR2 013538 3102 25812+ LNER FR0,FR2 25813+* 01353A 06FB 25814 BCTR R15,R11 25815 TSIMRET 01353C 58F0 C100 13550 25816+ L R15,=A(SAVETST) R15 := current save area 013540 58DF 0004 00004 25817+ L R13,4(R15) get old save area back 013544 98EC D00C 0000C 25818+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013548 07FE 25819+ BR 14 RETURN 02000000 25820 TSIMEND 013550 25821+ LTORG 013550 00000458 25822 =A(SAVETST) 013554 41100000 25823 =E'1.0' 13558 25824+T505TEND EQU * 25825 * 25826 * Test 506 -- LPER R,R ------------------------------------- 25827 * 25828 TSIMBEG T506,9000,100,1,C'LPER R,R' 25829+* 003AE4 25830+TDSCDAT CSECT 003AE8 25831+ DS 0D 25832+* 003AE8 00013558 25833+T506TDSC DC A(T506) // TENTRY 003AEC 00000108 25834+ DC A(T506TEND-T506) // TLENGTH 003AF0 00002328 25835+ DC F'9000' // TLRCNT 003AF4 00000064 25836+ DC F'100' // TIGCNT 003AF8 00000001 25837+ DC F'1' // TLTYPE 001B13 25838+TEXT CSECT 001B13 E3F5F0F6 25839+SPTR2301 DC C'T506' 003AFC 25840+TDSCDAT CSECT 003AFC 25841+ DS 0F 003AFC 04001B13 25842+ DC AL1(L'SPTR2301),AL3(SPTR2301) 001B17 25843+TEXT CSECT 001B17 D3D7C5D940D96BD9 25844+SPTR2302 DC C'LPER R,R' 003B00 25845+TDSCDAT CSECT 003B00 25846+ DS 0F 003B00 08001B17 25847+ DC AL1(L'SPTR2302),AL3(SPTR2302) 25848+* 004C88 25849+TDSCTBL CSECT 04C88 25850+T506TPTR EQU * 004C88 00003AE8 25851+ DC A(T506TDSC) enabled test 25852+* 013558 25853+TCODE CSECT 013558 25854+ DS 0D ensure double word alignment for test 013558 25855+T506 DS 0H 01650000 013558 90EC D00C 0000C 25856+ STM 14,12,12(13) SAVE REGISTERS 02950000 01355C 18CF 25857+ LR R12,R15 base register := entry address PAGE 473 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 13558 25858+ USING T506,R12 declare code base register 01355E 41B0 C022 1357A 25859+ LA R11,T506L load loop target to R11 013562 58F0 C100 13658 25860+ L R15,=A(SAVETST) R15 := current save area 013566 50DF 0004 00004 25861+ ST R13,4(R15) set back pointer in current save area 01356A 182D 25862+ LR R2,R13 remember callers save area 01356C 18DF 25863+ LR R13,R15 setup current save area 01356E 50D2 0008 00008 25864+ ST R13,8(R2) set forw pointer in callers save area 00000 25865+ USING TDSC,R1 declare TDSC base register 013572 58F0 1008 00008 25866+ L R15,TLRCNT load local repeat count to R15 25867+* 25868 * 013576 7820 C104 1365C 25869 LE FR2,=E'-1.0' 25870 T506L REPINS LPER,(FR0,FR2) repeat: LPER FR0,FR2 25871+* 25872+* build from sublist &ALIST a comma separated string &ARGS 25873+* 25874+* 25875+* 25876+* 25877+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 25878+* this allows to transfer the repeat count from last TDSCGEN call 25879+* 25880+* 1357A 25881+T506L EQU * 25882+* 25883+* write a comment indicating what REPINS does (in case NOGEN in effect) 25884+* 25885+*,// REPINS: do 100 times: 25886+* 25887+* MNOTE requires that ' is doubled for expanded variables 25888+* thus build &MASTR as a copy of '&ARGS with ' doubled 25889+* 25890+* 25891+*,// LPER FR0,FR2 25892+* 25893+* finally generate code: &ICNT copies of &CODE &ARGS 25894+* 01357A 3002 25895+ LPER FR0,FR2 01357C 3002 25896+ LPER FR0,FR2 01357E 3002 25897+ LPER FR0,FR2 013580 3002 25898+ LPER FR0,FR2 013582 3002 25899+ LPER FR0,FR2 013584 3002 25900+ LPER FR0,FR2 013586 3002 25901+ LPER FR0,FR2 013588 3002 25902+ LPER FR0,FR2 01358A 3002 25903+ LPER FR0,FR2 01358C 3002 25904+ LPER FR0,FR2 01358E 3002 25905+ LPER FR0,FR2 013590 3002 25906+ LPER FR0,FR2 013592 3002 25907+ LPER FR0,FR2 013594 3002 25908+ LPER FR0,FR2 013596 3002 25909+ LPER FR0,FR2 013598 3002 25910+ LPER FR0,FR2 01359A 3002 25911+ LPER FR0,FR2 01359C 3002 25912+ LPER FR0,FR2 PAGE 474 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01359E 3002 25913+ LPER FR0,FR2 0135A0 3002 25914+ LPER FR0,FR2 0135A2 3002 25915+ LPER FR0,FR2 0135A4 3002 25916+ LPER FR0,FR2 0135A6 3002 25917+ LPER FR0,FR2 0135A8 3002 25918+ LPER FR0,FR2 0135AA 3002 25919+ LPER FR0,FR2 0135AC 3002 25920+ LPER FR0,FR2 0135AE 3002 25921+ LPER FR0,FR2 0135B0 3002 25922+ LPER FR0,FR2 0135B2 3002 25923+ LPER FR0,FR2 0135B4 3002 25924+ LPER FR0,FR2 0135B6 3002 25925+ LPER FR0,FR2 0135B8 3002 25926+ LPER FR0,FR2 0135BA 3002 25927+ LPER FR0,FR2 0135BC 3002 25928+ LPER FR0,FR2 0135BE 3002 25929+ LPER FR0,FR2 0135C0 3002 25930+ LPER FR0,FR2 0135C2 3002 25931+ LPER FR0,FR2 0135C4 3002 25932+ LPER FR0,FR2 0135C6 3002 25933+ LPER FR0,FR2 0135C8 3002 25934+ LPER FR0,FR2 0135CA 3002 25935+ LPER FR0,FR2 0135CC 3002 25936+ LPER FR0,FR2 0135CE 3002 25937+ LPER FR0,FR2 0135D0 3002 25938+ LPER FR0,FR2 0135D2 3002 25939+ LPER FR0,FR2 0135D4 3002 25940+ LPER FR0,FR2 0135D6 3002 25941+ LPER FR0,FR2 0135D8 3002 25942+ LPER FR0,FR2 0135DA 3002 25943+ LPER FR0,FR2 0135DC 3002 25944+ LPER FR0,FR2 0135DE 3002 25945+ LPER FR0,FR2 0135E0 3002 25946+ LPER FR0,FR2 0135E2 3002 25947+ LPER FR0,FR2 0135E4 3002 25948+ LPER FR0,FR2 0135E6 3002 25949+ LPER FR0,FR2 0135E8 3002 25950+ LPER FR0,FR2 0135EA 3002 25951+ LPER FR0,FR2 0135EC 3002 25952+ LPER FR0,FR2 0135EE 3002 25953+ LPER FR0,FR2 0135F0 3002 25954+ LPER FR0,FR2 0135F2 3002 25955+ LPER FR0,FR2 0135F4 3002 25956+ LPER FR0,FR2 0135F6 3002 25957+ LPER FR0,FR2 0135F8 3002 25958+ LPER FR0,FR2 0135FA 3002 25959+ LPER FR0,FR2 0135FC 3002 25960+ LPER FR0,FR2 0135FE 3002 25961+ LPER FR0,FR2 013600 3002 25962+ LPER FR0,FR2 013602 3002 25963+ LPER FR0,FR2 013604 3002 25964+ LPER FR0,FR2 013606 3002 25965+ LPER FR0,FR2 013608 3002 25966+ LPER FR0,FR2 01360A 3002 25967+ LPER FR0,FR2 PAGE 475 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01360C 3002 25968+ LPER FR0,FR2 01360E 3002 25969+ LPER FR0,FR2 013610 3002 25970+ LPER FR0,FR2 013612 3002 25971+ LPER FR0,FR2 013614 3002 25972+ LPER FR0,FR2 013616 3002 25973+ LPER FR0,FR2 013618 3002 25974+ LPER FR0,FR2 01361A 3002 25975+ LPER FR0,FR2 01361C 3002 25976+ LPER FR0,FR2 01361E 3002 25977+ LPER FR0,FR2 013620 3002 25978+ LPER FR0,FR2 013622 3002 25979+ LPER FR0,FR2 013624 3002 25980+ LPER FR0,FR2 013626 3002 25981+ LPER FR0,FR2 013628 3002 25982+ LPER FR0,FR2 01362A 3002 25983+ LPER FR0,FR2 01362C 3002 25984+ LPER FR0,FR2 01362E 3002 25985+ LPER FR0,FR2 013630 3002 25986+ LPER FR0,FR2 013632 3002 25987+ LPER FR0,FR2 013634 3002 25988+ LPER FR0,FR2 013636 3002 25989+ LPER FR0,FR2 013638 3002 25990+ LPER FR0,FR2 01363A 3002 25991+ LPER FR0,FR2 01363C 3002 25992+ LPER FR0,FR2 01363E 3002 25993+ LPER FR0,FR2 013640 3002 25994+ LPER FR0,FR2 25995+* 013642 06FB 25996 BCTR R15,R11 25997 TSIMRET 013644 58F0 C100 13658 25998+ L R15,=A(SAVETST) R15 := current save area 013648 58DF 0004 00004 25999+ L R13,4(R15) get old save area back 01364C 98EC D00C 0000C 26000+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013650 07FE 26001+ BR 14 RETURN 02000000 26002 TSIMEND 013658 26003+ LTORG 013658 00000458 26004 =A(SAVETST) 01365C C1100000 26005 =E'-1.0' 13660 26006+T506TEND EQU * 26007 * 26008 * Test 507 -- LRER R,R ------------------------------------- 26009 * 26010 TSIMBEG T507,8000,100,1,C'LRER R,R' 26011+* 003B04 26012+TDSCDAT CSECT 003B08 26013+ DS 0D 26014+* 003B08 00013660 26015+T507TDSC DC A(T507) // TENTRY 003B0C 0000010C 26016+ DC A(T507TEND-T507) // TLENGTH 003B10 00001F40 26017+ DC F'8000' // TLRCNT 003B14 00000064 26018+ DC F'100' // TIGCNT 003B18 00000001 26019+ DC F'1' // TLTYPE 001B1F 26020+TEXT CSECT 001B1F E3F5F0F7 26021+SPTR2313 DC C'T507' 003B1C 26022+TDSCDAT CSECT PAGE 476 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003B1C 26023+ DS 0F 003B1C 04001B1F 26024+ DC AL1(L'SPTR2313),AL3(SPTR2313) 001B23 26025+TEXT CSECT 001B23 D3D9C5D940D96BD9 26026+SPTR2314 DC C'LRER R,R' 003B20 26027+TDSCDAT CSECT 003B20 26028+ DS 0F 003B20 08001B23 26029+ DC AL1(L'SPTR2314),AL3(SPTR2314) 26030+* 004C8C 26031+TDSCTBL CSECT 04C8C 26032+T507TPTR EQU * 004C8C 00003B08 26033+ DC A(T507TDSC) enabled test 26034+* 013660 26035+TCODE CSECT 013660 26036+ DS 0D ensure double word alignment for test 013660 26037+T507 DS 0H 01650000 013660 90EC D00C 0000C 26038+ STM 14,12,12(13) SAVE REGISTERS 02950000 013664 18CF 26039+ LR R12,R15 base register := entry address 13660 26040+ USING T507,R12 declare code base register 013666 41B0 C022 13682 26041+ LA R11,T507L load loop target to R11 01366A 58F0 C108 13768 26042+ L R15,=A(SAVETST) R15 := current save area 01366E 50DF 0004 00004 26043+ ST R13,4(R15) set back pointer in current save area 013672 182D 26044+ LR R2,R13 remember callers save area 013674 18DF 26045+ LR R13,R15 setup current save area 013676 50D2 0008 00008 26046+ ST R13,8(R2) set forw pointer in callers save area 00000 26047+ USING TDSC,R1 declare TDSC base register 01367A 58F0 1008 00008 26048+ L R15,TLRCNT load local repeat count to R15 26049+* 26050 * 01367E 6820 C100 13760 26051 LD FR2,=D'1.1' 26052 T507L REPINS LRER,(FR0,FR2) repeat: LRER FR0,FR2 26053+* 26054+* build from sublist &ALIST a comma separated string &ARGS 26055+* 26056+* 26057+* 26058+* 26059+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 26060+* this allows to transfer the repeat count from last TDSCGEN call 26061+* 26062+* 13682 26063+T507L EQU * 26064+* 26065+* write a comment indicating what REPINS does (in case NOGEN in effect) 26066+* 26067+*,// REPINS: do 100 times: 26068+* 26069+* MNOTE requires that ' is doubled for expanded variables 26070+* thus build &MASTR as a copy of '&ARGS with ' doubled 26071+* 26072+* 26073+*,// LRER FR0,FR2 26074+* 26075+* finally generate code: &ICNT copies of &CODE &ARGS 26076+* 013682 3502 26077+ LRER FR0,FR2 PAGE 477 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013684 3502 26078+ LRER FR0,FR2 013686 3502 26079+ LRER FR0,FR2 013688 3502 26080+ LRER FR0,FR2 01368A 3502 26081+ LRER FR0,FR2 01368C 3502 26082+ LRER FR0,FR2 01368E 3502 26083+ LRER FR0,FR2 013690 3502 26084+ LRER FR0,FR2 013692 3502 26085+ LRER FR0,FR2 013694 3502 26086+ LRER FR0,FR2 013696 3502 26087+ LRER FR0,FR2 013698 3502 26088+ LRER FR0,FR2 01369A 3502 26089+ LRER FR0,FR2 01369C 3502 26090+ LRER FR0,FR2 01369E 3502 26091+ LRER FR0,FR2 0136A0 3502 26092+ LRER FR0,FR2 0136A2 3502 26093+ LRER FR0,FR2 0136A4 3502 26094+ LRER FR0,FR2 0136A6 3502 26095+ LRER FR0,FR2 0136A8 3502 26096+ LRER FR0,FR2 0136AA 3502 26097+ LRER FR0,FR2 0136AC 3502 26098+ LRER FR0,FR2 0136AE 3502 26099+ LRER FR0,FR2 0136B0 3502 26100+ LRER FR0,FR2 0136B2 3502 26101+ LRER FR0,FR2 0136B4 3502 26102+ LRER FR0,FR2 0136B6 3502 26103+ LRER FR0,FR2 0136B8 3502 26104+ LRER FR0,FR2 0136BA 3502 26105+ LRER FR0,FR2 0136BC 3502 26106+ LRER FR0,FR2 0136BE 3502 26107+ LRER FR0,FR2 0136C0 3502 26108+ LRER FR0,FR2 0136C2 3502 26109+ LRER FR0,FR2 0136C4 3502 26110+ LRER FR0,FR2 0136C6 3502 26111+ LRER FR0,FR2 0136C8 3502 26112+ LRER FR0,FR2 0136CA 3502 26113+ LRER FR0,FR2 0136CC 3502 26114+ LRER FR0,FR2 0136CE 3502 26115+ LRER FR0,FR2 0136D0 3502 26116+ LRER FR0,FR2 0136D2 3502 26117+ LRER FR0,FR2 0136D4 3502 26118+ LRER FR0,FR2 0136D6 3502 26119+ LRER FR0,FR2 0136D8 3502 26120+ LRER FR0,FR2 0136DA 3502 26121+ LRER FR0,FR2 0136DC 3502 26122+ LRER FR0,FR2 0136DE 3502 26123+ LRER FR0,FR2 0136E0 3502 26124+ LRER FR0,FR2 0136E2 3502 26125+ LRER FR0,FR2 0136E4 3502 26126+ LRER FR0,FR2 0136E6 3502 26127+ LRER FR0,FR2 0136E8 3502 26128+ LRER FR0,FR2 0136EA 3502 26129+ LRER FR0,FR2 0136EC 3502 26130+ LRER FR0,FR2 0136EE 3502 26131+ LRER FR0,FR2 0136F0 3502 26132+ LRER FR0,FR2 PAGE 478 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0136F2 3502 26133+ LRER FR0,FR2 0136F4 3502 26134+ LRER FR0,FR2 0136F6 3502 26135+ LRER FR0,FR2 0136F8 3502 26136+ LRER FR0,FR2 0136FA 3502 26137+ LRER FR0,FR2 0136FC 3502 26138+ LRER FR0,FR2 0136FE 3502 26139+ LRER FR0,FR2 013700 3502 26140+ LRER FR0,FR2 013702 3502 26141+ LRER FR0,FR2 013704 3502 26142+ LRER FR0,FR2 013706 3502 26143+ LRER FR0,FR2 013708 3502 26144+ LRER FR0,FR2 01370A 3502 26145+ LRER FR0,FR2 01370C 3502 26146+ LRER FR0,FR2 01370E 3502 26147+ LRER FR0,FR2 013710 3502 26148+ LRER FR0,FR2 013712 3502 26149+ LRER FR0,FR2 013714 3502 26150+ LRER FR0,FR2 013716 3502 26151+ LRER FR0,FR2 013718 3502 26152+ LRER FR0,FR2 01371A 3502 26153+ LRER FR0,FR2 01371C 3502 26154+ LRER FR0,FR2 01371E 3502 26155+ LRER FR0,FR2 013720 3502 26156+ LRER FR0,FR2 013722 3502 26157+ LRER FR0,FR2 013724 3502 26158+ LRER FR0,FR2 013726 3502 26159+ LRER FR0,FR2 013728 3502 26160+ LRER FR0,FR2 01372A 3502 26161+ LRER FR0,FR2 01372C 3502 26162+ LRER FR0,FR2 01372E 3502 26163+ LRER FR0,FR2 013730 3502 26164+ LRER FR0,FR2 013732 3502 26165+ LRER FR0,FR2 013734 3502 26166+ LRER FR0,FR2 013736 3502 26167+ LRER FR0,FR2 013738 3502 26168+ LRER FR0,FR2 01373A 3502 26169+ LRER FR0,FR2 01373C 3502 26170+ LRER FR0,FR2 01373E 3502 26171+ LRER FR0,FR2 013740 3502 26172+ LRER FR0,FR2 013742 3502 26173+ LRER FR0,FR2 013744 3502 26174+ LRER FR0,FR2 013746 3502 26175+ LRER FR0,FR2 013748 3502 26176+ LRER FR0,FR2 26177+* 01374A 06FB 26178 BCTR R15,R11 26179 TSIMRET 01374C 58F0 C108 13768 26180+ L R15,=A(SAVETST) R15 := current save area 013750 58DF 0004 00004 26181+ L R13,4(R15) get old save area back 013754 98EC D00C 0000C 26182+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013758 07FE 26183+ BR 14 RETURN 02000000 26184 TSIMEND 013760 26185+ LTORG 013760 411199999999999A 26186 =D'1.1' 013768 00000458 26187 =A(SAVETST) PAGE 479 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 1376C 26188+T507TEND EQU * 26189 * 26190 * Test 508 -- STE R,m -------------------------------------- 26191 * 26192 TSIMBEG T508,10000,50,1,C'STE R,m' 26193+* 003B24 26194+TDSCDAT CSECT 003B28 26195+ DS 0D 26196+* 003B28 00013770 26197+T508TDSC DC A(T508) // TENTRY 003B2C 00000104 26198+ DC A(T508TEND-T508) // TLENGTH 003B30 00002710 26199+ DC F'10000' // TLRCNT 003B34 00000032 26200+ DC F'50' // TIGCNT 003B38 00000001 26201+ DC F'1' // TLTYPE 001B2B 26202+TEXT CSECT 001B2B E3F5F0F8 26203+SPTR2325 DC C'T508' 003B3C 26204+TDSCDAT CSECT 003B3C 26205+ DS 0F 003B3C 04001B2B 26206+ DC AL1(L'SPTR2325),AL3(SPTR2325) 001B2F 26207+TEXT CSECT 001B2F E2E3C540D96B94 26208+SPTR2326 DC C'STE R,m' 003B40 26209+TDSCDAT CSECT 003B40 26210+ DS 0F 003B40 07001B2F 26211+ DC AL1(L'SPTR2326),AL3(SPTR2326) 26212+* 004C90 26213+TDSCTBL CSECT 04C90 26214+T508TPTR EQU * 004C90 00003B28 26215+ DC A(T508TDSC) enabled test 26216+* 01376C 26217+TCODE CSECT 013770 26218+ DS 0D ensure double word alignment for test 013770 26219+T508 DS 0H 01650000 013770 90EC D00C 0000C 26220+ STM 14,12,12(13) SAVE REGISTERS 02950000 013774 18CF 26221+ LR R12,R15 base register := entry address 13770 26222+ USING T508,R12 declare code base register 013776 41B0 C01E 1378E 26223+ LA R11,T508L load loop target to R11 01377A 58F0 C100 13870 26224+ L R15,=A(SAVETST) R15 := current save area 01377E 50DF 0004 00004 26225+ ST R13,4(R15) set back pointer in current save area 013782 182D 26226+ LR R2,R13 remember callers save area 013784 18DF 26227+ LR R13,R15 setup current save area 013786 50D2 0008 00008 26228+ ST R13,8(R2) set forw pointer in callers save area 00000 26229+ USING TDSC,R1 declare TDSC base register 01378A 58F0 1008 00008 26230+ L R15,TLRCNT load local repeat count to R15 26231+* 26232 * 26233 T508L REPINS STE,(FR0,T508V) repeat: STE FR0,T508V' 26234+* 26235+* build from sublist &ALIST a comma separated string &ARGS 26236+* 26237+* 26238+* 26239+* 26240+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 26241+* this allows to transfer the repeat count from last TDSCGEN call 26242+* PAGE 480 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 26243+* 1378E 26244+T508L EQU * 26245+* 26246+* write a comment indicating what REPINS does (in case NOGEN in effect) 26247+* 26248+*,// REPINS: do 50 times: 26249+* 26250+* MNOTE requires that ' is doubled for expanded variables 26251+* thus build &MASTR as a copy of '&ARGS with ' doubled 26252+* 26253+* 26254+*,// STE FR0,T508V 26255+* 26256+* finally generate code: &ICNT copies of &CODE &ARGS 26257+* 01378E 7000 C0F8 13868 26258+ STE FR0,T508V 013792 7000 C0F8 13868 26259+ STE FR0,T508V 013796 7000 C0F8 13868 26260+ STE FR0,T508V 01379A 7000 C0F8 13868 26261+ STE FR0,T508V 01379E 7000 C0F8 13868 26262+ STE FR0,T508V 0137A2 7000 C0F8 13868 26263+ STE FR0,T508V 0137A6 7000 C0F8 13868 26264+ STE FR0,T508V 0137AA 7000 C0F8 13868 26265+ STE FR0,T508V 0137AE 7000 C0F8 13868 26266+ STE FR0,T508V 0137B2 7000 C0F8 13868 26267+ STE FR0,T508V 0137B6 7000 C0F8 13868 26268+ STE FR0,T508V 0137BA 7000 C0F8 13868 26269+ STE FR0,T508V 0137BE 7000 C0F8 13868 26270+ STE FR0,T508V 0137C2 7000 C0F8 13868 26271+ STE FR0,T508V 0137C6 7000 C0F8 13868 26272+ STE FR0,T508V 0137CA 7000 C0F8 13868 26273+ STE FR0,T508V 0137CE 7000 C0F8 13868 26274+ STE FR0,T508V 0137D2 7000 C0F8 13868 26275+ STE FR0,T508V 0137D6 7000 C0F8 13868 26276+ STE FR0,T508V 0137DA 7000 C0F8 13868 26277+ STE FR0,T508V 0137DE 7000 C0F8 13868 26278+ STE FR0,T508V 0137E2 7000 C0F8 13868 26279+ STE FR0,T508V 0137E6 7000 C0F8 13868 26280+ STE FR0,T508V 0137EA 7000 C0F8 13868 26281+ STE FR0,T508V 0137EE 7000 C0F8 13868 26282+ STE FR0,T508V 0137F2 7000 C0F8 13868 26283+ STE FR0,T508V 0137F6 7000 C0F8 13868 26284+ STE FR0,T508V 0137FA 7000 C0F8 13868 26285+ STE FR0,T508V 0137FE 7000 C0F8 13868 26286+ STE FR0,T508V 013802 7000 C0F8 13868 26287+ STE FR0,T508V 013806 7000 C0F8 13868 26288+ STE FR0,T508V 01380A 7000 C0F8 13868 26289+ STE FR0,T508V 01380E 7000 C0F8 13868 26290+ STE FR0,T508V 013812 7000 C0F8 13868 26291+ STE FR0,T508V 013816 7000 C0F8 13868 26292+ STE FR0,T508V 01381A 7000 C0F8 13868 26293+ STE FR0,T508V 01381E 7000 C0F8 13868 26294+ STE FR0,T508V 013822 7000 C0F8 13868 26295+ STE FR0,T508V 013826 7000 C0F8 13868 26296+ STE FR0,T508V 01382A 7000 C0F8 13868 26297+ STE FR0,T508V PAGE 481 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01382E 7000 C0F8 13868 26298+ STE FR0,T508V 013832 7000 C0F8 13868 26299+ STE FR0,T508V 013836 7000 C0F8 13868 26300+ STE FR0,T508V 01383A 7000 C0F8 13868 26301+ STE FR0,T508V 01383E 7000 C0F8 13868 26302+ STE FR0,T508V 013842 7000 C0F8 13868 26303+ STE FR0,T508V 013846 7000 C0F8 13868 26304+ STE FR0,T508V 01384A 7000 C0F8 13868 26305+ STE FR0,T508V 01384E 7000 C0F8 13868 26306+ STE FR0,T508V 013852 7000 C0F8 13868 26307+ STE FR0,T508V 26308+* 013856 06FB 26309 BCTR R15,R11 26310 TSIMRET 013858 58F0 C100 13870 26311+ L R15,=A(SAVETST) R15 := current save area 01385C 58DF 0004 00004 26312+ L R13,4(R15) get old save area back 013860 98EC D00C 0000C 26313+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013864 07FE 26314+ BR 14 RETURN 02000000 26315 * 013868 26316 T508V DS 1E 26317 TSIMEND 013870 26318+ LTORG 013870 00000458 26319 =A(SAVETST) 13874 26320+T508TEND EQU * 26321 * 26322 * Test 509 -- STE R,m (unal) ------------------------------- 26323 * 26324 TSIMBEG T509,10000,50,1,C'STE R,m (unal)' 26325+* 003B44 26326+TDSCDAT CSECT 003B48 26327+ DS 0D 26328+* 003B48 00013878 26329+T509TDSC DC A(T509) // TENTRY 003B4C 0000010C 26330+ DC A(T509TEND-T509) // TLENGTH 003B50 00002710 26331+ DC F'10000' // TLRCNT 003B54 00000032 26332+ DC F'50' // TIGCNT 003B58 00000001 26333+ DC F'1' // TLTYPE 001B36 26334+TEXT CSECT 001B36 E3F5F0F9 26335+SPTR2337 DC C'T509' 003B5C 26336+TDSCDAT CSECT 003B5C 26337+ DS 0F 003B5C 04001B36 26338+ DC AL1(L'SPTR2337),AL3(SPTR2337) 001B3A 26339+TEXT CSECT 001B3A E2E3C540D96B9440 26340+SPTR2338 DC C'STE R,m (unal)' 003B60 26341+TDSCDAT CSECT 003B60 26342+ DS 0F 003B60 0E001B3A 26343+ DC AL1(L'SPTR2338),AL3(SPTR2338) 26344+* 004C94 26345+TDSCTBL CSECT 04C94 26346+T509TPTR EQU * 004C94 00003B48 26347+ DC A(T509TDSC) enabled test 26348+* 013874 26349+TCODE CSECT 013878 26350+ DS 0D ensure double word alignment for test 013878 26351+T509 DS 0H 01650000 013878 90EC D00C 0000C 26352+ STM 14,12,12(13) SAVE REGISTERS 02950000 PAGE 482 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01387C 18CF 26353+ LR R12,R15 base register := entry address 13878 26354+ USING T509,R12 declare code base register 01387E 41B0 C022 1389A 26355+ LA R11,T509L load loop target to R11 013882 58F0 C108 13980 26356+ L R15,=A(SAVETST) R15 := current save area 013886 50DF 0004 00004 26357+ ST R13,4(R15) set back pointer in current save area 01388A 182D 26358+ LR R2,R13 remember callers save area 01388C 18DF 26359+ LR R13,R15 setup current save area 01388E 50D2 0008 00008 26360+ ST R13,8(R2) set forw pointer in callers save area 00000 26361+ USING TDSC,R1 declare TDSC base register 013892 58F0 1008 00008 26362+ L R15,TLRCNT load local repeat count to R15 26363+* 26364 * 013896 4130 C0FC 13974 26365 LA R3,T509V 26366 T509L REPINS STE,(FR0,1(R3)) repeat: STE FR0,1(R3)' 26367+* 26368+* build from sublist &ALIST a comma separated string &ARGS 26369+* 26370+* 26371+* 26372+* 26373+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 26374+* this allows to transfer the repeat count from last TDSCGEN call 26375+* 26376+* 1389A 26377+T509L EQU * 26378+* 26379+* write a comment indicating what REPINS does (in case NOGEN in effect) 26380+* 26381+*,// REPINS: do 50 times: 26382+* 26383+* MNOTE requires that ' is doubled for expanded variables 26384+* thus build &MASTR as a copy of '&ARGS with ' doubled 26385+* 26386+* 26387+*,// STE FR0,1(R3) 26388+* 26389+* finally generate code: &ICNT copies of &CODE &ARGS 26390+* 01389A 7003 0001 00001 26391+ STE FR0,1(R3) 01389E 7003 0001 00001 26392+ STE FR0,1(R3) 0138A2 7003 0001 00001 26393+ STE FR0,1(R3) 0138A6 7003 0001 00001 26394+ STE FR0,1(R3) 0138AA 7003 0001 00001 26395+ STE FR0,1(R3) 0138AE 7003 0001 00001 26396+ STE FR0,1(R3) 0138B2 7003 0001 00001 26397+ STE FR0,1(R3) 0138B6 7003 0001 00001 26398+ STE FR0,1(R3) 0138BA 7003 0001 00001 26399+ STE FR0,1(R3) 0138BE 7003 0001 00001 26400+ STE FR0,1(R3) 0138C2 7003 0001 00001 26401+ STE FR0,1(R3) 0138C6 7003 0001 00001 26402+ STE FR0,1(R3) 0138CA 7003 0001 00001 26403+ STE FR0,1(R3) 0138CE 7003 0001 00001 26404+ STE FR0,1(R3) 0138D2 7003 0001 00001 26405+ STE FR0,1(R3) 0138D6 7003 0001 00001 26406+ STE FR0,1(R3) 0138DA 7003 0001 00001 26407+ STE FR0,1(R3) PAGE 483 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0138DE 7003 0001 00001 26408+ STE FR0,1(R3) 0138E2 7003 0001 00001 26409+ STE FR0,1(R3) 0138E6 7003 0001 00001 26410+ STE FR0,1(R3) 0138EA 7003 0001 00001 26411+ STE FR0,1(R3) 0138EE 7003 0001 00001 26412+ STE FR0,1(R3) 0138F2 7003 0001 00001 26413+ STE FR0,1(R3) 0138F6 7003 0001 00001 26414+ STE FR0,1(R3) 0138FA 7003 0001 00001 26415+ STE FR0,1(R3) 0138FE 7003 0001 00001 26416+ STE FR0,1(R3) 013902 7003 0001 00001 26417+ STE FR0,1(R3) 013906 7003 0001 00001 26418+ STE FR0,1(R3) 01390A 7003 0001 00001 26419+ STE FR0,1(R3) 01390E 7003 0001 00001 26420+ STE FR0,1(R3) 013912 7003 0001 00001 26421+ STE FR0,1(R3) 013916 7003 0001 00001 26422+ STE FR0,1(R3) 01391A 7003 0001 00001 26423+ STE FR0,1(R3) 01391E 7003 0001 00001 26424+ STE FR0,1(R3) 013922 7003 0001 00001 26425+ STE FR0,1(R3) 013926 7003 0001 00001 26426+ STE FR0,1(R3) 01392A 7003 0001 00001 26427+ STE FR0,1(R3) 01392E 7003 0001 00001 26428+ STE FR0,1(R3) 013932 7003 0001 00001 26429+ STE FR0,1(R3) 013936 7003 0001 00001 26430+ STE FR0,1(R3) 01393A 7003 0001 00001 26431+ STE FR0,1(R3) 01393E 7003 0001 00001 26432+ STE FR0,1(R3) 013942 7003 0001 00001 26433+ STE FR0,1(R3) 013946 7003 0001 00001 26434+ STE FR0,1(R3) 01394A 7003 0001 00001 26435+ STE FR0,1(R3) 01394E 7003 0001 00001 26436+ STE FR0,1(R3) 013952 7003 0001 00001 26437+ STE FR0,1(R3) 013956 7003 0001 00001 26438+ STE FR0,1(R3) 01395A 7003 0001 00001 26439+ STE FR0,1(R3) 01395E 7003 0001 00001 26440+ STE FR0,1(R3) 26441+* 013962 06FB 26442 BCTR R15,R11 26443 TSIMRET 013964 58F0 C108 13980 26444+ L R15,=A(SAVETST) R15 := current save area 013968 58DF 0004 00004 26445+ L R13,4(R15) get old save area back 01396C 98EC D00C 0000C 26446+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013970 07FE 26447+ BR 14 RETURN 02000000 26448 * 013974 26449 T509V DS 2E 26450 TSIMEND 013980 26451+ LTORG 013980 00000458 26452 =A(SAVETST) 13984 26453+T509TEND EQU * 26454 * 26455 * Test 51x -- short float arithmetic ======================= 26456 * 26457 * Test 510 -- AER R,R -------------------------------------- 26458 * 26459 TSIMBEG T510,8000,50,1,C'AER R,R' 26460+* 003B64 26461+TDSCDAT CSECT 003B68 26462+ DS 0D PAGE 484 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 26463+* 003B68 00013988 26464+T510TDSC DC A(T510) // TENTRY 003B6C 000000A0 26465+ DC A(T510TEND-T510) // TLENGTH 003B70 00001F40 26466+ DC F'8000' // TLRCNT 003B74 00000032 26467+ DC F'50' // TIGCNT 003B78 00000001 26468+ DC F'1' // TLTYPE 001B48 26469+TEXT CSECT 001B48 E3F5F1F0 26470+SPTR2349 DC C'T510' 003B7C 26471+TDSCDAT CSECT 003B7C 26472+ DS 0F 003B7C 04001B48 26473+ DC AL1(L'SPTR2349),AL3(SPTR2349) 001B4C 26474+TEXT CSECT 001B4C C1C5D940D96BD9 26475+SPTR2350 DC C'AER R,R' 003B80 26476+TDSCDAT CSECT 003B80 26477+ DS 0F 003B80 07001B4C 26478+ DC AL1(L'SPTR2350),AL3(SPTR2350) 26479+* 004C98 26480+TDSCTBL CSECT 04C98 26481+T510TPTR EQU * 004C98 00003B68 26482+ DC A(T510TDSC) enabled test 26483+* 013984 26484+TCODE CSECT 013988 26485+ DS 0D ensure double word alignment for test 013988 26486+T510 DS 0H 01650000 013988 90EC D00C 0000C 26487+ STM 14,12,12(13) SAVE REGISTERS 02950000 01398C 18CF 26488+ LR R12,R15 base register := entry address 13988 26489+ USING T510,R12 declare code base register 01398E 41B0 C024 139AC 26490+ LA R11,T510L load loop target to R11 013992 58F0 C098 13A20 26491+ L R15,=A(SAVETST) R15 := current save area 013996 50DF 0004 00004 26492+ ST R13,4(R15) set back pointer in current save area 01399A 182D 26493+ LR R2,R13 remember callers save area 01399C 18DF 26494+ LR R13,R15 setup current save area 01399E 50D2 0008 00008 26495+ ST R13,8(R2) set forw pointer in callers save area 00000 26496+ USING TDSC,R1 declare TDSC base register 0139A2 58F0 1008 00008 26497+ L R15,TLRCNT load local repeat count to R15 26498+* 26499 * 0139A6 3B00 26500 SER FR0,FR0 0139A8 7820 C09C 13A24 26501 LE FR2,=E'1.1' 26502 T510L REPINS AER,(FR0,FR2) repeat: AER FR0,FR2 26503+* 26504+* build from sublist &ALIST a comma separated string &ARGS 26505+* 26506+* 26507+* 26508+* 26509+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 26510+* this allows to transfer the repeat count from last TDSCGEN call 26511+* 26512+* 139AC 26513+T510L EQU * 26514+* 26515+* write a comment indicating what REPINS does (in case NOGEN in effect) 26516+* 26517+*,// REPINS: do 50 times: PAGE 485 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 26518+* 26519+* MNOTE requires that ' is doubled for expanded variables 26520+* thus build &MASTR as a copy of '&ARGS with ' doubled 26521+* 26522+* 26523+*,// AER FR0,FR2 26524+* 26525+* finally generate code: &ICNT copies of &CODE &ARGS 26526+* 0139AC 3A02 26527+ AER FR0,FR2 0139AE 3A02 26528+ AER FR0,FR2 0139B0 3A02 26529+ AER FR0,FR2 0139B2 3A02 26530+ AER FR0,FR2 0139B4 3A02 26531+ AER FR0,FR2 0139B6 3A02 26532+ AER FR0,FR2 0139B8 3A02 26533+ AER FR0,FR2 0139BA 3A02 26534+ AER FR0,FR2 0139BC 3A02 26535+ AER FR0,FR2 0139BE 3A02 26536+ AER FR0,FR2 0139C0 3A02 26537+ AER FR0,FR2 0139C2 3A02 26538+ AER FR0,FR2 0139C4 3A02 26539+ AER FR0,FR2 0139C6 3A02 26540+ AER FR0,FR2 0139C8 3A02 26541+ AER FR0,FR2 0139CA 3A02 26542+ AER FR0,FR2 0139CC 3A02 26543+ AER FR0,FR2 0139CE 3A02 26544+ AER FR0,FR2 0139D0 3A02 26545+ AER FR0,FR2 0139D2 3A02 26546+ AER FR0,FR2 0139D4 3A02 26547+ AER FR0,FR2 0139D6 3A02 26548+ AER FR0,FR2 0139D8 3A02 26549+ AER FR0,FR2 0139DA 3A02 26550+ AER FR0,FR2 0139DC 3A02 26551+ AER FR0,FR2 0139DE 3A02 26552+ AER FR0,FR2 0139E0 3A02 26553+ AER FR0,FR2 0139E2 3A02 26554+ AER FR0,FR2 0139E4 3A02 26555+ AER FR0,FR2 0139E6 3A02 26556+ AER FR0,FR2 0139E8 3A02 26557+ AER FR0,FR2 0139EA 3A02 26558+ AER FR0,FR2 0139EC 3A02 26559+ AER FR0,FR2 0139EE 3A02 26560+ AER FR0,FR2 0139F0 3A02 26561+ AER FR0,FR2 0139F2 3A02 26562+ AER FR0,FR2 0139F4 3A02 26563+ AER FR0,FR2 0139F6 3A02 26564+ AER FR0,FR2 0139F8 3A02 26565+ AER FR0,FR2 0139FA 3A02 26566+ AER FR0,FR2 0139FC 3A02 26567+ AER FR0,FR2 0139FE 3A02 26568+ AER FR0,FR2 013A00 3A02 26569+ AER FR0,FR2 013A02 3A02 26570+ AER FR0,FR2 013A04 3A02 26571+ AER FR0,FR2 013A06 3A02 26572+ AER FR0,FR2 PAGE 486 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013A08 3A02 26573+ AER FR0,FR2 013A0A 3A02 26574+ AER FR0,FR2 013A0C 3A02 26575+ AER FR0,FR2 013A0E 3A02 26576+ AER FR0,FR2 26577+* 013A10 06FB 26578 BCTR R15,R11 26579 TSIMRET 013A12 58F0 C098 13A20 26580+ L R15,=A(SAVETST) R15 := current save area 013A16 58DF 0004 00004 26581+ L R13,4(R15) get old save area back 013A1A 98EC D00C 0000C 26582+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013A1E 07FE 26583+ BR 14 RETURN 02000000 26584 TSIMEND 013A20 26585+ LTORG 013A20 00000458 26586 =A(SAVETST) 013A24 4111999A 26587 =E'1.1' 13A28 26588+T510TEND EQU * 26589 * 26590 * Test 511 -- AE R,m --------------------------------------- 26591 * 26592 TSIMBEG T511,6000,50,1,C'AE R,m' 26593+* 003B84 26594+TDSCDAT CSECT 003B88 26595+ DS 0D 26596+* 003B88 00013A28 26597+T511TDSC DC A(T511) // TENTRY 003B8C 00000100 26598+ DC A(T511TEND-T511) // TLENGTH 003B90 00001770 26599+ DC F'6000' // TLRCNT 003B94 00000032 26600+ DC F'50' // TIGCNT 003B98 00000001 26601+ DC F'1' // TLTYPE 001B53 26602+TEXT CSECT 001B53 E3F5F1F1 26603+SPTR2361 DC C'T511' 003B9C 26604+TDSCDAT CSECT 003B9C 26605+ DS 0F 003B9C 04001B53 26606+ DC AL1(L'SPTR2361),AL3(SPTR2361) 001B57 26607+TEXT CSECT 001B57 C1C540D96B94 26608+SPTR2362 DC C'AE R,m' 003BA0 26609+TDSCDAT CSECT 003BA0 26610+ DS 0F 003BA0 06001B57 26611+ DC AL1(L'SPTR2362),AL3(SPTR2362) 26612+* 004C9C 26613+TDSCTBL CSECT 04C9C 26614+T511TPTR EQU * 004C9C 00003B88 26615+ DC A(T511TDSC) enabled test 26616+* 013A28 26617+TCODE CSECT 013A28 26618+ DS 0D ensure double word alignment for test 013A28 26619+T511 DS 0H 01650000 013A28 90EC D00C 0000C 26620+ STM 14,12,12(13) SAVE REGISTERS 02950000 013A2C 18CF 26621+ LR R12,R15 base register := entry address 13A28 26622+ USING T511,R12 declare code base register 013A2E 41B0 C020 13A48 26623+ LA R11,T511L load loop target to R11 013A32 58F0 C0F8 13B20 26624+ L R15,=A(SAVETST) R15 := current save area 013A36 50DF 0004 00004 26625+ ST R13,4(R15) set back pointer in current save area 013A3A 182D 26626+ LR R2,R13 remember callers save area 013A3C 18DF 26627+ LR R13,R15 setup current save area PAGE 487 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013A3E 50D2 0008 00008 26628+ ST R13,8(R2) set forw pointer in callers save area 00000 26629+ USING TDSC,R1 declare TDSC base register 013A42 58F0 1008 00008 26630+ L R15,TLRCNT load local repeat count to R15 26631+* 26632 * 013A46 3B00 26633 SER FR0,FR0 26634 T511L REPINS AE,(FR0,=E'1.1') repeat: AE FR0,=E'1.1' 26635+* 26636+* build from sublist &ALIST a comma separated string &ARGS 26637+* 26638+* 26639+* 26640+* 26641+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 26642+* this allows to transfer the repeat count from last TDSCGEN call 26643+* 26644+* 13A48 26645+T511L EQU * 26646+* 26647+* write a comment indicating what REPINS does (in case NOGEN in effect) 26648+* 26649+*,// REPINS: do 50 times: 26650+* 26651+* MNOTE requires that ' is doubled for expanded variables 26652+* thus build &MASTR as a copy of '&ARGS with ' doubled 26653+* 26654+* 26655+*,// AE FR0,=E'1.1' 26656+* 26657+* finally generate code: &ICNT copies of &CODE &ARGS 26658+* 013A48 7A00 C0FC 13B24 26659+ AE FR0,=E'1.1' 013A4C 7A00 C0FC 13B24 26660+ AE FR0,=E'1.1' 013A50 7A00 C0FC 13B24 26661+ AE FR0,=E'1.1' 013A54 7A00 C0FC 13B24 26662+ AE FR0,=E'1.1' 013A58 7A00 C0FC 13B24 26663+ AE FR0,=E'1.1' 013A5C 7A00 C0FC 13B24 26664+ AE FR0,=E'1.1' 013A60 7A00 C0FC 13B24 26665+ AE FR0,=E'1.1' 013A64 7A00 C0FC 13B24 26666+ AE FR0,=E'1.1' 013A68 7A00 C0FC 13B24 26667+ AE FR0,=E'1.1' 013A6C 7A00 C0FC 13B24 26668+ AE FR0,=E'1.1' 013A70 7A00 C0FC 13B24 26669+ AE FR0,=E'1.1' 013A74 7A00 C0FC 13B24 26670+ AE FR0,=E'1.1' 013A78 7A00 C0FC 13B24 26671+ AE FR0,=E'1.1' 013A7C 7A00 C0FC 13B24 26672+ AE FR0,=E'1.1' 013A80 7A00 C0FC 13B24 26673+ AE FR0,=E'1.1' 013A84 7A00 C0FC 13B24 26674+ AE FR0,=E'1.1' 013A88 7A00 C0FC 13B24 26675+ AE FR0,=E'1.1' 013A8C 7A00 C0FC 13B24 26676+ AE FR0,=E'1.1' 013A90 7A00 C0FC 13B24 26677+ AE FR0,=E'1.1' 013A94 7A00 C0FC 13B24 26678+ AE FR0,=E'1.1' 013A98 7A00 C0FC 13B24 26679+ AE FR0,=E'1.1' 013A9C 7A00 C0FC 13B24 26680+ AE FR0,=E'1.1' 013AA0 7A00 C0FC 13B24 26681+ AE FR0,=E'1.1' 013AA4 7A00 C0FC 13B24 26682+ AE FR0,=E'1.1' PAGE 488 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013AA8 7A00 C0FC 13B24 26683+ AE FR0,=E'1.1' 013AAC 7A00 C0FC 13B24 26684+ AE FR0,=E'1.1' 013AB0 7A00 C0FC 13B24 26685+ AE FR0,=E'1.1' 013AB4 7A00 C0FC 13B24 26686+ AE FR0,=E'1.1' 013AB8 7A00 C0FC 13B24 26687+ AE FR0,=E'1.1' 013ABC 7A00 C0FC 13B24 26688+ AE FR0,=E'1.1' 013AC0 7A00 C0FC 13B24 26689+ AE FR0,=E'1.1' 013AC4 7A00 C0FC 13B24 26690+ AE FR0,=E'1.1' 013AC8 7A00 C0FC 13B24 26691+ AE FR0,=E'1.1' 013ACC 7A00 C0FC 13B24 26692+ AE FR0,=E'1.1' 013AD0 7A00 C0FC 13B24 26693+ AE FR0,=E'1.1' 013AD4 7A00 C0FC 13B24 26694+ AE FR0,=E'1.1' 013AD8 7A00 C0FC 13B24 26695+ AE FR0,=E'1.1' 013ADC 7A00 C0FC 13B24 26696+ AE FR0,=E'1.1' 013AE0 7A00 C0FC 13B24 26697+ AE FR0,=E'1.1' 013AE4 7A00 C0FC 13B24 26698+ AE FR0,=E'1.1' 013AE8 7A00 C0FC 13B24 26699+ AE FR0,=E'1.1' 013AEC 7A00 C0FC 13B24 26700+ AE FR0,=E'1.1' 013AF0 7A00 C0FC 13B24 26701+ AE FR0,=E'1.1' 013AF4 7A00 C0FC 13B24 26702+ AE FR0,=E'1.1' 013AF8 7A00 C0FC 13B24 26703+ AE FR0,=E'1.1' 013AFC 7A00 C0FC 13B24 26704+ AE FR0,=E'1.1' 013B00 7A00 C0FC 13B24 26705+ AE FR0,=E'1.1' 013B04 7A00 C0FC 13B24 26706+ AE FR0,=E'1.1' 013B08 7A00 C0FC 13B24 26707+ AE FR0,=E'1.1' 013B0C 7A00 C0FC 13B24 26708+ AE FR0,=E'1.1' 26709+* 013B10 06FB 26710 BCTR R15,R11 26711 TSIMRET 013B12 58F0 C0F8 13B20 26712+ L R15,=A(SAVETST) R15 := current save area 013B16 58DF 0004 00004 26713+ L R13,4(R15) get old save area back 013B1A 98EC D00C 0000C 26714+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013B1E 07FE 26715+ BR 14 RETURN 02000000 26716 TSIMEND 013B20 26717+ LTORG 013B20 00000458 26718 =A(SAVETST) 013B24 4111999A 26719 =E'1.1' 13B28 26720+T511TEND EQU * 26721 * 26722 * Test 512 -- SER R,R -------------------------------------- 26723 * 26724 TSIMBEG T512,8000,50,1,C'SER R,R' 26725+* 003BA4 26726+TDSCDAT CSECT 003BA8 26727+ DS 0D 26728+* 003BA8 00013B28 26729+T512TDSC DC A(T512) // TENTRY 003BAC 000000A0 26730+ DC A(T512TEND-T512) // TLENGTH 003BB0 00001F40 26731+ DC F'8000' // TLRCNT 003BB4 00000032 26732+ DC F'50' // TIGCNT 003BB8 00000001 26733+ DC F'1' // TLTYPE 001B5D 26734+TEXT CSECT 001B5D E3F5F1F2 26735+SPTR2373 DC C'T512' 003BBC 26736+TDSCDAT CSECT 003BBC 26737+ DS 0F PAGE 489 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003BBC 04001B5D 26738+ DC AL1(L'SPTR2373),AL3(SPTR2373) 001B61 26739+TEXT CSECT 001B61 E2C5D940D96BD9 26740+SPTR2374 DC C'SER R,R' 003BC0 26741+TDSCDAT CSECT 003BC0 26742+ DS 0F 003BC0 07001B61 26743+ DC AL1(L'SPTR2374),AL3(SPTR2374) 26744+* 004CA0 26745+TDSCTBL CSECT 04CA0 26746+T512TPTR EQU * 004CA0 00003BA8 26747+ DC A(T512TDSC) enabled test 26748+* 013B28 26749+TCODE CSECT 013B28 26750+ DS 0D ensure double word alignment for test 013B28 26751+T512 DS 0H 01650000 013B28 90EC D00C 0000C 26752+ STM 14,12,12(13) SAVE REGISTERS 02950000 013B2C 18CF 26753+ LR R12,R15 base register := entry address 13B28 26754+ USING T512,R12 declare code base register 013B2E 41B0 C024 13B4C 26755+ LA R11,T512L load loop target to R11 013B32 58F0 C098 13BC0 26756+ L R15,=A(SAVETST) R15 := current save area 013B36 50DF 0004 00004 26757+ ST R13,4(R15) set back pointer in current save area 013B3A 182D 26758+ LR R2,R13 remember callers save area 013B3C 18DF 26759+ LR R13,R15 setup current save area 013B3E 50D2 0008 00008 26760+ ST R13,8(R2) set forw pointer in callers save area 00000 26761+ USING TDSC,R1 declare TDSC base register 013B42 58F0 1008 00008 26762+ L R15,TLRCNT load local repeat count to R15 26763+* 26764 * 013B46 3B00 26765 SER FR0,FR0 013B48 7820 C09C 13BC4 26766 LE FR2,=E'1.1' 26767 T512L REPINS SER,(FR0,FR2) repeat: SER FR0,FR2 26768+* 26769+* build from sublist &ALIST a comma separated string &ARGS 26770+* 26771+* 26772+* 26773+* 26774+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 26775+* this allows to transfer the repeat count from last TDSCGEN call 26776+* 26777+* 13B4C 26778+T512L EQU * 26779+* 26780+* write a comment indicating what REPINS does (in case NOGEN in effect) 26781+* 26782+*,// REPINS: do 50 times: 26783+* 26784+* MNOTE requires that ' is doubled for expanded variables 26785+* thus build &MASTR as a copy of '&ARGS with ' doubled 26786+* 26787+* 26788+*,// SER FR0,FR2 26789+* 26790+* finally generate code: &ICNT copies of &CODE &ARGS 26791+* 013B4C 3B02 26792+ SER FR0,FR2 PAGE 490 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013B4E 3B02 26793+ SER FR0,FR2 013B50 3B02 26794+ SER FR0,FR2 013B52 3B02 26795+ SER FR0,FR2 013B54 3B02 26796+ SER FR0,FR2 013B56 3B02 26797+ SER FR0,FR2 013B58 3B02 26798+ SER FR0,FR2 013B5A 3B02 26799+ SER FR0,FR2 013B5C 3B02 26800+ SER FR0,FR2 013B5E 3B02 26801+ SER FR0,FR2 013B60 3B02 26802+ SER FR0,FR2 013B62 3B02 26803+ SER FR0,FR2 013B64 3B02 26804+ SER FR0,FR2 013B66 3B02 26805+ SER FR0,FR2 013B68 3B02 26806+ SER FR0,FR2 013B6A 3B02 26807+ SER FR0,FR2 013B6C 3B02 26808+ SER FR0,FR2 013B6E 3B02 26809+ SER FR0,FR2 013B70 3B02 26810+ SER FR0,FR2 013B72 3B02 26811+ SER FR0,FR2 013B74 3B02 26812+ SER FR0,FR2 013B76 3B02 26813+ SER FR0,FR2 013B78 3B02 26814+ SER FR0,FR2 013B7A 3B02 26815+ SER FR0,FR2 013B7C 3B02 26816+ SER FR0,FR2 013B7E 3B02 26817+ SER FR0,FR2 013B80 3B02 26818+ SER FR0,FR2 013B82 3B02 26819+ SER FR0,FR2 013B84 3B02 26820+ SER FR0,FR2 013B86 3B02 26821+ SER FR0,FR2 013B88 3B02 26822+ SER FR0,FR2 013B8A 3B02 26823+ SER FR0,FR2 013B8C 3B02 26824+ SER FR0,FR2 013B8E 3B02 26825+ SER FR0,FR2 013B90 3B02 26826+ SER FR0,FR2 013B92 3B02 26827+ SER FR0,FR2 013B94 3B02 26828+ SER FR0,FR2 013B96 3B02 26829+ SER FR0,FR2 013B98 3B02 26830+ SER FR0,FR2 013B9A 3B02 26831+ SER FR0,FR2 013B9C 3B02 26832+ SER FR0,FR2 013B9E 3B02 26833+ SER FR0,FR2 013BA0 3B02 26834+ SER FR0,FR2 013BA2 3B02 26835+ SER FR0,FR2 013BA4 3B02 26836+ SER FR0,FR2 013BA6 3B02 26837+ SER FR0,FR2 013BA8 3B02 26838+ SER FR0,FR2 013BAA 3B02 26839+ SER FR0,FR2 013BAC 3B02 26840+ SER FR0,FR2 013BAE 3B02 26841+ SER FR0,FR2 26842+* 013BB0 06FB 26843 BCTR R15,R11 26844 TSIMRET 013BB2 58F0 C098 13BC0 26845+ L R15,=A(SAVETST) R15 := current save area 013BB6 58DF 0004 00004 26846+ L R13,4(R15) get old save area back 013BBA 98EC D00C 0000C 26847+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 PAGE 491 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013BBE 07FE 26848+ BR 14 RETURN 02000000 26849 TSIMEND 013BC0 26850+ LTORG 013BC0 00000458 26851 =A(SAVETST) 013BC4 4111999A 26852 =E'1.1' 13BC8 26853+T512TEND EQU * 26854 * 26855 * Test 513 -- SE R,m --------------------------------------- 26856 * 26857 TSIMBEG T513,6000,50,1,C'SE R,m' 26858+* 003BC4 26859+TDSCDAT CSECT 003BC8 26860+ DS 0D 26861+* 003BC8 00013BC8 26862+T513TDSC DC A(T513) // TENTRY 003BCC 00000100 26863+ DC A(T513TEND-T513) // TLENGTH 003BD0 00001770 26864+ DC F'6000' // TLRCNT 003BD4 00000032 26865+ DC F'50' // TIGCNT 003BD8 00000001 26866+ DC F'1' // TLTYPE 001B68 26867+TEXT CSECT 001B68 E3F5F1F3 26868+SPTR2385 DC C'T513' 003BDC 26869+TDSCDAT CSECT 003BDC 26870+ DS 0F 003BDC 04001B68 26871+ DC AL1(L'SPTR2385),AL3(SPTR2385) 001B6C 26872+TEXT CSECT 001B6C E2C540D96B94 26873+SPTR2386 DC C'SE R,m' 003BE0 26874+TDSCDAT CSECT 003BE0 26875+ DS 0F 003BE0 06001B6C 26876+ DC AL1(L'SPTR2386),AL3(SPTR2386) 26877+* 004CA4 26878+TDSCTBL CSECT 04CA4 26879+T513TPTR EQU * 004CA4 00003BC8 26880+ DC A(T513TDSC) enabled test 26881+* 013BC8 26882+TCODE CSECT 013BC8 26883+ DS 0D ensure double word alignment for test 013BC8 26884+T513 DS 0H 01650000 013BC8 90EC D00C 0000C 26885+ STM 14,12,12(13) SAVE REGISTERS 02950000 013BCC 18CF 26886+ LR R12,R15 base register := entry address 13BC8 26887+ USING T513,R12 declare code base register 013BCE 41B0 C020 13BE8 26888+ LA R11,T513L load loop target to R11 013BD2 58F0 C0F8 13CC0 26889+ L R15,=A(SAVETST) R15 := current save area 013BD6 50DF 0004 00004 26890+ ST R13,4(R15) set back pointer in current save area 013BDA 182D 26891+ LR R2,R13 remember callers save area 013BDC 18DF 26892+ LR R13,R15 setup current save area 013BDE 50D2 0008 00008 26893+ ST R13,8(R2) set forw pointer in callers save area 00000 26894+ USING TDSC,R1 declare TDSC base register 013BE2 58F0 1008 00008 26895+ L R15,TLRCNT load local repeat count to R15 26896+* 26897 * 013BE6 3B00 26898 SER FR0,FR0 26899 T513L REPINS SE,(FR0,=E'1.1') repeat: SE FR0,=E'1.1' 26900+* 26901+* build from sublist &ALIST a comma separated string &ARGS 26902+* PAGE 492 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 26903+* 26904+* 26905+* 26906+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 26907+* this allows to transfer the repeat count from last TDSCGEN call 26908+* 26909+* 13BE8 26910+T513L EQU * 26911+* 26912+* write a comment indicating what REPINS does (in case NOGEN in effect) 26913+* 26914+*,// REPINS: do 50 times: 26915+* 26916+* MNOTE requires that ' is doubled for expanded variables 26917+* thus build &MASTR as a copy of '&ARGS with ' doubled 26918+* 26919+* 26920+*,// SE FR0,=E'1.1' 26921+* 26922+* finally generate code: &ICNT copies of &CODE &ARGS 26923+* 013BE8 7B00 C0FC 13CC4 26924+ SE FR0,=E'1.1' 013BEC 7B00 C0FC 13CC4 26925+ SE FR0,=E'1.1' 013BF0 7B00 C0FC 13CC4 26926+ SE FR0,=E'1.1' 013BF4 7B00 C0FC 13CC4 26927+ SE FR0,=E'1.1' 013BF8 7B00 C0FC 13CC4 26928+ SE FR0,=E'1.1' 013BFC 7B00 C0FC 13CC4 26929+ SE FR0,=E'1.1' 013C00 7B00 C0FC 13CC4 26930+ SE FR0,=E'1.1' 013C04 7B00 C0FC 13CC4 26931+ SE FR0,=E'1.1' 013C08 7B00 C0FC 13CC4 26932+ SE FR0,=E'1.1' 013C0C 7B00 C0FC 13CC4 26933+ SE FR0,=E'1.1' 013C10 7B00 C0FC 13CC4 26934+ SE FR0,=E'1.1' 013C14 7B00 C0FC 13CC4 26935+ SE FR0,=E'1.1' 013C18 7B00 C0FC 13CC4 26936+ SE FR0,=E'1.1' 013C1C 7B00 C0FC 13CC4 26937+ SE FR0,=E'1.1' 013C20 7B00 C0FC 13CC4 26938+ SE FR0,=E'1.1' 013C24 7B00 C0FC 13CC4 26939+ SE FR0,=E'1.1' 013C28 7B00 C0FC 13CC4 26940+ SE FR0,=E'1.1' 013C2C 7B00 C0FC 13CC4 26941+ SE FR0,=E'1.1' 013C30 7B00 C0FC 13CC4 26942+ SE FR0,=E'1.1' 013C34 7B00 C0FC 13CC4 26943+ SE FR0,=E'1.1' 013C38 7B00 C0FC 13CC4 26944+ SE FR0,=E'1.1' 013C3C 7B00 C0FC 13CC4 26945+ SE FR0,=E'1.1' 013C40 7B00 C0FC 13CC4 26946+ SE FR0,=E'1.1' 013C44 7B00 C0FC 13CC4 26947+ SE FR0,=E'1.1' 013C48 7B00 C0FC 13CC4 26948+ SE FR0,=E'1.1' 013C4C 7B00 C0FC 13CC4 26949+ SE FR0,=E'1.1' 013C50 7B00 C0FC 13CC4 26950+ SE FR0,=E'1.1' 013C54 7B00 C0FC 13CC4 26951+ SE FR0,=E'1.1' 013C58 7B00 C0FC 13CC4 26952+ SE FR0,=E'1.1' 013C5C 7B00 C0FC 13CC4 26953+ SE FR0,=E'1.1' 013C60 7B00 C0FC 13CC4 26954+ SE FR0,=E'1.1' 013C64 7B00 C0FC 13CC4 26955+ SE FR0,=E'1.1' 013C68 7B00 C0FC 13CC4 26956+ SE FR0,=E'1.1' 013C6C 7B00 C0FC 13CC4 26957+ SE FR0,=E'1.1' PAGE 493 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013C70 7B00 C0FC 13CC4 26958+ SE FR0,=E'1.1' 013C74 7B00 C0FC 13CC4 26959+ SE FR0,=E'1.1' 013C78 7B00 C0FC 13CC4 26960+ SE FR0,=E'1.1' 013C7C 7B00 C0FC 13CC4 26961+ SE FR0,=E'1.1' 013C80 7B00 C0FC 13CC4 26962+ SE FR0,=E'1.1' 013C84 7B00 C0FC 13CC4 26963+ SE FR0,=E'1.1' 013C88 7B00 C0FC 13CC4 26964+ SE FR0,=E'1.1' 013C8C 7B00 C0FC 13CC4 26965+ SE FR0,=E'1.1' 013C90 7B00 C0FC 13CC4 26966+ SE FR0,=E'1.1' 013C94 7B00 C0FC 13CC4 26967+ SE FR0,=E'1.1' 013C98 7B00 C0FC 13CC4 26968+ SE FR0,=E'1.1' 013C9C 7B00 C0FC 13CC4 26969+ SE FR0,=E'1.1' 013CA0 7B00 C0FC 13CC4 26970+ SE FR0,=E'1.1' 013CA4 7B00 C0FC 13CC4 26971+ SE FR0,=E'1.1' 013CA8 7B00 C0FC 13CC4 26972+ SE FR0,=E'1.1' 013CAC 7B00 C0FC 13CC4 26973+ SE FR0,=E'1.1' 26974+* 013CB0 06FB 26975 BCTR R15,R11 26976 TSIMRET 013CB2 58F0 C0F8 13CC0 26977+ L R15,=A(SAVETST) R15 := current save area 013CB6 58DF 0004 00004 26978+ L R13,4(R15) get old save area back 013CBA 98EC D00C 0000C 26979+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013CBE 07FE 26980+ BR 14 RETURN 02000000 26981 TSIMEND 013CC0 26982+ LTORG 013CC0 00000458 26983 =A(SAVETST) 013CC4 4111999A 26984 =E'1.1' 13CC8 26985+T513TEND EQU * 26986 * 26987 * Test 514 -- MER R,R -------------------------------------- 26988 * 26989 TSIMBEG T514,10000,50,9,C'MER R,R' 26990+* 003BE4 26991+TDSCDAT CSECT 003BE8 26992+ DS 0D 26993+* 003BE8 00013CC8 26994+T514TDSC DC A(T514) // TENTRY 003BEC 000000AC 26995+ DC A(T514TEND-T514) // TLENGTH 003BF0 00002710 26996+ DC F'10000' // TLRCNT 003BF4 00000032 26997+ DC F'50' // TIGCNT 003BF8 00000009 26998+ DC F'9' // TLTYPE 001B72 26999+TEXT CSECT 001B72 E3F5F1F4 27000+SPTR2397 DC C'T514' 003BFC 27001+TDSCDAT CSECT 003BFC 27002+ DS 0F 003BFC 04001B72 27003+ DC AL1(L'SPTR2397),AL3(SPTR2397) 001B76 27004+TEXT CSECT 001B76 D4C5D940D96BD9 27005+SPTR2398 DC C'MER R,R' 003C00 27006+TDSCDAT CSECT 003C00 27007+ DS 0F 003C00 07001B76 27008+ DC AL1(L'SPTR2398),AL3(SPTR2398) 27009+* 004CA8 27010+TDSCTBL CSECT 04CA8 27011+T514TPTR EQU * 004CA8 00003BE8 27012+ DC A(T514TDSC) enabled test PAGE 494 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 27013+* 013CC8 27014+TCODE CSECT 013CC8 27015+ DS 0D ensure double word alignment for test 013CC8 27016+T514 DS 0H 01650000 013CC8 90EC D00C 0000C 27017+ STM 14,12,12(13) SAVE REGISTERS 02950000 013CCC 18CF 27018+ LR R12,R15 base register := entry address 13CC8 27019+ USING T514,R12 declare code base register 013CCE 41B0 C022 13CEA 27020+ LA R11,T514L load loop target to R11 013CD2 58F0 C0A0 13D68 27021+ L R15,=A(SAVETST) R15 := current save area 013CD6 50DF 0004 00004 27022+ ST R13,4(R15) set back pointer in current save area 013CDA 182D 27023+ LR R2,R13 remember callers save area 013CDC 18DF 27024+ LR R13,R15 setup current save area 013CDE 50D2 0008 00008 27025+ ST R13,8(R2) set forw pointer in callers save area 00000 27026+ USING TDSC,R1 declare TDSC base register 013CE2 58F0 1008 00008 27027+ L R15,TLRCNT load local repeat count to R15 27028+* 27029 * inner loop logic: 27030 * load FR0 with 1.0 27031 * multiply 50 times by 1.1 27032 * 013CE6 7820 C0A4 13D6C 27033 LE FR2,=E'1.1' 013CEA 7800 C0A8 13D70 27034 T514L LE FR0,=E'1.0' 27035 REPINS MER,(FR0,FR2) repeat: MER FR0,FR2 27036+* 27037+* build from sublist &ALIST a comma separated string &ARGS 27038+* 27039+* 27040+* 27041+* 27042+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 27043+* this allows to transfer the repeat count from last TDSCGEN call 27044+* 27045+* 27046+* 27047+* write a comment indicating what REPINS does (in case NOGEN in effect) 27048+* 27049+*,// REPINS: do 50 times: 27050+* 27051+* MNOTE requires that ' is doubled for expanded variables 27052+* thus build &MASTR as a copy of '&ARGS with ' doubled 27053+* 27054+* 27055+*,// MER FR0,FR2 27056+* 27057+* finally generate code: &ICNT copies of &CODE &ARGS 27058+* 013CEE 3C02 27059+ MER FR0,FR2 013CF0 3C02 27060+ MER FR0,FR2 013CF2 3C02 27061+ MER FR0,FR2 013CF4 3C02 27062+ MER FR0,FR2 013CF6 3C02 27063+ MER FR0,FR2 013CF8 3C02 27064+ MER FR0,FR2 013CFA 3C02 27065+ MER FR0,FR2 013CFC 3C02 27066+ MER FR0,FR2 013CFE 3C02 27067+ MER FR0,FR2 PAGE 495 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013D00 3C02 27068+ MER FR0,FR2 013D02 3C02 27069+ MER FR0,FR2 013D04 3C02 27070+ MER FR0,FR2 013D06 3C02 27071+ MER FR0,FR2 013D08 3C02 27072+ MER FR0,FR2 013D0A 3C02 27073+ MER FR0,FR2 013D0C 3C02 27074+ MER FR0,FR2 013D0E 3C02 27075+ MER FR0,FR2 013D10 3C02 27076+ MER FR0,FR2 013D12 3C02 27077+ MER FR0,FR2 013D14 3C02 27078+ MER FR0,FR2 013D16 3C02 27079+ MER FR0,FR2 013D18 3C02 27080+ MER FR0,FR2 013D1A 3C02 27081+ MER FR0,FR2 013D1C 3C02 27082+ MER FR0,FR2 013D1E 3C02 27083+ MER FR0,FR2 013D20 3C02 27084+ MER FR0,FR2 013D22 3C02 27085+ MER FR0,FR2 013D24 3C02 27086+ MER FR0,FR2 013D26 3C02 27087+ MER FR0,FR2 013D28 3C02 27088+ MER FR0,FR2 013D2A 3C02 27089+ MER FR0,FR2 013D2C 3C02 27090+ MER FR0,FR2 013D2E 3C02 27091+ MER FR0,FR2 013D30 3C02 27092+ MER FR0,FR2 013D32 3C02 27093+ MER FR0,FR2 013D34 3C02 27094+ MER FR0,FR2 013D36 3C02 27095+ MER FR0,FR2 013D38 3C02 27096+ MER FR0,FR2 013D3A 3C02 27097+ MER FR0,FR2 013D3C 3C02 27098+ MER FR0,FR2 013D3E 3C02 27099+ MER FR0,FR2 013D40 3C02 27100+ MER FR0,FR2 013D42 3C02 27101+ MER FR0,FR2 013D44 3C02 27102+ MER FR0,FR2 013D46 3C02 27103+ MER FR0,FR2 013D48 3C02 27104+ MER FR0,FR2 013D4A 3C02 27105+ MER FR0,FR2 013D4C 3C02 27106+ MER FR0,FR2 013D4E 3C02 27107+ MER FR0,FR2 013D50 3C02 27108+ MER FR0,FR2 27109+* 013D52 06FB 27110 BCTR R15,R11 27111 TSIMRET 013D54 58F0 C0A0 13D68 27112+ L R15,=A(SAVETST) R15 := current save area 013D58 58DF 0004 00004 27113+ L R13,4(R15) get old save area back 013D5C 98EC D00C 0000C 27114+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013D60 07FE 27115+ BR 14 RETURN 02000000 27116 TSIMEND 013D68 27117+ LTORG 013D68 00000458 27118 =A(SAVETST) 013D6C 4111999A 27119 =E'1.1' 013D70 41100000 27120 =E'1.0' 13D74 27121+T514TEND EQU * 27122 * PAGE 496 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 27123 * Test 515 -- ME R,m -------------------------------------- 27124 * 27125 TSIMBEG T515,6500,50,9,C'ME R,m' 27126+* 003C04 27127+TDSCDAT CSECT 003C08 27128+ DS 0D 27129+* 003C08 00013D78 27130+T515TDSC DC A(T515) // TENTRY 003C0C 0000010C 27131+ DC A(T515TEND-T515) // TLENGTH 003C10 00001964 27132+ DC F'6500' // TLRCNT 003C14 00000032 27133+ DC F'50' // TIGCNT 003C18 00000009 27134+ DC F'9' // TLTYPE 001B7D 27135+TEXT CSECT 001B7D E3F5F1F5 27136+SPTR2409 DC C'T515' 003C1C 27137+TDSCDAT CSECT 003C1C 27138+ DS 0F 003C1C 04001B7D 27139+ DC AL1(L'SPTR2409),AL3(SPTR2409) 001B81 27140+TEXT CSECT 001B81 D4C540D96B94 27141+SPTR2410 DC C'ME R,m' 003C20 27142+TDSCDAT CSECT 003C20 27143+ DS 0F 003C20 06001B81 27144+ DC AL1(L'SPTR2410),AL3(SPTR2410) 27145+* 004CAC 27146+TDSCTBL CSECT 04CAC 27147+T515TPTR EQU * 004CAC 00003C08 27148+ DC A(T515TDSC) enabled test 27149+* 013D74 27150+TCODE CSECT 013D78 27151+ DS 0D ensure double word alignment for test 013D78 27152+T515 DS 0H 01650000 013D78 90EC D00C 0000C 27153+ STM 14,12,12(13) SAVE REGISTERS 02950000 013D7C 18CF 27154+ LR R12,R15 base register := entry address 13D78 27155+ USING T515,R12 declare code base register 013D7E 41B0 C01E 13D96 27156+ LA R11,T515L load loop target to R11 013D82 58F0 C100 13E78 27157+ L R15,=A(SAVETST) R15 := current save area 013D86 50DF 0004 00004 27158+ ST R13,4(R15) set back pointer in current save area 013D8A 182D 27159+ LR R2,R13 remember callers save area 013D8C 18DF 27160+ LR R13,R15 setup current save area 013D8E 50D2 0008 00008 27161+ ST R13,8(R2) set forw pointer in callers save area 00000 27162+ USING TDSC,R1 declare TDSC base register 013D92 58F0 1008 00008 27163+ L R15,TLRCNT load local repeat count to R15 27164+* 27165 * inner loop logic: 27166 * load FR0 with 1.0 27167 * multiply 50 times by 1.1 27168 * 013D96 7800 C104 13E7C 27169 T515L LE FR0,=E'1.0' 27170 REPINS ME,(FR0,=E'1.1') repeat: ME FR0,=E'1.1' 27171+* 27172+* build from sublist &ALIST a comma separated string &ARGS 27173+* 27174+* 27175+* 27176+* 27177+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT PAGE 497 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 27178+* this allows to transfer the repeat count from last TDSCGEN call 27179+* 27180+* 27181+* 27182+* write a comment indicating what REPINS does (in case NOGEN in effect) 27183+* 27184+*,// REPINS: do 50 times: 27185+* 27186+* MNOTE requires that ' is doubled for expanded variables 27187+* thus build &MASTR as a copy of '&ARGS with ' doubled 27188+* 27189+* 27190+*,// ME FR0,=E'1.1' 27191+* 27192+* finally generate code: &ICNT copies of &CODE &ARGS 27193+* 013D9A 7C00 C108 13E80 27194+ ME FR0,=E'1.1' 013D9E 7C00 C108 13E80 27195+ ME FR0,=E'1.1' 013DA2 7C00 C108 13E80 27196+ ME FR0,=E'1.1' 013DA6 7C00 C108 13E80 27197+ ME FR0,=E'1.1' 013DAA 7C00 C108 13E80 27198+ ME FR0,=E'1.1' 013DAE 7C00 C108 13E80 27199+ ME FR0,=E'1.1' 013DB2 7C00 C108 13E80 27200+ ME FR0,=E'1.1' 013DB6 7C00 C108 13E80 27201+ ME FR0,=E'1.1' 013DBA 7C00 C108 13E80 27202+ ME FR0,=E'1.1' 013DBE 7C00 C108 13E80 27203+ ME FR0,=E'1.1' 013DC2 7C00 C108 13E80 27204+ ME FR0,=E'1.1' 013DC6 7C00 C108 13E80 27205+ ME FR0,=E'1.1' 013DCA 7C00 C108 13E80 27206+ ME FR0,=E'1.1' 013DCE 7C00 C108 13E80 27207+ ME FR0,=E'1.1' 013DD2 7C00 C108 13E80 27208+ ME FR0,=E'1.1' 013DD6 7C00 C108 13E80 27209+ ME FR0,=E'1.1' 013DDA 7C00 C108 13E80 27210+ ME FR0,=E'1.1' 013DDE 7C00 C108 13E80 27211+ ME FR0,=E'1.1' 013DE2 7C00 C108 13E80 27212+ ME FR0,=E'1.1' 013DE6 7C00 C108 13E80 27213+ ME FR0,=E'1.1' 013DEA 7C00 C108 13E80 27214+ ME FR0,=E'1.1' 013DEE 7C00 C108 13E80 27215+ ME FR0,=E'1.1' 013DF2 7C00 C108 13E80 27216+ ME FR0,=E'1.1' 013DF6 7C00 C108 13E80 27217+ ME FR0,=E'1.1' 013DFA 7C00 C108 13E80 27218+ ME FR0,=E'1.1' 013DFE 7C00 C108 13E80 27219+ ME FR0,=E'1.1' 013E02 7C00 C108 13E80 27220+ ME FR0,=E'1.1' 013E06 7C00 C108 13E80 27221+ ME FR0,=E'1.1' 013E0A 7C00 C108 13E80 27222+ ME FR0,=E'1.1' 013E0E 7C00 C108 13E80 27223+ ME FR0,=E'1.1' 013E12 7C00 C108 13E80 27224+ ME FR0,=E'1.1' 013E16 7C00 C108 13E80 27225+ ME FR0,=E'1.1' 013E1A 7C00 C108 13E80 27226+ ME FR0,=E'1.1' 013E1E 7C00 C108 13E80 27227+ ME FR0,=E'1.1' 013E22 7C00 C108 13E80 27228+ ME FR0,=E'1.1' 013E26 7C00 C108 13E80 27229+ ME FR0,=E'1.1' 013E2A 7C00 C108 13E80 27230+ ME FR0,=E'1.1' 013E2E 7C00 C108 13E80 27231+ ME FR0,=E'1.1' 013E32 7C00 C108 13E80 27232+ ME FR0,=E'1.1' PAGE 498 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013E36 7C00 C108 13E80 27233+ ME FR0,=E'1.1' 013E3A 7C00 C108 13E80 27234+ ME FR0,=E'1.1' 013E3E 7C00 C108 13E80 27235+ ME FR0,=E'1.1' 013E42 7C00 C108 13E80 27236+ ME FR0,=E'1.1' 013E46 7C00 C108 13E80 27237+ ME FR0,=E'1.1' 013E4A 7C00 C108 13E80 27238+ ME FR0,=E'1.1' 013E4E 7C00 C108 13E80 27239+ ME FR0,=E'1.1' 013E52 7C00 C108 13E80 27240+ ME FR0,=E'1.1' 013E56 7C00 C108 13E80 27241+ ME FR0,=E'1.1' 013E5A 7C00 C108 13E80 27242+ ME FR0,=E'1.1' 013E5E 7C00 C108 13E80 27243+ ME FR0,=E'1.1' 27244+* 013E62 06FB 27245 BCTR R15,R11 27246 TSIMRET 013E64 58F0 C100 13E78 27247+ L R15,=A(SAVETST) R15 := current save area 013E68 58DF 0004 00004 27248+ L R13,4(R15) get old save area back 013E6C 98EC D00C 0000C 27249+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013E70 07FE 27250+ BR 14 RETURN 02000000 27251 TSIMEND 013E78 27252+ LTORG 013E78 00000458 27253 =A(SAVETST) 013E7C 41100000 27254 =E'1.0' 013E80 4111999A 27255 =E'1.1' 13E84 27256+T515TEND EQU * 27257 * 27258 * Test 516 -- DER R,R -------------------------------------- 27259 * 27260 TSIMBEG T516,5000,50,9,C'DER R,R' 27261+* 003C24 27262+TDSCDAT CSECT 003C28 27263+ DS 0D 27264+* 003C28 00013E88 27265+T516TDSC DC A(T516) // TENTRY 003C2C 000000AC 27266+ DC A(T516TEND-T516) // TLENGTH 003C30 00001388 27267+ DC F'5000' // TLRCNT 003C34 00000032 27268+ DC F'50' // TIGCNT 003C38 00000009 27269+ DC F'9' // TLTYPE 001B87 27270+TEXT CSECT 001B87 E3F5F1F6 27271+SPTR2421 DC C'T516' 003C3C 27272+TDSCDAT CSECT 003C3C 27273+ DS 0F 003C3C 04001B87 27274+ DC AL1(L'SPTR2421),AL3(SPTR2421) 001B8B 27275+TEXT CSECT 001B8B C4C5D940D96BD9 27276+SPTR2422 DC C'DER R,R' 003C40 27277+TDSCDAT CSECT 003C40 27278+ DS 0F 003C40 07001B8B 27279+ DC AL1(L'SPTR2422),AL3(SPTR2422) 27280+* 004CB0 27281+TDSCTBL CSECT 04CB0 27282+T516TPTR EQU * 004CB0 00003C28 27283+ DC A(T516TDSC) enabled test 27284+* 013E84 27285+TCODE CSECT 013E88 27286+ DS 0D ensure double word alignment for test 013E88 27287+T516 DS 0H 01650000 PAGE 499 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013E88 90EC D00C 0000C 27288+ STM 14,12,12(13) SAVE REGISTERS 02950000 013E8C 18CF 27289+ LR R12,R15 base register := entry address 13E88 27290+ USING T516,R12 declare code base register 013E8E 41B0 C022 13EAA 27291+ LA R11,T516L load loop target to R11 013E92 58F0 C0A0 13F28 27292+ L R15,=A(SAVETST) R15 := current save area 013E96 50DF 0004 00004 27293+ ST R13,4(R15) set back pointer in current save area 013E9A 182D 27294+ LR R2,R13 remember callers save area 013E9C 18DF 27295+ LR R13,R15 setup current save area 013E9E 50D2 0008 00008 27296+ ST R13,8(R2) set forw pointer in callers save area 00000 27297+ USING TDSC,R1 declare TDSC base register 013EA2 58F0 1008 00008 27298+ L R15,TLRCNT load local repeat count to R15 27299+* 27300 * inner loop logic: 27301 * load FR0 with 1.0 27302 * divide 50 times by 1.1 27303 * 013EA6 7820 C0A4 13F2C 27304 LE FR2,=E'1.1' 013EAA 7800 C0A8 13F30 27305 T516L LE FR0,=E'1.0' 27306 REPINS DER,(FR0,FR2) repeat: DER FR0,FR2 27307+* 27308+* build from sublist &ALIST a comma separated string &ARGS 27309+* 27310+* 27311+* 27312+* 27313+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 27314+* this allows to transfer the repeat count from last TDSCGEN call 27315+* 27316+* 27317+* 27318+* write a comment indicating what REPINS does (in case NOGEN in effect) 27319+* 27320+*,// REPINS: do 50 times: 27321+* 27322+* MNOTE requires that ' is doubled for expanded variables 27323+* thus build &MASTR as a copy of '&ARGS with ' doubled 27324+* 27325+* 27326+*,// DER FR0,FR2 27327+* 27328+* finally generate code: &ICNT copies of &CODE &ARGS 27329+* 013EAE 3D02 27330+ DER FR0,FR2 013EB0 3D02 27331+ DER FR0,FR2 013EB2 3D02 27332+ DER FR0,FR2 013EB4 3D02 27333+ DER FR0,FR2 013EB6 3D02 27334+ DER FR0,FR2 013EB8 3D02 27335+ DER FR0,FR2 013EBA 3D02 27336+ DER FR0,FR2 013EBC 3D02 27337+ DER FR0,FR2 013EBE 3D02 27338+ DER FR0,FR2 013EC0 3D02 27339+ DER FR0,FR2 013EC2 3D02 27340+ DER FR0,FR2 013EC4 3D02 27341+ DER FR0,FR2 013EC6 3D02 27342+ DER FR0,FR2 PAGE 500 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 013EC8 3D02 27343+ DER FR0,FR2 013ECA 3D02 27344+ DER FR0,FR2 013ECC 3D02 27345+ DER FR0,FR2 013ECE 3D02 27346+ DER FR0,FR2 013ED0 3D02 27347+ DER FR0,FR2 013ED2 3D02 27348+ DER FR0,FR2 013ED4 3D02 27349+ DER FR0,FR2 013ED6 3D02 27350+ DER FR0,FR2 013ED8 3D02 27351+ DER FR0,FR2 013EDA 3D02 27352+ DER FR0,FR2 013EDC 3D02 27353+ DER FR0,FR2 013EDE 3D02 27354+ DER FR0,FR2 013EE0 3D02 27355+ DER FR0,FR2 013EE2 3D02 27356+ DER FR0,FR2 013EE4 3D02 27357+ DER FR0,FR2 013EE6 3D02 27358+ DER FR0,FR2 013EE8 3D02 27359+ DER FR0,FR2 013EEA 3D02 27360+ DER FR0,FR2 013EEC 3D02 27361+ DER FR0,FR2 013EEE 3D02 27362+ DER FR0,FR2 013EF0 3D02 27363+ DER FR0,FR2 013EF2 3D02 27364+ DER FR0,FR2 013EF4 3D02 27365+ DER FR0,FR2 013EF6 3D02 27366+ DER FR0,FR2 013EF8 3D02 27367+ DER FR0,FR2 013EFA 3D02 27368+ DER FR0,FR2 013EFC 3D02 27369+ DER FR0,FR2 013EFE 3D02 27370+ DER FR0,FR2 013F00 3D02 27371+ DER FR0,FR2 013F02 3D02 27372+ DER FR0,FR2 013F04 3D02 27373+ DER FR0,FR2 013F06 3D02 27374+ DER FR0,FR2 013F08 3D02 27375+ DER FR0,FR2 013F0A 3D02 27376+ DER FR0,FR2 013F0C 3D02 27377+ DER FR0,FR2 013F0E 3D02 27378+ DER FR0,FR2 013F10 3D02 27379+ DER FR0,FR2 27380+* 013F12 06FB 27381 BCTR R15,R11 27382 TSIMRET 013F14 58F0 C0A0 13F28 27383+ L R15,=A(SAVETST) R15 := current save area 013F18 58DF 0004 00004 27384+ L R13,4(R15) get old save area back 013F1C 98EC D00C 0000C 27385+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 013F20 07FE 27386+ BR 14 RETURN 02000000 27387 TSIMEND 013F28 27388+ LTORG 013F28 00000458 27389 =A(SAVETST) 013F2C 4111999A 27390 =E'1.1' 013F30 41100000 27391 =E'1.0' 13F34 27392+T516TEND EQU * 27393 * 27394 * Test 517 -- DE R,m --------------------------------------- 27395 * inner loop logic: 27396 * load FR0 with 1.0 27397 * divide 50 times by 1.1 PAGE 501 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 27398 * 27399 TSIMBEG T517,4000,50,9,C'DE R,m' 27400+* 003C44 27401+TDSCDAT CSECT 003C48 27402+ DS 0D 27403+* 003C48 00013F38 27404+T517TDSC DC A(T517) // TENTRY 003C4C 0000010C 27405+ DC A(T517TEND-T517) // TLENGTH 003C50 00000FA0 27406+ DC F'4000' // TLRCNT 003C54 00000032 27407+ DC F'50' // TIGCNT 003C58 00000009 27408+ DC F'9' // TLTYPE 001B92 27409+TEXT CSECT 001B92 E3F5F1F7 27410+SPTR2433 DC C'T517' 003C5C 27411+TDSCDAT CSECT 003C5C 27412+ DS 0F 003C5C 04001B92 27413+ DC AL1(L'SPTR2433),AL3(SPTR2433) 001B96 27414+TEXT CSECT 001B96 C4C540D96B94 27415+SPTR2434 DC C'DE R,m' 003C60 27416+TDSCDAT CSECT 003C60 27417+ DS 0F 003C60 06001B96 27418+ DC AL1(L'SPTR2434),AL3(SPTR2434) 27419+* 004CB4 27420+TDSCTBL CSECT 04CB4 27421+T517TPTR EQU * 004CB4 00003C48 27422+ DC A(T517TDSC) enabled test 27423+* 013F34 27424+TCODE CSECT 013F38 27425+ DS 0D ensure double word alignment for test 013F38 27426+T517 DS 0H 01650000 013F38 90EC D00C 0000C 27427+ STM 14,12,12(13) SAVE REGISTERS 02950000 013F3C 18CF 27428+ LR R12,R15 base register := entry address 13F38 27429+ USING T517,R12 declare code base register 013F3E 41B0 C01E 13F56 27430+ LA R11,T517L load loop target to R11 013F42 58F0 C100 14038 27431+ L R15,=A(SAVETST) R15 := current save area 013F46 50DF 0004 00004 27432+ ST R13,4(R15) set back pointer in current save area 013F4A 182D 27433+ LR R2,R13 remember callers save area 013F4C 18DF 27434+ LR R13,R15 setup current save area 013F4E 50D2 0008 00008 27435+ ST R13,8(R2) set forw pointer in callers save area 00000 27436+ USING TDSC,R1 declare TDSC base register 013F52 58F0 1008 00008 27437+ L R15,TLRCNT load local repeat count to R15 27438+* 27439 * 013F56 7800 C104 1403C 27440 T517L LE FR0,=E'1.0' 27441 REPINS DE,(FR0,=E'1.1') repeat: DE FR0,=E'1.1' 27442+* 27443+* build from sublist &ALIST a comma separated string &ARGS 27444+* 27445+* 27446+* 27447+* 27448+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 27449+* this allows to transfer the repeat count from last TDSCGEN call 27450+* 27451+* 27452+* PAGE 502 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 27453+* write a comment indicating what REPINS does (in case NOGEN in effect) 27454+* 27455+*,// REPINS: do 50 times: 27456+* 27457+* MNOTE requires that ' is doubled for expanded variables 27458+* thus build &MASTR as a copy of '&ARGS with ' doubled 27459+* 27460+* 27461+*,// DE FR0,=E'1.1' 27462+* 27463+* finally generate code: &ICNT copies of &CODE &ARGS 27464+* 013F5A 7D00 C108 14040 27465+ DE FR0,=E'1.1' 013F5E 7D00 C108 14040 27466+ DE FR0,=E'1.1' 013F62 7D00 C108 14040 27467+ DE FR0,=E'1.1' 013F66 7D00 C108 14040 27468+ DE FR0,=E'1.1' 013F6A 7D00 C108 14040 27469+ DE FR0,=E'1.1' 013F6E 7D00 C108 14040 27470+ DE FR0,=E'1.1' 013F72 7D00 C108 14040 27471+ DE FR0,=E'1.1' 013F76 7D00 C108 14040 27472+ DE FR0,=E'1.1' 013F7A 7D00 C108 14040 27473+ DE FR0,=E'1.1' 013F7E 7D00 C108 14040 27474+ DE FR0,=E'1.1' 013F82 7D00 C108 14040 27475+ DE FR0,=E'1.1' 013F86 7D00 C108 14040 27476+ DE FR0,=E'1.1' 013F8A 7D00 C108 14040 27477+ DE FR0,=E'1.1' 013F8E 7D00 C108 14040 27478+ DE FR0,=E'1.1' 013F92 7D00 C108 14040 27479+ DE FR0,=E'1.1' 013F96 7D00 C108 14040 27480+ DE FR0,=E'1.1' 013F9A 7D00 C108 14040 27481+ DE FR0,=E'1.1' 013F9E 7D00 C108 14040 27482+ DE FR0,=E'1.1' 013FA2 7D00 C108 14040 27483+ DE FR0,=E'1.1' 013FA6 7D00 C108 14040 27484+ DE FR0,=E'1.1' 013FAA 7D00 C108 14040 27485+ DE FR0,=E'1.1' 013FAE 7D00 C108 14040 27486+ DE FR0,=E'1.1' 013FB2 7D00 C108 14040 27487+ DE FR0,=E'1.1' 013FB6 7D00 C108 14040 27488+ DE FR0,=E'1.1' 013FBA 7D00 C108 14040 27489+ DE FR0,=E'1.1' 013FBE 7D00 C108 14040 27490+ DE FR0,=E'1.1' 013FC2 7D00 C108 14040 27491+ DE FR0,=E'1.1' 013FC6 7D00 C108 14040 27492+ DE FR0,=E'1.1' 013FCA 7D00 C108 14040 27493+ DE FR0,=E'1.1' 013FCE 7D00 C108 14040 27494+ DE FR0,=E'1.1' 013FD2 7D00 C108 14040 27495+ DE FR0,=E'1.1' 013FD6 7D00 C108 14040 27496+ DE FR0,=E'1.1' 013FDA 7D00 C108 14040 27497+ DE FR0,=E'1.1' 013FDE 7D00 C108 14040 27498+ DE FR0,=E'1.1' 013FE2 7D00 C108 14040 27499+ DE FR0,=E'1.1' 013FE6 7D00 C108 14040 27500+ DE FR0,=E'1.1' 013FEA 7D00 C108 14040 27501+ DE FR0,=E'1.1' 013FEE 7D00 C108 14040 27502+ DE FR0,=E'1.1' 013FF2 7D00 C108 14040 27503+ DE FR0,=E'1.1' 013FF6 7D00 C108 14040 27504+ DE FR0,=E'1.1' 013FFA 7D00 C108 14040 27505+ DE FR0,=E'1.1' 013FFE 7D00 C108 14040 27506+ DE FR0,=E'1.1' 014002 7D00 C108 14040 27507+ DE FR0,=E'1.1' PAGE 503 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014006 7D00 C108 14040 27508+ DE FR0,=E'1.1' 01400A 7D00 C108 14040 27509+ DE FR0,=E'1.1' 01400E 7D00 C108 14040 27510+ DE FR0,=E'1.1' 014012 7D00 C108 14040 27511+ DE FR0,=E'1.1' 014016 7D00 C108 14040 27512+ DE FR0,=E'1.1' 01401A 7D00 C108 14040 27513+ DE FR0,=E'1.1' 01401E 7D00 C108 14040 27514+ DE FR0,=E'1.1' 27515+* 014022 06FB 27516 BCTR R15,R11 27517 TSIMRET 014024 58F0 C100 14038 27518+ L R15,=A(SAVETST) R15 := current save area 014028 58DF 0004 00004 27519+ L R13,4(R15) get old save area back 01402C 98EC D00C 0000C 27520+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014030 07FE 27521+ BR 14 RETURN 02000000 27522 TSIMEND 014038 27523+ LTORG 014038 00000458 27524 =A(SAVETST) 01403C 41100000 27525 =E'1.0' 014040 4111999A 27526 =E'1.1' 14044 27527+T517TEND EQU * 27528 * 27529 * Test 52x -- short float auxiliary ======================== 27530 * 27531 * Test 520 -- CER R,R -------------------------------------- 27532 * 27533 TSIMBEG T520,10000,50,1,C'CER R,R' 27534+* 003C64 27535+TDSCDAT CSECT 003C68 27536+ DS 0D 27537+* 003C68 00014048 27538+T520TDSC DC A(T520) // TENTRY 003C6C 000000AC 27539+ DC A(T520TEND-T520) // TLENGTH 003C70 00002710 27540+ DC F'10000' // TLRCNT 003C74 00000032 27541+ DC F'50' // TIGCNT 003C78 00000001 27542+ DC F'1' // TLTYPE 001B9C 27543+TEXT CSECT 001B9C E3F5F2F0 27544+SPTR2445 DC C'T520' 003C7C 27545+TDSCDAT CSECT 003C7C 27546+ DS 0F 003C7C 04001B9C 27547+ DC AL1(L'SPTR2445),AL3(SPTR2445) 001BA0 27548+TEXT CSECT 001BA0 C3C5D940D96BD9 27549+SPTR2446 DC C'CER R,R' 003C80 27550+TDSCDAT CSECT 003C80 27551+ DS 0F 003C80 07001BA0 27552+ DC AL1(L'SPTR2446),AL3(SPTR2446) 27553+* 004CB8 27554+TDSCTBL CSECT 04CB8 27555+T520TPTR EQU * 004CB8 00003C68 27556+ DC A(T520TDSC) enabled test 27557+* 014044 27558+TCODE CSECT 014048 27559+ DS 0D ensure double word alignment for test 014048 27560+T520 DS 0H 01650000 014048 90EC D00C 0000C 27561+ STM 14,12,12(13) SAVE REGISTERS 02950000 01404C 18CF 27562+ LR R12,R15 base register := entry address PAGE 504 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 14048 27563+ USING T520,R12 declare code base register 01404E 41B0 C026 1406E 27564+ LA R11,T520L load loop target to R11 014052 58F0 C0A0 140E8 27565+ L R15,=A(SAVETST) R15 := current save area 014056 50DF 0004 00004 27566+ ST R13,4(R15) set back pointer in current save area 01405A 182D 27567+ LR R2,R13 remember callers save area 01405C 18DF 27568+ LR R13,R15 setup current save area 01405E 50D2 0008 00008 27569+ ST R13,8(R2) set forw pointer in callers save area 00000 27570+ USING TDSC,R1 declare TDSC base register 014062 58F0 1008 00008 27571+ L R15,TLRCNT load local repeat count to R15 27572+* 27573 * 014066 7800 C0A4 140EC 27574 LE FR0,=E'1.0' 01406A 7820 C0A8 140F0 27575 LE FR2,=E'1.1' 27576 T520L REPINS CER,(FR0,FR2) repeat: CER FR0,FR2 27577+* 27578+* build from sublist &ALIST a comma separated string &ARGS 27579+* 27580+* 27581+* 27582+* 27583+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 27584+* this allows to transfer the repeat count from last TDSCGEN call 27585+* 27586+* 1406E 27587+T520L EQU * 27588+* 27589+* write a comment indicating what REPINS does (in case NOGEN in effect) 27590+* 27591+*,// REPINS: do 50 times: 27592+* 27593+* MNOTE requires that ' is doubled for expanded variables 27594+* thus build &MASTR as a copy of '&ARGS with ' doubled 27595+* 27596+* 27597+*,// CER FR0,FR2 27598+* 27599+* finally generate code: &ICNT copies of &CODE &ARGS 27600+* 01406E 3902 27601+ CER FR0,FR2 014070 3902 27602+ CER FR0,FR2 014072 3902 27603+ CER FR0,FR2 014074 3902 27604+ CER FR0,FR2 014076 3902 27605+ CER FR0,FR2 014078 3902 27606+ CER FR0,FR2 01407A 3902 27607+ CER FR0,FR2 01407C 3902 27608+ CER FR0,FR2 01407E 3902 27609+ CER FR0,FR2 014080 3902 27610+ CER FR0,FR2 014082 3902 27611+ CER FR0,FR2 014084 3902 27612+ CER FR0,FR2 014086 3902 27613+ CER FR0,FR2 014088 3902 27614+ CER FR0,FR2 01408A 3902 27615+ CER FR0,FR2 01408C 3902 27616+ CER FR0,FR2 01408E 3902 27617+ CER FR0,FR2 PAGE 505 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014090 3902 27618+ CER FR0,FR2 014092 3902 27619+ CER FR0,FR2 014094 3902 27620+ CER FR0,FR2 014096 3902 27621+ CER FR0,FR2 014098 3902 27622+ CER FR0,FR2 01409A 3902 27623+ CER FR0,FR2 01409C 3902 27624+ CER FR0,FR2 01409E 3902 27625+ CER FR0,FR2 0140A0 3902 27626+ CER FR0,FR2 0140A2 3902 27627+ CER FR0,FR2 0140A4 3902 27628+ CER FR0,FR2 0140A6 3902 27629+ CER FR0,FR2 0140A8 3902 27630+ CER FR0,FR2 0140AA 3902 27631+ CER FR0,FR2 0140AC 3902 27632+ CER FR0,FR2 0140AE 3902 27633+ CER FR0,FR2 0140B0 3902 27634+ CER FR0,FR2 0140B2 3902 27635+ CER FR0,FR2 0140B4 3902 27636+ CER FR0,FR2 0140B6 3902 27637+ CER FR0,FR2 0140B8 3902 27638+ CER FR0,FR2 0140BA 3902 27639+ CER FR0,FR2 0140BC 3902 27640+ CER FR0,FR2 0140BE 3902 27641+ CER FR0,FR2 0140C0 3902 27642+ CER FR0,FR2 0140C2 3902 27643+ CER FR0,FR2 0140C4 3902 27644+ CER FR0,FR2 0140C6 3902 27645+ CER FR0,FR2 0140C8 3902 27646+ CER FR0,FR2 0140CA 3902 27647+ CER FR0,FR2 0140CC 3902 27648+ CER FR0,FR2 0140CE 3902 27649+ CER FR0,FR2 0140D0 3902 27650+ CER FR0,FR2 27651+* 0140D2 06FB 27652 BCTR R15,R11 27653 TSIMRET 0140D4 58F0 C0A0 140E8 27654+ L R15,=A(SAVETST) R15 := current save area 0140D8 58DF 0004 00004 27655+ L R13,4(R15) get old save area back 0140DC 98EC D00C 0000C 27656+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0140E0 07FE 27657+ BR 14 RETURN 02000000 27658 TSIMEND 0140E8 27659+ LTORG 0140E8 00000458 27660 =A(SAVETST) 0140EC 41100000 27661 =E'1.0' 0140F0 4111999A 27662 =E'1.1' 140F4 27663+T520TEND EQU * 27664 * 27665 * Test 521 -- CE R,m --------------------------------------- 27666 * 27667 TSIMBEG T521,6000,50,1,C'CE R,m' 27668+* 003C84 27669+TDSCDAT CSECT 003C88 27670+ DS 0D 27671+* 003C88 000140F8 27672+T521TDSC DC A(T521) // TENTRY PAGE 506 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003C8C 0000010C 27673+ DC A(T521TEND-T521) // TLENGTH 003C90 00001770 27674+ DC F'6000' // TLRCNT 003C94 00000032 27675+ DC F'50' // TIGCNT 003C98 00000001 27676+ DC F'1' // TLTYPE 001BA7 27677+TEXT CSECT 001BA7 E3F5F2F1 27678+SPTR2457 DC C'T521' 003C9C 27679+TDSCDAT CSECT 003C9C 27680+ DS 0F 003C9C 04001BA7 27681+ DC AL1(L'SPTR2457),AL3(SPTR2457) 001BAB 27682+TEXT CSECT 001BAB C3C540D96B94 27683+SPTR2458 DC C'CE R,m' 003CA0 27684+TDSCDAT CSECT 003CA0 27685+ DS 0F 003CA0 06001BAB 27686+ DC AL1(L'SPTR2458),AL3(SPTR2458) 27687+* 004CBC 27688+TDSCTBL CSECT 04CBC 27689+T521TPTR EQU * 004CBC 00003C88 27690+ DC A(T521TDSC) enabled test 27691+* 0140F4 27692+TCODE CSECT 0140F8 27693+ DS 0D ensure double word alignment for test 0140F8 27694+T521 DS 0H 01650000 0140F8 90EC D00C 0000C 27695+ STM 14,12,12(13) SAVE REGISTERS 02950000 0140FC 18CF 27696+ LR R12,R15 base register := entry address 140F8 27697+ USING T521,R12 declare code base register 0140FE 41B0 C022 1411A 27698+ LA R11,T521L load loop target to R11 014102 58F0 C100 141F8 27699+ L R15,=A(SAVETST) R15 := current save area 014106 50DF 0004 00004 27700+ ST R13,4(R15) set back pointer in current save area 01410A 182D 27701+ LR R2,R13 remember callers save area 01410C 18DF 27702+ LR R13,R15 setup current save area 01410E 50D2 0008 00008 27703+ ST R13,8(R2) set forw pointer in callers save area 00000 27704+ USING TDSC,R1 declare TDSC base register 014112 58F0 1008 00008 27705+ L R15,TLRCNT load local repeat count to R15 27706+* 27707 * 014116 7800 C104 141FC 27708 LE FR0,=E'1.0' 27709 T521L REPINS CE,(FR0,=E'1.1') repeat: CE FR0,=E'1.1' 27710+* 27711+* build from sublist &ALIST a comma separated string &ARGS 27712+* 27713+* 27714+* 27715+* 27716+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 27717+* this allows to transfer the repeat count from last TDSCGEN call 27718+* 27719+* 1411A 27720+T521L EQU * 27721+* 27722+* write a comment indicating what REPINS does (in case NOGEN in effect) 27723+* 27724+*,// REPINS: do 50 times: 27725+* 27726+* MNOTE requires that ' is doubled for expanded variables 27727+* thus build &MASTR as a copy of '&ARGS with ' doubled PAGE 507 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 27728+* 27729+* 27730+*,// CE FR0,=E'1.1' 27731+* 27732+* finally generate code: &ICNT copies of &CODE &ARGS 27733+* 01411A 7900 C108 14200 27734+ CE FR0,=E'1.1' 01411E 7900 C108 14200 27735+ CE FR0,=E'1.1' 014122 7900 C108 14200 27736+ CE FR0,=E'1.1' 014126 7900 C108 14200 27737+ CE FR0,=E'1.1' 01412A 7900 C108 14200 27738+ CE FR0,=E'1.1' 01412E 7900 C108 14200 27739+ CE FR0,=E'1.1' 014132 7900 C108 14200 27740+ CE FR0,=E'1.1' 014136 7900 C108 14200 27741+ CE FR0,=E'1.1' 01413A 7900 C108 14200 27742+ CE FR0,=E'1.1' 01413E 7900 C108 14200 27743+ CE FR0,=E'1.1' 014142 7900 C108 14200 27744+ CE FR0,=E'1.1' 014146 7900 C108 14200 27745+ CE FR0,=E'1.1' 01414A 7900 C108 14200 27746+ CE FR0,=E'1.1' 01414E 7900 C108 14200 27747+ CE FR0,=E'1.1' 014152 7900 C108 14200 27748+ CE FR0,=E'1.1' 014156 7900 C108 14200 27749+ CE FR0,=E'1.1' 01415A 7900 C108 14200 27750+ CE FR0,=E'1.1' 01415E 7900 C108 14200 27751+ CE FR0,=E'1.1' 014162 7900 C108 14200 27752+ CE FR0,=E'1.1' 014166 7900 C108 14200 27753+ CE FR0,=E'1.1' 01416A 7900 C108 14200 27754+ CE FR0,=E'1.1' 01416E 7900 C108 14200 27755+ CE FR0,=E'1.1' 014172 7900 C108 14200 27756+ CE FR0,=E'1.1' 014176 7900 C108 14200 27757+ CE FR0,=E'1.1' 01417A 7900 C108 14200 27758+ CE FR0,=E'1.1' 01417E 7900 C108 14200 27759+ CE FR0,=E'1.1' 014182 7900 C108 14200 27760+ CE FR0,=E'1.1' 014186 7900 C108 14200 27761+ CE FR0,=E'1.1' 01418A 7900 C108 14200 27762+ CE FR0,=E'1.1' 01418E 7900 C108 14200 27763+ CE FR0,=E'1.1' 014192 7900 C108 14200 27764+ CE FR0,=E'1.1' 014196 7900 C108 14200 27765+ CE FR0,=E'1.1' 01419A 7900 C108 14200 27766+ CE FR0,=E'1.1' 01419E 7900 C108 14200 27767+ CE FR0,=E'1.1' 0141A2 7900 C108 14200 27768+ CE FR0,=E'1.1' 0141A6 7900 C108 14200 27769+ CE FR0,=E'1.1' 0141AA 7900 C108 14200 27770+ CE FR0,=E'1.1' 0141AE 7900 C108 14200 27771+ CE FR0,=E'1.1' 0141B2 7900 C108 14200 27772+ CE FR0,=E'1.1' 0141B6 7900 C108 14200 27773+ CE FR0,=E'1.1' 0141BA 7900 C108 14200 27774+ CE FR0,=E'1.1' 0141BE 7900 C108 14200 27775+ CE FR0,=E'1.1' 0141C2 7900 C108 14200 27776+ CE FR0,=E'1.1' 0141C6 7900 C108 14200 27777+ CE FR0,=E'1.1' 0141CA 7900 C108 14200 27778+ CE FR0,=E'1.1' 0141CE 7900 C108 14200 27779+ CE FR0,=E'1.1' 0141D2 7900 C108 14200 27780+ CE FR0,=E'1.1' 0141D6 7900 C108 14200 27781+ CE FR0,=E'1.1' 0141DA 7900 C108 14200 27782+ CE FR0,=E'1.1' PAGE 508 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0141DE 7900 C108 14200 27783+ CE FR0,=E'1.1' 27784+* 0141E2 06FB 27785 BCTR R15,R11 27786 TSIMRET 0141E4 58F0 C100 141F8 27787+ L R15,=A(SAVETST) R15 := current save area 0141E8 58DF 0004 00004 27788+ L R13,4(R15) get old save area back 0141EC 98EC D00C 0000C 27789+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0141F0 07FE 27790+ BR 14 RETURN 02000000 27791 TSIMEND 0141F8 27792+ LTORG 0141F8 00000458 27793 =A(SAVETST) 0141FC 41100000 27794 =E'1.0' 014200 4111999A 27795 =E'1.1' 14204 27796+T521TEND EQU * 27797 * 27798 * Test 522 -- AUR R,R -------------------------------------- 27799 * 27800 TSIMBEG T522,10000,50,9,C'AUR R,R' 27801+* 003CA4 27802+TDSCDAT CSECT 003CA8 27803+ DS 0D 27804+* 003CA8 00014208 27805+T522TDSC DC A(T522) // TENTRY 003CAC 000000A8 27806+ DC A(T522TEND-T522) // TLENGTH 003CB0 00002710 27807+ DC F'10000' // TLRCNT 003CB4 00000032 27808+ DC F'50' // TIGCNT 003CB8 00000009 27809+ DC F'9' // TLTYPE 001BB1 27810+TEXT CSECT 001BB1 E3F5F2F2 27811+SPTR2469 DC C'T522' 003CBC 27812+TDSCDAT CSECT 003CBC 27813+ DS 0F 003CBC 04001BB1 27814+ DC AL1(L'SPTR2469),AL3(SPTR2469) 001BB5 27815+TEXT CSECT 001BB5 C1E4D940D96BD9 27816+SPTR2470 DC C'AUR R,R' 003CC0 27817+TDSCDAT CSECT 003CC0 27818+ DS 0F 003CC0 07001BB5 27819+ DC AL1(L'SPTR2470),AL3(SPTR2470) 27820+* 004CC0 27821+TDSCTBL CSECT 04CC0 27822+T522TPTR EQU * 004CC0 00003CA8 27823+ DC A(T522TDSC) enabled test 27824+* 014204 27825+TCODE CSECT 014208 27826+ DS 0D ensure double word alignment for test 014208 27827+T522 DS 0H 01650000 014208 90EC D00C 0000C 27828+ STM 14,12,12(13) SAVE REGISTERS 02950000 01420C 18CF 27829+ LR R12,R15 base register := entry address 14208 27830+ USING T522,R12 declare code base register 01420E 41B0 C022 1422A 27831+ LA R11,T522L load loop target to R11 014212 58F0 C0A0 142A8 27832+ L R15,=A(SAVETST) R15 := current save area 014216 50DF 0004 00004 27833+ ST R13,4(R15) set back pointer in current save area 01421A 182D 27834+ LR R2,R13 remember callers save area 01421C 18DF 27835+ LR R13,R15 setup current save area 01421E 50D2 0008 00008 27836+ ST R13,8(R2) set forw pointer in callers save area 00000 27837+ USING TDSC,R1 declare TDSC base register PAGE 509 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014222 58F0 1008 00008 27838+ L R15,TLRCNT load local repeat count to R15 27839+* 27840 * 014226 7820 C09C 142A4 27841 LE FR2,T522V 01422A 7800 C0A4 142AC 27842 T522L LE FR0,=E'1234.1' 27843 REPINS AUR,(FR0,FR2) repeat: AUR FR0,FR2 27844+* 27845+* build from sublist &ALIST a comma separated string &ARGS 27846+* 27847+* 27848+* 27849+* 27850+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 27851+* this allows to transfer the repeat count from last TDSCGEN call 27852+* 27853+* 27854+* 27855+* write a comment indicating what REPINS does (in case NOGEN in effect) 27856+* 27857+*,// REPINS: do 50 times: 27858+* 27859+* MNOTE requires that ' is doubled for expanded variables 27860+* thus build &MASTR as a copy of '&ARGS with ' doubled 27861+* 27862+* 27863+*,// AUR FR0,FR2 27864+* 27865+* finally generate code: &ICNT copies of &CODE &ARGS 27866+* 01422E 3E02 27867+ AUR FR0,FR2 014230 3E02 27868+ AUR FR0,FR2 014232 3E02 27869+ AUR FR0,FR2 014234 3E02 27870+ AUR FR0,FR2 014236 3E02 27871+ AUR FR0,FR2 014238 3E02 27872+ AUR FR0,FR2 01423A 3E02 27873+ AUR FR0,FR2 01423C 3E02 27874+ AUR FR0,FR2 01423E 3E02 27875+ AUR FR0,FR2 014240 3E02 27876+ AUR FR0,FR2 014242 3E02 27877+ AUR FR0,FR2 014244 3E02 27878+ AUR FR0,FR2 014246 3E02 27879+ AUR FR0,FR2 014248 3E02 27880+ AUR FR0,FR2 01424A 3E02 27881+ AUR FR0,FR2 01424C 3E02 27882+ AUR FR0,FR2 01424E 3E02 27883+ AUR FR0,FR2 014250 3E02 27884+ AUR FR0,FR2 014252 3E02 27885+ AUR FR0,FR2 014254 3E02 27886+ AUR FR0,FR2 014256 3E02 27887+ AUR FR0,FR2 014258 3E02 27888+ AUR FR0,FR2 01425A 3E02 27889+ AUR FR0,FR2 01425C 3E02 27890+ AUR FR0,FR2 01425E 3E02 27891+ AUR FR0,FR2 014260 3E02 27892+ AUR FR0,FR2 PAGE 510 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014262 3E02 27893+ AUR FR0,FR2 014264 3E02 27894+ AUR FR0,FR2 014266 3E02 27895+ AUR FR0,FR2 014268 3E02 27896+ AUR FR0,FR2 01426A 3E02 27897+ AUR FR0,FR2 01426C 3E02 27898+ AUR FR0,FR2 01426E 3E02 27899+ AUR FR0,FR2 014270 3E02 27900+ AUR FR0,FR2 014272 3E02 27901+ AUR FR0,FR2 014274 3E02 27902+ AUR FR0,FR2 014276 3E02 27903+ AUR FR0,FR2 014278 3E02 27904+ AUR FR0,FR2 01427A 3E02 27905+ AUR FR0,FR2 01427C 3E02 27906+ AUR FR0,FR2 01427E 3E02 27907+ AUR FR0,FR2 014280 3E02 27908+ AUR FR0,FR2 014282 3E02 27909+ AUR FR0,FR2 014284 3E02 27910+ AUR FR0,FR2 014286 3E02 27911+ AUR FR0,FR2 014288 3E02 27912+ AUR FR0,FR2 01428A 3E02 27913+ AUR FR0,FR2 01428C 3E02 27914+ AUR FR0,FR2 01428E 3E02 27915+ AUR FR0,FR2 014290 3E02 27916+ AUR FR0,FR2 27917+* 014292 06FB 27918 BCTR R15,R11 27919 TSIMRET 014294 58F0 C0A0 142A8 27920+ L R15,=A(SAVETST) R15 := current save area 014298 58DF 0004 00004 27921+ L R13,4(R15) get old save area back 01429C 98EC D00C 0000C 27922+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0142A0 07FE 27923+ BR 14 RETURN 02000000 27924 * 0142A4 27925 DS 0E 0142A4 27926 T522V DS X'4E000001' 27927 TSIMEND 0142A8 27928+ LTORG 0142A8 00000458 27929 =A(SAVETST) 0142AC 434D219A 27930 =E'1234.1' 142B0 27931+T522TEND EQU * 27932 * 27933 * Test 523 -- HER R,R -------------------------------------- 27934 * 27935 TSIMBEG T523,16000,50,9,C'HER R,R' 27936+* 003CC4 27937+TDSCDAT CSECT 003CC8 27938+ DS 0D 27939+* 003CC8 000142B0 27940+T523TDSC DC A(T523) // TENTRY 003CCC 000000A0 27941+ DC A(T523TEND-T523) // TLENGTH 003CD0 00003E80 27942+ DC F'16000' // TLRCNT 003CD4 00000032 27943+ DC F'50' // TIGCNT 003CD8 00000009 27944+ DC F'9' // TLTYPE 001BBC 27945+TEXT CSECT 001BBC E3F5F2F3 27946+SPTR2481 DC C'T523' 003CDC 27947+TDSCDAT CSECT PAGE 511 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003CDC 27948+ DS 0F 003CDC 04001BBC 27949+ DC AL1(L'SPTR2481),AL3(SPTR2481) 001BC0 27950+TEXT CSECT 001BC0 C8C5D940D96BD9 27951+SPTR2482 DC C'HER R,R' 003CE0 27952+TDSCDAT CSECT 003CE0 27953+ DS 0F 003CE0 07001BC0 27954+ DC AL1(L'SPTR2482),AL3(SPTR2482) 27955+* 004CC4 27956+TDSCTBL CSECT 04CC4 27957+T523TPTR EQU * 004CC4 00003CC8 27958+ DC A(T523TDSC) enabled test 27959+* 0142B0 27960+TCODE CSECT 0142B0 27961+ DS 0D ensure double word alignment for test 0142B0 27962+T523 DS 0H 01650000 0142B0 90EC D00C 0000C 27963+ STM 14,12,12(13) SAVE REGISTERS 02950000 0142B4 18CF 27964+ LR R12,R15 base register := entry address 142B0 27965+ USING T523,R12 declare code base register 0142B6 41B0 C01E 142CE 27966+ LA R11,T523L load loop target to R11 0142BA 58F0 C098 14348 27967+ L R15,=A(SAVETST) R15 := current save area 0142BE 50DF 0004 00004 27968+ ST R13,4(R15) set back pointer in current save area 0142C2 182D 27969+ LR R2,R13 remember callers save area 0142C4 18DF 27970+ LR R13,R15 setup current save area 0142C6 50D2 0008 00008 27971+ ST R13,8(R2) set forw pointer in callers save area 00000 27972+ USING TDSC,R1 declare TDSC base register 0142CA 58F0 1008 00008 27973+ L R15,TLRCNT load local repeat count to R15 27974+* 27975 * inner loop logic: 27976 * load FR0 with 1111111111. 27977 * 'half' it 50 times 27978 * 0142CE 7800 C09C 1434C 27979 T523L LE FR0,=E'1111111111.0' 27980 REPINS HER,(FR0,FR0) repeat: HER FR0,FR0 27981+* 27982+* build from sublist &ALIST a comma separated string &ARGS 27983+* 27984+* 27985+* 27986+* 27987+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 27988+* this allows to transfer the repeat count from last TDSCGEN call 27989+* 27990+* 27991+* 27992+* write a comment indicating what REPINS does (in case NOGEN in effect) 27993+* 27994+*,// REPINS: do 50 times: 27995+* 27996+* MNOTE requires that ' is doubled for expanded variables 27997+* thus build &MASTR as a copy of '&ARGS with ' doubled 27998+* 27999+* 28000+*,// HER FR0,FR0 28001+* 28002+* finally generate code: &ICNT copies of &CODE &ARGS PAGE 512 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 28003+* 0142D2 3400 28004+ HER FR0,FR0 0142D4 3400 28005+ HER FR0,FR0 0142D6 3400 28006+ HER FR0,FR0 0142D8 3400 28007+ HER FR0,FR0 0142DA 3400 28008+ HER FR0,FR0 0142DC 3400 28009+ HER FR0,FR0 0142DE 3400 28010+ HER FR0,FR0 0142E0 3400 28011+ HER FR0,FR0 0142E2 3400 28012+ HER FR0,FR0 0142E4 3400 28013+ HER FR0,FR0 0142E6 3400 28014+ HER FR0,FR0 0142E8 3400 28015+ HER FR0,FR0 0142EA 3400 28016+ HER FR0,FR0 0142EC 3400 28017+ HER FR0,FR0 0142EE 3400 28018+ HER FR0,FR0 0142F0 3400 28019+ HER FR0,FR0 0142F2 3400 28020+ HER FR0,FR0 0142F4 3400 28021+ HER FR0,FR0 0142F6 3400 28022+ HER FR0,FR0 0142F8 3400 28023+ HER FR0,FR0 0142FA 3400 28024+ HER FR0,FR0 0142FC 3400 28025+ HER FR0,FR0 0142FE 3400 28026+ HER FR0,FR0 014300 3400 28027+ HER FR0,FR0 014302 3400 28028+ HER FR0,FR0 014304 3400 28029+ HER FR0,FR0 014306 3400 28030+ HER FR0,FR0 014308 3400 28031+ HER FR0,FR0 01430A 3400 28032+ HER FR0,FR0 01430C 3400 28033+ HER FR0,FR0 01430E 3400 28034+ HER FR0,FR0 014310 3400 28035+ HER FR0,FR0 014312 3400 28036+ HER FR0,FR0 014314 3400 28037+ HER FR0,FR0 014316 3400 28038+ HER FR0,FR0 014318 3400 28039+ HER FR0,FR0 01431A 3400 28040+ HER FR0,FR0 01431C 3400 28041+ HER FR0,FR0 01431E 3400 28042+ HER FR0,FR0 014320 3400 28043+ HER FR0,FR0 014322 3400 28044+ HER FR0,FR0 014324 3400 28045+ HER FR0,FR0 014326 3400 28046+ HER FR0,FR0 014328 3400 28047+ HER FR0,FR0 01432A 3400 28048+ HER FR0,FR0 01432C 3400 28049+ HER FR0,FR0 01432E 3400 28050+ HER FR0,FR0 014330 3400 28051+ HER FR0,FR0 014332 3400 28052+ HER FR0,FR0 014334 3400 28053+ HER FR0,FR0 28054+* 014336 06FB 28055 BCTR R15,R11 28056 TSIMRET 014338 58F0 C098 14348 28057+ L R15,=A(SAVETST) R15 := current save area PAGE 513 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01433C 58DF 0004 00004 28058+ L R13,4(R15) get old save area back 014340 98EC D00C 0000C 28059+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014344 07FE 28060+ BR 14 RETURN 02000000 28061 TSIMEND 014348 28062+ LTORG 014348 00000458 28063 =A(SAVETST) 01434C 48423A36 28064 =E'1111111111.0' 14350 28065+T523TEND EQU * 28066 * 28067 * Test 53x -- long float load/store ======================== 28068 * 28069 * Test 530 -- LDR R,R -------------------------------------- 28070 * 28071 TSIMBEG T530,9000,100,1,C'LDR R,R' 28072+* 003CE4 28073+TDSCDAT CSECT 003CE8 28074+ DS 0D 28075+* 003CE8 00014350 28076+T530TDSC DC A(T530) // TENTRY 003CEC 0000010C 28077+ DC A(T530TEND-T530) // TLENGTH 003CF0 00002328 28078+ DC F'9000' // TLRCNT 003CF4 00000064 28079+ DC F'100' // TIGCNT 003CF8 00000001 28080+ DC F'1' // TLTYPE 001BC7 28081+TEXT CSECT 001BC7 E3F5F3F0 28082+SPTR2493 DC C'T530' 003CFC 28083+TDSCDAT CSECT 003CFC 28084+ DS 0F 003CFC 04001BC7 28085+ DC AL1(L'SPTR2493),AL3(SPTR2493) 001BCB 28086+TEXT CSECT 001BCB D3C4D940D96BD9 28087+SPTR2494 DC C'LDR R,R' 003D00 28088+TDSCDAT CSECT 003D00 28089+ DS 0F 003D00 07001BCB 28090+ DC AL1(L'SPTR2494),AL3(SPTR2494) 28091+* 004CC8 28092+TDSCTBL CSECT 04CC8 28093+T530TPTR EQU * 004CC8 00003CE8 28094+ DC A(T530TDSC) enabled test 28095+* 014350 28096+TCODE CSECT 014350 28097+ DS 0D ensure double word alignment for test 014350 28098+T530 DS 0H 01650000 014350 90EC D00C 0000C 28099+ STM 14,12,12(13) SAVE REGISTERS 02950000 014354 18CF 28100+ LR R12,R15 base register := entry address 14350 28101+ USING T530,R12 declare code base register 014356 41B0 C022 14372 28102+ LA R11,T530L load loop target to R11 01435A 58F0 C108 14458 28103+ L R15,=A(SAVETST) R15 := current save area 01435E 50DF 0004 00004 28104+ ST R13,4(R15) set back pointer in current save area 014362 182D 28105+ LR R2,R13 remember callers save area 014364 18DF 28106+ LR R13,R15 setup current save area 014366 50D2 0008 00008 28107+ ST R13,8(R2) set forw pointer in callers save area 00000 28108+ USING TDSC,R1 declare TDSC base register 01436A 58F0 1008 00008 28109+ L R15,TLRCNT load local repeat count to R15 28110+* 28111 * 01436E 6820 C100 14450 28112 LD FR2,=D'1.1' PAGE 514 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 28113 T530L REPINS LDR,(FR0,FR2) repeat: LDR FR0,FR2 28114+* 28115+* build from sublist &ALIST a comma separated string &ARGS 28116+* 28117+* 28118+* 28119+* 28120+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 28121+* this allows to transfer the repeat count from last TDSCGEN call 28122+* 28123+* 14372 28124+T530L EQU * 28125+* 28126+* write a comment indicating what REPINS does (in case NOGEN in effect) 28127+* 28128+*,// REPINS: do 100 times: 28129+* 28130+* MNOTE requires that ' is doubled for expanded variables 28131+* thus build &MASTR as a copy of '&ARGS with ' doubled 28132+* 28133+* 28134+*,// LDR FR0,FR2 28135+* 28136+* finally generate code: &ICNT copies of &CODE &ARGS 28137+* 014372 2802 28138+ LDR FR0,FR2 014374 2802 28139+ LDR FR0,FR2 014376 2802 28140+ LDR FR0,FR2 014378 2802 28141+ LDR FR0,FR2 01437A 2802 28142+ LDR FR0,FR2 01437C 2802 28143+ LDR FR0,FR2 01437E 2802 28144+ LDR FR0,FR2 014380 2802 28145+ LDR FR0,FR2 014382 2802 28146+ LDR FR0,FR2 014384 2802 28147+ LDR FR0,FR2 014386 2802 28148+ LDR FR0,FR2 014388 2802 28149+ LDR FR0,FR2 01438A 2802 28150+ LDR FR0,FR2 01438C 2802 28151+ LDR FR0,FR2 01438E 2802 28152+ LDR FR0,FR2 014390 2802 28153+ LDR FR0,FR2 014392 2802 28154+ LDR FR0,FR2 014394 2802 28155+ LDR FR0,FR2 014396 2802 28156+ LDR FR0,FR2 014398 2802 28157+ LDR FR0,FR2 01439A 2802 28158+ LDR FR0,FR2 01439C 2802 28159+ LDR FR0,FR2 01439E 2802 28160+ LDR FR0,FR2 0143A0 2802 28161+ LDR FR0,FR2 0143A2 2802 28162+ LDR FR0,FR2 0143A4 2802 28163+ LDR FR0,FR2 0143A6 2802 28164+ LDR FR0,FR2 0143A8 2802 28165+ LDR FR0,FR2 0143AA 2802 28166+ LDR FR0,FR2 0143AC 2802 28167+ LDR FR0,FR2 PAGE 515 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0143AE 2802 28168+ LDR FR0,FR2 0143B0 2802 28169+ LDR FR0,FR2 0143B2 2802 28170+ LDR FR0,FR2 0143B4 2802 28171+ LDR FR0,FR2 0143B6 2802 28172+ LDR FR0,FR2 0143B8 2802 28173+ LDR FR0,FR2 0143BA 2802 28174+ LDR FR0,FR2 0143BC 2802 28175+ LDR FR0,FR2 0143BE 2802 28176+ LDR FR0,FR2 0143C0 2802 28177+ LDR FR0,FR2 0143C2 2802 28178+ LDR FR0,FR2 0143C4 2802 28179+ LDR FR0,FR2 0143C6 2802 28180+ LDR FR0,FR2 0143C8 2802 28181+ LDR FR0,FR2 0143CA 2802 28182+ LDR FR0,FR2 0143CC 2802 28183+ LDR FR0,FR2 0143CE 2802 28184+ LDR FR0,FR2 0143D0 2802 28185+ LDR FR0,FR2 0143D2 2802 28186+ LDR FR0,FR2 0143D4 2802 28187+ LDR FR0,FR2 0143D6 2802 28188+ LDR FR0,FR2 0143D8 2802 28189+ LDR FR0,FR2 0143DA 2802 28190+ LDR FR0,FR2 0143DC 2802 28191+ LDR FR0,FR2 0143DE 2802 28192+ LDR FR0,FR2 0143E0 2802 28193+ LDR FR0,FR2 0143E2 2802 28194+ LDR FR0,FR2 0143E4 2802 28195+ LDR FR0,FR2 0143E6 2802 28196+ LDR FR0,FR2 0143E8 2802 28197+ LDR FR0,FR2 0143EA 2802 28198+ LDR FR0,FR2 0143EC 2802 28199+ LDR FR0,FR2 0143EE 2802 28200+ LDR FR0,FR2 0143F0 2802 28201+ LDR FR0,FR2 0143F2 2802 28202+ LDR FR0,FR2 0143F4 2802 28203+ LDR FR0,FR2 0143F6 2802 28204+ LDR FR0,FR2 0143F8 2802 28205+ LDR FR0,FR2 0143FA 2802 28206+ LDR FR0,FR2 0143FC 2802 28207+ LDR FR0,FR2 0143FE 2802 28208+ LDR FR0,FR2 014400 2802 28209+ LDR FR0,FR2 014402 2802 28210+ LDR FR0,FR2 014404 2802 28211+ LDR FR0,FR2 014406 2802 28212+ LDR FR0,FR2 014408 2802 28213+ LDR FR0,FR2 01440A 2802 28214+ LDR FR0,FR2 01440C 2802 28215+ LDR FR0,FR2 01440E 2802 28216+ LDR FR0,FR2 014410 2802 28217+ LDR FR0,FR2 014412 2802 28218+ LDR FR0,FR2 014414 2802 28219+ LDR FR0,FR2 014416 2802 28220+ LDR FR0,FR2 014418 2802 28221+ LDR FR0,FR2 01441A 2802 28222+ LDR FR0,FR2 PAGE 516 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01441C 2802 28223+ LDR FR0,FR2 01441E 2802 28224+ LDR FR0,FR2 014420 2802 28225+ LDR FR0,FR2 014422 2802 28226+ LDR FR0,FR2 014424 2802 28227+ LDR FR0,FR2 014426 2802 28228+ LDR FR0,FR2 014428 2802 28229+ LDR FR0,FR2 01442A 2802 28230+ LDR FR0,FR2 01442C 2802 28231+ LDR FR0,FR2 01442E 2802 28232+ LDR FR0,FR2 014430 2802 28233+ LDR FR0,FR2 014432 2802 28234+ LDR FR0,FR2 014434 2802 28235+ LDR FR0,FR2 014436 2802 28236+ LDR FR0,FR2 014438 2802 28237+ LDR FR0,FR2 28238+* 01443A 06FB 28239 BCTR R15,R11 28240 TSIMRET 01443C 58F0 C108 14458 28241+ L R15,=A(SAVETST) R15 := current save area 014440 58DF 0004 00004 28242+ L R13,4(R15) get old save area back 014444 98EC D00C 0000C 28243+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014448 07FE 28244+ BR 14 RETURN 02000000 28245 TSIMEND 014450 28246+ LTORG 014450 411199999999999A 28247 =D'1.1' 014458 00000458 28248 =A(SAVETST) 1445C 28249+T530TEND EQU * 28250 * 28251 * Test 531 -- LD R,m --------------------------------------- 28252 * 28253 TSIMBEG T531,10000,50,1,C'LD R,m' 28254+* 003D04 28255+TDSCDAT CSECT 003D08 28256+ DS 0D 28257+* 003D08 00014460 28258+T531TDSC DC A(T531) // TENTRY 003D0C 00000104 28259+ DC A(T531TEND-T531) // TLENGTH 003D10 00002710 28260+ DC F'10000' // TLRCNT 003D14 00000032 28261+ DC F'50' // TIGCNT 003D18 00000001 28262+ DC F'1' // TLTYPE 001BD2 28263+TEXT CSECT 001BD2 E3F5F3F1 28264+SPTR2505 DC C'T531' 003D1C 28265+TDSCDAT CSECT 003D1C 28266+ DS 0F 003D1C 04001BD2 28267+ DC AL1(L'SPTR2505),AL3(SPTR2505) 001BD6 28268+TEXT CSECT 001BD6 D3C440D96B94 28269+SPTR2506 DC C'LD R,m' 003D20 28270+TDSCDAT CSECT 003D20 28271+ DS 0F 003D20 06001BD6 28272+ DC AL1(L'SPTR2506),AL3(SPTR2506) 28273+* 004CCC 28274+TDSCTBL CSECT 04CCC 28275+T531TPTR EQU * 004CCC 00003D08 28276+ DC A(T531TDSC) enabled test 28277+* PAGE 517 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01445C 28278+TCODE CSECT 014460 28279+ DS 0D ensure double word alignment for test 014460 28280+T531 DS 0H 01650000 014460 90EC D00C 0000C 28281+ STM 14,12,12(13) SAVE REGISTERS 02950000 014464 18CF 28282+ LR R12,R15 base register := entry address 14460 28283+ USING T531,R12 declare code base register 014466 41B0 C01E 1447E 28284+ LA R11,T531L load loop target to R11 01446A 58F0 C100 14560 28285+ L R15,=A(SAVETST) R15 := current save area 01446E 50DF 0004 00004 28286+ ST R13,4(R15) set back pointer in current save area 014472 182D 28287+ LR R2,R13 remember callers save area 014474 18DF 28288+ LR R13,R15 setup current save area 014476 50D2 0008 00008 28289+ ST R13,8(R2) set forw pointer in callers save area 00000 28290+ USING TDSC,R1 declare TDSC base register 01447A 58F0 1008 00008 28291+ L R15,TLRCNT load local repeat count to R15 28292+* 28293 * 28294 T531L REPINS LD,(FR0,=D'1.0') repeat: LD FR0,=D'1.0' 28295+* 28296+* build from sublist &ALIST a comma separated string &ARGS 28297+* 28298+* 28299+* 28300+* 28301+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 28302+* this allows to transfer the repeat count from last TDSCGEN call 28303+* 28304+* 1447E 28305+T531L EQU * 28306+* 28307+* write a comment indicating what REPINS does (in case NOGEN in effect) 28308+* 28309+*,// REPINS: do 50 times: 28310+* 28311+* MNOTE requires that ' is doubled for expanded variables 28312+* thus build &MASTR as a copy of '&ARGS with ' doubled 28313+* 28314+* 28315+*,// LD FR0,=D'1.0' 28316+* 28317+* finally generate code: &ICNT copies of &CODE &ARGS 28318+* 01447E 6800 C0F8 14558 28319+ LD FR0,=D'1.0' 014482 6800 C0F8 14558 28320+ LD FR0,=D'1.0' 014486 6800 C0F8 14558 28321+ LD FR0,=D'1.0' 01448A 6800 C0F8 14558 28322+ LD FR0,=D'1.0' 01448E 6800 C0F8 14558 28323+ LD FR0,=D'1.0' 014492 6800 C0F8 14558 28324+ LD FR0,=D'1.0' 014496 6800 C0F8 14558 28325+ LD FR0,=D'1.0' 01449A 6800 C0F8 14558 28326+ LD FR0,=D'1.0' 01449E 6800 C0F8 14558 28327+ LD FR0,=D'1.0' 0144A2 6800 C0F8 14558 28328+ LD FR0,=D'1.0' 0144A6 6800 C0F8 14558 28329+ LD FR0,=D'1.0' 0144AA 6800 C0F8 14558 28330+ LD FR0,=D'1.0' 0144AE 6800 C0F8 14558 28331+ LD FR0,=D'1.0' 0144B2 6800 C0F8 14558 28332+ LD FR0,=D'1.0' PAGE 518 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0144B6 6800 C0F8 14558 28333+ LD FR0,=D'1.0' 0144BA 6800 C0F8 14558 28334+ LD FR0,=D'1.0' 0144BE 6800 C0F8 14558 28335+ LD FR0,=D'1.0' 0144C2 6800 C0F8 14558 28336+ LD FR0,=D'1.0' 0144C6 6800 C0F8 14558 28337+ LD FR0,=D'1.0' 0144CA 6800 C0F8 14558 28338+ LD FR0,=D'1.0' 0144CE 6800 C0F8 14558 28339+ LD FR0,=D'1.0' 0144D2 6800 C0F8 14558 28340+ LD FR0,=D'1.0' 0144D6 6800 C0F8 14558 28341+ LD FR0,=D'1.0' 0144DA 6800 C0F8 14558 28342+ LD FR0,=D'1.0' 0144DE 6800 C0F8 14558 28343+ LD FR0,=D'1.0' 0144E2 6800 C0F8 14558 28344+ LD FR0,=D'1.0' 0144E6 6800 C0F8 14558 28345+ LD FR0,=D'1.0' 0144EA 6800 C0F8 14558 28346+ LD FR0,=D'1.0' 0144EE 6800 C0F8 14558 28347+ LD FR0,=D'1.0' 0144F2 6800 C0F8 14558 28348+ LD FR0,=D'1.0' 0144F6 6800 C0F8 14558 28349+ LD FR0,=D'1.0' 0144FA 6800 C0F8 14558 28350+ LD FR0,=D'1.0' 0144FE 6800 C0F8 14558 28351+ LD FR0,=D'1.0' 014502 6800 C0F8 14558 28352+ LD FR0,=D'1.0' 014506 6800 C0F8 14558 28353+ LD FR0,=D'1.0' 01450A 6800 C0F8 14558 28354+ LD FR0,=D'1.0' 01450E 6800 C0F8 14558 28355+ LD FR0,=D'1.0' 014512 6800 C0F8 14558 28356+ LD FR0,=D'1.0' 014516 6800 C0F8 14558 28357+ LD FR0,=D'1.0' 01451A 6800 C0F8 14558 28358+ LD FR0,=D'1.0' 01451E 6800 C0F8 14558 28359+ LD FR0,=D'1.0' 014522 6800 C0F8 14558 28360+ LD FR0,=D'1.0' 014526 6800 C0F8 14558 28361+ LD FR0,=D'1.0' 01452A 6800 C0F8 14558 28362+ LD FR0,=D'1.0' 01452E 6800 C0F8 14558 28363+ LD FR0,=D'1.0' 014532 6800 C0F8 14558 28364+ LD FR0,=D'1.0' 014536 6800 C0F8 14558 28365+ LD FR0,=D'1.0' 01453A 6800 C0F8 14558 28366+ LD FR0,=D'1.0' 01453E 6800 C0F8 14558 28367+ LD FR0,=D'1.0' 014542 6800 C0F8 14558 28368+ LD FR0,=D'1.0' 28369+* 014546 06FB 28370 BCTR R15,R11 28371 TSIMRET 014548 58F0 C100 14560 28372+ L R15,=A(SAVETST) R15 := current save area 01454C 58DF 0004 00004 28373+ L R13,4(R15) get old save area back 014550 98EC D00C 0000C 28374+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014554 07FE 28375+ BR 14 RETURN 02000000 28376 TSIMEND 014558 28377+ LTORG 014558 4110000000000000 28378 =D'1.0' 014560 00000458 28379 =A(SAVETST) 14564 28380+T531TEND EQU * 28381 * 28382 * Test 532 -- LD R,m (unal) -------------------------------- 28383 * 28384 TSIMBEG T532,10000,50,1,C'LD R,m (unal)' 28385+* 003D24 28386+TDSCDAT CSECT 003D28 28387+ DS 0D PAGE 519 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 28388+* 003D28 00014568 28389+T532TDSC DC A(T532) // TENTRY 003D2C 00000114 28390+ DC A(T532TEND-T532) // TLENGTH 003D30 00002710 28391+ DC F'10000' // TLRCNT 003D34 00000032 28392+ DC F'50' // TIGCNT 003D38 00000001 28393+ DC F'1' // TLTYPE 001BDC 28394+TEXT CSECT 001BDC E3F5F3F2 28395+SPTR2517 DC C'T532' 003D3C 28396+TDSCDAT CSECT 003D3C 28397+ DS 0F 003D3C 04001BDC 28398+ DC AL1(L'SPTR2517),AL3(SPTR2517) 001BE0 28399+TEXT CSECT 001BE0 D3C440D96B94404D 28400+SPTR2518 DC C'LD R,m (unal)' 003D40 28401+TDSCDAT CSECT 003D40 28402+ DS 0F 003D40 0D001BE0 28403+ DC AL1(L'SPTR2518),AL3(SPTR2518) 28404+* 004CD0 28405+TDSCTBL CSECT 04CD0 28406+T532TPTR EQU * 004CD0 00003D28 28407+ DC A(T532TDSC) enabled test 28408+* 014564 28409+TCODE CSECT 014568 28410+ DS 0D ensure double word alignment for test 014568 28411+T532 DS 0H 01650000 014568 90EC D00C 0000C 28412+ STM 14,12,12(13) SAVE REGISTERS 02950000 01456C 18CF 28413+ LR R12,R15 base register := entry address 14568 28414+ USING T532,R12 declare code base register 01456E 41B0 C022 1458A 28415+ LA R11,T532L load loop target to R11 014572 58F0 C110 14678 28416+ L R15,=A(SAVETST) R15 := current save area 014576 50DF 0004 00004 28417+ ST R13,4(R15) set back pointer in current save area 01457A 182D 28418+ LR R2,R13 remember callers save area 01457C 18DF 28419+ LR R13,R15 setup current save area 01457E 50D2 0008 00008 28420+ ST R13,8(R2) set forw pointer in callers save area 00000 28421+ USING TDSC,R1 declare TDSC base register 014582 58F0 1008 00008 28422+ L R15,TLRCNT load local repeat count to R15 28423+* 28424 * 014586 4130 C100 14668 28425 LA R3,T532V 28426 T532L REPINS LD,(FR0,1(R3)) repeat: LD FR0,1(R3)' 28427+* 28428+* build from sublist &ALIST a comma separated string &ARGS 28429+* 28430+* 28431+* 28432+* 28433+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 28434+* this allows to transfer the repeat count from last TDSCGEN call 28435+* 28436+* 1458A 28437+T532L EQU * 28438+* 28439+* write a comment indicating what REPINS does (in case NOGEN in effect) 28440+* 28441+*,// REPINS: do 50 times: 28442+* PAGE 520 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 28443+* MNOTE requires that ' is doubled for expanded variables 28444+* thus build &MASTR as a copy of '&ARGS with ' doubled 28445+* 28446+* 28447+*,// LD FR0,1(R3) 28448+* 28449+* finally generate code: &ICNT copies of &CODE &ARGS 28450+* 01458A 6803 0001 00001 28451+ LD FR0,1(R3) 01458E 6803 0001 00001 28452+ LD FR0,1(R3) 014592 6803 0001 00001 28453+ LD FR0,1(R3) 014596 6803 0001 00001 28454+ LD FR0,1(R3) 01459A 6803 0001 00001 28455+ LD FR0,1(R3) 01459E 6803 0001 00001 28456+ LD FR0,1(R3) 0145A2 6803 0001 00001 28457+ LD FR0,1(R3) 0145A6 6803 0001 00001 28458+ LD FR0,1(R3) 0145AA 6803 0001 00001 28459+ LD FR0,1(R3) 0145AE 6803 0001 00001 28460+ LD FR0,1(R3) 0145B2 6803 0001 00001 28461+ LD FR0,1(R3) 0145B6 6803 0001 00001 28462+ LD FR0,1(R3) 0145BA 6803 0001 00001 28463+ LD FR0,1(R3) 0145BE 6803 0001 00001 28464+ LD FR0,1(R3) 0145C2 6803 0001 00001 28465+ LD FR0,1(R3) 0145C6 6803 0001 00001 28466+ LD FR0,1(R3) 0145CA 6803 0001 00001 28467+ LD FR0,1(R3) 0145CE 6803 0001 00001 28468+ LD FR0,1(R3) 0145D2 6803 0001 00001 28469+ LD FR0,1(R3) 0145D6 6803 0001 00001 28470+ LD FR0,1(R3) 0145DA 6803 0001 00001 28471+ LD FR0,1(R3) 0145DE 6803 0001 00001 28472+ LD FR0,1(R3) 0145E2 6803 0001 00001 28473+ LD FR0,1(R3) 0145E6 6803 0001 00001 28474+ LD FR0,1(R3) 0145EA 6803 0001 00001 28475+ LD FR0,1(R3) 0145EE 6803 0001 00001 28476+ LD FR0,1(R3) 0145F2 6803 0001 00001 28477+ LD FR0,1(R3) 0145F6 6803 0001 00001 28478+ LD FR0,1(R3) 0145FA 6803 0001 00001 28479+ LD FR0,1(R3) 0145FE 6803 0001 00001 28480+ LD FR0,1(R3) 014602 6803 0001 00001 28481+ LD FR0,1(R3) 014606 6803 0001 00001 28482+ LD FR0,1(R3) 01460A 6803 0001 00001 28483+ LD FR0,1(R3) 01460E 6803 0001 00001 28484+ LD FR0,1(R3) 014612 6803 0001 00001 28485+ LD FR0,1(R3) 014616 6803 0001 00001 28486+ LD FR0,1(R3) 01461A 6803 0001 00001 28487+ LD FR0,1(R3) 01461E 6803 0001 00001 28488+ LD FR0,1(R3) 014622 6803 0001 00001 28489+ LD FR0,1(R3) 014626 6803 0001 00001 28490+ LD FR0,1(R3) 01462A 6803 0001 00001 28491+ LD FR0,1(R3) 01462E 6803 0001 00001 28492+ LD FR0,1(R3) 014632 6803 0001 00001 28493+ LD FR0,1(R3) 014636 6803 0001 00001 28494+ LD FR0,1(R3) 01463A 6803 0001 00001 28495+ LD FR0,1(R3) 01463E 6803 0001 00001 28496+ LD FR0,1(R3) 014642 6803 0001 00001 28497+ LD FR0,1(R3) PAGE 521 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014646 6803 0001 00001 28498+ LD FR0,1(R3) 01464A 6803 0001 00001 28499+ LD FR0,1(R3) 01464E 6803 0001 00001 28500+ LD FR0,1(R3) 28501+* 014652 06FB 28502 BCTR R15,R11 28503 TSIMRET 014654 58F0 C110 14678 28504+ L R15,=A(SAVETST) R15 := current save area 014658 58DF 0004 00004 28505+ L R13,4(R15) get old save area back 01465C 98EC D00C 0000C 28506+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014660 07FE 28507+ BR 14 RETURN 02000000 28508 * 014668 28509 DS 0D 014668 4E4E4E4E4E4E4E4E 28510 T532V DC 3X'4E4E4E4E' target for unaligned load 28511 TSIMEND 014678 28512+ LTORG 014678 00000458 28513 =A(SAVETST) 1467C 28514+T532TEND EQU * 28515 * 28516 * Test 533 -- LTDR R,R ------------------------------------- 28517 * 28518 TSIMBEG T533,10000,100,1,C'LTDR R,R' 28519+* 003D44 28520+TDSCDAT CSECT 003D48 28521+ DS 0D 28522+* 003D48 00014680 28523+T533TDSC DC A(T533) // TENTRY 003D4C 0000010C 28524+ DC A(T533TEND-T533) // TLENGTH 003D50 00002710 28525+ DC F'10000' // TLRCNT 003D54 00000064 28526+ DC F'100' // TIGCNT 003D58 00000001 28527+ DC F'1' // TLTYPE 001BED 28528+TEXT CSECT 001BED E3F5F3F3 28529+SPTR2529 DC C'T533' 003D5C 28530+TDSCDAT CSECT 003D5C 28531+ DS 0F 003D5C 04001BED 28532+ DC AL1(L'SPTR2529),AL3(SPTR2529) 001BF1 28533+TEXT CSECT 001BF1 D3E3C4D940D96BD9 28534+SPTR2530 DC C'LTDR R,R' 003D60 28535+TDSCDAT CSECT 003D60 28536+ DS 0F 003D60 08001BF1 28537+ DC AL1(L'SPTR2530),AL3(SPTR2530) 28538+* 004CD4 28539+TDSCTBL CSECT 04CD4 28540+T533TPTR EQU * 004CD4 00003D48 28541+ DC A(T533TDSC) enabled test 28542+* 01467C 28543+TCODE CSECT 014680 28544+ DS 0D ensure double word alignment for test 014680 28545+T533 DS 0H 01650000 014680 90EC D00C 0000C 28546+ STM 14,12,12(13) SAVE REGISTERS 02950000 014684 18CF 28547+ LR R12,R15 base register := entry address 14680 28548+ USING T533,R12 declare code base register 014686 41B0 C022 146A2 28549+ LA R11,T533L load loop target to R11 01468A 58F0 C108 14788 28550+ L R15,=A(SAVETST) R15 := current save area 01468E 50DF 0004 00004 28551+ ST R13,4(R15) set back pointer in current save area 014692 182D 28552+ LR R2,R13 remember callers save area PAGE 522 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014694 18DF 28553+ LR R13,R15 setup current save area 014696 50D2 0008 00008 28554+ ST R13,8(R2) set forw pointer in callers save area 00000 28555+ USING TDSC,R1 declare TDSC base register 01469A 58F0 1008 00008 28556+ L R15,TLRCNT load local repeat count to R15 28557+* 28558 * 01469E 6820 C100 14780 28559 LD FR2,=D'1.0' 28560 T533L REPINS LTDR,(FR0,FR2) repeat: LTDR FR0,FR2 28561+* 28562+* build from sublist &ALIST a comma separated string &ARGS 28563+* 28564+* 28565+* 28566+* 28567+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 28568+* this allows to transfer the repeat count from last TDSCGEN call 28569+* 28570+* 146A2 28571+T533L EQU * 28572+* 28573+* write a comment indicating what REPINS does (in case NOGEN in effect) 28574+* 28575+*,// REPINS: do 100 times: 28576+* 28577+* MNOTE requires that ' is doubled for expanded variables 28578+* thus build &MASTR as a copy of '&ARGS with ' doubled 28579+* 28580+* 28581+*,// LTDR FR0,FR2 28582+* 28583+* finally generate code: &ICNT copies of &CODE &ARGS 28584+* 0146A2 2202 28585+ LTDR FR0,FR2 0146A4 2202 28586+ LTDR FR0,FR2 0146A6 2202 28587+ LTDR FR0,FR2 0146A8 2202 28588+ LTDR FR0,FR2 0146AA 2202 28589+ LTDR FR0,FR2 0146AC 2202 28590+ LTDR FR0,FR2 0146AE 2202 28591+ LTDR FR0,FR2 0146B0 2202 28592+ LTDR FR0,FR2 0146B2 2202 28593+ LTDR FR0,FR2 0146B4 2202 28594+ LTDR FR0,FR2 0146B6 2202 28595+ LTDR FR0,FR2 0146B8 2202 28596+ LTDR FR0,FR2 0146BA 2202 28597+ LTDR FR0,FR2 0146BC 2202 28598+ LTDR FR0,FR2 0146BE 2202 28599+ LTDR FR0,FR2 0146C0 2202 28600+ LTDR FR0,FR2 0146C2 2202 28601+ LTDR FR0,FR2 0146C4 2202 28602+ LTDR FR0,FR2 0146C6 2202 28603+ LTDR FR0,FR2 0146C8 2202 28604+ LTDR FR0,FR2 0146CA 2202 28605+ LTDR FR0,FR2 0146CC 2202 28606+ LTDR FR0,FR2 0146CE 2202 28607+ LTDR FR0,FR2 PAGE 523 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0146D0 2202 28608+ LTDR FR0,FR2 0146D2 2202 28609+ LTDR FR0,FR2 0146D4 2202 28610+ LTDR FR0,FR2 0146D6 2202 28611+ LTDR FR0,FR2 0146D8 2202 28612+ LTDR FR0,FR2 0146DA 2202 28613+ LTDR FR0,FR2 0146DC 2202 28614+ LTDR FR0,FR2 0146DE 2202 28615+ LTDR FR0,FR2 0146E0 2202 28616+ LTDR FR0,FR2 0146E2 2202 28617+ LTDR FR0,FR2 0146E4 2202 28618+ LTDR FR0,FR2 0146E6 2202 28619+ LTDR FR0,FR2 0146E8 2202 28620+ LTDR FR0,FR2 0146EA 2202 28621+ LTDR FR0,FR2 0146EC 2202 28622+ LTDR FR0,FR2 0146EE 2202 28623+ LTDR FR0,FR2 0146F0 2202 28624+ LTDR FR0,FR2 0146F2 2202 28625+ LTDR FR0,FR2 0146F4 2202 28626+ LTDR FR0,FR2 0146F6 2202 28627+ LTDR FR0,FR2 0146F8 2202 28628+ LTDR FR0,FR2 0146FA 2202 28629+ LTDR FR0,FR2 0146FC 2202 28630+ LTDR FR0,FR2 0146FE 2202 28631+ LTDR FR0,FR2 014700 2202 28632+ LTDR FR0,FR2 014702 2202 28633+ LTDR FR0,FR2 014704 2202 28634+ LTDR FR0,FR2 014706 2202 28635+ LTDR FR0,FR2 014708 2202 28636+ LTDR FR0,FR2 01470A 2202 28637+ LTDR FR0,FR2 01470C 2202 28638+ LTDR FR0,FR2 01470E 2202 28639+ LTDR FR0,FR2 014710 2202 28640+ LTDR FR0,FR2 014712 2202 28641+ LTDR FR0,FR2 014714 2202 28642+ LTDR FR0,FR2 014716 2202 28643+ LTDR FR0,FR2 014718 2202 28644+ LTDR FR0,FR2 01471A 2202 28645+ LTDR FR0,FR2 01471C 2202 28646+ LTDR FR0,FR2 01471E 2202 28647+ LTDR FR0,FR2 014720 2202 28648+ LTDR FR0,FR2 014722 2202 28649+ LTDR FR0,FR2 014724 2202 28650+ LTDR FR0,FR2 014726 2202 28651+ LTDR FR0,FR2 014728 2202 28652+ LTDR FR0,FR2 01472A 2202 28653+ LTDR FR0,FR2 01472C 2202 28654+ LTDR FR0,FR2 01472E 2202 28655+ LTDR FR0,FR2 014730 2202 28656+ LTDR FR0,FR2 014732 2202 28657+ LTDR FR0,FR2 014734 2202 28658+ LTDR FR0,FR2 014736 2202 28659+ LTDR FR0,FR2 014738 2202 28660+ LTDR FR0,FR2 01473A 2202 28661+ LTDR FR0,FR2 01473C 2202 28662+ LTDR FR0,FR2 PAGE 524 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01473E 2202 28663+ LTDR FR0,FR2 014740 2202 28664+ LTDR FR0,FR2 014742 2202 28665+ LTDR FR0,FR2 014744 2202 28666+ LTDR FR0,FR2 014746 2202 28667+ LTDR FR0,FR2 014748 2202 28668+ LTDR FR0,FR2 01474A 2202 28669+ LTDR FR0,FR2 01474C 2202 28670+ LTDR FR0,FR2 01474E 2202 28671+ LTDR FR0,FR2 014750 2202 28672+ LTDR FR0,FR2 014752 2202 28673+ LTDR FR0,FR2 014754 2202 28674+ LTDR FR0,FR2 014756 2202 28675+ LTDR FR0,FR2 014758 2202 28676+ LTDR FR0,FR2 01475A 2202 28677+ LTDR FR0,FR2 01475C 2202 28678+ LTDR FR0,FR2 01475E 2202 28679+ LTDR FR0,FR2 014760 2202 28680+ LTDR FR0,FR2 014762 2202 28681+ LTDR FR0,FR2 014764 2202 28682+ LTDR FR0,FR2 014766 2202 28683+ LTDR FR0,FR2 014768 2202 28684+ LTDR FR0,FR2 28685+* 01476A 06FB 28686 BCTR R15,R11 28687 TSIMRET 01476C 58F0 C108 14788 28688+ L R15,=A(SAVETST) R15 := current save area 014770 58DF 0004 00004 28689+ L R13,4(R15) get old save area back 014774 98EC D00C 0000C 28690+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014778 07FE 28691+ BR 14 RETURN 02000000 28692 TSIMEND 014780 28693+ LTORG 014780 4110000000000000 28694 =D'1.0' 014788 00000458 28695 =A(SAVETST) 1478C 28696+T533TEND EQU * 28697 * 28698 * Test 534 -- LCDR R,R ------------------------------------- 28699 * 28700 TSIMBEG T534,10000,100,1,C'LCDR R,R' 28701+* 003D64 28702+TDSCDAT CSECT 003D68 28703+ DS 0D 28704+* 003D68 00014790 28705+T534TDSC DC A(T534) // TENTRY 003D6C 0000010C 28706+ DC A(T534TEND-T534) // TLENGTH 003D70 00002710 28707+ DC F'10000' // TLRCNT 003D74 00000064 28708+ DC F'100' // TIGCNT 003D78 00000001 28709+ DC F'1' // TLTYPE 001BF9 28710+TEXT CSECT 001BF9 E3F5F3F4 28711+SPTR2541 DC C'T534' 003D7C 28712+TDSCDAT CSECT 003D7C 28713+ DS 0F 003D7C 04001BF9 28714+ DC AL1(L'SPTR2541),AL3(SPTR2541) 001BFD 28715+TEXT CSECT 001BFD D3C3C4D940D96BD9 28716+SPTR2542 DC C'LCDR R,R' 003D80 28717+TDSCDAT CSECT PAGE 525 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003D80 28718+ DS 0F 003D80 08001BFD 28719+ DC AL1(L'SPTR2542),AL3(SPTR2542) 28720+* 004CD8 28721+TDSCTBL CSECT 04CD8 28722+T534TPTR EQU * 004CD8 00003D68 28723+ DC A(T534TDSC) enabled test 28724+* 01478C 28725+TCODE CSECT 014790 28726+ DS 0D ensure double word alignment for test 014790 28727+T534 DS 0H 01650000 014790 90EC D00C 0000C 28728+ STM 14,12,12(13) SAVE REGISTERS 02950000 014794 18CF 28729+ LR R12,R15 base register := entry address 14790 28730+ USING T534,R12 declare code base register 014796 41B0 C022 147B2 28731+ LA R11,T534L load loop target to R11 01479A 58F0 C108 14898 28732+ L R15,=A(SAVETST) R15 := current save area 01479E 50DF 0004 00004 28733+ ST R13,4(R15) set back pointer in current save area 0147A2 182D 28734+ LR R2,R13 remember callers save area 0147A4 18DF 28735+ LR R13,R15 setup current save area 0147A6 50D2 0008 00008 28736+ ST R13,8(R2) set forw pointer in callers save area 00000 28737+ USING TDSC,R1 declare TDSC base register 0147AA 58F0 1008 00008 28738+ L R15,TLRCNT load local repeat count to R15 28739+* 28740 * 0147AE 6820 C100 14890 28741 LD FR2,=D'1.0' 28742 T534L REPINS LCDR,(FR0,FR2) repeat: LCDR FR0,FR2 28743+* 28744+* build from sublist &ALIST a comma separated string &ARGS 28745+* 28746+* 28747+* 28748+* 28749+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 28750+* this allows to transfer the repeat count from last TDSCGEN call 28751+* 28752+* 147B2 28753+T534L EQU * 28754+* 28755+* write a comment indicating what REPINS does (in case NOGEN in effect) 28756+* 28757+*,// REPINS: do 100 times: 28758+* 28759+* MNOTE requires that ' is doubled for expanded variables 28760+* thus build &MASTR as a copy of '&ARGS with ' doubled 28761+* 28762+* 28763+*,// LCDR FR0,FR2 28764+* 28765+* finally generate code: &ICNT copies of &CODE &ARGS 28766+* 0147B2 2302 28767+ LCDR FR0,FR2 0147B4 2302 28768+ LCDR FR0,FR2 0147B6 2302 28769+ LCDR FR0,FR2 0147B8 2302 28770+ LCDR FR0,FR2 0147BA 2302 28771+ LCDR FR0,FR2 0147BC 2302 28772+ LCDR FR0,FR2 PAGE 526 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0147BE 2302 28773+ LCDR FR0,FR2 0147C0 2302 28774+ LCDR FR0,FR2 0147C2 2302 28775+ LCDR FR0,FR2 0147C4 2302 28776+ LCDR FR0,FR2 0147C6 2302 28777+ LCDR FR0,FR2 0147C8 2302 28778+ LCDR FR0,FR2 0147CA 2302 28779+ LCDR FR0,FR2 0147CC 2302 28780+ LCDR FR0,FR2 0147CE 2302 28781+ LCDR FR0,FR2 0147D0 2302 28782+ LCDR FR0,FR2 0147D2 2302 28783+ LCDR FR0,FR2 0147D4 2302 28784+ LCDR FR0,FR2 0147D6 2302 28785+ LCDR FR0,FR2 0147D8 2302 28786+ LCDR FR0,FR2 0147DA 2302 28787+ LCDR FR0,FR2 0147DC 2302 28788+ LCDR FR0,FR2 0147DE 2302 28789+ LCDR FR0,FR2 0147E0 2302 28790+ LCDR FR0,FR2 0147E2 2302 28791+ LCDR FR0,FR2 0147E4 2302 28792+ LCDR FR0,FR2 0147E6 2302 28793+ LCDR FR0,FR2 0147E8 2302 28794+ LCDR FR0,FR2 0147EA 2302 28795+ LCDR FR0,FR2 0147EC 2302 28796+ LCDR FR0,FR2 0147EE 2302 28797+ LCDR FR0,FR2 0147F0 2302 28798+ LCDR FR0,FR2 0147F2 2302 28799+ LCDR FR0,FR2 0147F4 2302 28800+ LCDR FR0,FR2 0147F6 2302 28801+ LCDR FR0,FR2 0147F8 2302 28802+ LCDR FR0,FR2 0147FA 2302 28803+ LCDR FR0,FR2 0147FC 2302 28804+ LCDR FR0,FR2 0147FE 2302 28805+ LCDR FR0,FR2 014800 2302 28806+ LCDR FR0,FR2 014802 2302 28807+ LCDR FR0,FR2 014804 2302 28808+ LCDR FR0,FR2 014806 2302 28809+ LCDR FR0,FR2 014808 2302 28810+ LCDR FR0,FR2 01480A 2302 28811+ LCDR FR0,FR2 01480C 2302 28812+ LCDR FR0,FR2 01480E 2302 28813+ LCDR FR0,FR2 014810 2302 28814+ LCDR FR0,FR2 014812 2302 28815+ LCDR FR0,FR2 014814 2302 28816+ LCDR FR0,FR2 014816 2302 28817+ LCDR FR0,FR2 014818 2302 28818+ LCDR FR0,FR2 01481A 2302 28819+ LCDR FR0,FR2 01481C 2302 28820+ LCDR FR0,FR2 01481E 2302 28821+ LCDR FR0,FR2 014820 2302 28822+ LCDR FR0,FR2 014822 2302 28823+ LCDR FR0,FR2 014824 2302 28824+ LCDR FR0,FR2 014826 2302 28825+ LCDR FR0,FR2 014828 2302 28826+ LCDR FR0,FR2 01482A 2302 28827+ LCDR FR0,FR2 PAGE 527 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01482C 2302 28828+ LCDR FR0,FR2 01482E 2302 28829+ LCDR FR0,FR2 014830 2302 28830+ LCDR FR0,FR2 014832 2302 28831+ LCDR FR0,FR2 014834 2302 28832+ LCDR FR0,FR2 014836 2302 28833+ LCDR FR0,FR2 014838 2302 28834+ LCDR FR0,FR2 01483A 2302 28835+ LCDR FR0,FR2 01483C 2302 28836+ LCDR FR0,FR2 01483E 2302 28837+ LCDR FR0,FR2 014840 2302 28838+ LCDR FR0,FR2 014842 2302 28839+ LCDR FR0,FR2 014844 2302 28840+ LCDR FR0,FR2 014846 2302 28841+ LCDR FR0,FR2 014848 2302 28842+ LCDR FR0,FR2 01484A 2302 28843+ LCDR FR0,FR2 01484C 2302 28844+ LCDR FR0,FR2 01484E 2302 28845+ LCDR FR0,FR2 014850 2302 28846+ LCDR FR0,FR2 014852 2302 28847+ LCDR FR0,FR2 014854 2302 28848+ LCDR FR0,FR2 014856 2302 28849+ LCDR FR0,FR2 014858 2302 28850+ LCDR FR0,FR2 01485A 2302 28851+ LCDR FR0,FR2 01485C 2302 28852+ LCDR FR0,FR2 01485E 2302 28853+ LCDR FR0,FR2 014860 2302 28854+ LCDR FR0,FR2 014862 2302 28855+ LCDR FR0,FR2 014864 2302 28856+ LCDR FR0,FR2 014866 2302 28857+ LCDR FR0,FR2 014868 2302 28858+ LCDR FR0,FR2 01486A 2302 28859+ LCDR FR0,FR2 01486C 2302 28860+ LCDR FR0,FR2 01486E 2302 28861+ LCDR FR0,FR2 014870 2302 28862+ LCDR FR0,FR2 014872 2302 28863+ LCDR FR0,FR2 014874 2302 28864+ LCDR FR0,FR2 014876 2302 28865+ LCDR FR0,FR2 014878 2302 28866+ LCDR FR0,FR2 28867+* 01487A 06FB 28868 BCTR R15,R11 28869 TSIMRET 01487C 58F0 C108 14898 28870+ L R15,=A(SAVETST) R15 := current save area 014880 58DF 0004 00004 28871+ L R13,4(R15) get old save area back 014884 98EC D00C 0000C 28872+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014888 07FE 28873+ BR 14 RETURN 02000000 28874 TSIMEND 014890 28875+ LTORG 014890 4110000000000000 28876 =D'1.0' 014898 00000458 28877 =A(SAVETST) 1489C 28878+T534TEND EQU * 28879 * 28880 * Test 535 -- LNDR R,R ------------------------------------- 28881 * 28882 TSIMBEG T535,10000,100,1,C'LNDR R,R' PAGE 528 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 28883+* 003D84 28884+TDSCDAT CSECT 003D88 28885+ DS 0D 28886+* 003D88 000148A0 28887+T535TDSC DC A(T535) // TENTRY 003D8C 0000010C 28888+ DC A(T535TEND-T535) // TLENGTH 003D90 00002710 28889+ DC F'10000' // TLRCNT 003D94 00000064 28890+ DC F'100' // TIGCNT 003D98 00000001 28891+ DC F'1' // TLTYPE 001C05 28892+TEXT CSECT 001C05 E3F5F3F5 28893+SPTR2553 DC C'T535' 003D9C 28894+TDSCDAT CSECT 003D9C 28895+ DS 0F 003D9C 04001C05 28896+ DC AL1(L'SPTR2553),AL3(SPTR2553) 001C09 28897+TEXT CSECT 001C09 D3D5C4D940D96BD9 28898+SPTR2554 DC C'LNDR R,R' 003DA0 28899+TDSCDAT CSECT 003DA0 28900+ DS 0F 003DA0 08001C09 28901+ DC AL1(L'SPTR2554),AL3(SPTR2554) 28902+* 004CDC 28903+TDSCTBL CSECT 04CDC 28904+T535TPTR EQU * 004CDC 00003D88 28905+ DC A(T535TDSC) enabled test 28906+* 01489C 28907+TCODE CSECT 0148A0 28908+ DS 0D ensure double word alignment for test 0148A0 28909+T535 DS 0H 01650000 0148A0 90EC D00C 0000C 28910+ STM 14,12,12(13) SAVE REGISTERS 02950000 0148A4 18CF 28911+ LR R12,R15 base register := entry address 148A0 28912+ USING T535,R12 declare code base register 0148A6 41B0 C022 148C2 28913+ LA R11,T535L load loop target to R11 0148AA 58F0 C108 149A8 28914+ L R15,=A(SAVETST) R15 := current save area 0148AE 50DF 0004 00004 28915+ ST R13,4(R15) set back pointer in current save area 0148B2 182D 28916+ LR R2,R13 remember callers save area 0148B4 18DF 28917+ LR R13,R15 setup current save area 0148B6 50D2 0008 00008 28918+ ST R13,8(R2) set forw pointer in callers save area 00000 28919+ USING TDSC,R1 declare TDSC base register 0148BA 58F0 1008 00008 28920+ L R15,TLRCNT load local repeat count to R15 28921+* 28922 * 0148BE 6820 C100 149A0 28923 LD FR2,=D'1.0' 28924 T535L REPINS LNDR,(FR0,FR2) repeat: LNDR FR0,FR2 28925+* 28926+* build from sublist &ALIST a comma separated string &ARGS 28927+* 28928+* 28929+* 28930+* 28931+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 28932+* this allows to transfer the repeat count from last TDSCGEN call 28933+* 28934+* 148C2 28935+T535L EQU * 28936+* 28937+* write a comment indicating what REPINS does (in case NOGEN in effect) PAGE 529 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 28938+* 28939+*,// REPINS: do 100 times: 28940+* 28941+* MNOTE requires that ' is doubled for expanded variables 28942+* thus build &MASTR as a copy of '&ARGS with ' doubled 28943+* 28944+* 28945+*,// LNDR FR0,FR2 28946+* 28947+* finally generate code: &ICNT copies of &CODE &ARGS 28948+* 0148C2 2102 28949+ LNDR FR0,FR2 0148C4 2102 28950+ LNDR FR0,FR2 0148C6 2102 28951+ LNDR FR0,FR2 0148C8 2102 28952+ LNDR FR0,FR2 0148CA 2102 28953+ LNDR FR0,FR2 0148CC 2102 28954+ LNDR FR0,FR2 0148CE 2102 28955+ LNDR FR0,FR2 0148D0 2102 28956+ LNDR FR0,FR2 0148D2 2102 28957+ LNDR FR0,FR2 0148D4 2102 28958+ LNDR FR0,FR2 0148D6 2102 28959+ LNDR FR0,FR2 0148D8 2102 28960+ LNDR FR0,FR2 0148DA 2102 28961+ LNDR FR0,FR2 0148DC 2102 28962+ LNDR FR0,FR2 0148DE 2102 28963+ LNDR FR0,FR2 0148E0 2102 28964+ LNDR FR0,FR2 0148E2 2102 28965+ LNDR FR0,FR2 0148E4 2102 28966+ LNDR FR0,FR2 0148E6 2102 28967+ LNDR FR0,FR2 0148E8 2102 28968+ LNDR FR0,FR2 0148EA 2102 28969+ LNDR FR0,FR2 0148EC 2102 28970+ LNDR FR0,FR2 0148EE 2102 28971+ LNDR FR0,FR2 0148F0 2102 28972+ LNDR FR0,FR2 0148F2 2102 28973+ LNDR FR0,FR2 0148F4 2102 28974+ LNDR FR0,FR2 0148F6 2102 28975+ LNDR FR0,FR2 0148F8 2102 28976+ LNDR FR0,FR2 0148FA 2102 28977+ LNDR FR0,FR2 0148FC 2102 28978+ LNDR FR0,FR2 0148FE 2102 28979+ LNDR FR0,FR2 014900 2102 28980+ LNDR FR0,FR2 014902 2102 28981+ LNDR FR0,FR2 014904 2102 28982+ LNDR FR0,FR2 014906 2102 28983+ LNDR FR0,FR2 014908 2102 28984+ LNDR FR0,FR2 01490A 2102 28985+ LNDR FR0,FR2 01490C 2102 28986+ LNDR FR0,FR2 01490E 2102 28987+ LNDR FR0,FR2 014910 2102 28988+ LNDR FR0,FR2 014912 2102 28989+ LNDR FR0,FR2 014914 2102 28990+ LNDR FR0,FR2 014916 2102 28991+ LNDR FR0,FR2 014918 2102 28992+ LNDR FR0,FR2 PAGE 530 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01491A 2102 28993+ LNDR FR0,FR2 01491C 2102 28994+ LNDR FR0,FR2 01491E 2102 28995+ LNDR FR0,FR2 014920 2102 28996+ LNDR FR0,FR2 014922 2102 28997+ LNDR FR0,FR2 014924 2102 28998+ LNDR FR0,FR2 014926 2102 28999+ LNDR FR0,FR2 014928 2102 29000+ LNDR FR0,FR2 01492A 2102 29001+ LNDR FR0,FR2 01492C 2102 29002+ LNDR FR0,FR2 01492E 2102 29003+ LNDR FR0,FR2 014930 2102 29004+ LNDR FR0,FR2 014932 2102 29005+ LNDR FR0,FR2 014934 2102 29006+ LNDR FR0,FR2 014936 2102 29007+ LNDR FR0,FR2 014938 2102 29008+ LNDR FR0,FR2 01493A 2102 29009+ LNDR FR0,FR2 01493C 2102 29010+ LNDR FR0,FR2 01493E 2102 29011+ LNDR FR0,FR2 014940 2102 29012+ LNDR FR0,FR2 014942 2102 29013+ LNDR FR0,FR2 014944 2102 29014+ LNDR FR0,FR2 014946 2102 29015+ LNDR FR0,FR2 014948 2102 29016+ LNDR FR0,FR2 01494A 2102 29017+ LNDR FR0,FR2 01494C 2102 29018+ LNDR FR0,FR2 01494E 2102 29019+ LNDR FR0,FR2 014950 2102 29020+ LNDR FR0,FR2 014952 2102 29021+ LNDR FR0,FR2 014954 2102 29022+ LNDR FR0,FR2 014956 2102 29023+ LNDR FR0,FR2 014958 2102 29024+ LNDR FR0,FR2 01495A 2102 29025+ LNDR FR0,FR2 01495C 2102 29026+ LNDR FR0,FR2 01495E 2102 29027+ LNDR FR0,FR2 014960 2102 29028+ LNDR FR0,FR2 014962 2102 29029+ LNDR FR0,FR2 014964 2102 29030+ LNDR FR0,FR2 014966 2102 29031+ LNDR FR0,FR2 014968 2102 29032+ LNDR FR0,FR2 01496A 2102 29033+ LNDR FR0,FR2 01496C 2102 29034+ LNDR FR0,FR2 01496E 2102 29035+ LNDR FR0,FR2 014970 2102 29036+ LNDR FR0,FR2 014972 2102 29037+ LNDR FR0,FR2 014974 2102 29038+ LNDR FR0,FR2 014976 2102 29039+ LNDR FR0,FR2 014978 2102 29040+ LNDR FR0,FR2 01497A 2102 29041+ LNDR FR0,FR2 01497C 2102 29042+ LNDR FR0,FR2 01497E 2102 29043+ LNDR FR0,FR2 014980 2102 29044+ LNDR FR0,FR2 014982 2102 29045+ LNDR FR0,FR2 014984 2102 29046+ LNDR FR0,FR2 014986 2102 29047+ LNDR FR0,FR2 PAGE 531 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014988 2102 29048+ LNDR FR0,FR2 29049+* 01498A 06FB 29050 BCTR R15,R11 29051 TSIMRET 01498C 58F0 C108 149A8 29052+ L R15,=A(SAVETST) R15 := current save area 014990 58DF 0004 00004 29053+ L R13,4(R15) get old save area back 014994 98EC D00C 0000C 29054+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014998 07FE 29055+ BR 14 RETURN 02000000 29056 TSIMEND 0149A0 29057+ LTORG 0149A0 4110000000000000 29058 =D'1.0' 0149A8 00000458 29059 =A(SAVETST) 149AC 29060+T535TEND EQU * 29061 * 29062 * Test 536 -- LPDR R,R ------------------------------------- 29063 * 29064 TSIMBEG T536,10000,100,1,C'LPDR R,R' 29065+* 003DA4 29066+TDSCDAT CSECT 003DA8 29067+ DS 0D 29068+* 003DA8 000149B0 29069+T536TDSC DC A(T536) // TENTRY 003DAC 0000010C 29070+ DC A(T536TEND-T536) // TLENGTH 003DB0 00002710 29071+ DC F'10000' // TLRCNT 003DB4 00000064 29072+ DC F'100' // TIGCNT 003DB8 00000001 29073+ DC F'1' // TLTYPE 001C11 29074+TEXT CSECT 001C11 E3F5F3F6 29075+SPTR2565 DC C'T536' 003DBC 29076+TDSCDAT CSECT 003DBC 29077+ DS 0F 003DBC 04001C11 29078+ DC AL1(L'SPTR2565),AL3(SPTR2565) 001C15 29079+TEXT CSECT 001C15 D3D7C4D940D96BD9 29080+SPTR2566 DC C'LPDR R,R' 003DC0 29081+TDSCDAT CSECT 003DC0 29082+ DS 0F 003DC0 08001C15 29083+ DC AL1(L'SPTR2566),AL3(SPTR2566) 29084+* 004CE0 29085+TDSCTBL CSECT 04CE0 29086+T536TPTR EQU * 004CE0 00003DA8 29087+ DC A(T536TDSC) enabled test 29088+* 0149AC 29089+TCODE CSECT 0149B0 29090+ DS 0D ensure double word alignment for test 0149B0 29091+T536 DS 0H 01650000 0149B0 90EC D00C 0000C 29092+ STM 14,12,12(13) SAVE REGISTERS 02950000 0149B4 18CF 29093+ LR R12,R15 base register := entry address 149B0 29094+ USING T536,R12 declare code base register 0149B6 41B0 C022 149D2 29095+ LA R11,T536L load loop target to R11 0149BA 58F0 C108 14AB8 29096+ L R15,=A(SAVETST) R15 := current save area 0149BE 50DF 0004 00004 29097+ ST R13,4(R15) set back pointer in current save area 0149C2 182D 29098+ LR R2,R13 remember callers save area 0149C4 18DF 29099+ LR R13,R15 setup current save area 0149C6 50D2 0008 00008 29100+ ST R13,8(R2) set forw pointer in callers save area 00000 29101+ USING TDSC,R1 declare TDSC base register 0149CA 58F0 1008 00008 29102+ L R15,TLRCNT load local repeat count to R15 PAGE 532 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 29103+* 29104 * 0149CE 6820 C100 14AB0 29105 LD FR2,=D'-1.0' 29106 T536L REPINS LPDR,(FR0,FR2) repeat: LPDR FR0,FR2 29107+* 29108+* build from sublist &ALIST a comma separated string &ARGS 29109+* 29110+* 29111+* 29112+* 29113+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 29114+* this allows to transfer the repeat count from last TDSCGEN call 29115+* 29116+* 149D2 29117+T536L EQU * 29118+* 29119+* write a comment indicating what REPINS does (in case NOGEN in effect) 29120+* 29121+*,// REPINS: do 100 times: 29122+* 29123+* MNOTE requires that ' is doubled for expanded variables 29124+* thus build &MASTR as a copy of '&ARGS with ' doubled 29125+* 29126+* 29127+*,// LPDR FR0,FR2 29128+* 29129+* finally generate code: &ICNT copies of &CODE &ARGS 29130+* 0149D2 2002 29131+ LPDR FR0,FR2 0149D4 2002 29132+ LPDR FR0,FR2 0149D6 2002 29133+ LPDR FR0,FR2 0149D8 2002 29134+ LPDR FR0,FR2 0149DA 2002 29135+ LPDR FR0,FR2 0149DC 2002 29136+ LPDR FR0,FR2 0149DE 2002 29137+ LPDR FR0,FR2 0149E0 2002 29138+ LPDR FR0,FR2 0149E2 2002 29139+ LPDR FR0,FR2 0149E4 2002 29140+ LPDR FR0,FR2 0149E6 2002 29141+ LPDR FR0,FR2 0149E8 2002 29142+ LPDR FR0,FR2 0149EA 2002 29143+ LPDR FR0,FR2 0149EC 2002 29144+ LPDR FR0,FR2 0149EE 2002 29145+ LPDR FR0,FR2 0149F0 2002 29146+ LPDR FR0,FR2 0149F2 2002 29147+ LPDR FR0,FR2 0149F4 2002 29148+ LPDR FR0,FR2 0149F6 2002 29149+ LPDR FR0,FR2 0149F8 2002 29150+ LPDR FR0,FR2 0149FA 2002 29151+ LPDR FR0,FR2 0149FC 2002 29152+ LPDR FR0,FR2 0149FE 2002 29153+ LPDR FR0,FR2 014A00 2002 29154+ LPDR FR0,FR2 014A02 2002 29155+ LPDR FR0,FR2 014A04 2002 29156+ LPDR FR0,FR2 014A06 2002 29157+ LPDR FR0,FR2 PAGE 533 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014A08 2002 29158+ LPDR FR0,FR2 014A0A 2002 29159+ LPDR FR0,FR2 014A0C 2002 29160+ LPDR FR0,FR2 014A0E 2002 29161+ LPDR FR0,FR2 014A10 2002 29162+ LPDR FR0,FR2 014A12 2002 29163+ LPDR FR0,FR2 014A14 2002 29164+ LPDR FR0,FR2 014A16 2002 29165+ LPDR FR0,FR2 014A18 2002 29166+ LPDR FR0,FR2 014A1A 2002 29167+ LPDR FR0,FR2 014A1C 2002 29168+ LPDR FR0,FR2 014A1E 2002 29169+ LPDR FR0,FR2 014A20 2002 29170+ LPDR FR0,FR2 014A22 2002 29171+ LPDR FR0,FR2 014A24 2002 29172+ LPDR FR0,FR2 014A26 2002 29173+ LPDR FR0,FR2 014A28 2002 29174+ LPDR FR0,FR2 014A2A 2002 29175+ LPDR FR0,FR2 014A2C 2002 29176+ LPDR FR0,FR2 014A2E 2002 29177+ LPDR FR0,FR2 014A30 2002 29178+ LPDR FR0,FR2 014A32 2002 29179+ LPDR FR0,FR2 014A34 2002 29180+ LPDR FR0,FR2 014A36 2002 29181+ LPDR FR0,FR2 014A38 2002 29182+ LPDR FR0,FR2 014A3A 2002 29183+ LPDR FR0,FR2 014A3C 2002 29184+ LPDR FR0,FR2 014A3E 2002 29185+ LPDR FR0,FR2 014A40 2002 29186+ LPDR FR0,FR2 014A42 2002 29187+ LPDR FR0,FR2 014A44 2002 29188+ LPDR FR0,FR2 014A46 2002 29189+ LPDR FR0,FR2 014A48 2002 29190+ LPDR FR0,FR2 014A4A 2002 29191+ LPDR FR0,FR2 014A4C 2002 29192+ LPDR FR0,FR2 014A4E 2002 29193+ LPDR FR0,FR2 014A50 2002 29194+ LPDR FR0,FR2 014A52 2002 29195+ LPDR FR0,FR2 014A54 2002 29196+ LPDR FR0,FR2 014A56 2002 29197+ LPDR FR0,FR2 014A58 2002 29198+ LPDR FR0,FR2 014A5A 2002 29199+ LPDR FR0,FR2 014A5C 2002 29200+ LPDR FR0,FR2 014A5E 2002 29201+ LPDR FR0,FR2 014A60 2002 29202+ LPDR FR0,FR2 014A62 2002 29203+ LPDR FR0,FR2 014A64 2002 29204+ LPDR FR0,FR2 014A66 2002 29205+ LPDR FR0,FR2 014A68 2002 29206+ LPDR FR0,FR2 014A6A 2002 29207+ LPDR FR0,FR2 014A6C 2002 29208+ LPDR FR0,FR2 014A6E 2002 29209+ LPDR FR0,FR2 014A70 2002 29210+ LPDR FR0,FR2 014A72 2002 29211+ LPDR FR0,FR2 014A74 2002 29212+ LPDR FR0,FR2 PAGE 534 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014A76 2002 29213+ LPDR FR0,FR2 014A78 2002 29214+ LPDR FR0,FR2 014A7A 2002 29215+ LPDR FR0,FR2 014A7C 2002 29216+ LPDR FR0,FR2 014A7E 2002 29217+ LPDR FR0,FR2 014A80 2002 29218+ LPDR FR0,FR2 014A82 2002 29219+ LPDR FR0,FR2 014A84 2002 29220+ LPDR FR0,FR2 014A86 2002 29221+ LPDR FR0,FR2 014A88 2002 29222+ LPDR FR0,FR2 014A8A 2002 29223+ LPDR FR0,FR2 014A8C 2002 29224+ LPDR FR0,FR2 014A8E 2002 29225+ LPDR FR0,FR2 014A90 2002 29226+ LPDR FR0,FR2 014A92 2002 29227+ LPDR FR0,FR2 014A94 2002 29228+ LPDR FR0,FR2 014A96 2002 29229+ LPDR FR0,FR2 014A98 2002 29230+ LPDR FR0,FR2 29231+* 014A9A 06FB 29232 BCTR R15,R11 29233 TSIMRET 014A9C 58F0 C108 14AB8 29234+ L R15,=A(SAVETST) R15 := current save area 014AA0 58DF 0004 00004 29235+ L R13,4(R15) get old save area back 014AA4 98EC D00C 0000C 29236+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014AA8 07FE 29237+ BR 14 RETURN 02000000 29238 TSIMEND 014AB0 29239+ LTORG 014AB0 C110000000000000 29240 =D'-1.0' 014AB8 00000458 29241 =A(SAVETST) 14ABC 29242+T536TEND EQU * 29243 * 29244 * Test 537 -- LRDR R,R ------------------------------------- 29245 * 29246 TSIMBEG T537,7000,100,1,C'LRDR R,R' 29247+* 003DC4 29248+TDSCDAT CSECT 003DC8 29249+ DS 0D 29250+* 003DC8 00014AC0 29251+T537TDSC DC A(T537) // TENTRY 003DCC 00000114 29252+ DC A(T537TEND-T537) // TLENGTH 003DD0 00001B58 29253+ DC F'7000' // TLRCNT 003DD4 00000064 29254+ DC F'100' // TIGCNT 003DD8 00000001 29255+ DC F'1' // TLTYPE 001C1D 29256+TEXT CSECT 001C1D E3F5F3F7 29257+SPTR2577 DC C'T537' 003DDC 29258+TDSCDAT CSECT 003DDC 29259+ DS 0F 003DDC 04001C1D 29260+ DC AL1(L'SPTR2577),AL3(SPTR2577) 001C21 29261+TEXT CSECT 001C21 D3D9C4D940D96BD9 29262+SPTR2578 DC C'LRDR R,R' 003DE0 29263+TDSCDAT CSECT 003DE0 29264+ DS 0F 003DE0 08001C21 29265+ DC AL1(L'SPTR2578),AL3(SPTR2578) 29266+* 004CE4 29267+TDSCTBL CSECT PAGE 535 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04CE4 29268+T537TPTR EQU * 004CE4 00003DC8 29269+ DC A(T537TDSC) enabled test 29270+* 014ABC 29271+TCODE CSECT 014AC0 29272+ DS 0D ensure double word alignment for test 014AC0 29273+T537 DS 0H 01650000 014AC0 90EC D00C 0000C 29274+ STM 14,12,12(13) SAVE REGISTERS 02950000 014AC4 18CF 29275+ LR R12,R15 base register := entry address 14AC0 29276+ USING T537,R12 declare code base register 014AC6 41B0 C026 14AE6 29277+ LA R11,T537L load loop target to R11 014ACA 58F0 C110 14BD0 29278+ L R15,=A(SAVETST) R15 := current save area 014ACE 50DF 0004 00004 29279+ ST R13,4(R15) set back pointer in current save area 014AD2 182D 29280+ LR R2,R13 remember callers save area 014AD4 18DF 29281+ LR R13,R15 setup current save area 014AD6 50D2 0008 00008 29282+ ST R13,8(R2) set forw pointer in callers save area 00000 29283+ USING TDSC,R1 declare TDSC base register 014ADA 58F0 1008 00008 29284+ L R15,TLRCNT load local repeat count to R15 29285+* 29286 * 014ADE 6840 C100 14BC0 29287 LD FR4,T537V1 014AE2 6860 C108 14BC8 29288 LD FR6,T537V1+8 29289 T537L REPINS LRDR,(FR0,FR4) repeat: LRDR FR0,FR4 29290+* 29291+* build from sublist &ALIST a comma separated string &ARGS 29292+* 29293+* 29294+* 29295+* 29296+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 29297+* this allows to transfer the repeat count from last TDSCGEN call 29298+* 29299+* 14AE6 29300+T537L EQU * 29301+* 29302+* write a comment indicating what REPINS does (in case NOGEN in effect) 29303+* 29304+*,// REPINS: do 100 times: 29305+* 29306+* MNOTE requires that ' is doubled for expanded variables 29307+* thus build &MASTR as a copy of '&ARGS with ' doubled 29308+* 29309+* 29310+*,// LRDR FR0,FR4 29311+* 29312+* finally generate code: &ICNT copies of &CODE &ARGS 29313+* 014AE6 2504 29314+ LRDR FR0,FR4 014AE8 2504 29315+ LRDR FR0,FR4 014AEA 2504 29316+ LRDR FR0,FR4 014AEC 2504 29317+ LRDR FR0,FR4 014AEE 2504 29318+ LRDR FR0,FR4 014AF0 2504 29319+ LRDR FR0,FR4 014AF2 2504 29320+ LRDR FR0,FR4 014AF4 2504 29321+ LRDR FR0,FR4 014AF6 2504 29322+ LRDR FR0,FR4 PAGE 536 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014AF8 2504 29323+ LRDR FR0,FR4 014AFA 2504 29324+ LRDR FR0,FR4 014AFC 2504 29325+ LRDR FR0,FR4 014AFE 2504 29326+ LRDR FR0,FR4 014B00 2504 29327+ LRDR FR0,FR4 014B02 2504 29328+ LRDR FR0,FR4 014B04 2504 29329+ LRDR FR0,FR4 014B06 2504 29330+ LRDR FR0,FR4 014B08 2504 29331+ LRDR FR0,FR4 014B0A 2504 29332+ LRDR FR0,FR4 014B0C 2504 29333+ LRDR FR0,FR4 014B0E 2504 29334+ LRDR FR0,FR4 014B10 2504 29335+ LRDR FR0,FR4 014B12 2504 29336+ LRDR FR0,FR4 014B14 2504 29337+ LRDR FR0,FR4 014B16 2504 29338+ LRDR FR0,FR4 014B18 2504 29339+ LRDR FR0,FR4 014B1A 2504 29340+ LRDR FR0,FR4 014B1C 2504 29341+ LRDR FR0,FR4 014B1E 2504 29342+ LRDR FR0,FR4 014B20 2504 29343+ LRDR FR0,FR4 014B22 2504 29344+ LRDR FR0,FR4 014B24 2504 29345+ LRDR FR0,FR4 014B26 2504 29346+ LRDR FR0,FR4 014B28 2504 29347+ LRDR FR0,FR4 014B2A 2504 29348+ LRDR FR0,FR4 014B2C 2504 29349+ LRDR FR0,FR4 014B2E 2504 29350+ LRDR FR0,FR4 014B30 2504 29351+ LRDR FR0,FR4 014B32 2504 29352+ LRDR FR0,FR4 014B34 2504 29353+ LRDR FR0,FR4 014B36 2504 29354+ LRDR FR0,FR4 014B38 2504 29355+ LRDR FR0,FR4 014B3A 2504 29356+ LRDR FR0,FR4 014B3C 2504 29357+ LRDR FR0,FR4 014B3E 2504 29358+ LRDR FR0,FR4 014B40 2504 29359+ LRDR FR0,FR4 014B42 2504 29360+ LRDR FR0,FR4 014B44 2504 29361+ LRDR FR0,FR4 014B46 2504 29362+ LRDR FR0,FR4 014B48 2504 29363+ LRDR FR0,FR4 014B4A 2504 29364+ LRDR FR0,FR4 014B4C 2504 29365+ LRDR FR0,FR4 014B4E 2504 29366+ LRDR FR0,FR4 014B50 2504 29367+ LRDR FR0,FR4 014B52 2504 29368+ LRDR FR0,FR4 014B54 2504 29369+ LRDR FR0,FR4 014B56 2504 29370+ LRDR FR0,FR4 014B58 2504 29371+ LRDR FR0,FR4 014B5A 2504 29372+ LRDR FR0,FR4 014B5C 2504 29373+ LRDR FR0,FR4 014B5E 2504 29374+ LRDR FR0,FR4 014B60 2504 29375+ LRDR FR0,FR4 014B62 2504 29376+ LRDR FR0,FR4 014B64 2504 29377+ LRDR FR0,FR4 PAGE 537 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014B66 2504 29378+ LRDR FR0,FR4 014B68 2504 29379+ LRDR FR0,FR4 014B6A 2504 29380+ LRDR FR0,FR4 014B6C 2504 29381+ LRDR FR0,FR4 014B6E 2504 29382+ LRDR FR0,FR4 014B70 2504 29383+ LRDR FR0,FR4 014B72 2504 29384+ LRDR FR0,FR4 014B74 2504 29385+ LRDR FR0,FR4 014B76 2504 29386+ LRDR FR0,FR4 014B78 2504 29387+ LRDR FR0,FR4 014B7A 2504 29388+ LRDR FR0,FR4 014B7C 2504 29389+ LRDR FR0,FR4 014B7E 2504 29390+ LRDR FR0,FR4 014B80 2504 29391+ LRDR FR0,FR4 014B82 2504 29392+ LRDR FR0,FR4 014B84 2504 29393+ LRDR FR0,FR4 014B86 2504 29394+ LRDR FR0,FR4 014B88 2504 29395+ LRDR FR0,FR4 014B8A 2504 29396+ LRDR FR0,FR4 014B8C 2504 29397+ LRDR FR0,FR4 014B8E 2504 29398+ LRDR FR0,FR4 014B90 2504 29399+ LRDR FR0,FR4 014B92 2504 29400+ LRDR FR0,FR4 014B94 2504 29401+ LRDR FR0,FR4 014B96 2504 29402+ LRDR FR0,FR4 014B98 2504 29403+ LRDR FR0,FR4 014B9A 2504 29404+ LRDR FR0,FR4 014B9C 2504 29405+ LRDR FR0,FR4 014B9E 2504 29406+ LRDR FR0,FR4 014BA0 2504 29407+ LRDR FR0,FR4 014BA2 2504 29408+ LRDR FR0,FR4 014BA4 2504 29409+ LRDR FR0,FR4 014BA6 2504 29410+ LRDR FR0,FR4 014BA8 2504 29411+ LRDR FR0,FR4 014BAA 2504 29412+ LRDR FR0,FR4 014BAC 2504 29413+ LRDR FR0,FR4 29414+* 014BAE 06FB 29415 BCTR R15,R11 29416 TSIMRET 014BB0 58F0 C110 14BD0 29417+ L R15,=A(SAVETST) R15 := current save area 014BB4 58DF 0004 00004 29418+ L R13,4(R15) get old save area back 014BB8 98EC D00C 0000C 29419+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014BBC 07FE 29420+ BR 14 RETURN 02000000 014BBE 0000 014BC0 4111999999999999 29421 T537V1 DC L'1.1' 29422 TSIMEND 014BD0 29423+ LTORG 014BD0 00000458 29424 =A(SAVETST) 14BD4 29425+T537TEND EQU * 29426 * 29427 * Test 538 -- STD R,m -------------------------------------- 29428 * 29429 TSIMBEG T538,10000,50,1,C'STD R,m' 29430+* 003DE4 29431+TDSCDAT CSECT PAGE 538 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003DE8 29432+ DS 0D 29433+* 003DE8 00014BD8 29434+T538TDSC DC A(T538) // TENTRY 003DEC 00000104 29435+ DC A(T538TEND-T538) // TLENGTH 003DF0 00002710 29436+ DC F'10000' // TLRCNT 003DF4 00000032 29437+ DC F'50' // TIGCNT 003DF8 00000001 29438+ DC F'1' // TLTYPE 001C29 29439+TEXT CSECT 001C29 E3F5F3F8 29440+SPTR2589 DC C'T538' 003DFC 29441+TDSCDAT CSECT 003DFC 29442+ DS 0F 003DFC 04001C29 29443+ DC AL1(L'SPTR2589),AL3(SPTR2589) 001C2D 29444+TEXT CSECT 001C2D E2E3C440D96B94 29445+SPTR2590 DC C'STD R,m' 003E00 29446+TDSCDAT CSECT 003E00 29447+ DS 0F 003E00 07001C2D 29448+ DC AL1(L'SPTR2590),AL3(SPTR2590) 29449+* 004CE8 29450+TDSCTBL CSECT 04CE8 29451+T538TPTR EQU * 004CE8 00003DE8 29452+ DC A(T538TDSC) enabled test 29453+* 014BD4 29454+TCODE CSECT 014BD8 29455+ DS 0D ensure double word alignment for test 014BD8 29456+T538 DS 0H 01650000 014BD8 90EC D00C 0000C 29457+ STM 14,12,12(13) SAVE REGISTERS 02950000 014BDC 18CF 29458+ LR R12,R15 base register := entry address 14BD8 29459+ USING T538,R12 declare code base register 014BDE 41B0 C01E 14BF6 29460+ LA R11,T538L load loop target to R11 014BE2 58F0 C100 14CD8 29461+ L R15,=A(SAVETST) R15 := current save area 014BE6 50DF 0004 00004 29462+ ST R13,4(R15) set back pointer in current save area 014BEA 182D 29463+ LR R2,R13 remember callers save area 014BEC 18DF 29464+ LR R13,R15 setup current save area 014BEE 50D2 0008 00008 29465+ ST R13,8(R2) set forw pointer in callers save area 00000 29466+ USING TDSC,R1 declare TDSC base register 014BF2 58F0 1008 00008 29467+ L R15,TLRCNT load local repeat count to R15 29468+* 29469 * 29470 T538L REPINS STD,(FR0,T538V) repeat: STD FR0,T538V' 29471+* 29472+* build from sublist &ALIST a comma separated string &ARGS 29473+* 29474+* 29475+* 29476+* 29477+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 29478+* this allows to transfer the repeat count from last TDSCGEN call 29479+* 29480+* 14BF6 29481+T538L EQU * 29482+* 29483+* write a comment indicating what REPINS does (in case NOGEN in effect) 29484+* 29485+*,// REPINS: do 50 times: 29486+* PAGE 539 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 29487+* MNOTE requires that ' is doubled for expanded variables 29488+* thus build &MASTR as a copy of '&ARGS with ' doubled 29489+* 29490+* 29491+*,// STD FR0,T538V 29492+* 29493+* finally generate code: &ICNT copies of &CODE &ARGS 29494+* 014BF6 6000 C0F8 14CD0 29495+ STD FR0,T538V 014BFA 6000 C0F8 14CD0 29496+ STD FR0,T538V 014BFE 6000 C0F8 14CD0 29497+ STD FR0,T538V 014C02 6000 C0F8 14CD0 29498+ STD FR0,T538V 014C06 6000 C0F8 14CD0 29499+ STD FR0,T538V 014C0A 6000 C0F8 14CD0 29500+ STD FR0,T538V 014C0E 6000 C0F8 14CD0 29501+ STD FR0,T538V 014C12 6000 C0F8 14CD0 29502+ STD FR0,T538V 014C16 6000 C0F8 14CD0 29503+ STD FR0,T538V 014C1A 6000 C0F8 14CD0 29504+ STD FR0,T538V 014C1E 6000 C0F8 14CD0 29505+ STD FR0,T538V 014C22 6000 C0F8 14CD0 29506+ STD FR0,T538V 014C26 6000 C0F8 14CD0 29507+ STD FR0,T538V 014C2A 6000 C0F8 14CD0 29508+ STD FR0,T538V 014C2E 6000 C0F8 14CD0 29509+ STD FR0,T538V 014C32 6000 C0F8 14CD0 29510+ STD FR0,T538V 014C36 6000 C0F8 14CD0 29511+ STD FR0,T538V 014C3A 6000 C0F8 14CD0 29512+ STD FR0,T538V 014C3E 6000 C0F8 14CD0 29513+ STD FR0,T538V 014C42 6000 C0F8 14CD0 29514+ STD FR0,T538V 014C46 6000 C0F8 14CD0 29515+ STD FR0,T538V 014C4A 6000 C0F8 14CD0 29516+ STD FR0,T538V 014C4E 6000 C0F8 14CD0 29517+ STD FR0,T538V 014C52 6000 C0F8 14CD0 29518+ STD FR0,T538V 014C56 6000 C0F8 14CD0 29519+ STD FR0,T538V 014C5A 6000 C0F8 14CD0 29520+ STD FR0,T538V 014C5E 6000 C0F8 14CD0 29521+ STD FR0,T538V 014C62 6000 C0F8 14CD0 29522+ STD FR0,T538V 014C66 6000 C0F8 14CD0 29523+ STD FR0,T538V 014C6A 6000 C0F8 14CD0 29524+ STD FR0,T538V 014C6E 6000 C0F8 14CD0 29525+ STD FR0,T538V 014C72 6000 C0F8 14CD0 29526+ STD FR0,T538V 014C76 6000 C0F8 14CD0 29527+ STD FR0,T538V 014C7A 6000 C0F8 14CD0 29528+ STD FR0,T538V 014C7E 6000 C0F8 14CD0 29529+ STD FR0,T538V 014C82 6000 C0F8 14CD0 29530+ STD FR0,T538V 014C86 6000 C0F8 14CD0 29531+ STD FR0,T538V 014C8A 6000 C0F8 14CD0 29532+ STD FR0,T538V 014C8E 6000 C0F8 14CD0 29533+ STD FR0,T538V 014C92 6000 C0F8 14CD0 29534+ STD FR0,T538V 014C96 6000 C0F8 14CD0 29535+ STD FR0,T538V 014C9A 6000 C0F8 14CD0 29536+ STD FR0,T538V 014C9E 6000 C0F8 14CD0 29537+ STD FR0,T538V 014CA2 6000 C0F8 14CD0 29538+ STD FR0,T538V 014CA6 6000 C0F8 14CD0 29539+ STD FR0,T538V 014CAA 6000 C0F8 14CD0 29540+ STD FR0,T538V 014CAE 6000 C0F8 14CD0 29541+ STD FR0,T538V PAGE 540 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014CB2 6000 C0F8 14CD0 29542+ STD FR0,T538V 014CB6 6000 C0F8 14CD0 29543+ STD FR0,T538V 014CBA 6000 C0F8 14CD0 29544+ STD FR0,T538V 29545+* 014CBE 06FB 29546 BCTR R15,R11 29547 TSIMRET 014CC0 58F0 C100 14CD8 29548+ L R15,=A(SAVETST) R15 := current save area 014CC4 58DF 0004 00004 29549+ L R13,4(R15) get old save area back 014CC8 98EC D00C 0000C 29550+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014CCC 07FE 29551+ BR 14 RETURN 02000000 29552 * 014CD0 29553 T538V DS 1D 29554 TSIMEND 014CD8 29555+ LTORG 014CD8 00000458 29556 =A(SAVETST) 14CDC 29557+T538TEND EQU * 29558 * 29559 * Test 539 -- STD R,m (unal) ------------------------------- 29560 * 29561 TSIMBEG T539,10000,50,1,C'STD R,m (unal)' 29562+* 003E04 29563+TDSCDAT CSECT 003E08 29564+ DS 0D 29565+* 003E08 00014CE0 29566+T539TDSC DC A(T539) // TENTRY 003E0C 00000114 29567+ DC A(T539TEND-T539) // TLENGTH 003E10 00002710 29568+ DC F'10000' // TLRCNT 003E14 00000032 29569+ DC F'50' // TIGCNT 003E18 00000001 29570+ DC F'1' // TLTYPE 001C34 29571+TEXT CSECT 001C34 E3F5F3F9 29572+SPTR2601 DC C'T539' 003E1C 29573+TDSCDAT CSECT 003E1C 29574+ DS 0F 003E1C 04001C34 29575+ DC AL1(L'SPTR2601),AL3(SPTR2601) 001C38 29576+TEXT CSECT 001C38 E2E3C440D96B9440 29577+SPTR2602 DC C'STD R,m (unal)' 003E20 29578+TDSCDAT CSECT 003E20 29579+ DS 0F 003E20 0E001C38 29580+ DC AL1(L'SPTR2602),AL3(SPTR2602) 29581+* 004CEC 29582+TDSCTBL CSECT 04CEC 29583+T539TPTR EQU * 004CEC 00003E08 29584+ DC A(T539TDSC) enabled test 29585+* 014CDC 29586+TCODE CSECT 014CE0 29587+ DS 0D ensure double word alignment for test 014CE0 29588+T539 DS 0H 01650000 014CE0 90EC D00C 0000C 29589+ STM 14,12,12(13) SAVE REGISTERS 02950000 014CE4 18CF 29590+ LR R12,R15 base register := entry address 14CE0 29591+ USING T539,R12 declare code base register 014CE6 41B0 C022 14D02 29592+ LA R11,T539L load loop target to R11 014CEA 58F0 C110 14DF0 29593+ L R15,=A(SAVETST) R15 := current save area 014CEE 50DF 0004 00004 29594+ ST R13,4(R15) set back pointer in current save area 014CF2 182D 29595+ LR R2,R13 remember callers save area 014CF4 18DF 29596+ LR R13,R15 setup current save area PAGE 541 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014CF6 50D2 0008 00008 29597+ ST R13,8(R2) set forw pointer in callers save area 00000 29598+ USING TDSC,R1 declare TDSC base register 014CFA 58F0 1008 00008 29599+ L R15,TLRCNT load local repeat count to R15 29600+* 29601 * 014CFE 4130 C100 14DE0 29602 LA R3,T539V 29603 T539L REPINS STD,(FR0,1(R3)) repeat: STD FR0,1(R3)' 29604+* 29605+* build from sublist &ALIST a comma separated string &ARGS 29606+* 29607+* 29608+* 29609+* 29610+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 29611+* this allows to transfer the repeat count from last TDSCGEN call 29612+* 29613+* 14D02 29614+T539L EQU * 29615+* 29616+* write a comment indicating what REPINS does (in case NOGEN in effect) 29617+* 29618+*,// REPINS: do 50 times: 29619+* 29620+* MNOTE requires that ' is doubled for expanded variables 29621+* thus build &MASTR as a copy of '&ARGS with ' doubled 29622+* 29623+* 29624+*,// STD FR0,1(R3) 29625+* 29626+* finally generate code: &ICNT copies of &CODE &ARGS 29627+* 014D02 6003 0001 00001 29628+ STD FR0,1(R3) 014D06 6003 0001 00001 29629+ STD FR0,1(R3) 014D0A 6003 0001 00001 29630+ STD FR0,1(R3) 014D0E 6003 0001 00001 29631+ STD FR0,1(R3) 014D12 6003 0001 00001 29632+ STD FR0,1(R3) 014D16 6003 0001 00001 29633+ STD FR0,1(R3) 014D1A 6003 0001 00001 29634+ STD FR0,1(R3) 014D1E 6003 0001 00001 29635+ STD FR0,1(R3) 014D22 6003 0001 00001 29636+ STD FR0,1(R3) 014D26 6003 0001 00001 29637+ STD FR0,1(R3) 014D2A 6003 0001 00001 29638+ STD FR0,1(R3) 014D2E 6003 0001 00001 29639+ STD FR0,1(R3) 014D32 6003 0001 00001 29640+ STD FR0,1(R3) 014D36 6003 0001 00001 29641+ STD FR0,1(R3) 014D3A 6003 0001 00001 29642+ STD FR0,1(R3) 014D3E 6003 0001 00001 29643+ STD FR0,1(R3) 014D42 6003 0001 00001 29644+ STD FR0,1(R3) 014D46 6003 0001 00001 29645+ STD FR0,1(R3) 014D4A 6003 0001 00001 29646+ STD FR0,1(R3) 014D4E 6003 0001 00001 29647+ STD FR0,1(R3) 014D52 6003 0001 00001 29648+ STD FR0,1(R3) 014D56 6003 0001 00001 29649+ STD FR0,1(R3) 014D5A 6003 0001 00001 29650+ STD FR0,1(R3) 014D5E 6003 0001 00001 29651+ STD FR0,1(R3) PAGE 542 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014D62 6003 0001 00001 29652+ STD FR0,1(R3) 014D66 6003 0001 00001 29653+ STD FR0,1(R3) 014D6A 6003 0001 00001 29654+ STD FR0,1(R3) 014D6E 6003 0001 00001 29655+ STD FR0,1(R3) 014D72 6003 0001 00001 29656+ STD FR0,1(R3) 014D76 6003 0001 00001 29657+ STD FR0,1(R3) 014D7A 6003 0001 00001 29658+ STD FR0,1(R3) 014D7E 6003 0001 00001 29659+ STD FR0,1(R3) 014D82 6003 0001 00001 29660+ STD FR0,1(R3) 014D86 6003 0001 00001 29661+ STD FR0,1(R3) 014D8A 6003 0001 00001 29662+ STD FR0,1(R3) 014D8E 6003 0001 00001 29663+ STD FR0,1(R3) 014D92 6003 0001 00001 29664+ STD FR0,1(R3) 014D96 6003 0001 00001 29665+ STD FR0,1(R3) 014D9A 6003 0001 00001 29666+ STD FR0,1(R3) 014D9E 6003 0001 00001 29667+ STD FR0,1(R3) 014DA2 6003 0001 00001 29668+ STD FR0,1(R3) 014DA6 6003 0001 00001 29669+ STD FR0,1(R3) 014DAA 6003 0001 00001 29670+ STD FR0,1(R3) 014DAE 6003 0001 00001 29671+ STD FR0,1(R3) 014DB2 6003 0001 00001 29672+ STD FR0,1(R3) 014DB6 6003 0001 00001 29673+ STD FR0,1(R3) 014DBA 6003 0001 00001 29674+ STD FR0,1(R3) 014DBE 6003 0001 00001 29675+ STD FR0,1(R3) 014DC2 6003 0001 00001 29676+ STD FR0,1(R3) 014DC6 6003 0001 00001 29677+ STD FR0,1(R3) 29678+* 014DCA 06FB 29679 BCTR R15,R11 29680 TSIMRET 014DCC 58F0 C110 14DF0 29681+ L R15,=A(SAVETST) R15 := current save area 014DD0 58DF 0004 00004 29682+ L R13,4(R15) get old save area back 014DD4 98EC D00C 0000C 29683+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014DD8 07FE 29684+ BR 14 RETURN 02000000 29685 * 014DE0 29686 T539V DS 2D 29687 TSIMEND 014DF0 29688+ LTORG 014DF0 00000458 29689 =A(SAVETST) 14DF4 29690+T539TEND EQU * 29691 * 29692 * Test 54x -- long float arithmetic ======================== 29693 * 29694 * Test 540 -- ADR R,R -------------------------------------- 29695 * 29696 TSIMBEG T540,7000,50,1,C'ADR R,R' 29697+* 003E24 29698+TDSCDAT CSECT 003E28 29699+ DS 0D 29700+* 003E28 00014DF8 29701+T540TDSC DC A(T540) // TENTRY 003E2C 000000A4 29702+ DC A(T540TEND-T540) // TLENGTH 003E30 00001B58 29703+ DC F'7000' // TLRCNT 003E34 00000032 29704+ DC F'50' // TIGCNT 003E38 00000001 29705+ DC F'1' // TLTYPE 001C46 29706+TEXT CSECT PAGE 543 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 001C46 E3F5F4F0 29707+SPTR2613 DC C'T540' 003E3C 29708+TDSCDAT CSECT 003E3C 29709+ DS 0F 003E3C 04001C46 29710+ DC AL1(L'SPTR2613),AL3(SPTR2613) 001C4A 29711+TEXT CSECT 001C4A C1C4D940D96BD9 29712+SPTR2614 DC C'ADR R,R' 003E40 29713+TDSCDAT CSECT 003E40 29714+ DS 0F 003E40 07001C4A 29715+ DC AL1(L'SPTR2614),AL3(SPTR2614) 29716+* 004CF0 29717+TDSCTBL CSECT 04CF0 29718+T540TPTR EQU * 004CF0 00003E28 29719+ DC A(T540TDSC) enabled test 29720+* 014DF4 29721+TCODE CSECT 014DF8 29722+ DS 0D ensure double word alignment for test 014DF8 29723+T540 DS 0H 01650000 014DF8 90EC D00C 0000C 29724+ STM 14,12,12(13) SAVE REGISTERS 02950000 014DFC 18CF 29725+ LR R12,R15 base register := entry address 14DF8 29726+ USING T540,R12 declare code base register 014DFE 41B0 C024 14E1C 29727+ LA R11,T540L load loop target to R11 014E02 58F0 C0A0 14E98 29728+ L R15,=A(SAVETST) R15 := current save area 014E06 50DF 0004 00004 29729+ ST R13,4(R15) set back pointer in current save area 014E0A 182D 29730+ LR R2,R13 remember callers save area 014E0C 18DF 29731+ LR R13,R15 setup current save area 014E0E 50D2 0008 00008 29732+ ST R13,8(R2) set forw pointer in callers save area 00000 29733+ USING TDSC,R1 declare TDSC base register 014E12 58F0 1008 00008 29734+ L R15,TLRCNT load local repeat count to R15 29735+* 29736 * 014E16 2B00 29737 SDR FR0,FR0 014E18 6820 C098 14E90 29738 LD FR2,=D'1.1' 29739 T540L REPINS ADR,(FR0,FR2) repeat: ADR FR0,FR2 29740+* 29741+* build from sublist &ALIST a comma separated string &ARGS 29742+* 29743+* 29744+* 29745+* 29746+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 29747+* this allows to transfer the repeat count from last TDSCGEN call 29748+* 29749+* 14E1C 29750+T540L EQU * 29751+* 29752+* write a comment indicating what REPINS does (in case NOGEN in effect) 29753+* 29754+*,// REPINS: do 50 times: 29755+* 29756+* MNOTE requires that ' is doubled for expanded variables 29757+* thus build &MASTR as a copy of '&ARGS with ' doubled 29758+* 29759+* 29760+*,// ADR FR0,FR2 29761+* PAGE 544 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 29762+* finally generate code: &ICNT copies of &CODE &ARGS 29763+* 014E1C 2A02 29764+ ADR FR0,FR2 014E1E 2A02 29765+ ADR FR0,FR2 014E20 2A02 29766+ ADR FR0,FR2 014E22 2A02 29767+ ADR FR0,FR2 014E24 2A02 29768+ ADR FR0,FR2 014E26 2A02 29769+ ADR FR0,FR2 014E28 2A02 29770+ ADR FR0,FR2 014E2A 2A02 29771+ ADR FR0,FR2 014E2C 2A02 29772+ ADR FR0,FR2 014E2E 2A02 29773+ ADR FR0,FR2 014E30 2A02 29774+ ADR FR0,FR2 014E32 2A02 29775+ ADR FR0,FR2 014E34 2A02 29776+ ADR FR0,FR2 014E36 2A02 29777+ ADR FR0,FR2 014E38 2A02 29778+ ADR FR0,FR2 014E3A 2A02 29779+ ADR FR0,FR2 014E3C 2A02 29780+ ADR FR0,FR2 014E3E 2A02 29781+ ADR FR0,FR2 014E40 2A02 29782+ ADR FR0,FR2 014E42 2A02 29783+ ADR FR0,FR2 014E44 2A02 29784+ ADR FR0,FR2 014E46 2A02 29785+ ADR FR0,FR2 014E48 2A02 29786+ ADR FR0,FR2 014E4A 2A02 29787+ ADR FR0,FR2 014E4C 2A02 29788+ ADR FR0,FR2 014E4E 2A02 29789+ ADR FR0,FR2 014E50 2A02 29790+ ADR FR0,FR2 014E52 2A02 29791+ ADR FR0,FR2 014E54 2A02 29792+ ADR FR0,FR2 014E56 2A02 29793+ ADR FR0,FR2 014E58 2A02 29794+ ADR FR0,FR2 014E5A 2A02 29795+ ADR FR0,FR2 014E5C 2A02 29796+ ADR FR0,FR2 014E5E 2A02 29797+ ADR FR0,FR2 014E60 2A02 29798+ ADR FR0,FR2 014E62 2A02 29799+ ADR FR0,FR2 014E64 2A02 29800+ ADR FR0,FR2 014E66 2A02 29801+ ADR FR0,FR2 014E68 2A02 29802+ ADR FR0,FR2 014E6A 2A02 29803+ ADR FR0,FR2 014E6C 2A02 29804+ ADR FR0,FR2 014E6E 2A02 29805+ ADR FR0,FR2 014E70 2A02 29806+ ADR FR0,FR2 014E72 2A02 29807+ ADR FR0,FR2 014E74 2A02 29808+ ADR FR0,FR2 014E76 2A02 29809+ ADR FR0,FR2 014E78 2A02 29810+ ADR FR0,FR2 014E7A 2A02 29811+ ADR FR0,FR2 014E7C 2A02 29812+ ADR FR0,FR2 014E7E 2A02 29813+ ADR FR0,FR2 29814+* 014E80 06FB 29815 BCTR R15,R11 29816 TSIMRET PAGE 545 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014E82 58F0 C0A0 14E98 29817+ L R15,=A(SAVETST) R15 := current save area 014E86 58DF 0004 00004 29818+ L R13,4(R15) get old save area back 014E8A 98EC D00C 0000C 29819+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014E8E 07FE 29820+ BR 14 RETURN 02000000 29821 TSIMEND 014E90 29822+ LTORG 014E90 411199999999999A 29823 =D'1.1' 014E98 00000458 29824 =A(SAVETST) 14E9C 29825+T540TEND EQU * 29826 * 29827 * Test 541 -- AD R,m --------------------------------------- 29828 * 29829 TSIMBEG T541,5500,50,1,C'AD R,m' 29830+* 003E44 29831+TDSCDAT CSECT 003E48 29832+ DS 0D 29833+* 003E48 00014EA0 29834+T541TDSC DC A(T541) // TENTRY 003E4C 00000104 29835+ DC A(T541TEND-T541) // TLENGTH 003E50 0000157C 29836+ DC F'5500' // TLRCNT 003E54 00000032 29837+ DC F'50' // TIGCNT 003E58 00000001 29838+ DC F'1' // TLTYPE 001C51 29839+TEXT CSECT 001C51 E3F5F4F1 29840+SPTR2625 DC C'T541' 003E5C 29841+TDSCDAT CSECT 003E5C 29842+ DS 0F 003E5C 04001C51 29843+ DC AL1(L'SPTR2625),AL3(SPTR2625) 001C55 29844+TEXT CSECT 001C55 C1C440D96B94 29845+SPTR2626 DC C'AD R,m' 003E60 29846+TDSCDAT CSECT 003E60 29847+ DS 0F 003E60 06001C55 29848+ DC AL1(L'SPTR2626),AL3(SPTR2626) 29849+* 004CF4 29850+TDSCTBL CSECT 04CF4 29851+T541TPTR EQU * 004CF4 00003E48 29852+ DC A(T541TDSC) enabled test 29853+* 014E9C 29854+TCODE CSECT 014EA0 29855+ DS 0D ensure double word alignment for test 014EA0 29856+T541 DS 0H 01650000 014EA0 90EC D00C 0000C 29857+ STM 14,12,12(13) SAVE REGISTERS 02950000 014EA4 18CF 29858+ LR R12,R15 base register := entry address 14EA0 29859+ USING T541,R12 declare code base register 014EA6 41B0 C020 14EC0 29860+ LA R11,T541L load loop target to R11 014EAA 58F0 C100 14FA0 29861+ L R15,=A(SAVETST) R15 := current save area 014EAE 50DF 0004 00004 29862+ ST R13,4(R15) set back pointer in current save area 014EB2 182D 29863+ LR R2,R13 remember callers save area 014EB4 18DF 29864+ LR R13,R15 setup current save area 014EB6 50D2 0008 00008 29865+ ST R13,8(R2) set forw pointer in callers save area 00000 29866+ USING TDSC,R1 declare TDSC base register 014EBA 58F0 1008 00008 29867+ L R15,TLRCNT load local repeat count to R15 29868+* 29869 * 014EBE 2B00 29870 SDR FR0,FR0 29871 T541L REPINS AD,(FR0,=D'1.1') repeat: AD FR0,=D'1.1' PAGE 546 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 29872+* 29873+* build from sublist &ALIST a comma separated string &ARGS 29874+* 29875+* 29876+* 29877+* 29878+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 29879+* this allows to transfer the repeat count from last TDSCGEN call 29880+* 29881+* 14EC0 29882+T541L EQU * 29883+* 29884+* write a comment indicating what REPINS does (in case NOGEN in effect) 29885+* 29886+*,// REPINS: do 50 times: 29887+* 29888+* MNOTE requires that ' is doubled for expanded variables 29889+* thus build &MASTR as a copy of '&ARGS with ' doubled 29890+* 29891+* 29892+*,// AD FR0,=D'1.1' 29893+* 29894+* finally generate code: &ICNT copies of &CODE &ARGS 29895+* 014EC0 6A00 C0F8 14F98 29896+ AD FR0,=D'1.1' 014EC4 6A00 C0F8 14F98 29897+ AD FR0,=D'1.1' 014EC8 6A00 C0F8 14F98 29898+ AD FR0,=D'1.1' 014ECC 6A00 C0F8 14F98 29899+ AD FR0,=D'1.1' 014ED0 6A00 C0F8 14F98 29900+ AD FR0,=D'1.1' 014ED4 6A00 C0F8 14F98 29901+ AD FR0,=D'1.1' 014ED8 6A00 C0F8 14F98 29902+ AD FR0,=D'1.1' 014EDC 6A00 C0F8 14F98 29903+ AD FR0,=D'1.1' 014EE0 6A00 C0F8 14F98 29904+ AD FR0,=D'1.1' 014EE4 6A00 C0F8 14F98 29905+ AD FR0,=D'1.1' 014EE8 6A00 C0F8 14F98 29906+ AD FR0,=D'1.1' 014EEC 6A00 C0F8 14F98 29907+ AD FR0,=D'1.1' 014EF0 6A00 C0F8 14F98 29908+ AD FR0,=D'1.1' 014EF4 6A00 C0F8 14F98 29909+ AD FR0,=D'1.1' 014EF8 6A00 C0F8 14F98 29910+ AD FR0,=D'1.1' 014EFC 6A00 C0F8 14F98 29911+ AD FR0,=D'1.1' 014F00 6A00 C0F8 14F98 29912+ AD FR0,=D'1.1' 014F04 6A00 C0F8 14F98 29913+ AD FR0,=D'1.1' 014F08 6A00 C0F8 14F98 29914+ AD FR0,=D'1.1' 014F0C 6A00 C0F8 14F98 29915+ AD FR0,=D'1.1' 014F10 6A00 C0F8 14F98 29916+ AD FR0,=D'1.1' 014F14 6A00 C0F8 14F98 29917+ AD FR0,=D'1.1' 014F18 6A00 C0F8 14F98 29918+ AD FR0,=D'1.1' 014F1C 6A00 C0F8 14F98 29919+ AD FR0,=D'1.1' 014F20 6A00 C0F8 14F98 29920+ AD FR0,=D'1.1' 014F24 6A00 C0F8 14F98 29921+ AD FR0,=D'1.1' 014F28 6A00 C0F8 14F98 29922+ AD FR0,=D'1.1' 014F2C 6A00 C0F8 14F98 29923+ AD FR0,=D'1.1' 014F30 6A00 C0F8 14F98 29924+ AD FR0,=D'1.1' 014F34 6A00 C0F8 14F98 29925+ AD FR0,=D'1.1' 014F38 6A00 C0F8 14F98 29926+ AD FR0,=D'1.1' PAGE 547 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014F3C 6A00 C0F8 14F98 29927+ AD FR0,=D'1.1' 014F40 6A00 C0F8 14F98 29928+ AD FR0,=D'1.1' 014F44 6A00 C0F8 14F98 29929+ AD FR0,=D'1.1' 014F48 6A00 C0F8 14F98 29930+ AD FR0,=D'1.1' 014F4C 6A00 C0F8 14F98 29931+ AD FR0,=D'1.1' 014F50 6A00 C0F8 14F98 29932+ AD FR0,=D'1.1' 014F54 6A00 C0F8 14F98 29933+ AD FR0,=D'1.1' 014F58 6A00 C0F8 14F98 29934+ AD FR0,=D'1.1' 014F5C 6A00 C0F8 14F98 29935+ AD FR0,=D'1.1' 014F60 6A00 C0F8 14F98 29936+ AD FR0,=D'1.1' 014F64 6A00 C0F8 14F98 29937+ AD FR0,=D'1.1' 014F68 6A00 C0F8 14F98 29938+ AD FR0,=D'1.1' 014F6C 6A00 C0F8 14F98 29939+ AD FR0,=D'1.1' 014F70 6A00 C0F8 14F98 29940+ AD FR0,=D'1.1' 014F74 6A00 C0F8 14F98 29941+ AD FR0,=D'1.1' 014F78 6A00 C0F8 14F98 29942+ AD FR0,=D'1.1' 014F7C 6A00 C0F8 14F98 29943+ AD FR0,=D'1.1' 014F80 6A00 C0F8 14F98 29944+ AD FR0,=D'1.1' 014F84 6A00 C0F8 14F98 29945+ AD FR0,=D'1.1' 29946+* 014F88 06FB 29947 BCTR R15,R11 29948 TSIMRET 014F8A 58F0 C100 14FA0 29949+ L R15,=A(SAVETST) R15 := current save area 014F8E 58DF 0004 00004 29950+ L R13,4(R15) get old save area back 014F92 98EC D00C 0000C 29951+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 014F96 07FE 29952+ BR 14 RETURN 02000000 29953 TSIMEND 014F98 29954+ LTORG 014F98 411199999999999A 29955 =D'1.1' 014FA0 00000458 29956 =A(SAVETST) 14FA4 29957+T541TEND EQU * 29958 * 29959 * Test 542 -- SDR R,R -------------------------------------- 29960 * 29961 TSIMBEG T542,7000,50,1,C'SDR R,R' 29962+* 003E64 29963+TDSCDAT CSECT 003E68 29964+ DS 0D 29965+* 003E68 00014FA8 29966+T542TDSC DC A(T542) // TENTRY 003E6C 000000A4 29967+ DC A(T542TEND-T542) // TLENGTH 003E70 00001B58 29968+ DC F'7000' // TLRCNT 003E74 00000032 29969+ DC F'50' // TIGCNT 003E78 00000001 29970+ DC F'1' // TLTYPE 001C5B 29971+TEXT CSECT 001C5B E3F5F4F2 29972+SPTR2637 DC C'T542' 003E7C 29973+TDSCDAT CSECT 003E7C 29974+ DS 0F 003E7C 04001C5B 29975+ DC AL1(L'SPTR2637),AL3(SPTR2637) 001C5F 29976+TEXT CSECT 001C5F E2C4D940D96BD9 29977+SPTR2638 DC C'SDR R,R' 003E80 29978+TDSCDAT CSECT 003E80 29979+ DS 0F 003E80 07001C5F 29980+ DC AL1(L'SPTR2638),AL3(SPTR2638) 29981+* PAGE 548 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004CF8 29982+TDSCTBL CSECT 04CF8 29983+T542TPTR EQU * 004CF8 00003E68 29984+ DC A(T542TDSC) enabled test 29985+* 014FA4 29986+TCODE CSECT 014FA8 29987+ DS 0D ensure double word alignment for test 014FA8 29988+T542 DS 0H 01650000 014FA8 90EC D00C 0000C 29989+ STM 14,12,12(13) SAVE REGISTERS 02950000 014FAC 18CF 29990+ LR R12,R15 base register := entry address 14FA8 29991+ USING T542,R12 declare code base register 014FAE 41B0 C024 14FCC 29992+ LA R11,T542L load loop target to R11 014FB2 58F0 C0A0 15048 29993+ L R15,=A(SAVETST) R15 := current save area 014FB6 50DF 0004 00004 29994+ ST R13,4(R15) set back pointer in current save area 014FBA 182D 29995+ LR R2,R13 remember callers save area 014FBC 18DF 29996+ LR R13,R15 setup current save area 014FBE 50D2 0008 00008 29997+ ST R13,8(R2) set forw pointer in callers save area 00000 29998+ USING TDSC,R1 declare TDSC base register 014FC2 58F0 1008 00008 29999+ L R15,TLRCNT load local repeat count to R15 30000+* 30001 * 014FC6 2B00 30002 SDR FR0,FR0 014FC8 6820 C098 15040 30003 LD FR2,=D'1.1' 30004 T542L REPINS SDR,(FR0,FR2) repeat: SDR FR0,FR2 30005+* 30006+* build from sublist &ALIST a comma separated string &ARGS 30007+* 30008+* 30009+* 30010+* 30011+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 30012+* this allows to transfer the repeat count from last TDSCGEN call 30013+* 30014+* 14FCC 30015+T542L EQU * 30016+* 30017+* write a comment indicating what REPINS does (in case NOGEN in effect) 30018+* 30019+*,// REPINS: do 50 times: 30020+* 30021+* MNOTE requires that ' is doubled for expanded variables 30022+* thus build &MASTR as a copy of '&ARGS with ' doubled 30023+* 30024+* 30025+*,// SDR FR0,FR2 30026+* 30027+* finally generate code: &ICNT copies of &CODE &ARGS 30028+* 014FCC 2B02 30029+ SDR FR0,FR2 014FCE 2B02 30030+ SDR FR0,FR2 014FD0 2B02 30031+ SDR FR0,FR2 014FD2 2B02 30032+ SDR FR0,FR2 014FD4 2B02 30033+ SDR FR0,FR2 014FD6 2B02 30034+ SDR FR0,FR2 014FD8 2B02 30035+ SDR FR0,FR2 014FDA 2B02 30036+ SDR FR0,FR2 PAGE 549 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 014FDC 2B02 30037+ SDR FR0,FR2 014FDE 2B02 30038+ SDR FR0,FR2 014FE0 2B02 30039+ SDR FR0,FR2 014FE2 2B02 30040+ SDR FR0,FR2 014FE4 2B02 30041+ SDR FR0,FR2 014FE6 2B02 30042+ SDR FR0,FR2 014FE8 2B02 30043+ SDR FR0,FR2 014FEA 2B02 30044+ SDR FR0,FR2 014FEC 2B02 30045+ SDR FR0,FR2 014FEE 2B02 30046+ SDR FR0,FR2 014FF0 2B02 30047+ SDR FR0,FR2 014FF2 2B02 30048+ SDR FR0,FR2 014FF4 2B02 30049+ SDR FR0,FR2 014FF6 2B02 30050+ SDR FR0,FR2 014FF8 2B02 30051+ SDR FR0,FR2 014FFA 2B02 30052+ SDR FR0,FR2 014FFC 2B02 30053+ SDR FR0,FR2 014FFE 2B02 30054+ SDR FR0,FR2 015000 2B02 30055+ SDR FR0,FR2 015002 2B02 30056+ SDR FR0,FR2 015004 2B02 30057+ SDR FR0,FR2 015006 2B02 30058+ SDR FR0,FR2 015008 2B02 30059+ SDR FR0,FR2 01500A 2B02 30060+ SDR FR0,FR2 01500C 2B02 30061+ SDR FR0,FR2 01500E 2B02 30062+ SDR FR0,FR2 015010 2B02 30063+ SDR FR0,FR2 015012 2B02 30064+ SDR FR0,FR2 015014 2B02 30065+ SDR FR0,FR2 015016 2B02 30066+ SDR FR0,FR2 015018 2B02 30067+ SDR FR0,FR2 01501A 2B02 30068+ SDR FR0,FR2 01501C 2B02 30069+ SDR FR0,FR2 01501E 2B02 30070+ SDR FR0,FR2 015020 2B02 30071+ SDR FR0,FR2 015022 2B02 30072+ SDR FR0,FR2 015024 2B02 30073+ SDR FR0,FR2 015026 2B02 30074+ SDR FR0,FR2 015028 2B02 30075+ SDR FR0,FR2 01502A 2B02 30076+ SDR FR0,FR2 01502C 2B02 30077+ SDR FR0,FR2 01502E 2B02 30078+ SDR FR0,FR2 30079+* 015030 06FB 30080 BCTR R15,R11 30081 TSIMRET 015032 58F0 C0A0 15048 30082+ L R15,=A(SAVETST) R15 := current save area 015036 58DF 0004 00004 30083+ L R13,4(R15) get old save area back 01503A 98EC D00C 0000C 30084+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01503E 07FE 30085+ BR 14 RETURN 02000000 30086 TSIMEND 015040 30087+ LTORG 015040 411199999999999A 30088 =D'1.1' 015048 00000458 30089 =A(SAVETST) 1504C 30090+T542TEND EQU * 30091 * PAGE 550 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 30092 * Test 543 -- SD R,m --------------------------------------- 30093 * 30094 TSIMBEG T543,5500,50,1,C'SD R,m' 30095+* 003E84 30096+TDSCDAT CSECT 003E88 30097+ DS 0D 30098+* 003E88 00015050 30099+T543TDSC DC A(T543) // TENTRY 003E8C 00000104 30100+ DC A(T543TEND-T543) // TLENGTH 003E90 0000157C 30101+ DC F'5500' // TLRCNT 003E94 00000032 30102+ DC F'50' // TIGCNT 003E98 00000001 30103+ DC F'1' // TLTYPE 001C66 30104+TEXT CSECT 001C66 E3F5F4F3 30105+SPTR2649 DC C'T543' 003E9C 30106+TDSCDAT CSECT 003E9C 30107+ DS 0F 003E9C 04001C66 30108+ DC AL1(L'SPTR2649),AL3(SPTR2649) 001C6A 30109+TEXT CSECT 001C6A E2C440D96B94 30110+SPTR2650 DC C'SD R,m' 003EA0 30111+TDSCDAT CSECT 003EA0 30112+ DS 0F 003EA0 06001C6A 30113+ DC AL1(L'SPTR2650),AL3(SPTR2650) 30114+* 004CFC 30115+TDSCTBL CSECT 04CFC 30116+T543TPTR EQU * 004CFC 00003E88 30117+ DC A(T543TDSC) enabled test 30118+* 01504C 30119+TCODE CSECT 015050 30120+ DS 0D ensure double word alignment for test 015050 30121+T543 DS 0H 01650000 015050 90EC D00C 0000C 30122+ STM 14,12,12(13) SAVE REGISTERS 02950000 015054 18CF 30123+ LR R12,R15 base register := entry address 15050 30124+ USING T543,R12 declare code base register 015056 41B0 C020 15070 30125+ LA R11,T543L load loop target to R11 01505A 58F0 C100 15150 30126+ L R15,=A(SAVETST) R15 := current save area 01505E 50DF 0004 00004 30127+ ST R13,4(R15) set back pointer in current save area 015062 182D 30128+ LR R2,R13 remember callers save area 015064 18DF 30129+ LR R13,R15 setup current save area 015066 50D2 0008 00008 30130+ ST R13,8(R2) set forw pointer in callers save area 00000 30131+ USING TDSC,R1 declare TDSC base register 01506A 58F0 1008 00008 30132+ L R15,TLRCNT load local repeat count to R15 30133+* 30134 * 01506E 2B00 30135 SDR FR0,FR0 30136 T543L REPINS SD,(FR0,=D'1.1') repeat: SD FR0,=D'1.1' 30137+* 30138+* build from sublist &ALIST a comma separated string &ARGS 30139+* 30140+* 30141+* 30142+* 30143+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 30144+* this allows to transfer the repeat count from last TDSCGEN call 30145+* 30146+* PAGE 551 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 15070 30147+T543L EQU * 30148+* 30149+* write a comment indicating what REPINS does (in case NOGEN in effect) 30150+* 30151+*,// REPINS: do 50 times: 30152+* 30153+* MNOTE requires that ' is doubled for expanded variables 30154+* thus build &MASTR as a copy of '&ARGS with ' doubled 30155+* 30156+* 30157+*,// SD FR0,=D'1.1' 30158+* 30159+* finally generate code: &ICNT copies of &CODE &ARGS 30160+* 015070 6B00 C0F8 15148 30161+ SD FR0,=D'1.1' 015074 6B00 C0F8 15148 30162+ SD FR0,=D'1.1' 015078 6B00 C0F8 15148 30163+ SD FR0,=D'1.1' 01507C 6B00 C0F8 15148 30164+ SD FR0,=D'1.1' 015080 6B00 C0F8 15148 30165+ SD FR0,=D'1.1' 015084 6B00 C0F8 15148 30166+ SD FR0,=D'1.1' 015088 6B00 C0F8 15148 30167+ SD FR0,=D'1.1' 01508C 6B00 C0F8 15148 30168+ SD FR0,=D'1.1' 015090 6B00 C0F8 15148 30169+ SD FR0,=D'1.1' 015094 6B00 C0F8 15148 30170+ SD FR0,=D'1.1' 015098 6B00 C0F8 15148 30171+ SD FR0,=D'1.1' 01509C 6B00 C0F8 15148 30172+ SD FR0,=D'1.1' 0150A0 6B00 C0F8 15148 30173+ SD FR0,=D'1.1' 0150A4 6B00 C0F8 15148 30174+ SD FR0,=D'1.1' 0150A8 6B00 C0F8 15148 30175+ SD FR0,=D'1.1' 0150AC 6B00 C0F8 15148 30176+ SD FR0,=D'1.1' 0150B0 6B00 C0F8 15148 30177+ SD FR0,=D'1.1' 0150B4 6B00 C0F8 15148 30178+ SD FR0,=D'1.1' 0150B8 6B00 C0F8 15148 30179+ SD FR0,=D'1.1' 0150BC 6B00 C0F8 15148 30180+ SD FR0,=D'1.1' 0150C0 6B00 C0F8 15148 30181+ SD FR0,=D'1.1' 0150C4 6B00 C0F8 15148 30182+ SD FR0,=D'1.1' 0150C8 6B00 C0F8 15148 30183+ SD FR0,=D'1.1' 0150CC 6B00 C0F8 15148 30184+ SD FR0,=D'1.1' 0150D0 6B00 C0F8 15148 30185+ SD FR0,=D'1.1' 0150D4 6B00 C0F8 15148 30186+ SD FR0,=D'1.1' 0150D8 6B00 C0F8 15148 30187+ SD FR0,=D'1.1' 0150DC 6B00 C0F8 15148 30188+ SD FR0,=D'1.1' 0150E0 6B00 C0F8 15148 30189+ SD FR0,=D'1.1' 0150E4 6B00 C0F8 15148 30190+ SD FR0,=D'1.1' 0150E8 6B00 C0F8 15148 30191+ SD FR0,=D'1.1' 0150EC 6B00 C0F8 15148 30192+ SD FR0,=D'1.1' 0150F0 6B00 C0F8 15148 30193+ SD FR0,=D'1.1' 0150F4 6B00 C0F8 15148 30194+ SD FR0,=D'1.1' 0150F8 6B00 C0F8 15148 30195+ SD FR0,=D'1.1' 0150FC 6B00 C0F8 15148 30196+ SD FR0,=D'1.1' 015100 6B00 C0F8 15148 30197+ SD FR0,=D'1.1' 015104 6B00 C0F8 15148 30198+ SD FR0,=D'1.1' 015108 6B00 C0F8 15148 30199+ SD FR0,=D'1.1' 01510C 6B00 C0F8 15148 30200+ SD FR0,=D'1.1' 015110 6B00 C0F8 15148 30201+ SD FR0,=D'1.1' PAGE 552 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015114 6B00 C0F8 15148 30202+ SD FR0,=D'1.1' 015118 6B00 C0F8 15148 30203+ SD FR0,=D'1.1' 01511C 6B00 C0F8 15148 30204+ SD FR0,=D'1.1' 015120 6B00 C0F8 15148 30205+ SD FR0,=D'1.1' 015124 6B00 C0F8 15148 30206+ SD FR0,=D'1.1' 015128 6B00 C0F8 15148 30207+ SD FR0,=D'1.1' 01512C 6B00 C0F8 15148 30208+ SD FR0,=D'1.1' 015130 6B00 C0F8 15148 30209+ SD FR0,=D'1.1' 015134 6B00 C0F8 15148 30210+ SD FR0,=D'1.1' 30211+* 015138 06FB 30212 BCTR R15,R11 30213 TSIMRET 01513A 58F0 C100 15150 30214+ L R15,=A(SAVETST) R15 := current save area 01513E 58DF 0004 00004 30215+ L R13,4(R15) get old save area back 015142 98EC D00C 0000C 30216+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015146 07FE 30217+ BR 14 RETURN 02000000 30218 TSIMEND 015148 30219+ LTORG 015148 411199999999999A 30220 =D'1.1' 015150 00000458 30221 =A(SAVETST) 15154 30222+T543TEND EQU * 30223 * 30224 * Test 544 -- MDR R,R -------------------------------------- 30225 * 30226 TSIMBEG T544,6000,50,10,C'MDR R,R' 30227+* 003EA4 30228+TDSCDAT CSECT 003EA8 30229+ DS 0D 30230+* 003EA8 00015158 30231+T544TDSC DC A(T544) // TENTRY 003EAC 000000B4 30232+ DC A(T544TEND-T544) // TLENGTH 003EB0 00001770 30233+ DC F'6000' // TLRCNT 003EB4 00000032 30234+ DC F'50' // TIGCNT 003EB8 0000000A 30235+ DC F'10' // TLTYPE 001C70 30236+TEXT CSECT 001C70 E3F5F4F4 30237+SPTR2661 DC C'T544' 003EBC 30238+TDSCDAT CSECT 003EBC 30239+ DS 0F 003EBC 04001C70 30240+ DC AL1(L'SPTR2661),AL3(SPTR2661) 001C74 30241+TEXT CSECT 001C74 D4C4D940D96BD9 30242+SPTR2662 DC C'MDR R,R' 003EC0 30243+TDSCDAT CSECT 003EC0 30244+ DS 0F 003EC0 07001C74 30245+ DC AL1(L'SPTR2662),AL3(SPTR2662) 30246+* 004D00 30247+TDSCTBL CSECT 04D00 30248+T544TPTR EQU * 004D00 00003EA8 30249+ DC A(T544TDSC) enabled test 30250+* 015154 30251+TCODE CSECT 015158 30252+ DS 0D ensure double word alignment for test 015158 30253+T544 DS 0H 01650000 015158 90EC D00C 0000C 30254+ STM 14,12,12(13) SAVE REGISTERS 02950000 01515C 18CF 30255+ LR R12,R15 base register := entry address 15158 30256+ USING T544,R12 declare code base register PAGE 553 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01515E 41B0 C022 1517A 30257+ LA R11,T544L load loop target to R11 015162 58F0 C0B0 15208 30258+ L R15,=A(SAVETST) R15 := current save area 015166 50DF 0004 00004 30259+ ST R13,4(R15) set back pointer in current save area 01516A 182D 30260+ LR R2,R13 remember callers save area 01516C 18DF 30261+ LR R13,R15 setup current save area 01516E 50D2 0008 00008 30262+ ST R13,8(R2) set forw pointer in callers save area 00000 30263+ USING TDSC,R1 declare TDSC base register 015172 58F0 1008 00008 30264+ L R15,TLRCNT load local repeat count to R15 30265+* 30266 * inner loop logic: 30267 * load FR0 with 1.0 30268 * multiply 50 times by 1.1 30269 * 015176 6820 C0A0 151F8 30270 LD FR2,=D'1.1' 01517A 6800 C0A8 15200 30271 T544L LD FR0,=D'1.0' 30272 REPINS MDR,(FR0,FR2) repeat: MDR FR0,FR2 30273+* 30274+* build from sublist &ALIST a comma separated string &ARGS 30275+* 30276+* 30277+* 30278+* 30279+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 30280+* this allows to transfer the repeat count from last TDSCGEN call 30281+* 30282+* 30283+* 30284+* write a comment indicating what REPINS does (in case NOGEN in effect) 30285+* 30286+*,// REPINS: do 50 times: 30287+* 30288+* MNOTE requires that ' is doubled for expanded variables 30289+* thus build &MASTR as a copy of '&ARGS with ' doubled 30290+* 30291+* 30292+*,// MDR FR0,FR2 30293+* 30294+* finally generate code: &ICNT copies of &CODE &ARGS 30295+* 01517E 2C02 30296+ MDR FR0,FR2 015180 2C02 30297+ MDR FR0,FR2 015182 2C02 30298+ MDR FR0,FR2 015184 2C02 30299+ MDR FR0,FR2 015186 2C02 30300+ MDR FR0,FR2 015188 2C02 30301+ MDR FR0,FR2 01518A 2C02 30302+ MDR FR0,FR2 01518C 2C02 30303+ MDR FR0,FR2 01518E 2C02 30304+ MDR FR0,FR2 015190 2C02 30305+ MDR FR0,FR2 015192 2C02 30306+ MDR FR0,FR2 015194 2C02 30307+ MDR FR0,FR2 015196 2C02 30308+ MDR FR0,FR2 015198 2C02 30309+ MDR FR0,FR2 01519A 2C02 30310+ MDR FR0,FR2 01519C 2C02 30311+ MDR FR0,FR2 PAGE 554 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01519E 2C02 30312+ MDR FR0,FR2 0151A0 2C02 30313+ MDR FR0,FR2 0151A2 2C02 30314+ MDR FR0,FR2 0151A4 2C02 30315+ MDR FR0,FR2 0151A6 2C02 30316+ MDR FR0,FR2 0151A8 2C02 30317+ MDR FR0,FR2 0151AA 2C02 30318+ MDR FR0,FR2 0151AC 2C02 30319+ MDR FR0,FR2 0151AE 2C02 30320+ MDR FR0,FR2 0151B0 2C02 30321+ MDR FR0,FR2 0151B2 2C02 30322+ MDR FR0,FR2 0151B4 2C02 30323+ MDR FR0,FR2 0151B6 2C02 30324+ MDR FR0,FR2 0151B8 2C02 30325+ MDR FR0,FR2 0151BA 2C02 30326+ MDR FR0,FR2 0151BC 2C02 30327+ MDR FR0,FR2 0151BE 2C02 30328+ MDR FR0,FR2 0151C0 2C02 30329+ MDR FR0,FR2 0151C2 2C02 30330+ MDR FR0,FR2 0151C4 2C02 30331+ MDR FR0,FR2 0151C6 2C02 30332+ MDR FR0,FR2 0151C8 2C02 30333+ MDR FR0,FR2 0151CA 2C02 30334+ MDR FR0,FR2 0151CC 2C02 30335+ MDR FR0,FR2 0151CE 2C02 30336+ MDR FR0,FR2 0151D0 2C02 30337+ MDR FR0,FR2 0151D2 2C02 30338+ MDR FR0,FR2 0151D4 2C02 30339+ MDR FR0,FR2 0151D6 2C02 30340+ MDR FR0,FR2 0151D8 2C02 30341+ MDR FR0,FR2 0151DA 2C02 30342+ MDR FR0,FR2 0151DC 2C02 30343+ MDR FR0,FR2 0151DE 2C02 30344+ MDR FR0,FR2 0151E0 2C02 30345+ MDR FR0,FR2 30346+* 0151E2 06FB 30347 BCTR R15,R11 30348 TSIMRET 0151E4 58F0 C0B0 15208 30349+ L R15,=A(SAVETST) R15 := current save area 0151E8 58DF 0004 00004 30350+ L R13,4(R15) get old save area back 0151EC 98EC D00C 0000C 30351+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0151F0 07FE 30352+ BR 14 RETURN 02000000 30353 TSIMEND 0151F8 30354+ LTORG 0151F8 411199999999999A 30355 =D'1.1' 015200 4110000000000000 30356 =D'1.0' 015208 00000458 30357 =A(SAVETST) 1520C 30358+T544TEND EQU * 30359 * 30360 * Test 545 -- MD R,m --------------------------------------- 30361 * 30362 TSIMBEG T545,4500,50,10,C'MD R,m' 30363+* 003EC4 30364+TDSCDAT CSECT 003EC8 30365+ DS 0D 30366+* PAGE 555 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003EC8 00015210 30367+T545TDSC DC A(T545) // TENTRY 003ECC 00000114 30368+ DC A(T545TEND-T545) // TLENGTH 003ED0 00001194 30369+ DC F'4500' // TLRCNT 003ED4 00000032 30370+ DC F'50' // TIGCNT 003ED8 0000000A 30371+ DC F'10' // TLTYPE 001C7B 30372+TEXT CSECT 001C7B E3F5F4F5 30373+SPTR2673 DC C'T545' 003EDC 30374+TDSCDAT CSECT 003EDC 30375+ DS 0F 003EDC 04001C7B 30376+ DC AL1(L'SPTR2673),AL3(SPTR2673) 001C7F 30377+TEXT CSECT 001C7F D4C440D96B94 30378+SPTR2674 DC C'MD R,m' 003EE0 30379+TDSCDAT CSECT 003EE0 30380+ DS 0F 003EE0 06001C7F 30381+ DC AL1(L'SPTR2674),AL3(SPTR2674) 30382+* 004D04 30383+TDSCTBL CSECT 04D04 30384+T545TPTR EQU * 004D04 00003EC8 30385+ DC A(T545TDSC) enabled test 30386+* 01520C 30387+TCODE CSECT 015210 30388+ DS 0D ensure double word alignment for test 015210 30389+T545 DS 0H 01650000 015210 90EC D00C 0000C 30390+ STM 14,12,12(13) SAVE REGISTERS 02950000 015214 18CF 30391+ LR R12,R15 base register := entry address 15210 30392+ USING T545,R12 declare code base register 015216 41B0 C01E 1522E 30393+ LA R11,T545L load loop target to R11 01521A 58F0 C110 15320 30394+ L R15,=A(SAVETST) R15 := current save area 01521E 50DF 0004 00004 30395+ ST R13,4(R15) set back pointer in current save area 015222 182D 30396+ LR R2,R13 remember callers save area 015224 18DF 30397+ LR R13,R15 setup current save area 015226 50D2 0008 00008 30398+ ST R13,8(R2) set forw pointer in callers save area 00000 30399+ USING TDSC,R1 declare TDSC base register 01522A 58F0 1008 00008 30400+ L R15,TLRCNT load local repeat count to R15 30401+* 30402 * inner loop logic: 30403 * load FR0 with 1.0 30404 * multiply 50 times by 1.1 30405 * 01522E 6800 C100 15310 30406 T545L LD FR0,=D'1.0' 30407 REPINS MD,(FR0,=D'1.1') repeat: MD FR0,=D'1.1' 30408+* 30409+* build from sublist &ALIST a comma separated string &ARGS 30410+* 30411+* 30412+* 30413+* 30414+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 30415+* this allows to transfer the repeat count from last TDSCGEN call 30416+* 30417+* 30418+* 30419+* write a comment indicating what REPINS does (in case NOGEN in effect) 30420+* 30421+*,// REPINS: do 50 times: PAGE 556 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 30422+* 30423+* MNOTE requires that ' is doubled for expanded variables 30424+* thus build &MASTR as a copy of '&ARGS with ' doubled 30425+* 30426+* 30427+*,// MD FR0,=D'1.1' 30428+* 30429+* finally generate code: &ICNT copies of &CODE &ARGS 30430+* 015232 6C00 C108 15318 30431+ MD FR0,=D'1.1' 015236 6C00 C108 15318 30432+ MD FR0,=D'1.1' 01523A 6C00 C108 15318 30433+ MD FR0,=D'1.1' 01523E 6C00 C108 15318 30434+ MD FR0,=D'1.1' 015242 6C00 C108 15318 30435+ MD FR0,=D'1.1' 015246 6C00 C108 15318 30436+ MD FR0,=D'1.1' 01524A 6C00 C108 15318 30437+ MD FR0,=D'1.1' 01524E 6C00 C108 15318 30438+ MD FR0,=D'1.1' 015252 6C00 C108 15318 30439+ MD FR0,=D'1.1' 015256 6C00 C108 15318 30440+ MD FR0,=D'1.1' 01525A 6C00 C108 15318 30441+ MD FR0,=D'1.1' 01525E 6C00 C108 15318 30442+ MD FR0,=D'1.1' 015262 6C00 C108 15318 30443+ MD FR0,=D'1.1' 015266 6C00 C108 15318 30444+ MD FR0,=D'1.1' 01526A 6C00 C108 15318 30445+ MD FR0,=D'1.1' 01526E 6C00 C108 15318 30446+ MD FR0,=D'1.1' 015272 6C00 C108 15318 30447+ MD FR0,=D'1.1' 015276 6C00 C108 15318 30448+ MD FR0,=D'1.1' 01527A 6C00 C108 15318 30449+ MD FR0,=D'1.1' 01527E 6C00 C108 15318 30450+ MD FR0,=D'1.1' 015282 6C00 C108 15318 30451+ MD FR0,=D'1.1' 015286 6C00 C108 15318 30452+ MD FR0,=D'1.1' 01528A 6C00 C108 15318 30453+ MD FR0,=D'1.1' 01528E 6C00 C108 15318 30454+ MD FR0,=D'1.1' 015292 6C00 C108 15318 30455+ MD FR0,=D'1.1' 015296 6C00 C108 15318 30456+ MD FR0,=D'1.1' 01529A 6C00 C108 15318 30457+ MD FR0,=D'1.1' 01529E 6C00 C108 15318 30458+ MD FR0,=D'1.1' 0152A2 6C00 C108 15318 30459+ MD FR0,=D'1.1' 0152A6 6C00 C108 15318 30460+ MD FR0,=D'1.1' 0152AA 6C00 C108 15318 30461+ MD FR0,=D'1.1' 0152AE 6C00 C108 15318 30462+ MD FR0,=D'1.1' 0152B2 6C00 C108 15318 30463+ MD FR0,=D'1.1' 0152B6 6C00 C108 15318 30464+ MD FR0,=D'1.1' 0152BA 6C00 C108 15318 30465+ MD FR0,=D'1.1' 0152BE 6C00 C108 15318 30466+ MD FR0,=D'1.1' 0152C2 6C00 C108 15318 30467+ MD FR0,=D'1.1' 0152C6 6C00 C108 15318 30468+ MD FR0,=D'1.1' 0152CA 6C00 C108 15318 30469+ MD FR0,=D'1.1' 0152CE 6C00 C108 15318 30470+ MD FR0,=D'1.1' 0152D2 6C00 C108 15318 30471+ MD FR0,=D'1.1' 0152D6 6C00 C108 15318 30472+ MD FR0,=D'1.1' 0152DA 6C00 C108 15318 30473+ MD FR0,=D'1.1' 0152DE 6C00 C108 15318 30474+ MD FR0,=D'1.1' 0152E2 6C00 C108 15318 30475+ MD FR0,=D'1.1' 0152E6 6C00 C108 15318 30476+ MD FR0,=D'1.1' PAGE 557 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0152EA 6C00 C108 15318 30477+ MD FR0,=D'1.1' 0152EE 6C00 C108 15318 30478+ MD FR0,=D'1.1' 0152F2 6C00 C108 15318 30479+ MD FR0,=D'1.1' 0152F6 6C00 C108 15318 30480+ MD FR0,=D'1.1' 30481+* 0152FA 06FB 30482 BCTR R15,R11 30483 TSIMRET 0152FC 58F0 C110 15320 30484+ L R15,=A(SAVETST) R15 := current save area 015300 58DF 0004 00004 30485+ L R13,4(R15) get old save area back 015304 98EC D00C 0000C 30486+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015308 07FE 30487+ BR 14 RETURN 02000000 30488 TSIMEND 015310 30489+ LTORG 015310 4110000000000000 30490 =D'1.0' 015318 411199999999999A 30491 =D'1.1' 015320 00000458 30492 =A(SAVETST) 15324 30493+T545TEND EQU * 30494 * 30495 * Test 546 -- DDR R,R -------------------------------------- 30496 * 30497 TSIMBEG T546,700,50,10,C'DDR R,R' 30498+* 003EE4 30499+TDSCDAT CSECT 003EE8 30500+ DS 0D 30501+* 003EE8 00015328 30502+T546TDSC DC A(T546) // TENTRY 003EEC 000000B4 30503+ DC A(T546TEND-T546) // TLENGTH 003EF0 000002BC 30504+ DC F'700' // TLRCNT 003EF4 00000032 30505+ DC F'50' // TIGCNT 003EF8 0000000A 30506+ DC F'10' // TLTYPE 001C85 30507+TEXT CSECT 001C85 E3F5F4F6 30508+SPTR2685 DC C'T546' 003EFC 30509+TDSCDAT CSECT 003EFC 30510+ DS 0F 003EFC 04001C85 30511+ DC AL1(L'SPTR2685),AL3(SPTR2685) 001C89 30512+TEXT CSECT 001C89 C4C4D940D96BD9 30513+SPTR2686 DC C'DDR R,R' 003F00 30514+TDSCDAT CSECT 003F00 30515+ DS 0F 003F00 07001C89 30516+ DC AL1(L'SPTR2686),AL3(SPTR2686) 30517+* 004D08 30518+TDSCTBL CSECT 04D08 30519+T546TPTR EQU * 004D08 00003EE8 30520+ DC A(T546TDSC) enabled test 30521+* 015324 30522+TCODE CSECT 015328 30523+ DS 0D ensure double word alignment for test 015328 30524+T546 DS 0H 01650000 015328 90EC D00C 0000C 30525+ STM 14,12,12(13) SAVE REGISTERS 02950000 01532C 18CF 30526+ LR R12,R15 base register := entry address 15328 30527+ USING T546,R12 declare code base register 01532E 41B0 C022 1534A 30528+ LA R11,T546L load loop target to R11 015332 58F0 C0B0 153D8 30529+ L R15,=A(SAVETST) R15 := current save area 015336 50DF 0004 00004 30530+ ST R13,4(R15) set back pointer in current save area 01533A 182D 30531+ LR R2,R13 remember callers save area PAGE 558 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01533C 18DF 30532+ LR R13,R15 setup current save area 01533E 50D2 0008 00008 30533+ ST R13,8(R2) set forw pointer in callers save area 00000 30534+ USING TDSC,R1 declare TDSC base register 015342 58F0 1008 00008 30535+ L R15,TLRCNT load local repeat count to R15 30536+* 30537 * inner loop logic: 30538 * load FR0 with 1.0 30539 * divide 50 times by 1.1 30540 * 015346 6820 C0A0 153C8 30541 LD FR2,=D'1.1' 01534A 6800 C0A8 153D0 30542 T546L LD FR0,=D'1.0' 30543 REPINS DDR,(FR0,FR2) repeat: DDR FR0,FR2 30544+* 30545+* build from sublist &ALIST a comma separated string &ARGS 30546+* 30547+* 30548+* 30549+* 30550+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 30551+* this allows to transfer the repeat count from last TDSCGEN call 30552+* 30553+* 30554+* 30555+* write a comment indicating what REPINS does (in case NOGEN in effect) 30556+* 30557+*,// REPINS: do 50 times: 30558+* 30559+* MNOTE requires that ' is doubled for expanded variables 30560+* thus build &MASTR as a copy of '&ARGS with ' doubled 30561+* 30562+* 30563+*,// DDR FR0,FR2 30564+* 30565+* finally generate code: &ICNT copies of &CODE &ARGS 30566+* 01534E 2D02 30567+ DDR FR0,FR2 015350 2D02 30568+ DDR FR0,FR2 015352 2D02 30569+ DDR FR0,FR2 015354 2D02 30570+ DDR FR0,FR2 015356 2D02 30571+ DDR FR0,FR2 015358 2D02 30572+ DDR FR0,FR2 01535A 2D02 30573+ DDR FR0,FR2 01535C 2D02 30574+ DDR FR0,FR2 01535E 2D02 30575+ DDR FR0,FR2 015360 2D02 30576+ DDR FR0,FR2 015362 2D02 30577+ DDR FR0,FR2 015364 2D02 30578+ DDR FR0,FR2 015366 2D02 30579+ DDR FR0,FR2 015368 2D02 30580+ DDR FR0,FR2 01536A 2D02 30581+ DDR FR0,FR2 01536C 2D02 30582+ DDR FR0,FR2 01536E 2D02 30583+ DDR FR0,FR2 015370 2D02 30584+ DDR FR0,FR2 015372 2D02 30585+ DDR FR0,FR2 015374 2D02 30586+ DDR FR0,FR2 PAGE 559 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015376 2D02 30587+ DDR FR0,FR2 015378 2D02 30588+ DDR FR0,FR2 01537A 2D02 30589+ DDR FR0,FR2 01537C 2D02 30590+ DDR FR0,FR2 01537E 2D02 30591+ DDR FR0,FR2 015380 2D02 30592+ DDR FR0,FR2 015382 2D02 30593+ DDR FR0,FR2 015384 2D02 30594+ DDR FR0,FR2 015386 2D02 30595+ DDR FR0,FR2 015388 2D02 30596+ DDR FR0,FR2 01538A 2D02 30597+ DDR FR0,FR2 01538C 2D02 30598+ DDR FR0,FR2 01538E 2D02 30599+ DDR FR0,FR2 015390 2D02 30600+ DDR FR0,FR2 015392 2D02 30601+ DDR FR0,FR2 015394 2D02 30602+ DDR FR0,FR2 015396 2D02 30603+ DDR FR0,FR2 015398 2D02 30604+ DDR FR0,FR2 01539A 2D02 30605+ DDR FR0,FR2 01539C 2D02 30606+ DDR FR0,FR2 01539E 2D02 30607+ DDR FR0,FR2 0153A0 2D02 30608+ DDR FR0,FR2 0153A2 2D02 30609+ DDR FR0,FR2 0153A4 2D02 30610+ DDR FR0,FR2 0153A6 2D02 30611+ DDR FR0,FR2 0153A8 2D02 30612+ DDR FR0,FR2 0153AA 2D02 30613+ DDR FR0,FR2 0153AC 2D02 30614+ DDR FR0,FR2 0153AE 2D02 30615+ DDR FR0,FR2 0153B0 2D02 30616+ DDR FR0,FR2 30617+* 0153B2 06FB 30618 BCTR R15,R11 30619 TSIMRET 0153B4 58F0 C0B0 153D8 30620+ L R15,=A(SAVETST) R15 := current save area 0153B8 58DF 0004 00004 30621+ L R13,4(R15) get old save area back 0153BC 98EC D00C 0000C 30622+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0153C0 07FE 30623+ BR 14 RETURN 02000000 30624 TSIMEND 0153C8 30625+ LTORG 0153C8 411199999999999A 30626 =D'1.1' 0153D0 4110000000000000 30627 =D'1.0' 0153D8 00000458 30628 =A(SAVETST) 153DC 30629+T546TEND EQU * 30630 * 30631 * Test 547 -- DD R,m --------------------------------------- 30632 * 30633 TSIMBEG T547,700,50,10,C'DD R,m' 30634+* 003F04 30635+TDSCDAT CSECT 003F08 30636+ DS 0D 30637+* 003F08 000153E0 30638+T547TDSC DC A(T547) // TENTRY 003F0C 00000114 30639+ DC A(T547TEND-T547) // TLENGTH 003F10 000002BC 30640+ DC F'700' // TLRCNT 003F14 00000032 30641+ DC F'50' // TIGCNT PAGE 560 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003F18 0000000A 30642+ DC F'10' // TLTYPE 001C90 30643+TEXT CSECT 001C90 E3F5F4F7 30644+SPTR2697 DC C'T547' 003F1C 30645+TDSCDAT CSECT 003F1C 30646+ DS 0F 003F1C 04001C90 30647+ DC AL1(L'SPTR2697),AL3(SPTR2697) 001C94 30648+TEXT CSECT 001C94 C4C440D96B94 30649+SPTR2698 DC C'DD R,m' 003F20 30650+TDSCDAT CSECT 003F20 30651+ DS 0F 003F20 06001C94 30652+ DC AL1(L'SPTR2698),AL3(SPTR2698) 30653+* 004D0C 30654+TDSCTBL CSECT 04D0C 30655+T547TPTR EQU * 004D0C 00003F08 30656+ DC A(T547TDSC) enabled test 30657+* 0153DC 30658+TCODE CSECT 0153E0 30659+ DS 0D ensure double word alignment for test 0153E0 30660+T547 DS 0H 01650000 0153E0 90EC D00C 0000C 30661+ STM 14,12,12(13) SAVE REGISTERS 02950000 0153E4 18CF 30662+ LR R12,R15 base register := entry address 153E0 30663+ USING T547,R12 declare code base register 0153E6 41B0 C01E 153FE 30664+ LA R11,T547L load loop target to R11 0153EA 58F0 C110 154F0 30665+ L R15,=A(SAVETST) R15 := current save area 0153EE 50DF 0004 00004 30666+ ST R13,4(R15) set back pointer in current save area 0153F2 182D 30667+ LR R2,R13 remember callers save area 0153F4 18DF 30668+ LR R13,R15 setup current save area 0153F6 50D2 0008 00008 30669+ ST R13,8(R2) set forw pointer in callers save area 00000 30670+ USING TDSC,R1 declare TDSC base register 0153FA 58F0 1008 00008 30671+ L R15,TLRCNT load local repeat count to R15 30672+* 30673 * inner loop logic: 30674 * load FR0 with 1.0 30675 * divide 50 times by 1.1 30676 * 0153FE 6800 C100 154E0 30677 T547L LD FR0,=D'1.0' 30678 REPINS DD,(FR0,=D'1.1') repeat: DD FR0,=D'1.1' 30679+* 30680+* build from sublist &ALIST a comma separated string &ARGS 30681+* 30682+* 30683+* 30684+* 30685+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 30686+* this allows to transfer the repeat count from last TDSCGEN call 30687+* 30688+* 30689+* 30690+* write a comment indicating what REPINS does (in case NOGEN in effect) 30691+* 30692+*,// REPINS: do 50 times: 30693+* 30694+* MNOTE requires that ' is doubled for expanded variables 30695+* thus build &MASTR as a copy of '&ARGS with ' doubled 30696+* PAGE 561 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 30697+* 30698+*,// DD FR0,=D'1.1' 30699+* 30700+* finally generate code: &ICNT copies of &CODE &ARGS 30701+* 015402 6D00 C108 154E8 30702+ DD FR0,=D'1.1' 015406 6D00 C108 154E8 30703+ DD FR0,=D'1.1' 01540A 6D00 C108 154E8 30704+ DD FR0,=D'1.1' 01540E 6D00 C108 154E8 30705+ DD FR0,=D'1.1' 015412 6D00 C108 154E8 30706+ DD FR0,=D'1.1' 015416 6D00 C108 154E8 30707+ DD FR0,=D'1.1' 01541A 6D00 C108 154E8 30708+ DD FR0,=D'1.1' 01541E 6D00 C108 154E8 30709+ DD FR0,=D'1.1' 015422 6D00 C108 154E8 30710+ DD FR0,=D'1.1' 015426 6D00 C108 154E8 30711+ DD FR0,=D'1.1' 01542A 6D00 C108 154E8 30712+ DD FR0,=D'1.1' 01542E 6D00 C108 154E8 30713+ DD FR0,=D'1.1' 015432 6D00 C108 154E8 30714+ DD FR0,=D'1.1' 015436 6D00 C108 154E8 30715+ DD FR0,=D'1.1' 01543A 6D00 C108 154E8 30716+ DD FR0,=D'1.1' 01543E 6D00 C108 154E8 30717+ DD FR0,=D'1.1' 015442 6D00 C108 154E8 30718+ DD FR0,=D'1.1' 015446 6D00 C108 154E8 30719+ DD FR0,=D'1.1' 01544A 6D00 C108 154E8 30720+ DD FR0,=D'1.1' 01544E 6D00 C108 154E8 30721+ DD FR0,=D'1.1' 015452 6D00 C108 154E8 30722+ DD FR0,=D'1.1' 015456 6D00 C108 154E8 30723+ DD FR0,=D'1.1' 01545A 6D00 C108 154E8 30724+ DD FR0,=D'1.1' 01545E 6D00 C108 154E8 30725+ DD FR0,=D'1.1' 015462 6D00 C108 154E8 30726+ DD FR0,=D'1.1' 015466 6D00 C108 154E8 30727+ DD FR0,=D'1.1' 01546A 6D00 C108 154E8 30728+ DD FR0,=D'1.1' 01546E 6D00 C108 154E8 30729+ DD FR0,=D'1.1' 015472 6D00 C108 154E8 30730+ DD FR0,=D'1.1' 015476 6D00 C108 154E8 30731+ DD FR0,=D'1.1' 01547A 6D00 C108 154E8 30732+ DD FR0,=D'1.1' 01547E 6D00 C108 154E8 30733+ DD FR0,=D'1.1' 015482 6D00 C108 154E8 30734+ DD FR0,=D'1.1' 015486 6D00 C108 154E8 30735+ DD FR0,=D'1.1' 01548A 6D00 C108 154E8 30736+ DD FR0,=D'1.1' 01548E 6D00 C108 154E8 30737+ DD FR0,=D'1.1' 015492 6D00 C108 154E8 30738+ DD FR0,=D'1.1' 015496 6D00 C108 154E8 30739+ DD FR0,=D'1.1' 01549A 6D00 C108 154E8 30740+ DD FR0,=D'1.1' 01549E 6D00 C108 154E8 30741+ DD FR0,=D'1.1' 0154A2 6D00 C108 154E8 30742+ DD FR0,=D'1.1' 0154A6 6D00 C108 154E8 30743+ DD FR0,=D'1.1' 0154AA 6D00 C108 154E8 30744+ DD FR0,=D'1.1' 0154AE 6D00 C108 154E8 30745+ DD FR0,=D'1.1' 0154B2 6D00 C108 154E8 30746+ DD FR0,=D'1.1' 0154B6 6D00 C108 154E8 30747+ DD FR0,=D'1.1' 0154BA 6D00 C108 154E8 30748+ DD FR0,=D'1.1' 0154BE 6D00 C108 154E8 30749+ DD FR0,=D'1.1' 0154C2 6D00 C108 154E8 30750+ DD FR0,=D'1.1' 0154C6 6D00 C108 154E8 30751+ DD FR0,=D'1.1' PAGE 562 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 30752+* 0154CA 06FB 30753 BCTR R15,R11 30754 TSIMRET 0154CC 58F0 C110 154F0 30755+ L R15,=A(SAVETST) R15 := current save area 0154D0 58DF 0004 00004 30756+ L R13,4(R15) get old save area back 0154D4 98EC D00C 0000C 30757+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0154D8 07FE 30758+ BR 14 RETURN 02000000 30759 TSIMEND 0154E0 30760+ LTORG 0154E0 4110000000000000 30761 =D'1.0' 0154E8 411199999999999A 30762 =D'1.1' 0154F0 00000458 30763 =A(SAVETST) 154F4 30764+T547TEND EQU * 30765 * 30766 * Test 55x -- long float auxiliary ========================= 30767 * 30768 * Test 550 -- CDR R,R -------------------------------------- 30769 * 30770 TSIMBEG T550,8000,50,1,C'CDR R,R' 30771+* 003F24 30772+TDSCDAT CSECT 003F28 30773+ DS 0D 30774+* 003F28 000154F8 30775+T550TDSC DC A(T550) // TENTRY 003F2C 000000B4 30776+ DC A(T550TEND-T550) // TLENGTH 003F30 00001F40 30777+ DC F'8000' // TLRCNT 003F34 00000032 30778+ DC F'50' // TIGCNT 003F38 00000001 30779+ DC F'1' // TLTYPE 001C9A 30780+TEXT CSECT 001C9A E3F5F5F0 30781+SPTR2709 DC C'T550' 003F3C 30782+TDSCDAT CSECT 003F3C 30783+ DS 0F 003F3C 04001C9A 30784+ DC AL1(L'SPTR2709),AL3(SPTR2709) 001C9E 30785+TEXT CSECT 001C9E C3C4D940D96BD9 30786+SPTR2710 DC C'CDR R,R' 003F40 30787+TDSCDAT CSECT 003F40 30788+ DS 0F 003F40 07001C9E 30789+ DC AL1(L'SPTR2710),AL3(SPTR2710) 30790+* 004D10 30791+TDSCTBL CSECT 04D10 30792+T550TPTR EQU * 004D10 00003F28 30793+ DC A(T550TDSC) enabled test 30794+* 0154F4 30795+TCODE CSECT 0154F8 30796+ DS 0D ensure double word alignment for test 0154F8 30797+T550 DS 0H 01650000 0154F8 90EC D00C 0000C 30798+ STM 14,12,12(13) SAVE REGISTERS 02950000 0154FC 18CF 30799+ LR R12,R15 base register := entry address 154F8 30800+ USING T550,R12 declare code base register 0154FE 41B0 C026 1551E 30801+ LA R11,T550L load loop target to R11 015502 58F0 C0B0 155A8 30802+ L R15,=A(SAVETST) R15 := current save area 015506 50DF 0004 00004 30803+ ST R13,4(R15) set back pointer in current save area 01550A 182D 30804+ LR R2,R13 remember callers save area 01550C 18DF 30805+ LR R13,R15 setup current save area 01550E 50D2 0008 00008 30806+ ST R13,8(R2) set forw pointer in callers save area PAGE 563 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00000 30807+ USING TDSC,R1 declare TDSC base register 015512 58F0 1008 00008 30808+ L R15,TLRCNT load local repeat count to R15 30809+* 30810 * 015516 6800 C0A0 15598 30811 LD FR0,=D'1.0' 01551A 6820 C0A8 155A0 30812 LD FR2,=D'1.1' 30813 T550L REPINS CDR,(FR0,FR2) repeat: CDR FR0,FR2 30814+* 30815+* build from sublist &ALIST a comma separated string &ARGS 30816+* 30817+* 30818+* 30819+* 30820+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 30821+* this allows to transfer the repeat count from last TDSCGEN call 30822+* 30823+* 1551E 30824+T550L EQU * 30825+* 30826+* write a comment indicating what REPINS does (in case NOGEN in effect) 30827+* 30828+*,// REPINS: do 50 times: 30829+* 30830+* MNOTE requires that ' is doubled for expanded variables 30831+* thus build &MASTR as a copy of '&ARGS with ' doubled 30832+* 30833+* 30834+*,// CDR FR0,FR2 30835+* 30836+* finally generate code: &ICNT copies of &CODE &ARGS 30837+* 01551E 2902 30838+ CDR FR0,FR2 015520 2902 30839+ CDR FR0,FR2 015522 2902 30840+ CDR FR0,FR2 015524 2902 30841+ CDR FR0,FR2 015526 2902 30842+ CDR FR0,FR2 015528 2902 30843+ CDR FR0,FR2 01552A 2902 30844+ CDR FR0,FR2 01552C 2902 30845+ CDR FR0,FR2 01552E 2902 30846+ CDR FR0,FR2 015530 2902 30847+ CDR FR0,FR2 015532 2902 30848+ CDR FR0,FR2 015534 2902 30849+ CDR FR0,FR2 015536 2902 30850+ CDR FR0,FR2 015538 2902 30851+ CDR FR0,FR2 01553A 2902 30852+ CDR FR0,FR2 01553C 2902 30853+ CDR FR0,FR2 01553E 2902 30854+ CDR FR0,FR2 015540 2902 30855+ CDR FR0,FR2 015542 2902 30856+ CDR FR0,FR2 015544 2902 30857+ CDR FR0,FR2 015546 2902 30858+ CDR FR0,FR2 015548 2902 30859+ CDR FR0,FR2 01554A 2902 30860+ CDR FR0,FR2 01554C 2902 30861+ CDR FR0,FR2 PAGE 564 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01554E 2902 30862+ CDR FR0,FR2 015550 2902 30863+ CDR FR0,FR2 015552 2902 30864+ CDR FR0,FR2 015554 2902 30865+ CDR FR0,FR2 015556 2902 30866+ CDR FR0,FR2 015558 2902 30867+ CDR FR0,FR2 01555A 2902 30868+ CDR FR0,FR2 01555C 2902 30869+ CDR FR0,FR2 01555E 2902 30870+ CDR FR0,FR2 015560 2902 30871+ CDR FR0,FR2 015562 2902 30872+ CDR FR0,FR2 015564 2902 30873+ CDR FR0,FR2 015566 2902 30874+ CDR FR0,FR2 015568 2902 30875+ CDR FR0,FR2 01556A 2902 30876+ CDR FR0,FR2 01556C 2902 30877+ CDR FR0,FR2 01556E 2902 30878+ CDR FR0,FR2 015570 2902 30879+ CDR FR0,FR2 015572 2902 30880+ CDR FR0,FR2 015574 2902 30881+ CDR FR0,FR2 015576 2902 30882+ CDR FR0,FR2 015578 2902 30883+ CDR FR0,FR2 01557A 2902 30884+ CDR FR0,FR2 01557C 2902 30885+ CDR FR0,FR2 01557E 2902 30886+ CDR FR0,FR2 015580 2902 30887+ CDR FR0,FR2 30888+* 015582 06FB 30889 BCTR R15,R11 30890 TSIMRET 015584 58F0 C0B0 155A8 30891+ L R15,=A(SAVETST) R15 := current save area 015588 58DF 0004 00004 30892+ L R13,4(R15) get old save area back 01558C 98EC D00C 0000C 30893+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015590 07FE 30894+ BR 14 RETURN 02000000 30895 TSIMEND 015598 30896+ LTORG 015598 4110000000000000 30897 =D'1.0' 0155A0 411199999999999A 30898 =D'1.1' 0155A8 00000458 30899 =A(SAVETST) 155AC 30900+T550TEND EQU * 30901 * 30902 * Test 551 -- CD R,m --------------------------------------- 30903 * 30904 TSIMBEG T551,6000,50,1,C'CD R,m' 30905+* 003F44 30906+TDSCDAT CSECT 003F48 30907+ DS 0D 30908+* 003F48 000155B0 30909+T551TDSC DC A(T551) // TENTRY 003F4C 00000114 30910+ DC A(T551TEND-T551) // TLENGTH 003F50 00001770 30911+ DC F'6000' // TLRCNT 003F54 00000032 30912+ DC F'50' // TIGCNT 003F58 00000001 30913+ DC F'1' // TLTYPE 001CA5 30914+TEXT CSECT 001CA5 E3F5F5F1 30915+SPTR2721 DC C'T551' 003F5C 30916+TDSCDAT CSECT PAGE 565 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 003F5C 30917+ DS 0F 003F5C 04001CA5 30918+ DC AL1(L'SPTR2721),AL3(SPTR2721) 001CA9 30919+TEXT CSECT 001CA9 C3C440D96B94 30920+SPTR2722 DC C'CD R,m' 003F60 30921+TDSCDAT CSECT 003F60 30922+ DS 0F 003F60 06001CA9 30923+ DC AL1(L'SPTR2722),AL3(SPTR2722) 30924+* 004D14 30925+TDSCTBL CSECT 04D14 30926+T551TPTR EQU * 004D14 00003F48 30927+ DC A(T551TDSC) enabled test 30928+* 0155AC 30929+TCODE CSECT 0155B0 30930+ DS 0D ensure double word alignment for test 0155B0 30931+T551 DS 0H 01650000 0155B0 90EC D00C 0000C 30932+ STM 14,12,12(13) SAVE REGISTERS 02950000 0155B4 18CF 30933+ LR R12,R15 base register := entry address 155B0 30934+ USING T551,R12 declare code base register 0155B6 41B0 C022 155D2 30935+ LA R11,T551L load loop target to R11 0155BA 58F0 C110 156C0 30936+ L R15,=A(SAVETST) R15 := current save area 0155BE 50DF 0004 00004 30937+ ST R13,4(R15) set back pointer in current save area 0155C2 182D 30938+ LR R2,R13 remember callers save area 0155C4 18DF 30939+ LR R13,R15 setup current save area 0155C6 50D2 0008 00008 30940+ ST R13,8(R2) set forw pointer in callers save area 00000 30941+ USING TDSC,R1 declare TDSC base register 0155CA 58F0 1008 00008 30942+ L R15,TLRCNT load local repeat count to R15 30943+* 30944 * 0155CE 6800 C100 156B0 30945 LD FR0,=D'1.0' 30946 T551L REPINS CD,(FR0,=D'1.1') repeat: CD FR0,=D'1.1' 30947+* 30948+* build from sublist &ALIST a comma separated string &ARGS 30949+* 30950+* 30951+* 30952+* 30953+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 30954+* this allows to transfer the repeat count from last TDSCGEN call 30955+* 30956+* 155D2 30957+T551L EQU * 30958+* 30959+* write a comment indicating what REPINS does (in case NOGEN in effect) 30960+* 30961+*,// REPINS: do 50 times: 30962+* 30963+* MNOTE requires that ' is doubled for expanded variables 30964+* thus build &MASTR as a copy of '&ARGS with ' doubled 30965+* 30966+* 30967+*,// CD FR0,=D'1.1' 30968+* 30969+* finally generate code: &ICNT copies of &CODE &ARGS 30970+* 0155D2 6900 C108 156B8 30971+ CD FR0,=D'1.1' PAGE 566 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0155D6 6900 C108 156B8 30972+ CD FR0,=D'1.1' 0155DA 6900 C108 156B8 30973+ CD FR0,=D'1.1' 0155DE 6900 C108 156B8 30974+ CD FR0,=D'1.1' 0155E2 6900 C108 156B8 30975+ CD FR0,=D'1.1' 0155E6 6900 C108 156B8 30976+ CD FR0,=D'1.1' 0155EA 6900 C108 156B8 30977+ CD FR0,=D'1.1' 0155EE 6900 C108 156B8 30978+ CD FR0,=D'1.1' 0155F2 6900 C108 156B8 30979+ CD FR0,=D'1.1' 0155F6 6900 C108 156B8 30980+ CD FR0,=D'1.1' 0155FA 6900 C108 156B8 30981+ CD FR0,=D'1.1' 0155FE 6900 C108 156B8 30982+ CD FR0,=D'1.1' 015602 6900 C108 156B8 30983+ CD FR0,=D'1.1' 015606 6900 C108 156B8 30984+ CD FR0,=D'1.1' 01560A 6900 C108 156B8 30985+ CD FR0,=D'1.1' 01560E 6900 C108 156B8 30986+ CD FR0,=D'1.1' 015612 6900 C108 156B8 30987+ CD FR0,=D'1.1' 015616 6900 C108 156B8 30988+ CD FR0,=D'1.1' 01561A 6900 C108 156B8 30989+ CD FR0,=D'1.1' 01561E 6900 C108 156B8 30990+ CD FR0,=D'1.1' 015622 6900 C108 156B8 30991+ CD FR0,=D'1.1' 015626 6900 C108 156B8 30992+ CD FR0,=D'1.1' 01562A 6900 C108 156B8 30993+ CD FR0,=D'1.1' 01562E 6900 C108 156B8 30994+ CD FR0,=D'1.1' 015632 6900 C108 156B8 30995+ CD FR0,=D'1.1' 015636 6900 C108 156B8 30996+ CD FR0,=D'1.1' 01563A 6900 C108 156B8 30997+ CD FR0,=D'1.1' 01563E 6900 C108 156B8 30998+ CD FR0,=D'1.1' 015642 6900 C108 156B8 30999+ CD FR0,=D'1.1' 015646 6900 C108 156B8 31000+ CD FR0,=D'1.1' 01564A 6900 C108 156B8 31001+ CD FR0,=D'1.1' 01564E 6900 C108 156B8 31002+ CD FR0,=D'1.1' 015652 6900 C108 156B8 31003+ CD FR0,=D'1.1' 015656 6900 C108 156B8 31004+ CD FR0,=D'1.1' 01565A 6900 C108 156B8 31005+ CD FR0,=D'1.1' 01565E 6900 C108 156B8 31006+ CD FR0,=D'1.1' 015662 6900 C108 156B8 31007+ CD FR0,=D'1.1' 015666 6900 C108 156B8 31008+ CD FR0,=D'1.1' 01566A 6900 C108 156B8 31009+ CD FR0,=D'1.1' 01566E 6900 C108 156B8 31010+ CD FR0,=D'1.1' 015672 6900 C108 156B8 31011+ CD FR0,=D'1.1' 015676 6900 C108 156B8 31012+ CD FR0,=D'1.1' 01567A 6900 C108 156B8 31013+ CD FR0,=D'1.1' 01567E 6900 C108 156B8 31014+ CD FR0,=D'1.1' 015682 6900 C108 156B8 31015+ CD FR0,=D'1.1' 015686 6900 C108 156B8 31016+ CD FR0,=D'1.1' 01568A 6900 C108 156B8 31017+ CD FR0,=D'1.1' 01568E 6900 C108 156B8 31018+ CD FR0,=D'1.1' 015692 6900 C108 156B8 31019+ CD FR0,=D'1.1' 015696 6900 C108 156B8 31020+ CD FR0,=D'1.1' 31021+* 01569A 06FB 31022 BCTR R15,R11 31023 TSIMRET 01569C 58F0 C110 156C0 31024+ L R15,=A(SAVETST) R15 := current save area 0156A0 58DF 0004 00004 31025+ L R13,4(R15) get old save area back 0156A4 98EC D00C 0000C 31026+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 PAGE 567 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0156A8 07FE 31027+ BR 14 RETURN 02000000 31028 TSIMEND 0156B0 31029+ LTORG 0156B0 4110000000000000 31030 =D'1.0' 0156B8 411199999999999A 31031 =D'1.1' 0156C0 00000458 31032 =A(SAVETST) 156C4 31033+T551TEND EQU * 31034 * 31035 * Test 552 -- AWR R,R -------------------------------------- 31036 * 31037 TSIMBEG T552,8000,50,10,C'AWR R,R' 31038+* 003F64 31039+TDSCDAT CSECT 003F68 31040+ DS 0D 31041+* 003F68 000156C8 31042+T552TDSC DC A(T552) // TENTRY 003F6C 000000B4 31043+ DC A(T552TEND-T552) // TLENGTH 003F70 00001F40 31044+ DC F'8000' // TLRCNT 003F74 00000032 31045+ DC F'50' // TIGCNT 003F78 0000000A 31046+ DC F'10' // TLTYPE 001CAF 31047+TEXT CSECT 001CAF E3F5F5F2 31048+SPTR2733 DC C'T552' 003F7C 31049+TDSCDAT CSECT 003F7C 31050+ DS 0F 003F7C 04001CAF 31051+ DC AL1(L'SPTR2733),AL3(SPTR2733) 001CB3 31052+TEXT CSECT 001CB3 C1E6D940D96BD9 31053+SPTR2734 DC C'AWR R,R' 003F80 31054+TDSCDAT CSECT 003F80 31055+ DS 0F 003F80 07001CB3 31056+ DC AL1(L'SPTR2734),AL3(SPTR2734) 31057+* 004D18 31058+TDSCTBL CSECT 04D18 31059+T552TPTR EQU * 004D18 00003F68 31060+ DC A(T552TDSC) enabled test 31061+* 0156C4 31062+TCODE CSECT 0156C8 31063+ DS 0D ensure double word alignment for test 0156C8 31064+T552 DS 0H 01650000 0156C8 90EC D00C 0000C 31065+ STM 14,12,12(13) SAVE REGISTERS 02950000 0156CC 18CF 31066+ LR R12,R15 base register := entry address 156C8 31067+ USING T552,R12 declare code base register 0156CE 41B0 C022 156EA 31068+ LA R11,T552L load loop target to R11 0156D2 58F0 C0B0 15778 31069+ L R15,=A(SAVETST) R15 := current save area 0156D6 50DF 0004 00004 31070+ ST R13,4(R15) set back pointer in current save area 0156DA 182D 31071+ LR R2,R13 remember callers save area 0156DC 18DF 31072+ LR R13,R15 setup current save area 0156DE 50D2 0008 00008 31073+ ST R13,8(R2) set forw pointer in callers save area 00000 31074+ USING TDSC,R1 declare TDSC base register 0156E2 58F0 1008 00008 31075+ L R15,TLRCNT load local repeat count to R15 31076+* 31077 * 0156E6 6820 C0A0 15768 31078 LD FR2,T552V 0156EA 6800 C0A8 15770 31079 T552L LD FR0,=D'1234.1' 31080 REPINS AWR,(FR0,FR2) repeat: AWR FR0,FR2 31081+* PAGE 568 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 31082+* build from sublist &ALIST a comma separated string &ARGS 31083+* 31084+* 31085+* 31086+* 31087+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 31088+* this allows to transfer the repeat count from last TDSCGEN call 31089+* 31090+* 31091+* 31092+* write a comment indicating what REPINS does (in case NOGEN in effect) 31093+* 31094+*,// REPINS: do 50 times: 31095+* 31096+* MNOTE requires that ' is doubled for expanded variables 31097+* thus build &MASTR as a copy of '&ARGS with ' doubled 31098+* 31099+* 31100+*,// AWR FR0,FR2 31101+* 31102+* finally generate code: &ICNT copies of &CODE &ARGS 31103+* 0156EE 2E02 31104+ AWR FR0,FR2 0156F0 2E02 31105+ AWR FR0,FR2 0156F2 2E02 31106+ AWR FR0,FR2 0156F4 2E02 31107+ AWR FR0,FR2 0156F6 2E02 31108+ AWR FR0,FR2 0156F8 2E02 31109+ AWR FR0,FR2 0156FA 2E02 31110+ AWR FR0,FR2 0156FC 2E02 31111+ AWR FR0,FR2 0156FE 2E02 31112+ AWR FR0,FR2 015700 2E02 31113+ AWR FR0,FR2 015702 2E02 31114+ AWR FR0,FR2 015704 2E02 31115+ AWR FR0,FR2 015706 2E02 31116+ AWR FR0,FR2 015708 2E02 31117+ AWR FR0,FR2 01570A 2E02 31118+ AWR FR0,FR2 01570C 2E02 31119+ AWR FR0,FR2 01570E 2E02 31120+ AWR FR0,FR2 015710 2E02 31121+ AWR FR0,FR2 015712 2E02 31122+ AWR FR0,FR2 015714 2E02 31123+ AWR FR0,FR2 015716 2E02 31124+ AWR FR0,FR2 015718 2E02 31125+ AWR FR0,FR2 01571A 2E02 31126+ AWR FR0,FR2 01571C 2E02 31127+ AWR FR0,FR2 01571E 2E02 31128+ AWR FR0,FR2 015720 2E02 31129+ AWR FR0,FR2 015722 2E02 31130+ AWR FR0,FR2 015724 2E02 31131+ AWR FR0,FR2 015726 2E02 31132+ AWR FR0,FR2 015728 2E02 31133+ AWR FR0,FR2 01572A 2E02 31134+ AWR FR0,FR2 01572C 2E02 31135+ AWR FR0,FR2 01572E 2E02 31136+ AWR FR0,FR2 PAGE 569 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015730 2E02 31137+ AWR FR0,FR2 015732 2E02 31138+ AWR FR0,FR2 015734 2E02 31139+ AWR FR0,FR2 015736 2E02 31140+ AWR FR0,FR2 015738 2E02 31141+ AWR FR0,FR2 01573A 2E02 31142+ AWR FR0,FR2 01573C 2E02 31143+ AWR FR0,FR2 01573E 2E02 31144+ AWR FR0,FR2 015740 2E02 31145+ AWR FR0,FR2 015742 2E02 31146+ AWR FR0,FR2 015744 2E02 31147+ AWR FR0,FR2 015746 2E02 31148+ AWR FR0,FR2 015748 2E02 31149+ AWR FR0,FR2 01574A 2E02 31150+ AWR FR0,FR2 01574C 2E02 31151+ AWR FR0,FR2 01574E 2E02 31152+ AWR FR0,FR2 015750 2E02 31153+ AWR FR0,FR2 31154+* 015752 06FB 31155 BCTR R15,R11 31156 TSIMRET 015754 58F0 C0B0 15778 31157+ L R15,=A(SAVETST) R15 := current save area 015758 58DF 0004 00004 31158+ L R13,4(R15) get old save area back 01575C 98EC D00C 0000C 31159+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015760 07FE 31160+ BR 14 RETURN 02000000 015768 31161 DS 0D 015768 31162 T552V DS X'4E000000',X'00000001' 31163 TSIMEND 015770 31164+ LTORG 015770 434D21999999999A 31165 =D'1234.1' 015778 00000458 31166 =A(SAVETST) 1577C 31167+T552TEND EQU * 31168 * 31169 * Test 553 -- HDR R,R -------------------------------------- 31170 * 31171 TSIMBEG T553,13000,50,10,C'HDR R,R' 31172+* 003F84 31173+TDSCDAT CSECT 003F88 31174+ DS 0D 31175+* 003F88 00015780 31176+T553TDSC DC A(T553) // TENTRY 003F8C 000000A4 31177+ DC A(T553TEND-T553) // TLENGTH 003F90 000032C8 31178+ DC F'13000' // TLRCNT 003F94 00000032 31179+ DC F'50' // TIGCNT 003F98 0000000A 31180+ DC F'10' // TLTYPE 001CBA 31181+TEXT CSECT 001CBA E3F5F5F3 31182+SPTR2745 DC C'T553' 003F9C 31183+TDSCDAT CSECT 003F9C 31184+ DS 0F 003F9C 04001CBA 31185+ DC AL1(L'SPTR2745),AL3(SPTR2745) 001CBE 31186+TEXT CSECT 001CBE C8C4D940D96BD9 31187+SPTR2746 DC C'HDR R,R' 003FA0 31188+TDSCDAT CSECT 003FA0 31189+ DS 0F 003FA0 07001CBE 31190+ DC AL1(L'SPTR2746),AL3(SPTR2746) 31191+* PAGE 570 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004D1C 31192+TDSCTBL CSECT 04D1C 31193+T553TPTR EQU * 004D1C 00003F88 31194+ DC A(T553TDSC) enabled test 31195+* 01577C 31196+TCODE CSECT 015780 31197+ DS 0D ensure double word alignment for test 015780 31198+T553 DS 0H 01650000 015780 90EC D00C 0000C 31199+ STM 14,12,12(13) SAVE REGISTERS 02950000 015784 18CF 31200+ LR R12,R15 base register := entry address 15780 31201+ USING T553,R12 declare code base register 015786 41B0 C01E 1579E 31202+ LA R11,T553L load loop target to R11 01578A 58F0 C0A0 15820 31203+ L R15,=A(SAVETST) R15 := current save area 01578E 50DF 0004 00004 31204+ ST R13,4(R15) set back pointer in current save area 015792 182D 31205+ LR R2,R13 remember callers save area 015794 18DF 31206+ LR R13,R15 setup current save area 015796 50D2 0008 00008 31207+ ST R13,8(R2) set forw pointer in callers save area 00000 31208+ USING TDSC,R1 declare TDSC base register 01579A 58F0 1008 00008 31209+ L R15,TLRCNT load local repeat count to R15 31210+* 31211 * inner loop logic: 31212 * load FR0 with 1111111111. 31213 * 'half' it 50 times 31214 * 01579E 6800 C098 15818 31215 T553L LD FR0,=D'1111111111.0' 31216 REPINS HDR,(FR0,FR0) repeat: HDR FR0,FR0 31217+* 31218+* build from sublist &ALIST a comma separated string &ARGS 31219+* 31220+* 31221+* 31222+* 31223+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 31224+* this allows to transfer the repeat count from last TDSCGEN call 31225+* 31226+* 31227+* 31228+* write a comment indicating what REPINS does (in case NOGEN in effect) 31229+* 31230+*,// REPINS: do 50 times: 31231+* 31232+* MNOTE requires that ' is doubled for expanded variables 31233+* thus build &MASTR as a copy of '&ARGS with ' doubled 31234+* 31235+* 31236+*,// HDR FR0,FR0 31237+* 31238+* finally generate code: &ICNT copies of &CODE &ARGS 31239+* 0157A2 2400 31240+ HDR FR0,FR0 0157A4 2400 31241+ HDR FR0,FR0 0157A6 2400 31242+ HDR FR0,FR0 0157A8 2400 31243+ HDR FR0,FR0 0157AA 2400 31244+ HDR FR0,FR0 0157AC 2400 31245+ HDR FR0,FR0 0157AE 2400 31246+ HDR FR0,FR0 PAGE 571 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0157B0 2400 31247+ HDR FR0,FR0 0157B2 2400 31248+ HDR FR0,FR0 0157B4 2400 31249+ HDR FR0,FR0 0157B6 2400 31250+ HDR FR0,FR0 0157B8 2400 31251+ HDR FR0,FR0 0157BA 2400 31252+ HDR FR0,FR0 0157BC 2400 31253+ HDR FR0,FR0 0157BE 2400 31254+ HDR FR0,FR0 0157C0 2400 31255+ HDR FR0,FR0 0157C2 2400 31256+ HDR FR0,FR0 0157C4 2400 31257+ HDR FR0,FR0 0157C6 2400 31258+ HDR FR0,FR0 0157C8 2400 31259+ HDR FR0,FR0 0157CA 2400 31260+ HDR FR0,FR0 0157CC 2400 31261+ HDR FR0,FR0 0157CE 2400 31262+ HDR FR0,FR0 0157D0 2400 31263+ HDR FR0,FR0 0157D2 2400 31264+ HDR FR0,FR0 0157D4 2400 31265+ HDR FR0,FR0 0157D6 2400 31266+ HDR FR0,FR0 0157D8 2400 31267+ HDR FR0,FR0 0157DA 2400 31268+ HDR FR0,FR0 0157DC 2400 31269+ HDR FR0,FR0 0157DE 2400 31270+ HDR FR0,FR0 0157E0 2400 31271+ HDR FR0,FR0 0157E2 2400 31272+ HDR FR0,FR0 0157E4 2400 31273+ HDR FR0,FR0 0157E6 2400 31274+ HDR FR0,FR0 0157E8 2400 31275+ HDR FR0,FR0 0157EA 2400 31276+ HDR FR0,FR0 0157EC 2400 31277+ HDR FR0,FR0 0157EE 2400 31278+ HDR FR0,FR0 0157F0 2400 31279+ HDR FR0,FR0 0157F2 2400 31280+ HDR FR0,FR0 0157F4 2400 31281+ HDR FR0,FR0 0157F6 2400 31282+ HDR FR0,FR0 0157F8 2400 31283+ HDR FR0,FR0 0157FA 2400 31284+ HDR FR0,FR0 0157FC 2400 31285+ HDR FR0,FR0 0157FE 2400 31286+ HDR FR0,FR0 015800 2400 31287+ HDR FR0,FR0 015802 2400 31288+ HDR FR0,FR0 015804 2400 31289+ HDR FR0,FR0 31290+* 015806 06FB 31291 BCTR R15,R11 31292 TSIMRET 015808 58F0 C0A0 15820 31293+ L R15,=A(SAVETST) R15 := current save area 01580C 58DF 0004 00004 31294+ L R13,4(R15) get old save area back 015810 98EC D00C 0000C 31295+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015814 07FE 31296+ BR 14 RETURN 02000000 31297 TSIMEND 015818 31298+ LTORG 015818 48423A35C7000000 31299 =D'1111111111.0' 015820 00000458 31300 =A(SAVETST) 15824 31301+T553TEND EQU * PAGE 572 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 31302 * 31303 * Test 56x -- extended float arithmetic ==================== 31304 * 31305 * Test 560 -- AXR R,R -------------------------------------- 31306 * 31307 TSIMBEG T560,4000,50,1,C'AXR R,R' 31308+* 003FA4 31309+TDSCDAT CSECT 003FA8 31310+ DS 0D 31311+* 003FA8 00015828 31312+T560TDSC DC A(T560) // TENTRY 003FAC 000000B4 31313+ DC A(T560TEND-T560) // TLENGTH 003FB0 00000FA0 31314+ DC F'4000' // TLRCNT 003FB4 00000032 31315+ DC F'50' // TIGCNT 003FB8 00000001 31316+ DC F'1' // TLTYPE 001CC5 31317+TEXT CSECT 001CC5 E3F5F6F0 31318+SPTR2757 DC C'T560' 003FBC 31319+TDSCDAT CSECT 003FBC 31320+ DS 0F 003FBC 04001CC5 31321+ DC AL1(L'SPTR2757),AL3(SPTR2757) 001CC9 31322+TEXT CSECT 001CC9 C1E7D940D96BD9 31323+SPTR2758 DC C'AXR R,R' 003FC0 31324+TDSCDAT CSECT 003FC0 31325+ DS 0F 003FC0 07001CC9 31326+ DC AL1(L'SPTR2758),AL3(SPTR2758) 31327+* 004D20 31328+TDSCTBL CSECT 04D20 31329+T560TPTR EQU * 004D20 00003FA8 31330+ DC A(T560TDSC) enabled test 31331+* 015824 31332+TCODE CSECT 015828 31333+ DS 0D ensure double word alignment for test 015828 31334+T560 DS 0H 01650000 015828 90EC D00C 0000C 31335+ STM 14,12,12(13) SAVE REGISTERS 02950000 01582C 18CF 31336+ LR R12,R15 base register := entry address 15828 31337+ USING T560,R12 declare code base register 01582E 41B0 C02A 15852 31338+ LA R11,T560L load loop target to R11 015832 58F0 C0B0 158D8 31339+ L R15,=A(SAVETST) R15 := current save area 015836 50DF 0004 00004 31340+ ST R13,4(R15) set back pointer in current save area 01583A 182D 31341+ LR R2,R13 remember callers save area 01583C 18DF 31342+ LR R13,R15 setup current save area 01583E 50D2 0008 00008 31343+ ST R13,8(R2) set forw pointer in callers save area 00000 31344+ USING TDSC,R1 declare TDSC base register 015842 58F0 1008 00008 31345+ L R15,TLRCNT load local repeat count to R15 31346+* 31347 * 015846 2B00 31348 SDR FR0,FR0 015848 2820 31349 LDR FR2,FR0 01584A 6840 C0A0 158C8 31350 LD FR4,T560V1 01584E 6860 C0A8 158D0 31351 LD FR6,T560V1+8 31352 T560L REPINS AXR,(FR0,FR4) repeat: AXR FR0,FR4 31353+* 31354+* build from sublist &ALIST a comma separated string &ARGS 31355+* 31356+* PAGE 573 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 31357+* 31358+* 31359+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 31360+* this allows to transfer the repeat count from last TDSCGEN call 31361+* 31362+* 15852 31363+T560L EQU * 31364+* 31365+* write a comment indicating what REPINS does (in case NOGEN in effect) 31366+* 31367+*,// REPINS: do 50 times: 31368+* 31369+* MNOTE requires that ' is doubled for expanded variables 31370+* thus build &MASTR as a copy of '&ARGS with ' doubled 31371+* 31372+* 31373+*,// AXR FR0,FR4 31374+* 31375+* finally generate code: &ICNT copies of &CODE &ARGS 31376+* 015852 3604 31377+ AXR FR0,FR4 015854 3604 31378+ AXR FR0,FR4 015856 3604 31379+ AXR FR0,FR4 015858 3604 31380+ AXR FR0,FR4 01585A 3604 31381+ AXR FR0,FR4 01585C 3604 31382+ AXR FR0,FR4 01585E 3604 31383+ AXR FR0,FR4 015860 3604 31384+ AXR FR0,FR4 015862 3604 31385+ AXR FR0,FR4 015864 3604 31386+ AXR FR0,FR4 015866 3604 31387+ AXR FR0,FR4 015868 3604 31388+ AXR FR0,FR4 01586A 3604 31389+ AXR FR0,FR4 01586C 3604 31390+ AXR FR0,FR4 01586E 3604 31391+ AXR FR0,FR4 015870 3604 31392+ AXR FR0,FR4 015872 3604 31393+ AXR FR0,FR4 015874 3604 31394+ AXR FR0,FR4 015876 3604 31395+ AXR FR0,FR4 015878 3604 31396+ AXR FR0,FR4 01587A 3604 31397+ AXR FR0,FR4 01587C 3604 31398+ AXR FR0,FR4 01587E 3604 31399+ AXR FR0,FR4 015880 3604 31400+ AXR FR0,FR4 015882 3604 31401+ AXR FR0,FR4 015884 3604 31402+ AXR FR0,FR4 015886 3604 31403+ AXR FR0,FR4 015888 3604 31404+ AXR FR0,FR4 01588A 3604 31405+ AXR FR0,FR4 01588C 3604 31406+ AXR FR0,FR4 01588E 3604 31407+ AXR FR0,FR4 015890 3604 31408+ AXR FR0,FR4 015892 3604 31409+ AXR FR0,FR4 015894 3604 31410+ AXR FR0,FR4 015896 3604 31411+ AXR FR0,FR4 PAGE 574 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015898 3604 31412+ AXR FR0,FR4 01589A 3604 31413+ AXR FR0,FR4 01589C 3604 31414+ AXR FR0,FR4 01589E 3604 31415+ AXR FR0,FR4 0158A0 3604 31416+ AXR FR0,FR4 0158A2 3604 31417+ AXR FR0,FR4 0158A4 3604 31418+ AXR FR0,FR4 0158A6 3604 31419+ AXR FR0,FR4 0158A8 3604 31420+ AXR FR0,FR4 0158AA 3604 31421+ AXR FR0,FR4 0158AC 3604 31422+ AXR FR0,FR4 0158AE 3604 31423+ AXR FR0,FR4 0158B0 3604 31424+ AXR FR0,FR4 0158B2 3604 31425+ AXR FR0,FR4 0158B4 3604 31426+ AXR FR0,FR4 31427+* 0158B6 06FB 31428 BCTR R15,R11 31429 TSIMRET 0158B8 58F0 C0B0 158D8 31430+ L R15,=A(SAVETST) R15 := current save area 0158BC 58DF 0004 00004 31431+ L R13,4(R15) get old save area back 0158C0 98EC D00C 0000C 31432+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0158C4 07FE 31433+ BR 14 RETURN 02000000 31434 * 0158C6 0000 0158C8 4111999999999999 31435 T560V1 DC L'1.1' 31436 TSIMEND 0158D8 31437+ LTORG 0158D8 00000458 31438 =A(SAVETST) 158DC 31439+T560TEND EQU * 31440 * 31441 * Test 561 -- MXR R,R -------------------------------------- 31442 * 31443 TSIMBEG T561,3300,50,11,C'MXR R,R' 31444+* 003FC4 31445+TDSCDAT CSECT 003FC8 31446+ DS 0D 31447+* 003FC8 000158E0 31448+T561TDSC DC A(T561) // TENTRY 003FCC 000000CC 31449+ DC A(T561TEND-T561) // TLENGTH 003FD0 00000CE4 31450+ DC F'3300' // TLRCNT 003FD4 00000032 31451+ DC F'50' // TIGCNT 003FD8 0000000B 31452+ DC F'11' // TLTYPE 001CD0 31453+TEXT CSECT 001CD0 E3F5F6F1 31454+SPTR2769 DC C'T561' 003FDC 31455+TDSCDAT CSECT 003FDC 31456+ DS 0F 003FDC 04001CD0 31457+ DC AL1(L'SPTR2769),AL3(SPTR2769) 001CD4 31458+TEXT CSECT 001CD4 D4E7D940D96BD9 31459+SPTR2770 DC C'MXR R,R' 003FE0 31460+TDSCDAT CSECT 003FE0 31461+ DS 0F 003FE0 07001CD4 31462+ DC AL1(L'SPTR2770),AL3(SPTR2770) 31463+* 004D24 31464+TDSCTBL CSECT 04D24 31465+T561TPTR EQU * PAGE 575 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004D24 00003FC8 31466+ DC A(T561TDSC) enabled test 31467+* 0158DC 31468+TCODE CSECT 0158E0 31469+ DS 0D ensure double word alignment for test 0158E0 31470+T561 DS 0H 01650000 0158E0 90EC D00C 0000C 31471+ STM 14,12,12(13) SAVE REGISTERS 02950000 0158E4 18CF 31472+ LR R12,R15 base register := entry address 158E0 31473+ USING T561,R12 declare code base register 0158E6 41B0 C026 15906 31474+ LA R11,T561L load loop target to R11 0158EA 58F0 C0C8 159A8 31475+ L R15,=A(SAVETST) R15 := current save area 0158EE 50DF 0004 00004 31476+ ST R13,4(R15) set back pointer in current save area 0158F2 182D 31477+ LR R2,R13 remember callers save area 0158F4 18DF 31478+ LR R13,R15 setup current save area 0158F6 50D2 0008 00008 31479+ ST R13,8(R2) set forw pointer in callers save area 00000 31480+ USING TDSC,R1 declare TDSC base register 0158FA 58F0 1008 00008 31481+ L R15,TLRCNT load local repeat count to R15 31482+* 31483 * 0158FE 6840 C0B8 15998 31484 LD FR4,T561V2 015902 6860 C0C0 159A0 31485 LD FR6,T561V2+8 015906 6800 C0A8 15988 31486 T561L LD FR0,T561V1 01590A 6820 C0B0 15990 31487 LD FR2,T561V1+8 31488 REPINS MXR,(FR0,FR4) repeat: MXR FR0,FR4 31489+* 31490+* build from sublist &ALIST a comma separated string &ARGS 31491+* 31492+* 31493+* 31494+* 31495+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 31496+* this allows to transfer the repeat count from last TDSCGEN call 31497+* 31498+* 31499+* 31500+* write a comment indicating what REPINS does (in case NOGEN in effect) 31501+* 31502+*,// REPINS: do 50 times: 31503+* 31504+* MNOTE requires that ' is doubled for expanded variables 31505+* thus build &MASTR as a copy of '&ARGS with ' doubled 31506+* 31507+* 31508+*,// MXR FR0,FR4 31509+* 31510+* finally generate code: &ICNT copies of &CODE &ARGS 31511+* 01590E 2604 31512+ MXR FR0,FR4 015910 2604 31513+ MXR FR0,FR4 015912 2604 31514+ MXR FR0,FR4 015914 2604 31515+ MXR FR0,FR4 015916 2604 31516+ MXR FR0,FR4 015918 2604 31517+ MXR FR0,FR4 01591A 2604 31518+ MXR FR0,FR4 01591C 2604 31519+ MXR FR0,FR4 01591E 2604 31520+ MXR FR0,FR4 PAGE 576 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015920 2604 31521+ MXR FR0,FR4 015922 2604 31522+ MXR FR0,FR4 015924 2604 31523+ MXR FR0,FR4 015926 2604 31524+ MXR FR0,FR4 015928 2604 31525+ MXR FR0,FR4 01592A 2604 31526+ MXR FR0,FR4 01592C 2604 31527+ MXR FR0,FR4 01592E 2604 31528+ MXR FR0,FR4 015930 2604 31529+ MXR FR0,FR4 015932 2604 31530+ MXR FR0,FR4 015934 2604 31531+ MXR FR0,FR4 015936 2604 31532+ MXR FR0,FR4 015938 2604 31533+ MXR FR0,FR4 01593A 2604 31534+ MXR FR0,FR4 01593C 2604 31535+ MXR FR0,FR4 01593E 2604 31536+ MXR FR0,FR4 015940 2604 31537+ MXR FR0,FR4 015942 2604 31538+ MXR FR0,FR4 015944 2604 31539+ MXR FR0,FR4 015946 2604 31540+ MXR FR0,FR4 015948 2604 31541+ MXR FR0,FR4 01594A 2604 31542+ MXR FR0,FR4 01594C 2604 31543+ MXR FR0,FR4 01594E 2604 31544+ MXR FR0,FR4 015950 2604 31545+ MXR FR0,FR4 015952 2604 31546+ MXR FR0,FR4 015954 2604 31547+ MXR FR0,FR4 015956 2604 31548+ MXR FR0,FR4 015958 2604 31549+ MXR FR0,FR4 01595A 2604 31550+ MXR FR0,FR4 01595C 2604 31551+ MXR FR0,FR4 01595E 2604 31552+ MXR FR0,FR4 015960 2604 31553+ MXR FR0,FR4 015962 2604 31554+ MXR FR0,FR4 015964 2604 31555+ MXR FR0,FR4 015966 2604 31556+ MXR FR0,FR4 015968 2604 31557+ MXR FR0,FR4 01596A 2604 31558+ MXR FR0,FR4 01596C 2604 31559+ MXR FR0,FR4 01596E 2604 31560+ MXR FR0,FR4 015970 2604 31561+ MXR FR0,FR4 31562+* 015972 06FB 31563 BCTR R15,R11 31564 TSIMRET 015974 58F0 C0C8 159A8 31565+ L R15,=A(SAVETST) R15 := current save area 015978 58DF 0004 00004 31566+ L R13,4(R15) get old save area back 01597C 98EC D00C 0000C 31567+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015980 07FE 31568+ BR 14 RETURN 02000000 31569 * 015982 000000000000 015988 4110000000000000 31570 T561V1 DC L'1.0' 015998 4111999999999999 31571 T561V2 DC L'1.1' 31572 TSIMEND 0159A8 31573+ LTORG 0159A8 00000458 31574 =A(SAVETST) PAGE 577 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 159AC 31575+T561TEND EQU * 31576 * 31577 * Test 6xx -- miscellaneous instructions ======================== 31578 * 31579 * Test 600 -- STCK m --------------------------------------- 31580 * 31581 TSIMBEG T600,1000,10,1,C'STCK m' 31582+* 003FE4 31583+TDSCDAT CSECT 003FE8 31584+ DS 0D 31585+* 003FE8 000159B0 31586+T600TDSC DC A(T600) // TENTRY 003FEC 0000007C 31587+ DC A(T600TEND-T600) // TLENGTH 003FF0 000003E8 31588+ DC F'1000' // TLRCNT 003FF4 0000000A 31589+ DC F'10' // TIGCNT 003FF8 00000001 31590+ DC F'1' // TLTYPE 001CDB 31591+TEXT CSECT 001CDB E3F6F0F0 31592+SPTR2781 DC C'T600' 003FFC 31593+TDSCDAT CSECT 003FFC 31594+ DS 0F 003FFC 04001CDB 31595+ DC AL1(L'SPTR2781),AL3(SPTR2781) 001CDF 31596+TEXT CSECT 001CDF E2E3C3D24094 31597+SPTR2782 DC C'STCK m' 004000 31598+TDSCDAT CSECT 004000 31599+ DS 0F 004000 06001CDF 31600+ DC AL1(L'SPTR2782),AL3(SPTR2782) 31601+* 004D28 31602+TDSCTBL CSECT 04D28 31603+T600TPTR EQU * 004D28 00003FE8 31604+ DC A(T600TDSC) enabled test 31605+* 0159AC 31606+TCODE CSECT 0159B0 31607+ DS 0D ensure double word alignment for test 0159B0 31608+T600 DS 0H 01650000 0159B0 90EC D00C 0000C 31609+ STM 14,12,12(13) SAVE REGISTERS 02950000 0159B4 18CF 31610+ LR R12,R15 base register := entry address 159B0 31611+ USING T600,R12 declare code base register 0159B6 41B0 C01E 159CE 31612+ LA R11,T600L load loop target to R11 0159BA 58F0 C078 15A28 31613+ L R15,=A(SAVETST) R15 := current save area 0159BE 50DF 0004 00004 31614+ ST R13,4(R15) set back pointer in current save area 0159C2 182D 31615+ LR R2,R13 remember callers save area 0159C4 18DF 31616+ LR R13,R15 setup current save area 0159C6 50D2 0008 00008 31617+ ST R13,8(R2) set forw pointer in callers save area 00000 31618+ USING TDSC,R1 declare TDSC base register 0159CA 58F0 1008 00008 31619+ L R15,TLRCNT load local repeat count to R15 31620+* 31621 * 31622 T600L REPINS STCK,(T600V) repeat: STCK T600V 31623+* 31624+* build from sublist &ALIST a comma separated string &ARGS 31625+* 31626+* 31627+* 31628+* 31629+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT PAGE 578 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 31630+* this allows to transfer the repeat count from last TDSCGEN call 31631+* 31632+* 159CE 31633+T600L EQU * 31634+* 31635+* write a comment indicating what REPINS does (in case NOGEN in effect) 31636+* 31637+*,// REPINS: do 10 times: 31638+* 31639+* MNOTE requires that ' is doubled for expanded variables 31640+* thus build &MASTR as a copy of '&ARGS with ' doubled 31641+* 31642+* 31643+*,// STCK T600V 31644+* 31645+* finally generate code: &ICNT copies of &CODE &ARGS 31646+* 0159CE B205 C058 15A08 31647+ STCK T600V 0159D2 B205 C058 15A08 31648+ STCK T600V 0159D6 B205 C058 15A08 31649+ STCK T600V 0159DA B205 C058 15A08 31650+ STCK T600V 0159DE B205 C058 15A08 31651+ STCK T600V 0159E2 B205 C058 15A08 31652+ STCK T600V 0159E6 B205 C058 15A08 31653+ STCK T600V 0159EA B205 C058 15A08 31654+ STCK T600V 0159EE B205 C058 15A08 31655+ STCK T600V 0159F2 B205 C058 15A08 31656+ STCK T600V 31657+* 0159F6 06FB 31658 BCTR R15,R11 31659 TSIMRET 0159F8 58F0 C078 15A28 31660+ L R15,=A(SAVETST) R15 := current save area 0159FC 58DF 0004 00004 31661+ L R13,4(R15) get old save area back 015A00 98EC D00C 0000C 31662+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015A04 07FE 31663+ BR 14 RETURN 02000000 31664 * 015A08 31665 DS 0D 015A08 31666 T600V DS 2L 31667 TSIMEND 015A28 31668+ LTORG 015A28 00000458 31669 =A(SAVETST) 15A2C 31670+T600TEND EQU * 31671 * 31672 * Test 601 -- SPM R ---------------------------------------- 31673 * 31674 TSIMBEG T601,19000,100,1,C'SPM R' 31675+* 004004 31676+TDSCDAT CSECT 004008 31677+ DS 0D 31678+* 004008 00015A30 31679+T601TDSC DC A(T601) // TENTRY 00400C 000000FC 31680+ DC A(T601TEND-T601) // TLENGTH 004010 00004A38 31681+ DC F'19000' // TLRCNT 004014 00000064 31682+ DC F'100' // TIGCNT 004018 00000001 31683+ DC F'1' // TLTYPE 001CE5 31684+TEXT CSECT PAGE 579 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 001CE5 E3F6F0F1 31685+SPTR2793 DC C'T601' 00401C 31686+TDSCDAT CSECT 00401C 31687+ DS 0F 00401C 04001CE5 31688+ DC AL1(L'SPTR2793),AL3(SPTR2793) 001CE9 31689+TEXT CSECT 001CE9 E2D7D440D9 31690+SPTR2794 DC C'SPM R' 004020 31691+TDSCDAT CSECT 004020 31692+ DS 0F 004020 05001CE9 31693+ DC AL1(L'SPTR2794),AL3(SPTR2794) 31694+* 004D2C 31695+TDSCTBL CSECT 04D2C 31696+T601TPTR EQU * 004D2C 00004008 31697+ DC A(T601TDSC) enabled test 31698+* 015A2C 31699+TCODE CSECT 015A30 31700+ DS 0D ensure double word alignment for test 015A30 31701+T601 DS 0H 01650000 015A30 90EC D00C 0000C 31702+ STM 14,12,12(13) SAVE REGISTERS 02950000 015A34 18CF 31703+ LR R12,R15 base register := entry address 15A30 31704+ USING T601,R12 declare code base register 015A36 41B0 C020 15A50 31705+ LA R11,T601L load loop target to R11 015A3A 58F0 C0F8 15B28 31706+ L R15,=A(SAVETST) R15 := current save area 015A3E 50DF 0004 00004 31707+ ST R13,4(R15) set back pointer in current save area 015A42 182D 31708+ LR R2,R13 remember callers save area 015A44 18DF 31709+ LR R13,R15 setup current save area 015A46 50D2 0008 00008 31710+ ST R13,8(R2) set forw pointer in callers save area 00000 31711+ USING TDSC,R1 declare TDSC base register 015A4A 58F0 1008 00008 31712+ L R15,TLRCNT load local repeat count to R15 31713+* 31714 * 015A4E 0520 31715 BALR R2,0 get prog mask to R2 31716 T601L REPINS SPM,R2 repeat: SPM R2 31717+* 31718+* build from sublist &ALIST a comma separated string &ARGS 31719+* 31720+* 31721+* 31722+* 31723+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 31724+* this allows to transfer the repeat count from last TDSCGEN call 31725+* 31726+* 15A50 31727+T601L EQU * 31728+* 31729+* write a comment indicating what REPINS does (in case NOGEN in effect) 31730+* 31731+*,// REPINS: do 100 times: 31732+* 31733+* MNOTE requires that ' is doubled for expanded variables 31734+* thus build &MASTR as a copy of '&ARGS with ' doubled 31735+* 31736+* 31737+*,// SPM R2 31738+* 31739+* finally generate code: &ICNT copies of &CODE &ARGS PAGE 580 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 31740+* 015A50 0420 31741+ SPM R2 015A52 0420 31742+ SPM R2 015A54 0420 31743+ SPM R2 015A56 0420 31744+ SPM R2 015A58 0420 31745+ SPM R2 015A5A 0420 31746+ SPM R2 015A5C 0420 31747+ SPM R2 015A5E 0420 31748+ SPM R2 015A60 0420 31749+ SPM R2 015A62 0420 31750+ SPM R2 015A64 0420 31751+ SPM R2 015A66 0420 31752+ SPM R2 015A68 0420 31753+ SPM R2 015A6A 0420 31754+ SPM R2 015A6C 0420 31755+ SPM R2 015A6E 0420 31756+ SPM R2 015A70 0420 31757+ SPM R2 015A72 0420 31758+ SPM R2 015A74 0420 31759+ SPM R2 015A76 0420 31760+ SPM R2 015A78 0420 31761+ SPM R2 015A7A 0420 31762+ SPM R2 015A7C 0420 31763+ SPM R2 015A7E 0420 31764+ SPM R2 015A80 0420 31765+ SPM R2 015A82 0420 31766+ SPM R2 015A84 0420 31767+ SPM R2 015A86 0420 31768+ SPM R2 015A88 0420 31769+ SPM R2 015A8A 0420 31770+ SPM R2 015A8C 0420 31771+ SPM R2 015A8E 0420 31772+ SPM R2 015A90 0420 31773+ SPM R2 015A92 0420 31774+ SPM R2 015A94 0420 31775+ SPM R2 015A96 0420 31776+ SPM R2 015A98 0420 31777+ SPM R2 015A9A 0420 31778+ SPM R2 015A9C 0420 31779+ SPM R2 015A9E 0420 31780+ SPM R2 015AA0 0420 31781+ SPM R2 015AA2 0420 31782+ SPM R2 015AA4 0420 31783+ SPM R2 015AA6 0420 31784+ SPM R2 015AA8 0420 31785+ SPM R2 015AAA 0420 31786+ SPM R2 015AAC 0420 31787+ SPM R2 015AAE 0420 31788+ SPM R2 015AB0 0420 31789+ SPM R2 015AB2 0420 31790+ SPM R2 015AB4 0420 31791+ SPM R2 015AB6 0420 31792+ SPM R2 015AB8 0420 31793+ SPM R2 015ABA 0420 31794+ SPM R2 PAGE 581 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015ABC 0420 31795+ SPM R2 015ABE 0420 31796+ SPM R2 015AC0 0420 31797+ SPM R2 015AC2 0420 31798+ SPM R2 015AC4 0420 31799+ SPM R2 015AC6 0420 31800+ SPM R2 015AC8 0420 31801+ SPM R2 015ACA 0420 31802+ SPM R2 015ACC 0420 31803+ SPM R2 015ACE 0420 31804+ SPM R2 015AD0 0420 31805+ SPM R2 015AD2 0420 31806+ SPM R2 015AD4 0420 31807+ SPM R2 015AD6 0420 31808+ SPM R2 015AD8 0420 31809+ SPM R2 015ADA 0420 31810+ SPM R2 015ADC 0420 31811+ SPM R2 015ADE 0420 31812+ SPM R2 015AE0 0420 31813+ SPM R2 015AE2 0420 31814+ SPM R2 015AE4 0420 31815+ SPM R2 015AE6 0420 31816+ SPM R2 015AE8 0420 31817+ SPM R2 015AEA 0420 31818+ SPM R2 015AEC 0420 31819+ SPM R2 015AEE 0420 31820+ SPM R2 015AF0 0420 31821+ SPM R2 015AF2 0420 31822+ SPM R2 015AF4 0420 31823+ SPM R2 015AF6 0420 31824+ SPM R2 015AF8 0420 31825+ SPM R2 015AFA 0420 31826+ SPM R2 015AFC 0420 31827+ SPM R2 015AFE 0420 31828+ SPM R2 015B00 0420 31829+ SPM R2 015B02 0420 31830+ SPM R2 015B04 0420 31831+ SPM R2 015B06 0420 31832+ SPM R2 015B08 0420 31833+ SPM R2 015B0A 0420 31834+ SPM R2 015B0C 0420 31835+ SPM R2 015B0E 0420 31836+ SPM R2 015B10 0420 31837+ SPM R2 015B12 0420 31838+ SPM R2 015B14 0420 31839+ SPM R2 015B16 0420 31840+ SPM R2 31841+* 015B18 06FB 31842 BCTR R15,R11 31843 TSIMRET 015B1A 58F0 C0F8 15B28 31844+ L R15,=A(SAVETST) R15 := current save area 015B1E 58DF 0004 00004 31845+ L R13,4(R15) get old save area back 015B22 98EC D00C 0000C 31846+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015B26 07FE 31847+ BR 14 RETURN 02000000 31848 TSIMEND 015B28 31849+ LTORG PAGE 582 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015B28 00000458 31850 =A(SAVETST) 15B2C 31851+T601TEND EQU * 31852 * 31853 * Test 610 -- EX R,i (with TM) ----------------------------- 31854 * 31855 TSIMBEG T610,3500,50,1,C'EX R,i (with TM)' 31856+* 004024 31857+TDSCDAT CSECT 004028 31858+ DS 0D 31859+* 004028 00015B30 31860+T610TDSC DC A(T610) // TENTRY 00402C 00000104 31861+ DC A(T610TEND-T610) // TLENGTH 004030 00000DAC 31862+ DC F'3500' // TLRCNT 004034 00000032 31863+ DC F'50' // TIGCNT 004038 00000001 31864+ DC F'1' // TLTYPE 001CEE 31865+TEXT CSECT 001CEE E3F6F1F0 31866+SPTR2805 DC C'T610' 00403C 31867+TDSCDAT CSECT 00403C 31868+ DS 0F 00403C 04001CEE 31869+ DC AL1(L'SPTR2805),AL3(SPTR2805) 001CF2 31870+TEXT CSECT 001CF2 C5E740D96B89404D 31871+SPTR2806 DC C'EX R,i (with TM)' 004040 31872+TDSCDAT CSECT 004040 31873+ DS 0F 004040 10001CF2 31874+ DC AL1(L'SPTR2806),AL3(SPTR2806) 31875+* 004D30 31876+TDSCTBL CSECT 04D30 31877+T610TPTR EQU * 004D30 00004028 31878+ DC A(T610TDSC) enabled test 31879+* 015B2C 31880+TCODE CSECT 015B30 31881+ DS 0D ensure double word alignment for test 015B30 31882+T610 DS 0H 01650000 015B30 90EC D00C 0000C 31883+ STM 14,12,12(13) SAVE REGISTERS 02950000 015B34 18CF 31884+ LR R12,R15 base register := entry address 15B30 31885+ USING T610,R12 declare code base register 015B36 41B0 C022 15B52 31886+ LA R11,T610L load loop target to R11 015B3A 58F0 C100 15C30 31887+ L R15,=A(SAVETST) R15 := current save area 015B3E 50DF 0004 00004 31888+ ST R13,4(R15) set back pointer in current save area 015B42 182D 31889+ LR R2,R13 remember callers save area 015B44 18DF 31890+ LR R13,R15 setup current save area 015B46 50D2 0008 00008 31891+ ST R13,8(R2) set forw pointer in callers save area 00000 31892+ USING TDSC,R1 declare TDSC base register 015B4A 58F0 1008 00008 31893+ L R15,TLRCNT load local repeat count to R15 31894+* 31895 * 015B4E 4120 0001 00001 31896 LA R2,X'01' 31897 T610L REPINS EX,(R2,T610I) repeat: EX R2,T610I 31898+* 31899+* build from sublist &ALIST a comma separated string &ARGS 31900+* 31901+* 31902+* 31903+* 31904+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT PAGE 583 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 31905+* this allows to transfer the repeat count from last TDSCGEN call 31906+* 31907+* 15B52 31908+T610L EQU * 31909+* 31910+* write a comment indicating what REPINS does (in case NOGEN in effect) 31911+* 31912+*,// REPINS: do 50 times: 31913+* 31914+* MNOTE requires that ' is doubled for expanded variables 31915+* thus build &MASTR as a copy of '&ARGS with ' doubled 31916+* 31917+* 31918+*,// EX R2,T610I 31919+* 31920+* finally generate code: &ICNT copies of &CODE &ARGS 31921+* 015B52 4420 C0FA 15C2A 31922+ EX R2,T610I 015B56 4420 C0FA 15C2A 31923+ EX R2,T610I 015B5A 4420 C0FA 15C2A 31924+ EX R2,T610I 015B5E 4420 C0FA 15C2A 31925+ EX R2,T610I 015B62 4420 C0FA 15C2A 31926+ EX R2,T610I 015B66 4420 C0FA 15C2A 31927+ EX R2,T610I 015B6A 4420 C0FA 15C2A 31928+ EX R2,T610I 015B6E 4420 C0FA 15C2A 31929+ EX R2,T610I 015B72 4420 C0FA 15C2A 31930+ EX R2,T610I 015B76 4420 C0FA 15C2A 31931+ EX R2,T610I 015B7A 4420 C0FA 15C2A 31932+ EX R2,T610I 015B7E 4420 C0FA 15C2A 31933+ EX R2,T610I 015B82 4420 C0FA 15C2A 31934+ EX R2,T610I 015B86 4420 C0FA 15C2A 31935+ EX R2,T610I 015B8A 4420 C0FA 15C2A 31936+ EX R2,T610I 015B8E 4420 C0FA 15C2A 31937+ EX R2,T610I 015B92 4420 C0FA 15C2A 31938+ EX R2,T610I 015B96 4420 C0FA 15C2A 31939+ EX R2,T610I 015B9A 4420 C0FA 15C2A 31940+ EX R2,T610I 015B9E 4420 C0FA 15C2A 31941+ EX R2,T610I 015BA2 4420 C0FA 15C2A 31942+ EX R2,T610I 015BA6 4420 C0FA 15C2A 31943+ EX R2,T610I 015BAA 4420 C0FA 15C2A 31944+ EX R2,T610I 015BAE 4420 C0FA 15C2A 31945+ EX R2,T610I 015BB2 4420 C0FA 15C2A 31946+ EX R2,T610I 015BB6 4420 C0FA 15C2A 31947+ EX R2,T610I 015BBA 4420 C0FA 15C2A 31948+ EX R2,T610I 015BBE 4420 C0FA 15C2A 31949+ EX R2,T610I 015BC2 4420 C0FA 15C2A 31950+ EX R2,T610I 015BC6 4420 C0FA 15C2A 31951+ EX R2,T610I 015BCA 4420 C0FA 15C2A 31952+ EX R2,T610I 015BCE 4420 C0FA 15C2A 31953+ EX R2,T610I 015BD2 4420 C0FA 15C2A 31954+ EX R2,T610I 015BD6 4420 C0FA 15C2A 31955+ EX R2,T610I 015BDA 4420 C0FA 15C2A 31956+ EX R2,T610I 015BDE 4420 C0FA 15C2A 31957+ EX R2,T610I 015BE2 4420 C0FA 15C2A 31958+ EX R2,T610I 015BE6 4420 C0FA 15C2A 31959+ EX R2,T610I PAGE 584 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015BEA 4420 C0FA 15C2A 31960+ EX R2,T610I 015BEE 4420 C0FA 15C2A 31961+ EX R2,T610I 015BF2 4420 C0FA 15C2A 31962+ EX R2,T610I 015BF6 4420 C0FA 15C2A 31963+ EX R2,T610I 015BFA 4420 C0FA 15C2A 31964+ EX R2,T610I 015BFE 4420 C0FA 15C2A 31965+ EX R2,T610I 015C02 4420 C0FA 15C2A 31966+ EX R2,T610I 015C06 4420 C0FA 15C2A 31967+ EX R2,T610I 015C0A 4420 C0FA 15C2A 31968+ EX R2,T610I 015C0E 4420 C0FA 15C2A 31969+ EX R2,T610I 015C12 4420 C0FA 15C2A 31970+ EX R2,T610I 015C16 4420 C0FA 15C2A 31971+ EX R2,T610I 31972+* 015C1A 06FB 31973 BCTR R15,R11 31974 TSIMRET 015C1C 58F0 C100 15C30 31975+ L R15,=A(SAVETST) R15 := current save area 015C20 58DF 0004 00004 31976+ L R13,4(R15) get old save area back 015C24 98EC D00C 0000C 31977+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015C28 07FE 31978+ BR 14 RETURN 02000000 31979 * 015C2A 9100 C0FE 15C2E 31980 T610I TM T610V,X'00' executed via EX 015C2E 01 31981 T610V DC X'01' target for TM instruction 31982 TSIMEND 015C30 31983+ LTORG 015C30 00000458 31984 =A(SAVETST) 15C34 31985+T610TEND EQU * 31986 * 31987 * Test 611 -- EX R,i (with XI) ----------------------------- 31988 * 31989 TSIMBEG T611,3500,50,1,C'EX R,i (with XI)' 31990+* 004044 31991+TDSCDAT CSECT 004048 31992+ DS 0D 31993+* 004048 00015C38 31994+T611TDSC DC A(T611) // TENTRY 00404C 00000104 31995+ DC A(T611TEND-T611) // TLENGTH 004050 00000DAC 31996+ DC F'3500' // TLRCNT 004054 00000032 31997+ DC F'50' // TIGCNT 004058 00000001 31998+ DC F'1' // TLTYPE 001D02 31999+TEXT CSECT 001D02 E3F6F1F1 32000+SPTR2817 DC C'T611' 00405C 32001+TDSCDAT CSECT 00405C 32002+ DS 0F 00405C 04001D02 32003+ DC AL1(L'SPTR2817),AL3(SPTR2817) 001D06 32004+TEXT CSECT 001D06 C5E740D96B89404D 32005+SPTR2818 DC C'EX R,i (with XI)' 004060 32006+TDSCDAT CSECT 004060 32007+ DS 0F 004060 10001D06 32008+ DC AL1(L'SPTR2818),AL3(SPTR2818) 32009+* 004D34 32010+TDSCTBL CSECT 04D34 32011+T611TPTR EQU * 004D34 00004048 32012+ DC A(T611TDSC) enabled test 32013+* 015C34 32014+TCODE CSECT PAGE 585 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015C38 32015+ DS 0D ensure double word alignment for test 015C38 32016+T611 DS 0H 01650000 015C38 90EC D00C 0000C 32017+ STM 14,12,12(13) SAVE REGISTERS 02950000 015C3C 18CF 32018+ LR R12,R15 base register := entry address 15C38 32019+ USING T611,R12 declare code base register 015C3E 41B0 C022 15C5A 32020+ LA R11,T611L load loop target to R11 015C42 58F0 C100 15D38 32021+ L R15,=A(SAVETST) R15 := current save area 015C46 50DF 0004 00004 32022+ ST R13,4(R15) set back pointer in current save area 015C4A 182D 32023+ LR R2,R13 remember callers save area 015C4C 18DF 32024+ LR R13,R15 setup current save area 015C4E 50D2 0008 00008 32025+ ST R13,8(R2) set forw pointer in callers save area 00000 32026+ USING TDSC,R1 declare TDSC base register 015C52 58F0 1008 00008 32027+ L R15,TLRCNT load local repeat count to R15 32028+* 32029 * 015C56 4120 0003 00003 32030 LA R2,X'03' 32031 T611L REPINS EX,(R2,T611I) repeat: EX R2,T611I 32032+* 32033+* build from sublist &ALIST a comma separated string &ARGS 32034+* 32035+* 32036+* 32037+* 32038+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 32039+* this allows to transfer the repeat count from last TDSCGEN call 32040+* 32041+* 15C5A 32042+T611L EQU * 32043+* 32044+* write a comment indicating what REPINS does (in case NOGEN in effect) 32045+* 32046+*,// REPINS: do 50 times: 32047+* 32048+* MNOTE requires that ' is doubled for expanded variables 32049+* thus build &MASTR as a copy of '&ARGS with ' doubled 32050+* 32051+* 32052+*,// EX R2,T611I 32053+* 32054+* finally generate code: &ICNT copies of &CODE &ARGS 32055+* 015C5A 4420 C0FA 15D32 32056+ EX R2,T611I 015C5E 4420 C0FA 15D32 32057+ EX R2,T611I 015C62 4420 C0FA 15D32 32058+ EX R2,T611I 015C66 4420 C0FA 15D32 32059+ EX R2,T611I 015C6A 4420 C0FA 15D32 32060+ EX R2,T611I 015C6E 4420 C0FA 15D32 32061+ EX R2,T611I 015C72 4420 C0FA 15D32 32062+ EX R2,T611I 015C76 4420 C0FA 15D32 32063+ EX R2,T611I 015C7A 4420 C0FA 15D32 32064+ EX R2,T611I 015C7E 4420 C0FA 15D32 32065+ EX R2,T611I 015C82 4420 C0FA 15D32 32066+ EX R2,T611I 015C86 4420 C0FA 15D32 32067+ EX R2,T611I 015C8A 4420 C0FA 15D32 32068+ EX R2,T611I 015C8E 4420 C0FA 15D32 32069+ EX R2,T611I PAGE 586 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015C92 4420 C0FA 15D32 32070+ EX R2,T611I 015C96 4420 C0FA 15D32 32071+ EX R2,T611I 015C9A 4420 C0FA 15D32 32072+ EX R2,T611I 015C9E 4420 C0FA 15D32 32073+ EX R2,T611I 015CA2 4420 C0FA 15D32 32074+ EX R2,T611I 015CA6 4420 C0FA 15D32 32075+ EX R2,T611I 015CAA 4420 C0FA 15D32 32076+ EX R2,T611I 015CAE 4420 C0FA 15D32 32077+ EX R2,T611I 015CB2 4420 C0FA 15D32 32078+ EX R2,T611I 015CB6 4420 C0FA 15D32 32079+ EX R2,T611I 015CBA 4420 C0FA 15D32 32080+ EX R2,T611I 015CBE 4420 C0FA 15D32 32081+ EX R2,T611I 015CC2 4420 C0FA 15D32 32082+ EX R2,T611I 015CC6 4420 C0FA 15D32 32083+ EX R2,T611I 015CCA 4420 C0FA 15D32 32084+ EX R2,T611I 015CCE 4420 C0FA 15D32 32085+ EX R2,T611I 015CD2 4420 C0FA 15D32 32086+ EX R2,T611I 015CD6 4420 C0FA 15D32 32087+ EX R2,T611I 015CDA 4420 C0FA 15D32 32088+ EX R2,T611I 015CDE 4420 C0FA 15D32 32089+ EX R2,T611I 015CE2 4420 C0FA 15D32 32090+ EX R2,T611I 015CE6 4420 C0FA 15D32 32091+ EX R2,T611I 015CEA 4420 C0FA 15D32 32092+ EX R2,T611I 015CEE 4420 C0FA 15D32 32093+ EX R2,T611I 015CF2 4420 C0FA 15D32 32094+ EX R2,T611I 015CF6 4420 C0FA 15D32 32095+ EX R2,T611I 015CFA 4420 C0FA 15D32 32096+ EX R2,T611I 015CFE 4420 C0FA 15D32 32097+ EX R2,T611I 015D02 4420 C0FA 15D32 32098+ EX R2,T611I 015D06 4420 C0FA 15D32 32099+ EX R2,T611I 015D0A 4420 C0FA 15D32 32100+ EX R2,T611I 015D0E 4420 C0FA 15D32 32101+ EX R2,T611I 015D12 4420 C0FA 15D32 32102+ EX R2,T611I 015D16 4420 C0FA 15D32 32103+ EX R2,T611I 015D1A 4420 C0FA 15D32 32104+ EX R2,T611I 015D1E 4420 C0FA 15D32 32105+ EX R2,T611I 32106+* 015D22 06FB 32107 BCTR R15,R11 32108 TSIMRET 015D24 58F0 C100 15D38 32109+ L R15,=A(SAVETST) R15 := current save area 015D28 58DF 0004 00004 32110+ L R13,4(R15) get old save area back 015D2C 98EC D00C 0000C 32111+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015D30 07FE 32112+ BR 14 RETURN 02000000 32113 * 015D32 9700 C0FE 15D36 32114 T611I XI T611V,X'00' executed via EX 015D36 F1 32115 T611V DC X'F1' target for XI instruction 32116 TSIMEND 015D38 32117+ LTORG 015D38 00000458 32118 =A(SAVETST) 15D3C 32119+T611TEND EQU * 32120 * 32121 * Test 620 -- TS m (zero) ---------------------------------- 32122 * 32123 TSIMBEG T620,2300,50,1,C'MVI;TS m (zero)' 32124+* PAGE 587 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004064 32125+TDSCDAT CSECT 004068 32126+ DS 0D 32127+* 004068 00015D40 32128+T620TDSC DC A(T620) // TENTRY 00406C 000001C4 32129+ DC A(T620TEND-T620) // TLENGTH 004070 000008FC 32130+ DC F'2300' // TLRCNT 004074 00000032 32131+ DC F'50' // TIGCNT 004078 00000001 32132+ DC F'1' // TLTYPE 001D16 32133+TEXT CSECT 001D16 E3F6F2F0 32134+SPTR2829 DC C'T620' 00407C 32135+TDSCDAT CSECT 00407C 32136+ DS 0F 00407C 04001D16 32137+ DC AL1(L'SPTR2829),AL3(SPTR2829) 001D1A 32138+TEXT CSECT 001D1A D4E5C95EE3E24094 32139+SPTR2830 DC C'MVI;TS m (zero)' 004080 32140+TDSCDAT CSECT 004080 32141+ DS 0F 004080 0F001D1A 32142+ DC AL1(L'SPTR2830),AL3(SPTR2830) 32143+* 004D38 32144+TDSCTBL CSECT 04D38 32145+T620TPTR EQU * 004D38 00004068 32146+ DC A(T620TDSC) enabled test 32147+* 015D3C 32148+TCODE CSECT 015D40 32149+ DS 0D ensure double word alignment for test 015D40 32150+T620 DS 0H 01650000 015D40 90EC D00C 0000C 32151+ STM 14,12,12(13) SAVE REGISTERS 02950000 015D44 18CF 32152+ LR R12,R15 base register := entry address 15D40 32153+ USING T620,R12 declare code base register 015D46 41B0 C01E 15D5E 32154+ LA R11,T620L load loop target to R11 015D4A 58F0 C1C0 15F00 32155+ L R15,=A(SAVETST) R15 := current save area 015D4E 50DF 0004 00004 32156+ ST R13,4(R15) set back pointer in current save area 015D52 182D 32157+ LR R2,R13 remember callers save area 015D54 18DF 32158+ LR R13,R15 setup current save area 015D56 50D2 0008 00008 32159+ ST R13,8(R2) set forw pointer in callers save area 00000 32160+ USING TDSC,R1 declare TDSC base register 015D5A 58F0 1008 00008 32161+ L R15,TLRCNT load local repeat count to R15 32162+* 32163 * 32164 * use sequence 32165 * MVI T620V,X'00' set byte to all zeros 32166 * TS T620V test and set 32167 * 32168 T620L REPINSN MVI,(T620V,X'00'),TS,(T620V) 32169+* 32170+* build from sublist &ALIST* a comma separated string &ARGS* 32171+* 32172+* 32173+* 32174+* 32175+* 32176+* 15D5E 32177+T620L EQU * 32178+* 32179+* PAGE 588 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 32180+* write a comment indicating what REPINSN does (if NOGEN in effect) 32181+* 32182+*,// REPINSN: do 50 times: 32183+* 32184+* MNOTE requires that ' is doubled for expanded variables 32185+* thus build &MASTR as a copy of '&ARGS with ' doubled 32186+* 32187+* 32188+*,// MVI T620V,X'00' 32189+* 32190+* MNOTE requires that ' is doubled for expanded variables 32191+* thus build &MASTR as a copy of '&ARGS with ' doubled 32192+* 32193+* 32194+*,// TS T620V 32195+* 32196+* finally generate code: &ICNT copies of &CO1 ... 32197+* 015D5E 9200 C1BE 15EFE 32198+ MVI T620V,X'00' 015D62 9300 C1BE 15EFE 32199+ TS T620V 015D66 9200 C1BE 15EFE 32200+ MVI T620V,X'00' 015D6A 9300 C1BE 15EFE 32201+ TS T620V 015D6E 9200 C1BE 15EFE 32202+ MVI T620V,X'00' 015D72 9300 C1BE 15EFE 32203+ TS T620V 015D76 9200 C1BE 15EFE 32204+ MVI T620V,X'00' 015D7A 9300 C1BE 15EFE 32205+ TS T620V 015D7E 9200 C1BE 15EFE 32206+ MVI T620V,X'00' 015D82 9300 C1BE 15EFE 32207+ TS T620V 015D86 9200 C1BE 15EFE 32208+ MVI T620V,X'00' 015D8A 9300 C1BE 15EFE 32209+ TS T620V 015D8E 9200 C1BE 15EFE 32210+ MVI T620V,X'00' 015D92 9300 C1BE 15EFE 32211+ TS T620V 015D96 9200 C1BE 15EFE 32212+ MVI T620V,X'00' 015D9A 9300 C1BE 15EFE 32213+ TS T620V 015D9E 9200 C1BE 15EFE 32214+ MVI T620V,X'00' 015DA2 9300 C1BE 15EFE 32215+ TS T620V 015DA6 9200 C1BE 15EFE 32216+ MVI T620V,X'00' 015DAA 9300 C1BE 15EFE 32217+ TS T620V 015DAE 9200 C1BE 15EFE 32218+ MVI T620V,X'00' 015DB2 9300 C1BE 15EFE 32219+ TS T620V 015DB6 9200 C1BE 15EFE 32220+ MVI T620V,X'00' 015DBA 9300 C1BE 15EFE 32221+ TS T620V 015DBE 9200 C1BE 15EFE 32222+ MVI T620V,X'00' 015DC2 9300 C1BE 15EFE 32223+ TS T620V 015DC6 9200 C1BE 15EFE 32224+ MVI T620V,X'00' 015DCA 9300 C1BE 15EFE 32225+ TS T620V 015DCE 9200 C1BE 15EFE 32226+ MVI T620V,X'00' 015DD2 9300 C1BE 15EFE 32227+ TS T620V 015DD6 9200 C1BE 15EFE 32228+ MVI T620V,X'00' 015DDA 9300 C1BE 15EFE 32229+ TS T620V 015DDE 9200 C1BE 15EFE 32230+ MVI T620V,X'00' 015DE2 9300 C1BE 15EFE 32231+ TS T620V 015DE6 9200 C1BE 15EFE 32232+ MVI T620V,X'00' 015DEA 9300 C1BE 15EFE 32233+ TS T620V 015DEE 9200 C1BE 15EFE 32234+ MVI T620V,X'00' PAGE 589 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015DF2 9300 C1BE 15EFE 32235+ TS T620V 015DF6 9200 C1BE 15EFE 32236+ MVI T620V,X'00' 015DFA 9300 C1BE 15EFE 32237+ TS T620V 015DFE 9200 C1BE 15EFE 32238+ MVI T620V,X'00' 015E02 9300 C1BE 15EFE 32239+ TS T620V 015E06 9200 C1BE 15EFE 32240+ MVI T620V,X'00' 015E0A 9300 C1BE 15EFE 32241+ TS T620V 015E0E 9200 C1BE 15EFE 32242+ MVI T620V,X'00' 015E12 9300 C1BE 15EFE 32243+ TS T620V 015E16 9200 C1BE 15EFE 32244+ MVI T620V,X'00' 015E1A 9300 C1BE 15EFE 32245+ TS T620V 015E1E 9200 C1BE 15EFE 32246+ MVI T620V,X'00' 015E22 9300 C1BE 15EFE 32247+ TS T620V 015E26 9200 C1BE 15EFE 32248+ MVI T620V,X'00' 015E2A 9300 C1BE 15EFE 32249+ TS T620V 015E2E 9200 C1BE 15EFE 32250+ MVI T620V,X'00' 015E32 9300 C1BE 15EFE 32251+ TS T620V 015E36 9200 C1BE 15EFE 32252+ MVI T620V,X'00' 015E3A 9300 C1BE 15EFE 32253+ TS T620V 015E3E 9200 C1BE 15EFE 32254+ MVI T620V,X'00' 015E42 9300 C1BE 15EFE 32255+ TS T620V 015E46 9200 C1BE 15EFE 32256+ MVI T620V,X'00' 015E4A 9300 C1BE 15EFE 32257+ TS T620V 015E4E 9200 C1BE 15EFE 32258+ MVI T620V,X'00' 015E52 9300 C1BE 15EFE 32259+ TS T620V 015E56 9200 C1BE 15EFE 32260+ MVI T620V,X'00' 015E5A 9300 C1BE 15EFE 32261+ TS T620V 015E5E 9200 C1BE 15EFE 32262+ MVI T620V,X'00' 015E62 9300 C1BE 15EFE 32263+ TS T620V 015E66 9200 C1BE 15EFE 32264+ MVI T620V,X'00' 015E6A 9300 C1BE 15EFE 32265+ TS T620V 015E6E 9200 C1BE 15EFE 32266+ MVI T620V,X'00' 015E72 9300 C1BE 15EFE 32267+ TS T620V 015E76 9200 C1BE 15EFE 32268+ MVI T620V,X'00' 015E7A 9300 C1BE 15EFE 32269+ TS T620V 015E7E 9200 C1BE 15EFE 32270+ MVI T620V,X'00' 015E82 9300 C1BE 15EFE 32271+ TS T620V 015E86 9200 C1BE 15EFE 32272+ MVI T620V,X'00' 015E8A 9300 C1BE 15EFE 32273+ TS T620V 015E8E 9200 C1BE 15EFE 32274+ MVI T620V,X'00' 015E92 9300 C1BE 15EFE 32275+ TS T620V 015E96 9200 C1BE 15EFE 32276+ MVI T620V,X'00' 015E9A 9300 C1BE 15EFE 32277+ TS T620V 015E9E 9200 C1BE 15EFE 32278+ MVI T620V,X'00' 015EA2 9300 C1BE 15EFE 32279+ TS T620V 015EA6 9200 C1BE 15EFE 32280+ MVI T620V,X'00' 015EAA 9300 C1BE 15EFE 32281+ TS T620V 015EAE 9200 C1BE 15EFE 32282+ MVI T620V,X'00' 015EB2 9300 C1BE 15EFE 32283+ TS T620V 015EB6 9200 C1BE 15EFE 32284+ MVI T620V,X'00' 015EBA 9300 C1BE 15EFE 32285+ TS T620V 015EBE 9200 C1BE 15EFE 32286+ MVI T620V,X'00' 015EC2 9300 C1BE 15EFE 32287+ TS T620V 015EC6 9200 C1BE 15EFE 32288+ MVI T620V,X'00' 015ECA 9300 C1BE 15EFE 32289+ TS T620V PAGE 590 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015ECE 9200 C1BE 15EFE 32290+ MVI T620V,X'00' 015ED2 9300 C1BE 15EFE 32291+ TS T620V 015ED6 9200 C1BE 15EFE 32292+ MVI T620V,X'00' 015EDA 9300 C1BE 15EFE 32293+ TS T620V 015EDE 9200 C1BE 15EFE 32294+ MVI T620V,X'00' 015EE2 9300 C1BE 15EFE 32295+ TS T620V 015EE6 9200 C1BE 15EFE 32296+ MVI T620V,X'00' 015EEA 9300 C1BE 15EFE 32297+ TS T620V 32298+* 015EEE 06FB 32299 BCTR R15,R11 32300 TSIMRET 015EF0 58F0 C1C0 15F00 32301+ L R15,=A(SAVETST) R15 := current save area 015EF4 58DF 0004 00004 32302+ L R13,4(R15) get old save area back 015EF8 98EC D00C 0000C 32303+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 015EFC 07FE 32304+ BR 14 RETURN 02000000 32305 * 015EFE 00 32306 T620V DC X'00' target for TS instruction 32307 TSIMEND 015F00 32308+ LTORG 015F00 00000458 32309 =A(SAVETST) 15F04 32310+T620TEND EQU * 32311 * 32312 * Test 621 -- TS m (ones) ---------------------------------- 32313 * 32314 TSIMBEG T621,500,50,1,C'MVI;TS m (ones)' 32315+* 004084 32316+TDSCDAT CSECT 004088 32317+ DS 0D 32318+* 004088 00015F08 32319+T621TDSC DC A(T621) // TENTRY 00408C 000001C4 32320+ DC A(T621TEND-T621) // TLENGTH 004090 000001F4 32321+ DC F'500' // TLRCNT 004094 00000032 32322+ DC F'50' // TIGCNT 004098 00000001 32323+ DC F'1' // TLTYPE 001D29 32324+TEXT CSECT 001D29 E3F6F2F1 32325+SPTR2843 DC C'T621' 00409C 32326+TDSCDAT CSECT 00409C 32327+ DS 0F 00409C 04001D29 32328+ DC AL1(L'SPTR2843),AL3(SPTR2843) 001D2D 32329+TEXT CSECT 001D2D D4E5C95EE3E24094 32330+SPTR2844 DC C'MVI;TS m (ones)' 0040A0 32331+TDSCDAT CSECT 0040A0 32332+ DS 0F 0040A0 0F001D2D 32333+ DC AL1(L'SPTR2844),AL3(SPTR2844) 32334+* 004D3C 32335+TDSCTBL CSECT 04D3C 32336+T621TPTR EQU * 004D3C 00004088 32337+ DC A(T621TDSC) enabled test 32338+* 015F04 32339+TCODE CSECT 015F08 32340+ DS 0D ensure double word alignment for test 015F08 32341+T621 DS 0H 01650000 015F08 90EC D00C 0000C 32342+ STM 14,12,12(13) SAVE REGISTERS 02950000 015F0C 18CF 32343+ LR R12,R15 base register := entry address 15F08 32344+ USING T621,R12 declare code base register PAGE 591 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015F0E 41B0 C01E 15F26 32345+ LA R11,T621L load loop target to R11 015F12 58F0 C1C0 160C8 32346+ L R15,=A(SAVETST) R15 := current save area 015F16 50DF 0004 00004 32347+ ST R13,4(R15) set back pointer in current save area 015F1A 182D 32348+ LR R2,R13 remember callers save area 015F1C 18DF 32349+ LR R13,R15 setup current save area 015F1E 50D2 0008 00008 32350+ ST R13,8(R2) set forw pointer in callers save area 00000 32351+ USING TDSC,R1 declare TDSC base register 015F22 58F0 1008 00008 32352+ L R15,TLRCNT load local repeat count to R15 32353+* 32354 * 32355 * use sequence 32356 * MVI T621V,X'FF' set byte to all zeros 32357 * TS T621V test and set 32358 * 32359 T621L REPINSN MVI,(T621V,X'FF'),TS,(T621V) 32360+* 32361+* build from sublist &ALIST* a comma separated string &ARGS* 32362+* 32363+* 32364+* 32365+* 32366+* 32367+* 15F26 32368+T621L EQU * 32369+* 32370+* 32371+* write a comment indicating what REPINSN does (if NOGEN in effect) 32372+* 32373+*,// REPINSN: do 50 times: 32374+* 32375+* MNOTE requires that ' is doubled for expanded variables 32376+* thus build &MASTR as a copy of '&ARGS with ' doubled 32377+* 32378+* 32379+*,// MVI T621V,X'FF' 32380+* 32381+* MNOTE requires that ' is doubled for expanded variables 32382+* thus build &MASTR as a copy of '&ARGS with ' doubled 32383+* 32384+* 32385+*,// TS T621V 32386+* 32387+* finally generate code: &ICNT copies of &CO1 ... 32388+* 015F26 92FF C1BE 160C6 32389+ MVI T621V,X'FF' 015F2A 9300 C1BE 160C6 32390+ TS T621V 015F2E 92FF C1BE 160C6 32391+ MVI T621V,X'FF' 015F32 9300 C1BE 160C6 32392+ TS T621V 015F36 92FF C1BE 160C6 32393+ MVI T621V,X'FF' 015F3A 9300 C1BE 160C6 32394+ TS T621V 015F3E 92FF C1BE 160C6 32395+ MVI T621V,X'FF' 015F42 9300 C1BE 160C6 32396+ TS T621V 015F46 92FF C1BE 160C6 32397+ MVI T621V,X'FF' 015F4A 9300 C1BE 160C6 32398+ TS T621V 015F4E 92FF C1BE 160C6 32399+ MVI T621V,X'FF' PAGE 592 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 015F52 9300 C1BE 160C6 32400+ TS T621V 015F56 92FF C1BE 160C6 32401+ MVI T621V,X'FF' 015F5A 9300 C1BE 160C6 32402+ TS T621V 015F5E 92FF C1BE 160C6 32403+ MVI T621V,X'FF' 015F62 9300 C1BE 160C6 32404+ TS T621V 015F66 92FF C1BE 160C6 32405+ MVI T621V,X'FF' 015F6A 9300 C1BE 160C6 32406+ TS T621V 015F6E 92FF C1BE 160C6 32407+ MVI T621V,X'FF' 015F72 9300 C1BE 160C6 32408+ TS T621V 015F76 92FF C1BE 160C6 32409+ MVI T621V,X'FF' 015F7A 9300 C1BE 160C6 32410+ TS T621V 015F7E 92FF C1BE 160C6 32411+ MVI T621V,X'FF' 015F82 9300 C1BE 160C6 32412+ TS T621V 015F86 92FF C1BE 160C6 32413+ MVI T621V,X'FF' 015F8A 9300 C1BE 160C6 32414+ TS T621V 015F8E 92FF C1BE 160C6 32415+ MVI T621V,X'FF' 015F92 9300 C1BE 160C6 32416+ TS T621V 015F96 92FF C1BE 160C6 32417+ MVI T621V,X'FF' 015F9A 9300 C1BE 160C6 32418+ TS T621V 015F9E 92FF C1BE 160C6 32419+ MVI T621V,X'FF' 015FA2 9300 C1BE 160C6 32420+ TS T621V 015FA6 92FF C1BE 160C6 32421+ MVI T621V,X'FF' 015FAA 9300 C1BE 160C6 32422+ TS T621V 015FAE 92FF C1BE 160C6 32423+ MVI T621V,X'FF' 015FB2 9300 C1BE 160C6 32424+ TS T621V 015FB6 92FF C1BE 160C6 32425+ MVI T621V,X'FF' 015FBA 9300 C1BE 160C6 32426+ TS T621V 015FBE 92FF C1BE 160C6 32427+ MVI T621V,X'FF' 015FC2 9300 C1BE 160C6 32428+ TS T621V 015FC6 92FF C1BE 160C6 32429+ MVI T621V,X'FF' 015FCA 9300 C1BE 160C6 32430+ TS T621V 015FCE 92FF C1BE 160C6 32431+ MVI T621V,X'FF' 015FD2 9300 C1BE 160C6 32432+ TS T621V 015FD6 92FF C1BE 160C6 32433+ MVI T621V,X'FF' 015FDA 9300 C1BE 160C6 32434+ TS T621V 015FDE 92FF C1BE 160C6 32435+ MVI T621V,X'FF' 015FE2 9300 C1BE 160C6 32436+ TS T621V 015FE6 92FF C1BE 160C6 32437+ MVI T621V,X'FF' 015FEA 9300 C1BE 160C6 32438+ TS T621V 015FEE 92FF C1BE 160C6 32439+ MVI T621V,X'FF' 015FF2 9300 C1BE 160C6 32440+ TS T621V 015FF6 92FF C1BE 160C6 32441+ MVI T621V,X'FF' 015FFA 9300 C1BE 160C6 32442+ TS T621V 015FFE 92FF C1BE 160C6 32443+ MVI T621V,X'FF' 016002 9300 C1BE 160C6 32444+ TS T621V 016006 92FF C1BE 160C6 32445+ MVI T621V,X'FF' 01600A 9300 C1BE 160C6 32446+ TS T621V 01600E 92FF C1BE 160C6 32447+ MVI T621V,X'FF' 016012 9300 C1BE 160C6 32448+ TS T621V 016016 92FF C1BE 160C6 32449+ MVI T621V,X'FF' 01601A 9300 C1BE 160C6 32450+ TS T621V 01601E 92FF C1BE 160C6 32451+ MVI T621V,X'FF' 016022 9300 C1BE 160C6 32452+ TS T621V 016026 92FF C1BE 160C6 32453+ MVI T621V,X'FF' 01602A 9300 C1BE 160C6 32454+ TS T621V PAGE 593 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01602E 92FF C1BE 160C6 32455+ MVI T621V,X'FF' 016032 9300 C1BE 160C6 32456+ TS T621V 016036 92FF C1BE 160C6 32457+ MVI T621V,X'FF' 01603A 9300 C1BE 160C6 32458+ TS T621V 01603E 92FF C1BE 160C6 32459+ MVI T621V,X'FF' 016042 9300 C1BE 160C6 32460+ TS T621V 016046 92FF C1BE 160C6 32461+ MVI T621V,X'FF' 01604A 9300 C1BE 160C6 32462+ TS T621V 01604E 92FF C1BE 160C6 32463+ MVI T621V,X'FF' 016052 9300 C1BE 160C6 32464+ TS T621V 016056 92FF C1BE 160C6 32465+ MVI T621V,X'FF' 01605A 9300 C1BE 160C6 32466+ TS T621V 01605E 92FF C1BE 160C6 32467+ MVI T621V,X'FF' 016062 9300 C1BE 160C6 32468+ TS T621V 016066 92FF C1BE 160C6 32469+ MVI T621V,X'FF' 01606A 9300 C1BE 160C6 32470+ TS T621V 01606E 92FF C1BE 160C6 32471+ MVI T621V,X'FF' 016072 9300 C1BE 160C6 32472+ TS T621V 016076 92FF C1BE 160C6 32473+ MVI T621V,X'FF' 01607A 9300 C1BE 160C6 32474+ TS T621V 01607E 92FF C1BE 160C6 32475+ MVI T621V,X'FF' 016082 9300 C1BE 160C6 32476+ TS T621V 016086 92FF C1BE 160C6 32477+ MVI T621V,X'FF' 01608A 9300 C1BE 160C6 32478+ TS T621V 01608E 92FF C1BE 160C6 32479+ MVI T621V,X'FF' 016092 9300 C1BE 160C6 32480+ TS T621V 016096 92FF C1BE 160C6 32481+ MVI T621V,X'FF' 01609A 9300 C1BE 160C6 32482+ TS T621V 01609E 92FF C1BE 160C6 32483+ MVI T621V,X'FF' 0160A2 9300 C1BE 160C6 32484+ TS T621V 0160A6 92FF C1BE 160C6 32485+ MVI T621V,X'FF' 0160AA 9300 C1BE 160C6 32486+ TS T621V 0160AE 92FF C1BE 160C6 32487+ MVI T621V,X'FF' 0160B2 9300 C1BE 160C6 32488+ TS T621V 32489+* 0160B6 06FB 32490 BCTR R15,R11 32491 TSIMRET 0160B8 58F0 C1C0 160C8 32492+ L R15,=A(SAVETST) R15 := current save area 0160BC 58DF 0004 00004 32493+ L R13,4(R15) get old save area back 0160C0 98EC D00C 0000C 32494+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0160C4 07FE 32495+ BR 14 RETURN 02000000 32496 * 0160C6 FF 32497 T621V DC X'FF' target for TS instruction 32498 TSIMEND 0160C8 32499+ LTORG 0160C8 00000458 32500 =A(SAVETST) 160CC 32501+T621TEND EQU * 32502 * 32503 * Test 7xx -- mix sequence ====================================== 32504 * 32505 * Test 700 -- Mix Int RR basic ----------------------------- 32506 * 32507 TSIMBEG T700,20000,40,1,C'mix int RR basic' 32508+* 0040A4 32509+TDSCDAT CSECT PAGE 594 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0040A8 32510+ DS 0D 32511+* 0040A8 000160D0 32512+T700TDSC DC A(T700) // TENTRY 0040AC 000000A4 32513+ DC A(T700TEND-T700) // TLENGTH 0040B0 00004E20 32514+ DC F'20000' // TLRCNT 0040B4 00000028 32515+ DC F'40' // TIGCNT 0040B8 00000001 32516+ DC F'1' // TLTYPE 001D3C 32517+TEXT CSECT 001D3C E3F7F0F0 32518+SPTR2857 DC C'T700' 0040BC 32519+TDSCDAT CSECT 0040BC 32520+ DS 0F 0040BC 04001D3C 32521+ DC AL1(L'SPTR2857),AL3(SPTR2857) 001D40 32522+TEXT CSECT 001D40 9489A7408995A340 32523+SPTR2858 DC C'mix int RR basic' 0040C0 32524+TDSCDAT CSECT 0040C0 32525+ DS 0F 0040C0 10001D40 32526+ DC AL1(L'SPTR2858),AL3(SPTR2858) 32527+* 004D40 32528+TDSCTBL CSECT 04D40 32529+T700TPTR EQU * 004D40 000040A8 32530+ DC A(T700TDSC) enabled test 32531+* 0160CC 32532+TCODE CSECT 0160D0 32533+ DS 0D ensure double word alignment for test 0160D0 32534+T700 DS 0H 01650000 0160D0 90EC D00C 0000C 32535+ STM 14,12,12(13) SAVE REGISTERS 02950000 0160D4 18CF 32536+ LR R12,R15 base register := entry address 160D0 32537+ USING T700,R12 declare code base register 0160D6 41B0 C01E 160EE 32538+ LA R11,T700L load loop target to R11 0160DA 58F0 C0A0 16170 32539+ L R15,=A(SAVETST) R15 := current save area 0160DE 50DF 0004 00004 32540+ ST R13,4(R15) set back pointer in current save area 0160E2 182D 32541+ LR R2,R13 remember callers save area 0160E4 18DF 32542+ LR R13,R15 setup current save area 0160E6 50D2 0008 00008 32543+ ST R13,8(R2) set forw pointer in callers save area 00000 32544+ USING TDSC,R1 declare TDSC base register 0160EA 58F0 1008 00008 32545+ L R15,TLRCNT load local repeat count to R15 32546+* 32547 * 160EE 32548 T700L EQU * 0160EE 4120 0001 00001 32549 LA R2,1 R2 :=00000001 FIN 01 0160F2 1832 32550 LR R3,R2 R3 :=00000001 02 0160F4 8B30 0008 00008 32551 SLA R3,8 R3 :=00000100 FIN 03 0160F8 1744 32552 XR R4,R4 R4 :=00000000 04 0160FA 1643 32553 OR R4,R3 R4 :=00000100 05 0160FC 0640 32554 BCTR R4,0 R4 :=000000FF FIN 06 0160FE 1354 32555 LCR R5,R4 R5 :=FFFFFF01 07 016100 8950 0002 00002 32556 SLL R5,2 R5 :=FFFFFC04 FIN 08 016104 1065 32557 LPR R6,R5 R6 :=000003FC 09 016106 1A61 32558 AR R6,R1 R6 :=000003FD 10 016108 1961 32559 CR R6,R1 != 11 01610A 4780 C094 16164 32560 BE T700BAD 12 01610E 1173 32561 LNR R7,R3 R7 :=FFFFFF00 13 016110 1476 32562 NR R7,R6 R7 :=00000300 14 016112 8A70 0002 00002 32563 SRA R7,2 R7 :=000000C0 15 016116 1B74 32564 SR R7,R4 R7 :=FFFFFFC1 16 PAGE 595 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016118 1283 32565 LTR R8,R3 R8 :=00000100 17 01611A 8880 0001 00001 32566 SRL R8,1 R8 :=00000080 18 01611E 1E83 32567 ALR R8,R3 R8 :=00000180 19 016120 1F87 32568 SLR R8,R7 R8 :=000001BF 20 016122 1583 32569 CLR R8,R3 != 21 016124 4780 C094 16164 32570 BE T700BAD 22 016128 4190 025A 0025A 32571 LA R9,602 R9 :=0000025A 23 01612C 1794 32572 XR R9,R4 R9 :=000002A5 FIN 24 01612E 12A9 32573 LTR R10,R9 R10:=000002A5 25 016130 1AA9 32574 AR R10,R9 R10:=000004FF 26 016132 16A5 32575 OR R10,R5 R10:=FFFFFCFF 27 016134 106A 32576 LPR R6,R10 R6 :=00000301 28 016136 1E64 32577 ALR R6,R4 R6 :=00000400 29 016138 8B60 0001 00001 32578 SLA R6,1 R6 :=00000800 30 01613C 1B69 32579 SR R6,R9 R6 :=0000055B 31 01613E 0660 32580 BCTR R6,0 R6 :=0000055A 32 016140 1465 32581 NR R6,R5 R6 :=00000400 33 016142 8A60 0005 00005 32582 SRA R6,5 R6 :=00000020 34 016146 1964 32583 CR R6,R4 != 35 016148 1176 32584 LNR R7,R6 R7 :=FFFFFFC0 36 01614A 8970 0002 00002 32585 SLL R7,2 R7 :=FFFFFF00 37 01614E 1F72 32586 SLR R7,R2 R7 :=FFFFFEFF 38 016150 1387 32587 LCR R8,R7 R8 :=00000101 39 016152 1583 32588 CLR R8,R3 != 40 016154 06FB 32589 BCTR R15,R11 32590 TSIMRET 016156 58F0 C0A0 16170 32591+ L R15,=A(SAVETST) R15 := current save area 01615A 58DF 0004 00004 32592+ L R13,4(R15) get old save area back 01615E 98EC D00C 0000C 32593+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016162 07FE 32594+ BR 14 RETURN 02000000 32595 * 016164 32596 DS 0H 32597 T700BAD ABEND 60 016164 32598+T700BAD DS 0H 00400002 016164 4110 003C 0003C 32599+ LA 1,60 LOAD PARAMETER REG 1 01900002 016168 0A0D 32600+ SVC 13 LINK TO ABEND ROUTINE 02050002 32601 TSIMEND 016170 32602+ LTORG 016170 00000458 32603 =A(SAVETST) 16174 32604+T700TEND EQU * 32605 * 32606 * Test 701 -- Mix Int RX ----------------------------------- 32607 * 32608 TSIMBEG T701,22000,21,1,C'mix int RX' 32609+* 0040C4 32610+TDSCDAT CSECT 0040C8 32611+ DS 0D 32612+* 0040C8 00016178 32613+T701TDSC DC A(T701) // TENTRY 0040CC 000000CC 32614+ DC A(T701TEND-T701) // TLENGTH 0040D0 000055F0 32615+ DC F'22000' // TLRCNT 0040D4 00000015 32616+ DC F'21' // TIGCNT 0040D8 00000001 32617+ DC F'1' // TLTYPE 001D50 32618+TEXT CSECT 001D50 E3F7F0F1 32619+SPTR2868 DC C'T701' PAGE 596 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0040DC 32620+TDSCDAT CSECT 0040DC 32621+ DS 0F 0040DC 04001D50 32622+ DC AL1(L'SPTR2868),AL3(SPTR2868) 001D54 32623+TEXT CSECT 001D54 9489A7408995A340 32624+SPTR2869 DC C'mix int RX' 0040E0 32625+TDSCDAT CSECT 0040E0 32626+ DS 0F 0040E0 0A001D54 32627+ DC AL1(L'SPTR2869),AL3(SPTR2869) 32628+* 004D44 32629+TDSCTBL CSECT 04D44 32630+T701TPTR EQU * 004D44 000040C8 32631+ DC A(T701TDSC) enabled test 32632+* 016174 32633+TCODE CSECT 016178 32634+ DS 0D ensure double word alignment for test 016178 32635+T701 DS 0H 01650000 016178 90EC D00C 0000C 32636+ STM 14,12,12(13) SAVE REGISTERS 02950000 01617C 18CF 32637+ LR R12,R15 base register := entry address 16178 32638+ USING T701,R12 declare code base register 01617E 41B0 C01E 16196 32639+ LA R11,T701L load loop target to R11 016182 58F0 C0C8 16240 32640+ L R15,=A(SAVETST) R15 := current save area 016186 50DF 0004 00004 32641+ ST R13,4(R15) set back pointer in current save area 01618A 182D 32642+ LR R2,R13 remember callers save area 01618C 18DF 32643+ LR R13,R15 setup current save area 01618E 50D2 0008 00008 32644+ ST R13,8(R2) set forw pointer in callers save area 00000 32645+ USING TDSC,R1 declare TDSC base register 016192 58F0 1008 00008 32646+ L R15,TLRCNT load local repeat count to R15 32647+* 32648 * 16196 32649 T701L EQU * 016196 5820 C084 161FC 32650 L R2,T701F1 R2 :=00000072 01 01619A 5A20 C088 16200 32651 A R2,T701F2 R2 :=00010072 02 01619E 5420 C08C 16204 32652 N R2,T701F3 R2 :=00010042 03 0161A2 4B20 C0BC 16234 32653 SH R2,T701H1 R2 :=00010041 04 0161A6 4C20 C0BE 16236 32654 MH R2,T701H2 R2 :=00020082 05 0161AA 4A20 C0C0 16238 32655 AH R2,T701H3 R2 :=00020182 06 0161AE 4920 C0C0 16238 32656 CH R2,T701H3 07 0161B2 5E20 C090 16208 32657 AL R2,T701F4 R2 :=00020180 08 0161B6 5B20 C094 1620C 32658 S R2,T701F5 R2 :=0002017F 09 0161BA 5620 C098 16210 32659 O R2,T701F6 R2 :=0013817F 10 0161BE 4020 C0C2 1623A 32660 STH R2,T701VH1 11 0161C2 5020 C0B0 16228 32661 ST R2,T701VF1+4 12 0161C6 5720 C09C 16214 32662 X R2,T701F7 R2 :=00030178 13 0161CA 5920 C098 16210 32663 C R2,T701F6 14 0161CE 9845 C0AC 16224 32664 LM R4,R5,T701VF1 R5 :=0013817F (1278335) 15 0161D2 5C40 C0A0 16218 32665 M R4,T701F8 R5 := (157235205) 16 0161D6 5D40 C0A4 1621C 32666 D R4,T701F9 R5 := (9249129) 17 0161DA 9045 C0B4 1622C 32667 STM R4,R5,T701VF2 18 0161DE 4860 C0C2 1623A 32668 LH R6,T701VH1 R6 :=FFFF817F 19 0161E2 5F60 C0A8 16220 32669 SL R6,T701F10 R6 :=0000017F 20 0161E6 5560 C0A4 1621C 32670 CL R6,T701F9 21 0161EA 06FB 32671 BCTR R15,R11 32672 TSIMRET 0161EC 58F0 C0C8 16240 32673+ L R15,=A(SAVETST) R15 := current save area 0161F0 58DF 0004 00004 32674+ L R13,4(R15) get old save area back PAGE 597 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0161F4 98EC D00C 0000C 32675+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0161F8 07FE 32676+ BR 14 RETURN 02000000 32677 * 0161FC 32678 DS 0F 0161FC 00000072 32679 T701F1 DC X'00000072' 016200 00010000 32680 T701F2 DC X'00010000' 016204 FFFFFF4F 32681 T701F3 DC X'FFFFFF4F' 016208 FFFFFFFE 32682 T701F4 DC X'FFFFFFFE' 01620C 00000001 32683 T701F5 DC X'00000001' 016210 00118000 32684 T701F6 DC X'00118000' 016214 00100007 32685 T701F7 DC X'00100007' 016218 0000007B 32686 T701F8 DC F'123' 01621C 00000011 32687 T701F9 DC F'17' 016220 FFFF8000 32688 T701F10 DC X'FFFF8000' 016224 0000000000000000 32689 T701VF1 DC 2F'0' 01622C 32690 T701VF2 DS 2F 016234 32691 DS 0H 016234 0001 32692 T701H1 DC X'0001' 016236 0002 32693 T701H2 DC X'0002' 016238 0100 32694 T701H3 DC X'0100' 01623A 32695 T701VH1 DS 1H 32696 TSIMEND 016240 32697+ LTORG 016240 00000458 32698 =A(SAVETST) 16244 32699+T701TEND EQU * 32700 * 32701 * Test 702 -- Mix Int RX (far) ----------------------------- 32702 * 32703 TSIMBEG T702,22000,21,1,C'mix int RX (far)' 32704+* 0040E4 32705+TDSCDAT CSECT 0040E8 32706+ DS 0D 32707+* 0040E8 00016248 32708+T702TDSC DC A(T702) // TENTRY 0040EC 00000090 32709+ DC A(T702TEND-T702) // TLENGTH 0040F0 000055F0 32710+ DC F'22000' // TLRCNT 0040F4 00000015 32711+ DC F'21' // TIGCNT 0040F8 00000001 32712+ DC F'1' // TLTYPE 001D5E 32713+TEXT CSECT 001D5E E3F7F0F2 32714+SPTR2877 DC C'T702' 0040FC 32715+TDSCDAT CSECT 0040FC 32716+ DS 0F 0040FC 04001D5E 32717+ DC AL1(L'SPTR2877),AL3(SPTR2877) 001D62 32718+TEXT CSECT 001D62 9489A7408995A340 32719+SPTR2878 DC C'mix int RX (far)' 004100 32720+TDSCDAT CSECT 004100 32721+ DS 0F 004100 10001D62 32722+ DC AL1(L'SPTR2878),AL3(SPTR2878) 32723+* 004D48 32724+TDSCTBL CSECT 04D48 32725+T702TPTR EQU * 004D48 000040E8 32726+ DC A(T702TDSC) enabled test 32727+* 016244 32728+TCODE CSECT 016248 32729+ DS 0D ensure double word alignment for test PAGE 598 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016248 32730+T702 DS 0H 01650000 016248 90EC D00C 0000C 32731+ STM 14,12,12(13) SAVE REGISTERS 02950000 01624C 18CF 32732+ LR R12,R15 base register := entry address 16248 32733+ USING T702,R12 declare code base register 01624E 41B0 C022 1626A 32734+ LA R11,T702L load loop target to R11 016252 58F0 C088 162D0 32735+ L R15,=A(SAVETST) R15 := current save area 016256 50DF 0004 00004 32736+ ST R13,4(R15) set back pointer in current save area 01625A 182D 32737+ LR R2,R13 remember callers save area 01625C 18DF 32738+ LR R13,R15 setup current save area 01625E 50D2 0008 00008 32739+ ST R13,8(R2) set forw pointer in callers save area 00000 32740+ USING TDSC,R1 declare TDSC base register 016262 58F0 1008 00008 32741+ L R15,TLRCNT load local repeat count to R15 32742+* 32743 * 016266 58A0 C08C 162D4 32744 L R10,=A(T702CS) load base for data 1626A 32745 T702L EQU * 180B0 32746 USING T702CS,R10 01626A 5820 A000 180B0 32747 L R2,T702F1 R2 :=00000072 01626E 5A20 A004 180B4 32748 A R2,T702F2 R2 :=00010072 016272 5420 A008 180B8 32749 N R2,T702F3 R2 :=00010042 016276 4B20 A038 180E8 32750 SH R2,T702H1 R2 :=00010041 01627A 4C20 A03A 180EA 32751 MH R2,T702H2 R2 :=00020082 01627E 4A20 A03C 180EC 32752 AH R2,T702H3 R2 :=00020182 016282 4920 A03C 180EC 32753 CH R2,T702H3 016286 5E20 A00C 180BC 32754 AL R2,T702F4 R2 :=00020180 01628A 5B20 A010 180C0 32755 S R2,T702F5 R2 :=0002017F 01628E 5620 A014 180C4 32756 O R2,T702F6 R2 :=0013817F 016292 4020 A03E 180EE 32757 STH R2,T702VH1 016296 5020 A02C 180DC 32758 ST R2,T702VF1+4 01629A 5720 A018 180C8 32759 X R2,T702F7 R2 :=00030178 01629E 5920 A014 180C4 32760 C R2,T702F6 0162A2 9845 A028 180D8 32761 LM R4,R5,T702VF1 R5 :=0013817F (1278335) 0162A6 5C40 A01C 180CC 32762 M R4,T702F8 R5 := (157235205) 0162AA 5D40 A020 180D0 32763 D R4,T702F9 R5 := (9249129) 0162AE 9045 A030 180E0 32764 STM R4,R5,T702VF2 0162B2 4860 A03E 180EE 32765 LH R6,T702VH1 R6 :=FFFF817F 0162B6 5F60 A024 180D4 32766 SL R6,T702F10 R6 :=0000017F 0162BA 5560 A020 180D0 32767 CL R6,T702F9 32768 DROP R10 0162BE 06FB 32769 BCTR R15,R11 32770 TSIMRET 0162C0 58F0 C088 162D0 32771+ L R15,=A(SAVETST) R15 := current save area 0162C4 58DF 0004 00004 32772+ L R13,4(R15) get old save area back 0162C8 98EC D00C 0000C 32773+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0162CC 07FE 32774+ BR 14 RETURN 02000000 32775 * 32776 TSIMEND 0162D0 32777+ LTORG 0162D0 00000458 32778 =A(SAVETST) 0162D4 000180B0 32779 =A(T702CS) 162D8 32780+T702TEND EQU * 32781 * 0180B0 32782 T702CS CSECT 0180B0 32783 DS 0F 0180B0 00000072 32784 T702F1 DC X'00000072' PAGE 599 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0180B4 00010000 32785 T702F2 DC X'00010000' 0180B8 FFFFFF4F 32786 T702F3 DC X'FFFFFF4F' 0180BC FFFFFFFE 32787 T702F4 DC X'FFFFFFFE' 0180C0 00000001 32788 T702F5 DC X'00000001' 0180C4 00118000 32789 T702F6 DC X'00118000' 0180C8 00100007 32790 T702F7 DC X'00100007' 0180CC 0000007B 32791 T702F8 DC F'123' 0180D0 00000011 32792 T702F9 DC F'17' 0180D4 FFFF8000 32793 T702F10 DC X'FFFF8000' 0180D8 0000000000000000 32794 T702VF1 DC 2F'0' 0180E0 32795 T702VF2 DS 2F 0180E8 32796 DS 0H 0180E8 0001 32797 T702H1 DC X'0001' 0180EA 0002 32798 T702H2 DC X'0002' 0180EC 0100 32799 T702H3 DC X'0100' 0180EE 32800 T702VH1 DS 1H 000DEE 32801 MAIN CSECT 32802 * 32803 * Test 703 -- Mix Int RR noopt ----------------------------- 32804 * uses R14 as seed, all register values depend on initial R14 32805 * uses R2 as output, stored after the loop in memory 32806 * to ensure that optimizers, as in z/PDT, can't remove code 32807 * 32808 TSIMBEG T703,20000,40,1,C'mix int RR noopt' 32809+* 004104 32810+TDSCDAT CSECT 004108 32811+ DS 0D 32812+* 004108 000162D8 32813+T703TDSC DC A(T703) // TENTRY 00410C 000000AC 32814+ DC A(T703TEND-T703) // TLENGTH 004110 00004E20 32815+ DC F'20000' // TLRCNT 004114 00000028 32816+ DC F'40' // TIGCNT 004118 00000001 32817+ DC F'1' // TLTYPE 001D72 32818+TEXT CSECT 001D72 E3F7F0F3 32819+SPTR2886 DC C'T703' 00411C 32820+TDSCDAT CSECT 00411C 32821+ DS 0F 00411C 04001D72 32822+ DC AL1(L'SPTR2886),AL3(SPTR2886) 001D76 32823+TEXT CSECT 001D76 9489A7408995A340 32824+SPTR2887 DC C'mix int RR noopt' 004120 32825+TDSCDAT CSECT 004120 32826+ DS 0F 004120 10001D76 32827+ DC AL1(L'SPTR2887),AL3(SPTR2887) 32828+* 004D4C 32829+TDSCTBL CSECT 04D4C 32830+T703TPTR EQU * 004D4C 00004108 32831+ DC A(T703TDSC) enabled test 32832+* 0162D8 32833+TCODE CSECT 0162D8 32834+ DS 0D ensure double word alignment for test 0162D8 32835+T703 DS 0H 01650000 0162D8 90EC D00C 0000C 32836+ STM 14,12,12(13) SAVE REGISTERS 02950000 0162DC 18CF 32837+ LR R12,R15 base register := entry address 162D8 32838+ USING T703,R12 declare code base register 0162DE 41B0 C01E 162F6 32839+ LA R11,T703L load loop target to R11 PAGE 600 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0162E2 58F0 C0A8 16380 32840+ L R15,=A(SAVETST) R15 := current save area 0162E6 50DF 0004 00004 32841+ ST R13,4(R15) set back pointer in current save area 0162EA 182D 32842+ LR R2,R13 remember callers save area 0162EC 18DF 32843+ LR R13,R15 setup current save area 0162EE 50D2 0008 00008 32844+ ST R13,8(R2) set forw pointer in callers save area 00000 32845+ USING TDSC,R1 declare TDSC base register 0162F2 58F0 1008 00008 32846+ L R15,TLRCNT load local repeat count to R15 32847+* 32848 * 162F6 32849 T703L EQU * 0162F6 183E 32850 LR R3,R14 R3 :=R14 01 U 03 0162F8 4140 00FF 000FF 32851 LA R4,255 R4 :=000000FF 02 U 03 0162FC 1E34 32852 ALR R3,R4 R3 :=R14 + 0xFF 03 U 06 0162FE 125E 32853 LTR R5,R14 R5 :=R14 04 U 05 016300 1F54 32854 SLR R5,R4 R5 :=R14 - 0xFF 05 U 16 016302 1063 32855 LPR R6,R3 R6 :=abs(R14+0xFF) 06 U 07 016304 0660 32856 BCTR R6,0 R6 :=abs(R14+0xFF)-1 07 U 08 016306 1376 32857 LCR R7,R6 R7 :=-(abs(R14+0xFF)-1) 08 U 09 016308 1474 32858 NR R7,R4 R7 :=f(R14) & 0xFF 09 U 10 01630A 1A74 32859 AR R7,R4 R7 :=f(R14)&0xFF+0xFF 10 U 11 01630C 1974 32860 CR R7,R4 != 11 U 12 01630E 4780 C09A 16372 32861 BE T703BAD 12 016312 8B70 0001 00001 32862 SLA R7,1 R7 :=2*f(R14) 10 bit 13 U 14 016316 1B74 32863 SR R7,R4 R7 :=f(R14) 10 bit 14 U 15 016318 8970 0004 00004 32864 SLL R7,4 R7 :=f(R14) 14 bit 15 U 18 01631C 8A50 0001 00001 32865 SRA R5,1 R5 :=(R14-0xFF)/2 16 U 17 016320 175E 32866 XR R5,R14 R5 :=f(R14) 17 U 18 016322 1657 32867 OR R5,R7 R5 :=f(R14) 18 U 19 016324 1185 32868 LNR R8,R5 R8 :=f(R14) 19 U 20 016326 8880 000C 0000C 32869 SRL R8,12 R8 :=f(R14) 20 bit 20 U 24 01632A 153E 32870 CLR R3,R14 != 21 U 22 01632C 4780 C09A 16372 32871 BE T703BAD 22 016330 8B40 0004 00004 32872 SLA R4,4 R4 :=00000FF0 23 U 24 016334 1784 32873 XR R8,R4 R8 :=f(R14) 20 bit 24 U 25 016336 1A84 32874 AR R8,R4 R8 :=f(R14) 20 bit 25 U 28 016338 1097 32875 LPR R9,R7 R9 :=f(R14) 14 bit 26 U 27 01633A 1B94 32876 SR R9,R4 R9 :=f(R14) 14 bit 27 U 28 01633C 1698 32877 OR R9,R8 R9 :=f(R14) 20 bit 28 U 29 01633E 0690 32878 BCTR R9,0 R9 :=f(R14) 20 bit 29 U 30 016340 8990 0001 00001 32879 SLL R9,1 R9 :=f(R14) 21 bit 30 U 31 016344 1494 32880 NR R9,R4 R9 :=f(R14) 12 bit 31 U 32 016346 8A90 0002 00002 32881 SRA R9,2 R9 :=f(R14) 10 bit 32 U 33 01634A 1E94 32882 ALR R9,R4 R9 :=f(R14) 13 bit 33 U 36 01634C 12A4 32883 LTR R10,R4 R10:=0000FF0 34 U 35 01634E 88A0 0002 00002 32884 SRL R10,2 R10:=00003FA 35 U 36 016352 17A9 32885 XR R10,R9 R10:=f(R14) 13 bit 36 U 37 016354 06A0 32886 BCTR R10,0 R10:=f(R14) 13 bit 37 U 38 016356 8AA0 0001 00001 32887 SRA R10,1 R10:=f(R14) 12 bit 38 U 39 01635A 1EA8 32888 ALR R10,R8 R10:=f(R14) 20 bit 39 U 40 01635C 1F2A 32889 SLR R2,R10 40 U -> 01635E 06FB 32890 BCTR R15,R11 016360 5020 C0A0 16378 32891 ST R2,T703RES store after loop, prevent optimize 32892 TSIMRET 016364 58F0 C0A8 16380 32893+ L R15,=A(SAVETST) R15 := current save area 016368 58DF 0004 00004 32894+ L R13,4(R15) get old save area back PAGE 601 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01636C 98EC D00C 0000C 32895+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016370 07FE 32896+ BR 14 RETURN 02000000 32897 * 016372 32898 DS 0H 32899 T703BAD ABEND 60 016372 32900+T703BAD DS 0H 00400002 016372 4110 003C 0003C 32901+ LA 1,60 LOAD PARAMETER REG 1 01900002 016376 0A0D 32902+ SVC 13 LINK TO ABEND ROUTINE 02050002 016378 32903 DS 0F 016378 00000000 32904 T703RES DC F'0' 32905 * 32906 TSIMEND 016380 32907+ LTORG 016380 00000458 32908 =A(SAVETST) 16384 32909+T703TEND EQU * 32910 * 32911 * Test 9xx -- auxiliary tests =================================== 32912 * 32913 * Test 90x -- LR R,R count tests =========================== 32914 * 32915 * Test 900 -- LR R,R (ig=1) -------------------------------- 32916 * 32917 TSIMBEG T900,450000,1,1,C'LR R,R (ig=1)' 32918+* 004124 32919+TDSCDAT CSECT 004128 32920+ DS 0D 32921+* 004128 00016388 32922+T900TDSC DC A(T900) // TENTRY 00412C 00000034 32923+ DC A(T900TEND-T900) // TLENGTH 004130 0006DDD0 32924+ DC F'450000' // TLRCNT 004134 00000001 32925+ DC F'1' // TIGCNT 004138 00000001 32926+ DC F'1' // TLTYPE 001D86 32927+TEXT CSECT 001D86 E3F9F0F0 32928+SPTR2897 DC C'T900' 00413C 32929+TDSCDAT CSECT 00413C 32930+ DS 0F 00413C 04001D86 32931+ DC AL1(L'SPTR2897),AL3(SPTR2897) 001D8A 32932+TEXT CSECT 001D8A D3D940D96BD9404D 32933+SPTR2898 DC C'LR R,R (ig=1)' 004140 32934+TDSCDAT CSECT 004140 32935+ DS 0F 004140 0D001D8A 32936+ DC AL1(L'SPTR2898),AL3(SPTR2898) 32937+* 004D50 32938+TDSCTBL CSECT 04D50 32939+T900TPTR EQU * 004D50 00004128 32940+ DC A(T900TDSC) enabled test 32941+* 016384 32942+TCODE CSECT 016388 32943+ DS 0D ensure double word alignment for test 016388 32944+T900 DS 0H 01650000 016388 90EC D00C 0000C 32945+ STM 14,12,12(13) SAVE REGISTERS 02950000 01638C 18CF 32946+ LR R12,R15 base register := entry address 16388 32947+ USING T900,R12 declare code base register 01638E 41B0 C01E 163A6 32948+ LA R11,T900L load loop target to R11 016392 58F0 C030 163B8 32949+ L R15,=A(SAVETST) R15 := current save area PAGE 602 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016396 50DF 0004 00004 32950+ ST R13,4(R15) set back pointer in current save area 01639A 182D 32951+ LR R2,R13 remember callers save area 01639C 18DF 32952+ LR R13,R15 setup current save area 01639E 50D2 0008 00008 32953+ ST R13,8(R2) set forw pointer in callers save area 00000 32954+ USING TDSC,R1 declare TDSC base register 0163A2 58F0 1008 00008 32955+ L R15,TLRCNT load local repeat count to R15 32956+* 32957 * 32958 T900L REPINS LR,(R2,R1) repeat: LR R2,R1 32959+* 32960+* build from sublist &ALIST a comma separated string &ARGS 32961+* 32962+* 32963+* 32964+* 32965+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 32966+* this allows to transfer the repeat count from last TDSCGEN call 32967+* 32968+* 163A6 32969+T900L EQU * 32970+* 32971+* write a comment indicating what REPINS does (in case NOGEN in effect) 32972+* 32973+*,// REPINS: do 1 times: 32974+* 32975+* MNOTE requires that ' is doubled for expanded variables 32976+* thus build &MASTR as a copy of '&ARGS with ' doubled 32977+* 32978+* 32979+*,// LR R2,R1 32980+* 32981+* finally generate code: &ICNT copies of &CODE &ARGS 32982+* 0163A6 1821 32983+ LR R2,R1 32984+* 0163A8 06FB 32985 BCTR R15,R11 32986 TSIMRET 0163AA 58F0 C030 163B8 32987+ L R15,=A(SAVETST) R15 := current save area 0163AE 58DF 0004 00004 32988+ L R13,4(R15) get old save area back 0163B2 98EC D00C 0000C 32989+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0163B6 07FE 32990+ BR 14 RETURN 02000000 32991 TSIMEND 0163B8 32992+ LTORG 0163B8 00000458 32993 =A(SAVETST) 163BC 32994+T900TEND EQU * 32995 * 32996 * Test 901 -- LR R,R (ig=2) -------------------------------- 32997 * 32998 TSIMBEG T901,400000,2,1,C'LR R,R (ig=2)',DIS=1 32999+* 004144 33000+TDSCDAT CSECT 004148 33001+ DS 0D 33002+* 004148 000163C0 33003+T901TDSC DC A(T901) // TENTRY 00414C 0000003C 33004+ DC A(T901TEND-T901) // TLENGTH PAGE 603 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004150 00061A80 33005+ DC F'400000' // TLRCNT 004154 00000002 33006+ DC F'2' // TIGCNT 004158 00000001 33007+ DC F'1' // TLTYPE 001D97 33008+TEXT CSECT 001D97 E3F9F0F1 33009+SPTR2909 DC C'T901' 00415C 33010+TDSCDAT CSECT 00415C 33011+ DS 0F 00415C 04001D97 33012+ DC AL1(L'SPTR2909),AL3(SPTR2909) 001D9B 33013+TEXT CSECT 001D9B D3D940D96BD9404D 33014+SPTR2910 DC C'LR R,R (ig=2)' 004160 33015+TDSCDAT CSECT 004160 33016+ DS 0F 004160 0D001D9B 33017+ DC AL1(L'SPTR2910),AL3(SPTR2910) 33018+* 004D54 33019+TDSCTBL CSECT 04D54 33020+T901TPTR EQU * 004D54 01004148 33021+ DC X'01',AL3(T901TDSC) disabled test 33022+* 0163BC 33023+TCODE CSECT 0163C0 33024+ DS 0D ensure double word alignment for test 0163C0 33025+T901 DS 0H 01650000 0163C0 90EC D00C 0000C 33026+ STM 14,12,12(13) SAVE REGISTERS 02950000 0163C4 18CF 33027+ LR R12,R15 base register := entry address 163C0 33028+ USING T901,R12 declare code base register 0163C6 41B0 C01E 163DE 33029+ LA R11,T901L load loop target to R11 0163CA 58F0 C038 163F8 33030+ L R15,=A(SAVETST) R15 := current save area 0163CE 50DF 0004 00004 33031+ ST R13,4(R15) set back pointer in current save area 0163D2 182D 33032+ LR R2,R13 remember callers save area 0163D4 18DF 33033+ LR R13,R15 setup current save area 0163D6 50D2 0008 00008 33034+ ST R13,8(R2) set forw pointer in callers save area 00000 33035+ USING TDSC,R1 declare TDSC base register 0163DA 58F0 1008 00008 33036+ L R15,TLRCNT load local repeat count to R15 33037+* 33038 * 33039 T901L REPINS LR,(R2,R1) repeat: LR R2,R1 33040+* 33041+* build from sublist &ALIST a comma separated string &ARGS 33042+* 33043+* 33044+* 33045+* 33046+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33047+* this allows to transfer the repeat count from last TDSCGEN call 33048+* 33049+* 163DE 33050+T901L EQU * 33051+* 33052+* write a comment indicating what REPINS does (in case NOGEN in effect) 33053+* 33054+*,// REPINS: do 2 times: 33055+* 33056+* MNOTE requires that ' is doubled for expanded variables 33057+* thus build &MASTR as a copy of '&ARGS with ' doubled 33058+* 33059+* PAGE 604 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 33060+*,// LR R2,R1 33061+* 33062+* finally generate code: &ICNT copies of &CODE &ARGS 33063+* 0163DE 1821 33064+ LR R2,R1 0163E0 1821 33065+ LR R2,R1 33066+* 0163E2 06FB 33067 BCTR R15,R11 33068 TSIMRET 0163E4 58F0 C038 163F8 33069+ L R15,=A(SAVETST) R15 := current save area 0163E8 58DF 0004 00004 33070+ L R13,4(R15) get old save area back 0163EC 98EC D00C 0000C 33071+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0163F0 07FE 33072+ BR 14 RETURN 02000000 33073 TSIMEND 0163F8 33074+ LTORG 0163F8 00000458 33075 =A(SAVETST) 163FC 33076+T901TEND EQU * 33077 * 33078 * Test 902 -- LR R,R (ig=3) -------------------------------- 33079 * 33080 TSIMBEG T902,400000,3,1,C'LR R,R (ig=3)',DIS=1 33081+* 004164 33082+TDSCDAT CSECT 004168 33083+ DS 0D 33084+* 004168 00016400 33085+T902TDSC DC A(T902) // TENTRY 00416C 0000003C 33086+ DC A(T902TEND-T902) // TLENGTH 004170 00061A80 33087+ DC F'400000' // TLRCNT 004174 00000003 33088+ DC F'3' // TIGCNT 004178 00000001 33089+ DC F'1' // TLTYPE 001DA8 33090+TEXT CSECT 001DA8 E3F9F0F2 33091+SPTR2921 DC C'T902' 00417C 33092+TDSCDAT CSECT 00417C 33093+ DS 0F 00417C 04001DA8 33094+ DC AL1(L'SPTR2921),AL3(SPTR2921) 001DAC 33095+TEXT CSECT 001DAC D3D940D96BD9404D 33096+SPTR2922 DC C'LR R,R (ig=3)' 004180 33097+TDSCDAT CSECT 004180 33098+ DS 0F 004180 0D001DAC 33099+ DC AL1(L'SPTR2922),AL3(SPTR2922) 33100+* 004D58 33101+TDSCTBL CSECT 04D58 33102+T902TPTR EQU * 004D58 01004168 33103+ DC X'01',AL3(T902TDSC) disabled test 33104+* 0163FC 33105+TCODE CSECT 016400 33106+ DS 0D ensure double word alignment for test 016400 33107+T902 DS 0H 01650000 016400 90EC D00C 0000C 33108+ STM 14,12,12(13) SAVE REGISTERS 02950000 016404 18CF 33109+ LR R12,R15 base register := entry address 16400 33110+ USING T902,R12 declare code base register 016406 41B0 C01E 1641E 33111+ LA R11,T902L load loop target to R11 01640A 58F0 C038 16438 33112+ L R15,=A(SAVETST) R15 := current save area 01640E 50DF 0004 00004 33113+ ST R13,4(R15) set back pointer in current save area 016412 182D 33114+ LR R2,R13 remember callers save area PAGE 605 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016414 18DF 33115+ LR R13,R15 setup current save area 016416 50D2 0008 00008 33116+ ST R13,8(R2) set forw pointer in callers save area 00000 33117+ USING TDSC,R1 declare TDSC base register 01641A 58F0 1008 00008 33118+ L R15,TLRCNT load local repeat count to R15 33119+* 33120 * 33121 T902L REPINS LR,(R2,R1) repeat: LR R2,R1 33122+* 33123+* build from sublist &ALIST a comma separated string &ARGS 33124+* 33125+* 33126+* 33127+* 33128+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33129+* this allows to transfer the repeat count from last TDSCGEN call 33130+* 33131+* 1641E 33132+T902L EQU * 33133+* 33134+* write a comment indicating what REPINS does (in case NOGEN in effect) 33135+* 33136+*,// REPINS: do 3 times: 33137+* 33138+* MNOTE requires that ' is doubled for expanded variables 33139+* thus build &MASTR as a copy of '&ARGS with ' doubled 33140+* 33141+* 33142+*,// LR R2,R1 33143+* 33144+* finally generate code: &ICNT copies of &CODE &ARGS 33145+* 01641E 1821 33146+ LR R2,R1 016420 1821 33147+ LR R2,R1 016422 1821 33148+ LR R2,R1 33149+* 016424 06FB 33150 BCTR R15,R11 33151 TSIMRET 016426 58F0 C038 16438 33152+ L R15,=A(SAVETST) R15 := current save area 01642A 58DF 0004 00004 33153+ L R13,4(R15) get old save area back 01642E 98EC D00C 0000C 33154+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016432 07FE 33155+ BR 14 RETURN 02000000 33156 TSIMEND 016438 33157+ LTORG 016438 00000458 33158 =A(SAVETST) 1643C 33159+T902TEND EQU * 33160 * 33161 * Test 903 -- LR R,R (ig=4) -------------------------------- 33162 * 33163 TSIMBEG T903,200000,4,1,C'LR R,R (ig=4)',DIS=1 33164+* 004184 33165+TDSCDAT CSECT 004188 33166+ DS 0D 33167+* 004188 00016440 33168+T903TDSC DC A(T903) // TENTRY 00418C 0000003C 33169+ DC A(T903TEND-T903) // TLENGTH PAGE 606 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004190 00030D40 33170+ DC F'200000' // TLRCNT 004194 00000004 33171+ DC F'4' // TIGCNT 004198 00000001 33172+ DC F'1' // TLTYPE 001DB9 33173+TEXT CSECT 001DB9 E3F9F0F3 33174+SPTR2933 DC C'T903' 00419C 33175+TDSCDAT CSECT 00419C 33176+ DS 0F 00419C 04001DB9 33177+ DC AL1(L'SPTR2933),AL3(SPTR2933) 001DBD 33178+TEXT CSECT 001DBD D3D940D96BD9404D 33179+SPTR2934 DC C'LR R,R (ig=4)' 0041A0 33180+TDSCDAT CSECT 0041A0 33181+ DS 0F 0041A0 0D001DBD 33182+ DC AL1(L'SPTR2934),AL3(SPTR2934) 33183+* 004D5C 33184+TDSCTBL CSECT 04D5C 33185+T903TPTR EQU * 004D5C 01004188 33186+ DC X'01',AL3(T903TDSC) disabled test 33187+* 01643C 33188+TCODE CSECT 016440 33189+ DS 0D ensure double word alignment for test 016440 33190+T903 DS 0H 01650000 016440 90EC D00C 0000C 33191+ STM 14,12,12(13) SAVE REGISTERS 02950000 016444 18CF 33192+ LR R12,R15 base register := entry address 16440 33193+ USING T903,R12 declare code base register 016446 41B0 C01E 1645E 33194+ LA R11,T903L load loop target to R11 01644A 58F0 C038 16478 33195+ L R15,=A(SAVETST) R15 := current save area 01644E 50DF 0004 00004 33196+ ST R13,4(R15) set back pointer in current save area 016452 182D 33197+ LR R2,R13 remember callers save area 016454 18DF 33198+ LR R13,R15 setup current save area 016456 50D2 0008 00008 33199+ ST R13,8(R2) set forw pointer in callers save area 00000 33200+ USING TDSC,R1 declare TDSC base register 01645A 58F0 1008 00008 33201+ L R15,TLRCNT load local repeat count to R15 33202+* 33203 * 33204 T903L REPINS LR,(R2,R1) repeat: LR R2,R1 33205+* 33206+* build from sublist &ALIST a comma separated string &ARGS 33207+* 33208+* 33209+* 33210+* 33211+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33212+* this allows to transfer the repeat count from last TDSCGEN call 33213+* 33214+* 1645E 33215+T903L EQU * 33216+* 33217+* write a comment indicating what REPINS does (in case NOGEN in effect) 33218+* 33219+*,// REPINS: do 4 times: 33220+* 33221+* MNOTE requires that ' is doubled for expanded variables 33222+* thus build &MASTR as a copy of '&ARGS with ' doubled 33223+* 33224+* PAGE 607 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 33225+*,// LR R2,R1 33226+* 33227+* finally generate code: &ICNT copies of &CODE &ARGS 33228+* 01645E 1821 33229+ LR R2,R1 016460 1821 33230+ LR R2,R1 016462 1821 33231+ LR R2,R1 016464 1821 33232+ LR R2,R1 33233+* 016466 06FB 33234 BCTR R15,R11 33235 TSIMRET 016468 58F0 C038 16478 33236+ L R15,=A(SAVETST) R15 := current save area 01646C 58DF 0004 00004 33237+ L R13,4(R15) get old save area back 016470 98EC D00C 0000C 33238+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016474 07FE 33239+ BR 14 RETURN 02000000 33240 TSIMEND 016478 33241+ LTORG 016478 00000458 33242 =A(SAVETST) 1647C 33243+T903TEND EQU * 33244 * 33245 * Test 904 -- LR R,R (ig=5) -------------------------------- 33246 * 33247 TSIMBEG T904,150000,5,1,C'LR R,R (ig=5)',DIS=1 33248+* 0041A4 33249+TDSCDAT CSECT 0041A8 33250+ DS 0D 33251+* 0041A8 00016480 33252+T904TDSC DC A(T904) // TENTRY 0041AC 0000003C 33253+ DC A(T904TEND-T904) // TLENGTH 0041B0 000249F0 33254+ DC F'150000' // TLRCNT 0041B4 00000005 33255+ DC F'5' // TIGCNT 0041B8 00000001 33256+ DC F'1' // TLTYPE 001DCA 33257+TEXT CSECT 001DCA E3F9F0F4 33258+SPTR2945 DC C'T904' 0041BC 33259+TDSCDAT CSECT 0041BC 33260+ DS 0F 0041BC 04001DCA 33261+ DC AL1(L'SPTR2945),AL3(SPTR2945) 001DCE 33262+TEXT CSECT 001DCE D3D940D96BD9404D 33263+SPTR2946 DC C'LR R,R (ig=5)' 0041C0 33264+TDSCDAT CSECT 0041C0 33265+ DS 0F 0041C0 0D001DCE 33266+ DC AL1(L'SPTR2946),AL3(SPTR2946) 33267+* 004D60 33268+TDSCTBL CSECT 04D60 33269+T904TPTR EQU * 004D60 010041A8 33270+ DC X'01',AL3(T904TDSC) disabled test 33271+* 01647C 33272+TCODE CSECT 016480 33273+ DS 0D ensure double word alignment for test 016480 33274+T904 DS 0H 01650000 016480 90EC D00C 0000C 33275+ STM 14,12,12(13) SAVE REGISTERS 02950000 016484 18CF 33276+ LR R12,R15 base register := entry address 16480 33277+ USING T904,R12 declare code base register 016486 41B0 C01E 1649E 33278+ LA R11,T904L load loop target to R11 01648A 58F0 C038 164B8 33279+ L R15,=A(SAVETST) R15 := current save area PAGE 608 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01648E 50DF 0004 00004 33280+ ST R13,4(R15) set back pointer in current save area 016492 182D 33281+ LR R2,R13 remember callers save area 016494 18DF 33282+ LR R13,R15 setup current save area 016496 50D2 0008 00008 33283+ ST R13,8(R2) set forw pointer in callers save area 00000 33284+ USING TDSC,R1 declare TDSC base register 01649A 58F0 1008 00008 33285+ L R15,TLRCNT load local repeat count to R15 33286+* 33287 * 33288 T904L REPINS LR,(R2,R1) repeat: LR R2,R1 33289+* 33290+* build from sublist &ALIST a comma separated string &ARGS 33291+* 33292+* 33293+* 33294+* 33295+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33296+* this allows to transfer the repeat count from last TDSCGEN call 33297+* 33298+* 1649E 33299+T904L EQU * 33300+* 33301+* write a comment indicating what REPINS does (in case NOGEN in effect) 33302+* 33303+*,// REPINS: do 5 times: 33304+* 33305+* MNOTE requires that ' is doubled for expanded variables 33306+* thus build &MASTR as a copy of '&ARGS with ' doubled 33307+* 33308+* 33309+*,// LR R2,R1 33310+* 33311+* finally generate code: &ICNT copies of &CODE &ARGS 33312+* 01649E 1821 33313+ LR R2,R1 0164A0 1821 33314+ LR R2,R1 0164A2 1821 33315+ LR R2,R1 0164A4 1821 33316+ LR R2,R1 0164A6 1821 33317+ LR R2,R1 33318+* 0164A8 06FB 33319 BCTR R15,R11 33320 TSIMRET 0164AA 58F0 C038 164B8 33321+ L R15,=A(SAVETST) R15 := current save area 0164AE 58DF 0004 00004 33322+ L R13,4(R15) get old save area back 0164B2 98EC D00C 0000C 33323+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0164B6 07FE 33324+ BR 14 RETURN 02000000 33325 TSIMEND 0164B8 33326+ LTORG 0164B8 00000458 33327 =A(SAVETST) 164BC 33328+T904TEND EQU * 33329 * 33330 * Test 905 -- LR R,R (ig=6) -------------------------------- 33331 * 33332 TSIMBEG T905,150000,6,1,C'LR R,R (ig=6)',DIS=1 33333+* 0041C4 33334+TDSCDAT CSECT PAGE 609 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0041C8 33335+ DS 0D 33336+* 0041C8 000164C0 33337+T905TDSC DC A(T905) // TENTRY 0041CC 00000044 33338+ DC A(T905TEND-T905) // TLENGTH 0041D0 000249F0 33339+ DC F'150000' // TLRCNT 0041D4 00000006 33340+ DC F'6' // TIGCNT 0041D8 00000001 33341+ DC F'1' // TLTYPE 001DDB 33342+TEXT CSECT 001DDB E3F9F0F5 33343+SPTR2957 DC C'T905' 0041DC 33344+TDSCDAT CSECT 0041DC 33345+ DS 0F 0041DC 04001DDB 33346+ DC AL1(L'SPTR2957),AL3(SPTR2957) 001DDF 33347+TEXT CSECT 001DDF D3D940D96BD9404D 33348+SPTR2958 DC C'LR R,R (ig=6)' 0041E0 33349+TDSCDAT CSECT 0041E0 33350+ DS 0F 0041E0 0D001DDF 33351+ DC AL1(L'SPTR2958),AL3(SPTR2958) 33352+* 004D64 33353+TDSCTBL CSECT 04D64 33354+T905TPTR EQU * 004D64 010041C8 33355+ DC X'01',AL3(T905TDSC) disabled test 33356+* 0164BC 33357+TCODE CSECT 0164C0 33358+ DS 0D ensure double word alignment for test 0164C0 33359+T905 DS 0H 01650000 0164C0 90EC D00C 0000C 33360+ STM 14,12,12(13) SAVE REGISTERS 02950000 0164C4 18CF 33361+ LR R12,R15 base register := entry address 164C0 33362+ USING T905,R12 declare code base register 0164C6 41B0 C01E 164DE 33363+ LA R11,T905L load loop target to R11 0164CA 58F0 C040 16500 33364+ L R15,=A(SAVETST) R15 := current save area 0164CE 50DF 0004 00004 33365+ ST R13,4(R15) set back pointer in current save area 0164D2 182D 33366+ LR R2,R13 remember callers save area 0164D4 18DF 33367+ LR R13,R15 setup current save area 0164D6 50D2 0008 00008 33368+ ST R13,8(R2) set forw pointer in callers save area 00000 33369+ USING TDSC,R1 declare TDSC base register 0164DA 58F0 1008 00008 33370+ L R15,TLRCNT load local repeat count to R15 33371+* 33372 * 33373 T905L REPINS LR,(R2,R1) repeat: LR R2,R1 33374+* 33375+* build from sublist &ALIST a comma separated string &ARGS 33376+* 33377+* 33378+* 33379+* 33380+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33381+* this allows to transfer the repeat count from last TDSCGEN call 33382+* 33383+* 164DE 33384+T905L EQU * 33385+* 33386+* write a comment indicating what REPINS does (in case NOGEN in effect) 33387+* 33388+*,// REPINS: do 6 times: 33389+* PAGE 610 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 33390+* MNOTE requires that ' is doubled for expanded variables 33391+* thus build &MASTR as a copy of '&ARGS with ' doubled 33392+* 33393+* 33394+*,// LR R2,R1 33395+* 33396+* finally generate code: &ICNT copies of &CODE &ARGS 33397+* 0164DE 1821 33398+ LR R2,R1 0164E0 1821 33399+ LR R2,R1 0164E2 1821 33400+ LR R2,R1 0164E4 1821 33401+ LR R2,R1 0164E6 1821 33402+ LR R2,R1 0164E8 1821 33403+ LR R2,R1 33404+* 0164EA 06FB 33405 BCTR R15,R11 33406 TSIMRET 0164EC 58F0 C040 16500 33407+ L R15,=A(SAVETST) R15 := current save area 0164F0 58DF 0004 00004 33408+ L R13,4(R15) get old save area back 0164F4 98EC D00C 0000C 33409+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0164F8 07FE 33410+ BR 14 RETURN 02000000 33411 TSIMEND 016500 33412+ LTORG 016500 00000458 33413 =A(SAVETST) 16504 33414+T905TEND EQU * 33415 * 33416 * Test 906 -- LR R,R (ig=7) -------------------------------- 33417 * 33418 TSIMBEG T906,150000,7,1,C'LR R,R (ig=7)',DIS=1 33419+* 0041E4 33420+TDSCDAT CSECT 0041E8 33421+ DS 0D 33422+* 0041E8 00016508 33423+T906TDSC DC A(T906) // TENTRY 0041EC 00000044 33424+ DC A(T906TEND-T906) // TLENGTH 0041F0 000249F0 33425+ DC F'150000' // TLRCNT 0041F4 00000007 33426+ DC F'7' // TIGCNT 0041F8 00000001 33427+ DC F'1' // TLTYPE 001DEC 33428+TEXT CSECT 001DEC E3F9F0F6 33429+SPTR2969 DC C'T906' 0041FC 33430+TDSCDAT CSECT 0041FC 33431+ DS 0F 0041FC 04001DEC 33432+ DC AL1(L'SPTR2969),AL3(SPTR2969) 001DF0 33433+TEXT CSECT 001DF0 D3D940D96BD9404D 33434+SPTR2970 DC C'LR R,R (ig=7)' 004200 33435+TDSCDAT CSECT 004200 33436+ DS 0F 004200 0D001DF0 33437+ DC AL1(L'SPTR2970),AL3(SPTR2970) 33438+* 004D68 33439+TDSCTBL CSECT 04D68 33440+T906TPTR EQU * 004D68 010041E8 33441+ DC X'01',AL3(T906TDSC) disabled test 33442+* 016504 33443+TCODE CSECT 016508 33444+ DS 0D ensure double word alignment for test PAGE 611 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016508 33445+T906 DS 0H 01650000 016508 90EC D00C 0000C 33446+ STM 14,12,12(13) SAVE REGISTERS 02950000 01650C 18CF 33447+ LR R12,R15 base register := entry address 16508 33448+ USING T906,R12 declare code base register 01650E 41B0 C01E 16526 33449+ LA R11,T906L load loop target to R11 016512 58F0 C040 16548 33450+ L R15,=A(SAVETST) R15 := current save area 016516 50DF 0004 00004 33451+ ST R13,4(R15) set back pointer in current save area 01651A 182D 33452+ LR R2,R13 remember callers save area 01651C 18DF 33453+ LR R13,R15 setup current save area 01651E 50D2 0008 00008 33454+ ST R13,8(R2) set forw pointer in callers save area 00000 33455+ USING TDSC,R1 declare TDSC base register 016522 58F0 1008 00008 33456+ L R15,TLRCNT load local repeat count to R15 33457+* 33458 * 33459 T906L REPINS LR,(R2,R1) repeat: LR R2,R1 33460+* 33461+* build from sublist &ALIST a comma separated string &ARGS 33462+* 33463+* 33464+* 33465+* 33466+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33467+* this allows to transfer the repeat count from last TDSCGEN call 33468+* 33469+* 16526 33470+T906L EQU * 33471+* 33472+* write a comment indicating what REPINS does (in case NOGEN in effect) 33473+* 33474+*,// REPINS: do 7 times: 33475+* 33476+* MNOTE requires that ' is doubled for expanded variables 33477+* thus build &MASTR as a copy of '&ARGS with ' doubled 33478+* 33479+* 33480+*,// LR R2,R1 33481+* 33482+* finally generate code: &ICNT copies of &CODE &ARGS 33483+* 016526 1821 33484+ LR R2,R1 016528 1821 33485+ LR R2,R1 01652A 1821 33486+ LR R2,R1 01652C 1821 33487+ LR R2,R1 01652E 1821 33488+ LR R2,R1 016530 1821 33489+ LR R2,R1 016532 1821 33490+ LR R2,R1 33491+* 016534 06FB 33492 BCTR R15,R11 33493 TSIMRET 016536 58F0 C040 16548 33494+ L R15,=A(SAVETST) R15 := current save area 01653A 58DF 0004 00004 33495+ L R13,4(R15) get old save area back 01653E 98EC D00C 0000C 33496+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016542 07FE 33497+ BR 14 RETURN 02000000 33498 TSIMEND 016548 33499+ LTORG PAGE 612 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016548 00000458 33500 =A(SAVETST) 1654C 33501+T906TEND EQU * 33502 * 33503 * Test 907 -- LR R,R (ig=8) -------------------------------- 33504 * 33505 TSIMBEG T907,150000,8,1,C'LR R,R (ig=8)',DIS=1 33506+* 004204 33507+TDSCDAT CSECT 004208 33508+ DS 0D 33509+* 004208 00016550 33510+T907TDSC DC A(T907) // TENTRY 00420C 00000044 33511+ DC A(T907TEND-T907) // TLENGTH 004210 000249F0 33512+ DC F'150000' // TLRCNT 004214 00000008 33513+ DC F'8' // TIGCNT 004218 00000001 33514+ DC F'1' // TLTYPE 001DFD 33515+TEXT CSECT 001DFD E3F9F0F7 33516+SPTR2981 DC C'T907' 00421C 33517+TDSCDAT CSECT 00421C 33518+ DS 0F 00421C 04001DFD 33519+ DC AL1(L'SPTR2981),AL3(SPTR2981) 001E01 33520+TEXT CSECT 001E01 D3D940D96BD9404D 33521+SPTR2982 DC C'LR R,R (ig=8)' 004220 33522+TDSCDAT CSECT 004220 33523+ DS 0F 004220 0D001E01 33524+ DC AL1(L'SPTR2982),AL3(SPTR2982) 33525+* 004D6C 33526+TDSCTBL CSECT 04D6C 33527+T907TPTR EQU * 004D6C 01004208 33528+ DC X'01',AL3(T907TDSC) disabled test 33529+* 01654C 33530+TCODE CSECT 016550 33531+ DS 0D ensure double word alignment for test 016550 33532+T907 DS 0H 01650000 016550 90EC D00C 0000C 33533+ STM 14,12,12(13) SAVE REGISTERS 02950000 016554 18CF 33534+ LR R12,R15 base register := entry address 16550 33535+ USING T907,R12 declare code base register 016556 41B0 C01E 1656E 33536+ LA R11,T907L load loop target to R11 01655A 58F0 C040 16590 33537+ L R15,=A(SAVETST) R15 := current save area 01655E 50DF 0004 00004 33538+ ST R13,4(R15) set back pointer in current save area 016562 182D 33539+ LR R2,R13 remember callers save area 016564 18DF 33540+ LR R13,R15 setup current save area 016566 50D2 0008 00008 33541+ ST R13,8(R2) set forw pointer in callers save area 00000 33542+ USING TDSC,R1 declare TDSC base register 01656A 58F0 1008 00008 33543+ L R15,TLRCNT load local repeat count to R15 33544+* 33545 * 33546 T907L REPINS LR,(R2,R1) repeat: LR R2,R1 33547+* 33548+* build from sublist &ALIST a comma separated string &ARGS 33549+* 33550+* 33551+* 33552+* 33553+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33554+* this allows to transfer the repeat count from last TDSCGEN call PAGE 613 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 33555+* 33556+* 1656E 33557+T907L EQU * 33558+* 33559+* write a comment indicating what REPINS does (in case NOGEN in effect) 33560+* 33561+*,// REPINS: do 8 times: 33562+* 33563+* MNOTE requires that ' is doubled for expanded variables 33564+* thus build &MASTR as a copy of '&ARGS with ' doubled 33565+* 33566+* 33567+*,// LR R2,R1 33568+* 33569+* finally generate code: &ICNT copies of &CODE &ARGS 33570+* 01656E 1821 33571+ LR R2,R1 016570 1821 33572+ LR R2,R1 016572 1821 33573+ LR R2,R1 016574 1821 33574+ LR R2,R1 016576 1821 33575+ LR R2,R1 016578 1821 33576+ LR R2,R1 01657A 1821 33577+ LR R2,R1 01657C 1821 33578+ LR R2,R1 33579+* 01657E 06FB 33580 BCTR R15,R11 33581 TSIMRET 016580 58F0 C040 16590 33582+ L R15,=A(SAVETST) R15 := current save area 016584 58DF 0004 00004 33583+ L R13,4(R15) get old save area back 016588 98EC D00C 0000C 33584+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01658C 07FE 33585+ BR 14 RETURN 02000000 33586 TSIMEND 016590 33587+ LTORG 016590 00000458 33588 =A(SAVETST) 16594 33589+T907TEND EQU * 33590 * 33591 * Test 908 -- LR R,R (ig=9) -------------------------------- 33592 * 33593 TSIMBEG T908,150000,9,1,C'LR R,R (ig=9)',DIS=1 33594+* 004224 33595+TDSCDAT CSECT 004228 33596+ DS 0D 33597+* 004228 00016598 33598+T908TDSC DC A(T908) // TENTRY 00422C 00000044 33599+ DC A(T908TEND-T908) // TLENGTH 004230 000249F0 33600+ DC F'150000' // TLRCNT 004234 00000009 33601+ DC F'9' // TIGCNT 004238 00000001 33602+ DC F'1' // TLTYPE 001E0E 33603+TEXT CSECT 001E0E E3F9F0F8 33604+SPTR2993 DC C'T908' 00423C 33605+TDSCDAT CSECT 00423C 33606+ DS 0F 00423C 04001E0E 33607+ DC AL1(L'SPTR2993),AL3(SPTR2993) 001E12 33608+TEXT CSECT 001E12 D3D940D96BD9404D 33609+SPTR2994 DC C'LR R,R (ig=9)' PAGE 614 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004240 33610+TDSCDAT CSECT 004240 33611+ DS 0F 004240 0D001E12 33612+ DC AL1(L'SPTR2994),AL3(SPTR2994) 33613+* 004D70 33614+TDSCTBL CSECT 04D70 33615+T908TPTR EQU * 004D70 01004228 33616+ DC X'01',AL3(T908TDSC) disabled test 33617+* 016594 33618+TCODE CSECT 016598 33619+ DS 0D ensure double word alignment for test 016598 33620+T908 DS 0H 01650000 016598 90EC D00C 0000C 33621+ STM 14,12,12(13) SAVE REGISTERS 02950000 01659C 18CF 33622+ LR R12,R15 base register := entry address 16598 33623+ USING T908,R12 declare code base register 01659E 41B0 C01E 165B6 33624+ LA R11,T908L load loop target to R11 0165A2 58F0 C040 165D8 33625+ L R15,=A(SAVETST) R15 := current save area 0165A6 50DF 0004 00004 33626+ ST R13,4(R15) set back pointer in current save area 0165AA 182D 33627+ LR R2,R13 remember callers save area 0165AC 18DF 33628+ LR R13,R15 setup current save area 0165AE 50D2 0008 00008 33629+ ST R13,8(R2) set forw pointer in callers save area 00000 33630+ USING TDSC,R1 declare TDSC base register 0165B2 58F0 1008 00008 33631+ L R15,TLRCNT load local repeat count to R15 33632+* 33633 * 33634 T908L REPINS LR,(R2,R1) repeat: LR R2,R1 33635+* 33636+* build from sublist &ALIST a comma separated string &ARGS 33637+* 33638+* 33639+* 33640+* 33641+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33642+* this allows to transfer the repeat count from last TDSCGEN call 33643+* 33644+* 165B6 33645+T908L EQU * 33646+* 33647+* write a comment indicating what REPINS does (in case NOGEN in effect) 33648+* 33649+*,// REPINS: do 9 times: 33650+* 33651+* MNOTE requires that ' is doubled for expanded variables 33652+* thus build &MASTR as a copy of '&ARGS with ' doubled 33653+* 33654+* 33655+*,// LR R2,R1 33656+* 33657+* finally generate code: &ICNT copies of &CODE &ARGS 33658+* 0165B6 1821 33659+ LR R2,R1 0165B8 1821 33660+ LR R2,R1 0165BA 1821 33661+ LR R2,R1 0165BC 1821 33662+ LR R2,R1 0165BE 1821 33663+ LR R2,R1 0165C0 1821 33664+ LR R2,R1 PAGE 615 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0165C2 1821 33665+ LR R2,R1 0165C4 1821 33666+ LR R2,R1 0165C6 1821 33667+ LR R2,R1 33668+* 0165C8 06FB 33669 BCTR R15,R11 33670 TSIMRET 0165CA 58F0 C040 165D8 33671+ L R15,=A(SAVETST) R15 := current save area 0165CE 58DF 0004 00004 33672+ L R13,4(R15) get old save area back 0165D2 98EC D00C 0000C 33673+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0165D6 07FE 33674+ BR 14 RETURN 02000000 33675 TSIMEND 0165D8 33676+ LTORG 0165D8 00000458 33677 =A(SAVETST) 165DC 33678+T908TEND EQU * 33679 * 33680 * Test 909 -- LR R,R (ig=10) ------------------------------- 33681 * 33682 TSIMBEG T909,150000,10,1,C'LR R,R (ig=10)',DIS=1 33683+* 004244 33684+TDSCDAT CSECT 004248 33685+ DS 0D 33686+* 004248 000165E0 33687+T909TDSC DC A(T909) // TENTRY 00424C 0000004C 33688+ DC A(T909TEND-T909) // TLENGTH 004250 000249F0 33689+ DC F'150000' // TLRCNT 004254 0000000A 33690+ DC F'10' // TIGCNT 004258 00000001 33691+ DC F'1' // TLTYPE 001E1F 33692+TEXT CSECT 001E1F E3F9F0F9 33693+SPTR3005 DC C'T909' 00425C 33694+TDSCDAT CSECT 00425C 33695+ DS 0F 00425C 04001E1F 33696+ DC AL1(L'SPTR3005),AL3(SPTR3005) 001E23 33697+TEXT CSECT 001E23 D3D940D96BD9404D 33698+SPTR3006 DC C'LR R,R (ig=10)' 004260 33699+TDSCDAT CSECT 004260 33700+ DS 0F 004260 0E001E23 33701+ DC AL1(L'SPTR3006),AL3(SPTR3006) 33702+* 004D74 33703+TDSCTBL CSECT 04D74 33704+T909TPTR EQU * 004D74 01004248 33705+ DC X'01',AL3(T909TDSC) disabled test 33706+* 0165DC 33707+TCODE CSECT 0165E0 33708+ DS 0D ensure double word alignment for test 0165E0 33709+T909 DS 0H 01650000 0165E0 90EC D00C 0000C 33710+ STM 14,12,12(13) SAVE REGISTERS 02950000 0165E4 18CF 33711+ LR R12,R15 base register := entry address 165E0 33712+ USING T909,R12 declare code base register 0165E6 41B0 C01E 165FE 33713+ LA R11,T909L load loop target to R11 0165EA 58F0 C048 16628 33714+ L R15,=A(SAVETST) R15 := current save area 0165EE 50DF 0004 00004 33715+ ST R13,4(R15) set back pointer in current save area 0165F2 182D 33716+ LR R2,R13 remember callers save area 0165F4 18DF 33717+ LR R13,R15 setup current save area 0165F6 50D2 0008 00008 33718+ ST R13,8(R2) set forw pointer in callers save area 00000 33719+ USING TDSC,R1 declare TDSC base register PAGE 616 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0165FA 58F0 1008 00008 33720+ L R15,TLRCNT load local repeat count to R15 33721+* 33722 * 33723 T909L REPINS LR,(R2,R1) repeat: LR R2,R1 33724+* 33725+* build from sublist &ALIST a comma separated string &ARGS 33726+* 33727+* 33728+* 33729+* 33730+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33731+* this allows to transfer the repeat count from last TDSCGEN call 33732+* 33733+* 165FE 33734+T909L EQU * 33735+* 33736+* write a comment indicating what REPINS does (in case NOGEN in effect) 33737+* 33738+*,// REPINS: do 10 times: 33739+* 33740+* MNOTE requires that ' is doubled for expanded variables 33741+* thus build &MASTR as a copy of '&ARGS with ' doubled 33742+* 33743+* 33744+*,// LR R2,R1 33745+* 33746+* finally generate code: &ICNT copies of &CODE &ARGS 33747+* 0165FE 1821 33748+ LR R2,R1 016600 1821 33749+ LR R2,R1 016602 1821 33750+ LR R2,R1 016604 1821 33751+ LR R2,R1 016606 1821 33752+ LR R2,R1 016608 1821 33753+ LR R2,R1 01660A 1821 33754+ LR R2,R1 01660C 1821 33755+ LR R2,R1 01660E 1821 33756+ LR R2,R1 016610 1821 33757+ LR R2,R1 33758+* 016612 06FB 33759 BCTR R15,R11 33760 TSIMRET 016614 58F0 C048 16628 33761+ L R15,=A(SAVETST) R15 := current save area 016618 58DF 0004 00004 33762+ L R13,4(R15) get old save area back 01661C 98EC D00C 0000C 33763+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016620 07FE 33764+ BR 14 RETURN 02000000 33765 TSIMEND 016628 33766+ LTORG 016628 00000458 33767 =A(SAVETST) 1662C 33768+T909TEND EQU * 33769 * 33770 * Test 910 -- LR R,R (ig=12) ------------------------------- 33771 * 33772 TSIMBEG T910,120000,12,1,C'LR R,R (ig=12)',DIS=1 33773+* 004264 33774+TDSCDAT CSECT PAGE 617 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004268 33775+ DS 0D 33776+* 004268 00016630 33777+T910TDSC DC A(T910) // TENTRY 00426C 0000004C 33778+ DC A(T910TEND-T910) // TLENGTH 004270 0001D4C0 33779+ DC F'120000' // TLRCNT 004274 0000000C 33780+ DC F'12' // TIGCNT 004278 00000001 33781+ DC F'1' // TLTYPE 001E31 33782+TEXT CSECT 001E31 E3F9F1F0 33783+SPTR3017 DC C'T910' 00427C 33784+TDSCDAT CSECT 00427C 33785+ DS 0F 00427C 04001E31 33786+ DC AL1(L'SPTR3017),AL3(SPTR3017) 001E35 33787+TEXT CSECT 001E35 D3D940D96BD9404D 33788+SPTR3018 DC C'LR R,R (ig=12)' 004280 33789+TDSCDAT CSECT 004280 33790+ DS 0F 004280 0E001E35 33791+ DC AL1(L'SPTR3018),AL3(SPTR3018) 33792+* 004D78 33793+TDSCTBL CSECT 04D78 33794+T910TPTR EQU * 004D78 01004268 33795+ DC X'01',AL3(T910TDSC) disabled test 33796+* 01662C 33797+TCODE CSECT 016630 33798+ DS 0D ensure double word alignment for test 016630 33799+T910 DS 0H 01650000 016630 90EC D00C 0000C 33800+ STM 14,12,12(13) SAVE REGISTERS 02950000 016634 18CF 33801+ LR R12,R15 base register := entry address 16630 33802+ USING T910,R12 declare code base register 016636 41B0 C01E 1664E 33803+ LA R11,T910L load loop target to R11 01663A 58F0 C048 16678 33804+ L R15,=A(SAVETST) R15 := current save area 01663E 50DF 0004 00004 33805+ ST R13,4(R15) set back pointer in current save area 016642 182D 33806+ LR R2,R13 remember callers save area 016644 18DF 33807+ LR R13,R15 setup current save area 016646 50D2 0008 00008 33808+ ST R13,8(R2) set forw pointer in callers save area 00000 33809+ USING TDSC,R1 declare TDSC base register 01664A 58F0 1008 00008 33810+ L R15,TLRCNT load local repeat count to R15 33811+* 33812 * 33813 T910L REPINS LR,(R2,R1) repeat: LR R2,R1 33814+* 33815+* build from sublist &ALIST a comma separated string &ARGS 33816+* 33817+* 33818+* 33819+* 33820+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33821+* this allows to transfer the repeat count from last TDSCGEN call 33822+* 33823+* 1664E 33824+T910L EQU * 33825+* 33826+* write a comment indicating what REPINS does (in case NOGEN in effect) 33827+* 33828+*,// REPINS: do 12 times: 33829+* PAGE 618 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 33830+* MNOTE requires that ' is doubled for expanded variables 33831+* thus build &MASTR as a copy of '&ARGS with ' doubled 33832+* 33833+* 33834+*,// LR R2,R1 33835+* 33836+* finally generate code: &ICNT copies of &CODE &ARGS 33837+* 01664E 1821 33838+ LR R2,R1 016650 1821 33839+ LR R2,R1 016652 1821 33840+ LR R2,R1 016654 1821 33841+ LR R2,R1 016656 1821 33842+ LR R2,R1 016658 1821 33843+ LR R2,R1 01665A 1821 33844+ LR R2,R1 01665C 1821 33845+ LR R2,R1 01665E 1821 33846+ LR R2,R1 016660 1821 33847+ LR R2,R1 016662 1821 33848+ LR R2,R1 016664 1821 33849+ LR R2,R1 33850+* 016666 06FB 33851 BCTR R15,R11 33852 TSIMRET 016668 58F0 C048 16678 33853+ L R15,=A(SAVETST) R15 := current save area 01666C 58DF 0004 00004 33854+ L R13,4(R15) get old save area back 016670 98EC D00C 0000C 33855+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016674 07FE 33856+ BR 14 RETURN 02000000 33857 TSIMEND 016678 33858+ LTORG 016678 00000458 33859 =A(SAVETST) 1667C 33860+T910TEND EQU * 33861 * 33862 * Test 911 -- LR R,R (ig=18) ------------------------------- 33863 * 33864 TSIMBEG T911,90000,18,1,C'LR R,R (ig=18)',DIS=1 33865+* 004284 33866+TDSCDAT CSECT 004288 33867+ DS 0D 33868+* 004288 00016680 33869+T911TDSC DC A(T911) // TENTRY 00428C 0000005C 33870+ DC A(T911TEND-T911) // TLENGTH 004290 00015F90 33871+ DC F'90000' // TLRCNT 004294 00000012 33872+ DC F'18' // TIGCNT 004298 00000001 33873+ DC F'1' // TLTYPE 001E43 33874+TEXT CSECT 001E43 E3F9F1F1 33875+SPTR3029 DC C'T911' 00429C 33876+TDSCDAT CSECT 00429C 33877+ DS 0F 00429C 04001E43 33878+ DC AL1(L'SPTR3029),AL3(SPTR3029) 001E47 33879+TEXT CSECT 001E47 D3D940D96BD9404D 33880+SPTR3030 DC C'LR R,R (ig=18)' 0042A0 33881+TDSCDAT CSECT 0042A0 33882+ DS 0F 0042A0 0E001E47 33883+ DC AL1(L'SPTR3030),AL3(SPTR3030) 33884+* PAGE 619 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004D7C 33885+TDSCTBL CSECT 04D7C 33886+T911TPTR EQU * 004D7C 01004288 33887+ DC X'01',AL3(T911TDSC) disabled test 33888+* 01667C 33889+TCODE CSECT 016680 33890+ DS 0D ensure double word alignment for test 016680 33891+T911 DS 0H 01650000 016680 90EC D00C 0000C 33892+ STM 14,12,12(13) SAVE REGISTERS 02950000 016684 18CF 33893+ LR R12,R15 base register := entry address 16680 33894+ USING T911,R12 declare code base register 016686 41B0 C01E 1669E 33895+ LA R11,T911L load loop target to R11 01668A 58F0 C058 166D8 33896+ L R15,=A(SAVETST) R15 := current save area 01668E 50DF 0004 00004 33897+ ST R13,4(R15) set back pointer in current save area 016692 182D 33898+ LR R2,R13 remember callers save area 016694 18DF 33899+ LR R13,R15 setup current save area 016696 50D2 0008 00008 33900+ ST R13,8(R2) set forw pointer in callers save area 00000 33901+ USING TDSC,R1 declare TDSC base register 01669A 58F0 1008 00008 33902+ L R15,TLRCNT load local repeat count to R15 33903+* 33904 * 33905 T911L REPINS LR,(R2,R1) repeat: LR R2,R1 33906+* 33907+* build from sublist &ALIST a comma separated string &ARGS 33908+* 33909+* 33910+* 33911+* 33912+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 33913+* this allows to transfer the repeat count from last TDSCGEN call 33914+* 33915+* 1669E 33916+T911L EQU * 33917+* 33918+* write a comment indicating what REPINS does (in case NOGEN in effect) 33919+* 33920+*,// REPINS: do 18 times: 33921+* 33922+* MNOTE requires that ' is doubled for expanded variables 33923+* thus build &MASTR as a copy of '&ARGS with ' doubled 33924+* 33925+* 33926+*,// LR R2,R1 33927+* 33928+* finally generate code: &ICNT copies of &CODE &ARGS 33929+* 01669E 1821 33930+ LR R2,R1 0166A0 1821 33931+ LR R2,R1 0166A2 1821 33932+ LR R2,R1 0166A4 1821 33933+ LR R2,R1 0166A6 1821 33934+ LR R2,R1 0166A8 1821 33935+ LR R2,R1 0166AA 1821 33936+ LR R2,R1 0166AC 1821 33937+ LR R2,R1 0166AE 1821 33938+ LR R2,R1 0166B0 1821 33939+ LR R2,R1 PAGE 620 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0166B2 1821 33940+ LR R2,R1 0166B4 1821 33941+ LR R2,R1 0166B6 1821 33942+ LR R2,R1 0166B8 1821 33943+ LR R2,R1 0166BA 1821 33944+ LR R2,R1 0166BC 1821 33945+ LR R2,R1 0166BE 1821 33946+ LR R2,R1 0166C0 1821 33947+ LR R2,R1 33948+* 0166C2 06FB 33949 BCTR R15,R11 33950 TSIMRET 0166C4 58F0 C058 166D8 33951+ L R15,=A(SAVETST) R15 := current save area 0166C8 58DF 0004 00004 33952+ L R13,4(R15) get old save area back 0166CC 98EC D00C 0000C 33953+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0166D0 07FE 33954+ BR 14 RETURN 02000000 33955 TSIMEND 0166D8 33956+ LTORG 0166D8 00000458 33957 =A(SAVETST) 166DC 33958+T911TEND EQU * 33959 * 33960 * Test 912 -- LR R,R (ig=25) ------------------------------- 33961 * 33962 TSIMBEG T912,70000,25,1,C'LR R,R (ig=25)',DIS=1 33963+* 0042A4 33964+TDSCDAT CSECT 0042A8 33965+ DS 0D 33966+* 0042A8 000166E0 33967+T912TDSC DC A(T912) // TENTRY 0042AC 00000064 33968+ DC A(T912TEND-T912) // TLENGTH 0042B0 00011170 33969+ DC F'70000' // TLRCNT 0042B4 00000019 33970+ DC F'25' // TIGCNT 0042B8 00000001 33971+ DC F'1' // TLTYPE 001E55 33972+TEXT CSECT 001E55 E3F9F1F2 33973+SPTR3041 DC C'T912' 0042BC 33974+TDSCDAT CSECT 0042BC 33975+ DS 0F 0042BC 04001E55 33976+ DC AL1(L'SPTR3041),AL3(SPTR3041) 001E59 33977+TEXT CSECT 001E59 D3D940D96BD9404D 33978+SPTR3042 DC C'LR R,R (ig=25)' 0042C0 33979+TDSCDAT CSECT 0042C0 33980+ DS 0F 0042C0 0E001E59 33981+ DC AL1(L'SPTR3042),AL3(SPTR3042) 33982+* 004D80 33983+TDSCTBL CSECT 04D80 33984+T912TPTR EQU * 004D80 010042A8 33985+ DC X'01',AL3(T912TDSC) disabled test 33986+* 0166DC 33987+TCODE CSECT 0166E0 33988+ DS 0D ensure double word alignment for test 0166E0 33989+T912 DS 0H 01650000 0166E0 90EC D00C 0000C 33990+ STM 14,12,12(13) SAVE REGISTERS 02950000 0166E4 18CF 33991+ LR R12,R15 base register := entry address 166E0 33992+ USING T912,R12 declare code base register 0166E6 41B0 C01E 166FE 33993+ LA R11,T912L load loop target to R11 0166EA 58F0 C060 16740 33994+ L R15,=A(SAVETST) R15 := current save area PAGE 621 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0166EE 50DF 0004 00004 33995+ ST R13,4(R15) set back pointer in current save area 0166F2 182D 33996+ LR R2,R13 remember callers save area 0166F4 18DF 33997+ LR R13,R15 setup current save area 0166F6 50D2 0008 00008 33998+ ST R13,8(R2) set forw pointer in callers save area 00000 33999+ USING TDSC,R1 declare TDSC base register 0166FA 58F0 1008 00008 34000+ L R15,TLRCNT load local repeat count to R15 34001+* 34002 * 34003 T912L REPINS LR,(R2,R1) repeat: LR R2,R1 34004+* 34005+* build from sublist &ALIST a comma separated string &ARGS 34006+* 34007+* 34008+* 34009+* 34010+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 34011+* this allows to transfer the repeat count from last TDSCGEN call 34012+* 34013+* 166FE 34014+T912L EQU * 34015+* 34016+* write a comment indicating what REPINS does (in case NOGEN in effect) 34017+* 34018+*,// REPINS: do 25 times: 34019+* 34020+* MNOTE requires that ' is doubled for expanded variables 34021+* thus build &MASTR as a copy of '&ARGS with ' doubled 34022+* 34023+* 34024+*,// LR R2,R1 34025+* 34026+* finally generate code: &ICNT copies of &CODE &ARGS 34027+* 0166FE 1821 34028+ LR R2,R1 016700 1821 34029+ LR R2,R1 016702 1821 34030+ LR R2,R1 016704 1821 34031+ LR R2,R1 016706 1821 34032+ LR R2,R1 016708 1821 34033+ LR R2,R1 01670A 1821 34034+ LR R2,R1 01670C 1821 34035+ LR R2,R1 01670E 1821 34036+ LR R2,R1 016710 1821 34037+ LR R2,R1 016712 1821 34038+ LR R2,R1 016714 1821 34039+ LR R2,R1 016716 1821 34040+ LR R2,R1 016718 1821 34041+ LR R2,R1 01671A 1821 34042+ LR R2,R1 01671C 1821 34043+ LR R2,R1 01671E 1821 34044+ LR R2,R1 016720 1821 34045+ LR R2,R1 016722 1821 34046+ LR R2,R1 016724 1821 34047+ LR R2,R1 016726 1821 34048+ LR R2,R1 016728 1821 34049+ LR R2,R1 PAGE 622 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01672A 1821 34050+ LR R2,R1 01672C 1821 34051+ LR R2,R1 01672E 1821 34052+ LR R2,R1 34053+* 016730 06FB 34054 BCTR R15,R11 34055 TSIMRET 016732 58F0 C060 16740 34056+ L R15,=A(SAVETST) R15 := current save area 016736 58DF 0004 00004 34057+ L R13,4(R15) get old save area back 01673A 98EC D00C 0000C 34058+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01673E 07FE 34059+ BR 14 RETURN 02000000 34060 TSIMEND 016740 34061+ LTORG 016740 00000458 34062 =A(SAVETST) 16744 34063+T912TEND EQU * 34064 * 34065 * Test 913 -- LR R,R (ig=36) ------------------------------- 34066 * 34067 TSIMBEG T913,50000,36,1,C'LR R,R (ig=36)',DIS=1 34068+* 0042C4 34069+TDSCDAT CSECT 0042C8 34070+ DS 0D 34071+* 0042C8 00016748 34072+T913TDSC DC A(T913) // TENTRY 0042CC 0000007C 34073+ DC A(T913TEND-T913) // TLENGTH 0042D0 0000C350 34074+ DC F'50000' // TLRCNT 0042D4 00000024 34075+ DC F'36' // TIGCNT 0042D8 00000001 34076+ DC F'1' // TLTYPE 001E67 34077+TEXT CSECT 001E67 E3F9F1F3 34078+SPTR3053 DC C'T913' 0042DC 34079+TDSCDAT CSECT 0042DC 34080+ DS 0F 0042DC 04001E67 34081+ DC AL1(L'SPTR3053),AL3(SPTR3053) 001E6B 34082+TEXT CSECT 001E6B D3D940D96BD9404D 34083+SPTR3054 DC C'LR R,R (ig=36)' 0042E0 34084+TDSCDAT CSECT 0042E0 34085+ DS 0F 0042E0 0E001E6B 34086+ DC AL1(L'SPTR3054),AL3(SPTR3054) 34087+* 004D84 34088+TDSCTBL CSECT 04D84 34089+T913TPTR EQU * 004D84 010042C8 34090+ DC X'01',AL3(T913TDSC) disabled test 34091+* 016744 34092+TCODE CSECT 016748 34093+ DS 0D ensure double word alignment for test 016748 34094+T913 DS 0H 01650000 016748 90EC D00C 0000C 34095+ STM 14,12,12(13) SAVE REGISTERS 02950000 01674C 18CF 34096+ LR R12,R15 base register := entry address 16748 34097+ USING T913,R12 declare code base register 01674E 41B0 C01E 16766 34098+ LA R11,T913L load loop target to R11 016752 58F0 C078 167C0 34099+ L R15,=A(SAVETST) R15 := current save area 016756 50DF 0004 00004 34100+ ST R13,4(R15) set back pointer in current save area 01675A 182D 34101+ LR R2,R13 remember callers save area 01675C 18DF 34102+ LR R13,R15 setup current save area 01675E 50D2 0008 00008 34103+ ST R13,8(R2) set forw pointer in callers save area 00000 34104+ USING TDSC,R1 declare TDSC base register PAGE 623 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016762 58F0 1008 00008 34105+ L R15,TLRCNT load local repeat count to R15 34106+* 34107 * 34108 T913L REPINS LR,(R2,R1) repeat: LR R2,R1 34109+* 34110+* build from sublist &ALIST a comma separated string &ARGS 34111+* 34112+* 34113+* 34114+* 34115+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 34116+* this allows to transfer the repeat count from last TDSCGEN call 34117+* 34118+* 16766 34119+T913L EQU * 34120+* 34121+* write a comment indicating what REPINS does (in case NOGEN in effect) 34122+* 34123+*,// REPINS: do 36 times: 34124+* 34125+* MNOTE requires that ' is doubled for expanded variables 34126+* thus build &MASTR as a copy of '&ARGS with ' doubled 34127+* 34128+* 34129+*,// LR R2,R1 34130+* 34131+* finally generate code: &ICNT copies of &CODE &ARGS 34132+* 016766 1821 34133+ LR R2,R1 016768 1821 34134+ LR R2,R1 01676A 1821 34135+ LR R2,R1 01676C 1821 34136+ LR R2,R1 01676E 1821 34137+ LR R2,R1 016770 1821 34138+ LR R2,R1 016772 1821 34139+ LR R2,R1 016774 1821 34140+ LR R2,R1 016776 1821 34141+ LR R2,R1 016778 1821 34142+ LR R2,R1 01677A 1821 34143+ LR R2,R1 01677C 1821 34144+ LR R2,R1 01677E 1821 34145+ LR R2,R1 016780 1821 34146+ LR R2,R1 016782 1821 34147+ LR R2,R1 016784 1821 34148+ LR R2,R1 016786 1821 34149+ LR R2,R1 016788 1821 34150+ LR R2,R1 01678A 1821 34151+ LR R2,R1 01678C 1821 34152+ LR R2,R1 01678E 1821 34153+ LR R2,R1 016790 1821 34154+ LR R2,R1 016792 1821 34155+ LR R2,R1 016794 1821 34156+ LR R2,R1 016796 1821 34157+ LR R2,R1 016798 1821 34158+ LR R2,R1 01679A 1821 34159+ LR R2,R1 PAGE 624 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01679C 1821 34160+ LR R2,R1 01679E 1821 34161+ LR R2,R1 0167A0 1821 34162+ LR R2,R1 0167A2 1821 34163+ LR R2,R1 0167A4 1821 34164+ LR R2,R1 0167A6 1821 34165+ LR R2,R1 0167A8 1821 34166+ LR R2,R1 0167AA 1821 34167+ LR R2,R1 0167AC 1821 34168+ LR R2,R1 34169+* 0167AE 06FB 34170 BCTR R15,R11 34171 TSIMRET 0167B0 58F0 C078 167C0 34172+ L R15,=A(SAVETST) R15 := current save area 0167B4 58DF 0004 00004 34173+ L R13,4(R15) get old save area back 0167B8 98EC D00C 0000C 34174+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0167BC 07FE 34175+ BR 14 RETURN 02000000 34176 TSIMEND 0167C0 34177+ LTORG 0167C0 00000458 34178 =A(SAVETST) 167C4 34179+T913TEND EQU * 34180 * 34181 * Test 914 -- LR R,R (ig=50) ------------------------------- 34182 * 34183 TSIMBEG T914,45000,50,1,C'LR R,R (ig=50)',DIS=1 34184+* 0042E4 34185+TDSCDAT CSECT 0042E8 34186+ DS 0D 34187+* 0042E8 000167C8 34188+T914TDSC DC A(T914) // TENTRY 0042EC 0000009C 34189+ DC A(T914TEND-T914) // TLENGTH 0042F0 0000AFC8 34190+ DC F'45000' // TLRCNT 0042F4 00000032 34191+ DC F'50' // TIGCNT 0042F8 00000001 34192+ DC F'1' // TLTYPE 001E79 34193+TEXT CSECT 001E79 E3F9F1F4 34194+SPTR3065 DC C'T914' 0042FC 34195+TDSCDAT CSECT 0042FC 34196+ DS 0F 0042FC 04001E79 34197+ DC AL1(L'SPTR3065),AL3(SPTR3065) 001E7D 34198+TEXT CSECT 001E7D D3D940D96BD9404D 34199+SPTR3066 DC C'LR R,R (ig=50)' 004300 34200+TDSCDAT CSECT 004300 34201+ DS 0F 004300 0E001E7D 34202+ DC AL1(L'SPTR3066),AL3(SPTR3066) 34203+* 004D88 34204+TDSCTBL CSECT 04D88 34205+T914TPTR EQU * 004D88 010042E8 34206+ DC X'01',AL3(T914TDSC) disabled test 34207+* 0167C4 34208+TCODE CSECT 0167C8 34209+ DS 0D ensure double word alignment for test 0167C8 34210+T914 DS 0H 01650000 0167C8 90EC D00C 0000C 34211+ STM 14,12,12(13) SAVE REGISTERS 02950000 0167CC 18CF 34212+ LR R12,R15 base register := entry address 167C8 34213+ USING T914,R12 declare code base register 0167CE 41B0 C01E 167E6 34214+ LA R11,T914L load loop target to R11 PAGE 625 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0167D2 58F0 C098 16860 34215+ L R15,=A(SAVETST) R15 := current save area 0167D6 50DF 0004 00004 34216+ ST R13,4(R15) set back pointer in current save area 0167DA 182D 34217+ LR R2,R13 remember callers save area 0167DC 18DF 34218+ LR R13,R15 setup current save area 0167DE 50D2 0008 00008 34219+ ST R13,8(R2) set forw pointer in callers save area 00000 34220+ USING TDSC,R1 declare TDSC base register 0167E2 58F0 1008 00008 34221+ L R15,TLRCNT load local repeat count to R15 34222+* 34223 * 34224 T914L REPINS LR,(R2,R1) repeat: LR R2,R1 34225+* 34226+* build from sublist &ALIST a comma separated string &ARGS 34227+* 34228+* 34229+* 34230+* 34231+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 34232+* this allows to transfer the repeat count from last TDSCGEN call 34233+* 34234+* 167E6 34235+T914L EQU * 34236+* 34237+* write a comment indicating what REPINS does (in case NOGEN in effect) 34238+* 34239+*,// REPINS: do 50 times: 34240+* 34241+* MNOTE requires that ' is doubled for expanded variables 34242+* thus build &MASTR as a copy of '&ARGS with ' doubled 34243+* 34244+* 34245+*,// LR R2,R1 34246+* 34247+* finally generate code: &ICNT copies of &CODE &ARGS 34248+* 0167E6 1821 34249+ LR R2,R1 0167E8 1821 34250+ LR R2,R1 0167EA 1821 34251+ LR R2,R1 0167EC 1821 34252+ LR R2,R1 0167EE 1821 34253+ LR R2,R1 0167F0 1821 34254+ LR R2,R1 0167F2 1821 34255+ LR R2,R1 0167F4 1821 34256+ LR R2,R1 0167F6 1821 34257+ LR R2,R1 0167F8 1821 34258+ LR R2,R1 0167FA 1821 34259+ LR R2,R1 0167FC 1821 34260+ LR R2,R1 0167FE 1821 34261+ LR R2,R1 016800 1821 34262+ LR R2,R1 016802 1821 34263+ LR R2,R1 016804 1821 34264+ LR R2,R1 016806 1821 34265+ LR R2,R1 016808 1821 34266+ LR R2,R1 01680A 1821 34267+ LR R2,R1 01680C 1821 34268+ LR R2,R1 01680E 1821 34269+ LR R2,R1 PAGE 626 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016810 1821 34270+ LR R2,R1 016812 1821 34271+ LR R2,R1 016814 1821 34272+ LR R2,R1 016816 1821 34273+ LR R2,R1 016818 1821 34274+ LR R2,R1 01681A 1821 34275+ LR R2,R1 01681C 1821 34276+ LR R2,R1 01681E 1821 34277+ LR R2,R1 016820 1821 34278+ LR R2,R1 016822 1821 34279+ LR R2,R1 016824 1821 34280+ LR R2,R1 016826 1821 34281+ LR R2,R1 016828 1821 34282+ LR R2,R1 01682A 1821 34283+ LR R2,R1 01682C 1821 34284+ LR R2,R1 01682E 1821 34285+ LR R2,R1 016830 1821 34286+ LR R2,R1 016832 1821 34287+ LR R2,R1 016834 1821 34288+ LR R2,R1 016836 1821 34289+ LR R2,R1 016838 1821 34290+ LR R2,R1 01683A 1821 34291+ LR R2,R1 01683C 1821 34292+ LR R2,R1 01683E 1821 34293+ LR R2,R1 016840 1821 34294+ LR R2,R1 016842 1821 34295+ LR R2,R1 016844 1821 34296+ LR R2,R1 016846 1821 34297+ LR R2,R1 016848 1821 34298+ LR R2,R1 34299+* 01684A 06FB 34300 BCTR R15,R11 34301 TSIMRET 01684C 58F0 C098 16860 34302+ L R15,=A(SAVETST) R15 := current save area 016850 58DF 0004 00004 34303+ L R13,4(R15) get old save area back 016854 98EC D00C 0000C 34304+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016858 07FE 34305+ BR 14 RETURN 02000000 34306 TSIMEND 016860 34307+ LTORG 016860 00000458 34308 =A(SAVETST) 16864 34309+T914TEND EQU * 34310 * 34311 * Test 915 -- LR R,R (ig=72) ------------------------------- 34312 * 34313 TSIMBEG T915,30000,72,1,C'LR R,R (ig=72)',DIS=1 34314+* 004304 34315+TDSCDAT CSECT 004308 34316+ DS 0D 34317+* 004308 00016868 34318+T915TDSC DC A(T915) // TENTRY 00430C 000000C4 34319+ DC A(T915TEND-T915) // TLENGTH 004310 00007530 34320+ DC F'30000' // TLRCNT 004314 00000048 34321+ DC F'72' // TIGCNT 004318 00000001 34322+ DC F'1' // TLTYPE 001E8B 34323+TEXT CSECT 001E8B E3F9F1F5 34324+SPTR3077 DC C'T915' PAGE 627 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00431C 34325+TDSCDAT CSECT 00431C 34326+ DS 0F 00431C 04001E8B 34327+ DC AL1(L'SPTR3077),AL3(SPTR3077) 001E8F 34328+TEXT CSECT 001E8F D3D940D96BD9404D 34329+SPTR3078 DC C'LR R,R (ig=72)' 004320 34330+TDSCDAT CSECT 004320 34331+ DS 0F 004320 0E001E8F 34332+ DC AL1(L'SPTR3078),AL3(SPTR3078) 34333+* 004D8C 34334+TDSCTBL CSECT 04D8C 34335+T915TPTR EQU * 004D8C 01004308 34336+ DC X'01',AL3(T915TDSC) disabled test 34337+* 016864 34338+TCODE CSECT 016868 34339+ DS 0D ensure double word alignment for test 016868 34340+T915 DS 0H 01650000 016868 90EC D00C 0000C 34341+ STM 14,12,12(13) SAVE REGISTERS 02950000 01686C 18CF 34342+ LR R12,R15 base register := entry address 16868 34343+ USING T915,R12 declare code base register 01686E 41B0 C01E 16886 34344+ LA R11,T915L load loop target to R11 016872 58F0 C0C0 16928 34345+ L R15,=A(SAVETST) R15 := current save area 016876 50DF 0004 00004 34346+ ST R13,4(R15) set back pointer in current save area 01687A 182D 34347+ LR R2,R13 remember callers save area 01687C 18DF 34348+ LR R13,R15 setup current save area 01687E 50D2 0008 00008 34349+ ST R13,8(R2) set forw pointer in callers save area 00000 34350+ USING TDSC,R1 declare TDSC base register 016882 58F0 1008 00008 34351+ L R15,TLRCNT load local repeat count to R15 34352+* 34353 * 34354 T915L REPINS LR,(R2,R1) repeat: LR R2,R1 34355+* 34356+* build from sublist &ALIST a comma separated string &ARGS 34357+* 34358+* 34359+* 34360+* 34361+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 34362+* this allows to transfer the repeat count from last TDSCGEN call 34363+* 34364+* 16886 34365+T915L EQU * 34366+* 34367+* write a comment indicating what REPINS does (in case NOGEN in effect) 34368+* 34369+*,// REPINS: do 72 times: 34370+* 34371+* MNOTE requires that ' is doubled for expanded variables 34372+* thus build &MASTR as a copy of '&ARGS with ' doubled 34373+* 34374+* 34375+*,// LR R2,R1 34376+* 34377+* finally generate code: &ICNT copies of &CODE &ARGS 34378+* 016886 1821 34379+ LR R2,R1 PAGE 628 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016888 1821 34380+ LR R2,R1 01688A 1821 34381+ LR R2,R1 01688C 1821 34382+ LR R2,R1 01688E 1821 34383+ LR R2,R1 016890 1821 34384+ LR R2,R1 016892 1821 34385+ LR R2,R1 016894 1821 34386+ LR R2,R1 016896 1821 34387+ LR R2,R1 016898 1821 34388+ LR R2,R1 01689A 1821 34389+ LR R2,R1 01689C 1821 34390+ LR R2,R1 01689E 1821 34391+ LR R2,R1 0168A0 1821 34392+ LR R2,R1 0168A2 1821 34393+ LR R2,R1 0168A4 1821 34394+ LR R2,R1 0168A6 1821 34395+ LR R2,R1 0168A8 1821 34396+ LR R2,R1 0168AA 1821 34397+ LR R2,R1 0168AC 1821 34398+ LR R2,R1 0168AE 1821 34399+ LR R2,R1 0168B0 1821 34400+ LR R2,R1 0168B2 1821 34401+ LR R2,R1 0168B4 1821 34402+ LR R2,R1 0168B6 1821 34403+ LR R2,R1 0168B8 1821 34404+ LR R2,R1 0168BA 1821 34405+ LR R2,R1 0168BC 1821 34406+ LR R2,R1 0168BE 1821 34407+ LR R2,R1 0168C0 1821 34408+ LR R2,R1 0168C2 1821 34409+ LR R2,R1 0168C4 1821 34410+ LR R2,R1 0168C6 1821 34411+ LR R2,R1 0168C8 1821 34412+ LR R2,R1 0168CA 1821 34413+ LR R2,R1 0168CC 1821 34414+ LR R2,R1 0168CE 1821 34415+ LR R2,R1 0168D0 1821 34416+ LR R2,R1 0168D2 1821 34417+ LR R2,R1 0168D4 1821 34418+ LR R2,R1 0168D6 1821 34419+ LR R2,R1 0168D8 1821 34420+ LR R2,R1 0168DA 1821 34421+ LR R2,R1 0168DC 1821 34422+ LR R2,R1 0168DE 1821 34423+ LR R2,R1 0168E0 1821 34424+ LR R2,R1 0168E2 1821 34425+ LR R2,R1 0168E4 1821 34426+ LR R2,R1 0168E6 1821 34427+ LR R2,R1 0168E8 1821 34428+ LR R2,R1 0168EA 1821 34429+ LR R2,R1 0168EC 1821 34430+ LR R2,R1 0168EE 1821 34431+ LR R2,R1 0168F0 1821 34432+ LR R2,R1 0168F2 1821 34433+ LR R2,R1 0168F4 1821 34434+ LR R2,R1 PAGE 629 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0168F6 1821 34435+ LR R2,R1 0168F8 1821 34436+ LR R2,R1 0168FA 1821 34437+ LR R2,R1 0168FC 1821 34438+ LR R2,R1 0168FE 1821 34439+ LR R2,R1 016900 1821 34440+ LR R2,R1 016902 1821 34441+ LR R2,R1 016904 1821 34442+ LR R2,R1 016906 1821 34443+ LR R2,R1 016908 1821 34444+ LR R2,R1 01690A 1821 34445+ LR R2,R1 01690C 1821 34446+ LR R2,R1 01690E 1821 34447+ LR R2,R1 016910 1821 34448+ LR R2,R1 016912 1821 34449+ LR R2,R1 016914 1821 34450+ LR R2,R1 34451+* 016916 06FB 34452 BCTR R15,R11 34453 TSIMRET 016918 58F0 C0C0 16928 34454+ L R15,=A(SAVETST) R15 := current save area 01691C 58DF 0004 00004 34455+ L R13,4(R15) get old save area back 016920 98EC D00C 0000C 34456+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016924 07FE 34457+ BR 14 RETURN 02000000 34458 TSIMEND 016928 34459+ LTORG 016928 00000458 34460 =A(SAVETST) 1692C 34461+T915TEND EQU * 34462 * 34463 * Test 92x -- L R,m count tests ============================ 34464 * 34465 * Test 920 -- L R,m (ig=1) --------------------------------- 34466 * 34467 TSIMBEG T920,300000,1,1,C'L R,m (ig=1)' 34468+* 004324 34469+TDSCDAT CSECT 004328 34470+ DS 0D 34471+* 004328 00016930 34472+T920TDSC DC A(T920) // TENTRY 00432C 00000040 34473+ DC A(T920TEND-T920) // TLENGTH 004330 000493E0 34474+ DC F'300000' // TLRCNT 004334 00000001 34475+ DC F'1' // TIGCNT 004338 00000001 34476+ DC F'1' // TLTYPE 001E9D 34477+TEXT CSECT 001E9D E3F9F2F0 34478+SPTR3089 DC C'T920' 00433C 34479+TDSCDAT CSECT 00433C 34480+ DS 0F 00433C 04001E9D 34481+ DC AL1(L'SPTR3089),AL3(SPTR3089) 001EA1 34482+TEXT CSECT 001EA1 D340D96B94404D89 34483+SPTR3090 DC C'L R,m (ig=1)' 004340 34484+TDSCDAT CSECT 004340 34485+ DS 0F 004340 0C001EA1 34486+ DC AL1(L'SPTR3090),AL3(SPTR3090) 34487+* 004D90 34488+TDSCTBL CSECT 04D90 34489+T920TPTR EQU * PAGE 630 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004D90 00004328 34490+ DC A(T920TDSC) enabled test 34491+* 01692C 34492+TCODE CSECT 016930 34493+ DS 0D ensure double word alignment for test 016930 34494+T920 DS 0H 01650000 016930 90EC D00C 0000C 34495+ STM 14,12,12(13) SAVE REGISTERS 02950000 016934 18CF 34496+ LR R12,R15 base register := entry address 16930 34497+ USING T920,R12 declare code base register 016936 41B0 C01E 1694E 34498+ LA R11,T920L load loop target to R11 01693A 58F0 C038 16968 34499+ L R15,=A(SAVETST) R15 := current save area 01693E 50DF 0004 00004 34500+ ST R13,4(R15) set back pointer in current save area 016942 182D 34501+ LR R2,R13 remember callers save area 016944 18DF 34502+ LR R13,R15 setup current save area 016946 50D2 0008 00008 34503+ ST R13,8(R2) set forw pointer in callers save area 00000 34504+ USING TDSC,R1 declare TDSC base register 01694A 58F0 1008 00008 34505+ L R15,TLRCNT load local repeat count to R15 34506+* 34507 * 34508 T920L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 34509+* 34510+* build from sublist &ALIST a comma separated string &ARGS 34511+* 34512+* 34513+* 34514+* 34515+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 34516+* this allows to transfer the repeat count from last TDSCGEN call 34517+* 34518+* 1694E 34519+T920L EQU * 34520+* 34521+* write a comment indicating what REPINS does (in case NOGEN in effect) 34522+* 34523+*,// REPINS: do 1 times: 34524+* 34525+* MNOTE requires that ' is doubled for expanded variables 34526+* thus build &MASTR as a copy of '&ARGS with ' doubled 34527+* 34528+* 34529+*,// L R2,=F'123' 34530+* 34531+* finally generate code: &ICNT copies of &CODE &ARGS 34532+* 01694E 5820 C03C 1696C 34533+ L R2,=F'123' 34534+* 016952 06FB 34535 BCTR R15,R11 34536 TSIMRET 016954 58F0 C038 16968 34537+ L R15,=A(SAVETST) R15 := current save area 016958 58DF 0004 00004 34538+ L R13,4(R15) get old save area back 01695C 98EC D00C 0000C 34539+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016960 07FE 34540+ BR 14 RETURN 02000000 34541 TSIMEND 016968 34542+ LTORG 016968 00000458 34543 =A(SAVETST) 01696C 0000007B 34544 =F'123' PAGE 631 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 16970 34545+T920TEND EQU * 34546 * 34547 * Test 921 -- L R,m (ig=2) --------------------------------- 34548 * 34549 TSIMBEG T921,250000,2,1,C'L R,m (ig=2)',DIS=1 34550+* 004344 34551+TDSCDAT CSECT 004348 34552+ DS 0D 34553+* 004348 00016970 34554+T921TDSC DC A(T921) // TENTRY 00434C 00000040 34555+ DC A(T921TEND-T921) // TLENGTH 004350 0003D090 34556+ DC F'250000' // TLRCNT 004354 00000002 34557+ DC F'2' // TIGCNT 004358 00000001 34558+ DC F'1' // TLTYPE 001EAD 34559+TEXT CSECT 001EAD E3F9F2F1 34560+SPTR3101 DC C'T921' 00435C 34561+TDSCDAT CSECT 00435C 34562+ DS 0F 00435C 04001EAD 34563+ DC AL1(L'SPTR3101),AL3(SPTR3101) 001EB1 34564+TEXT CSECT 001EB1 D340D96B94404D89 34565+SPTR3102 DC C'L R,m (ig=2)' 004360 34566+TDSCDAT CSECT 004360 34567+ DS 0F 004360 0C001EB1 34568+ DC AL1(L'SPTR3102),AL3(SPTR3102) 34569+* 004D94 34570+TDSCTBL CSECT 04D94 34571+T921TPTR EQU * 004D94 01004348 34572+ DC X'01',AL3(T921TDSC) disabled test 34573+* 016970 34574+TCODE CSECT 016970 34575+ DS 0D ensure double word alignment for test 016970 34576+T921 DS 0H 01650000 016970 90EC D00C 0000C 34577+ STM 14,12,12(13) SAVE REGISTERS 02950000 016974 18CF 34578+ LR R12,R15 base register := entry address 16970 34579+ USING T921,R12 declare code base register 016976 41B0 C01E 1698E 34580+ LA R11,T921L load loop target to R11 01697A 58F0 C038 169A8 34581+ L R15,=A(SAVETST) R15 := current save area 01697E 50DF 0004 00004 34582+ ST R13,4(R15) set back pointer in current save area 016982 182D 34583+ LR R2,R13 remember callers save area 016984 18DF 34584+ LR R13,R15 setup current save area 016986 50D2 0008 00008 34585+ ST R13,8(R2) set forw pointer in callers save area 00000 34586+ USING TDSC,R1 declare TDSC base register 01698A 58F0 1008 00008 34587+ L R15,TLRCNT load local repeat count to R15 34588+* 34589 * 34590 T921L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 34591+* 34592+* build from sublist &ALIST a comma separated string &ARGS 34593+* 34594+* 34595+* 34596+* 34597+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 34598+* this allows to transfer the repeat count from last TDSCGEN call 34599+* PAGE 632 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 34600+* 1698E 34601+T921L EQU * 34602+* 34603+* write a comment indicating what REPINS does (in case NOGEN in effect) 34604+* 34605+*,// REPINS: do 2 times: 34606+* 34607+* MNOTE requires that ' is doubled for expanded variables 34608+* thus build &MASTR as a copy of '&ARGS with ' doubled 34609+* 34610+* 34611+*,// L R2,=F'123' 34612+* 34613+* finally generate code: &ICNT copies of &CODE &ARGS 34614+* 01698E 5820 C03C 169AC 34615+ L R2,=F'123' 016992 5820 C03C 169AC 34616+ L R2,=F'123' 34617+* 016996 06FB 34618 BCTR R15,R11 34619 TSIMRET 016998 58F0 C038 169A8 34620+ L R15,=A(SAVETST) R15 := current save area 01699C 58DF 0004 00004 34621+ L R13,4(R15) get old save area back 0169A0 98EC D00C 0000C 34622+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0169A4 07FE 34623+ BR 14 RETURN 02000000 34624 TSIMEND 0169A8 34625+ LTORG 0169A8 00000458 34626 =A(SAVETST) 0169AC 0000007B 34627 =F'123' 169B0 34628+T921TEND EQU * 34629 * 34630 * Test 922 -- L R,m (ig=3) --------------------------------- 34631 * 34632 TSIMBEG T922,200000,3,1,C'L R,m (ig=3)',DIS=1 34633+* 004364 34634+TDSCDAT CSECT 004368 34635+ DS 0D 34636+* 004368 000169B0 34637+T922TDSC DC A(T922) // TENTRY 00436C 00000048 34638+ DC A(T922TEND-T922) // TLENGTH 004370 00030D40 34639+ DC F'200000' // TLRCNT 004374 00000003 34640+ DC F'3' // TIGCNT 004378 00000001 34641+ DC F'1' // TLTYPE 001EBD 34642+TEXT CSECT 001EBD E3F9F2F2 34643+SPTR3113 DC C'T922' 00437C 34644+TDSCDAT CSECT 00437C 34645+ DS 0F 00437C 04001EBD 34646+ DC AL1(L'SPTR3113),AL3(SPTR3113) 001EC1 34647+TEXT CSECT 001EC1 D340D96B94404D89 34648+SPTR3114 DC C'L R,m (ig=3)' 004380 34649+TDSCDAT CSECT 004380 34650+ DS 0F 004380 0C001EC1 34651+ DC AL1(L'SPTR3114),AL3(SPTR3114) 34652+* 004D98 34653+TDSCTBL CSECT 04D98 34654+T922TPTR EQU * PAGE 633 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004D98 01004368 34655+ DC X'01',AL3(T922TDSC) disabled test 34656+* 0169B0 34657+TCODE CSECT 0169B0 34658+ DS 0D ensure double word alignment for test 0169B0 34659+T922 DS 0H 01650000 0169B0 90EC D00C 0000C 34660+ STM 14,12,12(13) SAVE REGISTERS 02950000 0169B4 18CF 34661+ LR R12,R15 base register := entry address 169B0 34662+ USING T922,R12 declare code base register 0169B6 41B0 C01E 169CE 34663+ LA R11,T922L load loop target to R11 0169BA 58F0 C040 169F0 34664+ L R15,=A(SAVETST) R15 := current save area 0169BE 50DF 0004 00004 34665+ ST R13,4(R15) set back pointer in current save area 0169C2 182D 34666+ LR R2,R13 remember callers save area 0169C4 18DF 34667+ LR R13,R15 setup current save area 0169C6 50D2 0008 00008 34668+ ST R13,8(R2) set forw pointer in callers save area 00000 34669+ USING TDSC,R1 declare TDSC base register 0169CA 58F0 1008 00008 34670+ L R15,TLRCNT load local repeat count to R15 34671+* 34672 * 34673 T922L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 34674+* 34675+* build from sublist &ALIST a comma separated string &ARGS 34676+* 34677+* 34678+* 34679+* 34680+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 34681+* this allows to transfer the repeat count from last TDSCGEN call 34682+* 34683+* 169CE 34684+T922L EQU * 34685+* 34686+* write a comment indicating what REPINS does (in case NOGEN in effect) 34687+* 34688+*,// REPINS: do 3 times: 34689+* 34690+* MNOTE requires that ' is doubled for expanded variables 34691+* thus build &MASTR as a copy of '&ARGS with ' doubled 34692+* 34693+* 34694+*,// L R2,=F'123' 34695+* 34696+* finally generate code: &ICNT copies of &CODE &ARGS 34697+* 0169CE 5820 C044 169F4 34698+ L R2,=F'123' 0169D2 5820 C044 169F4 34699+ L R2,=F'123' 0169D6 5820 C044 169F4 34700+ L R2,=F'123' 34701+* 0169DA 06FB 34702 BCTR R15,R11 34703 TSIMRET 0169DC 58F0 C040 169F0 34704+ L R15,=A(SAVETST) R15 := current save area 0169E0 58DF 0004 00004 34705+ L R13,4(R15) get old save area back 0169E4 98EC D00C 0000C 34706+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0169E8 07FE 34707+ BR 14 RETURN 02000000 34708 TSIMEND 0169F0 34709+ LTORG PAGE 634 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0169F0 00000458 34710 =A(SAVETST) 0169F4 0000007B 34711 =F'123' 169F8 34712+T922TEND EQU * 34713 * 34714 * Test 923 -- L R,m (ig=4) --------------------------------- 34715 * 34716 TSIMBEG T923,100000,4,1,C'L R,m (ig=4)',DIS=1 34717+* 004384 34718+TDSCDAT CSECT 004388 34719+ DS 0D 34720+* 004388 000169F8 34721+T923TDSC DC A(T923) // TENTRY 00438C 00000048 34722+ DC A(T923TEND-T923) // TLENGTH 004390 000186A0 34723+ DC F'100000' // TLRCNT 004394 00000004 34724+ DC F'4' // TIGCNT 004398 00000001 34725+ DC F'1' // TLTYPE 001ECD 34726+TEXT CSECT 001ECD E3F9F2F3 34727+SPTR3125 DC C'T923' 00439C 34728+TDSCDAT CSECT 00439C 34729+ DS 0F 00439C 04001ECD 34730+ DC AL1(L'SPTR3125),AL3(SPTR3125) 001ED1 34731+TEXT CSECT 001ED1 D340D96B94404D89 34732+SPTR3126 DC C'L R,m (ig=4)' 0043A0 34733+TDSCDAT CSECT 0043A0 34734+ DS 0F 0043A0 0C001ED1 34735+ DC AL1(L'SPTR3126),AL3(SPTR3126) 34736+* 004D9C 34737+TDSCTBL CSECT 04D9C 34738+T923TPTR EQU * 004D9C 01004388 34739+ DC X'01',AL3(T923TDSC) disabled test 34740+* 0169F8 34741+TCODE CSECT 0169F8 34742+ DS 0D ensure double word alignment for test 0169F8 34743+T923 DS 0H 01650000 0169F8 90EC D00C 0000C 34744+ STM 14,12,12(13) SAVE REGISTERS 02950000 0169FC 18CF 34745+ LR R12,R15 base register := entry address 169F8 34746+ USING T923,R12 declare code base register 0169FE 41B0 C01E 16A16 34747+ LA R11,T923L load loop target to R11 016A02 58F0 C040 16A38 34748+ L R15,=A(SAVETST) R15 := current save area 016A06 50DF 0004 00004 34749+ ST R13,4(R15) set back pointer in current save area 016A0A 182D 34750+ LR R2,R13 remember callers save area 016A0C 18DF 34751+ LR R13,R15 setup current save area 016A0E 50D2 0008 00008 34752+ ST R13,8(R2) set forw pointer in callers save area 00000 34753+ USING TDSC,R1 declare TDSC base register 016A12 58F0 1008 00008 34754+ L R15,TLRCNT load local repeat count to R15 34755+* 34756 * 34757 T923L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 34758+* 34759+* build from sublist &ALIST a comma separated string &ARGS 34760+* 34761+* 34762+* 34763+* 34764+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT PAGE 635 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 34765+* this allows to transfer the repeat count from last TDSCGEN call 34766+* 34767+* 16A16 34768+T923L EQU * 34769+* 34770+* write a comment indicating what REPINS does (in case NOGEN in effect) 34771+* 34772+*,// REPINS: do 4 times: 34773+* 34774+* MNOTE requires that ' is doubled for expanded variables 34775+* thus build &MASTR as a copy of '&ARGS with ' doubled 34776+* 34777+* 34778+*,// L R2,=F'123' 34779+* 34780+* finally generate code: &ICNT copies of &CODE &ARGS 34781+* 016A16 5820 C044 16A3C 34782+ L R2,=F'123' 016A1A 5820 C044 16A3C 34783+ L R2,=F'123' 016A1E 5820 C044 16A3C 34784+ L R2,=F'123' 016A22 5820 C044 16A3C 34785+ L R2,=F'123' 34786+* 016A26 06FB 34787 BCTR R15,R11 34788 TSIMRET 016A28 58F0 C040 16A38 34789+ L R15,=A(SAVETST) R15 := current save area 016A2C 58DF 0004 00004 34790+ L R13,4(R15) get old save area back 016A30 98EC D00C 0000C 34791+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016A34 07FE 34792+ BR 14 RETURN 02000000 34793 TSIMEND 016A38 34794+ LTORG 016A38 00000458 34795 =A(SAVETST) 016A3C 0000007B 34796 =F'123' 16A40 34797+T923TEND EQU * 34798 * 34799 * Test 924 -- L R,m (ig=5) --------------------------------- 34800 * 34801 TSIMBEG T924,100000,5,1,C'L R,m (ig=5)',DIS=1 34802+* 0043A4 34803+TDSCDAT CSECT 0043A8 34804+ DS 0D 34805+* 0043A8 00016A40 34806+T924TDSC DC A(T924) // TENTRY 0043AC 00000050 34807+ DC A(T924TEND-T924) // TLENGTH 0043B0 000186A0 34808+ DC F'100000' // TLRCNT 0043B4 00000005 34809+ DC F'5' // TIGCNT 0043B8 00000001 34810+ DC F'1' // TLTYPE 001EDD 34811+TEXT CSECT 001EDD E3F9F2F4 34812+SPTR3137 DC C'T924' 0043BC 34813+TDSCDAT CSECT 0043BC 34814+ DS 0F 0043BC 04001EDD 34815+ DC AL1(L'SPTR3137),AL3(SPTR3137) 001EE1 34816+TEXT CSECT 001EE1 D340D96B94404D89 34817+SPTR3138 DC C'L R,m (ig=5)' 0043C0 34818+TDSCDAT CSECT 0043C0 34819+ DS 0F PAGE 636 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0043C0 0C001EE1 34820+ DC AL1(L'SPTR3138),AL3(SPTR3138) 34821+* 004DA0 34822+TDSCTBL CSECT 04DA0 34823+T924TPTR EQU * 004DA0 010043A8 34824+ DC X'01',AL3(T924TDSC) disabled test 34825+* 016A40 34826+TCODE CSECT 016A40 34827+ DS 0D ensure double word alignment for test 016A40 34828+T924 DS 0H 01650000 016A40 90EC D00C 0000C 34829+ STM 14,12,12(13) SAVE REGISTERS 02950000 016A44 18CF 34830+ LR R12,R15 base register := entry address 16A40 34831+ USING T924,R12 declare code base register 016A46 41B0 C01E 16A5E 34832+ LA R11,T924L load loop target to R11 016A4A 58F0 C048 16A88 34833+ L R15,=A(SAVETST) R15 := current save area 016A4E 50DF 0004 00004 34834+ ST R13,4(R15) set back pointer in current save area 016A52 182D 34835+ LR R2,R13 remember callers save area 016A54 18DF 34836+ LR R13,R15 setup current save area 016A56 50D2 0008 00008 34837+ ST R13,8(R2) set forw pointer in callers save area 00000 34838+ USING TDSC,R1 declare TDSC base register 016A5A 58F0 1008 00008 34839+ L R15,TLRCNT load local repeat count to R15 34840+* 34841 * 34842 T924L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 34843+* 34844+* build from sublist &ALIST a comma separated string &ARGS 34845+* 34846+* 34847+* 34848+* 34849+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 34850+* this allows to transfer the repeat count from last TDSCGEN call 34851+* 34852+* 16A5E 34853+T924L EQU * 34854+* 34855+* write a comment indicating what REPINS does (in case NOGEN in effect) 34856+* 34857+*,// REPINS: do 5 times: 34858+* 34859+* MNOTE requires that ' is doubled for expanded variables 34860+* thus build &MASTR as a copy of '&ARGS with ' doubled 34861+* 34862+* 34863+*,// L R2,=F'123' 34864+* 34865+* finally generate code: &ICNT copies of &CODE &ARGS 34866+* 016A5E 5820 C04C 16A8C 34867+ L R2,=F'123' 016A62 5820 C04C 16A8C 34868+ L R2,=F'123' 016A66 5820 C04C 16A8C 34869+ L R2,=F'123' 016A6A 5820 C04C 16A8C 34870+ L R2,=F'123' 016A6E 5820 C04C 16A8C 34871+ L R2,=F'123' 34872+* 016A72 06FB 34873 BCTR R15,R11 34874 TSIMRET PAGE 637 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016A74 58F0 C048 16A88 34875+ L R15,=A(SAVETST) R15 := current save area 016A78 58DF 0004 00004 34876+ L R13,4(R15) get old save area back 016A7C 98EC D00C 0000C 34877+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016A80 07FE 34878+ BR 14 RETURN 02000000 34879 TSIMEND 016A88 34880+ LTORG 016A88 00000458 34881 =A(SAVETST) 016A8C 0000007B 34882 =F'123' 16A90 34883+T924TEND EQU * 34884 * 34885 * Test 925 -- L R,m (ig=6) --------------------------------- 34886 * 34887 TSIMBEG T925,80000,6,1,C'L R,m (ig=6)',DIS=1 34888+* 0043C4 34889+TDSCDAT CSECT 0043C8 34890+ DS 0D 34891+* 0043C8 00016A90 34892+T925TDSC DC A(T925) // TENTRY 0043CC 00000050 34893+ DC A(T925TEND-T925) // TLENGTH 0043D0 00013880 34894+ DC F'80000' // TLRCNT 0043D4 00000006 34895+ DC F'6' // TIGCNT 0043D8 00000001 34896+ DC F'1' // TLTYPE 001EED 34897+TEXT CSECT 001EED E3F9F2F5 34898+SPTR3149 DC C'T925' 0043DC 34899+TDSCDAT CSECT 0043DC 34900+ DS 0F 0043DC 04001EED 34901+ DC AL1(L'SPTR3149),AL3(SPTR3149) 001EF1 34902+TEXT CSECT 001EF1 D340D96B94404D89 34903+SPTR3150 DC C'L R,m (ig=6)' 0043E0 34904+TDSCDAT CSECT 0043E0 34905+ DS 0F 0043E0 0C001EF1 34906+ DC AL1(L'SPTR3150),AL3(SPTR3150) 34907+* 004DA4 34908+TDSCTBL CSECT 04DA4 34909+T925TPTR EQU * 004DA4 010043C8 34910+ DC X'01',AL3(T925TDSC) disabled test 34911+* 016A90 34912+TCODE CSECT 016A90 34913+ DS 0D ensure double word alignment for test 016A90 34914+T925 DS 0H 01650000 016A90 90EC D00C 0000C 34915+ STM 14,12,12(13) SAVE REGISTERS 02950000 016A94 18CF 34916+ LR R12,R15 base register := entry address 16A90 34917+ USING T925,R12 declare code base register 016A96 41B0 C01E 16AAE 34918+ LA R11,T925L load loop target to R11 016A9A 58F0 C048 16AD8 34919+ L R15,=A(SAVETST) R15 := current save area 016A9E 50DF 0004 00004 34920+ ST R13,4(R15) set back pointer in current save area 016AA2 182D 34921+ LR R2,R13 remember callers save area 016AA4 18DF 34922+ LR R13,R15 setup current save area 016AA6 50D2 0008 00008 34923+ ST R13,8(R2) set forw pointer in callers save area 00000 34924+ USING TDSC,R1 declare TDSC base register 016AAA 58F0 1008 00008 34925+ L R15,TLRCNT load local repeat count to R15 34926+* 34927 * 34928 T925L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 34929+* PAGE 638 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 34930+* build from sublist &ALIST a comma separated string &ARGS 34931+* 34932+* 34933+* 34934+* 34935+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 34936+* this allows to transfer the repeat count from last TDSCGEN call 34937+* 34938+* 16AAE 34939+T925L EQU * 34940+* 34941+* write a comment indicating what REPINS does (in case NOGEN in effect) 34942+* 34943+*,// REPINS: do 6 times: 34944+* 34945+* MNOTE requires that ' is doubled for expanded variables 34946+* thus build &MASTR as a copy of '&ARGS with ' doubled 34947+* 34948+* 34949+*,// L R2,=F'123' 34950+* 34951+* finally generate code: &ICNT copies of &CODE &ARGS 34952+* 016AAE 5820 C04C 16ADC 34953+ L R2,=F'123' 016AB2 5820 C04C 16ADC 34954+ L R2,=F'123' 016AB6 5820 C04C 16ADC 34955+ L R2,=F'123' 016ABA 5820 C04C 16ADC 34956+ L R2,=F'123' 016ABE 5820 C04C 16ADC 34957+ L R2,=F'123' 016AC2 5820 C04C 16ADC 34958+ L R2,=F'123' 34959+* 016AC6 06FB 34960 BCTR R15,R11 34961 TSIMRET 016AC8 58F0 C048 16AD8 34962+ L R15,=A(SAVETST) R15 := current save area 016ACC 58DF 0004 00004 34963+ L R13,4(R15) get old save area back 016AD0 98EC D00C 0000C 34964+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016AD4 07FE 34965+ BR 14 RETURN 02000000 34966 TSIMEND 016AD8 34967+ LTORG 016AD8 00000458 34968 =A(SAVETST) 016ADC 0000007B 34969 =F'123' 16AE0 34970+T925TEND EQU * 34971 * 34972 * Test 926 -- L R,m (ig=7) --------------------------------- 34973 * 34974 TSIMBEG T926,70000,7,1,C'L R,m (ig=7)',DIS=1 34975+* 0043E4 34976+TDSCDAT CSECT 0043E8 34977+ DS 0D 34978+* 0043E8 00016AE0 34979+T926TDSC DC A(T926) // TENTRY 0043EC 00000058 34980+ DC A(T926TEND-T926) // TLENGTH 0043F0 00011170 34981+ DC F'70000' // TLRCNT 0043F4 00000007 34982+ DC F'7' // TIGCNT 0043F8 00000001 34983+ DC F'1' // TLTYPE 001EFD 34984+TEXT CSECT PAGE 639 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 001EFD E3F9F2F6 34985+SPTR3161 DC C'T926' 0043FC 34986+TDSCDAT CSECT 0043FC 34987+ DS 0F 0043FC 04001EFD 34988+ DC AL1(L'SPTR3161),AL3(SPTR3161) 001F01 34989+TEXT CSECT 001F01 D340D96B94404D89 34990+SPTR3162 DC C'L R,m (ig=7)' 004400 34991+TDSCDAT CSECT 004400 34992+ DS 0F 004400 0C001F01 34993+ DC AL1(L'SPTR3162),AL3(SPTR3162) 34994+* 004DA8 34995+TDSCTBL CSECT 04DA8 34996+T926TPTR EQU * 004DA8 010043E8 34997+ DC X'01',AL3(T926TDSC) disabled test 34998+* 016AE0 34999+TCODE CSECT 016AE0 35000+ DS 0D ensure double word alignment for test 016AE0 35001+T926 DS 0H 01650000 016AE0 90EC D00C 0000C 35002+ STM 14,12,12(13) SAVE REGISTERS 02950000 016AE4 18CF 35003+ LR R12,R15 base register := entry address 16AE0 35004+ USING T926,R12 declare code base register 016AE6 41B0 C01E 16AFE 35005+ LA R11,T926L load loop target to R11 016AEA 58F0 C050 16B30 35006+ L R15,=A(SAVETST) R15 := current save area 016AEE 50DF 0004 00004 35007+ ST R13,4(R15) set back pointer in current save area 016AF2 182D 35008+ LR R2,R13 remember callers save area 016AF4 18DF 35009+ LR R13,R15 setup current save area 016AF6 50D2 0008 00008 35010+ ST R13,8(R2) set forw pointer in callers save area 00000 35011+ USING TDSC,R1 declare TDSC base register 016AFA 58F0 1008 00008 35012+ L R15,TLRCNT load local repeat count to R15 35013+* 35014 * 35015 T926L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 35016+* 35017+* build from sublist &ALIST a comma separated string &ARGS 35018+* 35019+* 35020+* 35021+* 35022+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 35023+* this allows to transfer the repeat count from last TDSCGEN call 35024+* 35025+* 16AFE 35026+T926L EQU * 35027+* 35028+* write a comment indicating what REPINS does (in case NOGEN in effect) 35029+* 35030+*,// REPINS: do 7 times: 35031+* 35032+* MNOTE requires that ' is doubled for expanded variables 35033+* thus build &MASTR as a copy of '&ARGS with ' doubled 35034+* 35035+* 35036+*,// L R2,=F'123' 35037+* 35038+* finally generate code: &ICNT copies of &CODE &ARGS 35039+* PAGE 640 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016AFE 5820 C054 16B34 35040+ L R2,=F'123' 016B02 5820 C054 16B34 35041+ L R2,=F'123' 016B06 5820 C054 16B34 35042+ L R2,=F'123' 016B0A 5820 C054 16B34 35043+ L R2,=F'123' 016B0E 5820 C054 16B34 35044+ L R2,=F'123' 016B12 5820 C054 16B34 35045+ L R2,=F'123' 016B16 5820 C054 16B34 35046+ L R2,=F'123' 35047+* 016B1A 06FB 35048 BCTR R15,R11 35049 TSIMRET 016B1C 58F0 C050 16B30 35050+ L R15,=A(SAVETST) R15 := current save area 016B20 58DF 0004 00004 35051+ L R13,4(R15) get old save area back 016B24 98EC D00C 0000C 35052+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016B28 07FE 35053+ BR 14 RETURN 02000000 35054 TSIMEND 016B30 35055+ LTORG 016B30 00000458 35056 =A(SAVETST) 016B34 0000007B 35057 =F'123' 16B38 35058+T926TEND EQU * 35059 * 35060 * Test 927 -- L R,m (ig=8) --------------------------------- 35061 * 35062 TSIMBEG T927,70000,8,1,C'L R,m (ig=8)',DIS=1 35063+* 004404 35064+TDSCDAT CSECT 004408 35065+ DS 0D 35066+* 004408 00016B38 35067+T927TDSC DC A(T927) // TENTRY 00440C 00000058 35068+ DC A(T927TEND-T927) // TLENGTH 004410 00011170 35069+ DC F'70000' // TLRCNT 004414 00000008 35070+ DC F'8' // TIGCNT 004418 00000001 35071+ DC F'1' // TLTYPE 001F0D 35072+TEXT CSECT 001F0D E3F9F2F7 35073+SPTR3173 DC C'T927' 00441C 35074+TDSCDAT CSECT 00441C 35075+ DS 0F 00441C 04001F0D 35076+ DC AL1(L'SPTR3173),AL3(SPTR3173) 001F11 35077+TEXT CSECT 001F11 D340D96B94404D89 35078+SPTR3174 DC C'L R,m (ig=8)' 004420 35079+TDSCDAT CSECT 004420 35080+ DS 0F 004420 0C001F11 35081+ DC AL1(L'SPTR3174),AL3(SPTR3174) 35082+* 004DAC 35083+TDSCTBL CSECT 04DAC 35084+T927TPTR EQU * 004DAC 01004408 35085+ DC X'01',AL3(T927TDSC) disabled test 35086+* 016B38 35087+TCODE CSECT 016B38 35088+ DS 0D ensure double word alignment for test 016B38 35089+T927 DS 0H 01650000 016B38 90EC D00C 0000C 35090+ STM 14,12,12(13) SAVE REGISTERS 02950000 016B3C 18CF 35091+ LR R12,R15 base register := entry address 16B38 35092+ USING T927,R12 declare code base register 016B3E 41B0 C01E 16B56 35093+ LA R11,T927L load loop target to R11 016B42 58F0 C050 16B88 35094+ L R15,=A(SAVETST) R15 := current save area PAGE 641 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016B46 50DF 0004 00004 35095+ ST R13,4(R15) set back pointer in current save area 016B4A 182D 35096+ LR R2,R13 remember callers save area 016B4C 18DF 35097+ LR R13,R15 setup current save area 016B4E 50D2 0008 00008 35098+ ST R13,8(R2) set forw pointer in callers save area 00000 35099+ USING TDSC,R1 declare TDSC base register 016B52 58F0 1008 00008 35100+ L R15,TLRCNT load local repeat count to R15 35101+* 35102 * 35103 T927L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 35104+* 35105+* build from sublist &ALIST a comma separated string &ARGS 35106+* 35107+* 35108+* 35109+* 35110+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 35111+* this allows to transfer the repeat count from last TDSCGEN call 35112+* 35113+* 16B56 35114+T927L EQU * 35115+* 35116+* write a comment indicating what REPINS does (in case NOGEN in effect) 35117+* 35118+*,// REPINS: do 8 times: 35119+* 35120+* MNOTE requires that ' is doubled for expanded variables 35121+* thus build &MASTR as a copy of '&ARGS with ' doubled 35122+* 35123+* 35124+*,// L R2,=F'123' 35125+* 35126+* finally generate code: &ICNT copies of &CODE &ARGS 35127+* 016B56 5820 C054 16B8C 35128+ L R2,=F'123' 016B5A 5820 C054 16B8C 35129+ L R2,=F'123' 016B5E 5820 C054 16B8C 35130+ L R2,=F'123' 016B62 5820 C054 16B8C 35131+ L R2,=F'123' 016B66 5820 C054 16B8C 35132+ L R2,=F'123' 016B6A 5820 C054 16B8C 35133+ L R2,=F'123' 016B6E 5820 C054 16B8C 35134+ L R2,=F'123' 016B72 5820 C054 16B8C 35135+ L R2,=F'123' 35136+* 016B76 06FB 35137 BCTR R15,R11 35138 TSIMRET 016B78 58F0 C050 16B88 35139+ L R15,=A(SAVETST) R15 := current save area 016B7C 58DF 0004 00004 35140+ L R13,4(R15) get old save area back 016B80 98EC D00C 0000C 35141+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016B84 07FE 35142+ BR 14 RETURN 02000000 35143 TSIMEND 016B88 35144+ LTORG 016B88 00000458 35145 =A(SAVETST) 016B8C 0000007B 35146 =F'123' 16B90 35147+T927TEND EQU * 35148 * 35149 * Test 928 -- L R,m (ig=9) --------------------------------- PAGE 642 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 35150 * 35151 TSIMBEG T928,70000,9,1,C'L R,m (ig=9)',DIS=1 35152+* 004424 35153+TDSCDAT CSECT 004428 35154+ DS 0D 35155+* 004428 00016B90 35156+T928TDSC DC A(T928) // TENTRY 00442C 00000060 35157+ DC A(T928TEND-T928) // TLENGTH 004430 00011170 35158+ DC F'70000' // TLRCNT 004434 00000009 35159+ DC F'9' // TIGCNT 004438 00000001 35160+ DC F'1' // TLTYPE 001F1D 35161+TEXT CSECT 001F1D E3F9F2F8 35162+SPTR3185 DC C'T928' 00443C 35163+TDSCDAT CSECT 00443C 35164+ DS 0F 00443C 04001F1D 35165+ DC AL1(L'SPTR3185),AL3(SPTR3185) 001F21 35166+TEXT CSECT 001F21 D340D96B94404D89 35167+SPTR3186 DC C'L R,m (ig=9)' 004440 35168+TDSCDAT CSECT 004440 35169+ DS 0F 004440 0C001F21 35170+ DC AL1(L'SPTR3186),AL3(SPTR3186) 35171+* 004DB0 35172+TDSCTBL CSECT 04DB0 35173+T928TPTR EQU * 004DB0 01004428 35174+ DC X'01',AL3(T928TDSC) disabled test 35175+* 016B90 35176+TCODE CSECT 016B90 35177+ DS 0D ensure double word alignment for test 016B90 35178+T928 DS 0H 01650000 016B90 90EC D00C 0000C 35179+ STM 14,12,12(13) SAVE REGISTERS 02950000 016B94 18CF 35180+ LR R12,R15 base register := entry address 16B90 35181+ USING T928,R12 declare code base register 016B96 41B0 C01E 16BAE 35182+ LA R11,T928L load loop target to R11 016B9A 58F0 C058 16BE8 35183+ L R15,=A(SAVETST) R15 := current save area 016B9E 50DF 0004 00004 35184+ ST R13,4(R15) set back pointer in current save area 016BA2 182D 35185+ LR R2,R13 remember callers save area 016BA4 18DF 35186+ LR R13,R15 setup current save area 016BA6 50D2 0008 00008 35187+ ST R13,8(R2) set forw pointer in callers save area 00000 35188+ USING TDSC,R1 declare TDSC base register 016BAA 58F0 1008 00008 35189+ L R15,TLRCNT load local repeat count to R15 35190+* 35191 * 35192 T928L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 35193+* 35194+* build from sublist &ALIST a comma separated string &ARGS 35195+* 35196+* 35197+* 35198+* 35199+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 35200+* this allows to transfer the repeat count from last TDSCGEN call 35201+* 35202+* 16BAE 35203+T928L EQU * 35204+* PAGE 643 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 35205+* write a comment indicating what REPINS does (in case NOGEN in effect) 35206+* 35207+*,// REPINS: do 9 times: 35208+* 35209+* MNOTE requires that ' is doubled for expanded variables 35210+* thus build &MASTR as a copy of '&ARGS with ' doubled 35211+* 35212+* 35213+*,// L R2,=F'123' 35214+* 35215+* finally generate code: &ICNT copies of &CODE &ARGS 35216+* 016BAE 5820 C05C 16BEC 35217+ L R2,=F'123' 016BB2 5820 C05C 16BEC 35218+ L R2,=F'123' 016BB6 5820 C05C 16BEC 35219+ L R2,=F'123' 016BBA 5820 C05C 16BEC 35220+ L R2,=F'123' 016BBE 5820 C05C 16BEC 35221+ L R2,=F'123' 016BC2 5820 C05C 16BEC 35222+ L R2,=F'123' 016BC6 5820 C05C 16BEC 35223+ L R2,=F'123' 016BCA 5820 C05C 16BEC 35224+ L R2,=F'123' 016BCE 5820 C05C 16BEC 35225+ L R2,=F'123' 35226+* 016BD2 06FB 35227 BCTR R15,R11 35228 TSIMRET 016BD4 58F0 C058 16BE8 35229+ L R15,=A(SAVETST) R15 := current save area 016BD8 58DF 0004 00004 35230+ L R13,4(R15) get old save area back 016BDC 98EC D00C 0000C 35231+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016BE0 07FE 35232+ BR 14 RETURN 02000000 35233 TSIMEND 016BE8 35234+ LTORG 016BE8 00000458 35235 =A(SAVETST) 016BEC 0000007B 35236 =F'123' 16BF0 35237+T928TEND EQU * 35238 * 35239 * Test 929 -- L R,m (ig=10) -------------------------------- 35240 * 35241 TSIMBEG T929,70000,10,1,C'L R,m (ig=10)',DIS=1 35242+* 004444 35243+TDSCDAT CSECT 004448 35244+ DS 0D 35245+* 004448 00016BF0 35246+T929TDSC DC A(T929) // TENTRY 00444C 00000060 35247+ DC A(T929TEND-T929) // TLENGTH 004450 00011170 35248+ DC F'70000' // TLRCNT 004454 0000000A 35249+ DC F'10' // TIGCNT 004458 00000001 35250+ DC F'1' // TLTYPE 001F2D 35251+TEXT CSECT 001F2D E3F9F2F9 35252+SPTR3197 DC C'T929' 00445C 35253+TDSCDAT CSECT 00445C 35254+ DS 0F 00445C 04001F2D 35255+ DC AL1(L'SPTR3197),AL3(SPTR3197) 001F31 35256+TEXT CSECT 001F31 D340D96B94404D89 35257+SPTR3198 DC C'L R,m (ig=10)' 004460 35258+TDSCDAT CSECT 004460 35259+ DS 0F PAGE 644 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004460 0D001F31 35260+ DC AL1(L'SPTR3198),AL3(SPTR3198) 35261+* 004DB4 35262+TDSCTBL CSECT 04DB4 35263+T929TPTR EQU * 004DB4 01004448 35264+ DC X'01',AL3(T929TDSC) disabled test 35265+* 016BF0 35266+TCODE CSECT 016BF0 35267+ DS 0D ensure double word alignment for test 016BF0 35268+T929 DS 0H 01650000 016BF0 90EC D00C 0000C 35269+ STM 14,12,12(13) SAVE REGISTERS 02950000 016BF4 18CF 35270+ LR R12,R15 base register := entry address 16BF0 35271+ USING T929,R12 declare code base register 016BF6 41B0 C01E 16C0E 35272+ LA R11,T929L load loop target to R11 016BFA 58F0 C058 16C48 35273+ L R15,=A(SAVETST) R15 := current save area 016BFE 50DF 0004 00004 35274+ ST R13,4(R15) set back pointer in current save area 016C02 182D 35275+ LR R2,R13 remember callers save area 016C04 18DF 35276+ LR R13,R15 setup current save area 016C06 50D2 0008 00008 35277+ ST R13,8(R2) set forw pointer in callers save area 00000 35278+ USING TDSC,R1 declare TDSC base register 016C0A 58F0 1008 00008 35279+ L R15,TLRCNT load local repeat count to R15 35280+* 35281 * 35282 T929L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 35283+* 35284+* build from sublist &ALIST a comma separated string &ARGS 35285+* 35286+* 35287+* 35288+* 35289+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 35290+* this allows to transfer the repeat count from last TDSCGEN call 35291+* 35292+* 16C0E 35293+T929L EQU * 35294+* 35295+* write a comment indicating what REPINS does (in case NOGEN in effect) 35296+* 35297+*,// REPINS: do 10 times: 35298+* 35299+* MNOTE requires that ' is doubled for expanded variables 35300+* thus build &MASTR as a copy of '&ARGS with ' doubled 35301+* 35302+* 35303+*,// L R2,=F'123' 35304+* 35305+* finally generate code: &ICNT copies of &CODE &ARGS 35306+* 016C0E 5820 C05C 16C4C 35307+ L R2,=F'123' 016C12 5820 C05C 16C4C 35308+ L R2,=F'123' 016C16 5820 C05C 16C4C 35309+ L R2,=F'123' 016C1A 5820 C05C 16C4C 35310+ L R2,=F'123' 016C1E 5820 C05C 16C4C 35311+ L R2,=F'123' 016C22 5820 C05C 16C4C 35312+ L R2,=F'123' 016C26 5820 C05C 16C4C 35313+ L R2,=F'123' 016C2A 5820 C05C 16C4C 35314+ L R2,=F'123' PAGE 645 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016C2E 5820 C05C 16C4C 35315+ L R2,=F'123' 016C32 5820 C05C 16C4C 35316+ L R2,=F'123' 35317+* 016C36 06FB 35318 BCTR R15,R11 35319 TSIMRET 016C38 58F0 C058 16C48 35320+ L R15,=A(SAVETST) R15 := current save area 016C3C 58DF 0004 00004 35321+ L R13,4(R15) get old save area back 016C40 98EC D00C 0000C 35322+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016C44 07FE 35323+ BR 14 RETURN 02000000 35324 TSIMEND 016C48 35325+ LTORG 016C48 00000458 35326 =A(SAVETST) 016C4C 0000007B 35327 =F'123' 16C50 35328+T929TEND EQU * 35329 * 35330 * Test 930 -- L R,m (ig=12) -------------------------------- 35331 * 35332 TSIMBEG T930,50000,12,1,C'L R,m (ig=12)',DIS=1 35333+* 004464 35334+TDSCDAT CSECT 004468 35335+ DS 0D 35336+* 004468 00016C50 35337+T930TDSC DC A(T930) // TENTRY 00446C 00000068 35338+ DC A(T930TEND-T930) // TLENGTH 004470 0000C350 35339+ DC F'50000' // TLRCNT 004474 0000000C 35340+ DC F'12' // TIGCNT 004478 00000001 35341+ DC F'1' // TLTYPE 001F3E 35342+TEXT CSECT 001F3E E3F9F3F0 35343+SPTR3209 DC C'T930' 00447C 35344+TDSCDAT CSECT 00447C 35345+ DS 0F 00447C 04001F3E 35346+ DC AL1(L'SPTR3209),AL3(SPTR3209) 001F42 35347+TEXT CSECT 001F42 D340D96B94404D89 35348+SPTR3210 DC C'L R,m (ig=12)' 004480 35349+TDSCDAT CSECT 004480 35350+ DS 0F 004480 0D001F42 35351+ DC AL1(L'SPTR3210),AL3(SPTR3210) 35352+* 004DB8 35353+TDSCTBL CSECT 04DB8 35354+T930TPTR EQU * 004DB8 01004468 35355+ DC X'01',AL3(T930TDSC) disabled test 35356+* 016C50 35357+TCODE CSECT 016C50 35358+ DS 0D ensure double word alignment for test 016C50 35359+T930 DS 0H 01650000 016C50 90EC D00C 0000C 35360+ STM 14,12,12(13) SAVE REGISTERS 02950000 016C54 18CF 35361+ LR R12,R15 base register := entry address 16C50 35362+ USING T930,R12 declare code base register 016C56 41B0 C01E 16C6E 35363+ LA R11,T930L load loop target to R11 016C5A 58F0 C060 16CB0 35364+ L R15,=A(SAVETST) R15 := current save area 016C5E 50DF 0004 00004 35365+ ST R13,4(R15) set back pointer in current save area 016C62 182D 35366+ LR R2,R13 remember callers save area 016C64 18DF 35367+ LR R13,R15 setup current save area 016C66 50D2 0008 00008 35368+ ST R13,8(R2) set forw pointer in callers save area 00000 35369+ USING TDSC,R1 declare TDSC base register PAGE 646 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016C6A 58F0 1008 00008 35370+ L R15,TLRCNT load local repeat count to R15 35371+* 35372 * 35373 T930L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 35374+* 35375+* build from sublist &ALIST a comma separated string &ARGS 35376+* 35377+* 35378+* 35379+* 35380+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 35381+* this allows to transfer the repeat count from last TDSCGEN call 35382+* 35383+* 16C6E 35384+T930L EQU * 35385+* 35386+* write a comment indicating what REPINS does (in case NOGEN in effect) 35387+* 35388+*,// REPINS: do 12 times: 35389+* 35390+* MNOTE requires that ' is doubled for expanded variables 35391+* thus build &MASTR as a copy of '&ARGS with ' doubled 35392+* 35393+* 35394+*,// L R2,=F'123' 35395+* 35396+* finally generate code: &ICNT copies of &CODE &ARGS 35397+* 016C6E 5820 C064 16CB4 35398+ L R2,=F'123' 016C72 5820 C064 16CB4 35399+ L R2,=F'123' 016C76 5820 C064 16CB4 35400+ L R2,=F'123' 016C7A 5820 C064 16CB4 35401+ L R2,=F'123' 016C7E 5820 C064 16CB4 35402+ L R2,=F'123' 016C82 5820 C064 16CB4 35403+ L R2,=F'123' 016C86 5820 C064 16CB4 35404+ L R2,=F'123' 016C8A 5820 C064 16CB4 35405+ L R2,=F'123' 016C8E 5820 C064 16CB4 35406+ L R2,=F'123' 016C92 5820 C064 16CB4 35407+ L R2,=F'123' 016C96 5820 C064 16CB4 35408+ L R2,=F'123' 016C9A 5820 C064 16CB4 35409+ L R2,=F'123' 35410+* 016C9E 06FB 35411 BCTR R15,R11 35412 TSIMRET 016CA0 58F0 C060 16CB0 35413+ L R15,=A(SAVETST) R15 := current save area 016CA4 58DF 0004 00004 35414+ L R13,4(R15) get old save area back 016CA8 98EC D00C 0000C 35415+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016CAC 07FE 35416+ BR 14 RETURN 02000000 35417 TSIMEND 016CB0 35418+ LTORG 016CB0 00000458 35419 =A(SAVETST) 016CB4 0000007B 35420 =F'123' 16CB8 35421+T930TEND EQU * 35422 * 35423 * Test 931 -- L R,m (ig=18) -------------------------------- 35424 * PAGE 647 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 35425 TSIMBEG T931,35000,18,1,C'L R,m (ig=18)',DIS=1 35426+* 004484 35427+TDSCDAT CSECT 004488 35428+ DS 0D 35429+* 004488 00016CB8 35430+T931TDSC DC A(T931) // TENTRY 00448C 00000080 35431+ DC A(T931TEND-T931) // TLENGTH 004490 000088B8 35432+ DC F'35000' // TLRCNT 004494 00000012 35433+ DC F'18' // TIGCNT 004498 00000001 35434+ DC F'1' // TLTYPE 001F4F 35435+TEXT CSECT 001F4F E3F9F3F1 35436+SPTR3221 DC C'T931' 00449C 35437+TDSCDAT CSECT 00449C 35438+ DS 0F 00449C 04001F4F 35439+ DC AL1(L'SPTR3221),AL3(SPTR3221) 001F53 35440+TEXT CSECT 001F53 D340D96B94404D89 35441+SPTR3222 DC C'L R,m (ig=18)' 0044A0 35442+TDSCDAT CSECT 0044A0 35443+ DS 0F 0044A0 0D001F53 35444+ DC AL1(L'SPTR3222),AL3(SPTR3222) 35445+* 004DBC 35446+TDSCTBL CSECT 04DBC 35447+T931TPTR EQU * 004DBC 01004488 35448+ DC X'01',AL3(T931TDSC) disabled test 35449+* 016CB8 35450+TCODE CSECT 016CB8 35451+ DS 0D ensure double word alignment for test 016CB8 35452+T931 DS 0H 01650000 016CB8 90EC D00C 0000C 35453+ STM 14,12,12(13) SAVE REGISTERS 02950000 016CBC 18CF 35454+ LR R12,R15 base register := entry address 16CB8 35455+ USING T931,R12 declare code base register 016CBE 41B0 C01E 16CD6 35456+ LA R11,T931L load loop target to R11 016CC2 58F0 C078 16D30 35457+ L R15,=A(SAVETST) R15 := current save area 016CC6 50DF 0004 00004 35458+ ST R13,4(R15) set back pointer in current save area 016CCA 182D 35459+ LR R2,R13 remember callers save area 016CCC 18DF 35460+ LR R13,R15 setup current save area 016CCE 50D2 0008 00008 35461+ ST R13,8(R2) set forw pointer in callers save area 00000 35462+ USING TDSC,R1 declare TDSC base register 016CD2 58F0 1008 00008 35463+ L R15,TLRCNT load local repeat count to R15 35464+* 35465 * 35466 T931L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 35467+* 35468+* build from sublist &ALIST a comma separated string &ARGS 35469+* 35470+* 35471+* 35472+* 35473+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 35474+* this allows to transfer the repeat count from last TDSCGEN call 35475+* 35476+* 16CD6 35477+T931L EQU * 35478+* 35479+* write a comment indicating what REPINS does (in case NOGEN in effect) PAGE 648 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 35480+* 35481+*,// REPINS: do 18 times: 35482+* 35483+* MNOTE requires that ' is doubled for expanded variables 35484+* thus build &MASTR as a copy of '&ARGS with ' doubled 35485+* 35486+* 35487+*,// L R2,=F'123' 35488+* 35489+* finally generate code: &ICNT copies of &CODE &ARGS 35490+* 016CD6 5820 C07C 16D34 35491+ L R2,=F'123' 016CDA 5820 C07C 16D34 35492+ L R2,=F'123' 016CDE 5820 C07C 16D34 35493+ L R2,=F'123' 016CE2 5820 C07C 16D34 35494+ L R2,=F'123' 016CE6 5820 C07C 16D34 35495+ L R2,=F'123' 016CEA 5820 C07C 16D34 35496+ L R2,=F'123' 016CEE 5820 C07C 16D34 35497+ L R2,=F'123' 016CF2 5820 C07C 16D34 35498+ L R2,=F'123' 016CF6 5820 C07C 16D34 35499+ L R2,=F'123' 016CFA 5820 C07C 16D34 35500+ L R2,=F'123' 016CFE 5820 C07C 16D34 35501+ L R2,=F'123' 016D02 5820 C07C 16D34 35502+ L R2,=F'123' 016D06 5820 C07C 16D34 35503+ L R2,=F'123' 016D0A 5820 C07C 16D34 35504+ L R2,=F'123' 016D0E 5820 C07C 16D34 35505+ L R2,=F'123' 016D12 5820 C07C 16D34 35506+ L R2,=F'123' 016D16 5820 C07C 16D34 35507+ L R2,=F'123' 016D1A 5820 C07C 16D34 35508+ L R2,=F'123' 35509+* 016D1E 06FB 35510 BCTR R15,R11 35511 TSIMRET 016D20 58F0 C078 16D30 35512+ L R15,=A(SAVETST) R15 := current save area 016D24 58DF 0004 00004 35513+ L R13,4(R15) get old save area back 016D28 98EC D00C 0000C 35514+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016D2C 07FE 35515+ BR 14 RETURN 02000000 35516 TSIMEND 016D30 35517+ LTORG 016D30 00000458 35518 =A(SAVETST) 016D34 0000007B 35519 =F'123' 16D38 35520+T931TEND EQU * 35521 * 35522 * Test 932 -- L R,m (ig=25) -------------------------------- 35523 * 35524 TSIMBEG T932,25000,25,1,C'L R,m (ig=25)',DIS=1 35525+* 0044A4 35526+TDSCDAT CSECT 0044A8 35527+ DS 0D 35528+* 0044A8 00016D38 35529+T932TDSC DC A(T932) // TENTRY 0044AC 000000A0 35530+ DC A(T932TEND-T932) // TLENGTH 0044B0 000061A8 35531+ DC F'25000' // TLRCNT 0044B4 00000019 35532+ DC F'25' // TIGCNT 0044B8 00000001 35533+ DC F'1' // TLTYPE 001F60 35534+TEXT CSECT PAGE 649 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 001F60 E3F9F3F2 35535+SPTR3233 DC C'T932' 0044BC 35536+TDSCDAT CSECT 0044BC 35537+ DS 0F 0044BC 04001F60 35538+ DC AL1(L'SPTR3233),AL3(SPTR3233) 001F64 35539+TEXT CSECT 001F64 D340D96B94404D89 35540+SPTR3234 DC C'L R,m (ig=25)' 0044C0 35541+TDSCDAT CSECT 0044C0 35542+ DS 0F 0044C0 0D001F64 35543+ DC AL1(L'SPTR3234),AL3(SPTR3234) 35544+* 004DC0 35545+TDSCTBL CSECT 04DC0 35546+T932TPTR EQU * 004DC0 010044A8 35547+ DC X'01',AL3(T932TDSC) disabled test 35548+* 016D38 35549+TCODE CSECT 016D38 35550+ DS 0D ensure double word alignment for test 016D38 35551+T932 DS 0H 01650000 016D38 90EC D00C 0000C 35552+ STM 14,12,12(13) SAVE REGISTERS 02950000 016D3C 18CF 35553+ LR R12,R15 base register := entry address 16D38 35554+ USING T932,R12 declare code base register 016D3E 41B0 C01E 16D56 35555+ LA R11,T932L load loop target to R11 016D42 58F0 C098 16DD0 35556+ L R15,=A(SAVETST) R15 := current save area 016D46 50DF 0004 00004 35557+ ST R13,4(R15) set back pointer in current save area 016D4A 182D 35558+ LR R2,R13 remember callers save area 016D4C 18DF 35559+ LR R13,R15 setup current save area 016D4E 50D2 0008 00008 35560+ ST R13,8(R2) set forw pointer in callers save area 00000 35561+ USING TDSC,R1 declare TDSC base register 016D52 58F0 1008 00008 35562+ L R15,TLRCNT load local repeat count to R15 35563+* 35564 * 35565 T932L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 35566+* 35567+* build from sublist &ALIST a comma separated string &ARGS 35568+* 35569+* 35570+* 35571+* 35572+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 35573+* this allows to transfer the repeat count from last TDSCGEN call 35574+* 35575+* 16D56 35576+T932L EQU * 35577+* 35578+* write a comment indicating what REPINS does (in case NOGEN in effect) 35579+* 35580+*,// REPINS: do 25 times: 35581+* 35582+* MNOTE requires that ' is doubled for expanded variables 35583+* thus build &MASTR as a copy of '&ARGS with ' doubled 35584+* 35585+* 35586+*,// L R2,=F'123' 35587+* 35588+* finally generate code: &ICNT copies of &CODE &ARGS 35589+* PAGE 650 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016D56 5820 C09C 16DD4 35590+ L R2,=F'123' 016D5A 5820 C09C 16DD4 35591+ L R2,=F'123' 016D5E 5820 C09C 16DD4 35592+ L R2,=F'123' 016D62 5820 C09C 16DD4 35593+ L R2,=F'123' 016D66 5820 C09C 16DD4 35594+ L R2,=F'123' 016D6A 5820 C09C 16DD4 35595+ L R2,=F'123' 016D6E 5820 C09C 16DD4 35596+ L R2,=F'123' 016D72 5820 C09C 16DD4 35597+ L R2,=F'123' 016D76 5820 C09C 16DD4 35598+ L R2,=F'123' 016D7A 5820 C09C 16DD4 35599+ L R2,=F'123' 016D7E 5820 C09C 16DD4 35600+ L R2,=F'123' 016D82 5820 C09C 16DD4 35601+ L R2,=F'123' 016D86 5820 C09C 16DD4 35602+ L R2,=F'123' 016D8A 5820 C09C 16DD4 35603+ L R2,=F'123' 016D8E 5820 C09C 16DD4 35604+ L R2,=F'123' 016D92 5820 C09C 16DD4 35605+ L R2,=F'123' 016D96 5820 C09C 16DD4 35606+ L R2,=F'123' 016D9A 5820 C09C 16DD4 35607+ L R2,=F'123' 016D9E 5820 C09C 16DD4 35608+ L R2,=F'123' 016DA2 5820 C09C 16DD4 35609+ L R2,=F'123' 016DA6 5820 C09C 16DD4 35610+ L R2,=F'123' 016DAA 5820 C09C 16DD4 35611+ L R2,=F'123' 016DAE 5820 C09C 16DD4 35612+ L R2,=F'123' 016DB2 5820 C09C 16DD4 35613+ L R2,=F'123' 016DB6 5820 C09C 16DD4 35614+ L R2,=F'123' 35615+* 016DBA 06FB 35616 BCTR R15,R11 35617 TSIMRET 016DBC 58F0 C098 16DD0 35618+ L R15,=A(SAVETST) R15 := current save area 016DC0 58DF 0004 00004 35619+ L R13,4(R15) get old save area back 016DC4 98EC D00C 0000C 35620+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016DC8 07FE 35621+ BR 14 RETURN 02000000 35622 TSIMEND 016DD0 35623+ LTORG 016DD0 00000458 35624 =A(SAVETST) 016DD4 0000007B 35625 =F'123' 16DD8 35626+T932TEND EQU * 35627 * 35628 * Test 933 -- L R,m (ig=36) -------------------------------- 35629 * 35630 TSIMBEG T933,20000,36,1,C'L R,m (ig=36)',DIS=1 35631+* 0044C4 35632+TDSCDAT CSECT 0044C8 35633+ DS 0D 35634+* 0044C8 00016DD8 35635+T933TDSC DC A(T933) // TENTRY 0044CC 000000C8 35636+ DC A(T933TEND-T933) // TLENGTH 0044D0 00004E20 35637+ DC F'20000' // TLRCNT 0044D4 00000024 35638+ DC F'36' // TIGCNT 0044D8 00000001 35639+ DC F'1' // TLTYPE 001F71 35640+TEXT CSECT 001F71 E3F9F3F3 35641+SPTR3245 DC C'T933' 0044DC 35642+TDSCDAT CSECT 0044DC 35643+ DS 0F 0044DC 04001F71 35644+ DC AL1(L'SPTR3245),AL3(SPTR3245) PAGE 651 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 001F75 35645+TEXT CSECT 001F75 D340D96B94404D89 35646+SPTR3246 DC C'L R,m (ig=36)' 0044E0 35647+TDSCDAT CSECT 0044E0 35648+ DS 0F 0044E0 0D001F75 35649+ DC AL1(L'SPTR3246),AL3(SPTR3246) 35650+* 004DC4 35651+TDSCTBL CSECT 04DC4 35652+T933TPTR EQU * 004DC4 010044C8 35653+ DC X'01',AL3(T933TDSC) disabled test 35654+* 016DD8 35655+TCODE CSECT 016DD8 35656+ DS 0D ensure double word alignment for test 016DD8 35657+T933 DS 0H 01650000 016DD8 90EC D00C 0000C 35658+ STM 14,12,12(13) SAVE REGISTERS 02950000 016DDC 18CF 35659+ LR R12,R15 base register := entry address 16DD8 35660+ USING T933,R12 declare code base register 016DDE 41B0 C01E 16DF6 35661+ LA R11,T933L load loop target to R11 016DE2 58F0 C0C0 16E98 35662+ L R15,=A(SAVETST) R15 := current save area 016DE6 50DF 0004 00004 35663+ ST R13,4(R15) set back pointer in current save area 016DEA 182D 35664+ LR R2,R13 remember callers save area 016DEC 18DF 35665+ LR R13,R15 setup current save area 016DEE 50D2 0008 00008 35666+ ST R13,8(R2) set forw pointer in callers save area 00000 35667+ USING TDSC,R1 declare TDSC base register 016DF2 58F0 1008 00008 35668+ L R15,TLRCNT load local repeat count to R15 35669+* 35670 * 35671 T933L REPINS L,(R2,=F'123') repeat: L R2,=F'123' 35672+* 35673+* build from sublist &ALIST a comma separated string &ARGS 35674+* 35675+* 35676+* 35677+* 35678+* determine repeat count, &IGCNT if given, otherwise &TDIGCNT 35679+* this allows to transfer the repeat count from last TDSCGEN call 35680+* 35681+* 16DF6 35682+T933L EQU * 35683+* 35684+* write a comment indicating what REPINS does (in case NOGEN in effect) 35685+* 35686+*,// REPINS: do 36 times: 35687+* 35688+* MNOTE requires that ' is doubled for expanded variables 35689+* thus build &MASTR as a copy of '&ARGS with ' doubled 35690+* 35691+* 35692+*,// L R2,=F'123' 35693+* 35694+* finally generate code: &ICNT copies of &CODE &ARGS 35695+* 016DF6 5820 C0C4 16E9C 35696+ L R2,=F'123' 016DFA 5820 C0C4 16E9C 35697+ L R2,=F'123' 016DFE 5820 C0C4 16E9C 35698+ L R2,=F'123' 016E02 5820 C0C4 16E9C 35699+ L R2,=F'123' PAGE 652 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016E06 5820 C0C4 16E9C 35700+ L R2,=F'123' 016E0A 5820 C0C4 16E9C 35701+ L R2,=F'123' 016E0E 5820 C0C4 16E9C 35702+ L R2,=F'123' 016E12 5820 C0C4 16E9C 35703+ L R2,=F'123' 016E16 5820 C0C4 16E9C 35704+ L R2,=F'123' 016E1A 5820 C0C4 16E9C 35705+ L R2,=F'123' 016E1E 5820 C0C4 16E9C 35706+ L R2,=F'123' 016E22 5820 C0C4 16E9C 35707+ L R2,=F'123' 016E26 5820 C0C4 16E9C 35708+ L R2,=F'123' 016E2A 5820 C0C4 16E9C 35709+ L R2,=F'123' 016E2E 5820 C0C4 16E9C 35710+ L R2,=F'123' 016E32 5820 C0C4 16E9C 35711+ L R2,=F'123' 016E36 5820 C0C4 16E9C 35712+ L R2,=F'123' 016E3A 5820 C0C4 16E9C 35713+ L R2,=F'123' 016E3E 5820 C0C4 16E9C 35714+ L R2,=F'123' 016E42 5820 C0C4 16E9C 35715+ L R2,=F'123' 016E46 5820 C0C4 16E9C 35716+ L R2,=F'123' 016E4A 5820 C0C4 16E9C 35717+ L R2,=F'123' 016E4E 5820 C0C4 16E9C 35718+ L R2,=F'123' 016E52 5820 C0C4 16E9C 35719+ L R2,=F'123' 016E56 5820 C0C4 16E9C 35720+ L R2,=F'123' 016E5A 5820 C0C4 16E9C 35721+ L R2,=F'123' 016E5E 5820 C0C4 16E9C 35722+ L R2,=F'123' 016E62 5820 C0C4 16E9C 35723+ L R2,=F'123' 016E66 5820 C0C4 16E9C 35724+ L R2,=F'123' 016E6A 5820 C0C4 16E9C 35725+ L R2,=F'123' 016E6E 5820 C0C4 16E9C 35726+ L R2,=F'123' 016E72 5820 C0C4 16E9C 35727+ L R2,=F'123' 016E76 5820 C0C4 16E9C 35728+ L R2,=F'123' 016E7A 5820 C0C4 16E9C 35729+ L R2,=F'123' 016E7E 5820 C0C4 16E9C 35730+ L R2,=F'123' 016E82 5820 C0C4 16E9C 35731+ L R2,=F'123' 35732+* 016E86 06FB 35733 BCTR R15,R11 35734 TSIMRET 016E88 58F0 C0C0 16E98 35735+ L R15,=A(SAVETST) R15 := current save area 016E8C 58DF 0004 00004 35736+ L R13,4(R15) get old save area back 016E90 98EC D00C 0000C 35737+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016E94 07FE 35738+ BR 14 RETURN 02000000 35739 TSIMEND 016E98 35740+ LTORG 016E98 00000458 35741 =A(SAVETST) 016E9C 0000007B 35742 =F'123' 16EA0 35743+T933TEND EQU * 35744 * 35745 * Test 95x -- T700 size tests ============================== 35746 * 35747 * Test 952 -- Mix Int RR 1st 2 ---------------------------- 35748 * 35749 TSIMBEG T952,250000,1,1,C'T700 1st 2',DIS=1 35750+* 0044E4 35751+TDSCDAT CSECT 0044E8 35752+ DS 0D 35753+* 0044E8 00016EA0 35754+T952TDSC DC A(T952) // TENTRY PAGE 653 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0044EC 0000003C 35755+ DC A(T952TEND-T952) // TLENGTH 0044F0 0003D090 35756+ DC F'250000' // TLRCNT 0044F4 00000001 35757+ DC F'1' // TIGCNT 0044F8 00000001 35758+ DC F'1' // TLTYPE 001F82 35759+TEXT CSECT 001F82 E3F9F5F2 35760+SPTR3257 DC C'T952' 0044FC 35761+TDSCDAT CSECT 0044FC 35762+ DS 0F 0044FC 04001F82 35763+ DC AL1(L'SPTR3257),AL3(SPTR3257) 001F86 35764+TEXT CSECT 001F86 E3F7F0F040F1A2A3 35765+SPTR3258 DC C'T700 1st 2' 004500 35766+TDSCDAT CSECT 004500 35767+ DS 0F 004500 0B001F86 35768+ DC AL1(L'SPTR3258),AL3(SPTR3258) 35769+* 004DC8 35770+TDSCTBL CSECT 04DC8 35771+T952TPTR EQU * 004DC8 010044E8 35772+ DC X'01',AL3(T952TDSC) disabled test 35773+* 016EA0 35774+TCODE CSECT 016EA0 35775+ DS 0D ensure double word alignment for test 016EA0 35776+T952 DS 0H 01650000 016EA0 90EC D00C 0000C 35777+ STM 14,12,12(13) SAVE REGISTERS 02950000 016EA4 18CF 35778+ LR R12,R15 base register := entry address 16EA0 35779+ USING T952,R12 declare code base register 016EA6 41B0 C01E 16EBE 35780+ LA R11,T952L load loop target to R11 016EAA 58F0 C038 16ED8 35781+ L R15,=A(SAVETST) R15 := current save area 016EAE 50DF 0004 00004 35782+ ST R13,4(R15) set back pointer in current save area 016EB2 182D 35783+ LR R2,R13 remember callers save area 016EB4 18DF 35784+ LR R13,R15 setup current save area 016EB6 50D2 0008 00008 35785+ ST R13,8(R2) set forw pointer in callers save area 00000 35786+ USING TDSC,R1 declare TDSC base register 016EBA 58F0 1008 00008 35787+ L R15,TLRCNT load local repeat count to R15 35788+* 35789 * 16EBE 35790 T952L EQU * 016EBE 4120 0001 00001 35791 LA R2,1 R2 :=00000001 FIN 01 016EC2 1832 35792 LR R3,R2 R3 :=00000001 02 016EC4 06FB 35793 BCTR R15,R11 35794 TSIMRET 016EC6 58F0 C038 16ED8 35795+ L R15,=A(SAVETST) R15 := current save area 016ECA 58DF 0004 00004 35796+ L R13,4(R15) get old save area back 016ECE 98EC D00C 0000C 35797+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016ED2 07FE 35798+ BR 14 RETURN 02000000 35799 TSIMEND 016ED8 35800+ LTORG 016ED8 00000458 35801 =A(SAVETST) 16EDC 35802+T952TEND EQU * 35803 * 35804 * Test 953 -- Mix Int RR 1st 3 ---------------------------- 35805 * 35806 TSIMBEG T953,170000,1,1,C'T700 1st 3',DIS=1 35807+* 004504 35808+TDSCDAT CSECT 004508 35809+ DS 0D PAGE 654 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 35810+* 004508 00016EE0 35811+T953TDSC DC A(T953) // TENTRY 00450C 0000003C 35812+ DC A(T953TEND-T953) // TLENGTH 004510 00029810 35813+ DC F'170000' // TLRCNT 004514 00000001 35814+ DC F'1' // TIGCNT 004518 00000001 35815+ DC F'1' // TLTYPE 001F91 35816+TEXT CSECT 001F91 E3F9F5F3 35817+SPTR3266 DC C'T953' 00451C 35818+TDSCDAT CSECT 00451C 35819+ DS 0F 00451C 04001F91 35820+ DC AL1(L'SPTR3266),AL3(SPTR3266) 001F95 35821+TEXT CSECT 001F95 E3F7F0F040F1A2A3 35822+SPTR3267 DC C'T700 1st 3' 004520 35823+TDSCDAT CSECT 004520 35824+ DS 0F 004520 0B001F95 35825+ DC AL1(L'SPTR3267),AL3(SPTR3267) 35826+* 004DCC 35827+TDSCTBL CSECT 04DCC 35828+T953TPTR EQU * 004DCC 01004508 35829+ DC X'01',AL3(T953TDSC) disabled test 35830+* 016EDC 35831+TCODE CSECT 016EE0 35832+ DS 0D ensure double word alignment for test 016EE0 35833+T953 DS 0H 01650000 016EE0 90EC D00C 0000C 35834+ STM 14,12,12(13) SAVE REGISTERS 02950000 016EE4 18CF 35835+ LR R12,R15 base register := entry address 16EE0 35836+ USING T953,R12 declare code base register 016EE6 41B0 C01E 16EFE 35837+ LA R11,T953L load loop target to R11 016EEA 58F0 C038 16F18 35838+ L R15,=A(SAVETST) R15 := current save area 016EEE 50DF 0004 00004 35839+ ST R13,4(R15) set back pointer in current save area 016EF2 182D 35840+ LR R2,R13 remember callers save area 016EF4 18DF 35841+ LR R13,R15 setup current save area 016EF6 50D2 0008 00008 35842+ ST R13,8(R2) set forw pointer in callers save area 00000 35843+ USING TDSC,R1 declare TDSC base register 016EFA 58F0 1008 00008 35844+ L R15,TLRCNT load local repeat count to R15 35845+* 35846 * 16EFE 35847 T953L EQU * 016EFE 4120 0001 00001 35848 LA R2,1 R2 :=00000001 FIN 01 016F02 1832 35849 LR R3,R2 R3 :=00000001 02 016F04 8B30 0008 00008 35850 SLA R3,8 R3 :=00000100 FIN 03 016F08 06FB 35851 BCTR R15,R11 35852 TSIMRET 016F0A 58F0 C038 16F18 35853+ L R15,=A(SAVETST) R15 := current save area 016F0E 58DF 0004 00004 35854+ L R13,4(R15) get old save area back 016F12 98EC D00C 0000C 35855+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016F16 07FE 35856+ BR 14 RETURN 02000000 35857 TSIMEND 016F18 35858+ LTORG 016F18 00000458 35859 =A(SAVETST) 16F1C 35860+T953TEND EQU * 35861 * 35862 * Test 954 -- Mix Int RR 1st 4 ---------------------------- 35863 * 35864 TSIMBEG T954,140000,1,1,C'T700 1st 4',DIS=1 PAGE 655 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 35865+* 004524 35866+TDSCDAT CSECT 004528 35867+ DS 0D 35868+* 004528 00016F20 35869+T954TDSC DC A(T954) // TENTRY 00452C 00000044 35870+ DC A(T954TEND-T954) // TLENGTH 004530 000222E0 35871+ DC F'140000' // TLRCNT 004534 00000001 35872+ DC F'1' // TIGCNT 004538 00000001 35873+ DC F'1' // TLTYPE 001FA0 35874+TEXT CSECT 001FA0 E3F9F5F4 35875+SPTR3275 DC C'T954' 00453C 35876+TDSCDAT CSECT 00453C 35877+ DS 0F 00453C 04001FA0 35878+ DC AL1(L'SPTR3275),AL3(SPTR3275) 001FA4 35879+TEXT CSECT 001FA4 E3F7F0F040F1A2A3 35880+SPTR3276 DC C'T700 1st 4' 004540 35881+TDSCDAT CSECT 004540 35882+ DS 0F 004540 0B001FA4 35883+ DC AL1(L'SPTR3276),AL3(SPTR3276) 35884+* 004DD0 35885+TDSCTBL CSECT 04DD0 35886+T954TPTR EQU * 004DD0 01004528 35887+ DC X'01',AL3(T954TDSC) disabled test 35888+* 016F1C 35889+TCODE CSECT 016F20 35890+ DS 0D ensure double word alignment for test 016F20 35891+T954 DS 0H 01650000 016F20 90EC D00C 0000C 35892+ STM 14,12,12(13) SAVE REGISTERS 02950000 016F24 18CF 35893+ LR R12,R15 base register := entry address 16F20 35894+ USING T954,R12 declare code base register 016F26 41B0 C01E 16F3E 35895+ LA R11,T954L load loop target to R11 016F2A 58F0 C040 16F60 35896+ L R15,=A(SAVETST) R15 := current save area 016F2E 50DF 0004 00004 35897+ ST R13,4(R15) set back pointer in current save area 016F32 182D 35898+ LR R2,R13 remember callers save area 016F34 18DF 35899+ LR R13,R15 setup current save area 016F36 50D2 0008 00008 35900+ ST R13,8(R2) set forw pointer in callers save area 00000 35901+ USING TDSC,R1 declare TDSC base register 016F3A 58F0 1008 00008 35902+ L R15,TLRCNT load local repeat count to R15 35903+* 35904 * 16F3E 35905 T954L EQU * 016F3E 4120 0001 00001 35906 LA R2,1 R2 :=00000001 FIN 01 016F42 1832 35907 LR R3,R2 R3 :=00000001 02 016F44 8B30 0008 00008 35908 SLA R3,8 R3 :=00000100 FIN 03 016F48 1744 35909 XR R4,R4 R4 :=00000000 04 016F4A 06FB 35910 BCTR R15,R11 35911 TSIMRET 016F4C 58F0 C040 16F60 35912+ L R15,=A(SAVETST) R15 := current save area 016F50 58DF 0004 00004 35913+ L R13,4(R15) get old save area back 016F54 98EC D00C 0000C 35914+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016F58 07FE 35915+ BR 14 RETURN 02000000 35916 TSIMEND 016F60 35917+ LTORG 016F60 00000458 35918 =A(SAVETST) 16F64 35919+T954TEND EQU * PAGE 656 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 35920 * 35921 * Test 955 -- Mix Int RR 1st 5 ---------------------------- 35922 * 35923 TSIMBEG T955,120000,1,1,C'T700 1st 5',DIS=1 35924+* 004544 35925+TDSCDAT CSECT 004548 35926+ DS 0D 35927+* 004548 00016F68 35928+T955TDSC DC A(T955) // TENTRY 00454C 00000044 35929+ DC A(T955TEND-T955) // TLENGTH 004550 0001D4C0 35930+ DC F'120000' // TLRCNT 004554 00000001 35931+ DC F'1' // TIGCNT 004558 00000001 35932+ DC F'1' // TLTYPE 001FAF 35933+TEXT CSECT 001FAF E3F9F5F5 35934+SPTR3284 DC C'T955' 00455C 35935+TDSCDAT CSECT 00455C 35936+ DS 0F 00455C 04001FAF 35937+ DC AL1(L'SPTR3284),AL3(SPTR3284) 001FB3 35938+TEXT CSECT 001FB3 E3F7F0F040F1A2A3 35939+SPTR3285 DC C'T700 1st 5' 004560 35940+TDSCDAT CSECT 004560 35941+ DS 0F 004560 0B001FB3 35942+ DC AL1(L'SPTR3285),AL3(SPTR3285) 35943+* 004DD4 35944+TDSCTBL CSECT 04DD4 35945+T955TPTR EQU * 004DD4 01004548 35946+ DC X'01',AL3(T955TDSC) disabled test 35947+* 016F64 35948+TCODE CSECT 016F68 35949+ DS 0D ensure double word alignment for test 016F68 35950+T955 DS 0H 01650000 016F68 90EC D00C 0000C 35951+ STM 14,12,12(13) SAVE REGISTERS 02950000 016F6C 18CF 35952+ LR R12,R15 base register := entry address 16F68 35953+ USING T955,R12 declare code base register 016F6E 41B0 C01E 16F86 35954+ LA R11,T955L load loop target to R11 016F72 58F0 C040 16FA8 35955+ L R15,=A(SAVETST) R15 := current save area 016F76 50DF 0004 00004 35956+ ST R13,4(R15) set back pointer in current save area 016F7A 182D 35957+ LR R2,R13 remember callers save area 016F7C 18DF 35958+ LR R13,R15 setup current save area 016F7E 50D2 0008 00008 35959+ ST R13,8(R2) set forw pointer in callers save area 00000 35960+ USING TDSC,R1 declare TDSC base register 016F82 58F0 1008 00008 35961+ L R15,TLRCNT load local repeat count to R15 35962+* 35963 * 16F86 35964 T955L EQU * 016F86 4120 0001 00001 35965 LA R2,1 R2 :=00000001 FIN 01 016F8A 1832 35966 LR R3,R2 R3 :=00000001 02 016F8C 8B30 0008 00008 35967 SLA R3,8 R3 :=00000100 FIN 03 016F90 1744 35968 XR R4,R4 R4 :=00000000 04 016F92 1643 35969 OR R4,R3 R4 :=00000100 05 016F94 06FB 35970 BCTR R15,R11 35971 TSIMRET 016F96 58F0 C040 16FA8 35972+ L R15,=A(SAVETST) R15 := current save area 016F9A 58DF 0004 00004 35973+ L R13,4(R15) get old save area back 016F9E 98EC D00C 0000C 35974+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 PAGE 657 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016FA2 07FE 35975+ BR 14 RETURN 02000000 35976 TSIMEND 016FA8 35977+ LTORG 016FA8 00000458 35978 =A(SAVETST) 16FAC 35979+T955TEND EQU * 35980 * 35981 * Test 956 -- Mix Int RR 1st 6 ---------------------------- 35982 * 35983 TSIMBEG T956,105000,1,1,C'T700 1st 6',DIS=1 35984+* 004564 35985+TDSCDAT CSECT 004568 35986+ DS 0D 35987+* 004568 00016FB0 35988+T956TDSC DC A(T956) // TENTRY 00456C 00000044 35989+ DC A(T956TEND-T956) // TLENGTH 004570 00019A28 35990+ DC F'105000' // TLRCNT 004574 00000001 35991+ DC F'1' // TIGCNT 004578 00000001 35992+ DC F'1' // TLTYPE 001FBE 35993+TEXT CSECT 001FBE E3F9F5F6 35994+SPTR3293 DC C'T956' 00457C 35995+TDSCDAT CSECT 00457C 35996+ DS 0F 00457C 04001FBE 35997+ DC AL1(L'SPTR3293),AL3(SPTR3293) 001FC2 35998+TEXT CSECT 001FC2 E3F7F0F040F1A2A3 35999+SPTR3294 DC C'T700 1st 6' 004580 36000+TDSCDAT CSECT 004580 36001+ DS 0F 004580 0B001FC2 36002+ DC AL1(L'SPTR3294),AL3(SPTR3294) 36003+* 004DD8 36004+TDSCTBL CSECT 04DD8 36005+T956TPTR EQU * 004DD8 01004568 36006+ DC X'01',AL3(T956TDSC) disabled test 36007+* 016FAC 36008+TCODE CSECT 016FB0 36009+ DS 0D ensure double word alignment for test 016FB0 36010+T956 DS 0H 01650000 016FB0 90EC D00C 0000C 36011+ STM 14,12,12(13) SAVE REGISTERS 02950000 016FB4 18CF 36012+ LR R12,R15 base register := entry address 16FB0 36013+ USING T956,R12 declare code base register 016FB6 41B0 C01E 16FCE 36014+ LA R11,T956L load loop target to R11 016FBA 58F0 C040 16FF0 36015+ L R15,=A(SAVETST) R15 := current save area 016FBE 50DF 0004 00004 36016+ ST R13,4(R15) set back pointer in current save area 016FC2 182D 36017+ LR R2,R13 remember callers save area 016FC4 18DF 36018+ LR R13,R15 setup current save area 016FC6 50D2 0008 00008 36019+ ST R13,8(R2) set forw pointer in callers save area 00000 36020+ USING TDSC,R1 declare TDSC base register 016FCA 58F0 1008 00008 36021+ L R15,TLRCNT load local repeat count to R15 36022+* 36023 * 16FCE 36024 T956L EQU * 016FCE 4120 0001 00001 36025 LA R2,1 R2 :=00000001 FIN 01 016FD2 1832 36026 LR R3,R2 R3 :=00000001 02 016FD4 8B30 0008 00008 36027 SLA R3,8 R3 :=00000100 FIN 03 016FD8 1744 36028 XR R4,R4 R4 :=00000000 04 016FDA 1643 36029 OR R4,R3 R4 :=00000100 05 PAGE 658 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 016FDC 0640 36030 BCTR R4,0 R4 :=000000FF FIN 06 016FDE 06FB 36031 BCTR R15,R11 36032 TSIMRET 016FE0 58F0 C040 16FF0 36033+ L R15,=A(SAVETST) R15 := current save area 016FE4 58DF 0004 00004 36034+ L R13,4(R15) get old save area back 016FE8 98EC D00C 0000C 36035+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 016FEC 07FE 36036+ BR 14 RETURN 02000000 36037 TSIMEND 016FF0 36038+ LTORG 016FF0 00000458 36039 =A(SAVETST) 16FF4 36040+T956TEND EQU * 36041 * 36042 * Test 957 -- Mix Int RR 1st 7 ---------------------------- 36043 * 36044 TSIMBEG T957,90000,1,1,C'T700 1st 7',DIS=1 36045+* 004584 36046+TDSCDAT CSECT 004588 36047+ DS 0D 36048+* 004588 00016FF8 36049+T957TDSC DC A(T957) // TENTRY 00458C 00000044 36050+ DC A(T957TEND-T957) // TLENGTH 004590 00015F90 36051+ DC F'90000' // TLRCNT 004594 00000001 36052+ DC F'1' // TIGCNT 004598 00000001 36053+ DC F'1' // TLTYPE 001FCD 36054+TEXT CSECT 001FCD E3F9F5F7 36055+SPTR3302 DC C'T957' 00459C 36056+TDSCDAT CSECT 00459C 36057+ DS 0F 00459C 04001FCD 36058+ DC AL1(L'SPTR3302),AL3(SPTR3302) 001FD1 36059+TEXT CSECT 001FD1 E3F7F0F040F1A2A3 36060+SPTR3303 DC C'T700 1st 7' 0045A0 36061+TDSCDAT CSECT 0045A0 36062+ DS 0F 0045A0 0B001FD1 36063+ DC AL1(L'SPTR3303),AL3(SPTR3303) 36064+* 004DDC 36065+TDSCTBL CSECT 04DDC 36066+T957TPTR EQU * 004DDC 01004588 36067+ DC X'01',AL3(T957TDSC) disabled test 36068+* 016FF4 36069+TCODE CSECT 016FF8 36070+ DS 0D ensure double word alignment for test 016FF8 36071+T957 DS 0H 01650000 016FF8 90EC D00C 0000C 36072+ STM 14,12,12(13) SAVE REGISTERS 02950000 016FFC 18CF 36073+ LR R12,R15 base register := entry address 16FF8 36074+ USING T957,R12 declare code base register 016FFE 41B0 C01E 17016 36075+ LA R11,T957L load loop target to R11 017002 58F0 C040 17038 36076+ L R15,=A(SAVETST) R15 := current save area 017006 50DF 0004 00004 36077+ ST R13,4(R15) set back pointer in current save area 01700A 182D 36078+ LR R2,R13 remember callers save area 01700C 18DF 36079+ LR R13,R15 setup current save area 01700E 50D2 0008 00008 36080+ ST R13,8(R2) set forw pointer in callers save area 00000 36081+ USING TDSC,R1 declare TDSC base register 017012 58F0 1008 00008 36082+ L R15,TLRCNT load local repeat count to R15 36083+* 36084 * PAGE 659 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 17016 36085 T957L EQU * 017016 4120 0001 00001 36086 LA R2,1 R2 :=00000001 FIN 01 01701A 1832 36087 LR R3,R2 R3 :=00000001 02 01701C 8B30 0008 00008 36088 SLA R3,8 R3 :=00000100 FIN 03 017020 1744 36089 XR R4,R4 R4 :=00000000 04 017022 1643 36090 OR R4,R3 R4 :=00000100 05 017024 0640 36091 BCTR R4,0 R4 :=000000FF FIN 06 017026 1354 36092 LCR R5,R4 R5 :=FFFFFF01 07 017028 06FB 36093 BCTR R15,R11 36094 TSIMRET 01702A 58F0 C040 17038 36095+ L R15,=A(SAVETST) R15 := current save area 01702E 58DF 0004 00004 36096+ L R13,4(R15) get old save area back 017032 98EC D00C 0000C 36097+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017036 07FE 36098+ BR 14 RETURN 02000000 36099 TSIMEND 017038 36100+ LTORG 017038 00000458 36101 =A(SAVETST) 1703C 36102+T957TEND EQU * 36103 * 36104 * Test 958 -- Mix Int RR 1st 8 ---------------------------- 36105 * 36106 TSIMBEG T958,84000,1,1,C'T700 1st 8',DIS=1 36107+* 0045A4 36108+TDSCDAT CSECT 0045A8 36109+ DS 0D 36110+* 0045A8 00017040 36111+T958TDSC DC A(T958) // TENTRY 0045AC 0000004C 36112+ DC A(T958TEND-T958) // TLENGTH 0045B0 00014820 36113+ DC F'84000' // TLRCNT 0045B4 00000001 36114+ DC F'1' // TIGCNT 0045B8 00000001 36115+ DC F'1' // TLTYPE 001FDC 36116+TEXT CSECT 001FDC E3F9F5F8 36117+SPTR3311 DC C'T958' 0045BC 36118+TDSCDAT CSECT 0045BC 36119+ DS 0F 0045BC 04001FDC 36120+ DC AL1(L'SPTR3311),AL3(SPTR3311) 001FE0 36121+TEXT CSECT 001FE0 E3F7F0F040F1A2A3 36122+SPTR3312 DC C'T700 1st 8' 0045C0 36123+TDSCDAT CSECT 0045C0 36124+ DS 0F 0045C0 0B001FE0 36125+ DC AL1(L'SPTR3312),AL3(SPTR3312) 36126+* 004DE0 36127+TDSCTBL CSECT 04DE0 36128+T958TPTR EQU * 004DE0 010045A8 36129+ DC X'01',AL3(T958TDSC) disabled test 36130+* 01703C 36131+TCODE CSECT 017040 36132+ DS 0D ensure double word alignment for test 017040 36133+T958 DS 0H 01650000 017040 90EC D00C 0000C 36134+ STM 14,12,12(13) SAVE REGISTERS 02950000 017044 18CF 36135+ LR R12,R15 base register := entry address 17040 36136+ USING T958,R12 declare code base register 017046 41B0 C01E 1705E 36137+ LA R11,T958L load loop target to R11 01704A 58F0 C048 17088 36138+ L R15,=A(SAVETST) R15 := current save area 01704E 50DF 0004 00004 36139+ ST R13,4(R15) set back pointer in current save area PAGE 660 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017052 182D 36140+ LR R2,R13 remember callers save area 017054 18DF 36141+ LR R13,R15 setup current save area 017056 50D2 0008 00008 36142+ ST R13,8(R2) set forw pointer in callers save area 00000 36143+ USING TDSC,R1 declare TDSC base register 01705A 58F0 1008 00008 36144+ L R15,TLRCNT load local repeat count to R15 36145+* 36146 * 1705E 36147 T958L EQU * 01705E 4120 0001 00001 36148 LA R2,1 R2 :=00000001 FIN 01 017062 1832 36149 LR R3,R2 R3 :=00000001 02 017064 8B30 0008 00008 36150 SLA R3,8 R3 :=00000100 FIN 03 017068 1744 36151 XR R4,R4 R4 :=00000000 04 01706A 1643 36152 OR R4,R3 R4 :=00000100 05 01706C 0640 36153 BCTR R4,0 R4 :=000000FF FIN 06 01706E 1354 36154 LCR R5,R4 R5 :=FFFFFF01 07 017070 8950 0002 00002 36155 SLL R5,2 R5 :=FFFFFC04 FIN 08 017074 06FB 36156 BCTR R15,R11 36157 TSIMRET 017076 58F0 C048 17088 36158+ L R15,=A(SAVETST) R15 := current save area 01707A 58DF 0004 00004 36159+ L R13,4(R15) get old save area back 01707E 98EC D00C 0000C 36160+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017082 07FE 36161+ BR 14 RETURN 02000000 36162 TSIMEND 017088 36163+ LTORG 017088 00000458 36164 =A(SAVETST) 1708C 36165+T958TEND EQU * 36166 * 36167 * Test 959 -- Mix Int RR 1st 9 ---------------------------- 36168 * 36169 TSIMBEG T959,75000,1,1,C'T700 1st 9',DIS=1 36170+* 0045C4 36171+TDSCDAT CSECT 0045C8 36172+ DS 0D 36173+* 0045C8 00017090 36174+T959TDSC DC A(T959) // TENTRY 0045CC 0000004C 36175+ DC A(T959TEND-T959) // TLENGTH 0045D0 000124F8 36176+ DC F'75000' // TLRCNT 0045D4 00000001 36177+ DC F'1' // TIGCNT 0045D8 00000001 36178+ DC F'1' // TLTYPE 001FEB 36179+TEXT CSECT 001FEB E3F9F5F9 36180+SPTR3320 DC C'T959' 0045DC 36181+TDSCDAT CSECT 0045DC 36182+ DS 0F 0045DC 04001FEB 36183+ DC AL1(L'SPTR3320),AL3(SPTR3320) 001FEF 36184+TEXT CSECT 001FEF E3F7F0F040F1A2A3 36185+SPTR3321 DC C'T700 1st 9' 0045E0 36186+TDSCDAT CSECT 0045E0 36187+ DS 0F 0045E0 0B001FEF 36188+ DC AL1(L'SPTR3321),AL3(SPTR3321) 36189+* 004DE4 36190+TDSCTBL CSECT 04DE4 36191+T959TPTR EQU * 004DE4 010045C8 36192+ DC X'01',AL3(T959TDSC) disabled test 36193+* 01708C 36194+TCODE CSECT PAGE 661 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017090 36195+ DS 0D ensure double word alignment for test 017090 36196+T959 DS 0H 01650000 017090 90EC D00C 0000C 36197+ STM 14,12,12(13) SAVE REGISTERS 02950000 017094 18CF 36198+ LR R12,R15 base register := entry address 17090 36199+ USING T959,R12 declare code base register 017096 41B0 C01E 170AE 36200+ LA R11,T959L load loop target to R11 01709A 58F0 C048 170D8 36201+ L R15,=A(SAVETST) R15 := current save area 01709E 50DF 0004 00004 36202+ ST R13,4(R15) set back pointer in current save area 0170A2 182D 36203+ LR R2,R13 remember callers save area 0170A4 18DF 36204+ LR R13,R15 setup current save area 0170A6 50D2 0008 00008 36205+ ST R13,8(R2) set forw pointer in callers save area 00000 36206+ USING TDSC,R1 declare TDSC base register 0170AA 58F0 1008 00008 36207+ L R15,TLRCNT load local repeat count to R15 36208+* 36209 * 170AE 36210 T959L EQU * 0170AE 4120 0001 00001 36211 LA R2,1 R2 :=00000001 FIN 01 0170B2 1832 36212 LR R3,R2 R3 :=00000001 02 0170B4 8B30 0008 00008 36213 SLA R3,8 R3 :=00000100 FIN 03 0170B8 1744 36214 XR R4,R4 R4 :=00000000 04 0170BA 1643 36215 OR R4,R3 R4 :=00000100 05 0170BC 0640 36216 BCTR R4,0 R4 :=000000FF FIN 06 0170BE 1354 36217 LCR R5,R4 R5 :=FFFFFF01 07 0170C0 8950 0002 00002 36218 SLL R5,2 R5 :=FFFFFC04 FIN 08 0170C4 1065 36219 LPR R6,R5 R6 :=000003FC 09 0170C6 06FB 36220 BCTR R15,R11 36221 TSIMRET 0170C8 58F0 C048 170D8 36222+ L R15,=A(SAVETST) R15 := current save area 0170CC 58DF 0004 00004 36223+ L R13,4(R15) get old save area back 0170D0 98EC D00C 0000C 36224+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0170D4 07FE 36225+ BR 14 RETURN 02000000 36226 TSIMEND 0170D8 36227+ LTORG 0170D8 00000458 36228 =A(SAVETST) 170DC 36229+T959TEND EQU * 36230 * 36231 * Test 960 -- Mix Int RR 1st 10 ---------------------------- 36232 * 36233 TSIMBEG T960,70000,1,1,C'T700 1st 10',DIS=1 36234+* 0045E4 36235+TDSCDAT CSECT 0045E8 36236+ DS 0D 36237+* 0045E8 000170E0 36238+T960TDSC DC A(T960) // TENTRY 0045EC 0000004C 36239+ DC A(T960TEND-T960) // TLENGTH 0045F0 00011170 36240+ DC F'70000' // TLRCNT 0045F4 00000001 36241+ DC F'1' // TIGCNT 0045F8 00000001 36242+ DC F'1' // TLTYPE 001FFA 36243+TEXT CSECT 001FFA E3F9F6F0 36244+SPTR3329 DC C'T960' 0045FC 36245+TDSCDAT CSECT 0045FC 36246+ DS 0F 0045FC 04001FFA 36247+ DC AL1(L'SPTR3329),AL3(SPTR3329) 001FFE 36248+TEXT CSECT 001FFE E3F7F0F040F1A2A3 36249+SPTR3330 DC C'T700 1st 10' PAGE 662 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004600 36250+TDSCDAT CSECT 004600 36251+ DS 0F 004600 0B001FFE 36252+ DC AL1(L'SPTR3330),AL3(SPTR3330) 36253+* 004DE8 36254+TDSCTBL CSECT 04DE8 36255+T960TPTR EQU * 004DE8 010045E8 36256+ DC X'01',AL3(T960TDSC) disabled test 36257+* 0170DC 36258+TCODE CSECT 0170E0 36259+ DS 0D ensure double word alignment for test 0170E0 36260+T960 DS 0H 01650000 0170E0 90EC D00C 0000C 36261+ STM 14,12,12(13) SAVE REGISTERS 02950000 0170E4 18CF 36262+ LR R12,R15 base register := entry address 170E0 36263+ USING T960,R12 declare code base register 0170E6 41B0 C01E 170FE 36264+ LA R11,T960L load loop target to R11 0170EA 58F0 C048 17128 36265+ L R15,=A(SAVETST) R15 := current save area 0170EE 50DF 0004 00004 36266+ ST R13,4(R15) set back pointer in current save area 0170F2 182D 36267+ LR R2,R13 remember callers save area 0170F4 18DF 36268+ LR R13,R15 setup current save area 0170F6 50D2 0008 00008 36269+ ST R13,8(R2) set forw pointer in callers save area 00000 36270+ USING TDSC,R1 declare TDSC base register 0170FA 58F0 1008 00008 36271+ L R15,TLRCNT load local repeat count to R15 36272+* 36273 * 170FE 36274 T960L EQU * 0170FE 4120 0001 00001 36275 LA R2,1 R2 :=00000001 FIN 01 017102 1832 36276 LR R3,R2 R3 :=00000001 02 017104 8B30 0008 00008 36277 SLA R3,8 R3 :=00000100 FIN 03 017108 1744 36278 XR R4,R4 R4 :=00000000 04 01710A 1643 36279 OR R4,R3 R4 :=00000100 05 01710C 0640 36280 BCTR R4,0 R4 :=000000FF FIN 06 01710E 1354 36281 LCR R5,R4 R5 :=FFFFFF01 07 017110 8950 0002 00002 36282 SLL R5,2 R5 :=FFFFFC04 FIN 08 017114 1065 36283 LPR R6,R5 R6 :=000003FC 09 017116 1A61 36284 AR R6,R1 R6 :=000003FD 10 017118 06FB 36285 BCTR R15,R11 36286 TSIMRET 01711A 58F0 C048 17128 36287+ L R15,=A(SAVETST) R15 := current save area 01711E 58DF 0004 00004 36288+ L R13,4(R15) get old save area back 017122 98EC D00C 0000C 36289+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017126 07FE 36290+ BR 14 RETURN 02000000 36291 TSIMEND 017128 36292+ LTORG 017128 00000458 36293 =A(SAVETST) 1712C 36294+T960TEND EQU * 36295 * 36296 * Test 961 -- Mix Int RR 1st 11 ---------------------------- 36297 * 36298 TSIMBEG T961,65000,1,1,C'T700 1st 11',DIS=1 36299+* 004604 36300+TDSCDAT CSECT 004608 36301+ DS 0D 36302+* 004608 00017130 36303+T961TDSC DC A(T961) // TENTRY 00460C 00000054 36304+ DC A(T961TEND-T961) // TLENGTH PAGE 663 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004610 0000FDE8 36305+ DC F'65000' // TLRCNT 004614 00000001 36306+ DC F'1' // TIGCNT 004618 00000001 36307+ DC F'1' // TLTYPE 002009 36308+TEXT CSECT 002009 E3F9F6F1 36309+SPTR3338 DC C'T961' 00461C 36310+TDSCDAT CSECT 00461C 36311+ DS 0F 00461C 04002009 36312+ DC AL1(L'SPTR3338),AL3(SPTR3338) 00200D 36313+TEXT CSECT 00200D E3F7F0F040F1A2A3 36314+SPTR3339 DC C'T700 1st 11' 004620 36315+TDSCDAT CSECT 004620 36316+ DS 0F 004620 0B00200D 36317+ DC AL1(L'SPTR3339),AL3(SPTR3339) 36318+* 004DEC 36319+TDSCTBL CSECT 04DEC 36320+T961TPTR EQU * 004DEC 01004608 36321+ DC X'01',AL3(T961TDSC) disabled test 36322+* 01712C 36323+TCODE CSECT 017130 36324+ DS 0D ensure double word alignment for test 017130 36325+T961 DS 0H 01650000 017130 90EC D00C 0000C 36326+ STM 14,12,12(13) SAVE REGISTERS 02950000 017134 18CF 36327+ LR R12,R15 base register := entry address 17130 36328+ USING T961,R12 declare code base register 017136 41B0 C01E 1714E 36329+ LA R11,T961L load loop target to R11 01713A 58F0 C050 17180 36330+ L R15,=A(SAVETST) R15 := current save area 01713E 50DF 0004 00004 36331+ ST R13,4(R15) set back pointer in current save area 017142 182D 36332+ LR R2,R13 remember callers save area 017144 18DF 36333+ LR R13,R15 setup current save area 017146 50D2 0008 00008 36334+ ST R13,8(R2) set forw pointer in callers save area 00000 36335+ USING TDSC,R1 declare TDSC base register 01714A 58F0 1008 00008 36336+ L R15,TLRCNT load local repeat count to R15 36337+* 36338 * 1714E 36339 T961L EQU * 01714E 4120 0001 00001 36340 LA R2,1 R2 :=00000001 FIN 01 017152 1832 36341 LR R3,R2 R3 :=00000001 02 017154 8B30 0008 00008 36342 SLA R3,8 R3 :=00000100 FIN 03 017158 1744 36343 XR R4,R4 R4 :=00000000 04 01715A 1643 36344 OR R4,R3 R4 :=00000100 05 01715C 0640 36345 BCTR R4,0 R4 :=000000FF FIN 06 01715E 1354 36346 LCR R5,R4 R5 :=FFFFFF01 07 017160 8950 0002 00002 36347 SLL R5,2 R5 :=FFFFFC04 FIN 08 017164 1065 36348 LPR R6,R5 R6 :=000003FC 09 017166 1A61 36349 AR R6,R1 R6 :=000003FD 10 017168 1961 36350 CR R6,R1 != 11 01716A 06FB 36351 BCTR R15,R11 36352 TSIMRET 01716C 58F0 C050 17180 36353+ L R15,=A(SAVETST) R15 := current save area 017170 58DF 0004 00004 36354+ L R13,4(R15) get old save area back 017174 98EC D00C 0000C 36355+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017178 07FE 36356+ BR 14 RETURN 02000000 36357 * 01717A 36358 DS 0H 36359 T961BAD ABEND 60 PAGE 664 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01717A 36360+T961BAD DS 0H 00400002 01717A 4110 003C 0003C 36361+ LA 1,60 LOAD PARAMETER REG 1 01900002 01717E 0A0D 36362+ SVC 13 LINK TO ABEND ROUTINE 02050002 36363 TSIMEND 017180 36364+ LTORG 017180 00000458 36365 =A(SAVETST) 17184 36366+T961TEND EQU * 36367 * 36368 * Test 962 -- Mix Int RR 1st 12 ---------------------------- 36369 * 36370 TSIMBEG T962,60000,1,1,C'T700 1st 12',DIS=1 36371+* 004624 36372+TDSCDAT CSECT 004628 36373+ DS 0D 36374+* 004628 00017188 36375+T962TDSC DC A(T962) // TENTRY 00462C 0000005C 36376+ DC A(T962TEND-T962) // TLENGTH 004630 0000EA60 36377+ DC F'60000' // TLRCNT 004634 00000001 36378+ DC F'1' // TIGCNT 004638 00000001 36379+ DC F'1' // TLTYPE 002018 36380+TEXT CSECT 002018 E3F9F6F2 36381+SPTR3349 DC C'T962' 00463C 36382+TDSCDAT CSECT 00463C 36383+ DS 0F 00463C 04002018 36384+ DC AL1(L'SPTR3349),AL3(SPTR3349) 00201C 36385+TEXT CSECT 00201C E3F7F0F040F1A2A3 36386+SPTR3350 DC C'T700 1st 12' 004640 36387+TDSCDAT CSECT 004640 36388+ DS 0F 004640 0B00201C 36389+ DC AL1(L'SPTR3350),AL3(SPTR3350) 36390+* 004DF0 36391+TDSCTBL CSECT 04DF0 36392+T962TPTR EQU * 004DF0 01004628 36393+ DC X'01',AL3(T962TDSC) disabled test 36394+* 017184 36395+TCODE CSECT 017188 36396+ DS 0D ensure double word alignment for test 017188 36397+T962 DS 0H 01650000 017188 90EC D00C 0000C 36398+ STM 14,12,12(13) SAVE REGISTERS 02950000 01718C 18CF 36399+ LR R12,R15 base register := entry address 17188 36400+ USING T962,R12 declare code base register 01718E 41B0 C01E 171A6 36401+ LA R11,T962L load loop target to R11 017192 58F0 C058 171E0 36402+ L R15,=A(SAVETST) R15 := current save area 017196 50DF 0004 00004 36403+ ST R13,4(R15) set back pointer in current save area 01719A 182D 36404+ LR R2,R13 remember callers save area 01719C 18DF 36405+ LR R13,R15 setup current save area 01719E 50D2 0008 00008 36406+ ST R13,8(R2) set forw pointer in callers save area 00000 36407+ USING TDSC,R1 declare TDSC base register 0171A2 58F0 1008 00008 36408+ L R15,TLRCNT load local repeat count to R15 36409+* 36410 * 171A6 36411 T962L EQU * 0171A6 4120 0001 00001 36412 LA R2,1 R2 :=00000001 FIN 01 0171AA 1832 36413 LR R3,R2 R3 :=00000001 02 0171AC 8B30 0008 00008 36414 SLA R3,8 R3 :=00000100 FIN 03 PAGE 665 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0171B0 1744 36415 XR R4,R4 R4 :=00000000 04 0171B2 1643 36416 OR R4,R3 R4 :=00000100 05 0171B4 0640 36417 BCTR R4,0 R4 :=000000FF FIN 06 0171B6 1354 36418 LCR R5,R4 R5 :=FFFFFF01 07 0171B8 8950 0002 00002 36419 SLL R5,2 R5 :=FFFFFC04 FIN 08 0171BC 1065 36420 LPR R6,R5 R6 :=000003FC 09 0171BE 1A61 36421 AR R6,R1 R6 :=000003FD 10 0171C0 1961 36422 CR R6,R1 != 11 0171C2 4780 C04E 171D6 36423 BE T962BAD 12 0171C6 06FB 36424 BCTR R15,R11 36425 TSIMRET 0171C8 58F0 C058 171E0 36426+ L R15,=A(SAVETST) R15 := current save area 0171CC 58DF 0004 00004 36427+ L R13,4(R15) get old save area back 0171D0 98EC D00C 0000C 36428+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0171D4 07FE 36429+ BR 14 RETURN 02000000 36430 * 0171D6 36431 DS 0H 36432 T962BAD ABEND 60 0171D6 36433+T962BAD DS 0H 00400002 0171D6 4110 003C 0003C 36434+ LA 1,60 LOAD PARAMETER REG 1 01900002 0171DA 0A0D 36435+ SVC 13 LINK TO ABEND ROUTINE 02050002 36436 TSIMEND 0171E0 36437+ LTORG 0171E0 00000458 36438 =A(SAVETST) 171E4 36439+T962TEND EQU * 36440 * 36441 * Test 963 -- Mix Int RR 1st 13 ---------------------------- 36442 * 36443 TSIMBEG T963,55000,1,1,C'T700 1st 13',DIS=1 36444+* 004644 36445+TDSCDAT CSECT 004648 36446+ DS 0D 36447+* 004648 000171E8 36448+T963TDSC DC A(T963) // TENTRY 00464C 0000005C 36449+ DC A(T963TEND-T963) // TLENGTH 004650 0000D6D8 36450+ DC F'55000' // TLRCNT 004654 00000001 36451+ DC F'1' // TIGCNT 004658 00000001 36452+ DC F'1' // TLTYPE 002027 36453+TEXT CSECT 002027 E3F9F6F3 36454+SPTR3360 DC C'T963' 00465C 36455+TDSCDAT CSECT 00465C 36456+ DS 0F 00465C 04002027 36457+ DC AL1(L'SPTR3360),AL3(SPTR3360) 00202B 36458+TEXT CSECT 00202B E3F7F0F040F1A2A3 36459+SPTR3361 DC C'T700 1st 13' 004660 36460+TDSCDAT CSECT 004660 36461+ DS 0F 004660 0B00202B 36462+ DC AL1(L'SPTR3361),AL3(SPTR3361) 36463+* 004DF4 36464+TDSCTBL CSECT 04DF4 36465+T963TPTR EQU * 004DF4 01004648 36466+ DC X'01',AL3(T963TDSC) disabled test 36467+* 0171E4 36468+TCODE CSECT 0171E8 36469+ DS 0D ensure double word alignment for test PAGE 666 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0171E8 36470+T963 DS 0H 01650000 0171E8 90EC D00C 0000C 36471+ STM 14,12,12(13) SAVE REGISTERS 02950000 0171EC 18CF 36472+ LR R12,R15 base register := entry address 171E8 36473+ USING T963,R12 declare code base register 0171EE 41B0 C01E 17206 36474+ LA R11,T963L load loop target to R11 0171F2 58F0 C058 17240 36475+ L R15,=A(SAVETST) R15 := current save area 0171F6 50DF 0004 00004 36476+ ST R13,4(R15) set back pointer in current save area 0171FA 182D 36477+ LR R2,R13 remember callers save area 0171FC 18DF 36478+ LR R13,R15 setup current save area 0171FE 50D2 0008 00008 36479+ ST R13,8(R2) set forw pointer in callers save area 00000 36480+ USING TDSC,R1 declare TDSC base register 017202 58F0 1008 00008 36481+ L R15,TLRCNT load local repeat count to R15 36482+* 36483 * 17206 36484 T963L EQU * 017206 4120 0001 00001 36485 LA R2,1 R2 :=00000001 FIN 01 01720A 1832 36486 LR R3,R2 R3 :=00000001 02 01720C 8B30 0008 00008 36487 SLA R3,8 R3 :=00000100 FIN 03 017210 1744 36488 XR R4,R4 R4 :=00000000 04 017212 1643 36489 OR R4,R3 R4 :=00000100 05 017214 0640 36490 BCTR R4,0 R4 :=000000FF FIN 06 017216 1354 36491 LCR R5,R4 R5 :=FFFFFF01 07 017218 8950 0002 00002 36492 SLL R5,2 R5 :=FFFFFC04 FIN 08 01721C 1065 36493 LPR R6,R5 R6 :=000003FC 09 01721E 1A61 36494 AR R6,R1 R6 :=000003FD 10 017220 1961 36495 CR R6,R1 != 11 017222 4780 C050 17238 36496 BE T963BAD 12 017226 1173 36497 LNR R7,R3 R7 :=FFFFFF00 13 017228 06FB 36498 BCTR R15,R11 36499 TSIMRET 01722A 58F0 C058 17240 36500+ L R15,=A(SAVETST) R15 := current save area 01722E 58DF 0004 00004 36501+ L R13,4(R15) get old save area back 017232 98EC D00C 0000C 36502+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017236 07FE 36503+ BR 14 RETURN 02000000 36504 * 017238 36505 DS 0H 36506 T963BAD ABEND 60 017238 36507+T963BAD DS 0H 00400002 017238 4110 003C 0003C 36508+ LA 1,60 LOAD PARAMETER REG 1 01900002 01723C 0A0D 36509+ SVC 13 LINK TO ABEND ROUTINE 02050002 36510 TSIMEND 017240 36511+ LTORG 017240 00000458 36512 =A(SAVETST) 17244 36513+T963TEND EQU * 36514 * 36515 * Test 964 -- Mix Int RR 1st 14 ---------------------------- 36516 * 36517 TSIMBEG T964,50000,1,1,C'T700 1st 14',DIS=1 36518+* 004664 36519+TDSCDAT CSECT 004668 36520+ DS 0D 36521+* 004668 00017248 36522+T964TDSC DC A(T964) // TENTRY 00466C 0000005C 36523+ DC A(T964TEND-T964) // TLENGTH 004670 0000C350 36524+ DC F'50000' // TLRCNT PAGE 667 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004674 00000001 36525+ DC F'1' // TIGCNT 004678 00000001 36526+ DC F'1' // TLTYPE 002036 36527+TEXT CSECT 002036 E3F9F6F4 36528+SPTR3371 DC C'T964' 00467C 36529+TDSCDAT CSECT 00467C 36530+ DS 0F 00467C 04002036 36531+ DC AL1(L'SPTR3371),AL3(SPTR3371) 00203A 36532+TEXT CSECT 00203A E3F7F0F040F1A2A3 36533+SPTR3372 DC C'T700 1st 14' 004680 36534+TDSCDAT CSECT 004680 36535+ DS 0F 004680 0B00203A 36536+ DC AL1(L'SPTR3372),AL3(SPTR3372) 36537+* 004DF8 36538+TDSCTBL CSECT 04DF8 36539+T964TPTR EQU * 004DF8 01004668 36540+ DC X'01',AL3(T964TDSC) disabled test 36541+* 017244 36542+TCODE CSECT 017248 36543+ DS 0D ensure double word alignment for test 017248 36544+T964 DS 0H 01650000 017248 90EC D00C 0000C 36545+ STM 14,12,12(13) SAVE REGISTERS 02950000 01724C 18CF 36546+ LR R12,R15 base register := entry address 17248 36547+ USING T964,R12 declare code base register 01724E 41B0 C01E 17266 36548+ LA R11,T964L load loop target to R11 017252 58F0 C058 172A0 36549+ L R15,=A(SAVETST) R15 := current save area 017256 50DF 0004 00004 36550+ ST R13,4(R15) set back pointer in current save area 01725A 182D 36551+ LR R2,R13 remember callers save area 01725C 18DF 36552+ LR R13,R15 setup current save area 01725E 50D2 0008 00008 36553+ ST R13,8(R2) set forw pointer in callers save area 00000 36554+ USING TDSC,R1 declare TDSC base register 017262 58F0 1008 00008 36555+ L R15,TLRCNT load local repeat count to R15 36556+* 36557 * 17266 36558 T964L EQU * 017266 4120 0001 00001 36559 LA R2,1 R2 :=00000001 FIN 01 01726A 1832 36560 LR R3,R2 R3 :=00000001 02 01726C 8B30 0008 00008 36561 SLA R3,8 R3 :=00000100 FIN 03 017270 1744 36562 XR R4,R4 R4 :=00000000 04 017272 1643 36563 OR R4,R3 R4 :=00000100 05 017274 0640 36564 BCTR R4,0 R4 :=000000FF FIN 06 017276 1354 36565 LCR R5,R4 R5 :=FFFFFF01 07 017278 8950 0002 00002 36566 SLL R5,2 R5 :=FFFFFC04 FIN 08 01727C 1065 36567 LPR R6,R5 R6 :=000003FC 09 01727E 1A61 36568 AR R6,R1 R6 :=000003FD 10 017280 1961 36569 CR R6,R1 != 11 017282 4780 C052 1729A 36570 BE T964BAD 12 017286 1173 36571 LNR R7,R3 R7 :=FFFFFF00 13 017288 1476 36572 NR R7,R6 R7 :=00000300 14 01728A 06FB 36573 BCTR R15,R11 36574 TSIMRET 01728C 58F0 C058 172A0 36575+ L R15,=A(SAVETST) R15 := current save area 017290 58DF 0004 00004 36576+ L R13,4(R15) get old save area back 017294 98EC D00C 0000C 36577+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017298 07FE 36578+ BR 14 RETURN 02000000 36579 * PAGE 668 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01729A 36580 DS 0H 36581 T964BAD ABEND 60 01729A 36582+T964BAD DS 0H 00400002 01729A 4110 003C 0003C 36583+ LA 1,60 LOAD PARAMETER REG 1 01900002 01729E 0A0D 36584+ SVC 13 LINK TO ABEND ROUTINE 02050002 36585 TSIMEND 0172A0 36586+ LTORG 0172A0 00000458 36587 =A(SAVETST) 172A4 36588+T964TEND EQU * 36589 * 36590 * Test 965 -- Mix Int RR 1st 15 ---------------------------- 36591 * 36592 TSIMBEG T965,50000,1,1,C'T700 1st 15',DIS=1 36593+* 004684 36594+TDSCDAT CSECT 004688 36595+ DS 0D 36596+* 004688 000172A8 36597+T965TDSC DC A(T965) // TENTRY 00468C 00000064 36598+ DC A(T965TEND-T965) // TLENGTH 004690 0000C350 36599+ DC F'50000' // TLRCNT 004694 00000001 36600+ DC F'1' // TIGCNT 004698 00000001 36601+ DC F'1' // TLTYPE 002045 36602+TEXT CSECT 002045 E3F9F6F5 36603+SPTR3382 DC C'T965' 00469C 36604+TDSCDAT CSECT 00469C 36605+ DS 0F 00469C 04002045 36606+ DC AL1(L'SPTR3382),AL3(SPTR3382) 002049 36607+TEXT CSECT 002049 E3F7F0F040F1A2A3 36608+SPTR3383 DC C'T700 1st 15' 0046A0 36609+TDSCDAT CSECT 0046A0 36610+ DS 0F 0046A0 0B002049 36611+ DC AL1(L'SPTR3383),AL3(SPTR3383) 36612+* 004DFC 36613+TDSCTBL CSECT 04DFC 36614+T965TPTR EQU * 004DFC 01004688 36615+ DC X'01',AL3(T965TDSC) disabled test 36616+* 0172A4 36617+TCODE CSECT 0172A8 36618+ DS 0D ensure double word alignment for test 0172A8 36619+T965 DS 0H 01650000 0172A8 90EC D00C 0000C 36620+ STM 14,12,12(13) SAVE REGISTERS 02950000 0172AC 18CF 36621+ LR R12,R15 base register := entry address 172A8 36622+ USING T965,R12 declare code base register 0172AE 41B0 C01E 172C6 36623+ LA R11,T965L load loop target to R11 0172B2 58F0 C060 17308 36624+ L R15,=A(SAVETST) R15 := current save area 0172B6 50DF 0004 00004 36625+ ST R13,4(R15) set back pointer in current save area 0172BA 182D 36626+ LR R2,R13 remember callers save area 0172BC 18DF 36627+ LR R13,R15 setup current save area 0172BE 50D2 0008 00008 36628+ ST R13,8(R2) set forw pointer in callers save area 00000 36629+ USING TDSC,R1 declare TDSC base register 0172C2 58F0 1008 00008 36630+ L R15,TLRCNT load local repeat count to R15 36631+* 36632 * 172C6 36633 T965L EQU * 0172C6 4120 0001 00001 36634 LA R2,1 R2 :=00000001 FIN 01 PAGE 669 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0172CA 1832 36635 LR R3,R2 R3 :=00000001 02 0172CC 8B30 0008 00008 36636 SLA R3,8 R3 :=00000100 FIN 03 0172D0 1744 36637 XR R4,R4 R4 :=00000000 04 0172D2 1643 36638 OR R4,R3 R4 :=00000100 05 0172D4 0640 36639 BCTR R4,0 R4 :=000000FF FIN 06 0172D6 1354 36640 LCR R5,R4 R5 :=FFFFFF01 07 0172D8 8950 0002 00002 36641 SLL R5,2 R5 :=FFFFFC04 FIN 08 0172DC 1065 36642 LPR R6,R5 R6 :=000003FC 09 0172DE 1A61 36643 AR R6,R1 R6 :=000003FD 10 0172E0 1961 36644 CR R6,R1 != 11 0172E2 4780 C056 172FE 36645 BE T965BAD 12 0172E6 1173 36646 LNR R7,R3 R7 :=FFFFFF00 13 0172E8 1476 36647 NR R7,R6 R7 :=00000300 14 0172EA 8A70 0002 00002 36648 SRA R7,2 R7 :=000000C0 15 0172EE 06FB 36649 BCTR R15,R11 36650 TSIMRET 0172F0 58F0 C060 17308 36651+ L R15,=A(SAVETST) R15 := current save area 0172F4 58DF 0004 00004 36652+ L R13,4(R15) get old save area back 0172F8 98EC D00C 0000C 36653+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0172FC 07FE 36654+ BR 14 RETURN 02000000 36655 * 0172FE 36656 DS 0H 36657 T965BAD ABEND 60 0172FE 36658+T965BAD DS 0H 00400002 0172FE 4110 003C 0003C 36659+ LA 1,60 LOAD PARAMETER REG 1 01900002 017302 0A0D 36660+ SVC 13 LINK TO ABEND ROUTINE 02050002 36661 TSIMEND 017308 36662+ LTORG 017308 00000458 36663 =A(SAVETST) 1730C 36664+T965TEND EQU * 36665 * 36666 * Test 966 -- Mix Int RR 1st 16 ---------------------------- 36667 * 36668 TSIMBEG T966,45000,1,1,C'T700 1st 16',DIS=1 36669+* 0046A4 36670+TDSCDAT CSECT 0046A8 36671+ DS 0D 36672+* 0046A8 00017310 36673+T966TDSC DC A(T966) // TENTRY 0046AC 00000064 36674+ DC A(T966TEND-T966) // TLENGTH 0046B0 0000AFC8 36675+ DC F'45000' // TLRCNT 0046B4 00000001 36676+ DC F'1' // TIGCNT 0046B8 00000001 36677+ DC F'1' // TLTYPE 002054 36678+TEXT CSECT 002054 E3F9F6F6 36679+SPTR3393 DC C'T966' 0046BC 36680+TDSCDAT CSECT 0046BC 36681+ DS 0F 0046BC 04002054 36682+ DC AL1(L'SPTR3393),AL3(SPTR3393) 002058 36683+TEXT CSECT 002058 E3F7F0F040F1A2A3 36684+SPTR3394 DC C'T700 1st 16' 0046C0 36685+TDSCDAT CSECT 0046C0 36686+ DS 0F 0046C0 0B002058 36687+ DC AL1(L'SPTR3394),AL3(SPTR3394) 36688+* 004E00 36689+TDSCTBL CSECT PAGE 670 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04E00 36690+T966TPTR EQU * 004E00 010046A8 36691+ DC X'01',AL3(T966TDSC) disabled test 36692+* 01730C 36693+TCODE CSECT 017310 36694+ DS 0D ensure double word alignment for test 017310 36695+T966 DS 0H 01650000 017310 90EC D00C 0000C 36696+ STM 14,12,12(13) SAVE REGISTERS 02950000 017314 18CF 36697+ LR R12,R15 base register := entry address 17310 36698+ USING T966,R12 declare code base register 017316 41B0 C01E 1732E 36699+ LA R11,T966L load loop target to R11 01731A 58F0 C060 17370 36700+ L R15,=A(SAVETST) R15 := current save area 01731E 50DF 0004 00004 36701+ ST R13,4(R15) set back pointer in current save area 017322 182D 36702+ LR R2,R13 remember callers save area 017324 18DF 36703+ LR R13,R15 setup current save area 017326 50D2 0008 00008 36704+ ST R13,8(R2) set forw pointer in callers save area 00000 36705+ USING TDSC,R1 declare TDSC base register 01732A 58F0 1008 00008 36706+ L R15,TLRCNT load local repeat count to R15 36707+* 36708 * 1732E 36709 T966L EQU * 01732E 4120 0001 00001 36710 LA R2,1 R2 :=00000001 FIN 01 017332 1832 36711 LR R3,R2 R3 :=00000001 02 017334 8B30 0008 00008 36712 SLA R3,8 R3 :=00000100 FIN 03 017338 1744 36713 XR R4,R4 R4 :=00000000 04 01733A 1643 36714 OR R4,R3 R4 :=00000100 05 01733C 0640 36715 BCTR R4,0 R4 :=000000FF FIN 06 01733E 1354 36716 LCR R5,R4 R5 :=FFFFFF01 07 017340 8950 0002 00002 36717 SLL R5,2 R5 :=FFFFFC04 FIN 08 017344 1065 36718 LPR R6,R5 R6 :=000003FC 09 017346 1A61 36719 AR R6,R1 R6 :=000003FD 10 017348 1961 36720 CR R6,R1 != 11 01734A 4780 C058 17368 36721 BE T966BAD 12 01734E 1173 36722 LNR R7,R3 R7 :=FFFFFF00 13 017350 1476 36723 NR R7,R6 R7 :=00000300 14 017352 8A70 0002 00002 36724 SRA R7,2 R7 :=000000C0 15 017356 1B74 36725 SR R7,R4 R7 :=FFFFFFC1 16 017358 06FB 36726 BCTR R15,R11 36727 TSIMRET 01735A 58F0 C060 17370 36728+ L R15,=A(SAVETST) R15 := current save area 01735E 58DF 0004 00004 36729+ L R13,4(R15) get old save area back 017362 98EC D00C 0000C 36730+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017366 07FE 36731+ BR 14 RETURN 02000000 36732 * 017368 36733 DS 0H 36734 T966BAD ABEND 60 017368 36735+T966BAD DS 0H 00400002 017368 4110 003C 0003C 36736+ LA 1,60 LOAD PARAMETER REG 1 01900002 01736C 0A0D 36737+ SVC 13 LINK TO ABEND ROUTINE 02050002 36738 TSIMEND 017370 36739+ LTORG 017370 00000458 36740 =A(SAVETST) 17374 36741+T966TEND EQU * 36742 * 36743 * Test 967 -- Mix Int RR 1st 17 ---------------------------- 36744 * PAGE 671 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 36745 TSIMBEG T967,45000,1,1,C'T700 1st 17',DIS=1 36746+* 0046C4 36747+TDSCDAT CSECT 0046C8 36748+ DS 0D 36749+* 0046C8 00017378 36750+T967TDSC DC A(T967) // TENTRY 0046CC 00000064 36751+ DC A(T967TEND-T967) // TLENGTH 0046D0 0000AFC8 36752+ DC F'45000' // TLRCNT 0046D4 00000001 36753+ DC F'1' // TIGCNT 0046D8 00000001 36754+ DC F'1' // TLTYPE 002063 36755+TEXT CSECT 002063 E3F9F6F7 36756+SPTR3404 DC C'T967' 0046DC 36757+TDSCDAT CSECT 0046DC 36758+ DS 0F 0046DC 04002063 36759+ DC AL1(L'SPTR3404),AL3(SPTR3404) 002067 36760+TEXT CSECT 002067 E3F7F0F040F1A2A3 36761+SPTR3405 DC C'T700 1st 17' 0046E0 36762+TDSCDAT CSECT 0046E0 36763+ DS 0F 0046E0 0B002067 36764+ DC AL1(L'SPTR3405),AL3(SPTR3405) 36765+* 004E04 36766+TDSCTBL CSECT 04E04 36767+T967TPTR EQU * 004E04 010046C8 36768+ DC X'01',AL3(T967TDSC) disabled test 36769+* 017374 36770+TCODE CSECT 017378 36771+ DS 0D ensure double word alignment for test 017378 36772+T967 DS 0H 01650000 017378 90EC D00C 0000C 36773+ STM 14,12,12(13) SAVE REGISTERS 02950000 01737C 18CF 36774+ LR R12,R15 base register := entry address 17378 36775+ USING T967,R12 declare code base register 01737E 41B0 C01E 17396 36776+ LA R11,T967L load loop target to R11 017382 58F0 C060 173D8 36777+ L R15,=A(SAVETST) R15 := current save area 017386 50DF 0004 00004 36778+ ST R13,4(R15) set back pointer in current save area 01738A 182D 36779+ LR R2,R13 remember callers save area 01738C 18DF 36780+ LR R13,R15 setup current save area 01738E 50D2 0008 00008 36781+ ST R13,8(R2) set forw pointer in callers save area 00000 36782+ USING TDSC,R1 declare TDSC base register 017392 58F0 1008 00008 36783+ L R15,TLRCNT load local repeat count to R15 36784+* 36785 * 17396 36786 T967L EQU * 017396 4120 0001 00001 36787 LA R2,1 R2 :=00000001 FIN 01 01739A 1832 36788 LR R3,R2 R3 :=00000001 02 01739C 8B30 0008 00008 36789 SLA R3,8 R3 :=00000100 FIN 03 0173A0 1744 36790 XR R4,R4 R4 :=00000000 04 0173A2 1643 36791 OR R4,R3 R4 :=00000100 05 0173A4 0640 36792 BCTR R4,0 R4 :=000000FF FIN 06 0173A6 1354 36793 LCR R5,R4 R5 :=FFFFFF01 07 0173A8 8950 0002 00002 36794 SLL R5,2 R5 :=FFFFFC04 FIN 08 0173AC 1065 36795 LPR R6,R5 R6 :=000003FC 09 0173AE 1A61 36796 AR R6,R1 R6 :=000003FD 10 0173B0 1961 36797 CR R6,R1 != 11 0173B2 4780 C05A 173D2 36798 BE T967BAD 12 0173B6 1173 36799 LNR R7,R3 R7 :=FFFFFF00 13 PAGE 672 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0173B8 1476 36800 NR R7,R6 R7 :=00000300 14 0173BA 8A70 0002 00002 36801 SRA R7,2 R7 :=000000C0 15 0173BE 1B74 36802 SR R7,R4 R7 :=FFFFFFC1 16 0173C0 1283 36803 LTR R8,R3 R8 :=00000100 17 0173C2 06FB 36804 BCTR R15,R11 36805 TSIMRET 0173C4 58F0 C060 173D8 36806+ L R15,=A(SAVETST) R15 := current save area 0173C8 58DF 0004 00004 36807+ L R13,4(R15) get old save area back 0173CC 98EC D00C 0000C 36808+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0173D0 07FE 36809+ BR 14 RETURN 02000000 36810 * 0173D2 36811 DS 0H 36812 T967BAD ABEND 60 0173D2 36813+T967BAD DS 0H 00400002 0173D2 4110 003C 0003C 36814+ LA 1,60 LOAD PARAMETER REG 1 01900002 0173D6 0A0D 36815+ SVC 13 LINK TO ABEND ROUTINE 02050002 36816 TSIMEND 0173D8 36817+ LTORG 0173D8 00000458 36818 =A(SAVETST) 173DC 36819+T967TEND EQU * 36820 * 36821 * Test 968 -- Mix Int RR 1st 18 ---------------------------- 36822 * 36823 TSIMBEG T968,40000,1,1,C'T700 1st 18',DIS=1 36824+* 0046E4 36825+TDSCDAT CSECT 0046E8 36826+ DS 0D 36827+* 0046E8 000173E0 36828+T968TDSC DC A(T968) // TENTRY 0046EC 0000006C 36829+ DC A(T968TEND-T968) // TLENGTH 0046F0 00009C40 36830+ DC F'40000' // TLRCNT 0046F4 00000001 36831+ DC F'1' // TIGCNT 0046F8 00000001 36832+ DC F'1' // TLTYPE 002072 36833+TEXT CSECT 002072 E3F9F6F8 36834+SPTR3415 DC C'T968' 0046FC 36835+TDSCDAT CSECT 0046FC 36836+ DS 0F 0046FC 04002072 36837+ DC AL1(L'SPTR3415),AL3(SPTR3415) 002076 36838+TEXT CSECT 002076 E3F7F0F040F1A2A3 36839+SPTR3416 DC C'T700 1st 18' 004700 36840+TDSCDAT CSECT 004700 36841+ DS 0F 004700 0B002076 36842+ DC AL1(L'SPTR3416),AL3(SPTR3416) 36843+* 004E08 36844+TDSCTBL CSECT 04E08 36845+T968TPTR EQU * 004E08 010046E8 36846+ DC X'01',AL3(T968TDSC) disabled test 36847+* 0173DC 36848+TCODE CSECT 0173E0 36849+ DS 0D ensure double word alignment for test 0173E0 36850+T968 DS 0H 01650000 0173E0 90EC D00C 0000C 36851+ STM 14,12,12(13) SAVE REGISTERS 02950000 0173E4 18CF 36852+ LR R12,R15 base register := entry address 173E0 36853+ USING T968,R12 declare code base register 0173E6 41B0 C01E 173FE 36854+ LA R11,T968L load loop target to R11 PAGE 673 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0173EA 58F0 C068 17448 36855+ L R15,=A(SAVETST) R15 := current save area 0173EE 50DF 0004 00004 36856+ ST R13,4(R15) set back pointer in current save area 0173F2 182D 36857+ LR R2,R13 remember callers save area 0173F4 18DF 36858+ LR R13,R15 setup current save area 0173F6 50D2 0008 00008 36859+ ST R13,8(R2) set forw pointer in callers save area 00000 36860+ USING TDSC,R1 declare TDSC base register 0173FA 58F0 1008 00008 36861+ L R15,TLRCNT load local repeat count to R15 36862+* 36863 * 173FE 36864 T968L EQU * 0173FE 4120 0001 00001 36865 LA R2,1 R2 :=00000001 FIN 01 017402 1832 36866 LR R3,R2 R3 :=00000001 02 017404 8B30 0008 00008 36867 SLA R3,8 R3 :=00000100 FIN 03 017408 1744 36868 XR R4,R4 R4 :=00000000 04 01740A 1643 36869 OR R4,R3 R4 :=00000100 05 01740C 0640 36870 BCTR R4,0 R4 :=000000FF FIN 06 01740E 1354 36871 LCR R5,R4 R5 :=FFFFFF01 07 017410 8950 0002 00002 36872 SLL R5,2 R5 :=FFFFFC04 FIN 08 017414 1065 36873 LPR R6,R5 R6 :=000003FC 09 017416 1A61 36874 AR R6,R1 R6 :=000003FD 10 017418 1961 36875 CR R6,R1 != 11 01741A 4780 C05E 1743E 36876 BE T968BAD 12 01741E 1173 36877 LNR R7,R3 R7 :=FFFFFF00 13 017420 1476 36878 NR R7,R6 R7 :=00000300 14 017422 8A70 0002 00002 36879 SRA R7,2 R7 :=000000C0 15 017426 1B74 36880 SR R7,R4 R7 :=FFFFFFC1 16 017428 1283 36881 LTR R8,R3 R8 :=00000100 17 01742A 8880 0001 00001 36882 SRL R8,1 R8 :=00000080 18 01742E 06FB 36883 BCTR R15,R11 36884 TSIMRET 017430 58F0 C068 17448 36885+ L R15,=A(SAVETST) R15 := current save area 017434 58DF 0004 00004 36886+ L R13,4(R15) get old save area back 017438 98EC D00C 0000C 36887+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01743C 07FE 36888+ BR 14 RETURN 02000000 36889 * 01743E 36890 DS 0H 36891 T968BAD ABEND 60 01743E 36892+T968BAD DS 0H 00400002 01743E 4110 003C 0003C 36893+ LA 1,60 LOAD PARAMETER REG 1 01900002 017442 0A0D 36894+ SVC 13 LINK TO ABEND ROUTINE 02050002 36895 TSIMEND 017448 36896+ LTORG 017448 00000458 36897 =A(SAVETST) 1744C 36898+T968TEND EQU * 36899 * 36900 * Test 969 -- Mix Int RR 1st 19 ---------------------------- 36901 * 36902 TSIMBEG T969,40000,1,1,C'T700 1st 19',DIS=1 36903+* 004704 36904+TDSCDAT CSECT 004708 36905+ DS 0D 36906+* 004708 00017450 36907+T969TDSC DC A(T969) // TENTRY 00470C 0000006C 36908+ DC A(T969TEND-T969) // TLENGTH 004710 00009C40 36909+ DC F'40000' // TLRCNT PAGE 674 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004714 00000001 36910+ DC F'1' // TIGCNT 004718 00000001 36911+ DC F'1' // TLTYPE 002081 36912+TEXT CSECT 002081 E3F9F6F9 36913+SPTR3426 DC C'T969' 00471C 36914+TDSCDAT CSECT 00471C 36915+ DS 0F 00471C 04002081 36916+ DC AL1(L'SPTR3426),AL3(SPTR3426) 002085 36917+TEXT CSECT 002085 E3F7F0F040F1A2A3 36918+SPTR3427 DC C'T700 1st 19' 004720 36919+TDSCDAT CSECT 004720 36920+ DS 0F 004720 0B002085 36921+ DC AL1(L'SPTR3427),AL3(SPTR3427) 36922+* 004E0C 36923+TDSCTBL CSECT 04E0C 36924+T969TPTR EQU * 004E0C 01004708 36925+ DC X'01',AL3(T969TDSC) disabled test 36926+* 01744C 36927+TCODE CSECT 017450 36928+ DS 0D ensure double word alignment for test 017450 36929+T969 DS 0H 01650000 017450 90EC D00C 0000C 36930+ STM 14,12,12(13) SAVE REGISTERS 02950000 017454 18CF 36931+ LR R12,R15 base register := entry address 17450 36932+ USING T969,R12 declare code base register 017456 41B0 C01E 1746E 36933+ LA R11,T969L load loop target to R11 01745A 58F0 C068 174B8 36934+ L R15,=A(SAVETST) R15 := current save area 01745E 50DF 0004 00004 36935+ ST R13,4(R15) set back pointer in current save area 017462 182D 36936+ LR R2,R13 remember callers save area 017464 18DF 36937+ LR R13,R15 setup current save area 017466 50D2 0008 00008 36938+ ST R13,8(R2) set forw pointer in callers save area 00000 36939+ USING TDSC,R1 declare TDSC base register 01746A 58F0 1008 00008 36940+ L R15,TLRCNT load local repeat count to R15 36941+* 36942 * 1746E 36943 T969L EQU * 01746E 4120 0001 00001 36944 LA R2,1 R2 :=00000001 FIN 01 017472 1832 36945 LR R3,R2 R3 :=00000001 02 017474 8B30 0008 00008 36946 SLA R3,8 R3 :=00000100 FIN 03 017478 1744 36947 XR R4,R4 R4 :=00000000 04 01747A 1643 36948 OR R4,R3 R4 :=00000100 05 01747C 0640 36949 BCTR R4,0 R4 :=000000FF FIN 06 01747E 1354 36950 LCR R5,R4 R5 :=FFFFFF01 07 017480 8950 0002 00002 36951 SLL R5,2 R5 :=FFFFFC04 FIN 08 017484 1065 36952 LPR R6,R5 R6 :=000003FC 09 017486 1A61 36953 AR R6,R1 R6 :=000003FD 10 017488 1961 36954 CR R6,R1 != 11 01748A 4780 C060 174B0 36955 BE T969BAD 12 01748E 1173 36956 LNR R7,R3 R7 :=FFFFFF00 13 017490 1476 36957 NR R7,R6 R7 :=00000300 14 017492 8A70 0002 00002 36958 SRA R7,2 R7 :=000000C0 15 017496 1B74 36959 SR R7,R4 R7 :=FFFFFFC1 16 017498 1283 36960 LTR R8,R3 R8 :=00000100 17 01749A 8880 0001 00001 36961 SRL R8,1 R8 :=00000080 18 01749E 1E83 36962 ALR R8,R3 R8 :=00000180 19 0174A0 06FB 36963 BCTR R15,R11 36964 TSIMRET PAGE 675 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0174A2 58F0 C068 174B8 36965+ L R15,=A(SAVETST) R15 := current save area 0174A6 58DF 0004 00004 36966+ L R13,4(R15) get old save area back 0174AA 98EC D00C 0000C 36967+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0174AE 07FE 36968+ BR 14 RETURN 02000000 36969 * 0174B0 36970 DS 0H 36971 T969BAD ABEND 60 0174B0 36972+T969BAD DS 0H 00400002 0174B0 4110 003C 0003C 36973+ LA 1,60 LOAD PARAMETER REG 1 01900002 0174B4 0A0D 36974+ SVC 13 LINK TO ABEND ROUTINE 02050002 36975 TSIMEND 0174B8 36976+ LTORG 0174B8 00000458 36977 =A(SAVETST) 174BC 36978+T969TEND EQU * 36979 * 36980 * Test 970 -- Mix Int RR 1st 20 ---------------------------- 36981 * 36982 TSIMBEG T970,40000,1,1,C'T700 1st 20',DIS=1 36983+* 004724 36984+TDSCDAT CSECT 004728 36985+ DS 0D 36986+* 004728 000174C0 36987+T970TDSC DC A(T970) // TENTRY 00472C 0000006C 36988+ DC A(T970TEND-T970) // TLENGTH 004730 00009C40 36989+ DC F'40000' // TLRCNT 004734 00000001 36990+ DC F'1' // TIGCNT 004738 00000001 36991+ DC F'1' // TLTYPE 002090 36992+TEXT CSECT 002090 E3F9F7F0 36993+SPTR3437 DC C'T970' 00473C 36994+TDSCDAT CSECT 00473C 36995+ DS 0F 00473C 04002090 36996+ DC AL1(L'SPTR3437),AL3(SPTR3437) 002094 36997+TEXT CSECT 002094 E3F7F0F040F1A2A3 36998+SPTR3438 DC C'T700 1st 20' 004740 36999+TDSCDAT CSECT 004740 37000+ DS 0F 004740 0B002094 37001+ DC AL1(L'SPTR3438),AL3(SPTR3438) 37002+* 004E10 37003+TDSCTBL CSECT 04E10 37004+T970TPTR EQU * 004E10 01004728 37005+ DC X'01',AL3(T970TDSC) disabled test 37006+* 0174BC 37007+TCODE CSECT 0174C0 37008+ DS 0D ensure double word alignment for test 0174C0 37009+T970 DS 0H 01650000 0174C0 90EC D00C 0000C 37010+ STM 14,12,12(13) SAVE REGISTERS 02950000 0174C4 18CF 37011+ LR R12,R15 base register := entry address 174C0 37012+ USING T970,R12 declare code base register 0174C6 41B0 C01E 174DE 37013+ LA R11,T970L load loop target to R11 0174CA 58F0 C068 17528 37014+ L R15,=A(SAVETST) R15 := current save area 0174CE 50DF 0004 00004 37015+ ST R13,4(R15) set back pointer in current save area 0174D2 182D 37016+ LR R2,R13 remember callers save area 0174D4 18DF 37017+ LR R13,R15 setup current save area 0174D6 50D2 0008 00008 37018+ ST R13,8(R2) set forw pointer in callers save area 00000 37019+ USING TDSC,R1 declare TDSC base register PAGE 676 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0174DA 58F0 1008 00008 37020+ L R15,TLRCNT load local repeat count to R15 37021+* 37022 * 174DE 37023 T970L EQU * 0174DE 4120 0001 00001 37024 LA R2,1 R2 :=00000001 FIN 01 0174E2 1832 37025 LR R3,R2 R3 :=00000001 02 0174E4 8B30 0008 00008 37026 SLA R3,8 R3 :=00000100 FIN 03 0174E8 1744 37027 XR R4,R4 R4 :=00000000 04 0174EA 1643 37028 OR R4,R3 R4 :=00000100 05 0174EC 0640 37029 BCTR R4,0 R4 :=000000FF FIN 06 0174EE 1354 37030 LCR R5,R4 R5 :=FFFFFF01 07 0174F0 8950 0002 00002 37031 SLL R5,2 R5 :=FFFFFC04 FIN 08 0174F4 1065 37032 LPR R6,R5 R6 :=000003FC 09 0174F6 1A61 37033 AR R6,R1 R6 :=000003FD 10 0174F8 1961 37034 CR R6,R1 != 11 0174FA 4780 C062 17522 37035 BE T970BAD 12 0174FE 1173 37036 LNR R7,R3 R7 :=FFFFFF00 13 017500 1476 37037 NR R7,R6 R7 :=00000300 14 017502 8A70 0002 00002 37038 SRA R7,2 R7 :=000000C0 15 017506 1B74 37039 SR R7,R4 R7 :=FFFFFFC1 16 017508 1283 37040 LTR R8,R3 R8 :=00000100 17 01750A 8880 0001 00001 37041 SRL R8,1 R8 :=00000080 18 01750E 1E83 37042 ALR R8,R3 R8 :=00000180 19 017510 1F87 37043 SLR R8,R7 R8 :=000001BF 20 017512 06FB 37044 BCTR R15,R11 37045 TSIMRET 017514 58F0 C068 17528 37046+ L R15,=A(SAVETST) R15 := current save area 017518 58DF 0004 00004 37047+ L R13,4(R15) get old save area back 01751C 98EC D00C 0000C 37048+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017520 07FE 37049+ BR 14 RETURN 02000000 37050 * 017522 37051 DS 0H 37052 T970BAD ABEND 60 017522 37053+T970BAD DS 0H 00400002 017522 4110 003C 0003C 37054+ LA 1,60 LOAD PARAMETER REG 1 01900002 017526 0A0D 37055+ SVC 13 LINK TO ABEND ROUTINE 02050002 37056 TSIMEND 017528 37057+ LTORG 017528 00000458 37058 =A(SAVETST) 1752C 37059+T970TEND EQU * 37060 * 37061 * Test 971 -- Mix Int RR 1st 21 ---------------------------- 37062 * 37063 TSIMBEG T971,35000,1,1,C'T700 1st 21',DIS=1 37064+* 004744 37065+TDSCDAT CSECT 004748 37066+ DS 0D 37067+* 004748 00017530 37068+T971TDSC DC A(T971) // TENTRY 00474C 00000074 37069+ DC A(T971TEND-T971) // TLENGTH 004750 000088B8 37070+ DC F'35000' // TLRCNT 004754 00000001 37071+ DC F'1' // TIGCNT 004758 00000001 37072+ DC F'1' // TLTYPE 00209F 37073+TEXT CSECT 00209F E3F9F7F1 37074+SPTR3448 DC C'T971' PAGE 677 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00475C 37075+TDSCDAT CSECT 00475C 37076+ DS 0F 00475C 0400209F 37077+ DC AL1(L'SPTR3448),AL3(SPTR3448) 0020A3 37078+TEXT CSECT 0020A3 E3F7F0F040F1A2A3 37079+SPTR3449 DC C'T700 1st 21' 004760 37080+TDSCDAT CSECT 004760 37081+ DS 0F 004760 0B0020A3 37082+ DC AL1(L'SPTR3449),AL3(SPTR3449) 37083+* 004E14 37084+TDSCTBL CSECT 04E14 37085+T971TPTR EQU * 004E14 01004748 37086+ DC X'01',AL3(T971TDSC) disabled test 37087+* 01752C 37088+TCODE CSECT 017530 37089+ DS 0D ensure double word alignment for test 017530 37090+T971 DS 0H 01650000 017530 90EC D00C 0000C 37091+ STM 14,12,12(13) SAVE REGISTERS 02950000 017534 18CF 37092+ LR R12,R15 base register := entry address 17530 37093+ USING T971,R12 declare code base register 017536 41B0 C01E 1754E 37094+ LA R11,T971L load loop target to R11 01753A 58F0 C070 175A0 37095+ L R15,=A(SAVETST) R15 := current save area 01753E 50DF 0004 00004 37096+ ST R13,4(R15) set back pointer in current save area 017542 182D 37097+ LR R2,R13 remember callers save area 017544 18DF 37098+ LR R13,R15 setup current save area 017546 50D2 0008 00008 37099+ ST R13,8(R2) set forw pointer in callers save area 00000 37100+ USING TDSC,R1 declare TDSC base register 01754A 58F0 1008 00008 37101+ L R15,TLRCNT load local repeat count to R15 37102+* 37103 * 1754E 37104 T971L EQU * 01754E 4120 0001 00001 37105 LA R2,1 R2 :=00000001 FIN 01 017552 1832 37106 LR R3,R2 R3 :=00000001 02 017554 8B30 0008 00008 37107 SLA R3,8 R3 :=00000100 FIN 03 017558 1744 37108 XR R4,R4 R4 :=00000000 04 01755A 1643 37109 OR R4,R3 R4 :=00000100 05 01755C 0640 37110 BCTR R4,0 R4 :=000000FF FIN 06 01755E 1354 37111 LCR R5,R4 R5 :=FFFFFF01 07 017560 8950 0002 00002 37112 SLL R5,2 R5 :=FFFFFC04 FIN 08 017564 1065 37113 LPR R6,R5 R6 :=000003FC 09 017566 1A61 37114 AR R6,R1 R6 :=000003FD 10 017568 1961 37115 CR R6,R1 != 11 01756A 4780 C064 17594 37116 BE T971BAD 12 01756E 1173 37117 LNR R7,R3 R7 :=FFFFFF00 13 017570 1476 37118 NR R7,R6 R7 :=00000300 14 017572 8A70 0002 00002 37119 SRA R7,2 R7 :=000000C0 15 017576 1B74 37120 SR R7,R4 R7 :=FFFFFFC1 16 017578 1283 37121 LTR R8,R3 R8 :=00000100 17 01757A 8880 0001 00001 37122 SRL R8,1 R8 :=00000080 18 01757E 1E83 37123 ALR R8,R3 R8 :=00000180 19 017580 1F87 37124 SLR R8,R7 R8 :=000001BF 20 017582 1583 37125 CLR R8,R3 != 21 017584 06FB 37126 BCTR R15,R11 37127 TSIMRET 017586 58F0 C070 175A0 37128+ L R15,=A(SAVETST) R15 := current save area 01758A 58DF 0004 00004 37129+ L R13,4(R15) get old save area back PAGE 678 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01758E 98EC D00C 0000C 37130+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017592 07FE 37131+ BR 14 RETURN 02000000 37132 * 017594 37133 DS 0H 37134 T971BAD ABEND 60 017594 37135+T971BAD DS 0H 00400002 017594 4110 003C 0003C 37136+ LA 1,60 LOAD PARAMETER REG 1 01900002 017598 0A0D 37137+ SVC 13 LINK TO ABEND ROUTINE 02050002 37138 TSIMEND 0175A0 37139+ LTORG 0175A0 00000458 37140 =A(SAVETST) 175A4 37141+T971TEND EQU * 37142 * 37143 * Test 972 -- Mix Int RR 1st 22 ---------------------------- 37144 * 37145 TSIMBEG T972,35000,1,1,C'T700 1st 22',DIS=1 37146+* 004764 37147+TDSCDAT CSECT 004768 37148+ DS 0D 37149+* 004768 000175A8 37150+T972TDSC DC A(T972) // TENTRY 00476C 00000074 37151+ DC A(T972TEND-T972) // TLENGTH 004770 000088B8 37152+ DC F'35000' // TLRCNT 004774 00000001 37153+ DC F'1' // TIGCNT 004778 00000001 37154+ DC F'1' // TLTYPE 0020AE 37155+TEXT CSECT 0020AE E3F9F7F2 37156+SPTR3459 DC C'T972' 00477C 37157+TDSCDAT CSECT 00477C 37158+ DS 0F 00477C 040020AE 37159+ DC AL1(L'SPTR3459),AL3(SPTR3459) 0020B2 37160+TEXT CSECT 0020B2 E3F7F0F040F1A2A3 37161+SPTR3460 DC C'T700 1st 22' 004780 37162+TDSCDAT CSECT 004780 37163+ DS 0F 004780 0B0020B2 37164+ DC AL1(L'SPTR3460),AL3(SPTR3460) 37165+* 004E18 37166+TDSCTBL CSECT 04E18 37167+T972TPTR EQU * 004E18 01004768 37168+ DC X'01',AL3(T972TDSC) disabled test 37169+* 0175A4 37170+TCODE CSECT 0175A8 37171+ DS 0D ensure double word alignment for test 0175A8 37172+T972 DS 0H 01650000 0175A8 90EC D00C 0000C 37173+ STM 14,12,12(13) SAVE REGISTERS 02950000 0175AC 18CF 37174+ LR R12,R15 base register := entry address 175A8 37175+ USING T972,R12 declare code base register 0175AE 41B0 C01E 175C6 37176+ LA R11,T972L load loop target to R11 0175B2 58F0 C070 17618 37177+ L R15,=A(SAVETST) R15 := current save area 0175B6 50DF 0004 00004 37178+ ST R13,4(R15) set back pointer in current save area 0175BA 182D 37179+ LR R2,R13 remember callers save area 0175BC 18DF 37180+ LR R13,R15 setup current save area 0175BE 50D2 0008 00008 37181+ ST R13,8(R2) set forw pointer in callers save area 00000 37182+ USING TDSC,R1 declare TDSC base register 0175C2 58F0 1008 00008 37183+ L R15,TLRCNT load local repeat count to R15 37184+* PAGE 679 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 37185 * 175C6 37186 T972L EQU * 0175C6 4120 0001 00001 37187 LA R2,1 R2 :=00000001 FIN 01 0175CA 1832 37188 LR R3,R2 R3 :=00000001 02 0175CC 8B30 0008 00008 37189 SLA R3,8 R3 :=00000100 FIN 03 0175D0 1744 37190 XR R4,R4 R4 :=00000000 04 0175D2 1643 37191 OR R4,R3 R4 :=00000100 05 0175D4 0640 37192 BCTR R4,0 R4 :=000000FF FIN 06 0175D6 1354 37193 LCR R5,R4 R5 :=FFFFFF01 07 0175D8 8950 0002 00002 37194 SLL R5,2 R5 :=FFFFFC04 FIN 08 0175DC 1065 37195 LPR R6,R5 R6 :=000003FC 09 0175DE 1A61 37196 AR R6,R1 R6 :=000003FD 10 0175E0 1961 37197 CR R6,R1 != 11 0175E2 4780 C068 17610 37198 BE T972BAD 12 0175E6 1173 37199 LNR R7,R3 R7 :=FFFFFF00 13 0175E8 1476 37200 NR R7,R6 R7 :=00000300 14 0175EA 8A70 0002 00002 37201 SRA R7,2 R7 :=000000C0 15 0175EE 1B74 37202 SR R7,R4 R7 :=FFFFFFC1 16 0175F0 1283 37203 LTR R8,R3 R8 :=00000100 17 0175F2 8880 0001 00001 37204 SRL R8,1 R8 :=00000080 18 0175F6 1E83 37205 ALR R8,R3 R8 :=00000180 19 0175F8 1F87 37206 SLR R8,R7 R8 :=000001BF 20 0175FA 1583 37207 CLR R8,R3 != 21 0175FC 4780 C068 17610 37208 BE T972BAD 22 017600 06FB 37209 BCTR R15,R11 37210 TSIMRET 017602 58F0 C070 17618 37211+ L R15,=A(SAVETST) R15 := current save area 017606 58DF 0004 00004 37212+ L R13,4(R15) get old save area back 01760A 98EC D00C 0000C 37213+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01760E 07FE 37214+ BR 14 RETURN 02000000 37215 * 017610 37216 DS 0H 37217 T972BAD ABEND 60 017610 37218+T972BAD DS 0H 00400002 017610 4110 003C 0003C 37219+ LA 1,60 LOAD PARAMETER REG 1 01900002 017614 0A0D 37220+ SVC 13 LINK TO ABEND ROUTINE 02050002 37221 TSIMEND 017618 37222+ LTORG 017618 00000458 37223 =A(SAVETST) 1761C 37224+T972TEND EQU * 37225 * 37226 * Test 973 -- Mix Int RR 1st 23 ---------------------------- 37227 * 37228 TSIMBEG T973,35000,1,1,C'T700 1st 23',DIS=1 37229+* 004784 37230+TDSCDAT CSECT 004788 37231+ DS 0D 37232+* 004788 00017620 37233+T973TDSC DC A(T973) // TENTRY 00478C 0000007C 37234+ DC A(T973TEND-T973) // TLENGTH 004790 000088B8 37235+ DC F'35000' // TLRCNT 004794 00000001 37236+ DC F'1' // TIGCNT 004798 00000001 37237+ DC F'1' // TLTYPE 0020BD 37238+TEXT CSECT 0020BD E3F9F7F3 37239+SPTR3470 DC C'T973' PAGE 680 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00479C 37240+TDSCDAT CSECT 00479C 37241+ DS 0F 00479C 040020BD 37242+ DC AL1(L'SPTR3470),AL3(SPTR3470) 0020C1 37243+TEXT CSECT 0020C1 E3F7F0F040F1A2A3 37244+SPTR3471 DC C'T700 1st 23' 0047A0 37245+TDSCDAT CSECT 0047A0 37246+ DS 0F 0047A0 0B0020C1 37247+ DC AL1(L'SPTR3471),AL3(SPTR3471) 37248+* 004E1C 37249+TDSCTBL CSECT 04E1C 37250+T973TPTR EQU * 004E1C 01004788 37251+ DC X'01',AL3(T973TDSC) disabled test 37252+* 01761C 37253+TCODE CSECT 017620 37254+ DS 0D ensure double word alignment for test 017620 37255+T973 DS 0H 01650000 017620 90EC D00C 0000C 37256+ STM 14,12,12(13) SAVE REGISTERS 02950000 017624 18CF 37257+ LR R12,R15 base register := entry address 17620 37258+ USING T973,R12 declare code base register 017626 41B0 C01E 1763E 37259+ LA R11,T973L load loop target to R11 01762A 58F0 C078 17698 37260+ L R15,=A(SAVETST) R15 := current save area 01762E 50DF 0004 00004 37261+ ST R13,4(R15) set back pointer in current save area 017632 182D 37262+ LR R2,R13 remember callers save area 017634 18DF 37263+ LR R13,R15 setup current save area 017636 50D2 0008 00008 37264+ ST R13,8(R2) set forw pointer in callers save area 00000 37265+ USING TDSC,R1 declare TDSC base register 01763A 58F0 1008 00008 37266+ L R15,TLRCNT load local repeat count to R15 37267+* 37268 * 1763E 37269 T973L EQU * 01763E 4120 0001 00001 37270 LA R2,1 R2 :=00000001 FIN 01 017642 1832 37271 LR R3,R2 R3 :=00000001 02 017644 8B30 0008 00008 37272 SLA R3,8 R3 :=00000100 FIN 03 017648 1744 37273 XR R4,R4 R4 :=00000000 04 01764A 1643 37274 OR R4,R3 R4 :=00000100 05 01764C 0640 37275 BCTR R4,0 R4 :=000000FF FIN 06 01764E 1354 37276 LCR R5,R4 R5 :=FFFFFF01 07 017650 8950 0002 00002 37277 SLL R5,2 R5 :=FFFFFC04 FIN 08 017654 1065 37278 LPR R6,R5 R6 :=000003FC 09 017656 1A61 37279 AR R6,R1 R6 :=000003FD 10 017658 1961 37280 CR R6,R1 != 11 01765A 4780 C06C 1768C 37281 BE T973BAD 12 01765E 1173 37282 LNR R7,R3 R7 :=FFFFFF00 13 017660 1476 37283 NR R7,R6 R7 :=00000300 14 017662 8A70 0002 00002 37284 SRA R7,2 R7 :=000000C0 15 017666 1B74 37285 SR R7,R4 R7 :=FFFFFFC1 16 017668 1283 37286 LTR R8,R3 R8 :=00000100 17 01766A 8880 0001 00001 37287 SRL R8,1 R8 :=00000080 18 01766E 1E83 37288 ALR R8,R3 R8 :=00000180 19 017670 1F87 37289 SLR R8,R7 R8 :=000001BF 20 017672 1583 37290 CLR R8,R3 != 21 017674 4780 C06C 1768C 37291 BE T973BAD 22 017678 4190 025A 0025A 37292 LA R9,602 R9 :=0000025A 23 01767C 06FB 37293 BCTR R15,R11 37294 TSIMRET PAGE 681 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01767E 58F0 C078 17698 37295+ L R15,=A(SAVETST) R15 := current save area 017682 58DF 0004 00004 37296+ L R13,4(R15) get old save area back 017686 98EC D00C 0000C 37297+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01768A 07FE 37298+ BR 14 RETURN 02000000 37299 * 01768C 37300 DS 0H 37301 T973BAD ABEND 60 01768C 37302+T973BAD DS 0H 00400002 01768C 4110 003C 0003C 37303+ LA 1,60 LOAD PARAMETER REG 1 01900002 017690 0A0D 37304+ SVC 13 LINK TO ABEND ROUTINE 02050002 37305 TSIMEND 017698 37306+ LTORG 017698 00000458 37307 =A(SAVETST) 1769C 37308+T973TEND EQU * 37309 * 37310 * Test 974 -- Mix Int RR 1st 24 ---------------------------- 37311 * 37312 TSIMBEG T974,30000,1,1,C'T700 1st 24',DIS=1 37313+* 0047A4 37314+TDSCDAT CSECT 0047A8 37315+ DS 0D 37316+* 0047A8 000176A0 37317+T974TDSC DC A(T974) // TENTRY 0047AC 0000007C 37318+ DC A(T974TEND-T974) // TLENGTH 0047B0 00007530 37319+ DC F'30000' // TLRCNT 0047B4 00000001 37320+ DC F'1' // TIGCNT 0047B8 00000001 37321+ DC F'1' // TLTYPE 0020CC 37322+TEXT CSECT 0020CC E3F9F7F4 37323+SPTR3481 DC C'T974' 0047BC 37324+TDSCDAT CSECT 0047BC 37325+ DS 0F 0047BC 040020CC 37326+ DC AL1(L'SPTR3481),AL3(SPTR3481) 0020D0 37327+TEXT CSECT 0020D0 E3F7F0F040F1A2A3 37328+SPTR3482 DC C'T700 1st 24' 0047C0 37329+TDSCDAT CSECT 0047C0 37330+ DS 0F 0047C0 0B0020D0 37331+ DC AL1(L'SPTR3482),AL3(SPTR3482) 37332+* 004E20 37333+TDSCTBL CSECT 04E20 37334+T974TPTR EQU * 004E20 010047A8 37335+ DC X'01',AL3(T974TDSC) disabled test 37336+* 01769C 37337+TCODE CSECT 0176A0 37338+ DS 0D ensure double word alignment for test 0176A0 37339+T974 DS 0H 01650000 0176A0 90EC D00C 0000C 37340+ STM 14,12,12(13) SAVE REGISTERS 02950000 0176A4 18CF 37341+ LR R12,R15 base register := entry address 176A0 37342+ USING T974,R12 declare code base register 0176A6 41B0 C01E 176BE 37343+ LA R11,T974L load loop target to R11 0176AA 58F0 C078 17718 37344+ L R15,=A(SAVETST) R15 := current save area 0176AE 50DF 0004 00004 37345+ ST R13,4(R15) set back pointer in current save area 0176B2 182D 37346+ LR R2,R13 remember callers save area 0176B4 18DF 37347+ LR R13,R15 setup current save area 0176B6 50D2 0008 00008 37348+ ST R13,8(R2) set forw pointer in callers save area 00000 37349+ USING TDSC,R1 declare TDSC base register PAGE 682 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0176BA 58F0 1008 00008 37350+ L R15,TLRCNT load local repeat count to R15 37351+* 37352 * 176BE 37353 T974L EQU * 0176BE 4120 0001 00001 37354 LA R2,1 R2 :=00000001 FIN 01 0176C2 1832 37355 LR R3,R2 R3 :=00000001 02 0176C4 8B30 0008 00008 37356 SLA R3,8 R3 :=00000100 FIN 03 0176C8 1744 37357 XR R4,R4 R4 :=00000000 04 0176CA 1643 37358 OR R4,R3 R4 :=00000100 05 0176CC 0640 37359 BCTR R4,0 R4 :=000000FF FIN 06 0176CE 1354 37360 LCR R5,R4 R5 :=FFFFFF01 07 0176D0 8950 0002 00002 37361 SLL R5,2 R5 :=FFFFFC04 FIN 08 0176D4 1065 37362 LPR R6,R5 R6 :=000003FC 09 0176D6 1A61 37363 AR R6,R1 R6 :=000003FD 10 0176D8 1961 37364 CR R6,R1 != 11 0176DA 4780 C06E 1770E 37365 BE T974BAD 12 0176DE 1173 37366 LNR R7,R3 R7 :=FFFFFF00 13 0176E0 1476 37367 NR R7,R6 R7 :=00000300 14 0176E2 8A70 0002 00002 37368 SRA R7,2 R7 :=000000C0 15 0176E6 1B74 37369 SR R7,R4 R7 :=FFFFFFC1 16 0176E8 1283 37370 LTR R8,R3 R8 :=00000100 17 0176EA 8880 0001 00001 37371 SRL R8,1 R8 :=00000080 18 0176EE 1E83 37372 ALR R8,R3 R8 :=00000180 19 0176F0 1F87 37373 SLR R8,R7 R8 :=000001BF 20 0176F2 1583 37374 CLR R8,R3 != 21 0176F4 4780 C06E 1770E 37375 BE T974BAD 22 0176F8 4190 025A 0025A 37376 LA R9,602 R9 :=0000025A 23 0176FC 1794 37377 XR R9,R4 R9 :=000002A5 FIN 24 0176FE 06FB 37378 BCTR R15,R11 37379 TSIMRET 017700 58F0 C078 17718 37380+ L R15,=A(SAVETST) R15 := current save area 017704 58DF 0004 00004 37381+ L R13,4(R15) get old save area back 017708 98EC D00C 0000C 37382+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01770C 07FE 37383+ BR 14 RETURN 02000000 37384 * 01770E 37385 DS 0H 37386 T974BAD ABEND 60 01770E 37387+T974BAD DS 0H 00400002 01770E 4110 003C 0003C 37388+ LA 1,60 LOAD PARAMETER REG 1 01900002 017712 0A0D 37389+ SVC 13 LINK TO ABEND ROUTINE 02050002 37390 TSIMEND 017718 37391+ LTORG 017718 00000458 37392 =A(SAVETST) 1771C 37393+T974TEND EQU * 37394 * 37395 * Test 975 -- Mix Int RR 1st 25 ---------------------------- 37396 * 37397 TSIMBEG T975,30000,1,1,C'T700 1st 25',DIS=1 37398+* 0047C4 37399+TDSCDAT CSECT 0047C8 37400+ DS 0D 37401+* 0047C8 00017720 37402+T975TDSC DC A(T975) // TENTRY 0047CC 0000007C 37403+ DC A(T975TEND-T975) // TLENGTH 0047D0 00007530 37404+ DC F'30000' // TLRCNT PAGE 683 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0047D4 00000001 37405+ DC F'1' // TIGCNT 0047D8 00000001 37406+ DC F'1' // TLTYPE 0020DB 37407+TEXT CSECT 0020DB E3F9F7F5 37408+SPTR3492 DC C'T975' 0047DC 37409+TDSCDAT CSECT 0047DC 37410+ DS 0F 0047DC 040020DB 37411+ DC AL1(L'SPTR3492),AL3(SPTR3492) 0020DF 37412+TEXT CSECT 0020DF E3F7F0F040F1A2A3 37413+SPTR3493 DC C'T700 1st 25' 0047E0 37414+TDSCDAT CSECT 0047E0 37415+ DS 0F 0047E0 0B0020DF 37416+ DC AL1(L'SPTR3493),AL3(SPTR3493) 37417+* 004E24 37418+TDSCTBL CSECT 04E24 37419+T975TPTR EQU * 004E24 010047C8 37420+ DC X'01',AL3(T975TDSC) disabled test 37421+* 01771C 37422+TCODE CSECT 017720 37423+ DS 0D ensure double word alignment for test 017720 37424+T975 DS 0H 01650000 017720 90EC D00C 0000C 37425+ STM 14,12,12(13) SAVE REGISTERS 02950000 017724 18CF 37426+ LR R12,R15 base register := entry address 17720 37427+ USING T975,R12 declare code base register 017726 41B0 C01E 1773E 37428+ LA R11,T975L load loop target to R11 01772A 58F0 C078 17798 37429+ L R15,=A(SAVETST) R15 := current save area 01772E 50DF 0004 00004 37430+ ST R13,4(R15) set back pointer in current save area 017732 182D 37431+ LR R2,R13 remember callers save area 017734 18DF 37432+ LR R13,R15 setup current save area 017736 50D2 0008 00008 37433+ ST R13,8(R2) set forw pointer in callers save area 00000 37434+ USING TDSC,R1 declare TDSC base register 01773A 58F0 1008 00008 37435+ L R15,TLRCNT load local repeat count to R15 37436+* 37437 * 1773E 37438 T975L EQU * 01773E 4120 0001 00001 37439 LA R2,1 R2 :=00000001 FIN 01 017742 1832 37440 LR R3,R2 R3 :=00000001 02 017744 8B30 0008 00008 37441 SLA R3,8 R3 :=00000100 FIN 03 017748 1744 37442 XR R4,R4 R4 :=00000000 04 01774A 1643 37443 OR R4,R3 R4 :=00000100 05 01774C 0640 37444 BCTR R4,0 R4 :=000000FF FIN 06 01774E 1354 37445 LCR R5,R4 R5 :=FFFFFF01 07 017750 8950 0002 00002 37446 SLL R5,2 R5 :=FFFFFC04 FIN 08 017754 1065 37447 LPR R6,R5 R6 :=000003FC 09 017756 1A61 37448 AR R6,R1 R6 :=000003FD 10 017758 1961 37449 CR R6,R1 != 11 01775A 4780 C070 17790 37450 BE T975BAD 12 01775E 1173 37451 LNR R7,R3 R7 :=FFFFFF00 13 017760 1476 37452 NR R7,R6 R7 :=00000300 14 017762 8A70 0002 00002 37453 SRA R7,2 R7 :=000000C0 15 017766 1B74 37454 SR R7,R4 R7 :=FFFFFFC1 16 017768 1283 37455 LTR R8,R3 R8 :=00000100 17 01776A 8880 0001 00001 37456 SRL R8,1 R8 :=00000080 18 01776E 1E83 37457 ALR R8,R3 R8 :=00000180 19 017770 1F87 37458 SLR R8,R7 R8 :=000001BF 20 017772 1583 37459 CLR R8,R3 != 21 PAGE 684 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017774 4780 C070 17790 37460 BE T975BAD 22 017778 4190 025A 0025A 37461 LA R9,602 R9 :=0000025A 23 01777C 1794 37462 XR R9,R4 R9 :=000002A5 FIN 24 01777E 12A9 37463 LTR R10,R9 R10:=000002A5 25 017780 06FB 37464 BCTR R15,R11 37465 TSIMRET 017782 58F0 C078 17798 37466+ L R15,=A(SAVETST) R15 := current save area 017786 58DF 0004 00004 37467+ L R13,4(R15) get old save area back 01778A 98EC D00C 0000C 37468+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01778E 07FE 37469+ BR 14 RETURN 02000000 37470 * 017790 37471 DS 0H 37472 T975BAD ABEND 60 017790 37473+T975BAD DS 0H 00400002 017790 4110 003C 0003C 37474+ LA 1,60 LOAD PARAMETER REG 1 01900002 017794 0A0D 37475+ SVC 13 LINK TO ABEND ROUTINE 02050002 37476 TSIMEND 017798 37477+ LTORG 017798 00000458 37478 =A(SAVETST) 1779C 37479+T975TEND EQU * 37480 * 37481 * Test 976 -- Mix Int RR 1st 26 ---------------------------- 37482 * 37483 TSIMBEG T976,30000,1,1,C'T700 1st 26',DIS=1 37484+* 0047E4 37485+TDSCDAT CSECT 0047E8 37486+ DS 0D 37487+* 0047E8 000177A0 37488+T976TDSC DC A(T976) // TENTRY 0047EC 0000007C 37489+ DC A(T976TEND-T976) // TLENGTH 0047F0 00007530 37490+ DC F'30000' // TLRCNT 0047F4 00000001 37491+ DC F'1' // TIGCNT 0047F8 00000001 37492+ DC F'1' // TLTYPE 0020EA 37493+TEXT CSECT 0020EA E3F9F7F6 37494+SPTR3503 DC C'T976' 0047FC 37495+TDSCDAT CSECT 0047FC 37496+ DS 0F 0047FC 040020EA 37497+ DC AL1(L'SPTR3503),AL3(SPTR3503) 0020EE 37498+TEXT CSECT 0020EE E3F7F0F040F1A2A3 37499+SPTR3504 DC C'T700 1st 26' 004800 37500+TDSCDAT CSECT 004800 37501+ DS 0F 004800 0B0020EE 37502+ DC AL1(L'SPTR3504),AL3(SPTR3504) 37503+* 004E28 37504+TDSCTBL CSECT 04E28 37505+T976TPTR EQU * 004E28 010047E8 37506+ DC X'01',AL3(T976TDSC) disabled test 37507+* 01779C 37508+TCODE CSECT 0177A0 37509+ DS 0D ensure double word alignment for test 0177A0 37510+T976 DS 0H 01650000 0177A0 90EC D00C 0000C 37511+ STM 14,12,12(13) SAVE REGISTERS 02950000 0177A4 18CF 37512+ LR R12,R15 base register := entry address 177A0 37513+ USING T976,R12 declare code base register 0177A6 41B0 C01E 177BE 37514+ LA R11,T976L load loop target to R11 PAGE 685 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0177AA 58F0 C078 17818 37515+ L R15,=A(SAVETST) R15 := current save area 0177AE 50DF 0004 00004 37516+ ST R13,4(R15) set back pointer in current save area 0177B2 182D 37517+ LR R2,R13 remember callers save area 0177B4 18DF 37518+ LR R13,R15 setup current save area 0177B6 50D2 0008 00008 37519+ ST R13,8(R2) set forw pointer in callers save area 00000 37520+ USING TDSC,R1 declare TDSC base register 0177BA 58F0 1008 00008 37521+ L R15,TLRCNT load local repeat count to R15 37522+* 37523 * 177BE 37524 T976L EQU * 0177BE 4120 0001 00001 37525 LA R2,1 R2 :=00000001 FIN 01 0177C2 1832 37526 LR R3,R2 R3 :=00000001 02 0177C4 8B30 0008 00008 37527 SLA R3,8 R3 :=00000100 FIN 03 0177C8 1744 37528 XR R4,R4 R4 :=00000000 04 0177CA 1643 37529 OR R4,R3 R4 :=00000100 05 0177CC 0640 37530 BCTR R4,0 R4 :=000000FF FIN 06 0177CE 1354 37531 LCR R5,R4 R5 :=FFFFFF01 07 0177D0 8950 0002 00002 37532 SLL R5,2 R5 :=FFFFFC04 FIN 08 0177D4 1065 37533 LPR R6,R5 R6 :=000003FC 09 0177D6 1A61 37534 AR R6,R1 R6 :=000003FD 10 0177D8 1961 37535 CR R6,R1 != 11 0177DA 4780 C072 17812 37536 BE T976BAD 12 0177DE 1173 37537 LNR R7,R3 R7 :=FFFFFF00 13 0177E0 1476 37538 NR R7,R6 R7 :=00000300 14 0177E2 8A70 0002 00002 37539 SRA R7,2 R7 :=000000C0 15 0177E6 1B74 37540 SR R7,R4 R7 :=FFFFFFC1 16 0177E8 1283 37541 LTR R8,R3 R8 :=00000100 17 0177EA 8880 0001 00001 37542 SRL R8,1 R8 :=00000080 18 0177EE 1E83 37543 ALR R8,R3 R8 :=00000180 19 0177F0 1F87 37544 SLR R8,R7 R8 :=000001BF 20 0177F2 1583 37545 CLR R8,R3 != 21 0177F4 4780 C072 17812 37546 BE T976BAD 22 0177F8 4190 025A 0025A 37547 LA R9,602 R9 :=0000025A 23 0177FC 1794 37548 XR R9,R4 R9 :=000002A5 FIN 24 0177FE 12A9 37549 LTR R10,R9 R10:=000002A5 25 017800 1AA9 37550 AR R10,R9 R10:=000004FF 26 017802 06FB 37551 BCTR R15,R11 37552 TSIMRET 017804 58F0 C078 17818 37553+ L R15,=A(SAVETST) R15 := current save area 017808 58DF 0004 00004 37554+ L R13,4(R15) get old save area back 01780C 98EC D00C 0000C 37555+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017810 07FE 37556+ BR 14 RETURN 02000000 37557 * 017812 37558 DS 0H 37559 T976BAD ABEND 60 017812 37560+T976BAD DS 0H 00400002 017812 4110 003C 0003C 37561+ LA 1,60 LOAD PARAMETER REG 1 01900002 017816 0A0D 37562+ SVC 13 LINK TO ABEND ROUTINE 02050002 37563 TSIMEND 017818 37564+ LTORG 017818 00000458 37565 =A(SAVETST) 1781C 37566+T976TEND EQU * 37567 * 37568 * Test 977 -- Mix Int RR 1st 27 ---------------------------- 37569 * PAGE 686 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 37570 TSIMBEG T977,30000,1,1,C'T700 1st 27',DIS=1 37571+* 004804 37572+TDSCDAT CSECT 004808 37573+ DS 0D 37574+* 004808 00017820 37575+T977TDSC DC A(T977) // TENTRY 00480C 00000084 37576+ DC A(T977TEND-T977) // TLENGTH 004810 00007530 37577+ DC F'30000' // TLRCNT 004814 00000001 37578+ DC F'1' // TIGCNT 004818 00000001 37579+ DC F'1' // TLTYPE 0020F9 37580+TEXT CSECT 0020F9 E3F9F7F7 37581+SPTR3514 DC C'T977' 00481C 37582+TDSCDAT CSECT 00481C 37583+ DS 0F 00481C 040020F9 37584+ DC AL1(L'SPTR3514),AL3(SPTR3514) 0020FD 37585+TEXT CSECT 0020FD E3F7F0F040F1A2A3 37586+SPTR3515 DC C'T700 1st 27' 004820 37587+TDSCDAT CSECT 004820 37588+ DS 0F 004820 0B0020FD 37589+ DC AL1(L'SPTR3515),AL3(SPTR3515) 37590+* 004E2C 37591+TDSCTBL CSECT 04E2C 37592+T977TPTR EQU * 004E2C 01004808 37593+ DC X'01',AL3(T977TDSC) disabled test 37594+* 01781C 37595+TCODE CSECT 017820 37596+ DS 0D ensure double word alignment for test 017820 37597+T977 DS 0H 01650000 017820 90EC D00C 0000C 37598+ STM 14,12,12(13) SAVE REGISTERS 02950000 017824 18CF 37599+ LR R12,R15 base register := entry address 17820 37600+ USING T977,R12 declare code base register 017826 41B0 C01E 1783E 37601+ LA R11,T977L load loop target to R11 01782A 58F0 C080 178A0 37602+ L R15,=A(SAVETST) R15 := current save area 01782E 50DF 0004 00004 37603+ ST R13,4(R15) set back pointer in current save area 017832 182D 37604+ LR R2,R13 remember callers save area 017834 18DF 37605+ LR R13,R15 setup current save area 017836 50D2 0008 00008 37606+ ST R13,8(R2) set forw pointer in callers save area 00000 37607+ USING TDSC,R1 declare TDSC base register 01783A 58F0 1008 00008 37608+ L R15,TLRCNT load local repeat count to R15 37609+* 37610 * 1783E 37611 T977L EQU * 01783E 4120 0001 00001 37612 LA R2,1 R2 :=00000001 FIN 01 017842 1832 37613 LR R3,R2 R3 :=00000001 02 017844 8B30 0008 00008 37614 SLA R3,8 R3 :=00000100 FIN 03 017848 1744 37615 XR R4,R4 R4 :=00000000 04 01784A 1643 37616 OR R4,R3 R4 :=00000100 05 01784C 0640 37617 BCTR R4,0 R4 :=000000FF FIN 06 01784E 1354 37618 LCR R5,R4 R5 :=FFFFFF01 07 017850 8950 0002 00002 37619 SLL R5,2 R5 :=FFFFFC04 FIN 08 017854 1065 37620 LPR R6,R5 R6 :=000003FC 09 017856 1A61 37621 AR R6,R1 R6 :=000003FD 10 017858 1961 37622 CR R6,R1 != 11 01785A 4780 C074 17894 37623 BE T977BAD 12 01785E 1173 37624 LNR R7,R3 R7 :=FFFFFF00 13 PAGE 687 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017860 1476 37625 NR R7,R6 R7 :=00000300 14 017862 8A70 0002 00002 37626 SRA R7,2 R7 :=000000C0 15 017866 1B74 37627 SR R7,R4 R7 :=FFFFFFC1 16 017868 1283 37628 LTR R8,R3 R8 :=00000100 17 01786A 8880 0001 00001 37629 SRL R8,1 R8 :=00000080 18 01786E 1E83 37630 ALR R8,R3 R8 :=00000180 19 017870 1F87 37631 SLR R8,R7 R8 :=000001BF 20 017872 1583 37632 CLR R8,R3 != 21 017874 4780 C074 17894 37633 BE T977BAD 22 017878 4190 025A 0025A 37634 LA R9,602 R9 :=0000025A 23 01787C 1794 37635 XR R9,R4 R9 :=000002A5 FIN 24 01787E 12A9 37636 LTR R10,R9 R10:=000002A5 25 017880 1AA9 37637 AR R10,R9 R10:=000004FF 26 017882 16A5 37638 OR R10,R5 R10:=FFFFFCFF 27 017884 06FB 37639 BCTR R15,R11 37640 TSIMRET 017886 58F0 C080 178A0 37641+ L R15,=A(SAVETST) R15 := current save area 01788A 58DF 0004 00004 37642+ L R13,4(R15) get old save area back 01788E 98EC D00C 0000C 37643+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017892 07FE 37644+ BR 14 RETURN 02000000 37645 * 017894 37646 DS 0H 37647 T977BAD ABEND 60 017894 37648+T977BAD DS 0H 00400002 017894 4110 003C 0003C 37649+ LA 1,60 LOAD PARAMETER REG 1 01900002 017898 0A0D 37650+ SVC 13 LINK TO ABEND ROUTINE 02050002 37651 TSIMEND 0178A0 37652+ LTORG 0178A0 00000458 37653 =A(SAVETST) 178A4 37654+T977TEND EQU * 37655 * 37656 * Test 978 -- Mix Int RR 1st 28 ---------------------------- 37657 * 37658 TSIMBEG T978,30000,1,1,C'T700 1st 28',DIS=1 37659+* 004824 37660+TDSCDAT CSECT 004828 37661+ DS 0D 37662+* 004828 000178A8 37663+T978TDSC DC A(T978) // TENTRY 00482C 00000084 37664+ DC A(T978TEND-T978) // TLENGTH 004830 00007530 37665+ DC F'30000' // TLRCNT 004834 00000001 37666+ DC F'1' // TIGCNT 004838 00000001 37667+ DC F'1' // TLTYPE 002108 37668+TEXT CSECT 002108 E3F9F7F8 37669+SPTR3525 DC C'T978' 00483C 37670+TDSCDAT CSECT 00483C 37671+ DS 0F 00483C 04002108 37672+ DC AL1(L'SPTR3525),AL3(SPTR3525) 00210C 37673+TEXT CSECT 00210C E3F7F0F040F1A2A3 37674+SPTR3526 DC C'T700 1st 28' 004840 37675+TDSCDAT CSECT 004840 37676+ DS 0F 004840 0B00210C 37677+ DC AL1(L'SPTR3526),AL3(SPTR3526) 37678+* 004E30 37679+TDSCTBL CSECT PAGE 688 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04E30 37680+T978TPTR EQU * 004E30 01004828 37681+ DC X'01',AL3(T978TDSC) disabled test 37682+* 0178A4 37683+TCODE CSECT 0178A8 37684+ DS 0D ensure double word alignment for test 0178A8 37685+T978 DS 0H 01650000 0178A8 90EC D00C 0000C 37686+ STM 14,12,12(13) SAVE REGISTERS 02950000 0178AC 18CF 37687+ LR R12,R15 base register := entry address 178A8 37688+ USING T978,R12 declare code base register 0178AE 41B0 C01E 178C6 37689+ LA R11,T978L load loop target to R11 0178B2 58F0 C080 17928 37690+ L R15,=A(SAVETST) R15 := current save area 0178B6 50DF 0004 00004 37691+ ST R13,4(R15) set back pointer in current save area 0178BA 182D 37692+ LR R2,R13 remember callers save area 0178BC 18DF 37693+ LR R13,R15 setup current save area 0178BE 50D2 0008 00008 37694+ ST R13,8(R2) set forw pointer in callers save area 00000 37695+ USING TDSC,R1 declare TDSC base register 0178C2 58F0 1008 00008 37696+ L R15,TLRCNT load local repeat count to R15 37697+* 37698 * 178C6 37699 T978L EQU * 0178C6 4120 0001 00001 37700 LA R2,1 R2 :=00000001 FIN 01 0178CA 1832 37701 LR R3,R2 R3 :=00000001 02 0178CC 8B30 0008 00008 37702 SLA R3,8 R3 :=00000100 FIN 03 0178D0 1744 37703 XR R4,R4 R4 :=00000000 04 0178D2 1643 37704 OR R4,R3 R4 :=00000100 05 0178D4 0640 37705 BCTR R4,0 R4 :=000000FF FIN 06 0178D6 1354 37706 LCR R5,R4 R5 :=FFFFFF01 07 0178D8 8950 0002 00002 37707 SLL R5,2 R5 :=FFFFFC04 FIN 08 0178DC 1065 37708 LPR R6,R5 R6 :=000003FC 09 0178DE 1A61 37709 AR R6,R1 R6 :=000003FD 10 0178E0 1961 37710 CR R6,R1 != 11 0178E2 4780 C076 1791E 37711 BE T978BAD 12 0178E6 1173 37712 LNR R7,R3 R7 :=FFFFFF00 13 0178E8 1476 37713 NR R7,R6 R7 :=00000300 14 0178EA 8A70 0002 00002 37714 SRA R7,2 R7 :=000000C0 15 0178EE 1B74 37715 SR R7,R4 R7 :=FFFFFFC1 16 0178F0 1283 37716 LTR R8,R3 R8 :=00000100 17 0178F2 8880 0001 00001 37717 SRL R8,1 R8 :=00000080 18 0178F6 1E83 37718 ALR R8,R3 R8 :=00000180 19 0178F8 1F87 37719 SLR R8,R7 R8 :=000001BF 20 0178FA 1583 37720 CLR R8,R3 != 21 0178FC 4780 C076 1791E 37721 BE T978BAD 22 017900 4190 025A 0025A 37722 LA R9,602 R9 :=0000025A 23 017904 1794 37723 XR R9,R4 R9 :=000002A5 FIN 24 017906 12A9 37724 LTR R10,R9 R10:=000002A5 25 017908 1AA9 37725 AR R10,R9 R10:=000004FF 26 01790A 16A5 37726 OR R10,R5 R10:=FFFFFCFF 27 01790C 106A 37727 LPR R6,R10 R6 :=00000301 28 01790E 06FB 37728 BCTR R15,R11 37729 TSIMRET 017910 58F0 C080 17928 37730+ L R15,=A(SAVETST) R15 := current save area 017914 58DF 0004 00004 37731+ L R13,4(R15) get old save area back 017918 98EC D00C 0000C 37732+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 01791C 07FE 37733+ BR 14 RETURN 02000000 37734 * PAGE 689 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 01791E 37735 DS 0H 37736 T978BAD ABEND 60 01791E 37737+T978BAD DS 0H 00400002 01791E 4110 003C 0003C 37738+ LA 1,60 LOAD PARAMETER REG 1 01900002 017922 0A0D 37739+ SVC 13 LINK TO ABEND ROUTINE 02050002 37740 TSIMEND 017928 37741+ LTORG 017928 00000458 37742 =A(SAVETST) 1792C 37743+T978TEND EQU * 37744 * 37745 * Test 979 -- Mix Int RR 1st 29 ---------------------------- 37746 * 37747 TSIMBEG T979,25000,1,1,C'T700 1st 29',DIS=1 37748+* 004844 37749+TDSCDAT CSECT 004848 37750+ DS 0D 37751+* 004848 00017930 37752+T979TDSC DC A(T979) // TENTRY 00484C 00000084 37753+ DC A(T979TEND-T979) // TLENGTH 004850 000061A8 37754+ DC F'25000' // TLRCNT 004854 00000001 37755+ DC F'1' // TIGCNT 004858 00000001 37756+ DC F'1' // TLTYPE 002117 37757+TEXT CSECT 002117 E3F9F7F9 37758+SPTR3536 DC C'T979' 00485C 37759+TDSCDAT CSECT 00485C 37760+ DS 0F 00485C 04002117 37761+ DC AL1(L'SPTR3536),AL3(SPTR3536) 00211B 37762+TEXT CSECT 00211B E3F7F0F040F1A2A3 37763+SPTR3537 DC C'T700 1st 29' 004860 37764+TDSCDAT CSECT 004860 37765+ DS 0F 004860 0B00211B 37766+ DC AL1(L'SPTR3537),AL3(SPTR3537) 37767+* 004E34 37768+TDSCTBL CSECT 04E34 37769+T979TPTR EQU * 004E34 01004848 37770+ DC X'01',AL3(T979TDSC) disabled test 37771+* 01792C 37772+TCODE CSECT 017930 37773+ DS 0D ensure double word alignment for test 017930 37774+T979 DS 0H 01650000 017930 90EC D00C 0000C 37775+ STM 14,12,12(13) SAVE REGISTERS 02950000 017934 18CF 37776+ LR R12,R15 base register := entry address 17930 37777+ USING T979,R12 declare code base register 017936 41B0 C01E 1794E 37778+ LA R11,T979L load loop target to R11 01793A 58F0 C080 179B0 37779+ L R15,=A(SAVETST) R15 := current save area 01793E 50DF 0004 00004 37780+ ST R13,4(R15) set back pointer in current save area 017942 182D 37781+ LR R2,R13 remember callers save area 017944 18DF 37782+ LR R13,R15 setup current save area 017946 50D2 0008 00008 37783+ ST R13,8(R2) set forw pointer in callers save area 00000 37784+ USING TDSC,R1 declare TDSC base register 01794A 58F0 1008 00008 37785+ L R15,TLRCNT load local repeat count to R15 37786+* 37787 * 1794E 37788 T979L EQU * 01794E 4120 0001 00001 37789 LA R2,1 R2 :=00000001 FIN 01 PAGE 690 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017952 1832 37790 LR R3,R2 R3 :=00000001 02 017954 8B30 0008 00008 37791 SLA R3,8 R3 :=00000100 FIN 03 017958 1744 37792 XR R4,R4 R4 :=00000000 04 01795A 1643 37793 OR R4,R3 R4 :=00000100 05 01795C 0640 37794 BCTR R4,0 R4 :=000000FF FIN 06 01795E 1354 37795 LCR R5,R4 R5 :=FFFFFF01 07 017960 8950 0002 00002 37796 SLL R5,2 R5 :=FFFFFC04 FIN 08 017964 1065 37797 LPR R6,R5 R6 :=000003FC 09 017966 1A61 37798 AR R6,R1 R6 :=000003FD 10 017968 1961 37799 CR R6,R1 != 11 01796A 4780 C078 179A8 37800 BE T979BAD 12 01796E 1173 37801 LNR R7,R3 R7 :=FFFFFF00 13 017970 1476 37802 NR R7,R6 R7 :=00000300 14 017972 8A70 0002 00002 37803 SRA R7,2 R7 :=000000C0 15 017976 1B74 37804 SR R7,R4 R7 :=FFFFFFC1 16 017978 1283 37805 LTR R8,R3 R8 :=00000100 17 01797A 8880 0001 00001 37806 SRL R8,1 R8 :=00000080 18 01797E 1E83 37807 ALR R8,R3 R8 :=00000180 19 017980 1F87 37808 SLR R8,R7 R8 :=000001BF 20 017982 1583 37809 CLR R8,R3 != 21 017984 4780 C078 179A8 37810 BE T979BAD 22 017988 4190 025A 0025A 37811 LA R9,602 R9 :=0000025A 23 01798C 1794 37812 XR R9,R4 R9 :=000002A5 FIN 24 01798E 12A9 37813 LTR R10,R9 R10:=000002A5 25 017990 1AA9 37814 AR R10,R9 R10:=000004FF 26 017992 16A5 37815 OR R10,R5 R10:=FFFFFCFF 27 017994 106A 37816 LPR R6,R10 R6 :=00000301 28 017996 1E64 37817 ALR R6,R4 R6 :=00000400 29 017998 06FB 37818 BCTR R15,R11 37819 TSIMRET 01799A 58F0 C080 179B0 37820+ L R15,=A(SAVETST) R15 := current save area 01799E 58DF 0004 00004 37821+ L R13,4(R15) get old save area back 0179A2 98EC D00C 0000C 37822+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 0179A6 07FE 37823+ BR 14 RETURN 02000000 37824 * 0179A8 37825 DS 0H 37826 T979BAD ABEND 60 0179A8 37827+T979BAD DS 0H 00400002 0179A8 4110 003C 0003C 37828+ LA 1,60 LOAD PARAMETER REG 1 01900002 0179AC 0A0D 37829+ SVC 13 LINK TO ABEND ROUTINE 02050002 37830 TSIMEND 0179B0 37831+ LTORG 0179B0 00000458 37832 =A(SAVETST) 179B4 37833+T979TEND EQU * 37834 * 37835 * Test 980 -- Mix Int RR 1st 30 ---------------------------- 37836 * 37837 TSIMBEG T980,25000,1,1,C'T700 1st 30',DIS=1 37838+* 004864 37839+TDSCDAT CSECT 004868 37840+ DS 0D 37841+* 004868 000179B8 37842+T980TDSC DC A(T980) // TENTRY 00486C 0000008C 37843+ DC A(T980TEND-T980) // TLENGTH 004870 000061A8 37844+ DC F'25000' // TLRCNT PAGE 691 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004874 00000001 37845+ DC F'1' // TIGCNT 004878 00000001 37846+ DC F'1' // TLTYPE 002126 37847+TEXT CSECT 002126 E3F9F8F0 37848+SPTR3547 DC C'T980' 00487C 37849+TDSCDAT CSECT 00487C 37850+ DS 0F 00487C 04002126 37851+ DC AL1(L'SPTR3547),AL3(SPTR3547) 00212A 37852+TEXT CSECT 00212A E3F7F0F040F1A2A3 37853+SPTR3548 DC C'T700 1st 30' 004880 37854+TDSCDAT CSECT 004880 37855+ DS 0F 004880 0B00212A 37856+ DC AL1(L'SPTR3548),AL3(SPTR3548) 37857+* 004E38 37858+TDSCTBL CSECT 04E38 37859+T980TPTR EQU * 004E38 01004868 37860+ DC X'01',AL3(T980TDSC) disabled test 37861+* 0179B4 37862+TCODE CSECT 0179B8 37863+ DS 0D ensure double word alignment for test 0179B8 37864+T980 DS 0H 01650000 0179B8 90EC D00C 0000C 37865+ STM 14,12,12(13) SAVE REGISTERS 02950000 0179BC 18CF 37866+ LR R12,R15 base register := entry address 179B8 37867+ USING T980,R12 declare code base register 0179BE 41B0 C01E 179D6 37868+ LA R11,T980L load loop target to R11 0179C2 58F0 C088 17A40 37869+ L R15,=A(SAVETST) R15 := current save area 0179C6 50DF 0004 00004 37870+ ST R13,4(R15) set back pointer in current save area 0179CA 182D 37871+ LR R2,R13 remember callers save area 0179CC 18DF 37872+ LR R13,R15 setup current save area 0179CE 50D2 0008 00008 37873+ ST R13,8(R2) set forw pointer in callers save area 00000 37874+ USING TDSC,R1 declare TDSC base register 0179D2 58F0 1008 00008 37875+ L R15,TLRCNT load local repeat count to R15 37876+* 37877 * 179D6 37878 T980L EQU * 0179D6 4120 0001 00001 37879 LA R2,1 R2 :=00000001 FIN 01 0179DA 1832 37880 LR R3,R2 R3 :=00000001 02 0179DC 8B30 0008 00008 37881 SLA R3,8 R3 :=00000100 FIN 03 0179E0 1744 37882 XR R4,R4 R4 :=00000000 04 0179E2 1643 37883 OR R4,R3 R4 :=00000100 05 0179E4 0640 37884 BCTR R4,0 R4 :=000000FF FIN 06 0179E6 1354 37885 LCR R5,R4 R5 :=FFFFFF01 07 0179E8 8950 0002 00002 37886 SLL R5,2 R5 :=FFFFFC04 FIN 08 0179EC 1065 37887 LPR R6,R5 R6 :=000003FC 09 0179EE 1A61 37888 AR R6,R1 R6 :=000003FD 10 0179F0 1961 37889 CR R6,R1 != 11 0179F2 4780 C07C 17A34 37890 BE T980BAD 12 0179F6 1173 37891 LNR R7,R3 R7 :=FFFFFF00 13 0179F8 1476 37892 NR R7,R6 R7 :=00000300 14 0179FA 8A70 0002 00002 37893 SRA R7,2 R7 :=000000C0 15 0179FE 1B74 37894 SR R7,R4 R7 :=FFFFFFC1 16 017A00 1283 37895 LTR R8,R3 R8 :=00000100 17 017A02 8880 0001 00001 37896 SRL R8,1 R8 :=00000080 18 017A06 1E83 37897 ALR R8,R3 R8 :=00000180 19 017A08 1F87 37898 SLR R8,R7 R8 :=000001BF 20 017A0A 1583 37899 CLR R8,R3 != 21 PAGE 692 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017A0C 4780 C07C 17A34 37900 BE T980BAD 22 017A10 4190 025A 0025A 37901 LA R9,602 R9 :=0000025A 23 017A14 1794 37902 XR R9,R4 R9 :=000002A5 FIN 24 017A16 12A9 37903 LTR R10,R9 R10:=000002A5 25 017A18 1AA9 37904 AR R10,R9 R10:=000004FF 26 017A1A 16A5 37905 OR R10,R5 R10:=FFFFFCFF 27 017A1C 106A 37906 LPR R6,R10 R6 :=00000301 28 017A1E 1E64 37907 ALR R6,R4 R6 :=00000400 29 017A20 8B60 0001 00001 37908 SLA R6,1 R6 :=00000800 30 017A24 06FB 37909 BCTR R15,R11 37910 TSIMRET 017A26 58F0 C088 17A40 37911+ L R15,=A(SAVETST) R15 := current save area 017A2A 58DF 0004 00004 37912+ L R13,4(R15) get old save area back 017A2E 98EC D00C 0000C 37913+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017A32 07FE 37914+ BR 14 RETURN 02000000 37915 * 017A34 37916 DS 0H 37917 T980BAD ABEND 60 017A34 37918+T980BAD DS 0H 00400002 017A34 4110 003C 0003C 37919+ LA 1,60 LOAD PARAMETER REG 1 01900002 017A38 0A0D 37920+ SVC 13 LINK TO ABEND ROUTINE 02050002 37921 TSIMEND 017A40 37922+ LTORG 017A40 00000458 37923 =A(SAVETST) 17A44 37924+T980TEND EQU * 37925 * 37926 * Test 981 -- Mix Int RR 1st 31 ---------------------------- 37927 * 37928 TSIMBEG T981,25000,1,1,C'T700 1st 31',DIS=1 37929+* 004884 37930+TDSCDAT CSECT 004888 37931+ DS 0D 37932+* 004888 00017A48 37933+T981TDSC DC A(T981) // TENTRY 00488C 0000008C 37934+ DC A(T981TEND-T981) // TLENGTH 004890 000061A8 37935+ DC F'25000' // TLRCNT 004894 00000001 37936+ DC F'1' // TIGCNT 004898 00000001 37937+ DC F'1' // TLTYPE 002135 37938+TEXT CSECT 002135 E3F9F8F1 37939+SPTR3558 DC C'T981' 00489C 37940+TDSCDAT CSECT 00489C 37941+ DS 0F 00489C 04002135 37942+ DC AL1(L'SPTR3558),AL3(SPTR3558) 002139 37943+TEXT CSECT 002139 E3F7F0F040F1A2A3 37944+SPTR3559 DC C'T700 1st 31' 0048A0 37945+TDSCDAT CSECT 0048A0 37946+ DS 0F 0048A0 0B002139 37947+ DC AL1(L'SPTR3559),AL3(SPTR3559) 37948+* 004E3C 37949+TDSCTBL CSECT 04E3C 37950+T981TPTR EQU * 004E3C 01004888 37951+ DC X'01',AL3(T981TDSC) disabled test 37952+* 017A44 37953+TCODE CSECT 017A48 37954+ DS 0D ensure double word alignment for test PAGE 693 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017A48 37955+T981 DS 0H 01650000 017A48 90EC D00C 0000C 37956+ STM 14,12,12(13) SAVE REGISTERS 02950000 017A4C 18CF 37957+ LR R12,R15 base register := entry address 17A48 37958+ USING T981,R12 declare code base register 017A4E 41B0 C01E 17A66 37959+ LA R11,T981L load loop target to R11 017A52 58F0 C088 17AD0 37960+ L R15,=A(SAVETST) R15 := current save area 017A56 50DF 0004 00004 37961+ ST R13,4(R15) set back pointer in current save area 017A5A 182D 37962+ LR R2,R13 remember callers save area 017A5C 18DF 37963+ LR R13,R15 setup current save area 017A5E 50D2 0008 00008 37964+ ST R13,8(R2) set forw pointer in callers save area 00000 37965+ USING TDSC,R1 declare TDSC base register 017A62 58F0 1008 00008 37966+ L R15,TLRCNT load local repeat count to R15 37967+* 37968 * 17A66 37969 T981L EQU * 017A66 4120 0001 00001 37970 LA R2,1 R2 :=00000001 FIN 01 017A6A 1832 37971 LR R3,R2 R3 :=00000001 02 017A6C 8B30 0008 00008 37972 SLA R3,8 R3 :=00000100 FIN 03 017A70 1744 37973 XR R4,R4 R4 :=00000000 04 017A72 1643 37974 OR R4,R3 R4 :=00000100 05 017A74 0640 37975 BCTR R4,0 R4 :=000000FF FIN 06 017A76 1354 37976 LCR R5,R4 R5 :=FFFFFF01 07 017A78 8950 0002 00002 37977 SLL R5,2 R5 :=FFFFFC04 FIN 08 017A7C 1065 37978 LPR R6,R5 R6 :=000003FC 09 017A7E 1A61 37979 AR R6,R1 R6 :=000003FD 10 017A80 1961 37980 CR R6,R1 != 11 017A82 4780 C07E 17AC6 37981 BE T981BAD 12 017A86 1173 37982 LNR R7,R3 R7 :=FFFFFF00 13 017A88 1476 37983 NR R7,R6 R7 :=00000300 14 017A8A 8A70 0002 00002 37984 SRA R7,2 R7 :=000000C0 15 017A8E 1B74 37985 SR R7,R4 R7 :=FFFFFFC1 16 017A90 1283 37986 LTR R8,R3 R8 :=00000100 17 017A92 8880 0001 00001 37987 SRL R8,1 R8 :=00000080 18 017A96 1E83 37988 ALR R8,R3 R8 :=00000180 19 017A98 1F87 37989 SLR R8,R7 R8 :=000001BF 20 017A9A 1583 37990 CLR R8,R3 != 21 017A9C 4780 C07E 17AC6 37991 BE T981BAD 22 017AA0 4190 025A 0025A 37992 LA R9,602 R9 :=0000025A 23 017AA4 1794 37993 XR R9,R4 R9 :=000002A5 FIN 24 017AA6 12A9 37994 LTR R10,R9 R10:=000002A5 25 017AA8 1AA9 37995 AR R10,R9 R10:=000004FF 26 017AAA 16A5 37996 OR R10,R5 R10:=FFFFFCFF 27 017AAC 106A 37997 LPR R6,R10 R6 :=00000301 28 017AAE 1E64 37998 ALR R6,R4 R6 :=00000400 29 017AB0 8B60 0001 00001 37999 SLA R6,1 R6 :=00000800 30 017AB4 1B69 38000 SR R6,R9 R6 :=0000055B 31 017AB6 06FB 38001 BCTR R15,R11 38002 TSIMRET 017AB8 58F0 C088 17AD0 38003+ L R15,=A(SAVETST) R15 := current save area 017ABC 58DF 0004 00004 38004+ L R13,4(R15) get old save area back 017AC0 98EC D00C 0000C 38005+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017AC4 07FE 38006+ BR 14 RETURN 02000000 38007 * 017AC6 38008 DS 0H 38009 T981BAD ABEND 60 PAGE 694 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017AC6 38010+T981BAD DS 0H 00400002 017AC6 4110 003C 0003C 38011+ LA 1,60 LOAD PARAMETER REG 1 01900002 017ACA 0A0D 38012+ SVC 13 LINK TO ABEND ROUTINE 02050002 38013 TSIMEND 017AD0 38014+ LTORG 017AD0 00000458 38015 =A(SAVETST) 17AD4 38016+T981TEND EQU * 38017 * 38018 * Test 982 -- Mix Int RR 1st 32 ---------------------------- 38019 * 38020 TSIMBEG T982,25000,1,1,C'T700 1st 32',DIS=1 38021+* 0048A4 38022+TDSCDAT CSECT 0048A8 38023+ DS 0D 38024+* 0048A8 00017AD8 38025+T982TDSC DC A(T982) // TENTRY 0048AC 0000008C 38026+ DC A(T982TEND-T982) // TLENGTH 0048B0 000061A8 38027+ DC F'25000' // TLRCNT 0048B4 00000001 38028+ DC F'1' // TIGCNT 0048B8 00000001 38029+ DC F'1' // TLTYPE 002144 38030+TEXT CSECT 002144 E3F9F8F2 38031+SPTR3569 DC C'T982' 0048BC 38032+TDSCDAT CSECT 0048BC 38033+ DS 0F 0048BC 04002144 38034+ DC AL1(L'SPTR3569),AL3(SPTR3569) 002148 38035+TEXT CSECT 002148 E3F7F0F040F1A2A3 38036+SPTR3570 DC C'T700 1st 32' 0048C0 38037+TDSCDAT CSECT 0048C0 38038+ DS 0F 0048C0 0B002148 38039+ DC AL1(L'SPTR3570),AL3(SPTR3570) 38040+* 004E40 38041+TDSCTBL CSECT 04E40 38042+T982TPTR EQU * 004E40 010048A8 38043+ DC X'01',AL3(T982TDSC) disabled test 38044+* 017AD4 38045+TCODE CSECT 017AD8 38046+ DS 0D ensure double word alignment for test 017AD8 38047+T982 DS 0H 01650000 017AD8 90EC D00C 0000C 38048+ STM 14,12,12(13) SAVE REGISTERS 02950000 017ADC 18CF 38049+ LR R12,R15 base register := entry address 17AD8 38050+ USING T982,R12 declare code base register 017ADE 41B0 C01E 17AF6 38051+ LA R11,T982L load loop target to R11 017AE2 58F0 C088 17B60 38052+ L R15,=A(SAVETST) R15 := current save area 017AE6 50DF 0004 00004 38053+ ST R13,4(R15) set back pointer in current save area 017AEA 182D 38054+ LR R2,R13 remember callers save area 017AEC 18DF 38055+ LR R13,R15 setup current save area 017AEE 50D2 0008 00008 38056+ ST R13,8(R2) set forw pointer in callers save area 00000 38057+ USING TDSC,R1 declare TDSC base register 017AF2 58F0 1008 00008 38058+ L R15,TLRCNT load local repeat count to R15 38059+* 38060 * 17AF6 38061 T982L EQU * 017AF6 4120 0001 00001 38062 LA R2,1 R2 :=00000001 FIN 01 017AFA 1832 38063 LR R3,R2 R3 :=00000001 02 017AFC 8B30 0008 00008 38064 SLA R3,8 R3 :=00000100 FIN 03 PAGE 695 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017B00 1744 38065 XR R4,R4 R4 :=00000000 04 017B02 1643 38066 OR R4,R3 R4 :=00000100 05 017B04 0640 38067 BCTR R4,0 R4 :=000000FF FIN 06 017B06 1354 38068 LCR R5,R4 R5 :=FFFFFF01 07 017B08 8950 0002 00002 38069 SLL R5,2 R5 :=FFFFFC04 FIN 08 017B0C 1065 38070 LPR R6,R5 R6 :=000003FC 09 017B0E 1A61 38071 AR R6,R1 R6 :=000003FD 10 017B10 1961 38072 CR R6,R1 != 11 017B12 4780 C080 17B58 38073 BE T982BAD 12 017B16 1173 38074 LNR R7,R3 R7 :=FFFFFF00 13 017B18 1476 38075 NR R7,R6 R7 :=00000300 14 017B1A 8A70 0002 00002 38076 SRA R7,2 R7 :=000000C0 15 017B1E 1B74 38077 SR R7,R4 R7 :=FFFFFFC1 16 017B20 1283 38078 LTR R8,R3 R8 :=00000100 17 017B22 8880 0001 00001 38079 SRL R8,1 R8 :=00000080 18 017B26 1E83 38080 ALR R8,R3 R8 :=00000180 19 017B28 1F87 38081 SLR R8,R7 R8 :=000001BF 20 017B2A 1583 38082 CLR R8,R3 != 21 017B2C 4780 C080 17B58 38083 BE T982BAD 22 017B30 4190 025A 0025A 38084 LA R9,602 R9 :=0000025A 23 017B34 1794 38085 XR R9,R4 R9 :=000002A5 FIN 24 017B36 12A9 38086 LTR R10,R9 R10:=000002A5 25 017B38 1AA9 38087 AR R10,R9 R10:=000004FF 26 017B3A 16A5 38088 OR R10,R5 R10:=FFFFFCFF 27 017B3C 106A 38089 LPR R6,R10 R6 :=00000301 28 017B3E 1E64 38090 ALR R6,R4 R6 :=00000400 29 017B40 8B60 0001 00001 38091 SLA R6,1 R6 :=00000800 30 017B44 1B69 38092 SR R6,R9 R6 :=0000055B 31 017B46 0660 38093 BCTR R6,0 R6 :=0000055A 32 017B48 06FB 38094 BCTR R15,R11 38095 TSIMRET 017B4A 58F0 C088 17B60 38096+ L R15,=A(SAVETST) R15 := current save area 017B4E 58DF 0004 00004 38097+ L R13,4(R15) get old save area back 017B52 98EC D00C 0000C 38098+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017B56 07FE 38099+ BR 14 RETURN 02000000 38100 * 017B58 38101 DS 0H 38102 T982BAD ABEND 60 017B58 38103+T982BAD DS 0H 00400002 017B58 4110 003C 0003C 38104+ LA 1,60 LOAD PARAMETER REG 1 01900002 017B5C 0A0D 38105+ SVC 13 LINK TO ABEND ROUTINE 02050002 38106 TSIMEND 017B60 38107+ LTORG 017B60 00000458 38108 =A(SAVETST) 17B64 38109+T982TEND EQU * 38110 * 38111 * Test 983 -- Mix Int RR 1st 33 ---------------------------- 38112 * 38113 TSIMBEG T983,25000,1,1,C'T700 1st 33',DIS=1 38114+* 0048C4 38115+TDSCDAT CSECT 0048C8 38116+ DS 0D 38117+* 0048C8 00017B68 38118+T983TDSC DC A(T983) // TENTRY 0048CC 0000008C 38119+ DC A(T983TEND-T983) // TLENGTH PAGE 696 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 0048D0 000061A8 38120+ DC F'25000' // TLRCNT 0048D4 00000001 38121+ DC F'1' // TIGCNT 0048D8 00000001 38122+ DC F'1' // TLTYPE 002153 38123+TEXT CSECT 002153 E3F9F8F3 38124+SPTR3580 DC C'T983' 0048DC 38125+TDSCDAT CSECT 0048DC 38126+ DS 0F 0048DC 04002153 38127+ DC AL1(L'SPTR3580),AL3(SPTR3580) 002157 38128+TEXT CSECT 002157 E3F7F0F040F1A2A3 38129+SPTR3581 DC C'T700 1st 33' 0048E0 38130+TDSCDAT CSECT 0048E0 38131+ DS 0F 0048E0 0B002157 38132+ DC AL1(L'SPTR3581),AL3(SPTR3581) 38133+* 004E44 38134+TDSCTBL CSECT 04E44 38135+T983TPTR EQU * 004E44 010048C8 38136+ DC X'01',AL3(T983TDSC) disabled test 38137+* 017B64 38138+TCODE CSECT 017B68 38139+ DS 0D ensure double word alignment for test 017B68 38140+T983 DS 0H 01650000 017B68 90EC D00C 0000C 38141+ STM 14,12,12(13) SAVE REGISTERS 02950000 017B6C 18CF 38142+ LR R12,R15 base register := entry address 17B68 38143+ USING T983,R12 declare code base register 017B6E 41B0 C01E 17B86 38144+ LA R11,T983L load loop target to R11 017B72 58F0 C088 17BF0 38145+ L R15,=A(SAVETST) R15 := current save area 017B76 50DF 0004 00004 38146+ ST R13,4(R15) set back pointer in current save area 017B7A 182D 38147+ LR R2,R13 remember callers save area 017B7C 18DF 38148+ LR R13,R15 setup current save area 017B7E 50D2 0008 00008 38149+ ST R13,8(R2) set forw pointer in callers save area 00000 38150+ USING TDSC,R1 declare TDSC base register 017B82 58F0 1008 00008 38151+ L R15,TLRCNT load local repeat count to R15 38152+* 38153 * 17B86 38154 T983L EQU * 017B86 4120 0001 00001 38155 LA R2,1 R2 :=00000001 FIN 01 017B8A 1832 38156 LR R3,R2 R3 :=00000001 02 017B8C 8B30 0008 00008 38157 SLA R3,8 R3 :=00000100 FIN 03 017B90 1744 38158 XR R4,R4 R4 :=00000000 04 017B92 1643 38159 OR R4,R3 R4 :=00000100 05 017B94 0640 38160 BCTR R4,0 R4 :=000000FF FIN 06 017B96 1354 38161 LCR R5,R4 R5 :=FFFFFF01 07 017B98 8950 0002 00002 38162 SLL R5,2 R5 :=FFFFFC04 FIN 08 017B9C 1065 38163 LPR R6,R5 R6 :=000003FC 09 017B9E 1A61 38164 AR R6,R1 R6 :=000003FD 10 017BA0 1961 38165 CR R6,R1 != 11 017BA2 4780 C082 17BEA 38166 BE T983BAD 12 017BA6 1173 38167 LNR R7,R3 R7 :=FFFFFF00 13 017BA8 1476 38168 NR R7,R6 R7 :=00000300 14 017BAA 8A70 0002 00002 38169 SRA R7,2 R7 :=000000C0 15 017BAE 1B74 38170 SR R7,R4 R7 :=FFFFFFC1 16 017BB0 1283 38171 LTR R8,R3 R8 :=00000100 17 017BB2 8880 0001 00001 38172 SRL R8,1 R8 :=00000080 18 017BB6 1E83 38173 ALR R8,R3 R8 :=00000180 19 017BB8 1F87 38174 SLR R8,R7 R8 :=000001BF 20 PAGE 697 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017BBA 1583 38175 CLR R8,R3 != 21 017BBC 4780 C082 17BEA 38176 BE T983BAD 22 017BC0 4190 025A 0025A 38177 LA R9,602 R9 :=0000025A 23 017BC4 1794 38178 XR R9,R4 R9 :=000002A5 FIN 24 017BC6 12A9 38179 LTR R10,R9 R10:=000002A5 25 017BC8 1AA9 38180 AR R10,R9 R10:=000004FF 26 017BCA 16A5 38181 OR R10,R5 R10:=FFFFFCFF 27 017BCC 106A 38182 LPR R6,R10 R6 :=00000301 28 017BCE 1E64 38183 ALR R6,R4 R6 :=00000400 29 017BD0 8B60 0001 00001 38184 SLA R6,1 R6 :=00000800 30 017BD4 1B69 38185 SR R6,R9 R6 :=0000055B 31 017BD6 0660 38186 BCTR R6,0 R6 :=0000055A 32 017BD8 1465 38187 NR R6,R5 R6 :=00000400 33 017BDA 06FB 38188 BCTR R15,R11 38189 TSIMRET 017BDC 58F0 C088 17BF0 38190+ L R15,=A(SAVETST) R15 := current save area 017BE0 58DF 0004 00004 38191+ L R13,4(R15) get old save area back 017BE4 98EC D00C 0000C 38192+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017BE8 07FE 38193+ BR 14 RETURN 02000000 38194 * 017BEA 38195 DS 0H 38196 T983BAD ABEND 60 017BEA 38197+T983BAD DS 0H 00400002 017BEA 4110 003C 0003C 38198+ LA 1,60 LOAD PARAMETER REG 1 01900002 017BEE 0A0D 38199+ SVC 13 LINK TO ABEND ROUTINE 02050002 38200 TSIMEND 017BF0 38201+ LTORG 017BF0 00000458 38202 =A(SAVETST) 17BF4 38203+T983TEND EQU * 38204 * 38205 * Test 984 -- Mix Int RR 1st 34 ---------------------------- 38206 * 38207 TSIMBEG T984,25000,1,1,C'T700 1st 34',DIS=1 38208+* 0048E4 38209+TDSCDAT CSECT 0048E8 38210+ DS 0D 38211+* 0048E8 00017BF8 38212+T984TDSC DC A(T984) // TENTRY 0048EC 00000094 38213+ DC A(T984TEND-T984) // TLENGTH 0048F0 000061A8 38214+ DC F'25000' // TLRCNT 0048F4 00000001 38215+ DC F'1' // TIGCNT 0048F8 00000001 38216+ DC F'1' // TLTYPE 002162 38217+TEXT CSECT 002162 E3F9F8F4 38218+SPTR3591 DC C'T984' 0048FC 38219+TDSCDAT CSECT 0048FC 38220+ DS 0F 0048FC 04002162 38221+ DC AL1(L'SPTR3591),AL3(SPTR3591) 002166 38222+TEXT CSECT 002166 E3F7F0F040F1A2A3 38223+SPTR3592 DC C'T700 1st 34' 004900 38224+TDSCDAT CSECT 004900 38225+ DS 0F 004900 0B002166 38226+ DC AL1(L'SPTR3592),AL3(SPTR3592) 38227+* 004E48 38228+TDSCTBL CSECT 04E48 38229+T984TPTR EQU * PAGE 698 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 004E48 010048E8 38230+ DC X'01',AL3(T984TDSC) disabled test 38231+* 017BF4 38232+TCODE CSECT 017BF8 38233+ DS 0D ensure double word alignment for test 017BF8 38234+T984 DS 0H 01650000 017BF8 90EC D00C 0000C 38235+ STM 14,12,12(13) SAVE REGISTERS 02950000 017BFC 18CF 38236+ LR R12,R15 base register := entry address 17BF8 38237+ USING T984,R12 declare code base register 017BFE 41B0 C01E 17C16 38238+ LA R11,T984L load loop target to R11 017C02 58F0 C090 17C88 38239+ L R15,=A(SAVETST) R15 := current save area 017C06 50DF 0004 00004 38240+ ST R13,4(R15) set back pointer in current save area 017C0A 182D 38241+ LR R2,R13 remember callers save area 017C0C 18DF 38242+ LR R13,R15 setup current save area 017C0E 50D2 0008 00008 38243+ ST R13,8(R2) set forw pointer in callers save area 00000 38244+ USING TDSC,R1 declare TDSC base register 017C12 58F0 1008 00008 38245+ L R15,TLRCNT load local repeat count to R15 38246+* 38247 * 17C16 38248 T984L EQU * 017C16 4120 0001 00001 38249 LA R2,1 R2 :=00000001 FIN 01 017C1A 1832 38250 LR R3,R2 R3 :=00000001 02 017C1C 8B30 0008 00008 38251 SLA R3,8 R3 :=00000100 FIN 03 017C20 1744 38252 XR R4,R4 R4 :=00000000 04 017C22 1643 38253 OR R4,R3 R4 :=00000100 05 017C24 0640 38254 BCTR R4,0 R4 :=000000FF FIN 06 017C26 1354 38255 LCR R5,R4 R5 :=FFFFFF01 07 017C28 8950 0002 00002 38256 SLL R5,2 R5 :=FFFFFC04 FIN 08 017C2C 1065 38257 LPR R6,R5 R6 :=000003FC 09 017C2E 1A61 38258 AR R6,R1 R6 :=000003FD 10 017C30 1961 38259 CR R6,R1 != 11 017C32 4780 C086 17C7E 38260 BE T984BAD 12 017C36 1173 38261 LNR R7,R3 R7 :=FFFFFF00 13 017C38 1476 38262 NR R7,R6 R7 :=00000300 14 017C3A 8A70 0002 00002 38263 SRA R7,2 R7 :=000000C0 15 017C3E 1B74 38264 SR R7,R4 R7 :=FFFFFFC1 16 017C40 1283 38265 LTR R8,R3 R8 :=00000100 17 017C42 8880 0001 00001 38266 SRL R8,1 R8 :=00000080 18 017C46 1E83 38267 ALR R8,R3 R8 :=00000180 19 017C48 1F87 38268 SLR R8,R7 R8 :=000001BF 20 017C4A 1583 38269 CLR R8,R3 != 21 017C4C 4780 C086 17C7E 38270 BE T984BAD 22 017C50 4190 025A 0025A 38271 LA R9,602 R9 :=0000025A 23 017C54 1794 38272 XR R9,R4 R9 :=000002A5 FIN 24 017C56 12A9 38273 LTR R10,R9 R10:=000002A5 25 017C58 1AA9 38274 AR R10,R9 R10:=000004FF 26 017C5A 16A5 38275 OR R10,R5 R10:=FFFFFCFF 27 017C5C 106A 38276 LPR R6,R10 R6 :=00000301 28 017C5E 1E64 38277 ALR R6,R4 R6 :=00000400 29 017C60 8B60 0001 00001 38278 SLA R6,1 R6 :=00000800 30 017C64 1B69 38279 SR R6,R9 R6 :=0000055B 31 017C66 0660 38280 BCTR R6,0 R6 :=0000055A 32 017C68 1465 38281 NR R6,R5 R6 :=00000400 33 017C6A 8A60 0005 00005 38282 SRA R6,5 R6 :=00000020 34 017C6E 06FB 38283 BCTR R15,R11 38284 TSIMRET PAGE 699 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017C70 58F0 C090 17C88 38285+ L R15,=A(SAVETST) R15 := current save area 017C74 58DF 0004 00004 38286+ L R13,4(R15) get old save area back 017C78 98EC D00C 0000C 38287+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017C7C 07FE 38288+ BR 14 RETURN 02000000 38289 * 017C7E 38290 DS 0H 38291 T984BAD ABEND 60 017C7E 38292+T984BAD DS 0H 00400002 017C7E 4110 003C 0003C 38293+ LA 1,60 LOAD PARAMETER REG 1 01900002 017C82 0A0D 38294+ SVC 13 LINK TO ABEND ROUTINE 02050002 38295 TSIMEND 017C88 38296+ LTORG 017C88 00000458 38297 =A(SAVETST) 17C8C 38298+T984TEND EQU * 38299 * 38300 * Test 985 -- Mix Int RR 1st 35 ---------------------------- 38301 * 38302 TSIMBEG T985,25000,1,1,C'T700 1st 35',DIS=1 38303+* 004904 38304+TDSCDAT CSECT 004908 38305+ DS 0D 38306+* 004908 00017C90 38307+T985TDSC DC A(T985) // TENTRY 00490C 00000094 38308+ DC A(T985TEND-T985) // TLENGTH 004910 000061A8 38309+ DC F'25000' // TLRCNT 004914 00000001 38310+ DC F'1' // TIGCNT 004918 00000001 38311+ DC F'1' // TLTYPE 002171 38312+TEXT CSECT 002171 E3F9F8F5 38313+SPTR3602 DC C'T985' 00491C 38314+TDSCDAT CSECT 00491C 38315+ DS 0F 00491C 04002171 38316+ DC AL1(L'SPTR3602),AL3(SPTR3602) 002175 38317+TEXT CSECT 002175 E3F7F0F040F1A2A3 38318+SPTR3603 DC C'T700 1st 35' 004920 38319+TDSCDAT CSECT 004920 38320+ DS 0F 004920 0B002175 38321+ DC AL1(L'SPTR3603),AL3(SPTR3603) 38322+* 004E4C 38323+TDSCTBL CSECT 04E4C 38324+T985TPTR EQU * 004E4C 01004908 38325+ DC X'01',AL3(T985TDSC) disabled test 38326+* 017C8C 38327+TCODE CSECT 017C90 38328+ DS 0D ensure double word alignment for test 017C90 38329+T985 DS 0H 01650000 017C90 90EC D00C 0000C 38330+ STM 14,12,12(13) SAVE REGISTERS 02950000 017C94 18CF 38331+ LR R12,R15 base register := entry address 17C90 38332+ USING T985,R12 declare code base register 017C96 41B0 C01E 17CAE 38333+ LA R11,T985L load loop target to R11 017C9A 58F0 C090 17D20 38334+ L R15,=A(SAVETST) R15 := current save area 017C9E 50DF 0004 00004 38335+ ST R13,4(R15) set back pointer in current save area 017CA2 182D 38336+ LR R2,R13 remember callers save area 017CA4 18DF 38337+ LR R13,R15 setup current save area 017CA6 50D2 0008 00008 38338+ ST R13,8(R2) set forw pointer in callers save area 00000 38339+ USING TDSC,R1 declare TDSC base register PAGE 700 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017CAA 58F0 1008 00008 38340+ L R15,TLRCNT load local repeat count to R15 38341+* 38342 * 17CAE 38343 T985L EQU * 017CAE 4120 0001 00001 38344 LA R2,1 R2 :=00000001 FIN 01 017CB2 1832 38345 LR R3,R2 R3 :=00000001 02 017CB4 8B30 0008 00008 38346 SLA R3,8 R3 :=00000100 FIN 03 017CB8 1744 38347 XR R4,R4 R4 :=00000000 04 017CBA 1643 38348 OR R4,R3 R4 :=00000100 05 017CBC 0640 38349 BCTR R4,0 R4 :=000000FF FIN 06 017CBE 1354 38350 LCR R5,R4 R5 :=FFFFFF01 07 017CC0 8950 0002 00002 38351 SLL R5,2 R5 :=FFFFFC04 FIN 08 017CC4 1065 38352 LPR R6,R5 R6 :=000003FC 09 017CC6 1A61 38353 AR R6,R1 R6 :=000003FD 10 017CC8 1961 38354 CR R6,R1 != 11 017CCA 4780 C088 17D18 38355 BE T985BAD 12 017CCE 1173 38356 LNR R7,R3 R7 :=FFFFFF00 13 017CD0 1476 38357 NR R7,R6 R7 :=00000300 14 017CD2 8A70 0002 00002 38358 SRA R7,2 R7 :=000000C0 15 017CD6 1B74 38359 SR R7,R4 R7 :=FFFFFFC1 16 017CD8 1283 38360 LTR R8,R3 R8 :=00000100 17 017CDA 8880 0001 00001 38361 SRL R8,1 R8 :=00000080 18 017CDE 1E83 38362 ALR R8,R3 R8 :=00000180 19 017CE0 1F87 38363 SLR R8,R7 R8 :=000001BF 20 017CE2 1583 38364 CLR R8,R3 != 21 017CE4 4780 C088 17D18 38365 BE T985BAD 22 017CE8 4190 025A 0025A 38366 LA R9,602 R9 :=0000025A 23 017CEC 1794 38367 XR R9,R4 R9 :=000002A5 FIN 24 017CEE 12A9 38368 LTR R10,R9 R10:=000002A5 25 017CF0 1AA9 38369 AR R10,R9 R10:=000004FF 26 017CF2 16A5 38370 OR R10,R5 R10:=FFFFFCFF 27 017CF4 106A 38371 LPR R6,R10 R6 :=00000301 28 017CF6 1E64 38372 ALR R6,R4 R6 :=00000400 29 017CF8 8B60 0001 00001 38373 SLA R6,1 R6 :=00000800 30 017CFC 1B69 38374 SR R6,R9 R6 :=0000055B 31 017CFE 0660 38375 BCTR R6,0 R6 :=0000055A 32 017D00 1465 38376 NR R6,R5 R6 :=00000400 33 017D02 8A60 0005 00005 38377 SRA R6,5 R6 :=00000020 34 017D06 1964 38378 CR R6,R4 != 35 017D08 06FB 38379 BCTR R15,R11 38380 TSIMRET 017D0A 58F0 C090 17D20 38381+ L R15,=A(SAVETST) R15 := current save area 017D0E 58DF 0004 00004 38382+ L R13,4(R15) get old save area back 017D12 98EC D00C 0000C 38383+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017D16 07FE 38384+ BR 14 RETURN 02000000 38385 * 017D18 38386 DS 0H 38387 T985BAD ABEND 60 017D18 38388+T985BAD DS 0H 00400002 017D18 4110 003C 0003C 38389+ LA 1,60 LOAD PARAMETER REG 1 01900002 017D1C 0A0D 38390+ SVC 13 LINK TO ABEND ROUTINE 02050002 38391 TSIMEND 017D20 38392+ LTORG 017D20 00000458 38393 =A(SAVETST) 17D24 38394+T985TEND EQU * PAGE 701 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 38395 * 38396 * Test 986 -- Mix Int RR 1st 36 ---------------------------- 38397 * 38398 TSIMBEG T986,20000,1,1,C'T700 1st 36',DIS=1 38399+* 004924 38400+TDSCDAT CSECT 004928 38401+ DS 0D 38402+* 004928 00017D28 38403+T986TDSC DC A(T986) // TENTRY 00492C 00000094 38404+ DC A(T986TEND-T986) // TLENGTH 004930 00004E20 38405+ DC F'20000' // TLRCNT 004934 00000001 38406+ DC F'1' // TIGCNT 004938 00000001 38407+ DC F'1' // TLTYPE 002180 38408+TEXT CSECT 002180 E3F9F8F6 38409+SPTR3613 DC C'T986' 00493C 38410+TDSCDAT CSECT 00493C 38411+ DS 0F 00493C 04002180 38412+ DC AL1(L'SPTR3613),AL3(SPTR3613) 002184 38413+TEXT CSECT 002184 E3F7F0F040F1A2A3 38414+SPTR3614 DC C'T700 1st 36' 004940 38415+TDSCDAT CSECT 004940 38416+ DS 0F 004940 0B002184 38417+ DC AL1(L'SPTR3614),AL3(SPTR3614) 38418+* 004E50 38419+TDSCTBL CSECT 04E50 38420+T986TPTR EQU * 004E50 01004928 38421+ DC X'01',AL3(T986TDSC) disabled test 38422+* 017D24 38423+TCODE CSECT 017D28 38424+ DS 0D ensure double word alignment for test 017D28 38425+T986 DS 0H 01650000 017D28 90EC D00C 0000C 38426+ STM 14,12,12(13) SAVE REGISTERS 02950000 017D2C 18CF 38427+ LR R12,R15 base register := entry address 17D28 38428+ USING T986,R12 declare code base register 017D2E 41B0 C01E 17D46 38429+ LA R11,T986L load loop target to R11 017D32 58F0 C090 17DB8 38430+ L R15,=A(SAVETST) R15 := current save area 017D36 50DF 0004 00004 38431+ ST R13,4(R15) set back pointer in current save area 017D3A 182D 38432+ LR R2,R13 remember callers save area 017D3C 18DF 38433+ LR R13,R15 setup current save area 017D3E 50D2 0008 00008 38434+ ST R13,8(R2) set forw pointer in callers save area 00000 38435+ USING TDSC,R1 declare TDSC base register 017D42 58F0 1008 00008 38436+ L R15,TLRCNT load local repeat count to R15 38437+* 38438 * 17D46 38439 T986L EQU * 017D46 4120 0001 00001 38440 LA R2,1 R2 :=00000001 FIN 01 017D4A 1832 38441 LR R3,R2 R3 :=00000001 02 017D4C 8B30 0008 00008 38442 SLA R3,8 R3 :=00000100 FIN 03 017D50 1744 38443 XR R4,R4 R4 :=00000000 04 017D52 1643 38444 OR R4,R3 R4 :=00000100 05 017D54 0640 38445 BCTR R4,0 R4 :=000000FF FIN 06 017D56 1354 38446 LCR R5,R4 R5 :=FFFFFF01 07 017D58 8950 0002 00002 38447 SLL R5,2 R5 :=FFFFFC04 FIN 08 017D5C 1065 38448 LPR R6,R5 R6 :=000003FC 09 017D5E 1A61 38449 AR R6,R1 R6 :=000003FD 10 PAGE 702 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017D60 1961 38450 CR R6,R1 != 11 017D62 4780 C08A 17DB2 38451 BE T986BAD 12 017D66 1173 38452 LNR R7,R3 R7 :=FFFFFF00 13 017D68 1476 38453 NR R7,R6 R7 :=00000300 14 017D6A 8A70 0002 00002 38454 SRA R7,2 R7 :=000000C0 15 017D6E 1B74 38455 SR R7,R4 R7 :=FFFFFFC1 16 017D70 1283 38456 LTR R8,R3 R8 :=00000100 17 017D72 8880 0001 00001 38457 SRL R8,1 R8 :=00000080 18 017D76 1E83 38458 ALR R8,R3 R8 :=00000180 19 017D78 1F87 38459 SLR R8,R7 R8 :=000001BF 20 017D7A 1583 38460 CLR R8,R3 != 21 017D7C 4780 C08A 17DB2 38461 BE T986BAD 22 017D80 4190 025A 0025A 38462 LA R9,602 R9 :=0000025A 23 017D84 1794 38463 XR R9,R4 R9 :=000002A5 FIN 24 017D86 12A9 38464 LTR R10,R9 R10:=000002A5 25 017D88 1AA9 38465 AR R10,R9 R10:=000004FF 26 017D8A 16A5 38466 OR R10,R5 R10:=FFFFFCFF 27 017D8C 106A 38467 LPR R6,R10 R6 :=00000301 28 017D8E 1E64 38468 ALR R6,R4 R6 :=00000400 29 017D90 8B60 0001 00001 38469 SLA R6,1 R6 :=00000800 30 017D94 1B69 38470 SR R6,R9 R6 :=0000055B 31 017D96 0660 38471 BCTR R6,0 R6 :=0000055A 32 017D98 1465 38472 NR R6,R5 R6 :=00000400 33 017D9A 8A60 0005 00005 38473 SRA R6,5 R6 :=00000020 34 017D9E 1964 38474 CR R6,R4 != 35 017DA0 1176 38475 LNR R7,R6 R7 :=FFFFFFC0 36 017DA2 06FB 38476 BCTR R15,R11 38477 TSIMRET 017DA4 58F0 C090 17DB8 38478+ L R15,=A(SAVETST) R15 := current save area 017DA8 58DF 0004 00004 38479+ L R13,4(R15) get old save area back 017DAC 98EC D00C 0000C 38480+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017DB0 07FE 38481+ BR 14 RETURN 02000000 38482 * 017DB2 38483 DS 0H 38484 T986BAD ABEND 60 017DB2 38485+T986BAD DS 0H 00400002 017DB2 4110 003C 0003C 38486+ LA 1,60 LOAD PARAMETER REG 1 01900002 017DB6 0A0D 38487+ SVC 13 LINK TO ABEND ROUTINE 02050002 38488 TSIMEND 017DB8 38489+ LTORG 017DB8 00000458 38490 =A(SAVETST) 17DBC 38491+T986TEND EQU * 38492 * 38493 * Test 987 -- Mix Int RR 1st 37 ---------------------------- 38494 * 38495 TSIMBEG T987,20000,1,1,C'T700 1st 37',DIS=1 38496+* 004944 38497+TDSCDAT CSECT 004948 38498+ DS 0D 38499+* 004948 00017DC0 38500+T987TDSC DC A(T987) // TENTRY 00494C 0000009C 38501+ DC A(T987TEND-T987) // TLENGTH 004950 00004E20 38502+ DC F'20000' // TLRCNT 004954 00000001 38503+ DC F'1' // TIGCNT 004958 00000001 38504+ DC F'1' // TLTYPE PAGE 703 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 00218F 38505+TEXT CSECT 00218F E3F9F8F7 38506+SPTR3624 DC C'T987' 00495C 38507+TDSCDAT CSECT 00495C 38508+ DS 0F 00495C 0400218F 38509+ DC AL1(L'SPTR3624),AL3(SPTR3624) 002193 38510+TEXT CSECT 002193 E3F7F0F040F1A2A3 38511+SPTR3625 DC C'T700 1st 37' 004960 38512+TDSCDAT CSECT 004960 38513+ DS 0F 004960 0B002193 38514+ DC AL1(L'SPTR3625),AL3(SPTR3625) 38515+* 004E54 38516+TDSCTBL CSECT 04E54 38517+T987TPTR EQU * 004E54 01004948 38518+ DC X'01',AL3(T987TDSC) disabled test 38519+* 017DBC 38520+TCODE CSECT 017DC0 38521+ DS 0D ensure double word alignment for test 017DC0 38522+T987 DS 0H 01650000 017DC0 90EC D00C 0000C 38523+ STM 14,12,12(13) SAVE REGISTERS 02950000 017DC4 18CF 38524+ LR R12,R15 base register := entry address 17DC0 38525+ USING T987,R12 declare code base register 017DC6 41B0 C01E 17DDE 38526+ LA R11,T987L load loop target to R11 017DCA 58F0 C098 17E58 38527+ L R15,=A(SAVETST) R15 := current save area 017DCE 50DF 0004 00004 38528+ ST R13,4(R15) set back pointer in current save area 017DD2 182D 38529+ LR R2,R13 remember callers save area 017DD4 18DF 38530+ LR R13,R15 setup current save area 017DD6 50D2 0008 00008 38531+ ST R13,8(R2) set forw pointer in callers save area 00000 38532+ USING TDSC,R1 declare TDSC base register 017DDA 58F0 1008 00008 38533+ L R15,TLRCNT load local repeat count to R15 38534+* 38535 * 17DDE 38536 T987L EQU * 017DDE 4120 0001 00001 38537 LA R2,1 R2 :=00000001 FIN 01 017DE2 1832 38538 LR R3,R2 R3 :=00000001 02 017DE4 8B30 0008 00008 38539 SLA R3,8 R3 :=00000100 FIN 03 017DE8 1744 38540 XR R4,R4 R4 :=00000000 04 017DEA 1643 38541 OR R4,R3 R4 :=00000100 05 017DEC 0640 38542 BCTR R4,0 R4 :=000000FF FIN 06 017DEE 1354 38543 LCR R5,R4 R5 :=FFFFFF01 07 017DF0 8950 0002 00002 38544 SLL R5,2 R5 :=FFFFFC04 FIN 08 017DF4 1065 38545 LPR R6,R5 R6 :=000003FC 09 017DF6 1A61 38546 AR R6,R1 R6 :=000003FD 10 017DF8 1961 38547 CR R6,R1 != 11 017DFA 4780 C08E 17E4E 38548 BE T987BAD 12 017DFE 1173 38549 LNR R7,R3 R7 :=FFFFFF00 13 017E00 1476 38550 NR R7,R6 R7 :=00000300 14 017E02 8A70 0002 00002 38551 SRA R7,2 R7 :=000000C0 15 017E06 1B74 38552 SR R7,R4 R7 :=FFFFFFC1 16 017E08 1283 38553 LTR R8,R3 R8 :=00000100 17 017E0A 8880 0001 00001 38554 SRL R8,1 R8 :=00000080 18 017E0E 1E83 38555 ALR R8,R3 R8 :=00000180 19 017E10 1F87 38556 SLR R8,R7 R8 :=000001BF 20 017E12 1583 38557 CLR R8,R3 != 21 017E14 4780 C08E 17E4E 38558 BE T987BAD 22 017E18 4190 025A 0025A 38559 LA R9,602 R9 :=0000025A 23 PAGE 704 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017E1C 1794 38560 XR R9,R4 R9 :=000002A5 FIN 24 017E1E 12A9 38561 LTR R10,R9 R10:=000002A5 25 017E20 1AA9 38562 AR R10,R9 R10:=000004FF 26 017E22 16A5 38563 OR R10,R5 R10:=FFFFFCFF 27 017E24 106A 38564 LPR R6,R10 R6 :=00000301 28 017E26 1E64 38565 ALR R6,R4 R6 :=00000400 29 017E28 8B60 0001 00001 38566 SLA R6,1 R6 :=00000800 30 017E2C 1B69 38567 SR R6,R9 R6 :=0000055B 31 017E2E 0660 38568 BCTR R6,0 R6 :=0000055A 32 017E30 1465 38569 NR R6,R5 R6 :=00000400 33 017E32 8A60 0005 00005 38570 SRA R6,5 R6 :=00000020 34 017E36 1964 38571 CR R6,R4 != 35 017E38 1176 38572 LNR R7,R6 R7 :=FFFFFFC0 36 017E3A 8970 0002 00002 38573 SLL R7,2 R7 :=FFFFFF00 37 017E3E 06FB 38574 BCTR R15,R11 38575 TSIMRET 017E40 58F0 C098 17E58 38576+ L R15,=A(SAVETST) R15 := current save area 017E44 58DF 0004 00004 38577+ L R13,4(R15) get old save area back 017E48 98EC D00C 0000C 38578+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017E4C 07FE 38579+ BR 14 RETURN 02000000 38580 * 017E4E 38581 DS 0H 38582 T987BAD ABEND 60 017E4E 38583+T987BAD DS 0H 00400002 017E4E 4110 003C 0003C 38584+ LA 1,60 LOAD PARAMETER REG 1 01900002 017E52 0A0D 38585+ SVC 13 LINK TO ABEND ROUTINE 02050002 38586 TSIMEND 017E58 38587+ LTORG 017E58 00000458 38588 =A(SAVETST) 17E5C 38589+T987TEND EQU * 38590 * 38591 * Test 988 -- Mix Int RR 1st 38 ---------------------------- 38592 * 38593 TSIMBEG T988,20000,1,1,C'T700 1st 38',DIS=1 38594+* 004964 38595+TDSCDAT CSECT 004968 38596+ DS 0D 38597+* 004968 00017E60 38598+T988TDSC DC A(T988) // TENTRY 00496C 0000009C 38599+ DC A(T988TEND-T988) // TLENGTH 004970 00004E20 38600+ DC F'20000' // TLRCNT 004974 00000001 38601+ DC F'1' // TIGCNT 004978 00000001 38602+ DC F'1' // TLTYPE 00219E 38603+TEXT CSECT 00219E E3F9F8F8 38604+SPTR3635 DC C'T988' 00497C 38605+TDSCDAT CSECT 00497C 38606+ DS 0F 00497C 0400219E 38607+ DC AL1(L'SPTR3635),AL3(SPTR3635) 0021A2 38608+TEXT CSECT 0021A2 E3F7F0F040F1A2A3 38609+SPTR3636 DC C'T700 1st 38' 004980 38610+TDSCDAT CSECT 004980 38611+ DS 0F 004980 0B0021A2 38612+ DC AL1(L'SPTR3636),AL3(SPTR3636) 38613+* 004E58 38614+TDSCTBL CSECT PAGE 705 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 04E58 38615+T988TPTR EQU * 004E58 01004968 38616+ DC X'01',AL3(T988TDSC) disabled test 38617+* 017E5C 38618+TCODE CSECT 017E60 38619+ DS 0D ensure double word alignment for test 017E60 38620+T988 DS 0H 01650000 017E60 90EC D00C 0000C 38621+ STM 14,12,12(13) SAVE REGISTERS 02950000 017E64 18CF 38622+ LR R12,R15 base register := entry address 17E60 38623+ USING T988,R12 declare code base register 017E66 41B0 C01E 17E7E 38624+ LA R11,T988L load loop target to R11 017E6A 58F0 C098 17EF8 38625+ L R15,=A(SAVETST) R15 := current save area 017E6E 50DF 0004 00004 38626+ ST R13,4(R15) set back pointer in current save area 017E72 182D 38627+ LR R2,R13 remember callers save area 017E74 18DF 38628+ LR R13,R15 setup current save area 017E76 50D2 0008 00008 38629+ ST R13,8(R2) set forw pointer in callers save area 00000 38630+ USING TDSC,R1 declare TDSC base register 017E7A 58F0 1008 00008 38631+ L R15,TLRCNT load local repeat count to R15 38632+* 38633 * 17E7E 38634 T988L EQU * 017E7E 4120 0001 00001 38635 LA R2,1 R2 :=00000001 FIN 01 017E82 1832 38636 LR R3,R2 R3 :=00000001 02 017E84 8B30 0008 00008 38637 SLA R3,8 R3 :=00000100 FIN 03 017E88 1744 38638 XR R4,R4 R4 :=00000000 04 017E8A 1643 38639 OR R4,R3 R4 :=00000100 05 017E8C 0640 38640 BCTR R4,0 R4 :=000000FF FIN 06 017E8E 1354 38641 LCR R5,R4 R5 :=FFFFFF01 07 017E90 8950 0002 00002 38642 SLL R5,2 R5 :=FFFFFC04 FIN 08 017E94 1065 38643 LPR R6,R5 R6 :=000003FC 09 017E96 1A61 38644 AR R6,R1 R6 :=000003FD 10 017E98 1961 38645 CR R6,R1 != 11 017E9A 4780 C090 17EF0 38646 BE T988BAD 12 017E9E 1173 38647 LNR R7,R3 R7 :=FFFFFF00 13 017EA0 1476 38648 NR R7,R6 R7 :=00000300 14 017EA2 8A70 0002 00002 38649 SRA R7,2 R7 :=000000C0 15 017EA6 1B74 38650 SR R7,R4 R7 :=FFFFFFC1 16 017EA8 1283 38651 LTR R8,R3 R8 :=00000100 17 017EAA 8880 0001 00001 38652 SRL R8,1 R8 :=00000080 18 017EAE 1E83 38653 ALR R8,R3 R8 :=00000180 19 017EB0 1F87 38654 SLR R8,R7 R8 :=000001BF 20 017EB2 1583 38655 CLR R8,R3 != 21 017EB4 4780 C090 17EF0 38656 BE T988BAD 22 017EB8 4190 025A 0025A 38657 LA R9,602 R9 :=0000025A 23 017EBC 1794 38658 XR R9,R4 R9 :=000002A5 FIN 24 017EBE 12A9 38659 LTR R10,R9 R10:=000002A5 25 017EC0 1AA9 38660 AR R10,R9 R10:=000004FF 26 017EC2 16A5 38661 OR R10,R5 R10:=FFFFFCFF 27 017EC4 106A 38662 LPR R6,R10 R6 :=00000301 28 017EC6 1E64 38663 ALR R6,R4 R6 :=00000400 29 017EC8 8B60 0001 00001 38664 SLA R6,1 R6 :=00000800 30 017ECC 1B69 38665 SR R6,R9 R6 :=0000055B 31 017ECE 0660 38666 BCTR R6,0 R6 :=0000055A 32 017ED0 1465 38667 NR R6,R5 R6 :=00000400 33 017ED2 8A60 0005 00005 38668 SRA R6,5 R6 :=00000020 34 017ED6 1964 38669 CR R6,R4 != 35 PAGE 706 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017ED8 1176 38670 LNR R7,R6 R7 :=FFFFFFC0 36 017EDA 8970 0002 00002 38671 SLL R7,2 R7 :=FFFFFF00 37 017EDE 1F72 38672 SLR R7,R2 R7 :=FFFFFEFF 38 017EE0 06FB 38673 BCTR R15,R11 38674 TSIMRET 017EE2 58F0 C098 17EF8 38675+ L R15,=A(SAVETST) R15 := current save area 017EE6 58DF 0004 00004 38676+ L R13,4(R15) get old save area back 017EEA 98EC D00C 0000C 38677+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017EEE 07FE 38678+ BR 14 RETURN 02000000 38679 * 017EF0 38680 DS 0H 38681 T988BAD ABEND 60 017EF0 38682+T988BAD DS 0H 00400002 017EF0 4110 003C 0003C 38683+ LA 1,60 LOAD PARAMETER REG 1 01900002 017EF4 0A0D 38684+ SVC 13 LINK TO ABEND ROUTINE 02050002 38685 TSIMEND 017EF8 38686+ LTORG 017EF8 00000458 38687 =A(SAVETST) 17EFC 38688+T988TEND EQU * 38689 * 38690 * Test 989 -- Mix Int RR 1st 39 ---------------------------- 38691 * 38692 TSIMBEG T989,20000,1,1,C'T700 1st 39',DIS=1 38693+* 004984 38694+TDSCDAT CSECT 004988 38695+ DS 0D 38696+* 004988 00017F00 38697+T989TDSC DC A(T989) // TENTRY 00498C 0000009C 38698+ DC A(T989TEND-T989) // TLENGTH 004990 00004E20 38699+ DC F'20000' // TLRCNT 004994 00000001 38700+ DC F'1' // TIGCNT 004998 00000001 38701+ DC F'1' // TLTYPE 0021AD 38702+TEXT CSECT 0021AD E3F9F8F9 38703+SPTR3646 DC C'T989' 00499C 38704+TDSCDAT CSECT 00499C 38705+ DS 0F 00499C 040021AD 38706+ DC AL1(L'SPTR3646),AL3(SPTR3646) 0021B1 38707+TEXT CSECT 0021B1 E3F7F0F040F1A2A3 38708+SPTR3647 DC C'T700 1st 39' 0049A0 38709+TDSCDAT CSECT 0049A0 38710+ DS 0F 0049A0 0B0021B1 38711+ DC AL1(L'SPTR3647),AL3(SPTR3647) 38712+* 004E5C 38713+TDSCTBL CSECT 04E5C 38714+T989TPTR EQU * 004E5C 01004988 38715+ DC X'01',AL3(T989TDSC) disabled test 38716+* 017EFC 38717+TCODE CSECT 017F00 38718+ DS 0D ensure double word alignment for test 017F00 38719+T989 DS 0H 01650000 017F00 90EC D00C 0000C 38720+ STM 14,12,12(13) SAVE REGISTERS 02950000 017F04 18CF 38721+ LR R12,R15 base register := entry address 17F00 38722+ USING T989,R12 declare code base register 017F06 41B0 C01E 17F1E 38723+ LA R11,T989L load loop target to R11 017F0A 58F0 C098 17F98 38724+ L R15,=A(SAVETST) R15 := current save area PAGE 707 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017F0E 50DF 0004 00004 38725+ ST R13,4(R15) set back pointer in current save area 017F12 182D 38726+ LR R2,R13 remember callers save area 017F14 18DF 38727+ LR R13,R15 setup current save area 017F16 50D2 0008 00008 38728+ ST R13,8(R2) set forw pointer in callers save area 00000 38729+ USING TDSC,R1 declare TDSC base register 017F1A 58F0 1008 00008 38730+ L R15,TLRCNT load local repeat count to R15 38731+* 38732 * 17F1E 38733 T989L EQU * 017F1E 4120 0001 00001 38734 LA R2,1 R2 :=00000001 FIN 01 017F22 1832 38735 LR R3,R2 R3 :=00000001 02 017F24 8B30 0008 00008 38736 SLA R3,8 R3 :=00000100 FIN 03 017F28 1744 38737 XR R4,R4 R4 :=00000000 04 017F2A 1643 38738 OR R4,R3 R4 :=00000100 05 017F2C 0640 38739 BCTR R4,0 R4 :=000000FF FIN 06 017F2E 1354 38740 LCR R5,R4 R5 :=FFFFFF01 07 017F30 8950 0002 00002 38741 SLL R5,2 R5 :=FFFFFC04 FIN 08 017F34 1065 38742 LPR R6,R5 R6 :=000003FC 09 017F36 1A61 38743 AR R6,R1 R6 :=000003FD 10 017F38 1961 38744 CR R6,R1 != 11 017F3A 4780 C092 17F92 38745 BE T989BAD 12 017F3E 1173 38746 LNR R7,R3 R7 :=FFFFFF00 13 017F40 1476 38747 NR R7,R6 R7 :=00000300 14 017F42 8A70 0002 00002 38748 SRA R7,2 R7 :=000000C0 15 017F46 1B74 38749 SR R7,R4 R7 :=FFFFFFC1 16 017F48 1283 38750 LTR R8,R3 R8 :=00000100 17 017F4A 8880 0001 00001 38751 SRL R8,1 R8 :=00000080 18 017F4E 1E83 38752 ALR R8,R3 R8 :=00000180 19 017F50 1F87 38753 SLR R8,R7 R8 :=000001BF 20 017F52 1583 38754 CLR R8,R3 != 21 017F54 4780 C092 17F92 38755 BE T989BAD 22 017F58 4190 025A 0025A 38756 LA R9,602 R9 :=0000025A 23 017F5C 1794 38757 XR R9,R4 R9 :=000002A5 FIN 24 017F5E 12A9 38758 LTR R10,R9 R10:=000002A5 25 017F60 1AA9 38759 AR R10,R9 R10:=000004FF 26 017F62 16A5 38760 OR R10,R5 R10:=FFFFFCFF 27 017F64 106A 38761 LPR R6,R10 R6 :=00000301 28 017F66 1E64 38762 ALR R6,R4 R6 :=00000400 29 017F68 8B60 0001 00001 38763 SLA R6,1 R6 :=00000800 30 017F6C 1B69 38764 SR R6,R9 R6 :=0000055B 31 017F6E 0660 38765 BCTR R6,0 R6 :=0000055A 32 017F70 1465 38766 NR R6,R5 R6 :=00000400 33 017F72 8A60 0005 00005 38767 SRA R6,5 R6 :=00000020 34 017F76 1964 38768 CR R6,R4 != 35 017F78 1176 38769 LNR R7,R6 R7 :=FFFFFFC0 36 017F7A 8970 0002 00002 38770 SLL R7,2 R7 :=FFFFFF00 37 017F7E 1F72 38771 SLR R7,R2 R7 :=FFFFFEFF 38 017F80 1387 38772 LCR R8,R7 R8 :=00000101 39 017F82 06FB 38773 BCTR R15,R11 38774 TSIMRET 017F84 58F0 C098 17F98 38775+ L R15,=A(SAVETST) R15 := current save area 017F88 58DF 0004 00004 38776+ L R13,4(R15) get old save area back 017F8C 98EC D00C 0000C 38777+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 017F90 07FE 38778+ BR 14 RETURN 02000000 38779 * PAGE 708 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017F92 38780 DS 0H 38781 T989BAD ABEND 60 017F92 38782+T989BAD DS 0H 00400002 017F92 4110 003C 0003C 38783+ LA 1,60 LOAD PARAMETER REG 1 01900002 017F96 0A0D 38784+ SVC 13 LINK TO ABEND ROUTINE 02050002 38785 TSIMEND 017F98 38786+ LTORG 017F98 00000458 38787 =A(SAVETST) 17F9C 38788+T989TEND EQU * 38789 * 38790 * Test 990 -- Mix Int RR 1st 40 ---------------------------- 38791 * 38792 TSIMBEG T990,20000,1,1,C'T700 1st 40',DIS=1 38793+* 0049A4 38794+TDSCDAT CSECT 0049A8 38795+ DS 0D 38796+* 0049A8 00017FA0 38797+T990TDSC DC A(T990) // TENTRY 0049AC 000000A4 38798+ DC A(T990TEND-T990) // TLENGTH 0049B0 00004E20 38799+ DC F'20000' // TLRCNT 0049B4 00000001 38800+ DC F'1' // TIGCNT 0049B8 00000001 38801+ DC F'1' // TLTYPE 0021BC 38802+TEXT CSECT 0021BC E3F9F9F0 38803+SPTR3657 DC C'T990' 0049BC 38804+TDSCDAT CSECT 0049BC 38805+ DS 0F 0049BC 040021BC 38806+ DC AL1(L'SPTR3657),AL3(SPTR3657) 0021C0 38807+TEXT CSECT 0021C0 E3F7F0F040F1A2A3 38808+SPTR3658 DC C'T700 1st 40' 0049C0 38809+TDSCDAT CSECT 0049C0 38810+ DS 0F 0049C0 0B0021C0 38811+ DC AL1(L'SPTR3658),AL3(SPTR3658) 38812+* 004E60 38813+TDSCTBL CSECT 04E60 38814+T990TPTR EQU * 004E60 010049A8 38815+ DC X'01',AL3(T990TDSC) disabled test 38816+* 017F9C 38817+TCODE CSECT 017FA0 38818+ DS 0D ensure double word alignment for test 017FA0 38819+T990 DS 0H 01650000 017FA0 90EC D00C 0000C 38820+ STM 14,12,12(13) SAVE REGISTERS 02950000 017FA4 18CF 38821+ LR R12,R15 base register := entry address 17FA0 38822+ USING T990,R12 declare code base register 017FA6 41B0 C01E 17FBE 38823+ LA R11,T990L load loop target to R11 017FAA 58F0 C0A0 18040 38824+ L R15,=A(SAVETST) R15 := current save area 017FAE 50DF 0004 00004 38825+ ST R13,4(R15) set back pointer in current save area 017FB2 182D 38826+ LR R2,R13 remember callers save area 017FB4 18DF 38827+ LR R13,R15 setup current save area 017FB6 50D2 0008 00008 38828+ ST R13,8(R2) set forw pointer in callers save area 00000 38829+ USING TDSC,R1 declare TDSC base register 017FBA 58F0 1008 00008 38830+ L R15,TLRCNT load local repeat count to R15 38831+* 38832 * 17FBE 38833 T990L EQU * 017FBE 4120 0001 00001 38834 LA R2,1 R2 :=00000001 FIN 01 PAGE 709 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 017FC2 1832 38835 LR R3,R2 R3 :=00000001 02 017FC4 8B30 0008 00008 38836 SLA R3,8 R3 :=00000100 FIN 03 017FC8 1744 38837 XR R4,R4 R4 :=00000000 04 017FCA 1643 38838 OR R4,R3 R4 :=00000100 05 017FCC 0640 38839 BCTR R4,0 R4 :=000000FF FIN 06 017FCE 1354 38840 LCR R5,R4 R5 :=FFFFFF01 07 017FD0 8950 0002 00002 38841 SLL R5,2 R5 :=FFFFFC04 FIN 08 017FD4 1065 38842 LPR R6,R5 R6 :=000003FC 09 017FD6 1A61 38843 AR R6,R1 R6 :=000003FD 10 017FD8 1961 38844 CR R6,R1 != 11 017FDA 4780 C094 18034 38845 BE T990BAD 12 017FDE 1173 38846 LNR R7,R3 R7 :=FFFFFF00 13 017FE0 1476 38847 NR R7,R6 R7 :=00000300 14 017FE2 8A70 0002 00002 38848 SRA R7,2 R7 :=000000C0 15 017FE6 1B74 38849 SR R7,R4 R7 :=FFFFFFC1 16 017FE8 1283 38850 LTR R8,R3 R8 :=00000100 17 017FEA 8880 0001 00001 38851 SRL R8,1 R8 :=00000080 18 017FEE 1E83 38852 ALR R8,R3 R8 :=00000180 19 017FF0 1F87 38853 SLR R8,R7 R8 :=000001BF 20 017FF2 1583 38854 CLR R8,R3 != 21 017FF4 4780 C094 18034 38855 BE T990BAD 22 017FF8 4190 025A 0025A 38856 LA R9,602 R9 :=0000025A 23 017FFC 1794 38857 XR R9,R4 R9 :=000002A5 FIN 24 017FFE 12A9 38858 LTR R10,R9 R10:=000002A5 25 018000 1AA9 38859 AR R10,R9 R10:=000004FF 26 018002 16A5 38860 OR R10,R5 R10:=FFFFFCFF 27 018004 106A 38861 LPR R6,R10 R6 :=00000301 28 018006 1E64 38862 ALR R6,R4 R6 :=00000400 29 018008 8B60 0001 00001 38863 SLA R6,1 R6 :=00000800 30 01800C 1B69 38864 SR R6,R9 R6 :=0000055B 31 01800E 0660 38865 BCTR R6,0 R6 :=0000055A 32 018010 1465 38866 NR R6,R5 R6 :=00000400 33 018012 8A60 0005 00005 38867 SRA R6,5 R6 :=00000020 34 018016 1964 38868 CR R6,R4 != 35 018018 1176 38869 LNR R7,R6 R7 :=FFFFFFC0 36 01801A 8970 0002 00002 38870 SLL R7,2 R7 :=FFFFFF00 37 01801E 1F72 38871 SLR R7,R2 R7 :=FFFFFEFF 38 018020 1387 38872 LCR R8,R7 R8 :=00000101 39 018022 1583 38873 CLR R8,R3 != 40 018024 06FB 38874 BCTR R15,R11 38875 TSIMRET 018026 58F0 C0A0 18040 38876+ L R15,=A(SAVETST) R15 := current save area 01802A 58DF 0004 00004 38877+ L R13,4(R15) get old save area back 01802E 98EC D00C 0000C 38878+ LM 14,12,12(13) RESTORE THE REGISTERS 00650000 018032 07FE 38879+ BR 14 RETURN 02000000 38880 * 018034 38881 DS 0H 38882 T990BAD ABEND 60 018034 38883+T990BAD DS 0H 00400002 018034 4110 003C 0003C 38884+ LA 1,60 LOAD PARAMETER REG 1 01900002 018038 0A0D 38885+ SVC 13 LINK TO ABEND ROUTINE 02050002 38886 TSIMEND 018040 38887+ LTORG 018040 00000458 38888 =A(SAVETST) 18044 38889+T990TEND EQU * PAGE 710 LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT ASM 0201 16.23 04/18/20 38890 * 38891 * END OF TESTS ================================================== 38892 * 38893 * Remember end of TDSCTBL ---------------------------------- 38894 * 004E64 38895 TDSCTBL CSECT 04E64 38896 TDSCTBLE EQU * 38897 * 38898 * other defs and end ------------------------------------------------- 38899 * 38900 YREGS , 00000 38902+R0 EQU 0 00060000 00001 38903+R1 EQU 1 00070000 00002 38904+R2 EQU 2 00080000 00003 38905+R3 EQU 3 00090000 00004 38906+R4 EQU 4 00100000 00005 38907+R5 EQU 5 00110000 00006 38908+R6 EQU 6 00120000 00007 38909+R7 EQU 7 00130000 00008 38910+R8 EQU 8 00140000 00009 38911+R9 EQU 9 00150000 0000A 38912+R10 EQU 10 00160000 0000B 38913+R11 EQU 11 00170000 0000C 38914+R12 EQU 12 00180000 0000D 38915+R13 EQU 13 00190000 0000E 38916+R14 EQU 14 00200000 0000F 38917+R15 EQU 15 00210000 00000 38919 FR0 EQU 0 00002 38920 FR2 EQU 2 00004 38921 FR4 EQU 4 00006 38922 FR6 EQU 6 000000 38923 END MAIN define main entry point ASSEMBLER DIAGNOSTICS AND STATISTICS PAGE 711 ASM 0201 16.23 04/18/20 NO STATEMENTS FLAGGED IN THIS ASSEMBLY HIGHEST SEVERITY WAS 0 OPTIONS FOR THIS ASSEMBLY ALIGN, ALOGIC, BUFSIZE(MAX), NODECK, ESD, FLAG(0), LINECOUNT(55), LIST, NOMCALL, YFLAG, WORKSIZE(2097152) NOMLOGIC, NONUMBER, OBJECT, NORENT, NORLD, NOSTMT, NOLIBMAC, NOTERMINAL, NOTEST, NOXREF(SHORT) SYSPARM() WORK FILE BUFFER SIZE/NUMBER =19066/15 TOTAL RECORDS READ FROM SYSTEM INPUT 6810 TOTAL RECORDS READ FROM SYSTEM LIBRARY 4151 TOTAL RECORDS PUNCHED 3580 TOTAL RECORDS PRINTED 40414 F64-LEVEL LINKAGE EDITOR OPTIONS SPECIFIED MAP,LIST,LET,NCAL,SIZE=(512000,122880) DEFAULT OPTION(S) USED - SIZE=(481280,92160) MODULE MAP CONTROL SECTION ENTRY NAME ORIGIN LENGTH NAME LOCATION NAME LOCATION NAME LOCATION NAME LOCATION MAIN 00 DEE TEXT DF0 13DB SIOSDATA 21D0 198 DATA 2368 180 TDSCDAT 24E8 24DC TDSCTBL 49C8 49C TCODE 4E68 131DC T330CS 18048 68 T702CS 180B0 40 ENTRY ADDRESS 00 TOTAL LENGTH 180F0 ****GO DOES NOT EXIST BUT HAS BEEN ADDED TO DATA SET AUTHORIZATION CODE IS 0. PERF000I VERS: s370_perf V0.9.8 rev 1026 2018-05-27 PERF001I PARM: /G001/OPTT ind tag lr ig lt addr length 0 T100 22000 100 1 000AAD78 252 1 T101 17000 100 1 000AAE78 452 2 T102 13000 50 1 000AB040 256 3 T103 12000 50 1 000AB140 268 4 T104 10000 50 1 000AB250 254 5 T105 10000 50 1 000AB350 268 6 T106 15000 100 1 000AB460 252 7 T107 13000 100 1 000AB560 264 8 T108 13000 100 1 000AB668 264 9 T109 13000 100 1 000AB770 264 10 T110 13000 50 1 000AB878 260 11 T111 12000 50 1 000AB980 268 12 T112 10000 50 1 000ABA90 252 13 T113 10000 50 1 000ABB90 260 14 T114 10000 50 1 000ABC98 268 15 T115 11000 50 1 000ABDA8 252 16 T116 8000 50 1 000ABEA8 260 17 T117 7000 50 1 000ABFB0 260 18 T118 10000 50 1 000AC0B8 260 19 T120 9000 50 1 000AC1C0 260 20 T121 6500 50 1 000AC2C8 276 21 T122 5000 50 1 000AC3E0 316 22 T123 9000 50 1 000AC520 260 23 T124 6000 50 1 000AC628 276 24 T125 5000 50 2 000AC740 300 25 T150 5000 50 1 000AC870 364 26 T151 5000 50 1 000AC9E0 372 27 T152 5000 50 1 000ACB58 388 28 T153 5000 50 1 000ACCE0 412 29 T154 4000 50 1 000ACE80 556 30 T155 7500 20 1 000AD0B0 676 31 T156 700 20 1 000AD358 428 32 T157 7500 20 1 000AD508 452 33 T160 6000 100 1 000AD6D0 452 34 T161 5000 50 1 000AD898 372 35 T162 7000 20 1 000ADA10 236 36 T165 5000 50 1 000ADB00 372 37 T166 7000 20 1 000ADC78 236 38 T167 3500 20 1 000ADD68 196 39 T168 1200 20 1 000ADE30 236 40 T169 350 20 1 000ADF20 372 41 T170 13000 10 1 000AE098 220 42 T171 11000 10 1 000AE178 220 43 T172 9000 10 1 000AE258 220 44 T173 4500 10 1 000AE338 220 45 T174 1400 10 1 000AE418 184 46 T175 15000 10 1 000AE4D0 212 47 T176 10000 10 1 000AE5A8 212 48 T177 4500 10 1 000AE680 200 49 T178 21000 10 1 000AE748 1260 50 T179 4000 10 1 000AEC38 1356 51 T190 6000 100 1 000AF188 460 52 T191 3000 100 1 000AF358 460 53 T192 3000 100 1 000AF528 460 54 T193 4000 100 1 000AF6F8 460 55 T200 14000 100 1 000AF8C8 260 56 T201 10000 50 1 000AF9D0 256 57 T202 10000 50 1 000AFAD0 254 58 T203 17000 100 1 000AFBD0 260 59 T204 10000 50 1 000AFCD8 256 60 T205 14000 100 1 000AFDD8 260 61 T206 10000 50 1 000AFEE0 256 62 T207 10000 50 1 000AFFE0 254 63 T208 17000 100 1 000B00E0 260 64 T209 10000 50 1 000B01E8 256 65 T210 30000 30 4 000B02E8 124 66 T211 15000 30 4 000B0368 184 67 T212 15000 30 4 000B0420 182 68 T215 14000 20 3 000B04D8 144 69 T216 11000 20 3 000B0568 188 70 T220 24000 30 4 000B0628 180 71 T221 12000 60 5 000B06E0 300 72 T222 30000 30 4 000B0810 180 73 T223 12000 60 5 000B08C8 300 74 T224 30000 30 4 000B09F8 180 75 T225 12000 60 5 000B0AB0 300 76 T230 15000 100 1 000B0BE0 260 77 T231 10000 50 1 000B0CE8 256 78 T232 10000 50 1 000B0DE8 252 79 T235 4500 50 1 000B0EE8 380 80 T236 2500 20 1 000B1068 380 81 T237 1000 20 1 000B11E8 684 82 T238 13000 100 1 000B1498 260 83 T239 14000 100 1 000B15A0 260 84 T240 35000 30 4 000B16A8 180 85 T241 13000 60 5 000B1760 300 86 T242 35000 30 4 000B1890 180 87 T243 13000 60 5 000B1948 300 88 T244 35000 30 4 000B1A78 180 89 T245 14000 60 5 000B1B30 300 90 T250 10000 50 1 000B1C60 252 91 T252 3500 50 1 000B1D60 376 92 T253 1600 20 1 000B1ED8 288 93 T254 700 20 1 000B1FF8 432 94 T255 1200 50 1 000B21A8 624 95 T256 300 20 1 000B2418 440 96 T257 130 20 1 000B25D0 440 97 T258 2500 20 1 000B2788 448 98 T259 300 20 1 000B2948 448 99 T260 17000 100 1 000B2B08 260 100 T261 11000 50 1 000B2C10 256 101 T262 12000 50 1 000B2D10 254 102 T263 18000 100 1 000B2E10 260 103 T264 12000 50 1 000B2F18 256 104 T265 10000 50 1 000B3018 252 105 T266 8000 50 1 000B3118 260 106 T270 7000 20 1 000B3220 180 107 T271 8000 20 1 000B32D8 196 108 T272 5000 20 1 000B33A0 204 109 T273 8000 20 1 000B3470 236 110 T274 2900 20 1 000B3560 372 111 T275 8000 20 1 000B36D8 372 112 T276 1500 20 1 000B3850 676 113 T277 8000 20 1 000B3AF8 676 114 T280 4500 10 1 000B3DA0 216 115 T281 4500 10 1 000B3E78 216 116 T282 600 10 1 000B3F50 216 117 T283 220 10 1 000B4028 216 118 -T284 80 10 1 000B4100 216 119 -T285 5 10 1 000B41D8 216 120 T290 6000 20 1 000B42B0 196 121 T291 6000 20 1 000B4378 188 122 T292 1400 20 1 000B4438 188 123 T295 6000 20 1 000B44F8 212 124 T296 6000 20 1 000B45D0 204 125 T297 1400 20 1 000B46A0 204 126 T300 20000 100 1 000B4770 252 127 T301 22000 100 1 000B4870 460 128 T302 12000 60 1 000B4A40 320 129 T303 6000 60 1 000B4B80 4424 130 T304 70000 10 1 000B5CC8 116 131 T305 45000 10 1 000B5D40 4220 132 T310 15000 100 1 000B6DC0 264 133 T311 700000 1 0 000B6EC8 52 134 T312 600000 1 0 000B6F00 52 135 T315 6000 100 6 000B6F38 68 136 T320 8000 50 1 000B6F80 156 137 T321 2500 50 1 000B7020 160 138 T322 7000 50 1 000B70C0 252 139 T323 3500 50 1 000B71C0 264 140 T324 8000 50 1 000B72C8 156 141 T325 7000 50 1 000B7368 252 142 T330 4500 10 1 000B7468 120 143 T400 2500 50 1 000B74E0 260 144 T401 2500 50 1 000B75E8 272 145 T402 6000 20 1 000B76F8 180 146 T403 2500 20 1 000B77B0 196 147 T404 6000 20 1 000B7878 180 148 T405 2500 20 1 000B7930 196 149 T410 3300 10 1 000B79F8 224 150 T411 1200 10 1 000B7AD8 252 151 T415 3300 10 1 000B7BD8 224 152 T420 700 30 7 000B7CB8 252 153 T421 700 30 8 000B7DB8 284 154 T422 700 30 7 000B7ED8 252 155 T423 700 30 8 000B7FD8 284 156 T424 900 20 7 000B80F8 188 157 T425 900 20 8 000B81B8 212 158 T426 1000 10 1 000B8290 228 159 T427 500 10 1 000B8378 340 160 T430 1000 30 1 000B84D0 244 161 T431 1000 30 1 000B85C8 260 162 T440 1600 30 1 000B86D0 244 163 T441 1600 30 1 000B87C8 260 164 T442 1600 30 1 000B88D0 252 165 T443 1600 30 1 000B89D0 252 166 T445 1600 25 8 000B8AD0 236 167 T446 1000 25 8 000B8BC0 236 168 T450 5000 20 1 000B8CB0 180 169 T451 2000 20 1 000B8D68 204 170 T500 10000 100 1 000B8E38 264 171 T501 10000 50 1 000B8F40 256 172 T502 10000 50 1 000B9040 268 173 T503 10000 100 1 000B9150 264 174 T504 10000 100 1 000B9258 264 175 T505 10000 100 1 000B9360 264 176 T506 9000 100 1 000B9468 264 177 T507 8000 100 1 000B9570 268 178 T508 10000 50 1 000B9680 260 179 T509 10000 50 1 000B9788 268 180 T510 8000 50 1 000B9898 160 181 T511 6000 50 1 000B9938 256 182 T512 8000 50 1 000B9A38 160 183 T513 6000 50 1 000B9AD8 256 184 T514 10000 50 9 000B9BD8 172 185 T515 6500 50 9 000B9C88 268 186 T516 5000 50 9 000B9D98 172 187 T517 4000 50 9 000B9E48 268 188 T520 10000 50 1 000B9F58 172 189 T521 6000 50 1 000BA008 268 190 T522 10000 50 9 000BA118 168 191 T523 16000 50 9 000BA1C0 160 192 T530 9000 100 1 000BA260 268 193 T531 10000 50 1 000BA370 260 194 T532 10000 50 1 000BA478 276 195 T533 10000 100 1 000BA590 268 196 T534 10000 100 1 000BA6A0 268 197 T535 10000 100 1 000BA7B0 268 198 T536 10000 100 1 000BA8C0 268 199 T537 7000 100 1 000BA9D0 276 200 T538 10000 50 1 000BAAE8 260 201 T539 10000 50 1 000BABF0 276 202 T540 7000 50 1 000BAD08 164 203 T541 5500 50 1 000BADB0 260 204 T542 7000 50 1 000BAEB8 164 205 T543 5500 50 1 000BAF60 260 206 T544 6000 50 10 000BB068 180 207 T545 4500 50 10 000BB120 276 208 T546 700 50 10 000BB238 180 209 T547 700 50 10 000BB2F0 276 210 T550 8000 50 1 000BB408 180 211 T551 6000 50 1 000BB4C0 276 212 T552 8000 50 10 000BB5D8 180 213 T553 13000 50 10 000BB690 164 214 T560 4000 50 1 000BB738 180 215 T561 3300 50 11 000BB7F0 204 216 T600 1000 10 1 000BB8C0 124 217 T601 19000 100 1 000BB940 252 218 T610 3500 50 1 000BBA40 260 219 T611 3500 50 1 000BBB48 260 220 T620 2300 50 1 000BBC50 452 221 T621 500 50 1 000BBE18 452 222 T700 20000 40 1 000BBFE0 164 223 T701 22000 21 1 000BC088 204 224 T702 22000 21 1 000BC158 144 225 T703 20000 40 1 000BC1E8 172 226 T900 450000 1 1 000BC298 52 227 -T901 400000 2 1 000BC2D0 60 228 -T902 400000 3 1 000BC310 60 229 -T903 200000 4 1 000BC350 60 230 -T904 150000 5 1 000BC390 60 231 -T905 150000 6 1 000BC3D0 68 232 -T906 150000 7 1 000BC418 68 233 -T907 150000 8 1 000BC460 68 234 -T908 150000 9 1 000BC4A8 68 235 -T909 150000 10 1 000BC4F0 76 236 -T910 120000 12 1 000BC540 76 237 -T911 90000 18 1 000BC590 92 238 -T912 70000 25 1 000BC5F0 100 239 -T913 50000 36 1 000BC658 124 240 -T914 45000 50 1 000BC6D8 156 241 -T915 30000 72 1 000BC778 196 242 T920 300000 1 1 000BC840 64 243 -T921 250000 2 1 000BC880 64 244 -T922 200000 3 1 000BC8C0 72 245 -T923 100000 4 1 000BC908 72 246 -T924 100000 5 1 000BC950 80 247 -T925 80000 6 1 000BC9A0 80 248 -T926 70000 7 1 000BC9F0 88 249 -T927 70000 8 1 000BCA48 88 250 -T928 70000 9 1 000BCAA0 96 251 -T929 70000 10 1 000BCB00 96 252 -T930 50000 12 1 000BCB60 104 253 -T931 35000 18 1 000BCBC8 128 254 -T932 25000 25 1 000BCC48 160 255 -T933 20000 36 1 000BCCE8 200 256 -T952 250000 1 1 000BCDB0 60 257 -T953 170000 1 1 000BCDF0 60 258 -T954 140000 1 1 000BCE30 68 259 -T955 120000 1 1 000BCE78 68 260 -T956 105000 1 1 000BCEC0 68 261 -T957 90000 1 1 000BCF08 68 262 -T958 84000 1 1 000BCF50 76 263 -T959 75000 1 1 000BCFA0 76 264 -T960 70000 1 1 000BCFF0 76 265 -T961 65000 1 1 000BD040 84 266 -T962 60000 1 1 000BD098 92 267 -T963 55000 1 1 000BD0F8 92 268 -T964 50000 1 1 000BD158 92 269 -T965 50000 1 1 000BD1B8 100 270 -T966 45000 1 1 000BD220 100 271 -T967 45000 1 1 000BD288 100 272 -T968 40000 1 1 000BD2F0 108 273 -T969 40000 1 1 000BD360 108 274 -T970 40000 1 1 000BD3D0 108 275 -T971 35000 1 1 000BD440 116 276 -T972 35000 1 1 000BD4B8 116 277 -T973 35000 1 1 000BD530 124 278 -T974 30000 1 1 000BD5B0 124 279 -T975 30000 1 1 000BD630 124 280 -T976 30000 1 1 000BD6B0 124 281 -T977 30000 1 1 000BD730 132 282 -T978 30000 1 1 000BD7B8 132 283 -T979 25000 1 1 000BD840 132 284 -T980 25000 1 1 000BD8C8 140 285 -T981 25000 1 1 000BD958 140 286 -T982 25000 1 1 000BD9E8 140 287 -T983 25000 1 1 000BDA78 140 288 -T984 25000 1 1 000BDB08 148 289 -T985 25000 1 1 000BDBA0 148 290 -T986 20000 1 1 000BDC38 148 291 -T987 20000 1 1 000BDCD0 156 292 -T988 20000 1 1 000BDD70 156 293 -T989 20000 1 1 000BDE10 156 294 -T990 20000 1 1 000BDEB0 164 PERF002I run with GMUL= 1 PERF003I start with tests at D7CA286F F3CD8880 tag description : test(s) lr ig lt : inst(usec) T100 LR R,R : 0.004395 22000 100 1 : 0.001998 T101 LA R,n : 0.004716 17000 100 1 : 0.002774 T102 L R,m : 0.004571 13000 50 1 : 0.007033 T103 L R,m (unal) : 0.003961 12000 50 1 : 0.006602 T104 LH R,m : 0.003362 10000 50 1 : 0.006724 T105 LH R,m (unal3) : 0.003830 10000 50 1 : 0.007660 T106 LTR R,R : 0.004025 15000 100 1 : 0.002683 T107 LCR R,R : 0.003803 13000 100 1 : 0.002926 T108 LNR R,R : 0.003383 13000 100 1 : 0.002602 T109 LPR R,R : 0.003736 13000 100 1 : 0.002874 T110 ST R,m : 0.003549 13000 50 1 : 0.005461 T111 ST R,m (unal) : 0.003833 12000 50 1 : 0.006388 T112 STH R,m : 0.003799 10000 50 1 : 0.007599 T113 STH R,m (unal1) : 0.004284 10000 50 1 : 0.008568 T114 STH R,m (unal3) : 0.004267 10000 50 1 : 0.008534 T115 STC R,m : 0.004372 11000 50 1 : 0.007949 T116 STCM R,i,m (0010) : 0.004579 8000 50 1 : 0.011447 T117 STCM R,i,m (1100) : 0.004297 7000 50 1 : 0.012279 T118 STCM R,i,m (0111) : 0.003981 10000 50 1 : 0.007962 T120 STM 2,3,m (2r) : 0.003930 9000 50 1 : 0.008733 T121 STM 2,7,m (6r) : 0.003921 6500 50 1 : 0.012065 T122 STM 14,12,m (15r) : 0.004150 5000 50 1 : 0.016600 T123 LM 2,3,m (2r) : 0.004081 9000 50 1 : 0.009069 T124 LM 2,7,m (6r) : 0.003631 6000 50 1 : 0.012103 T125 LM 0,11,m (12r) : 0.004149 5000 50 2 : 0.016596 T150 MVC m,m (5c) : 0.003832 5000 50 1 : 0.015330 T151 MVC m,m (10c) : 0.004397 5000 50 1 : 0.017590 T152 MVC m,m (15c) : 0.004358 5000 50 1 : 0.017434 T153 MVC m,m (30c) : 0.004471 5000 50 1 : 0.017884 T154 MVC m,m (100c) : 0.004078 4000 50 1 : 0.020390 T155 MVC m,m (250c) : 0.004200 7500 20 1 : 0.028000 T156 MVC m,m (250c,over1) : 0.004407 700 20 1 : 0.314821 T157 MVC m,m (250c,over2) : 0.004198 7500 20 1 : 0.027990 T160 MVI m,i : 0.004042 6000 100 1 : 0.006737 T161 MVN m,m (10c) : 0.004685 5000 50 1 : 0.018742 T162 MVN m,m (30c) : 0.005691 7000 20 1 : 0.040654 T165 MVZ m,m (10c) : 0.004655 5000 50 1 : 0.018620 T166 MVZ m,m (30c) : 0.005778 7000 20 1 : 0.041271 T167 MVCIN m,m (10c) : 0.004524 3500 20 1 : 0.064629 T168 MVCIN m,m (30c) : 0.004351 1200 20 1 : 0.181312 T169 MVCIN m,m (100c) : 0.004148 350 20 1 : 0.592643 T170 4*Lx;MVCL (10b) : 0.004316 13000 10 1 : 0.033200 T171 4*Lx;MVCL (100b) : 0.004198 11000 10 1 : 0.038168 T172 4*Lx;MVCL (250b) : 0.004577 9000 10 1 : 0.050861 T173 4*Lx;MVCL (1kb) : 0.004501 4500 10 1 : 0.100022 T174 4*LR;MVCL (4kb) : 0.004228 1400 10 1 : 0.302036 T175 4*Lx;MVCL (100b,pad) : 0.004168 15000 10 1 : 0.027790 T176 4*Lx;MVCL (1kb,pad) : 0.003164 10000 10 1 : 0.031640 T177 4*Lx;MVCL (4kb,pad) : 0.002942 4500 10 1 : 0.065389 T178 4*LA;MVCL (1kb,over1) : 0.004316 21000 10 1 : 0.020552 T179 4*LA;MVCL (1kb,over2) : 0.004253 4000 10 1 : 0.106337 T190 IC R,m : 0.003927 6000 100 1 : 0.006545 T191 ICM R,i,m (0010) : 0.004893 3000 100 1 : 0.016310 T192 ICM R,i,m (1100) : 0.005121 3000 100 1 : 0.017070 T193 ICM R,i,m (0111) : 0.005074 4000 100 1 : 0.012686 T200 AR R,R : 0.003769 14000 100 1 : 0.002692 T201 A R,m : 0.003667 10000 50 1 : 0.007335 T202 AH R,m : 0.004369 10000 50 1 : 0.008738 T203 ALR R,R : 0.004116 17000 100 1 : 0.002421 T204 AL R,m : 0.003903 10000 50 1 : 0.007806 T205 SR R,R : 0.004320 14000 100 1 : 0.003086 T206 S R,m : 0.004163 10000 50 1 : 0.008326 T207 SH R,m : 0.004072 10000 50 1 : 0.008144 T208 SLR R,R : 0.004176 17000 100 1 : 0.002457 T209 SL R,m : 0.004601 10000 50 1 : 0.009202 T210 MR R,R : 0.003666 30000 30 4 : 0.004074 T211 M R,m : 0.003635 15000 30 4 : 0.008078 T212 MH R,m : 0.003372 15000 30 4 : 0.007494 T215 XR R,R; DR R,R : 0.004611 14000 20 3 : 0.016470 T216 XR R,R; D R,m : 0.004649 11000 20 3 : 0.021132 T220 SLA R,1 : 0.003777 24000 30 4 : 0.005246 T221 SLDA R,1 : 0.004756 12000 60 5 : 0.006606 T222 SRA R,1 : 0.003577 30000 30 4 : 0.003975 T223 SRDA R,1 : 0.003687 12000 60 5 : 0.005122 T224 SRA R,30 : 0.003604 30000 30 4 : 0.004005 T225 SRDA R,60 : 0.003708 12000 60 5 : 0.005151 T230 XR R,R : 0.003884 15000 100 1 : 0.002589 T231 X R,m : 0.003544 10000 50 1 : 0.007088 T232 XI m,i : 0.003574 10000 50 1 : 0.007149 T235 XC m,m (10c) : 0.004452 4500 50 1 : 0.019787 T236 XC m,m (100c) : 0.004632 2500 20 1 : 0.092650 T237 XC m,m (250c) : 0.003972 1000 20 1 : 0.198625 T238 NR R,R : 0.003356 13000 100 1 : 0.002582 T239 OR R,R : 0.003611 14000 100 1 : 0.002579 T240 SLL R,1 : 0.003843 35000 30 4 : 0.003660 T241 SLDL R,1 : 0.003636 13000 60 5 : 0.004662 T242 SRL R,1 : 0.004256 35000 30 4 : 0.004054 T243 SRDL R,1 : 0.003625 13000 60 5 : 0.004647 T244 SLL R,30 : 0.003884 35000 30 4 : 0.003700 T245 SLDL R,60 : 0.003901 14000 60 5 : 0.004645 T250 TM m,i : 0.003196 10000 50 1 : 0.006393 T252 TR m,m (10c) : 0.002845 3500 50 1 : 0.016257 T253 TR m,m (100c) : 0.002033 1600 20 1 : 0.063547 T254 TR m,m (250c) : 0.001840 700 20 1 : 0.131464 T255 TRT m,m (10c,zero) : 0.004545 1200 50 1 : 0.075758 T256 TRT m,m (100c,zero) : 0.004464 300 20 1 : 0.744083 T257 TRT m,m (250c,zero) : 0.004793 130 20 1 : 1.843654 T258 TRT m,m (250c,10b) : 0.004187 2500 20 1 : 0.083750 T259 TRT m,m (250c,100b) : 0.004526 300 20 1 : 0.754417 T260 CR R,R : 0.004193 17000 100 1 : 0.002467 T261 C R,m : 0.004635 11000 50 1 : 0.008427 T262 CH R,m : 0.004787 12000 50 1 : 0.007979 T263 CLR R,R : 0.004403 18000 100 1 : 0.002446 T264 CL R,m : 0.004427 12000 50 1 : 0.007378 T265 CLI m,i : 0.003488 10000 50 1 : 0.006976 T266 CLM R,i,m : 0.004249 8000 50 1 : 0.010622 T270 CLC m,m (10c,eq) : 0.005137 7000 20 1 : 0.036696 T271 CLC m,m (10c,ne) : 0.005024 8000 20 1 : 0.031403 T272 CLC m,m (30c,eq) : 0.004928 5000 20 1 : 0.049280 T273 CLC m,m (30c,ne) : 0.005088 8000 20 1 : 0.031800 T274 CLC m,m (100c,eq) : 0.005509 2900 20 1 : 0.094991 T275 CLC m,m (100c,ne) : 0.005094 8000 20 1 : 0.031841 T276 CLC m,m (250c,eq) : 0.005522 1500 20 1 : 0.184067 T277 CLC m,m (250c,ne) : 0.005043 8000 20 1 : 0.031522 T280 4*LR;CLCL (100b,10b) : 0.004533 4500 10 1 : 0.100744 T281 4*LR;CLCL (4kb,10b) : 0.004659 4500 10 1 : 0.103544 T282 4*LR;CLCL (4kb,100b) : 0.005057 600 10 1 : 0.842833 T283 4*LR;CLCL (4kb,250b) : 0.004527 220 10 1 : 2.057955 T290 LR;CS R,R,m (eq,eq) : 0.001796 6000 20 1 : 0.014967 T291 LR;CS R,R,m (eq,ne) : 0.001789 6000 20 1 : 0.014908 T292 LR;CS R,R,m (ne) : 0.000444 1400 20 1 : 0.015857 T295 LR;CDS R,R,m (eq,eq) : 0.001986 6000 20 1 : 0.016554 T296 LR;CDS R,R,m (eq,ne) : 0.001975 6000 20 1 : 0.016458 T297 LR;CDS R,R,m (ne) : 0.000529 1400 20 1 : 0.018893 T300 BCR 0,0 (noop) : 0.004980 20000 100 1 : 0.002490 T301 BNZ l (no br) : 0.004639 22000 100 1 : 0.002109 T302 BNZ l (do br) : 0.004755 12000 60 1 : 0.006604 T303 BNZ l (do br, far) : 0.004704 6000 60 1 : 0.013067 T304 BR R : 0.003631 70000 10 1 : 0.005187 T305 BR R (far) : 0.004714 45000 10 1 : 0.010476 T310 BCTR R,0 : 0.004051 15000 100 1 : 0.002701 T311 BCTR R,R : 0.004251 700000 1 0 : 0.006073 T312 BCT R,l : 0.004329 600000 1 0 : 0.007216 T315 BXLE R,R,l : 0.004632 6000 100 6 : 0.007720 T320 BALR R,R; BR R : 0.004726 8000 50 1 : 0.011816 T321 BALR R,R; BR R (far) : 0.003337 2500 50 1 : 0.026696 T322 BAL R,l; BR R : 0.004574 7000 50 1 : 0.013069 T323 BAL R,l; BR R (far) : 0.004806 3500 50 1 : 0.027463 T324 BASR R,R; BR R : 0.004631 8000 50 1 : 0.011577 T325 BAS R,l; BR R : 0.004593 7000 50 1 : 0.013124 T330 L;BALR;SAV(14,12);RET : 0.004150 4500 10 1 : 0.092233 T400 CVB R,m : 0.004714 2500 50 1 : 0.037712 T401 CVD R,m : 0.003414 2500 50 1 : 0.027312 T402 PACK m,m (5d) : 0.003843 6000 20 1 : 0.032025 T403 PACK m,m (15d) : 0.004035 2500 20 1 : 0.080700 T404 UNPK m,m (5d) : 0.005247 6000 20 1 : 0.043725 T405 UNPK m,m (15d) : 0.005367 2500 20 1 : 0.107340 T410 MVC;ED (10c) : 0.004585 3300 10 1 : 0.138955 T411 MVC;ED (30c) : 0.004711 1200 10 1 : 0.392583 T415 MVC;EDMK (10c) : 0.004783 3300 10 1 : 0.144939 T420 AP m,m (10d) : 0.005361 700 30 7 : 0.255310 T421 AP m,m (30d) : 0.004911 700 30 8 : 0.233857 T422 SP m,m (10d) : 0.005434 700 30 7 : 0.258762 T423 SP m,m (30d) : 0.005928 700 30 8 : 0.282286 T424 MP m,m (10d) : 0.004964 900 20 7 : 0.275806 T425 MP m,m (30d) : 0.004967 900 20 8 : 0.275972 T426 MVC;DP m,m (10d) : 0.004685 1000 10 1 : 0.468550 T427 MVC;DP m,m (30d) : 0.005107 500 10 1 : 1.021500 T430 CP m,m (10d) : 0.005300 1000 30 1 : 0.176683 T431 CP m,m (30d) : 0.005290 1000 30 1 : 0.176333 T440 ZAP m,m (10d,10d) : 0.005529 1600 30 1 : 0.115198 T441 ZAP m,m (30d,30d) : 0.005500 1600 30 1 : 0.114583 T442 ZAP m,m (10d,30d) : 0.005519 1600 30 1 : 0.114979 T443 ZAP m,m (30d,10d) : 0.005511 1600 30 1 : 0.114812 T445 SRP m,i,i (30d,<<) : 0.005874 1600 25 8 : 0.146862 T446 SRP m,i,i (30d,>>) : 0.005069 1000 25 8 : 0.202780 T450 MVO m,m (10d) : 0.004371 5000 20 1 : 0.043715 T451 MVO m,m (30d) : 0.004552 2000 20 1 : 0.113800 T500 LER R,R : 0.003837 10000 100 1 : 0.003837 T501 LE R,m : 0.003813 10000 50 1 : 0.007627 T502 LE R,m (unal) : 0.004156 10000 50 1 : 0.008313 T503 LTER R,R : 0.004320 10000 100 1 : 0.004320 T504 LCER R,R : 0.003832 10000 100 1 : 0.003832 T505 LNER R,R : 0.003760 10000 100 1 : 0.003760 T506 LPER R,R : 0.003543 9000 100 1 : 0.003937 T507 LRER R,R : 0.004221 8000 100 1 : 0.005277 T508 STE R,m : 0.003409 10000 50 1 : 0.006819 T509 STE R,m (unal) : 0.003637 10000 50 1 : 0.007274 T510 AER R,R : 0.004594 8000 50 1 : 0.011485 T511 AE R,m : 0.004759 6000 50 1 : 0.015865 T512 SER R,R : 0.004572 8000 50 1 : 0.011431 T513 SE R,m : 0.004728 6000 50 1 : 0.015762 T514 MER R,R : 0.004531 10000 50 9 : 0.009062 T515 ME R,m : 0.004404 6500 50 9 : 0.013551 T516 DER R,R : 0.005210 5000 50 9 : 0.020840 T517 DE R,m : 0.004497 4000 50 9 : 0.022487 T520 CER R,R : 0.004519 10000 50 1 : 0.009038 T521 CE R,m : 0.003974 6000 50 1 : 0.013247 T522 AUR R,R : 0.004088 10000 50 9 : 0.008177 T523 HER R,R : 0.004668 16000 50 9 : 0.005835 T530 LDR R,R : 0.003498 9000 100 1 : 0.003887 T531 LD R,m : 0.003784 10000 50 1 : 0.007568 T532 LD R,m (unal) : 0.003763 10000 50 1 : 0.007527 T533 LTDR R,R : 0.004240 10000 100 1 : 0.004240 T534 LCDR R,R : 0.004328 10000 100 1 : 0.004328 T535 LNDR R,R : 0.004220 10000 100 1 : 0.004220 T536 LPDR R,R : 0.005225 10000 100 1 : 0.005225 T537 LRDR R,R : 0.004138 7000 100 1 : 0.005911 T538 STD R,m : 0.004437 10000 50 1 : 0.008875 T539 STD R,m (unal) : 0.004201 10000 50 1 : 0.008402 T540 ADR R,R : 0.004310 7000 50 1 : 0.012314 T541 AD R,m : 0.004522 5500 50 1 : 0.016445 T542 SDR R,R : 0.004298 7000 50 1 : 0.012280 T543 SD R,m : 0.004598 5500 50 1 : 0.016722 T544 MDR R,R : 0.004452 6000 50 10 : 0.014840 T545 MD R,m : 0.005091 4500 50 10 : 0.022627 T546 DDR R,R : 0.005676 700 50 10 : 0.162171 T547 DD R,m : 0.005889 700 50 10 : 0.168271 T550 CDR R,R : 0.003888 8000 50 1 : 0.009721 T551 CD R,m : 0.004115 6000 50 1 : 0.013718 T552 AWR R,R : 0.004028 8000 50 10 : 0.010070 T553 HDR R,R : 0.004142 13000 50 10 : 0.006373 T560 AXR R,R : 0.003668 4000 50 1 : 0.018340 T561 MXR R,R : 0.004610 3300 50 11 : 0.027939 T600 STCK m : 0.000746 1000 10 1 : 0.074556 T601 SPM R : 0.004994 19000 100 1 : 0.002628 T610 EX R,i (with TM) : 0.003868 3500 50 1 : 0.022103 T611 EX R,i (with XI) : 0.004111 3500 50 1 : 0.023491 T620 MVI;TS m (zero) : 0.002088 2300 50 1 : 0.018157 T621 MVI;TS m (ones) : 0.000471 500 50 1 : 0.018860 T700 mix int RR basic : 0.002450 20000 40 1 : 0.003062 T701 mix int RX : 0.003983 22000 21 1 : 0.008622 T702 mix int RX (far) : 0.003980 22000 21 1 : 0.008616 T703 mix int RR noopt : 0.002257 20000 40 1 : 0.002822 T900 LR R,R (ig=1) : 0.003318 450000 1 1 : 0.007373 T920 L R,m (ig=1) : 0.002838 300000 1 1 : 0.009462 PERF004I done with tests at D7CA2870 DBA4C840 dt= 0.949620