tbw-I: redefine tb_pdp11core_stim -> tb_pdp11core_ubmap.dat ../../src/ieee/numeric_std-body.v93:1309:7:@0ms:(assertion warning): NUMERIC_STD."<=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1157:7:@0ms:(assertion warning): NUMERIC_STD."<": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1005:7:@0ms:(assertion warning): NUMERIC_STD.">": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1005:7:@0ms:(assertion warning): NUMERIC_STD.">": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1309:7:@0ms:(assertion warning): NUMERIC_STD."<=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1005:7:@0ms:(assertion warning): NUMERIC_STD.">": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1157:7:@0ms:(assertion warning): NUMERIC_STD."<": metavalue detected, returning FALSE ../../src/synopsys/std_logic_arith.vhdl:2081:12:@0ms:(assertion warning): CONV_INTEGER: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, and it has been converted to 0. ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 .reset C Test 1: Write/Read ubmap registers 5 wmem 0 177777 0 1 0 0 000000 000000 00 5 wmem 0 177777 0 1 0 0 000000 000000 00 5 wmem 0 000100 0 1 0 0 000000 000000 00 5 wmem 0 000001 0 1 0 0 000000 000000 00 5 wmem 0 000200 0 1 0 0 000000 000000 00 5 wmem 0 000002 0 1 0 0 000000 000000 00 5 wmem 0 000300 0 1 0 0 000000 000000 00 5 wmem 0 000003 0 1 0 0 000000 000000 00 5 wmem 0 000400 0 1 0 0 000000 000000 00 5 wmem 0 000004 0 1 0 0 000000 000000 00 5 wmem 0 000500 0 1 0 0 000000 000000 00 5 wmem 0 000005 0 1 0 0 000000 000000 00 5 wmem 0 000600 0 1 0 0 000000 000000 00 5 wmem 0 000006 0 1 0 0 000000 000000 00 5 wmem 0 000700 0 1 0 0 000000 000000 00 5 wmem 0 000007 0 1 0 0 000000 000000 00 5 wmem 0 001000 0 1 0 0 000000 000000 00 5 wmem 0 000010 0 1 0 0 000000 000000 00 5 wmem 0 001100 0 1 0 0 000000 000000 00 5 wmem 0 000011 0 1 0 0 000000 000000 00 5 wmem 0 001200 0 1 0 0 000000 000000 00 5 wmem 0 000012 0 1 0 0 000000 000000 00 5 wmem 0 001300 0 1 0 0 000000 000000 00 5 wmem 0 000013 0 1 0 0 000000 000000 00 5 wmem 0 001400 0 1 0 0 000000 000000 00 5 wmem 0 000014 0 1 0 0 000000 000000 00 5 wmem 0 001500 0 1 0 0 000000 000000 00 5 wmem 0 000015 0 1 0 0 000000 000000 00 5 wmem 0 001600 0 1 0 0 000000 000000 00 5 wmem 0 000016 0 1 0 0 000000 000000 00 5 wmem 0 001700 0 1 0 0 000000 000000 00 5 wmem 0 000017 0 1 0 0 000000 000000 00 5 wmem 0 002000 0 1 0 0 000000 000000 00 5 wmem 0 000020 0 1 0 0 000000 000000 00 5 wmem 0 002100 0 1 0 0 000000 000000 00 5 wmem 0 000021 0 1 0 0 000000 000000 00 5 wmem 0 002200 0 1 0 0 000000 000000 00 5 wmem 0 000022 0 1 0 0 000000 000000 00 5 wmem 0 002300 0 1 0 0 000000 000000 00 5 wmem 0 000023 0 1 0 0 000000 000000 00 5 wmem 0 002400 0 1 0 0 000000 000000 00 5 wmem 0 000024 0 1 0 0 000000 000000 00 5 wmem 0 002500 0 1 0 0 000000 000000 00 5 wmem 0 000025 0 1 0 0 000000 000000 00 5 wmem 0 002600 0 1 0 0 000000 000000 00 5 wmem 0 000026 0 1 0 0 000000 000000 00 5 wmem 0 002700 0 1 0 0 000000 000000 00 5 wmem 0 000027 0 1 0 0 000000 000000 00 5 wmem 0 003000 0 1 0 0 000000 000000 00 5 wmem 0 000030 0 1 0 0 000000 000000 00 5 wmem 0 003100 0 1 0 0 000000 000000 00 5 wmem 0 000031 0 1 0 0 000000 000000 00 5 wmem 0 003200 0 1 0 0 000000 000000 00 5 wmem 0 000032 0 1 0 0 000000 000000 00 5 wmem 0 003300 0 1 0 0 000000 000000 00 5 wmem 0 000033 0 1 0 0 000000 000000 00 5 wmem 0 003400 0 1 0 0 000000 000000 00 5 wmem 0 000034 0 1 0 0 000000 000000 00 5 wmem 0 003500 0 1 0 0 000000 000000 00 5 wmem 0 000035 0 1 0 0 000000 000000 00 5 wmem 0 003600 0 1 0 0 000000 000000 00 5 wmem 0 000036 0 1 0 0 000000 000000 00 5 wmem 0 003700 0 1 0 0 000000 000000 00 5 wmem 0 000037 0 1 0 0 000000 000000 00 5 rmem 0 177776 0 1 0 0 177776 000000 00 CHECK OK 5 rmem 0 000077 0 1 0 0 000077 000000 00 CHECK OK 5 rmem 0 000100 0 1 0 0 000100 000000 00 CHECK OK 5 rmem 0 000001 0 1 0 0 000001 000000 00 CHECK OK 5 rmem 0 000200 0 1 0 0 000200 000000 00 CHECK OK 5 rmem 0 000002 0 1 0 0 000002 000000 00 CHECK OK 5 rmem 0 000300 0 1 0 0 000300 000000 00 CHECK OK 5 rmem 0 000003 0 1 0 0 000003 000000 00 CHECK OK 5 rmem 0 000400 0 1 0 0 000400 000000 00 CHECK OK 5 rmem 0 000004 0 1 0 0 000004 000000 00 CHECK OK 5 rmem 0 000500 0 1 0 0 000500 000000 00 CHECK OK 5 rmem 0 000005 0 1 0 0 000005 000000 00 CHECK OK 5 rmem 0 000600 0 1 0 0 000600 000000 00 CHECK OK 5 rmem 0 000006 0 1 0 0 000006 000000 00 CHECK OK 5 rmem 0 000700 0 1 0 0 000700 000000 00 CHECK OK 5 rmem 0 000007 0 1 0 0 000007 000000 00 CHECK OK 5 rmem 0 001000 0 1 0 0 001000 000000 00 CHECK OK 5 rmem 0 000010 0 1 0 0 000010 000000 00 CHECK OK 5 rmem 0 001100 0 1 0 0 001100 000000 00 CHECK OK 5 rmem 0 000011 0 1 0 0 000011 000000 00 CHECK OK 5 rmem 0 001200 0 1 0 0 001200 000000 00 CHECK OK 5 rmem 0 000012 0 1 0 0 000012 000000 00 CHECK OK 5 rmem 0 001300 0 1 0 0 001300 000000 00 CHECK OK 5 rmem 0 000013 0 1 0 0 000013 000000 00 CHECK OK 5 rmem 0 001400 0 1 0 0 001400 000000 00 CHECK OK 5 rmem 0 000014 0 1 0 0 000014 000000 00 CHECK OK 5 rmem 0 001500 0 1 0 0 001500 000000 00 CHECK OK 5 rmem 0 000015 0 1 0 0 000015 000000 00 CHECK OK 5 rmem 0 001600 0 1 0 0 001600 000000 00 CHECK OK 5 rmem 0 000016 0 1 0 0 000016 000000 00 CHECK OK 5 rmem 0 001700 0 1 0 0 001700 000000 00 CHECK OK 5 rmem 0 000017 0 1 0 0 000017 000000 00 CHECK OK 5 rmem 0 002000 0 1 0 0 002000 000000 00 CHECK OK 5 rmem 0 000020 0 1 0 0 000020 000000 00 CHECK OK 5 rmem 0 002100 0 1 0 0 002100 000000 00 CHECK OK 5 rmem 0 000021 0 1 0 0 000021 000000 00 CHECK OK 5 rmem 0 002200 0 1 0 0 002200 000000 00 CHECK OK 5 rmem 0 000022 0 1 0 0 000022 000000 00 CHECK OK 5 rmem 0 002300 0 1 0 0 002300 000000 00 CHECK OK 5 rmem 0 000023 0 1 0 0 000023 000000 00 CHECK OK 5 rmem 0 002400 0 1 0 0 002400 000000 00 CHECK OK 5 rmem 0 000024 0 1 0 0 000024 000000 00 CHECK OK 5 rmem 0 002500 0 1 0 0 002500 000000 00 CHECK OK 5 rmem 0 000025 0 1 0 0 000025 000000 00 CHECK OK 5 rmem 0 002600 0 1 0 0 002600 000000 00 CHECK OK 5 rmem 0 000026 0 1 0 0 000026 000000 00 CHECK OK 5 rmem 0 002700 0 1 0 0 002700 000000 00 CHECK OK 5 rmem 0 000027 0 1 0 0 000027 000000 00 CHECK OK 5 rmem 0 003000 0 1 0 0 003000 000000 00 CHECK OK 5 rmem 0 000030 0 1 0 0 000030 000000 00 CHECK OK 5 rmem 0 003100 0 1 0 0 003100 000000 00 CHECK OK 5 rmem 0 000031 0 1 0 0 000031 000000 00 CHECK OK 5 rmem 0 003200 0 1 0 0 003200 000000 00 CHECK OK 5 rmem 0 000032 0 1 0 0 000032 000000 00 CHECK OK 5 rmem 0 003300 0 1 0 0 003300 000000 00 CHECK OK 5 rmem 0 000033 0 1 0 0 000033 000000 00 CHECK OK 5 rmem 0 003400 0 1 0 0 003400 000000 00 CHECK OK 5 rmem 0 000034 0 1 0 0 000034 000000 00 CHECK OK 5 rmem 0 003500 0 1 0 0 003500 000000 00 CHECK OK 5 rmem 0 000035 0 1 0 0 000035 000000 00 CHECK OK 5 rmem 0 003600 0 1 0 0 003600 000000 00 CHECK OK 5 rmem 0 000036 0 1 0 0 000036 000000 00 CHECK OK 5 rmem 0 003700 0 1 0 0 003700 000000 00 CHECK OK 5 rmem 0 000037 0 1 0 0 000037 000000 00 CHECK OK C Test 2: Write/Read memory via bwm/brm and Unibus map 5 wmem 0 000000 0 1 0 0 000000 000000 00 5 wmem 0 000000 0 1 0 0 000000 000000 00 5 wmem 0 004000 0 1 0 0 000000 000000 00 5 wmem 0 000000 0 1 0 0 000000 000000 00 5 rmem 0 000000 0 1 0 0 000000 000000 00 CHECK OK 5 rmem 0 000000 0 1 0 0 000000 000000 00 CHECK OK 5 rmem 0 004000 0 1 0 0 004000 000000 00 CHECK OK 5 rmem 0 000000 0 1 0 0 000000 000000 00 CHECK OK C Test 2.1 write/read with ubmap off in MMU 3 wmem 0 000100 0 1 0 0 000000 000000 00 3 wmem 0 000101 0 1 0 0 000000 000000 00 3 wmem 0 000102 0 1 0 0 000000 000000 00 3 wmem 0 000103 0 1 0 0 000000 000000 00 3 rmem 0 000100 0 1 0 0 000100 000000 00 CHECK OK 3 rmem 0 000101 0 1 0 0 000101 000000 00 CHECK OK 3 rmem 0 000102 0 1 0 0 000102 000000 00 CHECK OK 3 rmem 0 000103 0 1 0 0 000103 000000 00 CHECK OK C Test 2.2 write/read with ubmap on in MMU 5 wmem 0 000040 0 1 0 0 000000 000000 00 3 wmem 0 000200 0 1 0 0 000000 000000 00 3 wmem 0 000201 0 1 0 0 000000 000000 00 3 wmem 0 000202 0 1 0 0 000000 000000 00 3 wmem 0 000203 0 1 0 0 000000 000000 00 3 rmem 0 000100 0 1 0 0 000100 000000 00 CHECK OK 3 rmem 0 000101 0 1 0 0 000101 000000 00 CHECK OK 3 rmem 0 000102 0 1 0 0 000102 000000 00 CHECK OK 3 rmem 0 000103 0 1 0 0 000103 000000 00 CHECK OK 3 rmem 0 000200 0 1 0 0 000200 000000 00 CHECK OK 3 rmem 0 000201 0 1 0 0 000201 000000 00 CHECK OK 3 rmem 0 000202 0 1 0 0 000202 000000 00 CHECK OK 3 rmem 0 000203 0 1 0 0 000203 000000 00 CHECK OK C Test 3: Write/Read memory via bwm/brm and Unibus map while CPU running C Setup trap catchers 3 wmem 0 000006 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 3 wmem 0 000012 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 3 wmem 0 000016 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 3 wmem 0 000022 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 3 wmem 0 000026 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 3 wmem 0 000032 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 3 wmem 0 000036 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 3 wmem 0 000242 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 3 wmem 0 000246 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 3 wmem 0 000252 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 C Setup Code 3 wmem 0 005211 0 1 0 0 000000 000000 00 3 wmem 0 005312 0 1 0 0 000000 000000 00 3 wmem 0 005700 0 1 0 0 000000 000000 00 3 wmem 0 001774 0 1 0 0 000000 000000 00 3 wmem 0 011103 0 1 0 0 000000 000000 00 3 wmem 0 061203 0 1 0 0 000000 000000 00 3 wmem 0 000000 0 1 0 0 000000 000000 00 C Start Code 2 wreg 0 000000 0 1 0 0 000000 000000 00 2 wreg 1 002100 0 1 0 0 002100 000000 00 2 wreg 2 172256 0 1 0 0 172256 000000 00 2 wreg 7 002000 0 1 0 0 002000 000000 00 2 sta 0 000000 0 1 0 0 000000 100000 07 10 wmem 0 000300 0 1 0 0 000000 100000 07 13 wmem 0 000301 0 1 0 0 000000 100000 07 7 wmem 0 000302 0 1 0 0 000000 100000 07 7 wmem 0 000303 0 1 0 0 000000 100000 07 10 wmem 0 000304 0 1 0 0 000001 100000 07 13 wmem 0 000305 0 1 0 0 177777 100000 07 7 wmem 0 000306 0 1 0 0 000000 100000 07 7 wmem 0 000307 0 1 0 0 000000 100000 07 10 wmem 0 000310 0 1 0 0 000002 100000 07 13 wmem 0 000311 0 1 0 0 177776 100000 07 7 wmem 0 000312 0 1 0 0 000000 100000 07 7 wmem 0 000313 0 1 0 0 000000 100000 07 10 wmem 0 000314 0 1 0 0 000003 100000 07 13 wmem 0 000315 0 1 0 0 177775 100000 07 7 wmem 0 000316 0 1 0 0 000000 100000 07 7 wmem 0 000317 0 1 0 0 000000 100000 07 9 wreg 0 000001 0 1 0 0 000001 100000 07 32 ---- - ------ 0 0 0 0 000001 000000 01 WAIT GO OK 3 rreg 7 002016 0 1 0 0 002016 000000 01 CHECK OK 3 rmem 0 000000 0 1 0 0 000005 000000 01 CHECK OK 5 rmem 0 000000 0 1 0 0 177773 000000 01 CHECK OK 3 rreg 3 000000 0 1 0 0 000000 000000 01 CHECK OK 3 rmem 0 000300 0 1 0 0 000300 000000 01 CHECK OK 3 rmem 0 000301 0 1 0 0 000301 000000 01 CHECK OK 3 rmem 0 000302 0 1 0 0 000302 000000 01 CHECK OK 3 rmem 0 000303 0 1 0 0 000303 000000 01 CHECK OK 3 rmem 0 000304 0 1 0 0 000304 000000 01 CHECK OK 3 rmem 0 000305 0 1 0 0 000305 000000 01 CHECK OK 3 rmem 0 000306 0 1 0 0 000306 000000 01 CHECK OK 3 rmem 0 000307 0 1 0 0 000307 000000 01 CHECK OK 3 rmem 0 000310 0 1 0 0 000310 000000 01 CHECK OK 3 rmem 0 000311 0 1 0 0 000311 000000 01 CHECK OK 3 rmem 0 000312 0 1 0 0 000312 000000 01 CHECK OK 3 rmem 0 000313 0 1 0 0 000313 000000 01 CHECK OK 3 rmem 0 000314 0 1 0 0 000314 000000 01 CHECK OK 3 rmem 0 000315 0 1 0 0 000315 000000 01 CHECK OK 3 rmem 0 000316 0 1 0 0 000316 000000 01 CHECK OK 3 rmem 0 000317 0 1 0 0 000317 000000 01 CHECK OK 22615.0 ns 1121: DONE real 0m0.133s user 0m0.116s sys 0m0.008s