../../src/ieee/numeric_std-body.v93:1558:7:@0ms:(assertion warning): NUMERIC_STD.">=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1406:7:@0ms:(assertion warning): NUMERIC_STD."<=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1005:7:@0ms:(assertion warning): NUMERIC_STD.">": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:1309:7:@0ms:(assertion warning): NUMERIC_STD."<=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1157:7:@0ms:(assertion warning): NUMERIC_STD."<": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1005:7:@0ms:(assertion warning): NUMERIC_STD.">": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1005:7:@0ms:(assertion warning): NUMERIC_STD.">": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1005:7:@0ms:(assertion warning): NUMERIC_STD.">": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1309:7:@0ms:(assertion warning): NUMERIC_STD."<=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1157:7:@0ms:(assertion warning): NUMERIC_STD."<": metavalue detected, returning FALSE ../../src/synopsys/std_logic_arith.vhdl:2081:12:@0ms:(assertion warning): CONV_INTEGER: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, and it has been converted to 0. ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1710:7:@0ms:(assertion warning): NUMERIC_STD."=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1558:7:@0ms:(assertion warning): NUMERIC_STD.">=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:1406:7:@0ms:(assertion warning): NUMERIC_STD."<=": metavalue detected, returning FALSE ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/synopsys/std_logic_arith.vhdl:315:20:@0ms:(assertion warning): There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). ../../src/synopsys/std_logic_arith.vhdl:315:20:@0ms:(assertion warning): There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). ../../src/synopsys/std_logic_arith.vhdl:315:20:@0ms:(assertion warning): There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). ../../src/synopsys/std_logic_arith.vhdl:315:20:@0ms:(assertion warning): There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 ../../src/ieee/numeric_std-body.v93:2098:7:@0ms:(assertion warning): NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 rlink_cext-I: connected to rlink_cext_fifo_rx rlink_cext-I: connected to rlink_cext_fifo_tx ++ rreg (000,00017) a=fffe() d=ff02 s=00! OK -- rreg (010,00007) a=fffd() d=0201 s=00! OK -- rreg (020,00007) a=fffc() d=0700 s=00! OK -- rreg (030,00007) a=fffb() d=0000 s=00 OK -- rreg (040,00007) a=fffa() d=0000 s=00 OK -- rreg (050,00027) a=ffe8() d=0000 s=00 OK ++ rreg (060,00017) a=4ff8(i0.losize ) d=167777 s=00000000! OK -- rreg (070,00007) a=0040( ) d=000000 s=00000010 OK -- rreg (100,00007) a=0048( ) d=000020 s=00000000 OK -- rreg (110,00007) a=0050( ) d=000000 s=00000000 OK -- rreg (120,00007) a=0054( ) d=000000 s=00000000 OK -- rreg (130,00007) a=0058( ) d=000000 s=00000010 OK -- rreg (140,00007) a=005c( ) d=000000 s=00000010 OK -- rreg (150,00007) a=4000( ) d=000070 s=00000000 OK -- rreg (160,00007) a=4800( ) d=000014 s=00000000 OK -- rreg (170,00007) a=0060( ) d=000001 s=00000000 OK -- rreg (200,00007) a=4500( ) d=000000 s=00000000 OK -- rreg (210,00007) a=4fb3( ) d=000200 s=00000000 OK -- rreg (220,00007) a=4ab0( ) d=000000 s=00000000 OK -- rreg (230,00027) a=4fa0( ) d=000000 s=00000000 OK ++ wreg (002,00017) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (012,00027) a=0001(c0.cntl ) d=000004 s=00000000! OK ++ wreg (022,00037) a=ffff(rl.cntl ) d=100000 s=00000000! OK ## steering file for all devices tests ## steering file for all w11a_kw11p tests # test_kw11p_regs: test register response ----------------------------- # A basic register access tests ----------------------------- # A1: write/read csr --------------------------------- ++ wreg (032,00017) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (042,00007) a=0007(c0.memi ) d=000100 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000100! s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=000020 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000020! s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (122,00007) a=0007(c0.memi ) d=000010 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000010! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000006 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000006! s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=100210 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (300,00027) a=0007(c0.memi ) d=000010! s=00000000! OK # A2: read/write erate ------------------------------- ++ wreg (222,00017) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000110 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000110! s=00000000! OK -- wreg (252,00007) a=4ab0(i0.kwp.csr ) d=000400 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000110! s=00000000! OK -- rreg (330,00027) a=4ab0(i0.kwp.csr ) d=000510! s=00000000! OK # A3: write csb, read ctr ---------------------------- ++ wreg (272,00017) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=172542 s=00000000! OK -- wreg (322,00007) a=0007(c0.memi ) d=137257 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=172542 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=137257! s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=157255 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (360,00027) a=0007(c0.memi ) d=137257! s=00000000! OK # A4: test breset ------------------------------------ ++ wreg (002,00017) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000132 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000132! s=00000000! OK -- wreg (032,00007) a=4ab0(i0.kwp.csr ) d=001000 s=00000000! OK -- rreg (000,00007) a=4ab0(i0.kwp.csr ) d=001132! s=00000000! OK -- wreg (042,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (020,00027) a=4ab0(i0.kwp.csr ) d=001000! s=00000000! OK ++ attn (005,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK ++ wreg (062,00017) a=4ab0(i0.kwp.csr ) d=000000 s=00000000! OK -- rreg (030,00027) a=4ab0(i0.kwp.csr ) d=000000! s=00000000! OK test_kw11p_regs.tcl: PASS # test_kw11p_regs: test ctr response with CSR(fix) -------------------- # A test basic counting ------------------------------------- # A1: count down ------------------------------------- ++ wreg (072,00017) a=0004(c0.al ) d=172542 s=00000000! OK -- wreg (102,00007) a=0007(c0.memi ) d=000103 s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000103! s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000040 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=000102! s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (162,00007) a=0007(c0.memi ) d=000040 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000101! s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=000040 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (070,00027) a=0007(c0.memi ) d=000100! s=00000000! OK # A1: count up --------------------------------------- ++ wreg (232,00017) a=0004(c0.al ) d=172542 s=00000000! OK -- wreg (242,00007) a=0007(c0.memi ) d=000100 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000100! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=000060 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000101! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (322,00007) a=0007(c0.memi ) d=000060 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000102! s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000060 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (130,00027) a=0007(c0.memi ) d=000103! s=00000000! OK # B done response ------------------------------------------- # B1: single count down to zero ---------------------- ++ wreg (372,00017) a=0004(c0.al ) d=172542 s=00000000! OK -- wreg (002,00007) a=0007(c0.memi ) d=000003 s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=000003! s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=000040 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=000002! s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=000040 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000040 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (230,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # B2: single count up to zero ------------------------ ++ wreg (172,00017) a=0004(c0.al ) d=172542 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=177775 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=177775! s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000060 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=177776! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000020! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=000060 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=177777! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000020! s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=000060 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000220! s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (330,00027) a=0007(c0.memi ) d=000020! s=00000000! OK # B3: repeat count down to zero ---------------------- ++ wreg (372,00017) a=0004(c0.al ) d=172542 s=00000000! OK -- wreg (002,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000002! s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=000050 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000010! s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=000050 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000002! s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000210! s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000010! s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (142,00007) a=0007(c0.memi ) d=000050 s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000010! s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=000050 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000002! s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=000210! s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (060,00027) a=0007(c0.memi ) d=000010! s=00000000! OK # B4: repeat count up to zero ------------------------ ++ wreg (242,00017) a=0004(c0.al ) d=172542 s=00000000! OK -- wreg (252,00007) a=0007(c0.memi ) d=177776 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=177776! s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=000070 s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=177777! s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000030! s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (342,00007) a=0007(c0.memi ) d=000070 s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=177776! s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000230! s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=000030! s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000070 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=177777! s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000030! s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000070 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=177776! s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=000230! s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (210,00027) a=0007(c0.memi ) d=000030! s=00000000! OK # C err response -------------------------------------------- # C1: repeat count down to zero ---------------- ++ wreg (112,00017) a=0004(c0.al ) d=172542 s=00000000! OK -- wreg (122,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000002! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000050 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=000050 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000002! s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000050 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- wreg (262,00007) a=0007(c0.memi ) d=000050 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=172544 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000002! s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=100210! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=172540 s=00000000! OK -- rreg (300,00027) a=0007(c0.memi ) d=000010! s=00000000! OK test_kw11p_ctr.tcl: PASS # test_kw11p_regs: test ctr response with CSR(fix) -------------------- # A test interrupts via 100 Khz clock ----------------------- # A1: single interrupt (mode=0) ---------------------- ++ wreg (322,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (003,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (332,00017) a=0004(c0.al ) d=000104 s=00000000! OK -- wblk (013,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 002030 000340 ++ wreg (342,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (023,00027) a=0007(c0.memi ) n= 6= 6 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 ++ wreg (352,00017) a=0004(c0.al ) d=002000 s=00000000! OK -- wblk (033,00027) a=0007(c0.memi ) n= 13= 13 s=00000000! OK 0: 000237 012737 000002 172542 012737 000101 172540 000230 8: 012700 001750 077001 000000 000000 ++ wreg (362,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (372,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (002,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (012,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (022,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (032,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (042,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (052,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (062,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (072,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (102,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -+- 2020-03-29 -+- -I- 11:59:04.138977 : ATTN notify apat = 0001 lams = 0 ++ attn (015,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.574 OK ++ rreg (310,00037) a=000f(c0.pc ) d=002032! s=00000000! OK ++ rreg (320,00037) a=000e(c0.sp ) d=000774! s=00000000! OK ++ rreg (330,00037) a=0008(c0.r0 ) d=001414 s=00000000! OK # 2 x 100 kHz ticks took 220 sob # A2: repeat interrupt (mode=1) ---------------------- ++ wreg (112,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (043,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (122,00017) a=0004(c0.al ) d=000104 s=00000000! OK -- wblk (053,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 002034 000340 ++ wreg (132,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (063,00027) a=0007(c0.memi ) n= 6= 6 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 ++ wreg (142,00017) a=0004(c0.al ) d=002000 s=00000000! OK -- wblk (073,00027) a=0007(c0.memi ) n= 18= 18 s=00000000! OK 0: 000237 012701 000003 012737 000001 172542 012737 000111 8: 172540 000230 012700 002734 077001 000000 005301 001401 16: 000002 000000 ++ wreg (152,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (162,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (172,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (202,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (212,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (222,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (232,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (242,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (252,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (262,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (272,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:05.965442 : ATTN notify apat = 0001 lams = 0 dt=1.826457 ++ attn (025,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.886 OK ++ rreg (340,00037) a=000f(c0.pc ) d=002044! s=00000000! OK ++ rreg (350,00017) a=0009(c0.r1 ) d=000000! s=00000000! OK -- rreg (360,00027) a=000e(c0.sp ) d=000774! s=00000000! OK ++ rreg (370,00037) a=0008(c0.r0 ) d=002237 s=00000000! OK # 3 x 100 kHz ticks took 317 sob # B test interrupts via extevt=idec ------------------------- # B1: repeat interrupt (mode=1) ---------------------- ++ wreg (302,00037) a=4ab0(i0.kwp.csr ) d=001000 s=00000000! OK ++ wreg (312,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (103,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (322,00017) a=0004(c0.al ) d=000104 s=00000000! OK -- wblk (113,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 002034 000340 ++ wreg (332,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (123,00027) a=0007(c0.memi ) n= 6= 6 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 ++ wreg (342,00017) a=0004(c0.al ) d=002000 s=00000000! OK -- wblk (133,00027) a=0007(c0.memi ) n= 18= 18 s=00000000! OK 0: 000237 012701 000003 012737 000024 172542 012737 000117 8: 172540 000230 012700 000106 077001 000000 005301 001401 16: 000002 000000 ++ wreg (352,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (362,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (372,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (002,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (012,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (022,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (032,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (042,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (052,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (062,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (072,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:07.162161 : ATTN notify apat = 0001 lams = 0 dt=1.196719 ++ attn (035,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.181 OK ++ rreg (000,00037) a=000f(c0.pc ) d=002044! s=00000000! OK ++ rreg (010,00017) a=0008(c0.r0 ) d=000022! s=00000000! OK -- rreg (020,00007) a=0009(c0.r1 ) d=000000! s=00000000! OK -- rreg (030,00027) a=000e(c0.sp ) d=000774! s=00000000! OK test_kw11p_int.tcl: PASS @kw11p/kw11p_all.dat: PASS ## steering file for all m9312 tests # test_m9312_all: test m9312 response --------------------------------- # A1: test csr response (rem) ------------------------------- ++ wreg (102,00017) a=4500(i0.m9.csr ) d=000200 s=00000000! OK -- rreg (040,00007) a=4500(i0.m9.csr ) d=000200! s=00000000! OK -- wreg (112,00007) a=4500(i0.m9.csr ) d=000002 s=00000000! OK -- rreg (050,00007) a=4500(i0.m9.csr ) d=000002! s=00000000! OK -- wreg (122,00007) a=4500(i0.m9.csr ) d=000001 s=00000000! OK -- rreg (060,00027) a=4500(i0.m9.csr ) d=000001! s=00000000! OK ++ rreg (070,00017) a=4501( ) d=000000 s=01000001| OK -- rreg (100,00007) a=45ff( ) d=000000 s=01000001| OK -- rreg (110,00007) a=4b00( ) d=000000 s=01000001| OK -- rreg (120,00027) a=4bff( ) d=000000 s=01000001| OK # A2: csr.locwe=1: loc write ROM ---------------------------- ++ wreg (132,00017) a=4500(i0.m9.csr ) d=000200 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=165000 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=100000 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=165200 s=00000000! OK -- wreg (172,00007) a=0007(c0.memi ) d=100222 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=165400 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=100444 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=165600 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=100666 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=165776 s=00000000! OK -- wreg (252,00007) a=0007(c0.memi ) d=100777 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=173000 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=101000 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=173200 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=101222 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=173400 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=101444 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=173600 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=101666 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=173776 s=00000000! OK -- wreg (372,00027) a=0007(c0.memi ) d=101777 s=00000000! OK # A3: csr.locwe=0: loc write ROM fails ---------------------- ++ wreg (002,00017) a=4500(i0.m9.csr ) d=000003 s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=165000 s=00000000! OK -- wreg (022,00007) a=0007(c0.memi ) d=157255 s=01000001| OK -- wreg (032,00007) a=0004(c0.al ) d=165776 s=00000000! OK -- wreg (042,00007) a=0007(c0.memi ) d=137257 s=01000001| OK -- wreg (052,00007) a=0004(c0.al ) d=173000 s=00000000! OK -- wreg (062,00007) a=0007(c0.memi ) d=157255 s=01000001| OK -- wreg (072,00007) a=0004(c0.al ) d=173776 s=00000000! OK -- wreg (102,00027) a=0007(c0.memi ) d=137257 s=01000001| OK # A4: csr.enalo=1,enahi=1: all ROM readable ----------------- ++ wreg (112,00017) a=4500(i0.m9.csr ) d=000003 s=00000000! OK -- rreg (130,00007) a=4500(i0.m9.csr ) d=000003! s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=165000 s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=100000! s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=165200 s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=100222! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=165400 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=100444! s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=165600 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=100666! s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=165776 s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=100777! s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=173000 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=101000! s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=173200 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=101222! s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=173400 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=101444! s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=173600 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=101666! s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=173776 s=00000000! OK -- rreg (250,00027) a=0007(c0.memi ) d=101777! s=00000000! OK # A4: csr.enalo=1,enahi=0: only LO-ROM visible -------------- ++ wreg (242,00017) a=4500(i0.m9.csr ) d=000001 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=165000 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=100000! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=165776 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=100777! s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=173000 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000000 s=01000001| OK -- wreg (302,00007) a=0004(c0.al ) d=173776 s=00000000! OK -- rreg (310,00027) a=0007(c0.memi ) d=000000 s=01000001| OK # A4: csr.enalo=0,enahi=1: only HI-ROM visible -------------- ++ wreg (312,00017) a=4500(i0.m9.csr ) d=000002 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=165000 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000000 s=01000001| OK -- wreg (332,00007) a=0004(c0.al ) d=165776 s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000000 s=01000001| OK -- wreg (342,00007) a=0004(c0.al ) d=173000 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=101000! s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=173776 s=00000000! OK -- rreg (350,00027) a=0007(c0.memi ) d=101777! s=00000000! OK # A4: csr.enalo=0,enahi=0: no ROM visible ------------------- ++ wreg (362,00017) a=4500(i0.m9.csr ) d=000000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=165000 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000000 s=01000001| OK -- wreg (002,00007) a=0004(c0.al ) d=165776 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000000 s=01000001| OK -- wreg (012,00007) a=0004(c0.al ) d=173000 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000000 s=01000001| OK -- wreg (022,00007) a=0004(c0.al ) d=173776 s=00000000! OK -- rreg (010,00027) a=0007(c0.memi ) d=000000 s=01000001| OK test_m9312_all.tcl: PASS @m9312/m9312_all.dat: PASS ## steering file for all dl11 tests # test_dl11_tx: test dl11 paper puncher resonse ----------------------- ++ attn (045,00017) d=000000 s=00000000! OK -- wreg (032,00027) a=ffff(rl.cntl ) d=100000 s=00000000! OK ++ wreg (042,00017) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (020,00007) a=0006(c0.mem ) d=000000 s=00000000 OK -- rreg (030,00027) a=4fb8( ) d=003000 s=00000000 OK ++ wreg (052,00017) a=4fb8(i0.tta.rcsr ) d=000002 s=00000000! OK -- wreg (062,00027) a=4fba(i0.tta.xcsr ) d=000002 s=00000000! OK ++ wreg (072,00017) a=4fb8(i0.tta.rcsr ) d=000000 s=00000000! OK -- wreg (102,00027) a=4fba(i0.tta.xcsr ) d=000000 s=00000000! OK ++ rreg (040,00037) a=4fb8(i0.tta.rcsr ) d=003000 s=00000000! OK # A1: test csr response ------------------------------------- # A1.1: csr rdy, ie, ir ------------------------------ ++ wreg (112,00017) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (122,00007) a=4fba(i0.tta.xcsr ) d=000000 s=00000000! OK -- rreg (050,00007) a=4fba(i0.tta.xcsr ) d=000200! s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000100 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (100,00007) a=4fba(i0.tta.xcsr ) d=000340! s=00000000! OK -- wreg (172,00007) a=4fba(i0.tta.xcsr ) d=000000 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (120,00007) a=4fba(i0.tta.xcsr ) d=000340! s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (140,00027) a=4fba(i0.tta.xcsr ) d=000200! s=00000000! OK # A1.2: csr rlim ----------------------------------- ++ wreg (242,00017) a=4fba(i0.tta.xcsr ) d=010000 s=00000000! OK -- rreg (150,00007) a=4fba(i0.tta.xcsr ) d=010200! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (262,00007) a=4fba(i0.tta.xcsr ) d=070000 s=00000000! OK -- rreg (170,00007) a=4fba(i0.tta.xcsr ) d=070200! s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- rreg (200,00007) a=4fba(i0.tta.xcsr ) d=070200! s=00000000! OK -- wreg (312,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- rreg (210,00007) a=4fba(i0.tta.xcsr ) d=070200! s=00000000! OK -- wreg (322,00007) a=4fba(i0.tta.xcsr ) d=000000 s=00000000! OK -- rreg (220,00027) a=4fba(i0.tta.xcsr ) d=000200! s=00000000! OK # A2: test data response (basic fifo; AWIDTH=6) -- # A2.1: loc write, rem read; rbuf.xfuse check ------- ++ rreg (230,00017) a=4fb9(i0.tta.rbuf ) d=000000! s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=177566 s=00000000! OK -- wreg (342,00007) a=0007(c0.memi ) d=000031 s=00001000! OK -- wreg (352,00007) a=0004(c0.al ) d=177564 s=00001000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000200! s=00001000! OK -- rreg (250,00007) a=4fb9(i0.tta.rbuf ) d=000001! s=00001000! OK -- wreg (362,00007) a=0004(c0.al ) d=177566 s=00001000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000000 s=00001000! OK -- wreg (372,00007) a=0004(c0.al ) d=177566 s=00001000! OK -- wreg (002,00007) a=0007(c0.memi ) d=000032 s=00001000! OK -- wreg (012,00007) a=0004(c0.al ) d=177564 s=00001000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000200! s=00001000! OK -- rreg (300,00007) a=4fb9(i0.tta.rbuf ) d=000002! s=00001000! OK -- wreg (022,00007) a=0004(c0.al ) d=177566 s=00001000! OK -- wreg (032,00007) a=0007(c0.memi ) d=000033 s=00001000! OK -- wreg (042,00007) a=0004(c0.al ) d=177564 s=00001000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000200! s=00001000! OK -- rreg (320,00007) a=4fb9(i0.tta.rbuf ) d=000003! s=00001000! OK -- rreg (330,00007) a=4fbb(i0.tta.xbuf ) d=101431! s=00001000! OK -- rreg (340,00007) a=4fb9(i0.tta.rbuf ) d=000002! s=00001000! OK -- rreg (350,00007) a=4fbb(i0.tta.xbuf ) d=101032! s=00001000! OK -- rreg (360,00007) a=4fb9(i0.tta.rbuf ) d=000001! s=00001000! OK -- rreg (370,00007) a=4fbb(i0.tta.xbuf ) d=100433! s=00001000! OK -- rreg (000,00007) a=4fb9(i0.tta.rbuf ) d=000000! s=00001000! OK -- wreg (052,00007) a=0004(c0.al ) d=177564 s=00001000! OK -- rreg (010,00027) a=0007(c0.memi ) d=000200! s=00001000! OK -I- 11:59:10.171471 : ATTN notify apat = 0002 lams = 1 dt=3.009311 -- wtlam apat=0002 to=1.000 T=0.017 OK ++ attn (055,00037) d=000002! s=00000000! OK # A2.2: loc write, rem blk read abort; 8 bit data -- ++ wreg (062,00017) a=0004(c0.al ) d=177566 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=000340 s=00001000! OK -- wreg (102,00007) a=0004(c0.al ) d=177566 s=00001000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000037 s=00001000! OK -- rblk (001,00027) a=4fbb(i0.tta.xbuf ) n= 4> 2! s=01001001| OK 0: 101340! 100437! -I- 11:59:10.355761 : ATTN notify apat = 0002 lams = 1 dt=0.184290 -- wtlam apat=0002 to=1.000 T=0.016 OK ++ attn (065,00037) d=000002! s=00000000! OK # A2.3: loc write, breset does not clear ----------- ++ wreg (122,00017) a=0004(c0.al ) d=177566 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000041 s=00001000! OK -- wreg (142,00007) a=0004(c0.al ) d=177566 s=00001000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000042 s=00001000! OK -- wreg (162,00007) a=0001(c0.cntl ) d=000005 s=00001000! OK -- rblk (011,00027) a=4fbb(i0.tta.xbuf ) n= 3> 2 s=01001001| OK 0: 101041! 100442! -I- 11:59:10.546213 : ATTN notify apat = 0002 lams = 1 dt=0.190452 -- wtlam apat=0002 to=1.000 T=0.016 OK ++ attn (075,00037) d=000002! s=00000000! OK # A3: test fifo logic (csr.rdy and attn) ------------------ # A3.1: 1st loc write, get attn -------------------- ++ wreg (172,00017) a=0004(c0.al ) d=177566 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=000051 s=00001000! OK -- wreg (212,00007) a=0004(c0.al ) d=177564 s=00001000! OK -- rreg (020,00027) a=0007(c0.memi ) d=000200! s=00001000! OK -I- 11:59:10.680031 : ATTN notify apat = 0002 lams = 1 dt=0.133820 -- wtlam apat=0002 to=1.000 T=0.016 OK ++ attn (105,00037) d=000002! s=00000000! OK # A3.2: 2nd loc write, no attn --------------------- ++ wreg (222,00017) a=0004(c0.al ) d=177566 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000052 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (030,00027) a=0007(c0.memi ) d=000200! s=00000000! OK ++ attn (115,00037) d=000000! s=00000000! OK # A3.3: write/read to non-empty fifo -> no attn ---- ++ rreg (040,00017) a=4fbb(i0.tta.xbuf ) d=101051! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=177566 s=00000000! OK -- wreg (262,00007) a=0007(c0.memi ) d=000053 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (050,00027) a=0007(c0.memi ) d=000200! s=00000000! OK ++ attn (125,00037) d=000000! s=00000000! OK ++ rreg (060,00017) a=4fbb(i0.tta.xbuf ) d=101052! s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (070,00027) a=0007(c0.memi ) d=000200! s=00000000! OK # A3.4: fill fifo, RDY 1->0 on 63 char --------- ++ wreg (312,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (143,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (322,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (153,00027) a=0007(c0.memi ) n= 6= 6 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 ++ wreg (332,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (163,00027) a=0007(c0.memi ) n= 3= 3 s=00000000! OK 0: 010210 077102 000000 ++ wreg (342,00017) a=0008(c0.r0 ) d=177566 s=00000000! OK -- wreg (352,00007) a=0009(c0.r1 ) d=000075 s=00000000! OK -- wreg (362,00007) a=000a(c0.r2 ) d=000066 s=00000000! OK -- wreg (372,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (002,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (012,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (022,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (032,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (042,00007) a=0003(c0.psw ) d=000340 s=00000000! OK -- wreg (052,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:12.061548 : ATTN notify apat = 0001 lams = 0 dt=1.381513 ++ attn (135,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.425 OK ++ rreg (100,00037) a=000f(c0.pc ) d=001006! s=00000000! OK ++ rreg (110,00037) a=0009(c0.r1 ) d=000000! s=00000000! OK ++ wreg (062,00017) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (130,00007) a=4fbb(i0.tta.xbuf ) d=137053! s=00000000! OK -- rreg (140,00007) a=4fbb(i0.tta.xbuf ) d=136466! s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (150,00027) a=0007(c0.memi ) d=000200! s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=177566 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=177566 s=00000000! OK -- wreg (142,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=177566 s=00000000! OK -- wreg (172,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=177566 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (210,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3.5: partial fifo read, RDY goes 1 -------------- ++ rreg (220,00017) a=4fbb(i0.tta.xbuf ) d=137466! s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (240,00007) a=4fbb(i0.tta.xbuf ) d=137066! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (250,00027) a=0007(c0.memi ) d=000200! s=00000000! OK # A3.6: full fifo read ----------------------------- ++ rblk (021,00017) a=4fbb(i0.tta.xbuf ) n= 59= 59 s=00000000! OK 0: 136466! 136066! 135466! 135066! 134466! 134066! 133466! 133066! 8: 132466! 132066! 131466! 131066! 130466! 130066! 127466! 127066! 16: 126466! 126066! 125466! 125066! 124466! 124066! 123466! 123066! 24: 122466! 122066! 121466! 121066! 120466! 120066! 117466! 117066! 32: 116466! 116066! 115466! 115066! 114466! 114066! 113466! 113066! 40: 112466! 112066! 111466! 111066! 110466! 110066! 107466! 107066! 48: 106466! 106066! 105466! 105066! 104466! 104066! 103466! 103066! 56: 102466! 102066! 101466! -- rreg (260,00007) a=4fbb(i0.tta.xbuf ) d=101066! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (300,00007) a=4fbb(i0.tta.xbuf ) d=100466! s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=177564 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (320,00027) a=4fbb(i0.tta.xbuf ) d=000000 s=01000001| OK ++ attn (145,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK # B1: test csr.ie and basic interrupt response -------------- ++ wreg (302,00017) a=0004(c0.al ) d=000064 s=00000000! OK -- wblk (173,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 001064 000340 ++ wreg (312,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (203,00027) a=0007(c0.memi ) n= 27= 27 s=00000000! OK 0: 000237 012737 000100 177564 012737 000300 177776 012737 8: 000240 177776 012737 000200 177776 012737 000140 177776 16: 012737 000100 177776 012737 000040 177776 012737 000000 24: 177776 000000 000000 ++ wreg (322,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (332,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (342,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (352,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (362,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (372,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (002,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (012,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (022,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (032,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (042,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:13.849810 : ATTN notify apat = 0001 lams = 0 dt=1.788262 ++ attn (155,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.038 OK ++ rreg (330,00037) a=000f(c0.pc ) d=001066! s=00000000! OK ++ rreg (340,00037) a=000e(c0.sp ) d=000774! s=00000000! OK ++ wreg (052,00017) a=0004(c0.al ) d=000776 s=00000000! OK -- rblk (031,00027) a=0007(c0.memi ) n= 1= 1 s=00000000! OK 0: 000140! # B2: test csr.ie and cpu write -> rri read ----------------- ++ wreg (062,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (213,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (072,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (223,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 000062 000000 001020 000340 000072 000000 000076 000000 8: 000102 000000 000106 000000 ++ wreg (102,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (233,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (112,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (243,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (122,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (253,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000202 000000 ++ wreg (132,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (263,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (142,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (273,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (152,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (303,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 000312 000000 000316 000000 ++ wreg (162,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (313,00027) a=0007(c0.memi ) n= 20= 20 s=00000000! OK 0: 000237 012737 000100 177564 005001 000230 000001 000776 8: 110137 177566 005300 001407 105201 142701 000200 105737 16: 177564 100766 000002 000000 ++ wreg (172,00017) a=0008(c0.r0 ) d=000116 s=00000000! OK -- wreg (202,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (212,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (222,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (232,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (242,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (252,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (262,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (272,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (302,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (312,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:15.464671 : ATTN notify apat = 0002 lams = 1 dt=1.614859 -- wtlam apat=0002 to=10.000 T=0.036 OK ++ attn (165,00037) d=000002 s=00010000! OK ++ rblk (041,00037) a=4fbb(i0.tta.xbuf ) n= 15> 10 s=01011001| OK 0: 104000 103401 103002 102403 102404 102005 101406 101007 8: 100410 100411 # rbibr chain ends with fuse=1 after 10 -I- 11:59:15.769072 : ATTN notify apat = 0002 lams = 1 dt=0.304405 -- wtlam apat=0002 to=10.000 T=0.032 OK ++ attn (175,00037) d=000002 s=00010000! OK ++ rblk (051,00037) a=4fbb(i0.tta.xbuf ) n= 8= 8 s=00010000| OK 0: 105412 105013 104414 104415 104016 103417 103020 102421 ++ rblk (061,00037) a=4fbb(i0.tta.xbuf ) n= 11= 11 s=00010000| OK 0: 105022 104423 104024 103425 103026 103027 102430 102031 8: 101432 101033 101034 ++ rblk (071,00037) a=4fbb(i0.tta.xbuf ) n= 10> 7 s=01010001| OK 0: 103035 102436 102037 101440 101041 101042 100443 # rbibr chain ends with fuse=1 after 36 -I- 11:59:16.445570 : ATTN notify apat = 0002 lams = 1 dt=0.676495 -- wtlam apat=0002 to=10.000 T=0.032 OK ++ attn (205,00037) d=000002 s=00010000! OK ++ rblk (101,00037) a=4fbb(i0.tta.xbuf ) n= 6= 6 s=00010000| OK 0: 105044 104445 104446 104047 103450 103051 ++ rblk (111,00037) a=4fbb(i0.tta.xbuf ) n= 10= 10 s=00010000| OK 0: 105052 104453 104054 104055 103456 103057 102460 102061 8: 102062 101463 ++ rblk (121,00037) a=4fbb(i0.tta.xbuf ) n= 10> 8 s=01010001| OK 0: 103464 103065 102466 102067 101470 101471 101072 100473 # rbibr chain ends with fuse=1 after 60 -I- 11:59:16.999149 : ATTN notify apat = 0002 lams = 1 dt=0.553582 -- wtlam apat=0002 to=10.000 T=0.030 OK ++ attn (215,00037) d=000002 s=00010000! OK ++ rblk (131,00037) a=4fbb(i0.tta.xbuf ) n= 7= 7 s=00010000| OK 0: 105074 104475 104476 104077 103500 103101 102502 ++ rblk (141,00037) a=4fbb(i0.tta.xbuf ) n= 10= 10 s=00001000| OK 0: 104503 104104 104105 103506 103107 102510 102111 102112 8: 101513 101114 -I- 11:59:17.360265 : ATTN notify apat = 0001 lams = 0 dt=0.361116 ++ rblk (151,00037) a=4fbb(i0.tta.xbuf ) n= 9> 1 s=01001001| OK 0: 100515 # rbibr chain ends with fuse=1 after 78 -- wtlam apat=0001 to=10.000 T=0.000 OK ++ attn (225,00037) d=000001 s=00000000! OK ++ rreg (350,00037) a=000f(c0.pc ) d=001050! s=00000000! OK ++ attn (235,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK test_dl11_tx.tcl: PASS # test_dl11_pr: test dl11 paper reader resonse ------------------------ ++ rreg (360,00037) a=4fb8(i0.tta.rcsr ) d=003000 s=00000000! OK # A1: test csr response ------------------------------------- # A1.1: csr ie --------------------------------------- ++ wreg (322,00017) a=0004(c0.al ) d=177560 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=000100 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000100! s=00000000! OK -- rreg (000,00007) a=4fb8(i0.tta.rcsr ) d=003100! s=00000000! OK -- wreg (352,00007) a=4fb8(i0.tta.rcsr ) d=000000 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000100! s=00000000! OK -- rreg (020,00007) a=4fb8(i0.tta.rcsr ) d=003100! s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- wreg (002,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (040,00027) a=4fb8(i0.tta.rcsr ) d=003000! s=00000000! OK # A1.2: csr rlim ----------------------------------- ++ wreg (022,00017) a=4fb8(i0.tta.rcsr ) d=010000 s=00000000! OK -- rreg (050,00007) a=4fb8(i0.tta.rcsr ) d=013000! s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (042,00007) a=4fb8(i0.tta.rcsr ) d=070000 s=00000000! OK -- rreg (070,00007) a=4fb8(i0.tta.rcsr ) d=073000! s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- wreg (062,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- rreg (100,00007) a=4fb8(i0.tta.rcsr ) d=073000! s=00000000! OK -- wreg (072,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- rreg (110,00007) a=4fb8(i0.tta.rcsr ) d=073000! s=00000000! OK -- wreg (102,00007) a=4fb8(i0.tta.rcsr ) d=000000 s=00000000! OK -- rreg (120,00027) a=4fb8(i0.tta.rcsr ) d=003000! s=00000000! OK # A2: test data response (basic fifo; AWIDTH=6) -------- # A2.1: rem write, loc read ------------------------ ++ wreg (112,00017) a=4fb9(i0.tta.rbuf ) d=000107 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000200 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=177562 s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=000107! s=00001000! OK -- wreg (152,00007) a=0004(c0.al ) d=177560 s=00001000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000000! s=00001000! OK -- rreg (170,00027) a=4fb9(i0.tta.rbuf ) d=000000! s=00001000! OK -I- 11:59:18.245120 : ATTN notify apat = 0002 lams = 1 dt=0.884854 -- wtlam apat=0002 to=1.000 T=0.016 OK ++ attn (245,00037) d=000002! s=00000000! OK # A2.2: test fifo csr.fclr clears and breset doesn't ++ wreg (162,00017) a=4fb9(i0.tta.rbuf ) d=000252 s=00000000! OK -- rreg (200,00007) a=4fb9(i0.tta.rbuf ) d=000400! s=00000000! OK -- wreg (172,00007) a=4fb9(i0.tta.rbuf ) d=000125 s=00000000! OK -- rreg (210,00007) a=4fb9(i0.tta.rbuf ) d=001000! s=00000000! OK -- wblk (323,00007) a=4fb9(i0.tta.rbuf ) n= 2= 2 s=00000000! OK 0: 000021 000042 -- rreg (220,00007) a=4fb9(i0.tta.rbuf ) d=002000! s=00000000! OK -- wreg (202,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- rreg (230,00007) a=4fb9(i0.tta.rbuf ) d=002000! s=00000000! OK -- wblk (333,00007) a=4fb9(i0.tta.rbuf ) n= 3= 3 s=00000000! OK 0: 000063 000104 000125 -- rreg (240,00007) a=4fb9(i0.tta.rbuf ) d=003400! s=00000000! OK -- wreg (212,00007) a=4fb8(i0.tta.rcsr ) d=000002 s=00000000! OK -- rreg (250,00027) a=4fb9(i0.tta.rbuf ) d=000000! s=00000000! OK ++ attn (255,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK # A3: test fifo logic ------------------------------------- # A3.1: fill and overfill fifo --------------------- ++ wblk (343,00017) a=4fb9(i0.tta.rbuf ) n= 63= 63 s=00000000! OK 0: 000100 000101 000102 000103 000104 000105 000106 000107 8: 000110 000111 000112 000113 000114 000115 000116 000117 16: 000120 000121 000122 000123 000124 000125 000126 000127 24: 000130 000131 000132 000133 000134 000135 000136 000137 32: 000140 000141 000142 000143 000144 000145 000146 000147 40: 000150 000151 000152 000153 000154 000155 000156 000157 48: 000160 000161 000162 000163 000164 000165 000166 000167 56: 000170 000171 000172 000173 000174 000175 000176 -- rreg (260,00007) a=4fb9(i0.tta.rbuf ) d=037400! s=00000000! OK -- wreg (222,00007) a=4fb9(i0.tta.rbuf ) d=000377 s=01000001| OK -- rreg (270,00007) a=4fb9(i0.tta.rbuf ) d=037400! s=00000000! OK -- wreg (232,00027) a=4fb8(i0.tta.rcsr ) d=000002 s=00000000! OK # A3.2: fill and empty fifo, attn on last read ----- ++ wblk (353,00017) a=4fb9(i0.tta.rbuf ) n= 2= 2 s=00000000! OK 0: 000125 000252 -- rreg (300,00007) a=4fb9(i0.tta.rbuf ) d=001000! s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000200 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=177562 s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000125! s=00000000! OK -- rreg (340,00027) a=4fb9(i0.tta.rbuf ) d=000400! s=00000000! OK ++ attn (265,00037) d=000000! s=00000000! OK ++ wreg (272,00017) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=000200 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=177560 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=177562 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000252! s=00001000! OK -- rreg (000,00027) a=4fb9(i0.tta.rbuf ) d=000000! s=00001000! OK -I- 11:59:19.453430 : ATTN notify apat = 0002 lams = 1 dt=1.208311 -- wtlam apat=0002 to=1.000 T=0.015 OK ++ attn (275,00037) d=000002! s=00000000! OK # B1: test csr.ie and basic interrupt response -------------- ++ wreg (322,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (363,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 001072 000340 ++ wreg (332,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (373,00027) a=0007(c0.memi ) n= 32= 32 s=00000000! OK 0: 000237 105737 177560 100375 012737 000100 177560 012737 8: 000300 177776 012737 000240 177776 012737 000200 177776 16: 012737 000140 177776 012737 000100 177776 012737 000040 24: 177776 012737 000000 177776 000000 013705 177562 000000 ++ wreg (342,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (352,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (362,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (372,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (002,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (012,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (022,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (032,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (042,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (052,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (062,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK ++ wreg (072,00037) a=4fb9(i0.tta.rbuf ) d=000111 s=00010000! OK -I- 11:59:20.229208 : ATTN notify apat = 0002 lams = 1 dt=0.775779 ++ attn (305,00037) d=000003 s=00000000! OK -- wtcpu to=10.000 T=0.046 OK ++ rreg (010,00037) a=000f(c0.pc ) d=001100! s=00000000! OK ++ rreg (020,00017) a=000d(c0.r5 ) d=000111! s=00000000! OK -- rreg (030,00027) a=000e(c0.sp ) d=000774! s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=000776 s=00000000! OK -- rblk (161,00027) a=0007(c0.memi ) n= 1= 1 s=00000000! OK 0: 000140! # B2: test csr.ie and rri write -> cpu read ----------------- ++ wreg (112,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (003,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (122,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (013,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 001016 000340 000066 000000 000072 000000 000076 000000 8: 000102 000000 000106 000000 ++ wreg (132,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (023,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (142,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (033,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (152,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (043,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000202 000000 ++ wreg (162,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (053,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (172,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (063,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (202,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (073,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 000312 000000 000316 000000 ++ wreg (212,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (103,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 012705 001030 012737 000100 177560 000001 000776 113725 8: 177562 001401 000002 000000 ++ attn (315,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK ++ wreg (222,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (232,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (242,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (252,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (262,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (272,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (302,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (312,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (322,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (332,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (342,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK ++ wblk (113,00037) a=4fb9(i0.tta.rbuf ) n= 8= 8 s=00010000! OK 0: 000007 000006 000005 000004 000003 000002 000001 000000 -I- 11:59:22.068968 : ATTN notify apat = 0002 lams = 1 dt=1.839750 ++ attn (325,00037) d=000003 s=00000000! OK -- wtcpu to=10.000 T=0.121 OK ++ rreg (040,00037) a=000f(c0.pc ) d=001030! s=00000000! OK ++ wreg (352,00017) a=0004(c0.al ) d=001030 s=00000000! OK -- rblk (171,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 003007! 002005! 001003! 000001! test_dl11_rx.tcl: PASS # test_dl11_loop: test dl11 receive+transmit response ----------------- ++ rreg (050,00037) a=4fb8(i0.tta.rcsr ) d=003100 s=00000000! OK # A1: loopback test: copy receive -> transmit (60 bytes)------- ++ wreg (362,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (123,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (372,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (133,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 001032 000340 001054 000340 000072 000000 000076 000000 8: 000102 000000 000106 000000 ++ wreg (002,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (143,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (012,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (153,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (022,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (163,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000202 000000 ++ wreg (032,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (173,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (042,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (203,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (052,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (213,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 000312 000000 000316 000000 ++ wreg (062,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (223,00027) a=0007(c0.memi ) n= 38= 38 s=00000000! OK 0: 012704 001114 010405 000237 042737 000100 177564 052737 8: 000100 177560 000230 000001 000776 105737 177560 100024 16: 113724 177562 052737 000100 177564 000002 105737 177564 24: 100013 020405 001411 112537 177566 001407 020405 001003 32: 042737 000100 177564 000002 000000 000000 ++ wreg (072,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (102,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (112,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (122,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (132,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (142,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (152,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (162,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (172,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (202,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (212,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK ++ wblk (233,00037) a=4fb9(i0.tta.rbuf ) n= 31= 31 s=00010000! OK 0: 000073 000072 000071 000070 000067 000066 000065 000064 8: 000063 000062 000061 000060 000057 000056 000055 000054 16: 000053 000052 000051 000050 000047 000046 000045 000044 24: 000043 000042 000041 000040 000037 000036 000035 ++ wblk (243,00037) a=4fb9(i0.tta.rbuf ) n= 29= 29 s=00010000! OK 0: 000034 000033 000032 000031 000030 000027 000026 000025 8: 000024 000023 000022 000021 000020 000017 000016 000015 16: 000014 000013 000012 000011 000010 000007 000006 000005 24: 000004 000003 000002 000001 000000 -I- 11:59:26.037897 : ATTN notify apat = 0002 lams = 1 dt=3.968936 ++ attn (335,00037) d=000002 s=00010000! OK -I- 11:59:27.903676 : ATTN notify apat = 0001 lams = 0 dt=1.865782 ++ attn (345,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=3.103 OK ++ rreg (060,00037) a=000f(c0.pc ) d=001114! s=00000000! OK ++ wreg (222,00017) a=4fb8(i0.tta.rcsr ) d=000000 s=00000000! OK -- wreg (232,00007) a=4fba(i0.tta.xcsr ) d=000000 s=00000000! OK -- rblk (201,00027) a=4fbb(i0.tta.xbuf ) n= 60= 60 s=00000000! OK 0: 136073! 135472! 135071! 134470! 134067! 133466! 133065! 132464! 8: 132063! 131462! 131061! 130460! 130057! 127456! 127055! 126454! 16: 126053! 125452! 125051! 124450! 124047! 123446! 123045! 122444! 24: 122043! 121442! 121041! 120440! 120037! 117436! 117035! 116434! 32: 116033! 115432! 115031! 114430! 114027! 113426! 113025! 112424! 40: 112023! 111422! 111021! 110420! 110017! 107416! 107015! 106414! 48: 106013! 105412! 105011! 104410! 104007! 103406! 103005! 102404! 56: 102003! 101402! 101001! 100400! test_dl11_loop.tcl: PASS @dl11/dl11_all.dat: PASS ## steering file for all dz11 tests # test_dz11_regs: test dz11 register response ------------------------- ++ wreg (242,00017) a=0004(c0.al ) d=160100 s=00000000! OK -- rreg (070,00007) a=0006(c0.mem ) d=000000 s=00000000 OK -- rreg (100,00027) a=4020( ) d=003000 s=00000000 OK ++ wreg (252,00037) a=4020(i0.dza.csr ) d=000140 s=00000000! OK ++ wreg (262,00017) a=4020(i0.dza.csr ) d=000003 s=00000000! OK -- wreg (272,00027) a=4020(i0.dza.csr ) d=177401 s=00000000! OK ++ rreg (110,00037) a=4020(i0.dza.csr ) d=003000 s=00000000! OK # A1: test rem cntl,stat response --------------------------- # A1.1: rem cntl ssel -------------------------------- ++ wreg (302,00017) a=4020(i0.dza.csr ) d=000010 s=00000000! OK -- rreg (120,00007) a=4020(i0.dza.csr ) d=003010! s=00000000! OK -- wreg (312,00007) a=4020(i0.dza.csr ) d=000030 s=00000000! OK -- rreg (130,00007) a=4020(i0.dza.csr ) d=003030! s=00000000! OK -- wreg (322,00007) a=4020(i0.dza.csr ) d=000000 s=00000000! OK -- rreg (140,00027) a=4020(i0.dza.csr ) d=003000! s=00000000! OK # A1.2: rem cntl stat -------------------------------- ++ rreg (150,00017) a=4021(i0.dza.rbuf ) d=000000 s=00000000! OK -- wreg (332,00027) a=4021(i0.dza.rbuf ) d=000000 s=01000001| OK # A1.3: rem cntl(func=rlim) -> stat ------------------ ++ wreg (342,00017) a=4020(i0.dza.csr ) d=011033 s=00000000! OK -- rreg (160,00007) a=4021(i0.dza.rbuf ) d=011000! s=00000000! OK -- wreg (352,00007) a=4020(i0.dza.csr ) d=062433 s=00000000! OK -- rreg (170,00007) a=4021(i0.dza.rbuf ) d=062400! s=00000000! OK -- wreg (362,00007) a=4020(i0.dza.csr ) d=000033 s=00000000! OK -- rreg (200,00027) a=4021(i0.dza.rbuf ) d=000000! s=00000000! OK # A2: test csr response ------------------------------------- # A2.1: csr tie,sae,rie,mse,maint -------------------- ++ wreg (372,00017) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=160100 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (022,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=160100 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=040000! s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=010000 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=160100 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=010000! s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (102,00007) a=0007(c0.memi ) d=000100 s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=160100 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000100! s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000040 s=00001000! OK -- wreg (142,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000040! s=00001000! OK -- wreg (152,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- wreg (162,00007) a=0007(c0.memi ) d=000010 s=00001000! OK -- wreg (172,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (260,00027) a=0007(c0.memi ) d=000010! s=00001000! OK # A2.2: csr mse,maint -> cntl ------------------------ -I- 11:59:29.295049 : ATTN notify apat = 0008 lams = 3 dt=1.391372 ++ wreg (202,00017) a=0004(c0.al ) d=160100 s=00001000! OK -- wreg (212,00007) a=0007(c0.memi ) d=000040 s=00001000! OK -- rreg (270,00007) a=4020(i0.dza.csr ) d=003204! s=00001000! OK -- wreg (222,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000050 s=00001000! OK -- rreg (300,00007) a=4020(i0.dza.csr ) d=003206! s=00001000! OK -- wreg (242,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- wreg (252,00007) a=0007(c0.memi ) d=000000 s=00001000! OK -- rreg (310,00027) a=4020(i0.dza.csr ) d=003200! s=00001000! OK # A2.3: csr sae -> cntl sam--------------------------- ++ wreg (262,00017) a=0001(c0.cntl ) d=000005 s=00001000! OK -- wreg (272,00007) a=4020(i0.dza.csr ) d=000200 s=00001000! OK -- rreg (320,00007) a=4020(i0.dza.csr ) d=003000! s=00001000! OK -- wreg (302,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- wreg (312,00007) a=0007(c0.memi ) d=010000 s=00001000! OK -- wreg (322,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (330,00007) a=0007(c0.memi ) d=010000! s=00001000! OK -- wreg (332,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- wreg (342,00007) a=0007(c0.memi ) d=000000 s=00001000! OK -- wreg (352,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000000! s=00001000! OK -- rreg (350,00007) a=4020(i0.dza.csr ) d=003200! s=00001000! OK -- wreg (362,00007) a=4020(i0.dza.csr ) d=000200 s=00001000! OK -- rreg (360,00027) a=4020(i0.dza.csr ) d=003000! s=00001000! OK # A3: test stat response ------------------------------- # A3.1: test tcr -> stat response -------------------- ++ wreg (372,00017) a=0004(c0.al ) d=160104 s=00001000! OK -- wreg (002,00007) a=0007(c0.memi ) d=125125 s=00001000! OK -- wreg (012,00007) a=4020(i0.dza.csr ) d=000000 s=00001000! OK -- rreg (370,00007) a=4021(i0.dza.rbuf ) d=125125! s=00001000! OK -- wreg (022,00007) a=0004(c0.al ) d=160104 s=00001000! OK -- wreg (032,00007) a=0007(c0.memi ) d=011064 s=00001000! OK -- wreg (042,00007) a=4020(i0.dza.csr ) d=000000 s=00001000! OK -- rreg (000,00007) a=4021(i0.dza.rbuf ) d=011064! s=00001000! OK -- wreg (052,00007) a=0004(c0.al ) d=160104 s=00001000! OK -- wreg (062,00007) a=0007(c0.memi ) d=000000 s=00001000! OK -- wreg (072,00007) a=4020(i0.dza.csr ) d=000000 s=00001000! OK -- rreg (010,00027) a=4021(i0.dza.rbuf ) d=000000! s=00001000! OK # A3.2: test cntl -> msr and stat response ----------- ++ wreg (102,00017) a=4020(i0.dza.csr ) d=042421 s=00001000! OK -- wreg (112,00007) a=4020(i0.dza.csr ) d=063422 s=00001000! OK -- rreg (020,00007) a=4021(i0.dza.rbuf ) d=042547! s=00001000! OK -- wreg (122,00007) a=0004(c0.al ) d=160106 s=00001000! OK -- rreg (030,00007) a=0007(c0.memi ) d=042547! s=00001000! OK -- wreg (132,00007) a=4020(i0.dza.csr ) d=157021 s=00001000! OK -- rreg (040,00007) a=4021(i0.dza.rbuf ) d=157147! s=00001000! OK -- wreg (142,00007) a=0004(c0.al ) d=160106 s=00001000! OK -- rreg (050,00007) a=0007(c0.memi ) d=157147! s=00001000! OK -- wreg (152,00007) a=4020(i0.dza.csr ) d=126422 s=00001000! OK -- rreg (060,00007) a=4021(i0.dza.rbuf ) d=157255! s=00001000! OK -- wreg (162,00007) a=0004(c0.al ) d=160106 s=00001000! OK -- rreg (070,00007) a=0007(c0.memi ) d=157255! s=00001000! OK -- wreg (172,00007) a=4020(i0.dza.csr ) d=000021 s=00001000! OK -- wreg (202,00007) a=4020(i0.dza.csr ) d=000022 s=00001000! OK -- rreg (100,00007) a=4021(i0.dza.rbuf ) d=000000! s=00001000! OK -- wreg (212,00007) a=0004(c0.al ) d=160106 s=00001000! OK -- rreg (110,00027) a=0007(c0.memi ) d=000000! s=00001000! OK # A3.3: test lpr(rxon) -> stat response -------------- ++ wreg (222,00017) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (120,00007) a=4021(i0.dza.rbuf ) d=000000! s=00001000! OK -- wreg (232,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (242,00007) a=0007(c0.memi ) d=010001 s=00001000! OK -- wreg (252,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (130,00007) a=4021(i0.dza.rbuf ) d=000002! s=00001000! OK -- wreg (262,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (272,00007) a=0007(c0.memi ) d=010002 s=00001000! OK -- wreg (302,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (140,00007) a=4021(i0.dza.rbuf ) d=000006! s=00001000! OK -- wreg (312,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (322,00007) a=0007(c0.memi ) d=010006 s=00001000! OK -- wreg (332,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (150,00007) a=4021(i0.dza.rbuf ) d=000106! s=00001000! OK -- wreg (342,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000001 s=00001000! OK -- wreg (362,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (160,00007) a=4021(i0.dza.rbuf ) d=000104! s=00001000! OK -- wreg (372,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (002,00007) a=0007(c0.memi ) d=000002 s=00001000! OK -- wreg (012,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (022,00007) a=0007(c0.memi ) d=000006 s=00001000! OK -- wreg (032,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (170,00027) a=4021(i0.dza.rbuf ) d=000000! s=00001000! OK # A3.4: test tdr(brk) -> stat response --------------- ++ wreg (042,00017) a=0010(c0.membe ) d=000002 s=00001000! OK -- wreg (052,00007) a=0004(c0.al ) d=160106 s=00001000! OK -- wreg (062,00007) a=0007(c0.memi ) d=000400 s=00001000! OK -- wreg (072,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (200,00007) a=4021(i0.dza.rbuf ) d=000400! s=00001000! OK -- wreg (102,00007) a=0010(c0.membe ) d=000002 s=00001000! OK -- wreg (112,00007) a=0004(c0.al ) d=160106 s=00001000! OK -- wreg (122,00007) a=0007(c0.memi ) d=052400 s=00001000! OK -- wreg (132,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (210,00007) a=4021(i0.dza.rbuf ) d=052400! s=00001000! OK -- wreg (142,00007) a=0010(c0.membe ) d=000002 s=00001000! OK -- wreg (152,00007) a=0004(c0.al ) d=160106 s=00001000! OK -- wreg (162,00007) a=0007(c0.memi ) d=125000 s=00001000! OK -- wreg (172,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (220,00007) a=4021(i0.dza.rbuf ) d=125000! s=00001000! OK -- wreg (202,00007) a=0010(c0.membe ) d=000002 s=00001000! OK -- wreg (212,00007) a=0004(c0.al ) d=160106 s=00001000! OK -- wreg (222,00007) a=0007(c0.memi ) d=000000 s=00001000! OK -- wreg (232,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (230,00027) a=4021(i0.dza.rbuf ) d=000000! s=00001000! OK # A4: test stat auto-inc read -------------------------- ++ wreg (242,00017) a=0004(c0.al ) d=160104 s=00001000! OK -- wreg (252,00007) a=0007(c0.memi ) d=137257 s=00001000! OK -- wreg (262,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (272,00007) a=0007(c0.memi ) d=010003 s=00001000! OK -- wreg (302,00007) a=4020(i0.dza.csr ) d=014001 s=00001000! OK -- wreg (312,00007) a=4020(i0.dza.csr ) d=023002 s=00001000! OK -- wreg (322,00007) a=4020(i0.dza.csr ) d=011003 s=00001000! OK -- rreg (240,00007) a=4021(i0.dza.rbuf ) d=137257! s=00001000! OK -- rreg (250,00007) a=4021(i0.dza.rbuf ) d=000010! s=00001000! OK -- rreg (260,00007) a=4021(i0.dza.rbuf ) d=014046! s=00001000! OK -- rreg (270,00027) a=4021(i0.dza.rbuf ) d=011000! s=00001000! OK ++ wreg (332,00017) a=0004(c0.al ) d=160104 s=00001000! OK -- wreg (342,00007) a=0007(c0.memi ) d=000000 s=00001000! OK -- wreg (352,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (362,00007) a=0007(c0.memi ) d=000003 s=00001000! OK -- wreg (372,00007) a=4020(i0.dza.csr ) d=000001 s=00001000! OK -- wreg (002,00007) a=4020(i0.dza.csr ) d=000002 s=00001000! OK -- wreg (012,00007) a=4020(i0.dza.csr ) d=000003 s=00001000! OK -- rreg (300,00007) a=4021(i0.dza.rbuf ) d=000000! s=00001000! OK -- rreg (310,00007) a=4021(i0.dza.rbuf ) d=000000! s=00001000! OK -- rreg (320,00007) a=4021(i0.dza.rbuf ) d=000000! s=00001000! OK -- rreg (330,00027) a=4021(i0.dza.rbuf ) d=000000! s=00001000! OK ++ attn (355,00037) d=000010 s=00000000! OK -- wtlam apat=0008 to=0 harvest only OK test_dz11_regs.tcl: PASS # test_dz11_tx: test dz11 transmitter data path ----------------------- # A1: init dz11 --------------------------------------------- ++ wreg (022,00017) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=000020 s=00000000! OK -- rreg (340,00007) a=4020(i0.dza.csr ) d=003000 s=00000000! OK -- wreg (042,00027) a=4020(i0.dza.csr ) d=000143 s=00000000! OK ++ attn (365,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK # A2: basic data path --------------------------------------- # A2.1: reset and setup with line 4 ------------------ ++ wreg (052,00017) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=000040 s=00001000! OK -- wreg (102,00007) a=0010(c0.membe ) d=000001 s=00001000! OK -- wreg (112,00007) a=0004(c0.al ) d=160104 s=00001000! OK -- wreg (122,00007) a=0007(c0.memi ) d=000020 s=00001000! OK -- rreg (350,00007) a=4022(i0.dza.tcr ) d=000001! s=00001000! OK -- rreg (360,00007) a=4023(i0.dza.tdr ) d=145440! s=00001000! OK -- wreg (132,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (370,00027) a=0007(c0.memi ) d=102040! s=00001000! OK # A2.2: loc tbuf -> rem fdat - 1 char ---------------- -I- 11:59:31.759730 : ATTN notify apat = 0008 lams = 3 dt=2.464671 ++ wreg (142,00017) a=0010(c0.membe ) d=000001 s=00001000! OK -- wreg (152,00007) a=0004(c0.al ) d=160106 s=00001000! OK -- wreg (162,00007) a=0007(c0.memi ) d=000101 s=00001000! OK -- rreg (000,00027) a=4023(i0.dza.tdr ) d=142101! s=00001000! OK ++ wreg (172,00017) a=0010(c0.membe ) d=000001 s=00001000! OK -- wreg (202,00007) a=0004(c0.al ) d=160104 s=00001000! OK -- wreg (212,00027) a=0007(c0.memi ) d=000000 s=00001000! OK ++ attn (375,00037) d=000010 s=00000000! OK -- wtlam apat=0008 to=0 harvest only OK # B1: test csr.tie and basic interrupt response ------------- ++ wreg (222,00017) a=0004(c0.al ) d=000314 s=00000000! OK -- wblk (253,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 001072 000340 ++ wreg (232,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (263,00027) a=0007(c0.memi ) n= 30= 30 s=00000000! OK 0: 000237 112737 000001 160104 012737 040040 160100 012737 8: 000300 177776 012737 000240 177776 012737 000200 177776 16: 012737 000140 177776 012737 000100 177776 012737 000040 24: 177776 012737 000000 177776 000000 000000 ++ wreg (242,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (252,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (262,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (272,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (302,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (312,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (322,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (332,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (342,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (352,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (362,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:32.622158 : ATTN notify apat = 0008 lams = 3 dt=0.862439 ++ attn (005,00037) d=000011 s=00000000! OK -- wtcpu to=10.000 T=0.025 OK ++ rreg (010,00037) a=000f(c0.pc ) d=001074! s=00000000! OK ++ rreg (020,00037) a=000e(c0.sp ) d=000774! s=00000000! OK ++ wreg (372,00017) a=0004(c0.al ) d=000776 s=00000000! OK -- rblk (211,00027) a=0007(c0.memi ) n= 1= 1 s=00000000! OK 0: 000200! ++ rreg (030,00017) a=4022(i0.dza.tcr ) d=000001! s=00000000! OK -- rreg (040,00027) a=4023(i0.dza.tdr ) d=145440! s=00000000! OK # B2: one line at a time ------------------------------------ ++ wreg (002,00017) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000020 s=00001000! OK -- wreg (022,00027) a=4020(i0.dza.csr ) d=000140 s=00001000! OK -I- 11:59:32.926153 : ATTN notify apat = 0008 lams = 3 dt=0.303995 ++ attn (015,00037) d=000010 s=00000000! OK -- wtlam apat=0008 to=0 harvest only OK ++ wreg (032,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (273,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (042,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (303,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 000062 000000 000066 000000 000072 000000 000076 000000 8: 000102 000000 000106 000000 ++ wreg (052,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (313,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (062,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (323,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (072,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (333,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000202 000000 ++ wreg (102,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (343,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (112,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (353,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (122,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (363,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 000312 000000 001030 000340 ++ wreg (132,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (373,00027) a=0007(c0.memi ) n= 36= 36 s=00000000! OK 0: 000237 112737 000001 160104 012705 001054 012737 040040 8: 160100 000230 000001 000776 105725 001003 112537 160106 16: 000002 112537 160104 001401 000002 000000 060400 061000 24: 001001 040400 041000 002001 030000 030400 031000 000401 32: 061400 001001 041400 000001 ++ wreg (142,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (152,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (162,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (172,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (202,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (212,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (222,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (232,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (242,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (252,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (262,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:34.410667 : ATTN notify apat = 0008 lams = 3 dt=1.484516 ++ attn (025,00037) d=000010 s=00010000! OK -I- 11:59:34.722221 : ATTN notify apat = 0001 lams = 0 dt=0.311548 ++ attn (035,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.283 OK ++ rreg (050,00037) a=000f(c0.pc ) d=001054! s=00000000! OK ++ rreg (060,00017) a=4022(i0.dza.tcr ) d=000012! s=00000000! OK -- rblk (221,00027) a=4023(i0.dza.tdr ) n= 10= 10 s=00000000! OK 0: 105440! 100141! 100142! 100501! 100502! 101060! 101061! 101062! 8: 100143! 140503! # B3: up to 4 lines enabled --------------------------------- ++ wreg (272,00017) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=000020 s=00001000! OK -- wreg (312,00027) a=4020(i0.dza.csr ) d=000140 s=00001000! OK -I- 11:59:34.995187 : ATTN notify apat = 0008 lams = 3 dt=0.272969 ++ attn (045,00037) d=000010 s=00000000! OK -- wtlam apat=0008 to=0 harvest only OK ++ wreg (322,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (003,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (332,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (013,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 000062 000000 000066 000000 000072 000000 000076 000000 8: 000102 000000 000106 000000 ++ wreg (342,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (023,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (352,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (033,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (362,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (043,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000202 000000 ++ wreg (372,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (053,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (002,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (063,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (012,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (073,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 000312 000000 001024 000340 ++ wreg (022,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (103,00027) a=0007(c0.memi ) n= 56= 56 s=00000000! OK 0: 000237 112737 000152 160104 012737 040040 160100 000230 8: 000001 000776 113700 160101 042700 177770 006300 016001 16: 001102 105711 001010 006200 146037 001122 160104 105737 24: 160104 001406 000002 112137 160106 010160 001102 000002 32: 000000 001132 001133 001136 001137 001143 001144 001153 40: 001156 001001 004004 020020 100100 033400 000070 030400 48: 031462 000000 041101 042103 043105 060400 000142 000000 ++ wreg (032,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (042,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (052,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (062,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (072,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (102,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (112,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (122,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (132,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (142,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (152,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:36.648427 : ATTN notify apat = 0008 lams = 3 dt=1.653239 ++ attn (055,00037) d=000010 s=00010000! OK -I- 11:59:37.312545 : ATTN notify apat = 0001 lams = 0 dt=0.664118 ++ attn (065,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.633 OK ++ rreg (070,00037) a=000f(c0.pc ) d=001102! s=00000000! OK ++ rreg (100,00017) a=4022(i0.dza.tcr ) d=000016! s=00000000! OK -- rreg (110,00007) a=4023(i0.dza.tdr ) d=105440! s=00000000! OK -- rblk (231,00027) a=4023(i0.dza.tdr ) n= 13= 13 s=00000000! OK 0: 100467 101461 102501 103141 100470 101462 102502 103142 8: 101463 102503 102504 102505 142506 ++ attn (075,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK test_dz11_tx.tcl: PASS # test_dz11_rx: test dz11 receiver data path -------------------------- # A1: init dz11 --------------------------------------------- ++ wreg (162,00017) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (172,00007) a=0007(c0.memi ) d=000020 s=00001000! OK -- rreg (120,00007) a=4020(i0.dza.csr ) d=003000 s=00001000! OK -- wreg (202,00027) a=4020(i0.dza.csr ) d=000143 s=00001000! OK -I- 11:59:37.662290 : ATTN notify apat = 0008 lams = 3 dt=0.349745 ++ attn (105,00037) d=000010 s=00000000! OK -- wtlam apat=0008 to=0 harvest only OK # A2: basic data path --------------------------------------- # A2.1: reset and setup with line 4 ------------------ ++ wreg (212,00017) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000040 s=00001000! OK -- wreg (242,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (252,00007) a=0007(c0.memi ) d=010004 s=00001000! OK -- wreg (262,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- rreg (130,00007) a=4021(i0.dza.rbuf ) d=000020! s=00001000! OK -- rreg (140,00007) a=4022(i0.dza.tcr ) d=000002! s=00001000! OK -- rreg (150,00007) a=4023(i0.dza.tdr ) d=105440! s=00001000! OK -- rreg (160,00007) a=4023(i0.dza.tdr ) d=145020! s=00001000! OK -- wreg (272,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (170,00027) a=0007(c0.memi ) d=000040! s=00001000! OK # A2.2: rem fifo -> loc rbuf - 1 char ---------------- -I- 11:59:37.907742 : ATTN notify apat = 0008 lams = 3 dt=0.245453 ++ wreg (302,00017) a=4023(i0.dza.tdr ) d=002101 s=00001000! OK -- rreg (200,00007) a=4022(i0.dza.tcr ) d=000400! s=00001000! OK -- wreg (312,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000240! s=00001000! OK -- wreg (322,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- rreg (220,00007) a=0007(c0.memi ) d=102101! s=00001000! OK -- rreg (230,00007) a=4022(i0.dza.tcr ) d=000000! s=00001000! OK -- wreg (332,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000040! s=00001000! OK -- wreg (342,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- rreg (250,00027) a=0007(c0.memi ) d=000000! s=00001000! OK # A3.3: rem fifo -> loc rbuf - 5 char for line 4,5,6 - ++ wreg (352,00017) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (362,00007) a=0007(c0.memi ) d=010005 s=00001000! OK -- wreg (372,00007) a=4020(i0.dza.csr ) d=000010 s=00001000! OK -- wreg (002,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- wreg (012,00007) a=0007(c0.memi ) d=010006 s=00001000! OK -- rreg (260,00007) a=4021(i0.dza.rbuf ) d=000160! s=00001000! OK -- rreg (270,00007) a=4022(i0.dza.tcr ) d=000002! s=00001000! OK -- rreg (300,00007) a=4023(i0.dza.tdr ) d=105060! s=00001000! OK -- rreg (310,00007) a=4023(i0.dza.tdr ) d=145160! s=00001000! OK -- wblk (113,00007) a=4023(i0.dza.tdr ) n= 8= 8 s=00001000! OK 0: 000421 002102 001041 002521 003141 001461 002522 002103 -- rreg (320,00007) a=4022(i0.dza.tcr ) d=002400! s=00001000! OK -- wreg (022,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000240! s=00001000! OK -- wreg (032,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- rreg (340,00007) a=0007(c0.memi ) d=102102! s=00001000! OK -- rreg (350,00007) a=4022(i0.dza.tcr ) d=002000! s=00001000! OK -- wreg (042,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000240! s=00001000! OK -- wreg (052,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- rreg (370,00007) a=0007(c0.memi ) d=102521! s=00001000! OK -- rreg (000,00007) a=4022(i0.dza.tcr ) d=001400! s=00001000! OK -- wreg (062,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000240! s=00001000! OK -- wreg (072,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- rreg (020,00007) a=0007(c0.memi ) d=103141! s=00001000! OK -- rreg (030,00007) a=4022(i0.dza.tcr ) d=001000! s=00001000! OK -- wreg (102,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000240! s=00001000! OK -- wreg (112,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- rreg (050,00007) a=0007(c0.memi ) d=102522! s=00001000! OK -- rreg (060,00007) a=4022(i0.dza.tcr ) d=000400! s=00001000! OK -- wreg (122,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000240! s=00001000! OK -- wreg (132,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- rreg (100,00007) a=0007(c0.memi ) d=102103! s=00001000! OK -- rreg (110,00007) a=4022(i0.dza.tcr ) d=000000! s=00001000! OK -- wreg (142,00007) a=0004(c0.al ) d=160100 s=00001000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000040! s=00001000! OK -- wreg (152,00007) a=0004(c0.al ) d=160102 s=00001000! OK -- rreg (130,00027) a=0007(c0.memi ) d=000000! s=00001000! OK ++ attn (115,00037) d=000010 s=00000000! OK -- wtlam apat=0008 to=0 harvest only OK test_dz11_rx.tcl: PASS # test_dz11_loop: test dz11 receiver+transmit response ---------------- # A1: init dz11 --------------------------------------------- ++ wreg (162,00017) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (172,00007) a=0007(c0.memi ) d=000020 s=00001000! OK -- rreg (140,00007) a=4020(i0.dza.csr ) d=003020 s=00001000! OK -- wreg (202,00027) a=4020(i0.dza.csr ) d=000143 s=00001000! OK -I- 11:59:38.862648 : ATTN notify apat = 0008 lams = 3 dt=0.954904 ++ attn (125,00037) d=000010 s=00000000! OK -- wtlam apat=0008 to=0 harvest only OK # A2: backend -> cpu -> backend loop ------------------------ ++ wreg (212,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (123,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (222,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (133,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 000062 000000 000066 000000 000072 000000 000076 000000 8: 000102 000000 000106 000000 ++ wreg (232,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (143,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (242,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (153,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (252,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (163,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000202 000000 ++ wreg (262,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (173,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (272,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (203,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (302,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (213,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 001040 000340 001112 000340 ++ wreg (312,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (223,00027) a=0007(c0.memi ) n= 86= 86 s=00000000! OK 0: 000237 012737 040140 160100 012737 017035 160102 012737 8: 017033 160102 012737 017031 160102 000230 000001 000776 16: 013700 160102 100401 000002 005267 000124 010001 000301 24: 042701 177770 006301 016102 001234 110022 010261 001234 32: 006201 156137 001204 160104 000753 113701 160101 042701 40: 177770 006301 016102 001214 020261 001234 001005 006201 48: 146137 001204 160104 000002 005267 000026 112237 160106 56: 010261 001214 026727 000012 000022 001401 000002 000000 64: 000000 000000 001001 004004 020020 100100 001254 001314 72: 001354 001414 001454 001514 001554 001614 001254 001314 80: 001354 001414 001454 001514 001554 001614 ++ wreg (322,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (332,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (342,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (352,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (362,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (372,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (002,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (012,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (022,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (032,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (042,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:40.625206 : ATTN notify apat = 0008 lams = 3 dt=1.762559 ++ wblk (233,00037) a=4023(i0.dza.tdr ) n= 5= 5 s=00011000! OK 0: 000421 001461 002521 000422 001462 ++ wblk (243,00037) a=4023(i0.dza.tdr ) n= 5= 5 s=00011000! OK 0: 002522 000423 001463 002523 000424 ++ wblk (253,00037) a=4023(i0.dza.tdr ) n= 8= 8 s=00011000! OK 0: 001464 002524 000425 001465 002525 000426 001466 002526 ++ attn (135,00037) d=000010 s=00010000! OK -I- 11:59:41.468634 : ATTN notify apat = 0008 lams = 3 dt=0.843427 ++ attn (145,00037) d=000010 s=00010000! OK -I- 11:59:42.463894 : ATTN notify apat = 0001 lams = 0 dt=0.995261 ++ attn (155,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=1.258 OK ++ rreg (150,00037) a=000f(c0.pc ) d=001200! s=00000000! OK ++ rreg (160,00017) a=4022(i0.dza.tcr ) d=000026! s=00000000! OK -- rblk (241,00007) a=4023(i0.dza.tdr ) n= 4= 4 s=00000000! OK 0: 105440! 105040! 105050! 105052! -- rblk (251,00027) a=4023(i0.dza.tdr ) n= 18= 18 s=00000000! OK 0: 100421 101461 102521 100422 101462 102522 100423 101463 8: 102523 100424 101464 102524 100425 101465 102525 100426 16: 101466 142526 # B1: cpu -> cpu loop using maintenance mode ---------------- ++ wreg (052,00017) a=0004(c0.al ) d=160100 s=00000000! OK -- wreg (062,00007) a=0007(c0.memi ) d=000020 s=00001000! OK -- wreg (072,00027) a=4020(i0.dza.csr ) d=000140 s=00001000! OK -I- 11:59:42.828854 : ATTN notify apat = 0008 lams = 3 dt=0.364961 ++ attn (165,00037) d=000010 s=00000000! OK -- wtlam apat=0008 to=0 harvest only OK ++ wreg (102,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (263,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (112,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (273,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 000062 000000 000066 000000 000072 000000 000076 000000 8: 000102 000000 000106 000000 ++ wreg (122,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (303,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (132,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (313,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (142,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (323,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000202 000000 ++ wreg (152,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (333,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (162,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (343,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (172,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (353,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 001122 000340 001054 000340 ++ wreg (202,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (363,00027) a=0007(c0.memi ) n= 97= 97 s=00000000! OK 0: 000237 012737 040150 160100 112737 000152 160104 012737 8: 017036 160102 012737 017035 160102 012737 017033 160102 16: 012737 017031 160102 000230 000001 000776 113701 160101 24: 042701 177770 006301 016102 001212 105712 001005 006201 32: 146137 001202 160104 000002 112237 160106 010261 001212 40: 000002 013700 160102 100405 022767 000015 000122 001420 48: 000002 005267 000112 010001 000301 042701 177770 006301 56: 016102 001262 120022 001401 000000 010261 001262 000751 64: 000000 001001 004004 020020 100100 001232 001233 001236 72: 001237 001243 001244 001253 001256 033400 000070 030400 80: 031462 000000 041101 042103 043105 060400 000142 000000 88: 000000 001232 001233 001236 001237 001243 001244 001253 96: 001256 ++ wreg (212,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (222,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (232,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (242,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (252,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (262,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (272,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (302,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (312,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (322,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (332,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:44.741658 : ATTN notify apat = 0008 lams = 3 dt=1.912804 ++ attn (175,00037) d=000010 s=00010000! OK -I- 11:59:46.132830 : ATTN notify apat = 0001 lams = 0 dt=1.391169 ++ attn (205,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=1.380 OK ++ rreg (170,00037) a=000f(c0.pc ) d=001202! s=00000000! OK ++ attn (215,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK test_dz11_loop.tcl: PASS @dz11/dz11_all.dat: PASS ## steering file for all lp11 tests # test_lp11_all: test lp11 response ----------------------------------- ++ wreg (342,00017) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (200,00007) a=0006(c0.mem ) d=100200 s=00000000 OK -- rreg (210,00027) a=4fa6( ) d=103600 s=00000000 OK ++ wreg (352,00037) a=4fa6(i0.lpa.csr ) d=100000 s=00000000! OK # A1: test csr response ------------------------------------- # A1.1: csr err, done -------------------------------- ++ wreg (362,00017) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (372,00007) a=4fa6(i0.lpa.csr ) d=000000 s=00000000! OK -- rreg (220,00007) a=4fa6(i0.lpa.csr ) d=003600! s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (012,00007) a=4fa6(i0.lpa.csr ) d=100000 s=00000000! OK -- rreg (240,00007) a=4fa6(i0.lpa.csr ) d=103600! s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=100200! s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- wreg (042,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=100200! s=00000000! OK -- wreg (062,00007) a=4fa6(i0.lpa.csr ) d=000000 s=00000000! OK -- rreg (270,00007) a=4fa6(i0.lpa.csr ) d=003600! s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (102,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (310,00027) a=0007(c0.memi ) d=000200! s=00000000! OK # A1.2: csr ie,ir ------------------------------------ ++ wreg (122,00017) a=0004(c0.al ) d=177514 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000100 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (330,00007) a=4fa6(i0.lpa.csr ) d=003740! s=00000000! OK -- wreg (152,00007) a=4fa6(i0.lpa.csr ) d=000000 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (350,00007) a=4fa6(i0.lpa.csr ) d=003740! s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (370,00027) a=4fa6(i0.lpa.csr ) d=003600! s=00000000! OK # A1.3: csr rlim ------------------------------------- ++ wreg (222,00017) a=4fa6(i0.lpa.csr ) d=010000 s=00000000! OK -- rreg (000,00007) a=4fa6(i0.lpa.csr ) d=013600! s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (242,00007) a=4fa6(i0.lpa.csr ) d=070000 s=00000000! OK -- rreg (020,00007) a=4fa6(i0.lpa.csr ) d=073600! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- wreg (262,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- rreg (030,00007) a=4fa6(i0.lpa.csr ) d=073600! s=00000000! OK -- wreg (272,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- rreg (040,00007) a=4fa6(i0.lpa.csr ) d=073600! s=00000000! OK -- wreg (302,00007) a=4fa6(i0.lpa.csr ) d=000000 s=00000000! OK -- rreg (050,00027) a=4fa6(i0.lpa.csr ) d=003600! s=00000000! OK # A2: test data response (basic fifo; AWIDTH=7) -------- # A2.1: loc write, rem read -------------------------- ++ wreg (312,00017) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (322,00007) a=0007(c0.memi ) d=000031 s=00001000! OK -- wreg (332,00007) a=0004(c0.al ) d=177514 s=00001000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000200! s=00001000! OK -- wreg (342,00007) a=0004(c0.al ) d=177516 s=00001000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000000 s=00001000! OK -- wreg (352,00007) a=0004(c0.al ) d=177516 s=00001000! OK -- wreg (362,00007) a=0007(c0.memi ) d=000032 s=00001000! OK -- wreg (372,00007) a=0004(c0.al ) d=177514 s=00001000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000200! s=00001000! OK -- wreg (002,00007) a=0004(c0.al ) d=177516 s=00001000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000033 s=00001000! OK -- wreg (022,00007) a=0004(c0.al ) d=177514 s=00001000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000200! s=00001000! OK -- rreg (120,00007) a=4fa7(i0.lpa.buf ) d=101431! s=00001000! OK -- rreg (130,00007) a=4fa7(i0.lpa.buf ) d=101032! s=00001000! OK -- rreg (140,00007) a=4fa7(i0.lpa.buf ) d=100433! s=00001000! OK -- wreg (032,00007) a=0004(c0.al ) d=177514 s=00001000! OK -- rreg (150,00027) a=0007(c0.memi ) d=000200! s=00001000! OK -I- 11:59:47.489968 : ATTN notify apat = 0100 lams = 8 dt=1.357137 -- wtlam apat=0100 to=1.000 T=0.016 OK ++ attn (225,00037) d=000400! s=00000000! OK # A2.2: csr.err=1, loc write not stored, no attn ----- ++ wreg (042,00017) a=4fa6(i0.lpa.csr ) d=100000 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (062,00007) a=0007(c0.memi ) d=000034 s=00000000! OK -- wreg (072,00007) a=4fa6(i0.lpa.csr ) d=000000 s=00000000! OK -- rreg (160,00027) a=4fa7(i0.lpa.buf ) d=000000 s=01000001| OK ++ attn (235,00037) d=000000! s=00000000! OK # A2.3: loc write, rem blk read abort; 7 bit data ---- ++ wreg (102,00017) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000340 s=00001000! OK -- wreg (122,00007) a=0004(c0.al ) d=177516 s=00001000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000037 s=00001000! OK -- rblk (261,00027) a=4fa7(i0.lpa.buf ) n= 4> 2! s=01001001| OK 0: 101140! 100437! -I- 11:59:47.815047 : ATTN notify apat = 0100 lams = 8 dt=0.325082 -- wtlam apat=0100 to=1.000 T=0.016 OK ++ attn (245,00037) d=000400! s=00000000! OK # A2.4: loc write, breset does not clear fifo -------- ++ wreg (142,00017) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000041 s=00001000! OK -- wreg (162,00007) a=0004(c0.al ) d=177516 s=00001000! OK -- wreg (172,00007) a=0007(c0.memi ) d=000042 s=00001000! OK -- wreg (202,00007) a=0001(c0.cntl ) d=000005 s=00001000! OK -- rblk (271,00027) a=4fa7(i0.lpa.buf ) n= 3> 2 s=01001001| OK 0: 101041! 100442! -I- 11:59:48.010952 : ATTN notify apat = 0100 lams = 8 dt=0.195905 -- wtlam apat=0100 to=1.000 T=0.016 OK ++ attn (255,00037) d=000400! s=00000000! OK # A2.5: loc write, csr.err clears fifo --------------- ++ wreg (212,00017) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=000043 s=00001000! OK -- wreg (232,00007) a=0004(c0.al ) d=177516 s=00001000! OK -- wreg (242,00007) a=0007(c0.memi ) d=000044 s=00001000! OK -- wreg (252,00007) a=4fa6(i0.lpa.csr ) d=100000 s=00001000! OK -- wreg (262,00007) a=4fa6(i0.lpa.csr ) d=000000 s=00001000! OK -- rblk (301,00027) a=4fa7(i0.lpa.buf ) n= 3> 0! s=01001001| OK -I- 11:59:48.221482 : ATTN notify apat = 0100 lams = 8 dt=0.210531 -- wtlam apat=0100 to=1.000 T=0.016 OK ++ attn (265,00037) d=000400! s=00000000! OK # A3: test fifo logic (csr.done and attn) ------------------ # A3.1: 1st loc write, get attn ---------------------- ++ wreg (272,00017) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=000051 s=00001000! OK -- wreg (312,00007) a=0004(c0.al ) d=177514 s=00001000! OK -- rreg (170,00027) a=0007(c0.memi ) d=000200! s=00001000! OK -I- 11:59:48.362583 : ATTN notify apat = 0100 lams = 8 dt=0.141101 -- wtlam apat=0100 to=1.000 T=0.016 OK ++ attn (275,00037) d=000400! s=00000000! OK # A3.2: 2nd loc write, no attn ----------------------- ++ wreg (322,00017) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=000052 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (200,00027) a=0007(c0.memi ) d=000200! s=00000000! OK ++ attn (305,00037) d=000000! s=00000000! OK # A3.3: write/read to non-empty fifo -> no attn ------ ++ rreg (210,00017) a=4fa7(i0.lpa.buf ) d=101051! s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=000053 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (220,00027) a=0007(c0.memi ) d=000200! s=00000000! OK ++ attn (315,00037) d=000000! s=00000000! OK ++ rreg (230,00017) a=4fa7(i0.lpa.buf ) d=101052! s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (240,00027) a=0007(c0.memi ) d=000200! s=00000000! OK # A3.4: fill fifo, DONE 1->0 on 127 char ------------- ++ wreg (012,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (373,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (022,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (003,00027) a=0007(c0.memi ) n= 6= 6 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 ++ wreg (032,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (013,00027) a=0007(c0.memi ) n= 3= 3 s=00000000! OK 0: 010210 077102 000000 ++ wreg (042,00017) a=0008(c0.r0 ) d=177516 s=00000000! OK -- wreg (052,00007) a=0009(c0.r1 ) d=000175 s=00000000! OK -- wreg (062,00007) a=000a(c0.r2 ) d=000066 s=00000000! OK -- wreg (072,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (102,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (112,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (122,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (132,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (142,00007) a=0003(c0.psw ) d=000340 s=00000000! OK -- wreg (152,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:50.071986 : ATTN notify apat = 0001 lams = 0 dt=1.709400 ++ attn (325,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.745 OK ++ rreg (250,00037) a=000f(c0.pc ) d=001006! s=00000000! OK ++ rreg (260,00037) a=0009(c0.r1 ) d=000000! s=00000000! OK ++ wreg (162,00017) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (300,00007) a=4fa7(i0.lpa.buf ) d=177053! s=00000000! OK -- rreg (310,00007) a=4fa7(i0.lpa.buf ) d=176466! s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (320,00027) a=0007(c0.memi ) d=000200! s=00000000! OK ++ wreg (202,00017) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (242,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=177516 s=00000000! OK -- wreg (322,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (360,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3.5: partial fifo read, DONE goes 1 --------------- ++ rreg (370,00017) a=4fa7(i0.lpa.buf ) d=177466! s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (010,00007) a=4fa7(i0.lpa.buf ) d=177066! s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (020,00027) a=0007(c0.memi ) d=000200! s=00000000! OK # A3.6: full fifo read ------------------------------- ++ rblk (311,00017) a=4fa7(i0.lpa.buf ) n= 123= 123 s=00000000! OK 0: 176466! 176066! 175466! 175066! 174466! 174066! 173466! 173066! 8: 172466! 172066! 171466! 171066! 170466! 170066! 167466! 167066! 16: 166466! 166066! 165466! 165066! 164466! 164066! 163466! 163066! 24: 162466! 162066! 161466! 161066! 160466! 160066! 157466! 157066! 32: 156466! 156066! 155466! 155066! 154466! 154066! 153466! 153066! 40: 152466! 152066! 151466! 151066! 150466! 150066! 147466! 147066! 48: 146466! 146066! 145466! 145066! 144466! 144066! 143466! 143066! 56: 142466! 142066! 141466! 141066! 140466! 140066! 137466! 137066! 64: 136466! 136066! 135466! 135066! 134466! 134066! 133466! 133066! 72: 132466! 132066! 131466! 131066! 130466! 130066! 127466! 127066! 80: 126466! 126066! 125466! 125066! 124466! 124066! 123466! 123066! 88: 122466! 122066! 121466! 121066! 120466! 120066! 117466! 117066! 96: 116466! 116066! 115466! 115066! 114466! 114066! 113466! 113066! 104: 112466! 112066! 111466! 111066! 110466! 110066! 107466! 107066! 112: 106466! 106066! 105466! 105066! 104466! 104066! 103466! 103066! 120: 102466! 102066! 101466! -- rreg (030,00007) a=4fa7(i0.lpa.buf ) d=101066! s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (050,00007) a=4fa7(i0.lpa.buf ) d=100466! s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=177514 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (070,00027) a=4fa7(i0.lpa.buf ) d=000000 s=01000001| OK ++ attn (335,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK # B1: test csr.ie and basic interrupt response -------------- ++ wreg (002,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (023,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 001064 000340 ++ wreg (012,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (033,00027) a=0007(c0.memi ) n= 27= 27 s=00000000! OK 0: 000237 012737 000100 177514 012737 000300 177776 012737 8: 000240 177776 012737 000200 177776 012737 000140 177776 16: 012737 000100 177776 012737 000040 177776 012737 000000 24: 177776 000000 000000 ++ wreg (022,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (032,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (042,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (052,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (062,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (072,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (102,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (112,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (122,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (132,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (142,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:52.115860 : ATTN notify apat = 0001 lams = 0 dt=2.043875 ++ attn (345,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.036 OK ++ rreg (100,00037) a=000f(c0.pc ) d=001066! s=00000000! OK ++ rreg (110,00037) a=000e(c0.sp ) d=000774! s=00000000! OK ++ wreg (152,00017) a=0004(c0.al ) d=000776 s=00000000! OK -- rblk (321,00027) a=0007(c0.memi ) n= 1= 1 s=00000000! OK 0: 000140! # B2: test csr.ie and cpu write -> rri read ----------------- ++ wreg (162,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (043,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (172,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (053,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 000062 000000 000066 000000 000072 000000 000076 000000 8: 000102 000000 000106 000000 ++ wreg (202,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (063,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (212,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (073,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (222,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (103,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 001020 000340 ++ wreg (232,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (113,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (242,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (123,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (252,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (133,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 000312 000000 000316 000000 ++ wreg (262,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (143,00027) a=0007(c0.memi ) n= 20= 20 s=00000000! OK 0: 000237 012737 000100 177514 005001 000230 000001 000776 8: 110137 177516 005300 001407 105201 142701 000200 105737 16: 177514 100766 000002 000000 ++ wreg (272,00017) a=0008(c0.r0 ) d=000236 s=00000000! OK -- wreg (302,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (312,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (322,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (332,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (342,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (352,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (362,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (372,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (002,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (012,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 11:59:53.691990 : ATTN notify apat = 0100 lams = 8 dt=1.576129 -- wtlam apat=0100 to=10.000 T=0.039 OK ++ attn (355,00037) d=000400 s=00010000! OK ++ rblk (331,00037) a=4fa7(i0.lpa.buf ) n= 31> 10 s=01011001| OK 0: 104000 103401 103002 102403 102404 102005 101406 101007 8: 100410 100411 # rbibr chain ends with fuse=1 after 10 -I- 11:59:54.129286 : ATTN notify apat = 0100 lams = 8 dt=0.437297 -- wtlam apat=0100 to=10.000 T=0.033 OK ++ attn (365,00037) d=000400 s=00010000! OK ++ rblk (341,00037) a=4fa7(i0.lpa.buf ) n= 8= 8 s=00010000| OK 0: 111012 110413 110014 107415 107016 107017 106420 106021 ++ rblk (351,00037) a=4fa7(i0.lpa.buf ) n= 18= 18 s=00010000| OK 0: 110022 107423 107024 106425 106426 106027 105430 105031 8: 104432 104433 104034 103435 103036 102437 102440 102041 16: 101442 101043 ++ rblk (361,00037) a=4fa7(i0.lpa.buf ) n= 16> 8 s=01011001| OK 0: 103444 103045 102446 102047 101450 101451 101052 100453 # rbibr chain ends with fuse=1 after 44 -I- 11:59:54.817926 : ATTN notify apat = 0100 lams = 8 dt=0.688640 -- wtlam apat=0100 to=10.000 T=0.031 OK ++ attn (375,00037) d=000400 s=00010000! OK ++ rblk (371,00037) a=4fa7(i0.lpa.buf ) n= 7= 7 s=00010000| OK 0: 106454 106055 105456 105057 104460 104461 104062 ++ rblk (001,00037) a=4fa7(i0.lpa.buf ) n= 13= 13 s=00010000| OK 0: 106063 105464 105065 104466 104067 104070 103471 103072 8: 102473 102074 102075 101476 101077 ++ rblk (011,00037) a=4fa7(i0.lpa.buf ) n= 12> 8 s=01011001| OK 0: 103100 102501 102502 102103 101504 101105 100506 100507 # rbibr chain ends with fuse=1 after 72 -I- 11:59:55.415401 : ATTN notify apat = 0100 lams = 8 dt=0.597476 -- wtlam apat=0100 to=10.000 T=0.032 OK ++ attn (005,00037) d=000400 s=00010000! OK ++ rblk (021,00037) a=4fa7(i0.lpa.buf ) n= 6= 6 s=00010000| OK 0: 105510 105111 104512 104113 103514 103515 ++ rblk (031,00037) a=4fa7(i0.lpa.buf ) n= 11= 11 s=00010000| OK 0: 105516 105117 104520 104121 103522 103523 103124 102525 8: 102126 101527 101530 ++ rblk (041,00037) a=4fa7(i0.lpa.buf ) n= 11> 8 s=01010001| OK 0: 103531 103132 102533 102134 101535 101536 101137 100540 # rbibr chain ends with fuse=1 after 97 -I- 11:59:55.991570 : ATTN notify apat = 0100 lams = 8 dt=0.576168 -- wtlam apat=0100 to=10.000 T=0.031 OK ++ attn (015,00037) d=000400 s=00010000! OK ++ rblk (051,00037) a=4fa7(i0.lpa.buf ) n= 7= 7 s=00010000| OK 0: 105141 105142 104543 104144 103545 103146 103147 ++ rblk (061,00037) a=4fa7(i0.lpa.buf ) n= 10= 10 s=00010000| OK 0: 104550 104551 104152 103553 103154 102555 102556 102157 8: 101560 101161 ++ rblk (071,00037) a=4fa7(i0.lpa.buf ) n= 9> 8 s=01011001| OK 0: 103162 102563 102564 102165 101566 101167 100570 100571 # rbibr chain ends with fuse=1 after 122 -I- 11:59:56.542444 : ATTN notify apat = 0100 lams = 8 dt=0.550875 -- wtlam apat=0100 to=10.000 T=0.031 OK ++ attn (025,00037) d=000400 s=00010000! OK ++ rblk (101,00037) a=4fa7(i0.lpa.buf ) n= 6= 6 s=00010000| OK 0: 104572 104173 104174 103575 103176 102577 ++ rblk (111,00037) a=4fa7(i0.lpa.buf ) n= 9= 9 s=00010000| OK 0: 104400 104001 103402 103403 103004 102405 102006 101407 8: 101410 ++ rblk (121,00037) a=4fa7(i0.lpa.buf ) n= 9> 8 s=01010001| OK 0: 103411 103012 102413 102014 101415 101416 101017 100420 # rbibr chain ends with fuse=1 after 145 -I- 11:59:57.076095 : ATTN notify apat = 0100 lams = 8 dt=0.533651 -- wtlam apat=0100 to=10.000 T=0.031 OK ++ attn (035,00037) d=000400 s=00010000! OK ++ rblk (131,00037) a=4fa7(i0.lpa.buf ) n= 7= 7 s=00010000| OK 0: 105021 104422 104023 103424 103025 103026 102427 -I- 11:59:57.294107 : ATTN notify apat = 0001 lams = 0 dt=0.218013 ++ rblk (141,00037) a=4fa7(i0.lpa.buf ) n= 10> 6 s=01001001| OK 0: 103030 102431 102032 101433 101034 100435 # rbibr chain ends with fuse=1 after 158 -- wtlam apat=0001 to=10.000 T=0.000 OK ++ attn (045,00037) d=000001 s=00000000! OK ++ rreg (120,00037) a=000f(c0.pc ) d=001050! s=00000000! OK ++ attn (055,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK test_lp11_all.tcl: PASS @lp11/lp11_all.dat: PASS ## steering file for all pc11 tests # test_pc11_pp: test pc11 paper puncher resonse ----------------------- ++ wreg (022,00017) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (130,00007) a=0006(c0.mem ) d=100000 s=00000000 OK -- rreg (140,00027) a=4fb4( ) d=103000 s=00000000 OK ++ wreg (032,00037) a=4fb4(i0.pca.rcsr ) d=100000 s=00000000! OK ++ wreg (042,00037) a=4fb6(i0.pca.pcsr ) d=100000 s=00000000! OK ++ rreg (150,00037) a=4fb4(i0.pca.rcsr ) d=103000 s=00000000! OK # A1: test csr response ------------------------------------- # A1.1: csr err, rdy --------------------------------- ++ wreg (052,00017) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (062,00007) a=4fb6(i0.pca.pcsr ) d=000000 s=00000000! OK -- rreg (160,00007) a=4fb6(i0.pca.pcsr ) d=000200! s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (102,00007) a=4fb6(i0.pca.pcsr ) d=100000 s=00000000! OK -- rreg (200,00007) a=4fb6(i0.pca.pcsr ) d=100200! s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=100200! s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=100200! s=00000000! OK -- wreg (152,00007) a=4fb6(i0.pca.pcsr ) d=000000 s=00000000! OK -- rreg (230,00007) a=4fb6(i0.pca.pcsr ) d=000200! s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (172,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (250,00027) a=0007(c0.memi ) d=000200! s=00000000! OK # A1.2: csr ie, ir ----------------------------------- ++ wreg (212,00017) a=0004(c0.al ) d=177554 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=000100 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (270,00007) a=4fb6(i0.pca.pcsr ) d=000340! s=00000000! OK -- wreg (242,00007) a=4fb6(i0.pca.pcsr ) d=000000 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (310,00007) a=4fb6(i0.pca.pcsr ) d=000340! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (330,00027) a=4fb6(i0.pca.pcsr ) d=000200! s=00000000! OK # A1.3: csr rlim ----------------------------------- ++ wreg (312,00017) a=4fb6(i0.pca.pcsr ) d=010000 s=00000000! OK -- rreg (340,00007) a=4fb6(i0.pca.pcsr ) d=010200! s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (332,00007) a=4fb6(i0.pca.pcsr ) d=070000 s=00000000! OK -- rreg (360,00007) a=4fb6(i0.pca.pcsr ) d=070200! s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- rreg (370,00007) a=4fb6(i0.pca.pcsr ) d=070200! s=00000000! OK -- wreg (362,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- rreg (000,00007) a=4fb6(i0.pca.pcsr ) d=070200! s=00000000! OK -- wreg (372,00007) a=4fb6(i0.pca.pcsr ) d=000000 s=00000000! OK -- rreg (010,00027) a=4fb6(i0.pca.pcsr ) d=000200! s=00000000! OK # A2: test data response (basic fifo; AWIDTH=6) -- # A2.1: loc write, rem read; rbuf.pfuse check ------- ++ rreg (020,00017) a=4fb5(i0.pca.rbuf ) d=000000! s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000031 s=00001000! OK -- wreg (022,00007) a=0004(c0.al ) d=177554 s=00001000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000200! s=00001000! OK -- rreg (040,00007) a=4fb5(i0.pca.rbuf ) d=000001! s=00001000! OK -- wreg (032,00007) a=0004(c0.al ) d=177556 s=00001000! OK -- rreg (050,00007) a=0007(c0.memi ) d=000000 s=00001000! OK -- wreg (042,00007) a=0004(c0.al ) d=177556 s=00001000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000032 s=00001000! OK -- wreg (062,00007) a=0004(c0.al ) d=177554 s=00001000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000200! s=00001000! OK -- rreg (070,00007) a=4fb5(i0.pca.rbuf ) d=000002! s=00001000! OK -- wreg (072,00007) a=0004(c0.al ) d=177556 s=00001000! OK -- wreg (102,00007) a=0007(c0.memi ) d=000033 s=00001000! OK -- wreg (112,00007) a=0004(c0.al ) d=177554 s=00001000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000200! s=00001000! OK -- rreg (110,00007) a=4fb5(i0.pca.rbuf ) d=000003! s=00001000! OK -- rreg (120,00007) a=4fb7(i0.pca.pbuf ) d=101431! s=00001000! OK -- rreg (130,00007) a=4fb5(i0.pca.rbuf ) d=000002! s=00001000! OK -- rreg (140,00007) a=4fb7(i0.pca.pbuf ) d=101032! s=00001000! OK -- rreg (150,00007) a=4fb5(i0.pca.rbuf ) d=000001! s=00001000! OK -- rreg (160,00007) a=4fb7(i0.pca.pbuf ) d=100433! s=00001000! OK -- rreg (170,00007) a=4fb5(i0.pca.rbuf ) d=000000! s=00001000! OK -- wreg (122,00007) a=0004(c0.al ) d=177554 s=00001000! OK -- rreg (200,00027) a=0007(c0.memi ) d=000200! s=00001000! OK -I- 11:59:58.838491 : ATTN notify apat = 0400 lams = 10 dt=1.544383 -- wtlam apat=0400 to=1.000 T=0.015 OK ++ attn (065,00037) d=002000! s=00000000! OK # A2.2: csr.err=1, loc write not stored, no attn --- ++ wreg (132,00017) a=4fb6(i0.pca.pcsr ) d=100000 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000034 s=00000000! OK -- wreg (162,00007) a=4fb6(i0.pca.pcsr ) d=000000 s=00000000! OK -- rreg (210,00027) a=4fb7(i0.pca.pbuf ) d=000000 s=01000001| OK ++ attn (075,00037) d=000000! s=00000000! OK # A2.3: loc write, rem blk read abort; 8 bit data -- ++ wreg (172,00017) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=000340 s=00001000! OK -- wreg (212,00007) a=0004(c0.al ) d=177556 s=00001000! OK -- wreg (222,00007) a=0007(c0.memi ) d=000037 s=00001000! OK -- rblk (151,00027) a=4fb7(i0.pca.pbuf ) n= 4> 2! s=01001001| OK 0: 101340! 100437! -I- 11:59:59.145751 : ATTN notify apat = 0400 lams = 10 dt=0.307259 -- wtlam apat=0400 to=1.000 T=0.015 OK ++ attn (105,00037) d=002000! s=00000000! OK # A2.4: loc write, breset does not clear ----------- ++ wreg (232,00017) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (242,00007) a=0007(c0.memi ) d=000041 s=00001000! OK -- wreg (252,00007) a=0004(c0.al ) d=177556 s=00001000! OK -- wreg (262,00007) a=0007(c0.memi ) d=000042 s=00001000! OK -- wreg (272,00007) a=0001(c0.cntl ) d=000005 s=00001000! OK -- rblk (161,00027) a=4fb7(i0.pca.pbuf ) n= 3> 2 s=01001001| OK 0: 101041! 100442! -I- 11:59:59.333411 : ATTN notify apat = 0400 lams = 10 dt=0.187663 -- wtlam apat=0400 to=1.000 T=0.015 OK ++ attn (115,00037) d=002000! s=00000000! OK # A2.5: loc write, csr.err clears fifo ------------- ++ wreg (302,00017) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=000043 s=00001000! OK -- wreg (322,00007) a=0004(c0.al ) d=177556 s=00001000! OK -- wreg (332,00007) a=0007(c0.memi ) d=000044 s=00001000! OK -- wreg (342,00007) a=4fb6(i0.pca.pcsr ) d=100000 s=00001000! OK -- wreg (352,00007) a=4fb6(i0.pca.pcsr ) d=000000 s=00001000! OK -- rblk (171,00027) a=4fb7(i0.pca.pbuf ) n= 3> 0! s=01001001| OK -I- 11:59:59.535612 : ATTN notify apat = 0400 lams = 10 dt=0.202202 -- wtlam apat=0400 to=1.000 T=0.015 OK ++ attn (125,00037) d=002000! s=00000000! OK # A3: test fifo logic (csr.rdy and attn) ------------------ # A3.1: 1st loc write, get attn -------------------- ++ wreg (362,00017) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (372,00007) a=0007(c0.memi ) d=000051 s=00001000! OK -- wreg (002,00007) a=0004(c0.al ) d=177554 s=00001000! OK -- rreg (220,00027) a=0007(c0.memi ) d=000200! s=00001000! OK -I- 11:59:59.667328 : ATTN notify apat = 0400 lams = 10 dt=0.131716 -- wtlam apat=0400 to=1.000 T=0.015 OK ++ attn (135,00037) d=002000! s=00000000! OK # A3.2: 2nd loc write, no attn --------------------- ++ wreg (012,00017) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (022,00007) a=0007(c0.memi ) d=000052 s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (230,00027) a=0007(c0.memi ) d=000200! s=00000000! OK ++ attn (145,00037) d=000000! s=00000000! OK # A3.3: write/read to non-empty fifo -> no attn ---- ++ rreg (240,00017) a=4fb7(i0.pca.pbuf ) d=101051! s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000053 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (250,00027) a=0007(c0.memi ) d=000200! s=00000000! OK ++ attn (155,00037) d=000000! s=00000000! OK ++ rreg (260,00017) a=4fb7(i0.pca.pbuf ) d=101052! s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (270,00027) a=0007(c0.memi ) d=000200! s=00000000! OK # A3.4: fill fifo, RDY 1->0 on 63 char --------- ++ wreg (102,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (153,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (112,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (163,00027) a=0007(c0.memi ) n= 6= 6 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 ++ wreg (122,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (173,00027) a=0007(c0.memi ) n= 3= 3 s=00000000! OK 0: 010210 077102 000000 ++ wreg (132,00017) a=0008(c0.r0 ) d=177556 s=00000000! OK -- wreg (142,00007) a=0009(c0.r1 ) d=000075 s=00000000! OK -- wreg (152,00007) a=000a(c0.r2 ) d=000066 s=00000000! OK -- wreg (162,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (172,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (202,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (212,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (222,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (232,00007) a=0003(c0.psw ) d=000340 s=00000000! OK -- wreg (242,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:00.985926 : ATTN notify apat = 0001 lams = 0 dt=1.318595 ++ attn (165,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.374 OK ++ rreg (300,00037) a=000f(c0.pc ) d=001006! s=00000000! OK ++ rreg (310,00037) a=0009(c0.r1 ) d=000000! s=00000000! OK ++ wreg (252,00017) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (330,00007) a=4fb7(i0.pca.pbuf ) d=137053! s=00000000! OK -- rreg (340,00007) a=4fb7(i0.pca.pbuf ) d=136466! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (350,00027) a=0007(c0.memi ) d=000200! s=00000000! OK ++ wreg (272,00017) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=177556 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000066 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (010,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3.5: partial fifo read, RDY goes 1 -------------- ++ rreg (020,00017) a=4fb7(i0.pca.pbuf ) d=137466! s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (040,00007) a=4fb7(i0.pca.pbuf ) d=137066! s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (050,00027) a=0007(c0.memi ) d=000200! s=00000000! OK # A3.6: full fifo read ----------------------------- ++ rblk (201,00017) a=4fb7(i0.pca.pbuf ) n= 59= 59 s=00000000! OK 0: 136466! 136066! 135466! 135066! 134466! 134066! 133466! 133066! 8: 132466! 132066! 131466! 131066! 130466! 130066! 127466! 127066! 16: 126466! 126066! 125466! 125066! 124466! 124066! 123466! 123066! 24: 122466! 122066! 121466! 121066! 120466! 120066! 117466! 117066! 32: 116466! 116066! 115466! 115066! 114466! 114066! 113466! 113066! 40: 112466! 112066! 111466! 111066! 110466! 110066! 107466! 107066! 48: 106466! 106066! 105466! 105066! 104466! 104066! 103466! 103066! 56: 102466! 102066! 101466! -- rreg (060,00007) a=4fb7(i0.pca.pbuf ) d=101066! s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (100,00007) a=4fb7(i0.pca.pbuf ) d=100466! s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=177554 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (120,00027) a=4fb7(i0.pca.pbuf ) d=000000 s=01000001| OK ++ attn (175,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK # B1: test csr.ie and basic interrupt response -------------- ++ wreg (072,00017) a=0004(c0.al ) d=000074 s=00000000! OK -- wblk (203,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 001072 000340 ++ wreg (102,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (213,00027) a=0007(c0.memi ) n= 37= 37 s=00000000! OK 0: 000237 012737 001072 000074 012737 000100 177554 012737 8: 000300 177776 012737 000240 177776 012737 000200 177776 16: 012737 000140 177776 012737 000100 177776 012737 000040 24: 177776 012737 000000 177776 000000 000000 012737 001110 32: 000074 000230 000001 000776 000000 # B1.1: ie 0->1 interrupt ---------------------------- ++ wreg (112,00037) a=4fb6(i0.pca.pcsr ) d=000000 s=00000000! OK ++ wreg (122,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (132,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (142,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (152,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (162,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (172,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (202,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (212,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (222,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (232,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (242,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:02.850154 : ATTN notify apat = 0001 lams = 0 dt=1.864229 ++ attn (205,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.040 OK ++ rreg (130,00037) a=000f(c0.pc ) d=001074! s=00000000! OK ++ rreg (140,00037) a=000e(c0.sp ) d=000774! s=00000000! OK ++ wreg (252,00017) a=0004(c0.al ) d=000776 s=00000000! OK -- rblk (211,00027) a=0007(c0.memi ) n= 1= 1 s=00000000! OK 0: 000140! # B1.2: err interrupt -------------------------------- ++ wreg (262,00017) a=0001(c0.cntl ) d=000001 s=00010000! OK -- wreg (272,00027) a=4fb6(i0.pca.pcsr ) d=100000 s=00010000! OK -I- 12:00:03.093083 : ATTN notify apat = 0001 lams = 0 dt=0.242930 ++ attn (215,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.015 OK ++ rreg (150,00037) a=000f(c0.pc ) d=001112! s=00000000! OK ++ rreg (160,00037) a=000e(c0.sp ) d=000770! s=00000000! OK ++ wreg (302,00037) a=4fb6(i0.pca.pcsr ) d=000000 s=00000000! OK # B2: test csr.ie and cpu write -> rri read ----------------- ++ wreg (312,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (223,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (322,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (233,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 000062 000000 000066 000000 000072 000000 001020 000340 8: 000102 000000 000106 000000 ++ wreg (332,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (243,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (342,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (253,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (352,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (263,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000202 000000 ++ wreg (362,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (273,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (372,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (303,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (002,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (313,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 000312 000000 000316 000000 ++ wreg (012,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (323,00027) a=0007(c0.memi ) n= 20= 20 s=00000000! OK 0: 000237 012737 000100 177554 005001 000230 000001 000776 8: 110137 177556 005300 001407 105201 142701 000200 105737 16: 177554 100766 000002 000000 ++ wreg (022,00017) a=0008(c0.r0 ) d=000116 s=00000000! OK -- wreg (032,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (042,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (052,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (062,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (072,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (102,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (112,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (122,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (132,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (142,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:04.644461 : ATTN notify apat = 0400 lams = 10 dt=1.551374 -- wtlam apat=0400 to=10.000 T=0.037 OK ++ attn (225,00037) d=002000 s=00010000! OK ++ rblk (221,00037) a=4fb7(i0.pca.pbuf ) n= 15> 10 s=01011001| OK 0: 104000 103401 103002 102403 102404 102005 101406 101007 8: 100410 100411 # rbibr chain ends with fuse=1 after 10 -I- 12:00:04.936551 : ATTN notify apat = 0400 lams = 10 dt=0.292093 -- wtlam apat=0400 to=10.000 T=0.030 OK ++ attn (235,00037) d=002000 s=00010000! OK ++ rblk (231,00037) a=4fb7(i0.pca.pbuf ) n= 8= 8 s=00010000| OK 0: 105412 105013 104414 104415 104016 103417 103020 102421 ++ rblk (241,00037) a=4fb7(i0.pca.pbuf ) n= 11= 11 s=00010000| OK 0: 105022 104423 104024 103425 103026 103027 102430 102031 8: 101432 101033 101034 ++ rblk (251,00037) a=4fb7(i0.pca.pbuf ) n= 10> 7 s=01010001| OK 0: 103035 102436 102037 101440 101041 101042 100443 # rbibr chain ends with fuse=1 after 36 -I- 12:00:05.518392 : ATTN notify apat = 0400 lams = 10 dt=0.581842 -- wtlam apat=0400 to=10.000 T=0.031 OK ++ attn (245,00037) d=002000 s=00010000! OK ++ rblk (261,00037) a=4fb7(i0.pca.pbuf ) n= 6= 6 s=00010000| OK 0: 105044 104445 104446 104047 103450 103051 ++ rblk (271,00037) a=4fb7(i0.pca.pbuf ) n= 10= 10 s=00010000| OK 0: 105052 104453 104054 104055 103456 103057 102460 102061 8: 102062 101463 ++ rblk (301,00037) a=4fb7(i0.pca.pbuf ) n= 10> 8 s=01010001| OK 0: 103464 103065 102466 102067 101470 101471 101072 100473 # rbibr chain ends with fuse=1 after 60 -I- 12:00:06.066056 : ATTN notify apat = 0400 lams = 10 dt=0.547663 -- wtlam apat=0400 to=10.000 T=0.031 OK ++ attn (255,00037) d=002000 s=00010000! OK ++ rblk (311,00037) a=4fb7(i0.pca.pbuf ) n= 7= 7 s=00010000| OK 0: 105074 104475 104476 104077 103500 103101 102502 ++ rblk (321,00037) a=4fb7(i0.pca.pbuf ) n= 10= 10 s=00001000| OK 0: 104503 104104 104105 103506 103107 102510 102111 102112 8: 101513 101114 -I- 12:00:06.424632 : ATTN notify apat = 0001 lams = 0 dt=0.358576 ++ rblk (331,00037) a=4fb7(i0.pca.pbuf ) n= 9> 1 s=01001001| OK 0: 100515 # rbibr chain ends with fuse=1 after 78 -- wtlam apat=0001 to=10.000 T=0.000 OK ++ attn (265,00037) d=000001 s=00000000! OK ++ rreg (170,00037) a=000f(c0.pc ) d=001050! s=00000000! OK ++ attn (275,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK test_pc11_pp.tcl: PASS # test_pc11_pr: test pc11 paper reader resonse ------------------------ ++ rreg (200,00037) a=4fb4(i0.pca.rcsr ) d=103000 s=00000000! OK # A1: test csr response ------------------------------------- # A1.1: csr err -------------------------------------- ++ wreg (152,00017) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (162,00007) a=4fb4(i0.pca.rcsr ) d=000000 s=00000000! OK -- rreg (210,00007) a=4fb4(i0.pca.rcsr ) d=003000! s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (202,00007) a=4fb4(i0.pca.rcsr ) d=100000 s=00000000! OK -- rreg (230,00007) a=4fb4(i0.pca.rcsr ) d=103000! s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=100000! s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=100000! s=00000000! OK -- wreg (252,00007) a=4fb4(i0.pca.rcsr ) d=000000 s=00000000! OK -- rreg (260,00007) a=4fb4(i0.pca.rcsr ) d=003000! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (272,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (300,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A1.2: csr ie --------------------------------------- ++ wreg (312,00017) a=0004(c0.al ) d=177550 s=00000000! OK -- wreg (322,00007) a=0007(c0.memi ) d=000100 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000100! s=00000000! OK -- rreg (320,00007) a=4fb4(i0.pca.rcsr ) d=003100! s=00000000! OK -- wreg (342,00007) a=4fb4(i0.pca.rcsr ) d=000000 s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000100! s=00000000! OK -- rreg (340,00007) a=4fb4(i0.pca.rcsr ) d=003100! s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- wreg (372,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (360,00027) a=4fb4(i0.pca.rcsr ) d=003000! s=00000000! OK # A1.3: csr rlim ----------------------------------- ++ wreg (012,00017) a=4fb4(i0.pca.rcsr ) d=010000 s=00000000! OK -- rreg (370,00007) a=4fb4(i0.pca.rcsr ) d=013000! s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (032,00007) a=4fb4(i0.pca.rcsr ) d=070000 s=00000000! OK -- rreg (010,00007) a=4fb4(i0.pca.rcsr ) d=073000! s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- rreg (020,00007) a=4fb4(i0.pca.rcsr ) d=073000! s=00000000! OK -- wreg (062,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- rreg (030,00007) a=4fb4(i0.pca.rcsr ) d=073000! s=00000000! OK -- wreg (072,00007) a=4fb4(i0.pca.rcsr ) d=000000 s=00000000! OK -- rreg (040,00027) a=4fb4(i0.pca.rcsr ) d=003000! s=00000000! OK # A2: test data response (basic fifo; AWIDTH=6) -------- # A2.1: rem write, loc read ------------------------ ++ rreg (050,00017) a=4fb5(i0.pca.rbuf ) d=000000! s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=004000! s=00000000! OK -- rreg (070,00027) a=4fb5(i0.pca.rbuf ) d=100000! s=00000000! OK ++ attn (305,00037) d=000000! s=00000000! OK ++ wreg (132,00017) a=4fb5(i0.pca.rbuf ) d=000107 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000200 s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=177552 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000107! s=00001000! OK -- wreg (172,00007) a=0004(c0.al ) d=177550 s=00001000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000000! s=00001000! OK -- rreg (140,00007) a=4fb5(i0.pca.rbuf ) d=000000! s=00001000! OK -- wreg (202,00007) a=0004(c0.al ) d=177552 s=00001000! OK -- rreg (150,00027) a=0007(c0.memi ) d=000000! s=00001000! OK -I- 12:00:07.765648 : ATTN notify apat = 0400 lams = 10 dt=1.341016 -- wtlam apat=0400 to=1.000 T=0.015 OK ++ attn (315,00037) d=002000! s=00000000! OK # A2.2: rem write, loc write (discards data) ------- ++ rreg (160,00017) a=4fb5(i0.pca.rbuf ) d=000000! s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=004000! s=00000000! OK -- rreg (200,00027) a=4fb5(i0.pca.rbuf ) d=100000! s=00000000! OK ++ attn (325,00037) d=000000! s=00000000! OK ++ wreg (242,00017) a=4fb5(i0.pca.rbuf ) d=000110 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000200 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=177552 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=000177 s=00001000! OK -- wreg (312,00007) a=0004(c0.al ) d=177550 s=00001000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000000! s=00001000! OK -- rreg (240,00007) a=4fb5(i0.pca.rbuf ) d=000000! s=00001000! OK -- wreg (322,00007) a=0004(c0.al ) d=177552 s=00001000! OK -- rreg (250,00027) a=0007(c0.memi ) d=000000! s=00001000! OK -I- 12:00:08.159165 : ATTN notify apat = 0400 lams = 10 dt=0.393517 -- wtlam apat=0400 to=1.000 T=0.015 OK ++ attn (335,00037) d=002000! s=00000000! OK # A2.3: test fifo csr.fclr clears and breset doesn't ++ wreg (332,00017) a=4fb5(i0.pca.rbuf ) d=000252 s=00000000! OK -- rreg (260,00007) a=4fb5(i0.pca.rbuf ) d=000400! s=00000000! OK -- wreg (342,00007) a=4fb5(i0.pca.rbuf ) d=000125 s=00000000! OK -- rreg (270,00007) a=4fb5(i0.pca.rbuf ) d=001000! s=00000000! OK -- wblk (333,00007) a=4fb5(i0.pca.rbuf ) n= 2= 2 s=00000000! OK 0: 000021 000042 -- rreg (300,00007) a=4fb5(i0.pca.rbuf ) d=002000! s=00000000! OK -- wreg (352,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- rreg (310,00007) a=4fb5(i0.pca.rbuf ) d=002000! s=00000000! OK -- wblk (343,00007) a=4fb5(i0.pca.rbuf ) n= 3= 3 s=00000000! OK 0: 000063 000104 000125 -- rreg (320,00007) a=4fb5(i0.pca.rbuf ) d=003400! s=00000000! OK -- wreg (362,00007) a=4fb4(i0.pca.rcsr ) d=000002 s=00000000! OK -- rreg (330,00027) a=4fb5(i0.pca.rbuf ) d=000000! s=00000000! OK ++ attn (345,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK # A2.4: test fifo clear on csr.err=1 --------------- ++ wblk (353,00017) a=4fb5(i0.pca.rbuf ) n= 2= 2 s=00000000! OK 0: 000146 000167 -- rreg (340,00007) a=4fb5(i0.pca.rbuf ) d=001000! s=00000000! OK -- wreg (372,00007) a=4fb4(i0.pca.rcsr ) d=100000 s=00000000! OK -- rreg (350,00007) a=4fb5(i0.pca.rbuf ) d=000000! s=00000000! OK -- wreg (002,00007) a=4fb5(i0.pca.rbuf ) d=000210 s=00000000! OK -- rreg (360,00007) a=4fb5(i0.pca.rbuf ) d=000000! s=00000000! OK -- wreg (012,00027) a=4fb4(i0.pca.rcsr ) d=000000 s=00000000! OK # A3: test fifo logic ------------------------------------- # A3.1: fill and overfill fifo --------------------- ++ wblk (363,00017) a=4fb5(i0.pca.rbuf ) n= 63= 63 s=00000000! OK 0: 000100 000101 000102 000103 000104 000105 000106 000107 8: 000110 000111 000112 000113 000114 000115 000116 000117 16: 000120 000121 000122 000123 000124 000125 000126 000127 24: 000130 000131 000132 000133 000134 000135 000136 000137 32: 000140 000141 000142 000143 000144 000145 000146 000147 40: 000150 000151 000152 000153 000154 000155 000156 000157 48: 000160 000161 000162 000163 000164 000165 000166 000167 56: 000170 000171 000172 000173 000174 000175 000176 -- rreg (370,00007) a=4fb5(i0.pca.rbuf ) d=037400! s=00000000! OK -- wreg (022,00007) a=4fb5(i0.pca.rbuf ) d=000377 s=01000001| OK -- rreg (000,00007) a=4fb5(i0.pca.rbuf ) d=037400! s=00000000! OK -- wreg (032,00027) a=4fb4(i0.pca.rcsr ) d=000002 s=00000000! OK # A3.2: fill and empty fifo, attn on last read ----- ++ wblk (373,00017) a=4fb5(i0.pca.rbuf ) n= 2= 2 s=00000000! OK 0: 000125 000252 -- rreg (010,00007) a=4fb5(i0.pca.rbuf ) d=001000! s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000200 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=177552 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000125! s=00000000! OK -- rreg (050,00027) a=4fb5(i0.pca.rbuf ) d=000400! s=00000000! OK ++ attn (355,00037) d=000000! s=00000000! OK ++ wreg (112,00017) a=0004(c0.al ) d=177550 s=00000000! OK -- wreg (122,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000200 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=177550 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=177552 s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000252! s=00001000! OK -- rreg (110,00027) a=4fb5(i0.pca.rbuf ) d=000000! s=00001000! OK -I- 12:00:09.611404 : ATTN notify apat = 0400 lams = 10 dt=1.452238 -- wtlam apat=0400 to=1.000 T=0.015 OK ++ attn (365,00037) d=002000! s=00000000! OK # B1: test csr.ie and basic interrupt response -------------- ++ wreg (162,00017) a=0004(c0.al ) d=000070 s=00000000! OK -- wblk (003,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 001106 000340 ++ wreg (172,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (013,00027) a=0007(c0.memi ) n= 45= 45 s=00000000! OK 0: 000237 012737 001106 000070 012737 000100 177550 052737 8: 000001 177550 105737 177550 100375 012737 000300 177776 16: 012737 000240 177776 012737 000200 177776 012737 000140 24: 177776 012737 000100 177776 012737 000040 177776 012737 32: 000000 177776 000000 013705 177552 000000 012737 001130 40: 000070 000230 000001 000776 000000 # B1.1: done 0->1 interrupt -------------------------- ++ wreg (202,00037) a=4fb4(i0.pca.rcsr ) d=000000 s=00000000! OK ++ wreg (212,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (222,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (232,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (242,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (252,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (262,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (272,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (302,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (312,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (322,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (332,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK ++ wreg (342,00037) a=4fb5(i0.pca.rbuf ) d=000111 s=00010000! OK -I- 12:00:10.508862 : ATTN notify apat = 0400 lams = 10 dt=0.897459 ++ attn (375,00037) d=002001 s=00000000! OK -- wtcpu to=10.000 T=0.040 OK ++ rreg (120,00037) a=000f(c0.pc ) d=001114! s=00000000! OK ++ rreg (130,00017) a=000d(c0.r5 ) d=000111! s=00000000! OK -- rreg (140,00027) a=000e(c0.sp ) d=000774! s=00000000! OK ++ wreg (352,00017) a=0004(c0.al ) d=000776 s=00000000! OK -- rblk (341,00027) a=0007(c0.memi ) n= 1= 1 s=00000000! OK 0: 000140! # B1.2: err interrupt -------------------------------- ++ wreg (362,00017) a=0001(c0.cntl ) d=000001 s=00010000! OK -- wreg (372,00027) a=4fb4(i0.pca.rcsr ) d=100000 s=00010000! OK -I- 12:00:10.767204 : ATTN notify apat = 0001 lams = 0 dt=0.258343 ++ attn (005,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.015 OK ++ rreg (150,00037) a=000f(c0.pc ) d=001132! s=00000000! OK ++ rreg (160,00037) a=000e(c0.sp ) d=000770! s=00000000! OK ++ wreg (002,00037) a=4fb4(i0.pca.rcsr ) d=000000 s=00000000! OK # B2: test csr.ie and rri write -> cpu read ----------------- ++ wreg (012,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (023,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (022,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (033,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 000062 000000 000066 000000 001024 000340 000076 000000 8: 000102 000000 000106 000000 ++ wreg (032,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (043,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (042,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (053,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (052,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (063,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000202 000000 ++ wreg (062,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (073,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (072,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (103,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (102,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (113,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 000312 000000 000316 000000 ++ wreg (112,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (123,00027) a=0007(c0.memi ) n= 18= 18 s=00000000! OK 0: 012705 001044 012737 000100 177550 052737 000001 177550 8: 000001 000776 113725 177552 001404 052737 000001 177550 16: 000002 000000 ++ attn (015,00037) d=000000 s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK ++ wreg (122,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (132,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (142,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (152,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (162,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (172,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (202,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (212,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (222,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (232,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (242,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK ++ wblk (133,00037) a=4fb5(i0.pca.rbuf ) n= 8= 8 s=00010000! OK 0: 000007 000006 000005 000004 000003 000002 000001 000000 -I- 12:00:12.520311 : ATTN notify apat = 0400 lams = 10 dt=1.753105 ++ attn (025,00037) d=002001 s=00000000! OK -- wtcpu to=10.000 T=0.145 OK ++ rreg (170,00037) a=000f(c0.pc ) d=001044! s=00000000! OK ++ wreg (252,00017) a=0004(c0.al ) d=001044 s=00000000! OK -- rblk (351,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 003007! 002005! 001003! 000001! test_pc11_pr.tcl: PASS # test_pc11_loop: test pc11 reader+puncher response ------------------- ++ rreg (200,00037) a=4fb4(i0.pca.rcsr ) d=003114 s=00000000! OK # A1: loopback test: copy reader -> puncher (60 bytes)--------- ++ wreg (262,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (143,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (272,00017) a=0004(c0.al ) d=000060 s=00000000! OK -- wblk (153,00027) a=0007(c0.memi ) n= 12= 12 s=00000000! OK 0: 000062 000000 000066 000000 001054 000340 001104 000340 8: 000102 000000 000106 000000 ++ wreg (302,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (163,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000122 000000 ++ wreg (312,00017) a=0004(c0.al ) d=000160 s=00000000! OK -- wblk (173,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000162 000000 ++ wreg (322,00017) a=0004(c0.al ) d=000200 s=00000000! OK -- wblk (203,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 000202 000000 ++ wreg (332,00017) a=0004(c0.al ) d=000220 s=00000000! OK -- wblk (213,00027) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000222 000000 000226 000000 ++ wreg (342,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (223,00027) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 000256 000000 8: 000262 000000 ++ wreg (352,00017) a=0004(c0.al ) d=000300 s=00000000! OK -- wblk (233,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000302 000000 000306 000000 000312 000000 000316 000000 ++ wreg (362,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (243,00027) a=0007(c0.memi ) n= 50= 50 s=00000000! OK 0: 005737 177554 100775 005737 177550 100775 012704 001144 8: 010405 000237 042737 000100 177554 052737 000100 177550 16: 052737 000001 177550 000230 000001 000776 105737 177550 24: 100027 113724 177552 052737 000001 177550 052737 000100 32: 177554 000002 105737 177554 100013 020405 001411 112537 40: 177556 001407 020405 001003 042737 000100 177554 000002 48: 000000 000000 ++ wreg (372,00017) a=4fb4(i0.pca.rcsr ) d=000000 s=00000000! OK -- wreg (002,00027) a=4fb6(i0.pca.pcsr ) d=000000 s=00000000! OK ++ wreg (012,00017) a=0008(c0.r0 ) d=000000 s=00000000! OK -- wreg (022,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (032,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (042,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (052,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (062,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (072,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (102,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (112,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (122,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (132,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK ++ wblk (253,00037) a=4fb5(i0.pca.rbuf ) n= 31= 31 s=00010000! OK 0: 000073 000072 000071 000070 000067 000066 000065 000064 8: 000063 000062 000061 000060 000057 000056 000055 000054 16: 000053 000052 000051 000050 000047 000046 000045 000044 24: 000043 000042 000041 000040 000037 000036 000035 ++ wblk (263,00037) a=4fb5(i0.pca.rbuf ) n= 29= 29 s=00010000! OK 0: 000034 000033 000032 000031 000030 000027 000026 000025 8: 000024 000023 000022 000021 000020 000017 000016 000015 16: 000014 000013 000012 000011 000010 000007 000006 000005 24: 000004 000003 000002 000001 000000 -I- 12:00:16.949734 : ATTN notify apat = 0400 lams = 10 dt=4.429412 ++ attn (035,00037) d=002000 s=00010000! OK -I- 12:00:18.863880 : ATTN notify apat = 0001 lams = 0 dt=1.914156 ++ attn (045,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=3.510 OK ++ rreg (210,00037) a=000f(c0.pc ) d=001144! s=00000000! OK ++ wreg (142,00017) a=4fb4(i0.pca.rcsr ) d=000000 s=00000000! OK -- wreg (152,00007) a=4fb6(i0.pca.pcsr ) d=000000 s=00000000! OK -- rblk (361,00027) a=4fb7(i0.pca.pbuf ) n= 60= 60 s=00000000! OK 0: 136073! 135472! 135071! 134470! 134067! 133466! 133065! 132464! 8: 132063! 131462! 131061! 130460! 130057! 127456! 127055! 126454! 16: 126053! 125452! 125051! 124450! 124047! 123446! 123045! 122444! 24: 122043! 121442! 121041! 120440! 120037! 117436! 117035! 116434! 32: 116033! 115432! 115031! 114430! 114027! 113426! 113025! 112424! 40: 112023! 111422! 111021! 110420! 110017! 107416! 107015! 106414! 48: 106013! 105412! 105011! 104410! 104007! 103406! 103005! 102404! 56: 102003! 101402! 101001! 100400! test_pc11_loop.tcl: PASS @pc11/pc11_all.dat: PASS ## steering file for all rhrp tests # test_rhrp_basics: basic access tests -------------------------------- # setup context ++ wreg (162,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (220,00007) a=0006(c0.mem ) d=000300 s=00000000 OK -- rreg (230,00027) a=4ee4( ) d=000300 s=00000000 OK ++ wreg (172,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (202,00007) a=4eeb(i0.rpa.dt ) d=000000 s=00000000! OK -- wreg (212,00027) a=4ee5(i0.rpa.ds ) d=000000 s=00000000! OK ++ wreg (222,00017) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (232,00007) a=4eeb(i0.rpa.dt ) d=000000 s=00000000! OK -- wreg (242,00027) a=4ee5(i0.rpa.ds ) d=000000 s=00000000! OK ++ wreg (252,00017) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (262,00007) a=4eeb(i0.rpa.dt ) d=000000 s=00000000! OK -- wreg (272,00027) a=4ee5(i0.rpa.ds ) d=000000 s=00000000! OK ++ wreg (302,00017) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- wreg (312,00007) a=4eeb(i0.rpa.dt ) d=000000 s=00000000! OK -- wreg (322,00027) a=4ee5(i0.rpa.ds ) d=000000 s=00000000! OK # A1: test that cs1,cs3 give ack, cs3+2 gives no ack -------- # A1.1: rem read cs1,cs3,cs3+1 ----------------------- ++ rreg (240,00017) a=4ee0(i0.rpa.cs1 ) d=004200 s=00000000! OK -- rreg (250,00007) a=4ef5(i0.rpa.cs3 ) d=000000 s=00000000! OK -- rreg (260,00027) a=4ef6( ) d=000000 s=01000001| OK # A1.2: loc read cs1,cs3,cs3+1 ----------------------- ++ wreg (332,00017) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=004200 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176752 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=176754 s=00000000! OK -- rreg (310,00027) a=0007(c0.memi ) d=000000 s=01000001| OK # A2: test unit enable, dt and cs2.ned ---------------------- # A2.1: disable unit 0 ------------------------------- ++ wreg (362,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (372,00007) a=4ee5(i0.rpa.ds ) d=000000 s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00027) a=0007(c0.memi ) d=000000 s=00000000! OK # A2.2: check dt read and cs2.ned -------------------- ++ wreg (022,00017) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (330,00027) a=0007(c0.memi ) d=010300! s=00000000! OK # A2.3: enable unit 0 as RP06; check cs2.ned, dt ----- ++ wreg (062,00017) a=4ee5(i0.rpa.ds ) d=000400 s=00000000! OK -- wreg (072,00007) a=4eeb(i0.rpa.dt ) d=000001 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=020022! s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (350,00027) a=0007(c0.memi ) d=000300! s=00000000! OK # A3: set drive types, check proper dt response ------------- ++ wreg (142,00017) a=4eeb(i0.rpa.dt ) d=000000 s=00000000! OK -- rreg (360,00007) a=4eeb(i0.rpa.dt ) d=000000! s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (370,00027) a=0007(c0.memi ) d=020020! s=00000000! OK ++ wreg (162,00017) a=4eeb(i0.rpa.dt ) d=000001 s=00000000! OK -- rreg (000,00007) a=4eeb(i0.rpa.dt ) d=000001! s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (010,00027) a=0007(c0.memi ) d=020022! s=00000000! OK ++ wreg (202,00017) a=4eeb(i0.rpa.dt ) d=000004 s=00000000! OK -- rreg (020,00007) a=4eeb(i0.rpa.dt ) d=000004! s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (030,00027) a=0007(c0.memi ) d=020024! s=00000000! OK ++ wreg (222,00017) a=4eeb(i0.rpa.dt ) d=000005 s=00000000! OK -- rreg (040,00007) a=4eeb(i0.rpa.dt ) d=000005! s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (050,00027) a=0007(c0.memi ) d=020026! s=00000000! OK ++ wreg (242,00017) a=4eeb(i0.rpa.dt ) d=000006 s=00000000! OK -- rreg (060,00007) a=4eeb(i0.rpa.dt ) d=000006! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (070,00027) a=0007(c0.memi ) d=020027! s=00000000! OK ++ wreg (262,00017) a=4eeb(i0.rpa.dt ) d=000007 s=00000000! OK -- rreg (100,00007) a=4eeb(i0.rpa.dt ) d=000007! s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (110,00027) a=0007(c0.memi ) d=020042! s=00000000! OK # A4: check unit selection and that units are distinct ------ # A4.1: setup units: 0: RP04 1:off 2:RP06 3:off ------ ++ wreg (302,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (312,00007) a=4ee5(i0.rpa.ds ) d=000400 s=00000000! OK -- wreg (322,00027) a=4eeb(i0.rpa.dt ) d=000000 s=00000000! OK ++ wreg (332,00017) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (342,00007) a=4ee5(i0.rpa.ds ) d=000000 s=00000000! OK -- wreg (352,00027) a=4eeb(i0.rpa.dt ) d=000000 s=00000000! OK ++ wreg (362,00017) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (372,00007) a=4ee5(i0.rpa.ds ) d=000400 s=00000000! OK -- wreg (002,00027) a=4eeb(i0.rpa.dt ) d=000001 s=00000000! OK ++ wreg (012,00017) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- wreg (022,00007) a=4ee5(i0.rpa.ds ) d=000000 s=00000000! OK -- wreg (032,00027) a=4eeb(i0.rpa.dt ) d=000000 s=00000000! OK # A4.2: readback dt rem and loc; check cs2.ned ------- ++ wreg (042,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- rreg (120,00007) a=4ee5(i0.rpa.ds ) d=000400! s=00000000! OK -- rreg (130,00007) a=4eeb(i0.rpa.dt ) d=000000! s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (062,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (102,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=020020! s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (150,00027) a=0007(c0.memi ) d=000300! s=00000000! OK ++ wreg (132,00017) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- rreg (160,00007) a=4ee5(i0.rpa.ds ) d=000000! s=00000000! OK -- rreg (170,00007) a=4eeb(i0.rpa.dt ) d=000000! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (172,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (210,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (222,00017) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- rreg (220,00007) a=4ee5(i0.rpa.ds ) d=000400! s=00000000! OK -- rreg (230,00007) a=4eeb(i0.rpa.dt ) d=000001! s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (242,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (262,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=020022! s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (250,00027) a=0007(c0.memi ) d=000302! s=00000000! OK ++ wreg (312,00017) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- rreg (260,00007) a=4ee5(i0.rpa.ds ) d=000000! s=00000000! OK -- rreg (270,00007) a=4eeb(i0.rpa.dt ) d=000000! s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=000003 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (310,00027) a=0007(c0.memi ) d=010303! s=00000000! OK # A5: check cs2.ned for all regs on disabled unit ----------- ++ wreg (002,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=004200 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (330,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176702 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (350,00027) a=0007(c0.memi ) d=000301! s=00000000! OK ++ wreg (202,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (252,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (370,00027) a=0007(c0.memi ) d=000301! s=00000000! OK ++ wreg (302,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (010,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (002,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000301 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (030,00027) a=0007(c0.memi ) d=000301! s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176712 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (050,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (202,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (252,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (070,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (302,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176716 s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (110,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (002,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176720 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (130,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176722 s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (150,00027) a=0007(c0.memi ) d=000301! s=00000000! OK ++ wreg (202,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (252,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176724 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (170,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (302,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (210,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (002,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176730 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (230,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176732 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (250,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (202,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (252,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (270,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (302,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176736 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (310,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (002,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176740 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (330,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176742 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (350,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (202,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (252,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (370,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (302,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176746 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (010,00027) a=0007(c0.memi ) d=010301! s=00000000! OK ++ wreg (002,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (030,00027) a=0007(c0.memi ) d=000301! s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176752 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (050,00027) a=0007(c0.memi ) d=000301! s=00000000! OK # A6: check cs2.ned for all regs on enable unit ------------- ++ wreg (202,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=004200 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176702 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (110,00027) a=0007(c0.memi ) d=000000 s=00000000! OK ++ wreg (302,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000300 s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=176712 s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000400 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=176716 s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176720 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000200 s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=176722 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176724 s=00000000! OK -- rreg (200,00027) a=0007(c0.memi ) d=000000 s=00000000! OK ++ wreg (372,00017) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=020020 s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=176730 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=010007 s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=176732 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=176736 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176740 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=176742 s=00000000! OK -- rreg (270,00027) a=0007(c0.memi ) d=000000 s=00000000! OK ++ wreg (062,00017) a=0004(c0.al ) d=176744 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176746 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=176752 s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (340,00027) a=0007(c0.memi ) d=000300! s=00000000! OK # A7: check that unit 3-7 are loc selectable, but off ------- # A7.1: loc read dt for unit 3-7 ; check cs2.unit+ned ++ wreg (132,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (142,00007) a=0007(c0.memi ) d=000004 s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (162,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (360,00027) a=0007(c0.memi ) d=010304! s=00000000! OK ++ wreg (212,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=000005 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (242,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (000,00027) a=0007(c0.memi ) d=010305! s=00000000! OK ++ wreg (272,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=000006 s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (322,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (020,00027) a=0007(c0.memi ) d=010306! s=00000000! OK ++ wreg (352,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=000007 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (002,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=176726 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (040,00027) a=0007(c0.memi ) d=010307! s=00000000! OK test_rhrp_basics.tcl: PASS # test_rhrp_regs: test register response ------------------------------ # setup context; unit 0:RP06, 1:RM05, 2: RP07, 3: off ++ wreg (032,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (042,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (052,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (062,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (072,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (102,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (112,00007) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- wreg (122,00027) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK ++ wreg (132,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (142,00007) a=4ee5(i0.rpa.ds ) d=000400 s=00000000! OK -- wreg (152,00007) a=4eeb(i0.rpa.dt ) d=000001 s=00000000! OK -- wreg (162,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (172,00007) a=4ee5(i0.rpa.ds ) d=000400 s=00000000! OK -- wreg (202,00007) a=4eeb(i0.rpa.dt ) d=000006 s=00000000! OK -- wreg (212,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (222,00007) a=4ee5(i0.rpa.ds ) d=000400 s=00000000! OK -- wreg (232,00007) a=4eeb(i0.rpa.dt ) d=000007 s=00000000! OK -- wreg (242,00007) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- wreg (252,00027) a=4ee5(i0.rpa.ds ) d=000000 s=00000000! OK ++ wreg (262,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (312,00027) a=0007(c0.memi ) d=040000 s=00000000! OK # A1: test ba,bae and cs1.bae ------------------------------- # A1.1: loc write ba, read loc and rem --------------- ++ wreg (322,00017) a=0004(c0.al ) d=176704 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=177777 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=177776! s=00000000! OK -- rreg (060,00007) a=4ee2(i0.rpa.ba ) d=177776! s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (100,00027) a=4ee2(i0.rpa.ba ) d=000000! s=00000000! OK # A1.2: rem write ba, read loc and rem --------------- ++ wreg (002,00017) a=4ee2(i0.rpa.ba ) d=011357 s=00000000! OK -- rreg (110,00007) a=4ee2(i0.rpa.ba ) d=011356! s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=011356! s=00000000! OK -- wreg (022,00007) a=4ee2(i0.rpa.ba ) d=000000 s=00000000! OK -- rreg (130,00007) a=4ee2(i0.rpa.ba ) d=000000! s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (140,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A1.3: loc write bae, read l+r bae+cs1.bae ---------- ++ wreg (042,00017) a=0004(c0.al ) d=176750 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000077 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=000077! s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=005600! s=00000000! OK -- rreg (170,00007) a=4ef4(i0.rpa.bae ) d=000077! s=00000000! OK -- rreg (200,00027) a=4ee0(i0.rpa.cs1 ) d=005600! s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=176750 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000071 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000071! s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=004600! s=00000000! OK -- rreg (230,00007) a=4ef4(i0.rpa.bae ) d=000071! s=00000000! OK -- rreg (240,00027) a=4ee0(i0.rpa.cs1 ) d=004600! s=00000000! OK ++ wreg (142,00017) a=0004(c0.al ) d=176750 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=004200! s=00000000! OK -- rreg (270,00007) a=4ef4(i0.rpa.bae ) d=000000! s=00000000! OK -- rreg (300,00027) a=4ee0(i0.rpa.cs1 ) d=004200! s=00000000! OK # A1.4: rem write bae, read l+r bae+cs1.bae ---------- ++ wreg (202,00017) a=4ef4(i0.rpa.bae ) d=000077 s=00000000! OK -- rreg (310,00007) a=4ef4(i0.rpa.bae ) d=000077! s=00000000! OK -- rreg (320,00007) a=4ee0(i0.rpa.cs1 ) d=005600! s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000077! s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (340,00027) a=0007(c0.memi ) d=005600! s=00000000! OK ++ wreg (232,00017) a=4ef4(i0.rpa.bae ) d=000071 s=00000000! OK -- rreg (350,00007) a=4ef4(i0.rpa.bae ) d=000071! s=00000000! OK -- rreg (360,00007) a=4ee0(i0.rpa.cs1 ) d=004600! s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000071! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (000,00027) a=0007(c0.memi ) d=004600! s=00000000! OK ++ wreg (262,00017) a=4ef4(i0.rpa.bae ) d=000000 s=00000000! OK -- rreg (010,00007) a=4ef4(i0.rpa.bae ) d=000000! s=00000000! OK -- rreg (020,00007) a=4ee0(i0.rpa.cs1 ) d=004200! s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (040,00027) a=0007(c0.memi ) d=004200! s=00000000! OK # A1.5: loc write cs1.bae, read l+r bae+cs1.bae ------ ++ wreg (312,00037) a=4ef4(i0.rpa.bae ) d=000070 s=00000000! OK ++ wreg (322,00017) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=001400 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=000073! s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=005600! s=00000000! OK -- rreg (070,00007) a=4ef4(i0.rpa.bae ) d=000073! s=00000000! OK -- rreg (100,00027) a=4ee0(i0.rpa.cs1 ) d=005600! s=00000000! OK ++ wreg (362,00017) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (372,00007) a=0007(c0.memi ) d=000400 s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000071! s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=004600! s=00000000! OK -- rreg (130,00007) a=4ef4(i0.rpa.bae ) d=000071! s=00000000! OK -- rreg (140,00027) a=4ee0(i0.rpa.cs1 ) d=004600! s=00000000! OK ++ wreg (022,00017) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=000070! s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=004200! s=00000000! OK -- rreg (170,00007) a=4ef4(i0.rpa.bae ) d=000070! s=00000000! OK -- rreg (200,00027) a=4ee0(i0.rpa.cs1 ) d=004200! s=00000000! OK # A1.6: loc write cs1.func, read loc, ensure distinct ++ wreg (062,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000052 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (172,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (212,00027) a=0007(c0.memi ) d=000076 s=00000000! OK ++ wreg (222,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=004202! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (262,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=004252! s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (230,00027) a=0007(c0.memi ) d=004276! s=00000000! OK # A2: test wc; ensure wc,ba distinct ------------------------ # A2.1: loc write wc,ba, read loc and rem ------------ ++ wreg (332,00017) a=0004(c0.al ) d=176702 s=00000000! OK -- wreg (342,00007) a=0007(c0.memi ) d=157255 s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=011064 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176702 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=157255! s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=011064! s=00000000! OK -- rreg (260,00007) a=4ee1(i0.rpa.wc ) d=157255! s=00000000! OK -- rreg (270,00027) a=4ee2(i0.rpa.ba ) d=011064! s=00000000! OK ++ wreg (012,00017) a=0004(c0.al ) d=176702 s=00000000! OK -- wreg (022,00007) a=0007(c0.memi ) d=137257 s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- wreg (042,00007) a=0007(c0.memi ) d=053170 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=176702 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=137257! s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=053170! s=00000000! OK -- rreg (320,00007) a=4ee1(i0.rpa.wc ) d=137257! s=00000000! OK -- rreg (330,00027) a=4ee2(i0.rpa.ba ) d=053170! s=00000000! OK # A2.2: rem write wc,ba, read loc and rem ------------ ++ wreg (072,00017) a=4ee1(i0.rpa.wc ) d=041441 s=00000000! OK -- wreg (102,00007) a=4ee2(i0.rpa.ba ) d=032126 s=00000000! OK -- rreg (340,00007) a=4ee1(i0.rpa.wc ) d=041441! s=00000000! OK -- rreg (350,00007) a=4ee2(i0.rpa.ba ) d=032126! s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=176702 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=041441! s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (370,00027) a=0007(c0.memi ) d=032126! s=00000000! OK ++ wreg (132,00017) a=4ee1(i0.rpa.wc ) d=052062 s=00000000! OK -- wreg (142,00007) a=4ee2(i0.rpa.ba ) d=011064 s=00000000! OK -- rreg (000,00007) a=4ee1(i0.rpa.wc ) d=052062! s=00000000! OK -- rreg (010,00007) a=4ee2(i0.rpa.ba ) d=011064! s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=176702 s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=052062! s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (030,00027) a=0007(c0.memi ) d=011064! s=00000000! OK # A3: test db; check cs2.or,ir; ensure ba,dt distinct -- ++ wreg (172,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=176722 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=157255 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- wreg (242,00007) a=0007(c0.memi ) d=011064 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176722 s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=157255! s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (060,00027) a=0007(c0.memi ) d=011064! s=00000000! OK ++ wreg (302,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176722 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=137257 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=053170 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176722 s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=137257! s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (110,00027) a=0007(c0.memi ) d=053170! s=00000000! OK # B1: test da,dc; ensure unit distinct; check cc ------------ # B1.1: loc setup ------------------------------------ ++ wreg (012,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (022,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (042,00007) a=0007(c0.memi ) d=003406 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- wreg (062,00027) a=0007(c0.memi ) d=000123 s=00000000! OK ++ wreg (072,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (102,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (122,00007) a=0007(c0.memi ) d=005431 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- wreg (142,00027) a=0007(c0.memi ) d=000345 s=00000000! OK ++ wreg (152,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (162,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=017477 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- wreg (222,00027) a=0007(c0.memi ) d=001777 s=00000000! OK # B1.2: loc+rem readback ----------------------------- ++ wreg (232,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (242,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=003406! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000123! s=00000000! OK -- wreg (272,00007) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- rreg (140,00007) a=4ee3(i0.rpa.da ) d=003406! s=00000000! OK -- rreg (150,00027) a=4eee(i0.rpa.dc ) d=000123! s=00000000! OK ++ wreg (302,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=005431! s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000345! s=00000000! OK -- wreg (342,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- rreg (200,00007) a=4ee3(i0.rpa.da ) d=005431! s=00000000! OK -- rreg (210,00027) a=4eee(i0.rpa.dc ) d=000345! s=00000000! OK ++ wreg (352,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=017477! s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=001777! s=00000000! OK -- wreg (012,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- rreg (240,00007) a=4ee3(i0.rpa.da ) d=017477! s=00000000! OK -- rreg (250,00027) a=4eee(i0.rpa.dc ) d=001777! s=00000000! OK # B1.3: check cc for unit 0 (RP06) ------------------- ++ wreg (022,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176736 s=00000000! OK -- rreg (260,00027) a=0007(c0.memi ) d=000123! s=00000000! OK # B1.4: rem setup ------------------------------------ ++ wreg (052,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (062,00007) a=4ee3(i0.rpa.da ) d=002404 s=00000000! OK -- wreg (072,00027) a=4eee(i0.rpa.dc ) d=000234 s=00000000! OK ++ wreg (102,00017) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (112,00007) a=4ee3(i0.rpa.da ) d=010077 s=00000000! OK -- wreg (122,00027) a=4eee(i0.rpa.dc ) d=000456 s=00000000! OK ++ wreg (132,00017) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (142,00007) a=4ee3(i0.rpa.da ) d=015023 s=00000000! OK -- wreg (152,00027) a=4eee(i0.rpa.dc ) d=001070 s=00000000! OK # B1.5: loc+rem readback ----------------------------- ++ wreg (162,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (172,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=002404! s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000234! s=00000000! OK -- wreg (222,00007) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- rreg (310,00007) a=4ee3(i0.rpa.da ) d=002404! s=00000000! OK -- rreg (320,00027) a=4eee(i0.rpa.dc ) d=000234! s=00000000! OK ++ wreg (232,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (242,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=010077! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000456! s=00000000! OK -- wreg (272,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- rreg (350,00007) a=4ee3(i0.rpa.da ) d=010077! s=00000000! OK -- rreg (360,00027) a=4eee(i0.rpa.dc ) d=000456! s=00000000! OK ++ wreg (302,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=015023! s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=001070! s=00000000! OK -- wreg (342,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- rreg (010,00007) a=4ee3(i0.rpa.da ) d=015023! s=00000000! OK -- rreg (020,00027) a=4eee(i0.rpa.dc ) d=001070! s=00000000! OK # B1.6: check cc for unit 0 (RP06) ------------------- ++ wreg (352,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176736 s=00000000! OK -- rreg (030,00027) a=0007(c0.memi ) d=000234! s=00000000! OK # C1: test of,mr1,mr2(for RM typ); test NI regs: er2,er3,ec1,ec2 # C1.1: loc write da,mr1,of,dc (mr2 for RM) ---------- ++ wreg (002,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=004022 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176724 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=073400 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176732 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=010377 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- wreg (112,00027) a=0007(c0.memi ) d=000100 s=00000000! OK ++ wreg (122,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=004421 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176724 s=00000000! OK -- wreg (172,00007) a=0007(c0.memi ) d=073401 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=176732 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=004000 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000101 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176740 s=00000000! OK -- wreg (252,00027) a=0007(c0.memi ) d=063001 s=00000000! OK ++ wreg (262,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=005020 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176724 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=073402 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176732 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=002000 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- wreg (372,00007) a=0007(c0.memi ) d=000102 s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=176740 s=00000000! OK -- wreg (012,00027) a=0007(c0.memi ) d=063002 s=00000000! OK # C1.2: loc read da,mr1,of,dc (mr2 for RM) ----------- ++ wreg (022,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=004022! s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=176724 s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=073400! s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176732 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=010377! s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (070,00027) a=0007(c0.memi ) d=000100! s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=004421! s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=176724 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=073401! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176732 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=004000! s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000101! s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176740 s=00000000! OK -- rreg (140,00027) a=0007(c0.memi ) d=063001! s=00000000! OK ++ wreg (172,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=005020! s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176724 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=073402! s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=176732 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=002000! s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=000102! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176740 s=00000000! OK -- rreg (210,00027) a=0007(c0.memi ) d=063002! s=00000000! OK # C2.1: loc write er2,er3,ec1,ec2 -------------------- ++ wreg (262,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=176740 s=00000000! OK -- wreg (312,00007) a=0007(c0.memi ) d=125000 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176742 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=125020 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=125040 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- wreg (372,00027) a=0007(c0.memi ) d=125060 s=00000000! OK ++ wreg (002,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176742 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=125021 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=125041 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- wreg (072,00027) a=0007(c0.memi ) d=125061 s=00000000! OK ++ wreg (102,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176742 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=125022 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=125042 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- wreg (172,00027) a=0007(c0.memi ) d=125062 s=00000000! OK # C2.1: loc read er2,er3,ec1,ec2 (NI -> =0!) --------- ++ wreg (202,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176740 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=176742 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- rreg (250,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ wreg (262,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=176742 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- rreg (300,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ wreg (332,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (342,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=176742 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176744 s=00000000! OK -- rreg (330,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # D1: test hr (for RM typ); ensure unit distinct ------------ # D1.1: write da(1) and dc(2) ------------------------ ++ wreg (002,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=002423 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (072,00027) a=0007(c0.memi ) d=000456 s=00000000! OK # D1.2: check hr(1) and hr(2) ------------------------ ++ wreg (102,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176736 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=175354! s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (142,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=176736 s=00000000! OK -- rreg (350,00027) a=0007(c0.memi ) d=177321! s=00000000! OK # D1.3: write da(2) and dc(1) ------------------------ ++ wreg (162,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (172,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (212,00007) a=0007(c0.memi ) d=002423 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (252,00027) a=0007(c0.memi ) d=000456 s=00000000! OK # D1.4: check hr(1) and hr(2) ------------------------ ++ wreg (262,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=176736 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=177321! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (322,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=176736 s=00000000! OK -- rreg (370,00027) a=0007(c0.memi ) d=175354! s=00000000! OK # E1: test rem er1 write; clear via func=dclr --------------- # E1.1: rem er1 set uns,iae,aoe,ilf; loc readback ---- ++ wreg (342,00017) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (362,00027) a=0007(c0.memi ) d=000001 s=00000000! OK ++ wreg (372,00017) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (002,00007) a=4ee6(i0.rpa.er1 ) d=040000 s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=040000! s=00000000! OK -- wreg (022,00007) a=4ee6(i0.rpa.er1 ) d=002000 s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=042000! s=00000000! OK -- wreg (042,00007) a=4ee6(i0.rpa.er1 ) d=001000 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=043000! s=00000000! OK -- wreg (062,00007) a=4ee6(i0.rpa.er1 ) d=000001 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (040,00027) a=0007(c0.memi ) d=043001! s=00000000! OK # E1.2: clear er1 via func=dclr ---------------------- ++ wreg (102,00017) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000011 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (050,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # E1.3: rem er1 set in different units --------------- ++ wreg (132,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (142,00007) a=4ee6(i0.rpa.er1 ) d=002000 s=00000000! OK -- wreg (152,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (162,00007) a=4ee6(i0.rpa.er1 ) d=001000 s=00000000! OK -- wreg (172,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (202,00027) a=4ee6(i0.rpa.er1 ) d=000001 s=00000000! OK # E1.4: loc readback, show er1 is distinct ----------- ++ wreg (212,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=002000! s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (252,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=001000! s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (100,00027) a=0007(c0.memi ) d=000001! s=00000000! OK # E1.5: show func=dclr distinct ---------------------- ++ wreg (322,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000011 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (372,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=002000! s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (022,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (130,00027) a=0007(c0.memi ) d=000001! s=00000000! OK # E1.6: clear er1 in remaining units ----------------- ++ wreg (072,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (102,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (122,00007) a=0007(c0.memi ) d=000011 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (172,00007) a=0007(c0.memi ) d=000011 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (150,00027) a=0007(c0.memi ) d=000000! s=00000000! OK test_rhrp_regs.tcl: PASS # test_rhrp_func_reg: test functions - register level ----------------- # setup: unit 0:RP06(mol), 1:RM05(mol,wrl), 2: RP07(mol=0), 3: off ++ wreg (212,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (222,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (232,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (242,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (252,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (262,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (272,00007) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- wreg (302,00027) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK ++ wreg (312,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (322,00007) a=4ee5(i0.rpa.ds ) d=010400 s=00000000! OK -- wreg (332,00007) a=4eeb(i0.rpa.dt ) d=000001 s=00000000! OK -- wreg (342,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (352,00007) a=4ee5(i0.rpa.ds ) d=014400 s=00000000! OK -- wreg (362,00007) a=4eeb(i0.rpa.dt ) d=000006 s=00000000! OK -- wreg (372,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (002,00007) a=4ee5(i0.rpa.ds ) d=000400 s=00000000! OK -- wreg (012,00007) a=4eeb(i0.rpa.dt ) d=000007 s=00000000! OK -- wreg (022,00007) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- wreg (032,00027) a=4ee5(i0.rpa.ds ) d=000000 s=00000000! OK ++ wreg (042,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000011 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176716 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000017 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176712 s=00000000! OK -- rreg (160,00027) a=0007(c0.memi ) d=010600! s=00000000! OK # A -- function basics ---------------------------------------------- # A1: test cs1 func basics ---------------------------------- # A1.1a: func noop; check no as ---------------------- ++ wreg (152,00017) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (162,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=176716 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=176712 s=00000000! OK -- rreg (200,00027) a=0007(c0.memi ) d=010600! s=00000000! OK # A2.1a: test invalid function (037) ----------------- ++ wreg (212,00017) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (222,00027) a=0007(c0.memi ) d=000077 s=00000000! OK # A2.1b: check as,er1.ilf,ds.ata; clear as; recheck -- ++ wreg (232,00017) a=0004(c0.al ) d=176716 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176712 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=150600! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=176716 s=00000000! OK -- wreg (272,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=176716 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=176712 s=00000000! OK -- rreg (250,00027) a=0007(c0.memi ) d=050600! s=00000000! OK # A2.2a: func dclr; check no as and er1 clear -------- ++ wreg (322,00017) a=0004(c0.al ) d=176716 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=000017 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000011 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176716 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=176714 s=00000000! OK -- rreg (270,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # B -- state functions ---------------------------------------------- # C -- seek functions ----------------------------------------------- # D -- transfer functions ------------------------------------------- # D1: test func read sequence ------------------------------- # D1.1: issue func with ie=0 --------------------------- -- wtlam apat=0000 to=0 harvest only OK ++ attn (055,00037) d=000000 s=00000000! OK ++ wreg (002,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=010000 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176750 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=176702 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=177400 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=001001 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=176734 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000003 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (172,00027) a=0007(c0.memi ) d=000071 s=00001000! OK # D1.2: loc status check: cs1.rdy=0, ds.dry=0 ---------- -I- 12:00:37.975229 : ATTN notify apat = 0040 lams = 6 dt=19.111351 ++ wreg (202,00017) a=0004(c0.al ) d=176700 s=00001000! OK -- rreg (300,00007) a=0007(c0.memi ) d=004070! s=00001000! OK -- wreg (212,00007) a=0004(c0.al ) d=176712 s=00001000! OK -- rreg (310,00027) a=0007(c0.memi ) d=010400! s=00001000! OK # D1.3: rem status check: attn + state ----------------- ++ attn (065,00037) d=000100! s=00000000! OK ++ wreg (222,00017) a=4ee0(i0.rpa.cs1 ) d=000005 s=00000000! OK -- rreg (320,00007) a=4ee0(i0.rpa.cs1 ) d=004070! s=00000000! OK -- rreg (330,00007) a=4ee2(i0.rpa.ba ) d=010000! s=00000000! OK -- rreg (340,00007) a=4ef4(i0.rpa.bae ) d=000000! s=00000000! OK -- rreg (350,00007) a=4ee1(i0.rpa.wc ) d=177400! s=00000000! OK -- rreg (360,00007) a=4ee3(i0.rpa.da ) d=001001! s=00000000! OK -- rreg (370,00007) a=4eee(i0.rpa.dc ) d=000003! s=00000000! OK -- rreg (000,00027) a=4ee5(i0.rpa.ds ) d=010400! s=00000000! OK # D1.4: rem send response ------------------------------ ++ wreg (232,00017) a=4ee2(i0.rpa.ba ) d=000400 s=00000000! OK -- wreg (242,00007) a=4ee1(i0.rpa.wc ) d=000000 s=00000000! OK -- wreg (252,00007) a=4ee3(i0.rpa.da ) d=001002 s=00000000! OK -- wreg (262,00027) a=4ee0(i0.rpa.cs1 ) d=000007 s=00000000! OK # D1.5: loc check: cs1.rdy=1, ds.dry=1 ----------------- ++ wreg (272,00017) a=0004(c0.al ) d=176700 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=004270! s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=176704 s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000400! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=176702 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=176706 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=001002! s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=176712 s=00000000! OK -- rreg (050,00027) a=0007(c0.memi ) d=010600! s=00000000! OK test_rhrp_func_reg.tcl: PASS # test_rhrp_int: test interrupt response ------------------------------ # setup: unit 0:RP06(mol), 1:RM05(mol,wrl), 2: RP07(mol=0), 3: off ++ wreg (342,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (352,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (362,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (372,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (002,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (012,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (022,00007) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- wreg (032,00027) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK ++ wreg (042,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (052,00007) a=4ee5(i0.rpa.ds ) d=010400 s=00000000! OK -- wreg (062,00007) a=4eeb(i0.rpa.dt ) d=000001 s=00000000! OK -- wreg (072,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (102,00007) a=4ee5(i0.rpa.ds ) d=014400 s=00000000! OK -- wreg (112,00007) a=4eeb(i0.rpa.dt ) d=000006 s=00000000! OK -- wreg (122,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (132,00007) a=4ee5(i0.rpa.ds ) d=000400 s=00000000! OK -- wreg (142,00007) a=4eeb(i0.rpa.dt ) d=000007 s=00000000! OK -- wreg (152,00007) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- wreg (162,00027) a=4ee5(i0.rpa.ds ) d=000000 s=00000000! OK ++ wreg (172,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (242,00007) a=0007(c0.memi ) d=000011 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176716 s=00000000! OK -- wreg (262,00007) a=0007(c0.memi ) d=000017 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176712 s=00000000! OK -- rreg (060,00027) a=0007(c0.memi ) d=010600! s=00000000! OK ++ wreg (302,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (273,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (312,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (303,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 002320 000340 ++ wreg (322,00017) a=0004(c0.al ) d=001010 s=00000000! OK -- wblk (313,00027) a=0007(c0.memi ) n= 3= 3 s=00000000! OK 0: 000000 000000 000000 ++ wreg (332,00017) a=0004(c0.al ) d=002000 s=00000000! OK -- wblk (323,00027) a=0007(c0.memi ) n= 126= 126 s=00000000! OK 0: 000237 005067 177004 005067 177002 012700 001016 005020 8: 005020 005020 005020 005020 005020 005005 012700 001000 16: 012037 176710 012037 176706 012037 176734 012037 176700 24: 000230 005205 005205 005205 005205 005205 005205 005205 32: 005205 005205 005205 005267 176702 105737 176700 100373 40: 005767 176666 001014 012700 001016 013720 176700 013720 48: 176710 013720 176714 013720 176712 013720 176716 005767 56: 176626 001005 012737 000377 176716 005067 176612 032737 64: 040000 176712 001403 012737 000011 176700 032737 040000 72: 176700 001403 012737 040000 176700 012700 001032 013720 80: 176700 013720 176710 013720 176714 013720 176712 013720 88: 176716 000000 005067 176524 012700 001016 005020 005020 96: 005020 005020 005020 005020 012737 000100 176700 000673 104: 012700 001016 013720 176700 013720 176710 013720 176714 112: 013720 176712 013701 176716 010120 010520 005767 176432 120: 001402 010137 176716 005267 176420 000002 -- wtlam apat=0040 to=0 harvest only OK ++ attn (075,00037) d=000000 s=00000000! OK # A -- function basics ---------------------------------------------- # A1: test rdy and ie logic --------------------------------- # A1.1 set cs1.ie=1 alone -> no interrupt ------------ ++ wreg (342,00017) a=4ee0(i0.rpa.cs1 ) d=000010 s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (333,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000000 000000 000100 000000 -- wreg (362,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (372,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (002,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (012,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (022,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:40.839834 : ATTN notify apat = 0001 lams = 0 dt=2.864603 ++ attn (105,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.182 OK ++ rreg (070,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (100,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=004300! s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=010600! s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=004300! s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=010600! s=00000000! OK -- rreg (250,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A1.2 set cs1.ie=1 with rdy=1 -> software interrupt - ++ wreg (042,00017) a=4ee0(i0.rpa.cs1 ) d=000010 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (343,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000000 000000 000300 000000 -- wreg (062,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (072,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (102,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (112,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (122,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:41.523235 : ATTN notify apat = 0001 lams = 0 dt=0.683401 ++ attn (115,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.214 OK ++ rreg (260,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (270,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=004200! s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=010600! s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=004200! s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=010600! s=00000000! OK -- rreg (040,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A2: test state functions: iff no, as yes ------------------ # A2.1 noop function --------------------------------- ++ wreg (142,00017) a=4ee0(i0.rpa.cs1 ) d=000010 s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (353,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000000 000000 000101 000000 -- wreg (162,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (172,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (202,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (212,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (222,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:42.209530 : ATTN notify apat = 0001 lams = 0 dt=0.686295 ++ attn (125,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.192 OK ++ rreg (050,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (060,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=004300! s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=010600! s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=004300! s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=010600! s=00000000! OK -- rreg (230,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A2.2 pack acknowledge function (sets ds.vv=1) ------ ++ wreg (242,00017) a=4ee0(i0.rpa.cs1 ) d=000010 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (363,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000000 000000 000123 000000 -- wreg (262,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (272,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (302,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (312,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (322,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:42.851949 : ATTN notify apat = 0001 lams = 0 dt=0.642419 ++ attn (135,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.176 OK ++ rreg (240,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (250,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=004322! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=004322! s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (020,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3: test seek type functions: iff no, as yes -------------- # A3.1 seek function, ie=0, valid da,dc--------------- ++ wreg (342,00017) a=4ee0(i0.rpa.cs1 ) d=000010 s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (373,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000000 000000 000005 000000 -- wreg (362,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (372,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (002,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (012,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (022,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:43.556279 : ATTN notify apat = 0001 lams = 0 dt=0.704331 ++ attn (145,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.189 OK ++ rreg (030,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (040,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=104204! s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=004204! s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (210,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3.2 seek function, valid da,dc, idly=0 ------------ ++ wreg (042,00017) a=4ee0(i0.rpa.cs1 ) d=000010 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (003,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000000 001456 000105 000001 -- wreg (062,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (072,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (102,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (112,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (122,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:44.239166 : ATTN notify apat = 0001 lams = 0 dt=0.682886 ++ attn (155,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.205 OK ++ rreg (220,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (230,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=104204! s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=104204! s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (000,00027) a=0007(c0.memi ) d=000001! s=00000000! OK ++ wreg (142,00037) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:44.745887 : ATTN notify apat = 0001 lams = 0 dt=0.506721 ++ attn (165,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.168 OK ++ rreg (010,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (020,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000002! s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=104200! s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000012 s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=004200! s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (170,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3.3 seek function, invalid dc --------------------- ++ wreg (162,00017) a=4ee0(i0.rpa.cs1 ) d=000010 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (013,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000000 001457 000105 000000 -- wreg (202,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (212,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (222,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (232,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (242,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:45.428610 : ATTN notify apat = 0001 lams = 0 dt=0.682720 ++ attn (175,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.211 OK ++ rreg (200,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (210,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=104204! s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=002000! s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=150700! s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=004210! s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (360,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3.4 search function, valid da,dc, idly=0 ---------- ++ wreg (262,00017) a=4ee0(i0.rpa.cs1 ) d=000010 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (023,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000025 000000 000131 000000 -- wreg (302,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (312,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (322,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (332,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (342,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:46.116377 : ATTN notify apat = 0001 lams = 0 dt=0.687768 ++ attn (205,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.211 OK ++ rreg (370,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (000,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=104230! s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=004230! s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (150,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3.5 search function, valid da,dc, idly=2 ---------- ++ wreg (362,00017) a=4ee0(i0.rpa.cs1 ) d=001010 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (033,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000025 000000 000131 000000 -- wreg (002,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (012,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (022,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (032,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (042,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:46.770764 : ATTN notify apat = 0001 lams = 0 dt=0.654391 ++ attn (215,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.197 OK ++ rreg (160,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (170,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=104230! s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000003! s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=004230! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (340,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3.5 search function, valid da,dc, idly=8 ---------- ++ wreg (062,00017) a=4ee0(i0.rpa.cs1 ) d=004010 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (043,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000025 000000 000131 000000 -- wreg (102,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (112,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (122,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (132,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (142,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:47.448983 : ATTN notify apat = 0001 lams = 0 dt=0.678216 ++ attn (225,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.203 OK ++ rreg (350,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (360,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=104230! s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000011! s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=004230! s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (130,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3.5 search function, invalid sa, idly=8 ----------- ++ wreg (162,00017) a=4ee0(i0.rpa.cs1 ) d=004010 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (053,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000026 000000 000131 000000 -- wreg (202,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (212,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (222,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (232,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (242,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:48.098887 : ATTN notify apat = 0001 lams = 0 dt=0.649907 ++ attn (235,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.207 OK ++ rreg (140,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (150,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=104230! s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=002000! s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=150700! s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=004210! s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (320,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A4: test transfer functions: iff yes, as no --------------- # A4.1 read function, valid da,dc -------------------- ++ wreg (262,00017) a=4ee0(i0.rpa.cs1 ) d=000010 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (063,00007) a=0007(c0.memi ) n= 5= 5 s=00000000! OK 0: 000000 000000 000000 000171 000000 -- wreg (302,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (312,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (322,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (332,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (342,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:48.611046 : ATTN notify apat = 0040 lams = 6 dt=0.512159 -- wtlam apat=0040 to=10.000 T=0.066 OK ++ attn (245,00017) d=000100 s=00010000! OK -- wreg (352,00027) a=4ee0(i0.rpa.cs1 ) d=000007 s=00010000! OK -I- 12:00:48.828286 : ATTN notify apat = 0001 lams = 0 dt=0.217237 ++ attn (255,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.139 OK ++ rreg (330,00017) a=000f(c0.pc ) d=002264! s=00000000! OK -- rreg (340,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=001012 s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=000007 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=004270! s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000012! s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=004270! s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (110,00027) a=0007(c0.memi ) d=000000! s=00000000! OK test_rhrp_int.tcl: PASS # test_rhrp_int2: test interrupt response for nested xfer+seek -------- # setup: unit 0-3: RP06(mol) ++ wreg (372,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (002,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (012,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (022,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (032,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (042,00007) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK -- wreg (052,00007) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- wreg (062,00027) a=4ee5(i0.rpa.ds ) d=040100 s=00000000! OK ++ wreg (072,00017) a=4ee0(i0.rpa.cs1 ) d=000002 s=00000000! OK -- wreg (102,00007) a=4ee5(i0.rpa.ds ) d=010400 s=00000000! OK -- wreg (112,00007) a=4eeb(i0.rpa.dt ) d=000001 s=00000000! OK -- wreg (122,00007) a=4ee0(i0.rpa.cs1 ) d=000402 s=00000000! OK -- wreg (132,00007) a=4ee5(i0.rpa.ds ) d=010400 s=00000000! OK -- wreg (142,00007) a=4eeb(i0.rpa.dt ) d=000001 s=00000000! OK -- wreg (152,00007) a=4ee0(i0.rpa.cs1 ) d=001002 s=00000000! OK -- wreg (162,00007) a=4ee5(i0.rpa.ds ) d=010400 s=00000000! OK -- wreg (172,00007) a=4eeb(i0.rpa.dt ) d=000001 s=00000000! OK -- wreg (202,00007) a=4ee0(i0.rpa.cs1 ) d=001402 s=00000000! OK -- wreg (212,00007) a=4ee5(i0.rpa.ds ) d=010400 s=00000000! OK -- wreg (222,00027) a=4eeb(i0.rpa.dt ) d=000001 s=00000000! OK ++ wreg (232,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (242,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (262,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=000011 s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=176716 s=00000000! OK -- wreg (322,00007) a=0007(c0.memi ) d=000017 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=176712 s=00000000! OK -- rreg (120,00027) a=0007(c0.memi ) d=010600! s=00000000! OK ++ wreg (342,00017) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (372,00007) a=0007(c0.memi ) d=000023 s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (032,00007) a=0007(c0.memi ) d=000023 s=00000000! OK -- wreg (042,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000002 s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=000023 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=176710 s=00000000! OK -- wreg (112,00007) a=0007(c0.memi ) d=000003 s=00000000! OK -- wreg (122,00007) a=0004(c0.al ) d=176700 s=00000000! OK -- wreg (132,00027) a=0007(c0.memi ) d=000023 s=00000000! OK ++ wreg (142,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (073,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (152,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (103,00027) a=0007(c0.memi ) n= 8= 8 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 002246 000340 ++ wreg (162,00017) a=0004(c0.al ) d=001174 s=00000000! OK -- wblk (113,00027) a=0007(c0.memi ) n= 3= 3 s=00000000! OK 0: 000000 000000 000000 ++ wreg (172,00017) a=0004(c0.al ) d=002000 s=00000000! OK -- wblk (123,00027) a=0007(c0.memi ) n= 129= 129 s=00000000! OK 0: 000237 005067 177166 005067 177164 012705 001032 012702 8: 000010 005025 005025 005025 005025 005025 005025 077207 16: 005025 012705 001032 012700 001000 105037 176710 012037 24: 176706 012037 176734 012037 176700 012725 177000 013725 32: 176700 013725 176710 013725 176714 013725 176712 013725 40: 176716 012702 000001 012703 000002 012001 001432 110237 48: 176710 012037 176706 012037 176734 012037 176700 010215 56: 062725 177100 013725 176700 013725 176710 013725 176714 64: 013725 176712 013725 176716 050367 176764 005202 006303 72: 077132 005267 176746 000230 000001 005767 176740 001775 80: 012725 177777 000000 105037 176710 012725 177200 013725 88: 176700 013725 176710 013725 176714 013725 176712 013704 96: 176716 010425 012701 000003 012702 000001 012703 000002 104: 030304 001421 110237 176710 010215 062725 177300 013725 112: 176700 013725 176710 013725 176714 013725 176712 010337 120: 176716 013725 176716 005202 006303 077126 005267 176576 128: 000002 -- wtlam apat=0000 to=0 harvest only OK ++ attn (265,00037) d=000000 s=00000000! OK # A1: test without search ----------------------------------- ++ wreg (202,00017) a=4ee0(i0.rpa.cs1 ) d=000010 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (133,00007) a=0007(c0.memi ) n= 4= 4 s=00000000! OK 0: 000001 000100 000171 000000 -- wreg (222,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (232,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (242,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (252,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (262,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:51.659071 : ATTN notify apat = 0040 lams = 6 dt=2.830786 -- wtlam apat=0040 to=10.000 T=0.193 OK ++ wreg (272,00017) a=0004(c0.al ) d=001174 s=00011000! OK -- rreg (130,00027) a=0007(c0.memi ) d=000001 s=00011000! OK ++ attn (275,00017) d=000100 s=00010000! OK -- wreg (302,00027) a=4ee0(i0.rpa.cs1 ) d=000007 s=00010000! OK -I- 12:00:51.868680 : ATTN notify apat = 0001 lams = 0 dt=0.209609 ++ attn (305,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.093 OK ++ rreg (140,00017) a=000f(c0.pc ) d=002246! s=00000000! OK -- rreg (150,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=001176 s=00000000! OK -- rreg (160,00027) a=0007(c0.memi ) d=000001! s=00000000! OK ++ wreg (322,00017) a=0004(c0.al ) d=001032 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=177000! s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=004170! s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=010500! s=00000000! OK -- rreg (240,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ rreg (250,00017) a=0007(c0.memi ) d=177200! s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=004270! s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (320,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ rreg (330,00037) a=0007(c0.memi ) d=177777! s=00000000! OK # A2: test with 1 search ------------------------------------ ++ wreg (332,00017) a=4ee0(i0.rpa.cs1 ) d=005010 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (143,00007) a=0007(c0.memi ) n= 7= 7 s=00000000! OK 0: 000001 000100 000171 000001 000011 000101 000131 -- wreg (352,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (362,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (372,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (002,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (012,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:52.626917 : ATTN notify apat = 0040 lams = 6 dt=0.758236 -- wtlam apat=0040 to=10.000 T=0.199 OK ++ wreg (022,00017) a=0004(c0.al ) d=001174 s=00011000! OK -- rreg (340,00027) a=0007(c0.memi ) d=000000 s=00011000! OK ++ wreg (032,00017) a=0004(c0.al ) d=001174 s=00011000! OK -- rreg (350,00027) a=0007(c0.memi ) d=000001 s=00011000! OK ++ attn (315,00017) d=000100 s=00010000! OK -- wreg (042,00027) a=4ee0(i0.rpa.cs1 ) d=000007 s=00010000! OK -I- 12:00:52.982585 : ATTN notify apat = 0001 lams = 0 dt=0.355668 ++ attn (325,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.145 OK ++ rreg (360,00017) a=000f(c0.pc ) d=002246! s=00000000! OK -- rreg (370,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=001176 s=00000000! OK -- rreg (000,00027) a=0007(c0.memi ) d=000001! s=00000000! OK ++ wreg (062,00017) a=0004(c0.al ) d=001032 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=177000! s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=004170! s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=010500! s=00000000! OK -- rreg (060,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ rreg (070,00017) a=0007(c0.memi ) d=177101! s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=004130! s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000301! s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=030500! s=00000000! OK -- rreg (140,00027) a=0007(c0.memi ) d=000000 s=00000000! OK ++ rreg (150,00017) a=0007(c0.memi ) d=177200! s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=104270! s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (220,00027) a=0007(c0.memi ) d=000002! s=00000000! OK ++ rreg (230,00017) a=0007(c0.memi ) d=177301! s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=104230! s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000301! s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (300,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ rreg (310,00037) a=0007(c0.memi ) d=177777! s=00000000! OK # A2: test with 2 search ------------------------------------ ++ wreg (072,00017) a=4ee0(i0.rpa.cs1 ) d=005010 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (153,00007) a=0007(c0.memi ) n= 10= 10 s=00000000! OK 0: 000001 000100 000171 000002 000011 000101 000131 000012 8: 000102 000131 -- wreg (112,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (122,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (132,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (142,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (152,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:53.882215 : ATTN notify apat = 0040 lams = 6 dt=0.899628 -- wtlam apat=0040 to=10.000 T=0.128 OK ++ wreg (162,00017) a=0004(c0.al ) d=001174 s=00011000! OK -- rreg (320,00027) a=0007(c0.memi ) d=000000 s=00011000! OK ++ wreg (172,00017) a=0004(c0.al ) d=001174 s=00011000! OK -- rreg (330,00027) a=0007(c0.memi ) d=000000 s=00011000! OK ++ wreg (202,00017) a=0004(c0.al ) d=001174 s=00011000! OK -- rreg (340,00027) a=0007(c0.memi ) d=000001 s=00011000! OK ++ attn (335,00017) d=000100 s=00010000! OK -- wreg (212,00027) a=4ee0(i0.rpa.cs1 ) d=000007 s=00010000! OK -I- 12:00:54.192503 : ATTN notify apat = 0001 lams = 0 dt=0.310292 ++ attn (345,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.121 OK ++ rreg (350,00017) a=000f(c0.pc ) d=002246! s=00000000! OK -- rreg (360,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=001176 s=00000000! OK -- rreg (370,00027) a=0007(c0.memi ) d=000001! s=00000000! OK ++ wreg (232,00017) a=0004(c0.al ) d=001032 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=177000! s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=004170! s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=010500! s=00000000! OK -- rreg (050,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ rreg (060,00017) a=0007(c0.memi ) d=177101! s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=004130! s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=000301! s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=030500! s=00000000! OK -- rreg (130,00027) a=0007(c0.memi ) d=000000 s=00000000! OK ++ rreg (140,00017) a=0007(c0.memi ) d=177102! s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=104130! s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000302! s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=030500! s=00000000! OK -- rreg (210,00027) a=0007(c0.memi ) d=000002 s=00000000! OK ++ rreg (220,00017) a=0007(c0.memi ) d=177200! s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=104270! s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (270,00027) a=0007(c0.memi ) d=000006! s=00000000! OK ++ rreg (300,00017) a=0007(c0.memi ) d=177301! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=104230! s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000301! s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (350,00027) a=0007(c0.memi ) d=000004! s=00000000! OK ++ rreg (360,00017) a=0007(c0.memi ) d=177302! s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=104230! s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000302! s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (030,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ rreg (040,00037) a=0007(c0.memi ) d=177777! s=00000000! OK # A2: test with 3 search ------------------------------------ ++ wreg (242,00017) a=4ee0(i0.rpa.cs1 ) d=005010 s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (163,00007) a=0007(c0.memi ) n= 13= 13 s=00000000! OK 0: 000001 000100 000171 000003 000011 000101 000131 000012 8: 000102 000131 000013 000103 000131 -- wreg (262,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (272,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (302,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (312,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (322,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:54.942692 : ATTN notify apat = 0040 lams = 6 dt=0.750188 -- wtlam apat=0040 to=10.000 T=0.128 OK ++ wreg (332,00017) a=0004(c0.al ) d=001174 s=00011000! OK -- rreg (050,00027) a=0007(c0.memi ) d=000000 s=00011000! OK ++ wreg (342,00017) a=0004(c0.al ) d=001174 s=00011000! OK -- rreg (060,00027) a=0007(c0.memi ) d=000000 s=00011000! OK ++ wreg (352,00017) a=0004(c0.al ) d=001174 s=00011000! OK -- rreg (070,00027) a=0007(c0.memi ) d=000000 s=00011000! OK ++ wreg (362,00017) a=0004(c0.al ) d=001174 s=00011000! OK -- rreg (100,00027) a=0007(c0.memi ) d=000001 s=00011000! OK ++ attn (355,00017) d=000100 s=00010000! OK -- wreg (372,00027) a=4ee0(i0.rpa.cs1 ) d=000007 s=00010000! OK -I- 12:00:55.341000 : ATTN notify apat = 0001 lams = 0 dt=0.398306 ++ attn (365,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.151 OK ++ rreg (110,00017) a=000f(c0.pc ) d=002246! s=00000000! OK -- rreg (120,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=001176 s=00000000! OK -- rreg (130,00027) a=0007(c0.memi ) d=000001! s=00000000! OK ++ wreg (012,00017) a=0004(c0.al ) d=001032 s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=177000! s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=004170! s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (200,00007) a=0007(c0.memi ) d=010500! s=00000000! OK -- rreg (210,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ rreg (220,00017) a=0007(c0.memi ) d=177101! s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=004130! s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=000301! s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=030500! s=00000000! OK -- rreg (270,00027) a=0007(c0.memi ) d=000000 s=00000000! OK ++ rreg (300,00017) a=0007(c0.memi ) d=177102! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=104130! s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=000302! s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=030500! s=00000000! OK -- rreg (350,00027) a=0007(c0.memi ) d=000002 s=00000000! OK ++ rreg (360,00017) a=0007(c0.memi ) d=177103! s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=104130! s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000303! s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=030500! s=00000000! OK -- rreg (030,00027) a=0007(c0.memi ) d=000006 s=00000000! OK ++ rreg (040,00017) a=0007(c0.memi ) d=177200! s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=104270! s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (100,00007) a=0007(c0.memi ) d=010700! s=00000000! OK -- rreg (110,00027) a=0007(c0.memi ) d=000016! s=00000000! OK ++ rreg (120,00017) a=0007(c0.memi ) d=177301! s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=104230! s=00000000! OK -- rreg (140,00007) a=0007(c0.memi ) d=000301! s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (170,00027) a=0007(c0.memi ) d=000014! s=00000000! OK ++ rreg (200,00017) a=0007(c0.memi ) d=177302! s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=104230! s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000302! s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (250,00027) a=0007(c0.memi ) d=000010! s=00000000! OK ++ rreg (260,00017) a=0007(c0.memi ) d=177303! s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=104230! s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000303! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=110700! s=00000000! OK -- rreg (330,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ rreg (340,00037) a=0007(c0.memi ) d=177777! s=00000000! OK test_rhrp_int2.tcl: PASS @rhrp/rhrp_all.dat: PASS ## steering file for all tm11 tests # test_tm11_regs: test register response ------------------------------ ++ wreg (022,00017) a=0004(c0.al ) d=172522 s=00000000! OK -- rreg (350,00007) a=0006(c0.mem ) d=000200 s=00000000 OK -- rreg (360,00027) a=4aa9( ) d=000200 s=00000000 OK ++ wreg (032,00017) a=4aa9(i0.tma.cr ) d=000002 s=00000000! OK -- wreg (042,00027) a=4aad(i0.tma.rl ) d=000000 s=00000000! OK ++ wreg (052,00017) a=4aa9(i0.tma.cr ) d=000022 s=00000000! OK -- wreg (062,00027) a=4aad(i0.tma.rl ) d=000000 s=00000000! OK ++ wreg (072,00017) a=4aa9(i0.tma.cr ) d=000042 s=00000000! OK -- wreg (102,00027) a=4aad(i0.tma.rl ) d=000000 s=00000000! OK ++ wreg (112,00017) a=4aa9(i0.tma.cr ) d=000062 s=00000000! OK -- wreg (122,00027) a=4aad(i0.tma.rl ) d=000000 s=00000000! OK # A1: test read --------------------------------------------- # A1.1: loc read sr,...,rl --------------------------- ++ wreg (132,00017) a=0004(c0.al ) d=172520 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000200 s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=172524 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=172526 s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=172530 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=172532 s=00000000! OK -- rreg (040,00027) a=0007(c0.memi ) d=000000 s=00000000! OK # A1.2: rem read sr,...,rl --------------------------- ++ rreg (050,00017) a=4aa8(i0.tma.sr ) d=000001 s=00000000! OK -- rreg (060,00007) a=4aa9(i0.tma.cr ) d=000200 s=00000000! OK -- rreg (070,00007) a=4aaa(i0.tma.bc ) d=000000 s=00000000! OK -- rreg (100,00007) a=4aab(i0.tma.ba ) d=000000 s=00000000! OK -- rreg (110,00007) a=4aac(i0.tma.db ) d=000000 s=00000000! OK -- rreg (120,00027) a=4aad(i0.tma.rl ) d=000006 s=00000000! OK # A1.3: test that rl+2,+4 gives no ack (loc) --------- ++ rreg (130,00017) a=4aae( ) d=000000 s=01000001| OK -- rreg (140,00027) a=4aaf( ) d=000000 s=01000001| OK # B1: test sr setup ------------------------------------------------- # B1.1: rem write via rl ----------------------------- ++ wreg (212,00017) a=4aa9(i0.tma.cr ) d=000002 s=00000000! OK -- wreg (222,00007) a=4aad(i0.tma.rl ) d=003400 s=00000000! OK -- wreg (232,00007) a=4aa9(i0.tma.cr ) d=000022 s=00000000! OK -- wreg (242,00007) a=4aad(i0.tma.rl ) d=002602 s=00000000! OK -- wreg (252,00007) a=4aa9(i0.tma.cr ) d=000042 s=00000000! OK -- wreg (262,00007) a=4aad(i0.tma.rl ) d=001504 s=00000000! OK -- wreg (272,00007) a=4aa9(i0.tma.cr ) d=000062 s=00000000! OK -- wreg (302,00027) a=4aad(i0.tma.rl ) d=000706 s=00000000! OK # B1.2: rem read via rl ------------------------------ ++ wreg (312,00017) a=4aa9(i0.tma.cr ) d=000002 s=00000000! OK -- rreg (150,00007) a=4aad(i0.tma.rl ) d=003400! s=00000000! OK -- wreg (322,00007) a=4aa9(i0.tma.cr ) d=000022 s=00000000! OK -- rreg (160,00007) a=4aad(i0.tma.rl ) d=002602! s=00000000! OK -- wreg (332,00007) a=4aa9(i0.tma.cr ) d=000042 s=00000000! OK -- rreg (170,00007) a=4aad(i0.tma.rl ) d=001504! s=00000000! OK -- wreg (342,00007) a=4aa9(i0.tma.cr ) d=000062 s=00000000! OK -- rreg (200,00027) a=4aad(i0.tma.rl ) d=000706! s=00000000! OK # B1.3: loc read via sr ------------------------------ ++ wreg (352,00017) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=172520 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=042101! s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=000400 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=172520 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=040141! s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (042,00007) a=0007(c0.memi ) d=001000 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=172520 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=002105! s=00000000! OK -- wreg (062,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=001400 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=172520 s=00000000! OK -- rreg (240,00027) a=0007(c0.memi ) d=000145! s=00000000! OK # B1.4: ensure unit 4,..,7 signal offline ------------ ++ wreg (112,00017) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (122,00007) a=0007(c0.memi ) d=002000 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=172520 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=002400 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=172520 s=00000000! OK -- rreg (260,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=003000 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=172520 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (232,00007) a=0007(c0.memi ) d=003400 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=172520 s=00000000! OK -- rreg (300,00027) a=0007(c0.memi ) d=000001! s=00000000! OK # B1.5: setup unit 0:3 as onl=1 bot=1 ---------------- ++ wreg (252,00017) a=4aa9(i0.tma.cr ) d=000002 s=00000000! OK -- wreg (262,00007) a=4aad(i0.tma.rl ) d=000600 s=00000000! OK -- wreg (272,00007) a=4aa9(i0.tma.cr ) d=000022 s=00000000! OK -- wreg (302,00007) a=4aad(i0.tma.rl ) d=000602 s=00000000! OK -- wreg (312,00007) a=4aa9(i0.tma.cr ) d=000042 s=00000000! OK -- wreg (322,00007) a=4aad(i0.tma.rl ) d=000604 s=00000000! OK -- wreg (332,00007) a=4aa9(i0.tma.cr ) d=000062 s=00000000! OK -- wreg (342,00027) a=4aad(i0.tma.rl ) d=000606 s=00000000! OK # B2.1: loc write loc/rem read of cr ----------------- ++ wreg (352,00017) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- rreg (320,00027) a=4aa9(i0.tma.cr ) d=000200! s=00000000! OK ++ wreg (002,00017) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=060000 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=060200! s=00000000! OK -- rreg (340,00027) a=4aa9(i0.tma.cr ) d=060200! s=00000000! OK ++ wreg (032,00017) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (042,00007) a=0007(c0.memi ) d=064000 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=064200! s=00000000! OK -- rreg (360,00027) a=4aa9(i0.tma.cr ) d=064200! s=00000000! OK ++ wreg (062,00017) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=067400 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=067600! s=00000000! OK -- rreg (000,00027) a=4aa9(i0.tma.cr ) d=067600! s=00000000! OK ++ wreg (112,00017) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (122,00007) a=0007(c0.memi ) d=065460 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=065660! s=00000000! OK -- rreg (020,00027) a=4aa9(i0.tma.cr ) d=065660! s=00000000! OK ++ wreg (142,00017) a=0004(c0.al ) d=172522 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=065476 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=172522 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=065676! s=00000000! OK -- rreg (040,00027) a=4aa9(i0.tma.cr ) d=065676! s=00000000! OK # B3.1: loc write loc/rem read for bc,ba ------------- ++ wreg (172,00017) a=0004(c0.al ) d=172524 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=000020 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=172526 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=000040 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=172524 s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=000020! s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=172526 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000040! s=00000000! OK -- rreg (070,00007) a=4aaa(i0.tma.bc ) d=000020! s=00000000! OK -- rreg (100,00027) a=4aab(i0.tma.ba ) d=000040! s=00000000! OK ++ wreg (252,00017) a=0004(c0.al ) d=172524 s=00000000! OK -- wreg (262,00007) a=0007(c0.memi ) d=104210 s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=172526 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=073567 s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=172524 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=104210! s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=172526 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=073566! s=00000000! OK -- rreg (130,00007) a=4aaa(i0.tma.bc ) d=104210! s=00000000! OK -- rreg (140,00027) a=4aab(i0.tma.ba ) d=073566! s=00000000! OK # B3.2: rem write loc/rem read for bc,ba ------------- ++ wreg (332,00017) a=4aaa(i0.tma.bc ) d=011064 s=00000000! OK -- wreg (342,00007) a=4aab(i0.tma.ba ) d=041441 s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=172524 s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=011064! s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=172526 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=041440! s=00000000! OK -- rreg (170,00007) a=4aaa(i0.tma.bc ) d=011064! s=00000000! OK -- rreg (200,00027) a=4aab(i0.tma.ba ) d=041440! s=00000000! OK ++ wreg (372,00017) a=4aaa(i0.tma.bc ) d=000000 s=00000000! OK -- wreg (002,00007) a=4aab(i0.tma.ba ) d=000000 s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=172524 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=172526 s=00000000! OK -- rreg (220,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- rreg (230,00007) a=4aaa(i0.tma.bc ) d=000000! s=00000000! OK -- rreg (240,00027) a=4aab(i0.tma.ba ) d=000000! s=00000000! OK test_tm11_regs.tcl: PASS # test_tm11_int: test interrupt response ------------------------------ # setup: all units online ++ wreg (032,00017) a=4aa9(i0.tma.cr ) d=000002 s=00000000! OK -- wreg (042,00007) a=4aad(i0.tma.rl ) d=000600 s=00000000! OK -- wreg (052,00007) a=4aa9(i0.tma.cr ) d=000022 s=00000000! OK -- wreg (062,00007) a=4aad(i0.tma.rl ) d=000600 s=00000000! OK -- wreg (072,00007) a=4aa9(i0.tma.cr ) d=000042 s=00000000! OK -- wreg (102,00007) a=4aad(i0.tma.rl ) d=000600 s=00000000! OK -- wreg (112,00007) a=4aa9(i0.tma.cr ) d=000062 s=00000000! OK -- wreg (122,00027) a=4aad(i0.tma.rl ) d=000600 s=00000000! OK ++ wreg (132,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (173,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (142,00017) a=0004(c0.al ) d=000224 s=00000000! OK -- wblk (203,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 002076 000340 ++ wreg (152,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (213,00027) a=0007(c0.memi ) n= 6= 6 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 ++ wreg (162,00017) a=0004(c0.al ) d=002000 s=00000000! OK -- wblk (223,00027) a=0007(c0.memi ) n= 44= 44 s=00000000! OK 0: 000237 012700 001006 005020 005020 005020 005020 005020 8: 012700 001000 012037 172524 012037 172526 012037 172522 16: 000230 105737 172522 100375 012700 001020 013720 172520 24: 013720 172522 013720 172524 013720 172526 000000 012700 32: 001006 012720 000001 013720 172520 013720 172522 013720 40: 172524 013720 172526 000002 -- wtlam apat=0000 to=0 harvest only OK ++ attn (375,00037) d=000000 s=00000000! OK # A1.1 set cr.ie=1 -> software interrupt ------------- ++ wreg (172,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (233,00007) a=0007(c0.memi ) n= 3= 3 s=00000000! OK 0: 177400 104000 000100 -- wreg (202,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (212,00007) a=0001(c0.cntl ) d=000002 s=00000000! OK -- wreg (222,00007) a=0001(c0.cntl ) d=000004 s=00000000! OK -- wreg (232,00007) a=000f(c0.pc ) d=002000 s=00000000! OK -- wreg (242,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:00:58.314975 : ATTN notify apat = 0001 lams = 0 dt=2.973979 ++ attn (005,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.067 OK ++ rreg (250,00017) a=000f(c0.pc ) d=002076! s=00000000! OK -- rreg (260,00007) a=000e(c0.sp ) d=001000! s=00000000! OK -- wreg (252,00007) a=0004(c0.al ) d=001006 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=000141! s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (320,00007) a=0007(c0.memi ) d=177400! s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=104000! s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=001020 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=000141! s=00000000! OK -- rreg (350,00007) a=0007(c0.memi ) d=000300! s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=177400! s=00000000! OK -- rreg (370,00027) a=0007(c0.memi ) d=104000! s=00000000! OK test_tm11_int.tcl: PASS @tm11/tm11_all.dat: PASS ## steering file for all deuna tests # test_deuna_regs: test register response ----------------------------- ++ wreg (272,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (000,00007) a=0006(c0.mem ) d=000000 s=00000000 OK -- rreg (010,00027) a=4ca4( ) d=000020 s=00000000 OK ++ wreg (302,00037) a=4ca5(i0.xua.pr1 ) d=140002 s=00000000! OK # A1: test read --------------------------------------------- # A1.1: loc read pr0,...,pr3 ------------------------- ++ wreg (312,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=174512 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=140002 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=174514 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000000 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=174516 s=00000000! OK -- rreg (050,00027) a=0007(c0.memi ) d=000000 s=00000000! OK # A1.2: rem read pr0,...,pr3 ------------------------- ++ rreg (060,00017) a=4ca4(i0.xua.pr0 ) d=000020 s=00000000! OK -- rreg (070,00007) a=4ca5(i0.xua.pr1 ) d=140002 s=00000000! OK -- rreg (100,00007) a=4ca6(i0.xua.pr2 ) d=000000 s=00000000! OK -- rreg (110,00027) a=4ca7(i0.xua.pr3 ) d=000000 s=00000000! OK # A2: test pr2+3 (pcbb) -------------------------------- # A2.1: loc write pcbb, read loc and rem ------------- ++ wreg (352,00017) a=0004(c0.al ) d=174514 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=177777 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=174516 s=00000000! OK -- wreg (002,00007) a=0007(c0.memi ) d=177777 s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=174514 s=00000000! OK -- rreg (120,00007) a=0007(c0.memi ) d=177776! s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=174516 s=00000000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000003! s=00000000! OK -- rreg (140,00007) a=4ca6(i0.xua.pr2 ) d=177776! s=00000000! OK -- rreg (150,00027) a=4ca7(i0.xua.pr3 ) d=000003! s=00000000! OK ++ wreg (032,00017) a=0004(c0.al ) d=174514 s=00000000! OK -- wreg (042,00007) a=0007(c0.memi ) d=011064 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=174516 s=00000000! OK -- wreg (062,00007) a=0007(c0.memi ) d=000001 s=00000000! OK -- wreg (072,00007) a=0004(c0.al ) d=174514 s=00000000! OK -- rreg (160,00007) a=0007(c0.memi ) d=011064! s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=174516 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- rreg (200,00007) a=4ca6(i0.xua.pr2 ) d=011064! s=00000000! OK -- rreg (210,00027) a=4ca7(i0.xua.pr3 ) d=000001! s=00000000! OK # A3: test pr0 ----------------------------------------- # A3.1: loc clear or all interrupt bits -------------- ++ wreg (112,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (122,00007) a=0007(c0.memi ) d=177400 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (220,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A3.2: rem set and loc clear of interrupt bits ------ ++ wreg (142,00017) a=4ca4(i0.xua.pr0 ) d=100000 s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (230,00007) a=0007(c0.memi ) d=100200! s=00000000! OK -- wreg (162,00007) a=4ca4(i0.xua.pr0 ) d=040000 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (240,00007) a=0007(c0.memi ) d=140200! s=00000000! OK -- wreg (202,00007) a=4ca4(i0.xua.pr0 ) d=020000 s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=160200! s=00000000! OK -- wreg (222,00007) a=4ca4(i0.xua.pr0 ) d=010000 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (260,00027) a=0007(c0.memi ) d=170200! s=00000000! OK ++ wreg (242,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (252,00007) a=0007(c0.memi ) d=100000 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (270,00007) a=0007(c0.memi ) d=070200! s=00000000! OK -- wreg (272,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (302,00007) a=0007(c0.memi ) d=040000 s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (300,00007) a=0007(c0.memi ) d=030200! s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (332,00007) a=0007(c0.memi ) d=020000 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=010200! s=00000000! OK -- wreg (352,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (362,00007) a=0007(c0.memi ) d=010000 s=00000000! OK -- wreg (372,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (320,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ wreg (002,00017) a=4ca4(i0.xua.pr0 ) d=004000 s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (330,00007) a=0007(c0.memi ) d=004200! s=00000000! OK -- wreg (022,00007) a=4ca4(i0.xua.pr0 ) d=002000 s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (340,00007) a=0007(c0.memi ) d=006200! s=00000000! OK -- wreg (042,00007) a=4ca4(i0.xua.pr0 ) d=000400 s=00000000! OK -- wreg (052,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (350,00027) a=0007(c0.memi ) d=006600! s=00000000! OK ++ wreg (062,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (072,00007) a=0007(c0.memi ) d=004000 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=002600! s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (122,00007) a=0007(c0.memi ) d=002000 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (370,00007) a=0007(c0.memi ) d=000600! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000400 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (000,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A4: test pr1 ----------------------------------------- # A4.1: XPWR,ICAB,PCTO,DEUNA rem write, loc read ----- ++ wreg (172,00017) a=4ca5(i0.xua.pr1 ) d=000000 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=174512 s=00000000! OK -- rreg (010,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (212,00007) a=4ca5(i0.xua.pr1 ) d=100000 s=00000000! OK -- wreg (222,00007) a=0004(c0.al ) d=174512 s=00000000! OK -- rreg (020,00007) a=0007(c0.memi ) d=100000! s=00000000! OK -- wreg (232,00007) a=4ca5(i0.xua.pr1 ) d=040000 s=00000000! OK -- wreg (242,00007) a=0004(c0.al ) d=174512 s=00000000! OK -- rreg (030,00007) a=0007(c0.memi ) d=040000! s=00000000! OK -- wreg (252,00007) a=4ca5(i0.xua.pr1 ) d=000200 s=00000000! OK -- wreg (262,00007) a=0004(c0.al ) d=174512 s=00000000! OK -- rreg (040,00007) a=0007(c0.memi ) d=000200! s=00000000! OK -- wreg (272,00007) a=4ca5(i0.xua.pr1 ) d=000020 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=174512 s=00000000! OK -- rreg (050,00027) a=0007(c0.memi ) d=000020! s=00000000! OK # A4.2: STATE rem write, loc read ----- ++ wreg (312,00017) a=4ca5(i0.xua.pr1 ) d=000001 s=00000000! OK -- wreg (322,00007) a=0004(c0.al ) d=174512 s=00000000! OK -- rreg (060,00007) a=0007(c0.memi ) d=000001! s=00000000! OK -- wreg (332,00007) a=4ca5(i0.xua.pr1 ) d=000017 s=00000000! OK -- wreg (342,00007) a=0004(c0.al ) d=174512 s=00000000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000017! s=00000000! OK -- wreg (352,00007) a=4ca5(i0.xua.pr1 ) d=000000 s=00000000! OK -- wreg (362,00007) a=0004(c0.al ) d=174512 s=00000000! OK -- rreg (100,00027) a=0007(c0.memi ) d=000000! s=00000000! OK test_deuna_regs.tcl: PASS # test_deuna_func: test function response ----------------------------- -- wtlam apat=0000 to=0 harvest only OK ++ attn (015,00037) d=000000 s=00000000! OK # A1: test PR0:PCMD ----------------------------------------- # A1.1: set PR1 state to READY ----------------------- ++ wreg (372,00037) a=4ca5(i0.xua.pr1 ) d=000002 s=00000000! OK # A1.2: check NOOP doesn't LAM ----------------------- ++ wreg (002,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (012,00007) a=0007(c0.memi ) d=177400 s=00000000! OK -- wreg (022,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (110,00007) a=0007(c0.memi ) d=000000! s=00000000! OK -- wreg (032,00007) a=4ca4(i0.xua.pr0 ) d=001060 s=00000000! OK -- rreg (120,00027) a=4ca4(i0.xua.pr0 ) d=000000! s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK ++ attn (025,00037) d=000000! s=00000000! OK # A1.3: check PCMD>0 gives LAM ---------------------- ++ wreg (042,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000001 s=00001000! OK -- wreg (062,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000001! s=00001000! OK -- rreg (140,00027) a=4ca4(i0.xua.pr0 ) d=011001! s=00001000! OK -I- 12:00:59.807236 : ATTN notify apat = 0200 lams = 9 dt=1.492261 -- wtlam apat=0200 to=1.000 T=0.008 OK ++ attn (035,00037) d=001000! s=00000000! OK ++ wreg (072,00017) a=4ca4(i0.xua.pr0 ) d=004000 s=00000000! OK -- wreg (102,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (150,00007) a=0007(c0.memi ) d=004201! s=00000000! OK -- wreg (112,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (122,00007) a=0007(c0.memi ) d=004000 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (160,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ wreg (142,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=000002 s=00001000! OK -- wreg (162,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (170,00007) a=0007(c0.memi ) d=000002! s=00001000! OK -- rreg (200,00027) a=4ca4(i0.xua.pr0 ) d=021002! s=00001000! OK -I- 12:00:59.964083 : ATTN notify apat = 0200 lams = 9 dt=0.156848 -- wtlam apat=0200 to=1.000 T=0.008 OK ++ attn (045,00037) d=001000! s=00000000! OK ++ wreg (172,00017) a=4ca4(i0.xua.pr0 ) d=004000 s=00000000! OK -- wreg (202,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (210,00007) a=0007(c0.memi ) d=004202! s=00000000! OK -- wreg (212,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (222,00007) a=0007(c0.memi ) d=004000 s=00000000! OK -- wreg (232,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (220,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ wreg (242,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (252,00007) a=0007(c0.memi ) d=000010 s=00001000! OK -- wreg (262,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (230,00007) a=0007(c0.memi ) d=000010! s=00001000! OK -- rreg (240,00027) a=4ca4(i0.xua.pr0 ) d=101010! s=00001000! OK -I- 12:01:00.120533 : ATTN notify apat = 0200 lams = 9 dt=0.156450 -- wtlam apat=0200 to=1.000 T=0.008 OK ++ attn (055,00037) d=001000! s=00000000! OK ++ wreg (272,00017) a=4ca4(i0.xua.pr0 ) d=004000 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (250,00007) a=0007(c0.memi ) d=004210! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (322,00007) a=0007(c0.memi ) d=004000 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (260,00027) a=0007(c0.memi ) d=000000! s=00000000! OK ++ wreg (342,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000017 s=00001000! OK -- wreg (362,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (270,00007) a=0007(c0.memi ) d=000017! s=00001000! OK -- rreg (300,00027) a=4ca4(i0.xua.pr0 ) d=171017! s=00001000! OK -I- 12:01:00.278908 : ATTN notify apat = 0200 lams = 9 dt=0.158376 -- wtlam apat=0200 to=1.000 T=0.008 OK ++ attn (065,00037) d=001000! s=00000000! OK ++ wreg (372,00017) a=4ca4(i0.xua.pr0 ) d=004000 s=00000000! OK -- wreg (002,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (310,00007) a=0007(c0.memi ) d=004217! s=00000000! OK -- wreg (012,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (022,00007) a=0007(c0.memi ) d=004000 s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (320,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A1.4: pcmd busy protect logic: 2nd not PDMD ------- ++ wreg (042,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (052,00007) a=0007(c0.memi ) d=000001 s=00001000! OK -- wreg (062,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (330,00007) a=0007(c0.memi ) d=000001! s=00001000! OK -- wreg (072,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- wreg (102,00007) a=0007(c0.memi ) d=000002 s=00001000! OK -- wreg (112,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (340,00027) a=0007(c0.memi ) d=000002! s=00001000! OK -I- 12:01:00.461775 : ATTN notify apat = 0200 lams = 9 dt=0.182866 -- wtlam apat=0200 to=1.000 T=0.009 OK ++ attn (075,00037) d=001000! s=00000000! OK ++ rreg (350,00017) a=4ca4(i0.xua.pr0 ) d=011402! s=00000000! OK -- wreg (122,00007) a=4ca4(i0.xua.pr0 ) d=004000 s=00000000! OK -- wreg (132,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (360,00007) a=0007(c0.memi ) d=004202! s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (152,00007) a=0007(c0.memi ) d=004000 s=00000000! OK -- wreg (162,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (370,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A1.5: pcmd busy protect logic: restart with PDMD -- ++ wreg (172,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (202,00007) a=0007(c0.memi ) d=000002 s=00001000! OK -- wreg (212,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (000,00007) a=0007(c0.memi ) d=000002! s=00001000! OK -- wreg (222,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- wreg (232,00007) a=0007(c0.memi ) d=000010 s=00001000! OK -- wreg (242,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (010,00027) a=0007(c0.memi ) d=000010! s=00001000! OK -I- 12:01:00.662749 : ATTN notify apat = 0200 lams = 9 dt=0.200973 -- wtlam apat=0200 to=1.000 T=0.009 OK ++ attn (105,00037) d=001000! s=00000000! OK ++ rreg (020,00017) a=4ca4(i0.xua.pr0 ) d=021410! s=00000000! OK -- wreg (252,00007) a=4ca4(i0.xua.pr0 ) d=004000 s=00001000! OK -- wreg (262,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (030,00027) a=0007(c0.memi ) d=000010! s=00001000! OK -I- 12:01:00.735510 : ATTN notify apat = 0200 lams = 9 dt=0.072762 -- wtlam apat=0200 to=1.000 T=0.008 OK ++ attn (115,00037) d=001000! s=00000000! OK ++ rreg (040,00017) a=4ca4(i0.xua.pr0 ) d=103010! s=00000000! OK -- wreg (272,00007) a=4ca4(i0.xua.pr0 ) d=004000 s=00000000! OK -- wreg (302,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (050,00007) a=0007(c0.memi ) d=004210! s=00000000! OK -- wreg (312,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (322,00007) a=0007(c0.memi ) d=004000 s=00000000! OK -- wreg (332,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (060,00027) a=0007(c0.memi ) d=000000! s=00000000! OK # A2: test PR0:RSET ----------------------------------------- ++ wreg (342,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (352,00007) a=0007(c0.memi ) d=000040 s=00001000! OK -- wreg (362,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (070,00007) a=0007(c0.memi ) d=000000! s=00001000! OK -- wreg (372,00007) a=0004(c0.al ) d=174512 s=00001000! OK -- rreg (100,00027) a=0007(c0.memi ) d=000000! s=00001000! OK -I- 12:01:00.907933 : ATTN notify apat = 0200 lams = 9 dt=0.172424 -- wtlam apat=0200 to=1.000 T=0.008 OK ++ attn (125,00037) d=001000! s=00000000! OK ++ rreg (110,00017) a=4ca4(i0.xua.pr0 ) d=001040! s=00000000! OK -- wreg (002,00007) a=4ca4(i0.xua.pr0 ) d=000040 s=00000000! OK -- rreg (120,00027) a=4ca4(i0.xua.pr0 ) d=000000! s=00000000! OK # A3: test BRESET ------------------------------------------ ++ wreg (012,00017) a=4ca5(i0.xua.pr1 ) d=000002 s=00000000! OK -- wreg (022,00007) a=0001(c0.cntl ) d=000005 s=00000000! OK -- wreg (032,00007) a=0004(c0.al ) d=174510 s=00001000! OK -- rreg (130,00007) a=0007(c0.memi ) d=000000! s=00001000! OK -- wreg (042,00007) a=0004(c0.al ) d=174512 s=00001000! OK -- rreg (140,00027) a=0007(c0.memi ) d=000000! s=00001000! OK -I- 12:01:01.036513 : ATTN notify apat = 0200 lams = 9 dt=0.128579 -- wtlam apat=0200 to=1.000 T=0.008 OK ++ attn (135,00037) d=001000! s=00000000! OK ++ rreg (150,00017) a=4ca4(i0.xua.pr0 ) d=001020! s=00000000! OK -- wreg (052,00007) a=4ca4(i0.xua.pr0 ) d=000020 s=00000000! OK -- rreg (160,00027) a=4ca4(i0.xua.pr0 ) d=000000! s=00000000! OK ++ attn (145,00037) d=000000! s=00000000! OK -- wtlam apat=0000 to=0 harvest only OK test_deuna_func.tcl: PASS # test_deuna_int: test interrupt response ----------------------------- ++ wreg (062,00017) a=0004(c0.al ) d=000004 s=00000000! OK -- wblk (243,00027) a=0007(c0.memi ) n= 14= 14 s=00000000! OK 0: 000006 000000 000012 000000 000016 000000 000022 000000 8: 000026 000000 000032 000000 000036 000000 ++ wreg (072,00017) a=0004(c0.al ) d=000120 s=00000000! OK -- wblk (253,00027) a=0007(c0.memi ) n= 2= 2 s=00000000! OK 0: 001022 000340 ++ wreg (102,00017) a=0004(c0.al ) d=000240 s=00000000! OK -- wblk (263,00027) a=0007(c0.memi ) n= 6= 6 s=00000000! OK 0: 000242 000000 000246 000000 000252 000000 ++ wreg (112,00017) a=0004(c0.al ) d=001000 s=00000000! OK -- wblk (273,00027) a=0007(c0.memi ) n= 31= 31 s=00000000! OK 0: 005002 005003 005004 000230 000240 000240 000240 000240 8: 000000 005704 001010 005204 013702 174510 010005 000305 16: 110537 174511 000002 020427 000002 002010 005204 013703 24: 174510 010105 000305 110537 174511 000002 000000 # A1: enable interrupt -------------------------------------- ++ wreg (122,00017) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (132,00007) a=0007(c0.memi ) d=000100 s=00000000! OK -- wreg (142,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (170,00007) a=0007(c0.memi ) d=004300! s=00000000! OK -- wreg (152,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- wreg (162,00007) a=0007(c0.memi ) d=004100 s=00000000! OK -- wreg (172,00007) a=0004(c0.al ) d=174510 s=00000000! OK -- rreg (200,00027) a=0007(c0.memi ) d=000100! s=00000000! OK # B1: test RXI interrupt ------------------------------------ ++ wreg (202,00037) a=4ca4(i0.xua.pr0 ) d=020000 s=00000000! OK ++ wreg (212,00017) a=0008(c0.r0 ) d=020000 s=00000000! OK -- wreg (222,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (232,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (242,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (252,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (262,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (272,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (302,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (312,00007) a=0003(c0.psw ) d=000340 s=00000000! OK -- wreg (322,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:01:01.722572 : ATTN notify apat = 0001 lams = 0 dt=0.686055 ++ attn (155,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.022 OK ++ rreg (210,00017) a=000a(c0.r2 ) d=020300! s=00000000! OK -- rreg (220,00007) a=000b(c0.r3 ) d=000000! s=00000000! OK -- rreg (230,00007) a=000c(c0.r4 ) d=000001! s=00000000! OK -- rreg (240,00027) a=000e(c0.sp ) d=001000! s=00000000! OK # B2: test TXI interrupt ------------------------------------ ++ wreg (332,00037) a=4ca4(i0.xua.pr0 ) d=010000 s=00000000! OK ++ wreg (342,00017) a=0008(c0.r0 ) d=010000 s=00000000! OK -- wreg (352,00007) a=0009(c0.r1 ) d=000000 s=00000000! OK -- wreg (362,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (372,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (002,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (012,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (022,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (032,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (042,00007) a=0003(c0.psw ) d=000340 s=00000000! OK -- wreg (052,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:01:01.934403 : ATTN notify apat = 0001 lams = 0 dt=0.211835 ++ attn (165,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.022 OK ++ rreg (250,00017) a=000a(c0.r2 ) d=010300! s=00000000! OK -- rreg (260,00007) a=000b(c0.r3 ) d=000000! s=00000000! OK -- rreg (270,00007) a=000c(c0.r4 ) d=000001! s=00000000! OK -- rreg (300,00027) a=000e(c0.sp ) d=001000! s=00000000! OK # B3: test RXI+TXI interrupt -------------------------------- ++ wreg (062,00037) a=4ca4(i0.xua.pr0 ) d=030000 s=00000000! OK ++ wreg (072,00017) a=0008(c0.r0 ) d=020000 s=00000000! OK -- wreg (102,00007) a=0009(c0.r1 ) d=010000 s=00000000! OK -- wreg (112,00007) a=000a(c0.r2 ) d=000000 s=00000000! OK -- wreg (122,00007) a=000b(c0.r3 ) d=000000 s=00000000! OK -- wreg (132,00007) a=000c(c0.r4 ) d=000000 s=00000000! OK -- wreg (142,00007) a=000d(c0.r5 ) d=000000 s=00000000! OK -- wreg (152,00007) a=000e(c0.sp ) d=001000 s=00000000! OK -- wreg (162,00007) a=000f(c0.pc ) d=001000 s=00000000! OK -- wreg (172,00007) a=0003(c0.psw ) d=000340 s=00000000! OK -- wreg (202,00027) a=0001(c0.cntl ) d=000001 s=00010000! OK -I- 12:01:02.166609 : ATTN notify apat = 0001 lams = 0 dt=0.232207 ++ attn (175,00037) d=000001 s=00000000! OK -- wtcpu to=10.000 T=0.041 OK ++ rreg (310,00017) a=000a(c0.r2 ) d=030300! s=00000000! OK -- rreg (320,00007) a=000b(c0.r3 ) d=010300! s=00000000! OK -- rreg (330,00007) a=000c(c0.r4 ) d=000002! s=00000000! OK -- rreg (340,00027) a=000e(c0.sp ) d=001000! s=00000000! OK test_deuna_int.tcl: PASS @deuna/deuna_all.dat: PASS @dev_all.dat: PASS 543.3 ns 40: START rlink_cext-I: seen EOF, schedule clock stop and exit 4763068.3 ns 571543: DONE ../../../../vlib/rlink/tbcore/tbcore_rlink.vhd:285:5:@4763168333324fs:(report failure): Simulation Finished tb_w11a_arty:error: report failed from: process work.tbcore_rlink(sim).proc_stim at tbcore_rlink.vhd:197 tb_w11a_arty:error: simulation failed real 2m4.154s user 2m3.068s sys 0m1.056s