2.11BSD#431 - /usr/src/sys/pdpuba/htreg.h

   1: /*
   2:  * Copyright (c) 1986 Regents of the University of California.
   3:  * All rights reserved.  The Berkeley software License Agreement
   4:  * specifies the terms and conditions for redistribution.
   5:  *
   6:  *	@(#)htreg.h	1.1 (2.10BSD Berkeley) 12/1/86
   7:  */
   8: 
   9: struct  htdevice
  10: {
  11:     short   htcs1;      /* control and status 1 register */
  12:     short   htwc;       /* word count register */
  13:     caddr_t htba;       /* bus address register */
  14:     short   htfc;       /* frame counter */
  15:     short   htcs2;      /* control and status 2 register */
  16:     short   htfs;       /* formatter status register */
  17:     short   hter;       /* error register */
  18:     short   htas;       /* attention summary register */
  19:     short   htcc;       /* check character register */
  20:     short   htdb;       /* data buffer register */
  21:     short   htmr;       /* maintenance register */
  22:     short   htdt;       /* drive type register */
  23:     short   htsn;       /* serial number register */
  24:     short   httc;       /* tape control register */
  25:     short   htbae;      /* bus address extension register (RH70 only) */
  26:     short   htcs3;      /* control and status 3 register (RH70 only) */
  27: };
  28: 
  29: /* htcs1 */
  30: #define HT_SC       0100000     /* special condition */
  31: #define HT_TRE      0040000     /* transfer error */
  32: #define HT_MCPE     0020000     /* MASSBUS control bus read parity error */
  33: /* bit 12 is unused */
  34: #define HT_DVA      0004000     /* drive available */
  35: /* bit 10 is unused */
  36: /* bits 9-8 are UNIBUS extension bits */
  37: #define HT_RDY      0000200     /* ready */
  38: #define HT_IE       0000100     /* interrupt enable */
  39: #define HT_GO       0000001     /* go bit */
  40: /* bits 5-1 are the command */
  41: #define HTCS1_BITS  \
  42: "\10\20SC\17TRE\16MCPE\14DVA\12A17\11A16\10RDY\7IE\1GO"
  43: 
  44: /* commands */
  45: #define HT_SENSE    0000000     /* no operations (sense) */
  46: #define HT_REWOFFL  0000002     /* rewind offline */
  47: #define HT_REW      0000006     /* rewind */
  48: #define HT_DCLR     0000010     /* drive clear */
  49: #define HT_RIP      0000020     /* read in preset */
  50: #define HT_ERASE    0000024     /* erase */
  51: #define HT_WEOF     0000026     /* write tape mark */
  52: #define HT_SFORW    0000030     /* space forward */
  53: #define HT_SREV     0000032     /* space reverse */
  54: #define HT_WCHFWD   0000050     /* write check forward */
  55: #define HT_WCHREV   0000056     /* write check reverse */
  56: #define HT_WCOM     0000060     /* write forward */
  57: #define HT_RCOM     0000070     /* read forward */
  58: #define HT_RREV     0000076     /* read reverse */
  59: 
  60: /* htcs2 */
  61: #define HTCS2_DLT   0100000     /* data late */
  62: /*
  63:  * The 1981-1982 DEC peripherals handbook says bit 14 is unused.
  64:  * The 1980 one says it's WCE.  Take your choice.
  65:  */
  66: #define HTCS2_WCE   0040000     /* write check error */
  67: #define HTCS2_UPE   0020000     /* UNIBUS parity error */
  68: #define HTCS2_NEF   0010000     /* nonexistent formatter */
  69: #define HTCS2_NEM   0004000     /* nonexistent memory */
  70: #define HTCS2_PRE   0002000     /* program error */
  71: #define HTCS2_MXF   0001000     /* missed transfer */
  72: #define HTCS2_MDPE  0000400     /* MASSBUS data read parity error */
  73: #define HTCS2_OR    0000200     /* output ready */
  74: #define HTCS2_IR    0000100     /* input ready */
  75: #define HTCS2_CLR   0000040     /* controller clear */
  76: #define HTCS2_PAT   0000020     /* parity test */
  77: #define HTCS2_MAII  0000010     /* memory address increment inhibit */
  78: /* bits 2-0 select the formatter */
  79: #define HTCS2_BITS  \
  80: "\10\20DLT\16UPE\16NEF\14NEM\13PRE\12MXF\11MDPE\10OR\7IR\6CLR\5PAT\4MAII"
  81: #define HTCS2_ERR   \
  82:     (HTCS2_MDPE|HTCS2_MXF|HTCS2_PRE|HTCS2_NEM|HTCS2_NEF|HTCS2_UPE|HTCS2_WCE)
  83: 
  84: /* htfs */
  85: #define HTFS_ATA    0100000     /* attention active */
  86: #define HTFS_ERR    0040000     /* composite error */
  87: #define HTFS_PIP    0020000     /* positioning in progress */
  88: #define HTFS_MOL    0010000     /* medium on line */
  89: #define HTFS_WRL    0004000     /* write lock */
  90: #define HTFS_EOT    0002000     /* end of tape */
  91: /* bit 9 is unused */
  92: #define HTFS_DPR    0000400     /* drive present (always 1) */
  93: #define HTFS_DRY    0000200     /* drive ready */
  94: #define HTFS_SSC    0000100     /* slave status change */
  95: #define HTFS_PES    0000040     /* phase-encoded status */
  96: #define HTFS_SDWN   0000020     /* slowing down */
  97: #define HTFS_IDB    0000010     /* identification burst */
  98: #define HTFS_TM     0000004     /* tape mark */
  99: #define HTFS_BOT    0000002     /* beginning of tape */
 100: #define HTFS_SLA    0000001     /* slave attention */
 101: 
 102: #define HTFS_BITS \
 103: "\10\20ATA\17ERR\16PIP\15MOL\14WRL\13EOT\11DPR\10DRY\
 104: \7SSC\6PES\5SDWN\4IDB\3TM\2BOT\1SLA"
 105: 
 106: /* hter */
 107: #define HTER_CORCRC 0100000     /* correctible data/crc error */
 108: #define HTER_UNS    0040000     /* unsafe */
 109: #define HTER_OPI    0020000     /* operation incomplete */
 110: #define HTER_CTE    0010000     /* controller timing error */
 111: #define HTER_NEF    0004000     /* non-executable function */
 112: #define HTER_CSITM  0002000     /* correctable skew/illegal tape mark */
 113: #define HTER_FCE    0001000     /* frame count error */
 114: #define HTER_NSG    0000400     /* non-standard gap */
 115: #define HTER_PEFLRC 0000200     /* pe format error/lrc error */
 116: #define HTER_INCVPE 0000100     /* incorrectable data/vertical parity error */
 117: #define HTER_DPAR   0000040     /* MASSBUS data write parity error */
 118: #define HTER_FMT    0000020     /* format select error */
 119: #define HTER_CPAR   0000010     /* MASSBUS control bus write parity error */
 120: #define HTER_RMR    0000004     /* register modification refused */
 121: #define HTER_ILR    0000002     /* illegal register */
 122: #define HTER_ILF    0000001     /* illegal function */
 123: 
 124: #define HTER_BITS \
 125: "\10\20CORCRC\17UNS\16OPI\15CTE\14NEF\13CSITM\12FCE\11NSG\10PEFLRC\
 126: \7INCVPE\6DPAR\5FMT\4CPAR\3RMR\2ILR\1ILF"
 127: #define HTER_HARD \
 128:     (HTER_UNS|HTER_OPI|HTER_NEF|HTER_DPAR|HTER_FMT|HTER_CPAR| \
 129:     HTER_RMR|HTER_ILR|HTER_ILF)
 130: 
 131: /* htcc */
 132: /* bits 15-9 are unused */
 133: #define HTCC_DTPAR  0000400     /* dead track parity/crc parity */
 134: /* bits 7-0 contain dead track/crc information */
 135: #define HTCC_BITS   \
 136: "\10\11DTPAR"
 137: 
 138: /* htmr */
 139: /* bits 15-8 contain lrc/maintenance data */
 140: #define HTMR_MDPB   0000400     /* maintenance data parity bit */
 141: #define HTMR_TSC    0000200     /* tape speed clock */
 142: #define HTMR_MC     0000100     /* maintenance clock */
 143: /* bits 4-1 contain the maintenance operation code */
 144: #define HTMR_MM     0000001     /* maintenance mode */
 145: #define HTMR_BITS   \
 146: "\10\10MDPB\7TSC\6MC\1MM"
 147: 
 148: /* htdt */
 149: #define HTDT_NSA    0100000     /* not sector addressed; always 1 */
 150: #define HTDT_TAP    0040000     /* tape; always 1 */
 151: #define HTDT_MOH    0020000     /* moving head; always 0 */
 152: #define HTDT_7CH    0010000     /* 7 channel; always 0 */
 153: #define HTDT_DRQ    0004000     /* drive request required; always 0 */
 154: #define HTDT_SPR    0002000     /* slave present */
 155: /* bit 9 is unused */
 156: /* bits 8-0 are formatter/transport type */
 157: #define HTDT_BITS   \
 158: "\10\20NSA\17TAP\16MOH\15SCH\14DRQ\13SPR"
 159: 
 160: /* httc */
 161: #define HTTC_ACCL   0100000     /* transport is not up to speed */
 162: #define HTTC_FCS    0040000     /* frame count status */
 163: #define HTTC_SAC    0020000     /* slave address change */
 164: #define HTTC_EAODTE 0010000     /* enable abort on data xfer errors */
 165: /* bit 11 is unused */
 166: /* bits 10-8 are density select */
 167: #define HTTC_800BPI 0001400     /* in bits 10-8, dens=800 */
 168: #define HTTC_1600BPI    0002000     /* in bits 10-8, dens=1600 */
 169: /* bits 7-4 are format select */
 170: #define HTTC_PDP11  0000300     /* in bits 7-4, pdp11 normal format */
 171: #define HTTC_EVEN   0000010     /* select even parity */
 172: /* bits 2-0 are slave select */
 173: 
 174: #define HTTC_BITS   \
 175: "\10\20ACCL\17FCS\16SAC\15EAODTE\4EVEN"
 176: 
 177: /* htcs3 */
 178: #define HTCS3_APE   0100000     /* address parity error */
 179: /* bits 14-11 are unused */
 180: #define HTCS3_DW    0002000     /* double word */
 181: /* bits 9-7 are unused */
 182: #define HTCS3_IE    0000100     /* interrupt enable */
 183: /* bits 5-4 are unused */
 184: /* bits 3-0 are inverted parity check */
 185: #define HTCS3_BITS  \
 186: "\10\20APE\13DW\7IE"
 187: 
 188: #define b_repcnt  b_bcount
 189: #define b_command b_resid

Defined struct's

Defined macros

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