w11 - vhd 0.794
W11 CPU core and support modules
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sim Architecture Reference
Architecture >> sim

Processes

proc_ifclk 
proc_state  ( CLK30 )
proc_data  ( SLOE_N , R_DATA )

Constants

c_rxfifo  slv2 := c_fifo_ep4
c_txfifo  slv2 := c_fifo_ep6
c_flag_prog  integer := 0
c_flag_tx_ff  integer := 1
c_flag_rx_ef  integer := 2
c_flag_tx2_ff  integer := 3
bufsize  positive := 1024
datzero  slv ( DATA ) := ( others = > ' 0 ' )

Types

buf_type  ( 0 to bufsize - 1 ) slv ( DATA )

Signals

CLK30  slbit := ' 0 '
RXFIFO_DO  slv8 := ( others = > ' 0 ' )
RXFIFO_VAL  slbit := ' 0 '
RXFIFO_HOLD  slbit := ' 0 '
TXFIFO_DI  slv8 := ( others = > ' 0 ' )
TXFIFO_ENA  slbit := ' 0 '
TXFIFO_BUSY  slbit := ' 0 '
R_FLAG  slv4 := ( others = > ' 0 ' )
R_DATA  slv8 := ( others = > ' 0 ' )
R_rxbuf_rind  natural := 0
R_rxbuf_wind  natural := 0
R_rxbuf_nbyt  natural := 0
R_txbuf_rind  natural := 0
R_txbuf_wind  natural := 0
R_txbuf_nbyt  natural := 0

Instantiations

rxfifo  fifo_2c_dram <Entity fifo_2c_dram>
txfifo  fifo_2c_dram <Entity fifo_2c_dram>

Detailed Description

Definition at line 51 of file fx2_2fifo_core.vhd.

Member Function/Procedure/Process Documentation

◆ proc_ifclk()

proc_ifclk

Definition at line 125 of file fx2_2fifo_core.vhd.

◆ proc_state()

proc_state (   CLK30  
)
Process

Definition at line 151 of file fx2_2fifo_core.vhd.

◆ proc_data()

proc_data (   SLOE_N ,
  R_DATA  
)
Process

Definition at line 257 of file fx2_2fifo_core.vhd.

Member Data Documentation

◆ c_rxfifo

c_rxfifo slv2 := c_fifo_ep4
Constant

Definition at line 53 of file fx2_2fifo_core.vhd.

◆ c_txfifo

c_txfifo slv2 := c_fifo_ep6
Constant

Definition at line 54 of file fx2_2fifo_core.vhd.

◆ c_flag_prog

c_flag_prog integer := 0
Constant

Definition at line 56 of file fx2_2fifo_core.vhd.

◆ c_flag_tx_ff

c_flag_tx_ff integer := 1
Constant

Definition at line 57 of file fx2_2fifo_core.vhd.

◆ c_flag_rx_ef

c_flag_rx_ef integer := 2
Constant

Definition at line 58 of file fx2_2fifo_core.vhd.

◆ c_flag_tx2_ff

c_flag_tx2_ff integer := 3
Constant

Definition at line 59 of file fx2_2fifo_core.vhd.

◆ bufsize

bufsize positive := 1024
Constant

Definition at line 61 of file fx2_2fifo_core.vhd.

◆ datzero

datzero slv ( DATA ) := ( others = > ' 0 ' )
Constant

Definition at line 62 of file fx2_2fifo_core.vhd.

◆ buf_type

buf_type ( 0 to bufsize - 1 ) slv ( DATA )
Type

Definition at line 63 of file fx2_2fifo_core.vhd.

◆ CLK30

CLK30 slbit := ' 0 '
Signal

Definition at line 65 of file fx2_2fifo_core.vhd.

◆ RXFIFO_DO

RXFIFO_DO slv8 := ( others = > ' 0 ' )
Signal

Definition at line 67 of file fx2_2fifo_core.vhd.

◆ RXFIFO_VAL

RXFIFO_VAL slbit := ' 0 '
Signal

Definition at line 68 of file fx2_2fifo_core.vhd.

◆ RXFIFO_HOLD

RXFIFO_HOLD slbit := ' 0 '
Signal

Definition at line 69 of file fx2_2fifo_core.vhd.

◆ TXFIFO_DI

TXFIFO_DI slv8 := ( others = > ' 0 ' )
Signal

Definition at line 70 of file fx2_2fifo_core.vhd.

◆ TXFIFO_ENA

TXFIFO_ENA slbit := ' 0 '
Signal

Definition at line 71 of file fx2_2fifo_core.vhd.

◆ TXFIFO_BUSY

TXFIFO_BUSY slbit := ' 0 '
Signal

Definition at line 72 of file fx2_2fifo_core.vhd.

◆ R_FLAG

R_FLAG slv4 := ( others = > ' 0 ' )
Signal

Definition at line 74 of file fx2_2fifo_core.vhd.

◆ R_DATA

R_DATA slv8 := ( others = > ' 0 ' )
Signal

Definition at line 75 of file fx2_2fifo_core.vhd.

◆ R_rxbuf_rind

R_rxbuf_rind natural := 0
Signal

Definition at line 78 of file fx2_2fifo_core.vhd.

◆ R_rxbuf_wind

R_rxbuf_wind natural := 0
Signal

Definition at line 79 of file fx2_2fifo_core.vhd.

◆ R_rxbuf_nbyt

R_rxbuf_nbyt natural := 0
Signal

Definition at line 80 of file fx2_2fifo_core.vhd.

◆ R_txbuf_rind

R_txbuf_rind natural := 0
Signal

Definition at line 81 of file fx2_2fifo_core.vhd.

◆ R_txbuf_wind

R_txbuf_wind natural := 0
Signal

Definition at line 82 of file fx2_2fifo_core.vhd.

◆ R_txbuf_nbyt

R_txbuf_nbyt natural := 0
Signal

Definition at line 83 of file fx2_2fifo_core.vhd.

◆ rxfifo

rxfifo fifo_2c_dram
Instantiation

Definition at line 104 of file fx2_2fifo_core.vhd.

◆ txfifo

txfifo fifo_2c_dram
Instantiation

Definition at line 123 of file fx2_2fifo_core.vhd.


The documentation for this design unit was generated from the following file: