iob_reg_i_gen Entity Reference

Inheritance diagram for iob_reg_i_gen:

Entities
syn	architecture

Libraries
ieee

Use Clauses
std_logic_1164
slvtypes	Package <slvtypes>
xlib	Package <xlib>

Generics
DWIDTH	positive := 16
INIT	slbit := ' 0 '

Ports
CLK	in	slbit
CE	in	slbit := ' 1 '
DI	out	slv ( DWIDTH - 1 downto 0 )
PAD	in	slv ( DWIDTH - 1 downto 0 )

Detailed Description

Definition at line 25 of file iob_reg_i_gen.vhd.

Member Data Documentation

DWIDTH

DWIDTH positive := 16

Generic

Definition at line 27 of file iob_reg_i_gen.vhd.

INIT

INIT slbit := ' 0 '

Generic

Definition at line 28 of file iob_reg_i_gen.vhd.

CLK

CLK in slbit

Port

Definition at line 30 of file iob_reg_i_gen.vhd.

CE

CE in slbit := ' 1 '

Port

Definition at line 31 of file iob_reg_i_gen.vhd.

DI

DI out slv ( DWIDTH - 1 downto 0 )

Port

Definition at line 32 of file iob_reg_i_gen.vhd.

PAD

PAD in slv ( DWIDTH - 1 downto 0 )

Port

Definition at line 34 of file iob_reg_i_gen.vhd.

ieee

ieee

Library

Definition at line 19 of file iob_reg_i_gen.vhd.

std_logic_1164

std_logic_1164

use clause

Definition at line 20 of file iob_reg_i_gen.vhd.

slvtypes

slvtypes

use clause

Definition at line 22 of file iob_reg_i_gen.vhd.

xlib

xlib	use clause

Definition at line 23 of file iob_reg_i_gen.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/xlib/iob_reg_i_gen.vhd