w11 - vhd 0.794
W11 CPU core and support modules
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Constants | Processes | Signals | Types
sim Architecture Reference
Architecture >> sim

Processes

proc_sram  ( CE , OE , WE , WE_EFF , ADDR , DATA )

Constants

T_rc  Delay_length := 10 ns
T_aa  Delay_length := 10 ns
T_oha  Delay_length := 2 ns
T_ace  Delay_length := 10 ns
T_doe  Delay_length := 4 . 5 ns
T_hzoe  Delay_length := 4 ns
T_lzoe  Delay_length := 0 ns
T_hzce  Delay_length := 4 ns
T_lzce  Delay_length := 3 ns
memsize  positive := 2 ** ( ADDR ' length )
datzero  slv ( DATA ) := ( others = > ' 0 ' )

Types

ram_type  ( 0 to memsize - 1 ) slv ( DATA )

Signals

CE  slbit := ' 0 '
OE  slbit := ' 0 '
WE  slbit := ' 0 '
WE_EFF  slbit := ' 0 '

Detailed Description

Definition at line 46 of file is61wv5128bll.vhd.

Member Function/Procedure/Process Documentation

◆ proc_sram()

proc_sram (   CE ,
  OE ,
  WE ,
  WE_EFF ,
  ADDR ,
  DATA  
)
Process

Definition at line 75 of file is61wv5128bll.vhd.

Member Data Documentation

◆ T_rc

T_rc Delay_length := 10 ns
Constant

Definition at line 48 of file is61wv5128bll.vhd.

◆ T_aa

T_aa Delay_length := 10 ns
Constant

Definition at line 49 of file is61wv5128bll.vhd.

◆ T_oha

T_oha Delay_length := 2 ns
Constant

Definition at line 50 of file is61wv5128bll.vhd.

◆ T_ace

T_ace Delay_length := 10 ns
Constant

Definition at line 51 of file is61wv5128bll.vhd.

◆ T_doe

T_doe Delay_length := 4 . 5 ns
Constant

Definition at line 52 of file is61wv5128bll.vhd.

◆ T_hzoe

T_hzoe Delay_length := 4 ns
Constant

Definition at line 53 of file is61wv5128bll.vhd.

◆ T_lzoe

T_lzoe Delay_length := 0 ns
Constant

Definition at line 54 of file is61wv5128bll.vhd.

◆ T_hzce

T_hzce Delay_length := 4 ns
Constant

Definition at line 55 of file is61wv5128bll.vhd.

◆ T_lzce

T_lzce Delay_length := 3 ns
Constant

Definition at line 56 of file is61wv5128bll.vhd.

◆ memsize

memsize positive := 2 ** ( ADDR ' length )
Constant

Definition at line 58 of file is61wv5128bll.vhd.

◆ datzero

datzero slv ( DATA ) := ( others = > ' 0 ' )
Constant

Definition at line 59 of file is61wv5128bll.vhd.

◆ ram_type

ram_type ( 0 to memsize - 1 ) slv ( DATA )
Type

Definition at line 60 of file is61wv5128bll.vhd.

◆ CE

CE slbit := ' 0 '
Signal

Definition at line 62 of file is61wv5128bll.vhd.

◆ OE

OE slbit := ' 0 '
Signal

Definition at line 63 of file is61wv5128bll.vhd.

◆ WE

WE slbit := ' 0 '
Signal

Definition at line 64 of file is61wv5128bll.vhd.

◆ WE_EFF

WE_EFF slbit := ' 0 '
Signal

Definition at line 65 of file is61wv5128bll.vhd.

The documentation for this design unit was generated from the following file: