sim Architecture Reference

Architecture >> sim

Processes
proc_init

Signals
LOCKED0	slbit := ' 1 '
LOCKED1	slbit := ' 1 '

Instantiations
sfs0	sfs_gsim_core <Entity sfs_gsim_core>
sfs1	sfs_gsim_core <Entity sfs_gsim_core>

Detailed Description

Definition at line 45 of file s7_cmt_sfs_2_gsim.vhd.

Member Function/Procedure/Process Documentation

proc_init()

proc_init ( )

Process

Definition at line 50 of file s7_cmt_sfs_2_gsim.vhd.

Member Data Documentation

LOCKED0

LOCKED0 slbit := ' 1 '

Signal

Definition at line 46 of file s7_cmt_sfs_2_gsim.vhd.

LOCKED1

LOCKED1 slbit := ' 1 '

Signal

Definition at line 47 of file s7_cmt_sfs_2_gsim.vhd.

sfs0

sfs0 sfs_gsim_core

Instantiation

Definition at line 148 of file s7_cmt_sfs_2_gsim.vhd.

sfs1

sfs1 sfs_gsim_core

Instantiation

Definition at line 159 of file s7_cmt_sfs_2_gsim.vhd.

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The documentation for this design unit was generated from the following file:

• vlib/xlib/s7_cmt_sfs_2_gsim.vhd