w11 - vhd 0.794
W11 CPU core and support modules
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Generics | Libraries | Ports | Use Clauses
rlink_core8 Entity Reference
Inheritance diagram for rlink_core8:
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Collaboration diagram for rlink_core8:
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Entities

syn  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
numeric_std 
slvtypes  Package <slvtypes>
comlib  Package <comlib>
rblib  Package <rblib>
rlinklib  Package <rlinklib>

Generics

BTOWIDTH  positive := 5
RTAWIDTH  positive := 12
SYSID  slv32 := ( others = > ' 0 ' )
ENAPIN_RLMON  integer := - 1
ENAPIN_RLBMON  integer := - 1
ENAPIN_RBMON  integer := - 1

Ports

CLK   in   slbit
CE_INT   in   slbit := ' 0 '
RESET   in   slbit
ESCXON   in   slbit
ESCFILL   in   slbit
RLB_DI   in   slv8
RLB_ENA   in   slbit
RLB_BUSY   out   slbit
RLB_DO   out   slv8
RLB_VAL   out   slbit
RLB_HOLD   in   slbit
RL_MONI   out   rl_moni_type
RB_MREQ   out   rb_mreq_type
RB_SRES   in   rb_sres_type
RB_LAM   in   slv16
RB_STAT   in   slv4

Detailed Description

Definition at line 40 of file rlink_core8.vhd.

Member Data Documentation

◆ BTOWIDTH

BTOWIDTH positive := 5
Generic

Definition at line 42 of file rlink_core8.vhd.

◆ RTAWIDTH

RTAWIDTH positive := 12
Generic

Definition at line 43 of file rlink_core8.vhd.

◆ SYSID

SYSID slv32 := ( others = > ' 0 ' )
Generic

Definition at line 44 of file rlink_core8.vhd.

◆ ENAPIN_RLMON

ENAPIN_RLMON integer := - 1
Generic

Definition at line 45 of file rlink_core8.vhd.

◆ ENAPIN_RLBMON

ENAPIN_RLBMON integer := - 1
Generic

Definition at line 46 of file rlink_core8.vhd.

◆ ENAPIN_RBMON

ENAPIN_RBMON integer := - 1
Generic

Definition at line 47 of file rlink_core8.vhd.

◆ CLK

CLK in slbit
Port

Definition at line 49 of file rlink_core8.vhd.

◆ CE_INT

CE_INT in slbit := ' 0 '
Port

Definition at line 50 of file rlink_core8.vhd.

◆ RESET

RESET in slbit
Port

Definition at line 51 of file rlink_core8.vhd.

◆ ESCXON

ESCXON in slbit
Port

Definition at line 52 of file rlink_core8.vhd.

◆ ESCFILL

ESCFILL in slbit
Port

Definition at line 53 of file rlink_core8.vhd.

◆ RLB_DI

RLB_DI in slv8
Port

Definition at line 54 of file rlink_core8.vhd.

◆ RLB_ENA

RLB_ENA in slbit
Port

Definition at line 55 of file rlink_core8.vhd.

◆ RLB_BUSY

RLB_BUSY out slbit
Port

Definition at line 56 of file rlink_core8.vhd.

◆ RLB_DO

RLB_DO out slv8
Port

Definition at line 57 of file rlink_core8.vhd.

◆ RLB_VAL

RLB_VAL out slbit
Port

Definition at line 58 of file rlink_core8.vhd.

◆ RLB_HOLD

RLB_HOLD in slbit
Port

Definition at line 59 of file rlink_core8.vhd.

◆ RL_MONI

RL_MONI out rl_moni_type
Port

Definition at line 60 of file rlink_core8.vhd.

◆ RB_MREQ

RB_MREQ out rb_mreq_type
Port

Definition at line 61 of file rlink_core8.vhd.

◆ RB_SRES

RB_SRES in rb_sres_type
Port

Definition at line 62 of file rlink_core8.vhd.

◆ RB_LAM

RB_LAM in slv16
Port

Definition at line 63 of file rlink_core8.vhd.

◆ RB_STAT

RB_STAT in slv4
Port

Definition at line 65 of file rlink_core8.vhd.

◆ ieee

ieee
Library

Definition at line 31 of file rlink_core8.vhd.

◆ std_logic_1164

std_logic_1164
use clause

Definition at line 32 of file rlink_core8.vhd.

◆ numeric_std

numeric_std
use clause

Definition at line 33 of file rlink_core8.vhd.

◆ slvtypes

slvtypes
use clause

Definition at line 35 of file rlink_core8.vhd.

◆ comlib

comlib
use clause

Definition at line 36 of file rlink_core8.vhd.

◆ rblib

rblib
use clause

Definition at line 37 of file rlink_core8.vhd.

◆ rlinklib

rlinklib
use clause

Definition at line 38 of file rlink_core8.vhd.

The documentation for this design unit was generated from the following file: