w11 - vhd 0.794
W11 CPU core and support modules
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syn Architecture Reference
Architecture >> syn

Signals

CLK  slbit := ' 0 '
SWI  slv8 := ( others = > ' 0 ' )
BTN  slv4 := ( others = > ' 0 ' )
LED  slv8 := ( others = > ' 0 ' )
DSP_DAT  slv16 := ( others = > ' 0 ' )
DSP_DP  slv4 := ( others = > ' 0 ' )
RESET  slbit := ' 0 '
CE_MSEC  slbit := ' 0 '

Instantiations

clkdiv  clkdivce <Entity clkdivce>
hio  sn_humanio <Entity sn_humanio>
hiotest  tst_snhumanio <Entity tst_snhumanio>
sram_prot  nx_cram_dummy <Entity nx_cram_dummy>

Detailed Description

Definition at line 70 of file sys_tst_snhumanio_n2.vhd.

Member Data Documentation

◆ CLK

CLK slbit := ' 0 '
Signal

Definition at line 72 of file sys_tst_snhumanio_n2.vhd.

◆ SWI

SWI slv8 := ( others = > ' 0 ' )
Signal

Definition at line 74 of file sys_tst_snhumanio_n2.vhd.

◆ BTN

BTN slv4 := ( others = > ' 0 ' )
Signal

Definition at line 75 of file sys_tst_snhumanio_n2.vhd.

◆ LED

LED slv8 := ( others = > ' 0 ' )
Signal

Definition at line 76 of file sys_tst_snhumanio_n2.vhd.

◆ DSP_DAT

DSP_DAT slv16 := ( others = > ' 0 ' )
Signal

Definition at line 77 of file sys_tst_snhumanio_n2.vhd.

◆ DSP_DP

DSP_DP slv4 := ( others = > ' 0 ' )
Signal

Definition at line 78 of file sys_tst_snhumanio_n2.vhd.

◆ RESET

RESET slbit := ' 0 '
Signal

Definition at line 80 of file sys_tst_snhumanio_n2.vhd.

◆ CE_MSEC

CE_MSEC slbit := ' 0 '
Signal

Definition at line 81 of file sys_tst_snhumanio_n2.vhd.

◆ clkdiv

clkdiv clkdivce
Instantiation

Definition at line 98 of file sys_tst_snhumanio_n2.vhd.

◆ hio

hio sn_humanio
Instantiation

Definition at line 118 of file sys_tst_snhumanio_n2.vhd.

◆ hiotest

hiotest tst_snhumanio
Instantiation

Definition at line 132 of file sys_tst_snhumanio_n2.vhd.

◆ sram_prot

sram_prot nx_cram_dummy
Instantiation

Definition at line 148 of file sys_tst_snhumanio_n2.vhd.


The documentation for this design unit was generated from the following file: