tb_cmoda7_core Entity Reference

Inheritance diagram for tb_cmoda7_core:

Entities
sim	architecture

Libraries
ieee

Use Clauses
std_logic_1164
numeric_std
std_logic_textio
textio
slvtypes	Package <slvtypes>
simbus	Package <simbus>

Ports
I_BTN	out	slv2

Detailed Description

Definition at line 29 of file tb_cmoda7_core.vhd.

Member Data Documentation

I_BTN

I_BTN out slv2

Port

Definition at line 32 of file tb_cmoda7_core.vhd.

ieee

ieee

Library

Definition at line 20 of file tb_cmoda7_core.vhd.

std_logic_1164

std_logic_1164

use clause

Definition at line 21 of file tb_cmoda7_core.vhd.

numeric_std

numeric_std

use clause

Definition at line 22 of file tb_cmoda7_core.vhd.

std_logic_textio

std_logic_textio

use clause

Definition at line 23 of file tb_cmoda7_core.vhd.

textio

textio

use clause

Definition at line 24 of file tb_cmoda7_core.vhd.

slvtypes

slvtypes

use clause

Definition at line 26 of file tb_cmoda7_core.vhd.

simbus

simbus

use clause

Definition at line 27 of file tb_cmoda7_core.vhd.

---

The documentation for this design unit was generated from the following file:

• bplib/cmoda7/tb/tb_cmoda7_core.vhd