w11 - vhd 0.794
W11 CPU core and support modules
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Libraries | Ports | Use Clauses
tb_nexys3_core Entity Reference
Inheritance diagram for tb_nexys3_core:
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Collaboration diagram for tb_nexys3_core:
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Entities

sim  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
numeric_std 
std_logic_textio 
textio 
slvtypes  Package <slvtypes>
simlib  Package <simlib>
simbus  Package <simbus>

Ports

I_SWI   out   slv8
I_BTN   out   slv5
O_MEM_CE_N   in   slbit
O_MEM_BE_N   in   slv2
O_MEM_WE_N   in   slbit
O_MEM_OE_N   in   slbit
O_MEM_ADV_N   in   slbit
O_MEM_CLK   in   slbit
O_MEM_CRE   in   slbit
I_MEM_WAIT   out   slbit
O_MEM_ADDR   in   slv23
IO_MEM_DATA   inout   slv16

Detailed Description

Definition at line 32 of file tb_nexys3_core.vhd.

Member Data Documentation

◆ I_SWI

I_SWI out slv8
Port

Definition at line 34 of file tb_nexys3_core.vhd.

◆ I_BTN

I_BTN out slv5
Port

Definition at line 35 of file tb_nexys3_core.vhd.

◆ O_MEM_CE_N

O_MEM_CE_N in slbit
Port

Definition at line 36 of file tb_nexys3_core.vhd.

◆ O_MEM_BE_N

O_MEM_BE_N in slv2
Port

Definition at line 37 of file tb_nexys3_core.vhd.

◆ O_MEM_WE_N

O_MEM_WE_N in slbit
Port

Definition at line 38 of file tb_nexys3_core.vhd.

◆ O_MEM_OE_N

O_MEM_OE_N in slbit
Port

Definition at line 39 of file tb_nexys3_core.vhd.

◆ O_MEM_ADV_N

O_MEM_ADV_N in slbit
Port

Definition at line 40 of file tb_nexys3_core.vhd.

◆ O_MEM_CLK

O_MEM_CLK in slbit
Port

Definition at line 41 of file tb_nexys3_core.vhd.

◆ O_MEM_CRE

O_MEM_CRE in slbit
Port

Definition at line 42 of file tb_nexys3_core.vhd.

◆ I_MEM_WAIT

I_MEM_WAIT out slbit
Port

Definition at line 43 of file tb_nexys3_core.vhd.

◆ O_MEM_ADDR

O_MEM_ADDR in slv23
Port

Definition at line 44 of file tb_nexys3_core.vhd.

◆ IO_MEM_DATA

IO_MEM_DATA inout slv16
Port

Definition at line 46 of file tb_nexys3_core.vhd.

◆ ieee

ieee
Library

Definition at line 22 of file tb_nexys3_core.vhd.

◆ std_logic_1164

std_logic_1164
use clause

Definition at line 23 of file tb_nexys3_core.vhd.

◆ numeric_std

numeric_std
use clause

Definition at line 24 of file tb_nexys3_core.vhd.

◆ std_logic_textio

std_logic_textio
use clause

Definition at line 25 of file tb_nexys3_core.vhd.

◆ textio

textio
use clause

Definition at line 26 of file tb_nexys3_core.vhd.

◆ slvtypes

slvtypes
use clause

Definition at line 28 of file tb_nexys3_core.vhd.

◆ simlib

simlib
use clause

Definition at line 29 of file tb_nexys3_core.vhd.

◆ simbus

simbus
use clause

Definition at line 30 of file tb_nexys3_core.vhd.

The documentation for this design unit was generated from the following file: