32use ieee.std_logic_1164.
all;
33use ieee.numeric_std.
all;
42 INTMAP : intmap_array_type := intmap_array_init);
77 slv(to_unsigned( 0,3))
96 slv(to_unsigned( 0,9))
105 "1110" when EI_REQ(14)='1' else
106 "1101" when EI_REQ(13)='1' else
107 "1100" when EI_REQ(12)='1' else
108 "1011" when EI_REQ(11)='1' else
109 "1010" when EI_REQ(10)='1' else
110 "1001" when EI_REQ( 9)='1' else
111 "1000" when EI_REQ( 8)='1' else
112 "0111" when EI_REQ( 7)='1' else
113 "0110" when EI_REQ( 6)='1' else
114 "0101" when EI_REQ( 5)='1' else
115 "0100" when EI_REQ( 4)='1' else
116 "0011" when EI_REQ( 3)='1' else
117 "0010" when EI_REQ( 2)='1' else
118 "0001" when EI_REQ( 1)='1' else
123 if rising_edge(CLK) then
126 end process proc_line;
132 variable ilinecur : integer := 0;
133 variable ilinelst : integer := 0;
134 variable iei_ack : slv16 := (others=>'0');
137 ilinecur := to_integer(unsigned(EI_LINE));
138 ilinelst := to_integer(unsigned(R_LINE));
145 iei_ack := (others=>'0');
147 iei_ack(ilinelst) := '1';
151 end process proc_intmap;
intv_type :=( slv( to_unsigned( INTMAP( 15).vec, 9) ), slv( to_unsigned( INTMAP( 14).vec, 9) ), slv( to_unsigned( INTMAP( 13).vec, 9) ), slv( to_unsigned( INTMAP( 12).vec, 9) ), slv( to_unsigned( INTMAP( 11).vec, 9) ), slv( to_unsigned( INTMAP( 10).vec, 9) ), slv( to_unsigned( INTMAP( 9).vec, 9) ), slv( to_unsigned( INTMAP( 8).vec, 9) ), slv( to_unsigned( INTMAP( 7).vec, 9) ), slv( to_unsigned( INTMAP( 6).vec, 9) ), slv( to_unsigned( INTMAP( 5).vec, 9) ), slv( to_unsigned( INTMAP( 4).vec, 9) ), slv( to_unsigned( INTMAP( 3).vec, 9) ), slv( to_unsigned( INTMAP( 2).vec, 9) ), slv( to_unsigned( INTMAP( 1).vec, 9) ), slv( to_unsigned( 0, 9) )) conf_intv
slv4 :=( others => '0') EI_LINE
( 15 downto 0) slv3 intp_type
slv4 :=( others => '0') R_LINE
( 15 downto 0) slv9 intv_type
intp_type :=( slv( to_unsigned( INTMAP( 15).pri, 3) ), slv( to_unsigned( INTMAP( 14).pri, 3) ), slv( to_unsigned( INTMAP( 13).pri, 3) ), slv( to_unsigned( INTMAP( 12).pri, 3) ), slv( to_unsigned( INTMAP( 11).pri, 3) ), slv( to_unsigned( INTMAP( 10).pri, 3) ), slv( to_unsigned( INTMAP( 9).pri, 3) ), slv( to_unsigned( INTMAP( 8).pri, 3) ), slv( to_unsigned( INTMAP( 7).pri, 3) ), slv( to_unsigned( INTMAP( 6).pri, 3) ), slv( to_unsigned( INTMAP( 5).pri, 3) ), slv( to_unsigned( INTMAP( 4).pri, 3) ), slv( to_unsigned( INTMAP( 3).pri, 3) ), slv( to_unsigned( INTMAP( 2).pri, 3) ), slv( to_unsigned( INTMAP( 1).pri, 3) ), slv( to_unsigned( 0, 3) )) conf_intp
INTMAP intmap_array_type := intmap_array_init
std_logic_vector( 3 downto 0) slv4
std_logic_vector( 2 downto 0) slv3
std_logic_vector( 8 downto 2) slv9_2
std_logic_vector( 15 downto 1) slv16_1
std_logic_vector( 8 downto 0) slv9
std_logic_vector( 15 downto 0) slv16