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W11 CPU core and support modules
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cmoda7_sram_dummy.vhd
Go to the documentation of this file.
1
-- $Id: cmoda7_sram_dummy.vhd 1181 2019-07-08 17:00:50Z mueller $
2
-- SPDX-License-Identifier: GPL-3.0-or-later
3
-- Copyright 2017- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4
--
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------------------------------------------------------------------------------
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-- Module Name: cmoda7_sram_dummy - syn
7
-- Description: cmoda7 target (base; serport loopback, sram protect)
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--
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-- Dependencies: -
10
-- To test: tb_cmoda7_sram
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-- Target Devices: generic
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-- Tool versions: viv 2016.4; ghdl 0.34
13
--
14
-- Revision History:
15
-- Date Rev Version Comment
16
-- 2017-06-04 906 1.0 Initial version
17
------------------------------------------------------------------------------
18
19
library
ieee
;
20
use
ieee.std_logic_1164.
all
;
21
22
use
work.
slvtypes
.
all
;
23
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entity
cmoda7_sram_dummy
is
-- CmodA7 dummy (base+sram)
25
-- implements cmoda7_sram_aif
26
port
(
27
I_CLK12
:
in
slbit
;
-- 12 MHz board clock
28
I_RXD
:
in
slbit
;
-- receive data (board view)
29
O_TXD
:
out
slbit
;
-- transmit data (board view)
30
I_BTN
:
in
slv2
;
-- c7 buttons
31
O_LED
:
out
slv2
;
-- c7 leds
32
O_RGBLED0_N
:
out
slv3
;
-- c7 rgb-led 0 (act.low)
33
O_MEM_CE_N
:
out
slbit
;
-- sram: chip enable (act.low)
34
O_MEM_WE_N
:
out
slbit
;
-- sram: write enable (act.low)
35
O_MEM_OE_N
:
out
slbit
;
-- sram: output enable (act.low)
36
O_MEM_ADDR
:
out
slv19
;
-- sram: address lines
37
IO_MEM_DATA
:
inout
slv8
-- sram: data lines
38
)
;
39
end
cmoda7_sram_dummy
;
40
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architecture
syn
of
cmoda7_sram_dummy
is
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begin
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O_TXD
<=
I_RXD
;
-- loop back serport
46
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O_LED
<=
I_BTN
;
-- mirror BTN on LED
48
49
O_RGBLED0_N
(
0
)
<=
not
I_BTN
(
0
)
;
-- mirror BTN on RGBLED 0 -> red
50
O_RGBLED0_N
(
1
)
<=
not
I_BTN
(
1
)
;
-- 1 -> green
51
O_RGBLED0_N
(
2
)
<=
not
(
I_BTN
(
0
)
and
I_BTN
(
1
)
)
;
-- 0+1 -> white
52
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O_MEM_CE_N
<=
'
1
'
;
54
O_MEM_WE_N
<=
'
1
'
;
55
O_MEM_OE_N
<=
'
1
'
;
56
O_MEM_ADDR
<=
(
others
=
>
'
0
'
)
;
57
IO_MEM_DATA
<=
(
others
=
>
'
Z
'
)
;
58
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end
syn
;
cmoda7_sram_dummy.syn
Definition:
cmoda7_sram_dummy.vhd:41
cmoda7_sram_dummy
Definition:
cmoda7_sram_dummy.vhd:24
cmoda7_sram_dummy.I_BTN
in I_BTN slv2
Definition:
cmoda7_sram_dummy.vhd:30
cmoda7_sram_dummy.O_RGBLED0_N
out O_RGBLED0_N slv3
Definition:
cmoda7_sram_dummy.vhd:32
cmoda7_sram_dummy.O_TXD
out O_TXD slbit
Definition:
cmoda7_sram_dummy.vhd:29
cmoda7_sram_dummy.I_RXD
in I_RXD slbit
Definition:
cmoda7_sram_dummy.vhd:28
cmoda7_sram_dummy.O_MEM_WE_N
out O_MEM_WE_N slbit
Definition:
cmoda7_sram_dummy.vhd:34
cmoda7_sram_dummy.IO_MEM_DATA
inout IO_MEM_DATA slv8
Definition:
cmoda7_sram_dummy.vhd:38
cmoda7_sram_dummy.O_MEM_CE_N
out O_MEM_CE_N slbit
Definition:
cmoda7_sram_dummy.vhd:33
cmoda7_sram_dummy.O_MEM_OE_N
out O_MEM_OE_N slbit
Definition:
cmoda7_sram_dummy.vhd:35
cmoda7_sram_dummy.O_MEM_ADDR
out O_MEM_ADDR slv19
Definition:
cmoda7_sram_dummy.vhd:36
cmoda7_sram_dummy.O_LED
out O_LED slv2
Definition:
cmoda7_sram_dummy.vhd:31
cmoda7_sram_dummy.I_CLK12
in I_CLK12 slbit
Definition:
cmoda7_sram_dummy.vhd:27
slvtypes
Definition:
slvtypes.vhd:28
slvtypes.slv19
std_logic_vector( 18 downto 0) slv19
Definition:
slvtypes.vhd:52
slvtypes.slv3
std_logic_vector( 2 downto 0) slv3
Definition:
slvtypes.vhd:35
slvtypes.slbit
std_logic slbit
Definition:
slvtypes.vhd:30
slvtypes.slv8
std_logic_vector( 7 downto 0) slv8
Definition:
slvtypes.vhd:40
slvtypes.slv2
std_logic_vector( 1 downto 0) slv2
Definition:
slvtypes.vhd:34
bplib
cmoda7
tb
cmoda7_sram_dummy.vhd
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