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W11 CPU core and support modules
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led_pulse_stretch.vhd
Go to the documentation of this file.
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-- $Id: led_pulse_stretch.vhd 1181 2019-07-08 17:00:50Z mueller $
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-- SPDX-License-Identifier: GPL-3.0-or-later
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-- Copyright 2012- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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------------------------------------------------------------------------------
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-- Module Name: led_pulse_stretch - syn
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-- Description: pulse stretcher for leds
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--
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-- Dependencies: -
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-- Test bench: -
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-- Target Devices: generic
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-- Tool versions: xst 13.3-14.7; ghdl 0.29-0.31
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-- Revision History:
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-- Date Rev Version Comment
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-- 2012-12-29 466 1.0 Initial version
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------------------------------------------------------------------------------
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library
ieee
;
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use
ieee.std_logic_1164.
all
;
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use
ieee.numeric_std.
all
;
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use
work.
slvtypes
.
all
;
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entity
led_pulse_stretch
is
-- pulse stretcher for leds
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port
(
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CLK
:
in
slbit
;
-- clock
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CE_INT
:
in
slbit
;
-- pulse time unit clock enable
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RESET
:
in
slbit
:=
'
0
'
;
-- reset
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DIN
:
in
slbit
;
-- data in
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POUT
:
out
slbit
-- pulse out
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)
;
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end
entity
led_pulse_stretch
;
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architecture
syn
of
led_pulse_stretch
is
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type
regs_type
is
record
-- state registers
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seen
:
slbit
;
-- DIN seen
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busy
:
slbit
;
-- POUT busy
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end
record
regs_type
;
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constant
regs_init
:
regs_type
:=
(
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'
0
'
,
-- seen
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'
0
'
-- busy
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)
;
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signal
R_REGS
:
regs_type
:=
regs_init
;
-- state registers
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signal
N_REGS
:
regs_type
:=
regs_init
;
-- next value state regs
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begin
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proc_regs:
process
(
CLK
)
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begin
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if
rising_edge
(
CLK
)
then
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if
RESET
=
'
1
'
then
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R_REGS
<=
regs_init
;
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else
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R_REGS
<=
N_REGS
;
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end
if
;
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end
if
;
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end
process
proc_regs
;
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proc_next:
process
(
R_REGS
,
CE_INT
,
DIN
)
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variable
r
:
regs_type
:=
regs_init
;
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variable
n
:
regs_type
:=
regs_init
;
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begin
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r
:=
R_REGS
;
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n
:=
R_REGS
;
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if
CE_INT
=
'
1
'
then
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n
.
seen
:=
DIN
;
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n
.
busy
:=
r
.
seen
;
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else
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if
DIN
=
'
1
'
then
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n
.
seen
:=
'
1
'
;
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end
if
;
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end
if
;
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N_REGS
<=
n
;
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POUT
<=
r
.
busy
;
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end
process
proc_next
;
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end
syn;
led_pulse_stretch.syn
Definition:
led_pulse_stretch.vhd:34
led_pulse_stretch.syn.regs_init
regs_type :=( '0', '0') regs_init
Definition:
led_pulse_stretch.vhd:41
led_pulse_stretch.syn.N_REGS
regs_type := regs_init N_REGS
Definition:
led_pulse_stretch.vhd:47
led_pulse_stretch.syn.regs_type
regs_type
Definition:
led_pulse_stretch.vhd:36
led_pulse_stretch.syn.R_REGS
regs_type := regs_init R_REGS
Definition:
led_pulse_stretch.vhd:46
led_pulse_stretch
Definition:
led_pulse_stretch.vhd:24
led_pulse_stretch.CE_INT
in CE_INT slbit
Definition:
led_pulse_stretch.vhd:27
led_pulse_stretch.POUT
out POUT slbit
Definition:
led_pulse_stretch.vhd:31
led_pulse_stretch.CLK
in CLK slbit
Definition:
led_pulse_stretch.vhd:26
led_pulse_stretch.RESET
in RESET slbit := '0'
Definition:
led_pulse_stretch.vhd:28
led_pulse_stretch.DIN
in DIN slbit
Definition:
led_pulse_stretch.vhd:29
slvtypes
Definition:
slvtypes.vhd:28
slvtypes.slbit
std_logic slbit
Definition:
slvtypes.vhd:30
vlib
genlib
led_pulse_stretch.vhd
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