w11 - vhd 0.794
W11 CPU core and support modules
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Procedures | |
readwhite( L: inout line ) | |
readoct( L: inout line value: out std_logic_vector good: out boolean ) | |
readhex( L: inout line value: out std_logic_vector good: out boolean ) | |
readgen( L: inout line value: out std_logic_vector good: out boolean base: in integer 2 ) | |
readcomment( L: inout line , good: out boolean ) | |
readdotcomm( L: inout line name: out string good: out boolean ) | |
readword( L: inout line name: out string good: out boolean ) | |
readoptchar( L: inout line char: in character good: out boolean ) | |
readempty( L: inout line ) | |
testempty( L: inout line , good: out boolean ) | |
testempty_ea( L: inout line ) | |
read_ea( L: inout line , value: out integer ) | |
read_ea( L: inout line , value: out time ) | |
readint_ea( L: inout line value: out integer imin: in integer integer ' low imax: in integer integer ' high ) | |
read_ea( L: inout line , value: out std_logic ) | |
read_ea( L: inout line , value: out std_logic_vector ) | |
readoct_ea( L: inout line , value: out std_logic_vector ) | |
readhex_ea( L: inout line , value: out std_logic_vector ) | |
readgen_ea( L: inout line value: out std_logic_vector base: in integer 2 ) | |
readword_ea( L: inout line , name: out string ) | |
readtagval( L: inout line tag: in string match: out boolean val: out std_logic_vector good: out boolean base: in integer 2 ) | |
readtagval_ea( L: inout line tag: in string match: out boolean val: out std_logic_vector base: in integer 2 ) | |
readtagval( L: inout line tag: in string match: out boolean val: out std_logic good: out boolean ) | |
readtagval_ea( L: inout line tag: in string match: out boolean val: out std_logic ) | |
readtagval2( L: inout line tag: in string match: out boolean val1: out std_logic_vector val2: out std_logic_vector good: out boolean base: in integer 2 ) | |
readtagval2_ea( L: inout line tag: in string match: out boolean val1: out std_logic_vector val2: out std_logic_vector base: in integer 2 ) | |
writeoct( L: inout line value: in std_logic_vector justified: in side right field: in width 0 ) | |
writehex( L: inout line value: in std_logic_vector justified: in side right field: in width 0 ) | |
writegen( L: inout line value: in std_logic_vector justified: in side right field: in width 0 base: in integer 2 ) | |
writetimens( L: inout line t: in time field: in width 0 ) | |
writetimestamp( L: inout line , str: in string null_string ) | |
writetimestamp( L: inout line clkcyc: in integer str: in string null_string ) | |
writeoptint( L: inout line str: in string dat: in integer field: in width 0 ) | |
writetrace( str: in string ) | |
writetrace( str: in string , dat: in integer ) | |
writetrace( str: in string , dat: in slbit ) | |
writetrace( str: in string , dat: in slv ) | |
wait_nextstim( signal clk: in slbit constant clk_dsc: in clock_dsc constant cnt: in positive 1 ) | |
wait_nextmoni( signal clk: in slbit constant clk_dsc: in clock_dsc constant cnt: in positive 1 ) | |
wait_stim2moni( signal clk: in slbit ,constant clk_dsc: in clock_dsc ) | |
wait_untilsignal( signal clk: in slbit constant clk_dsc: in clock_dsc signal sig: in slbit constant val: in slbit variable cnt: out natural ) | |
simfifo_put( cnt: inout natural arr: inout simfifo_type din: in std_logic_vector val: in slbit ' 1 ' ) | |
simfifo_get( cnt: inout natural arr: inout simfifo_type dout: out std_logic_vector ) | |
simfifo_writetest( L: inout line cnt: inout natural arr: inout simfifo_type dat: in std_logic_vector ) | |
simfifo_dump( cnt: inout natural arr: inout simfifo_type str: in string null_string ) |
Definition at line 330 of file simlib.vhd.
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Definition at line 332 of file simlib.vhd.
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Definition at line 346 of file simlib.vhd.
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Definition at line 404 of file simlib.vhd.
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Definition at line 470 of file simlib.vhd.
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Definition at line 550 of file simlib.vhd.
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Definition at line 573 of file simlib.vhd.
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Definition at line 592 of file simlib.vhd.
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Definition at line 627 of file simlib.vhd.
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Definition at line 648 of file simlib.vhd.
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Definition at line 663 of file simlib.vhd.
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Definition at line 684 of file simlib.vhd.
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Definition at line 698 of file simlib.vhd.
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Definition at line 714 of file simlib.vhd.
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Definition at line 730 of file simlib.vhd.
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Definition at line 751 of file simlib.vhd.
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Definition at line 767 of file simlib.vhd.
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Definition at line 783 of file simlib.vhd.
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Definition at line 799 of file simlib.vhd.
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Definition at line 815 of file simlib.vhd.
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Definition at line 832 of file simlib.vhd.
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Definition at line 848 of file simlib.vhd.
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Definition at line 885 of file simlib.vhd.
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Definition at line 902 of file simlib.vhd.
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Definition at line 936 of file simlib.vhd.
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Definition at line 952 of file simlib.vhd.
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Definition at line 1014 of file simlib.vhd.
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Definition at line 1032 of file simlib.vhd.
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Definition at line 1093 of file simlib.vhd.
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Definition at line 1155 of file simlib.vhd.
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Definition at line 1175 of file simlib.vhd.
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Definition at line 1199 of file simlib.vhd.
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Definition at line 1214 of file simlib.vhd.
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Definition at line 1232 of file simlib.vhd.
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Definition at line 1249 of file simlib.vhd.
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Definition at line 1264 of file simlib.vhd.
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Definition at line 1281 of file simlib.vhd.
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Definition at line 1298 of file simlib.vhd.
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Definition at line 1315 of file simlib.vhd.
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Definition at line 1331 of file simlib.vhd.
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Definition at line 1347 of file simlib.vhd.
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Definition at line 1359 of file simlib.vhd.
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Definition at line 1380 of file simlib.vhd.
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Definition at line 1410 of file simlib.vhd.
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Definition at line 1442 of file simlib.vhd.
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Definition at line 1469 of file simlib.vhd.