w11 - vhd 0.794
W11 CPU core and support modules
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Processes | |
proc_regs | ( CLK ) |
proc_next | ( R_REGS , EM_MREQ , FMISS , CMEM_TAG_DOA , CMEM_DOA_0 , CMEM_DOA_1 , CMEM_DOA_2 , CMEM_DOA_3 , MEM_BUSY , MEM_ACK_R , MEM_DO ) |
Constants | |
lwidth | positive := 22 - 2 - TWIDTH |
regs_init | regs_type := ( s_idle , ' 0 ' , slv ( to_unsigned ( 0 , lwidth ) ) , slv ( to_unsigned ( 0 , TWIDTH ) ) , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) ) |
Types | |
state_type | ( s_idle , s_read , s_rmiss , s_write ) |
Subtypes | |
t_range | integer range TWIDTH - 1 downto 0 |
l_range | integer range lwidth - 1 downto 0 |
af_tag | integer range 22 - 1 downto 22 - TWIDTH |
af_line | integer range 22 - TWIDTH - 1 downto 2 |
df_byte3 | integer range 31 downto 24 |
df_byte2 | integer range 23 downto 16 |
df_byte1 | integer range 15 downto 8 |
df_byte0 | integer range 7 downto 0 |
df_word1 | integer range 31 downto 16 |
df_word0 | integer range 15 downto 0 |
Signals | |
R_REGS | regs_type := regs_init |
N_REGS | regs_type |
CMEM_TAG_CEA | slbit := ' 0 ' |
CMEM_TAG_CEB | slbit := ' 0 ' |
CMEM_TAG_WEA | slbit := ' 0 ' |
CMEM_TAG_WEB | slbit := ' 0 ' |
CMEM_TAG_DIB | slv ( t_range ) := ( others = > ' 0 ' ) |
CMEM_TAG_DOA | slv ( t_range ) := ( others = > ' 0 ' ) |
CMEM_DAT_CEA | slbit := ' 0 ' |
CMEM_DAT_CEB | slbit := ' 0 ' |
CMEM_DAT_WEA | slv4 := " 0000 " |
CMEM_DAT_WEB | slv4 := " 0000 " |
CMEM_DIA_0 | slv9 := ( others = > ' 0 ' ) |
CMEM_DIA_1 | slv9 := ( others = > ' 0 ' ) |
CMEM_DIA_2 | slv9 := ( others = > ' 0 ' ) |
CMEM_DIA_3 | slv9 := ( others = > ' 0 ' ) |
CMEM_DIB_0 | slv9 := ( others = > ' 0 ' ) |
CMEM_DIB_1 | slv9 := ( others = > ' 0 ' ) |
CMEM_DIB_2 | slv9 := ( others = > ' 0 ' ) |
CMEM_DIB_3 | slv9 := ( others = > ' 0 ' ) |
CMEM_DOA_0 | slv9 := ( others = > ' 0 ' ) |
CMEM_DOA_1 | slv9 := ( others = > ' 0 ' ) |
CMEM_DOA_2 | slv9 := ( others = > ' 0 ' ) |
CMEM_DOA_3 | slv9 := ( others = > ' 0 ' ) |
Records | |
regs_type | |
state | state_type |
addr_w | slbit |
addr_l | slv ( l_range ) |
addr_t | slv ( t_range ) |
be | slv4 |
di | slv16 |
Instantiations | |
cmem_tag | ram_2swsr_rfirst_gen <Entity ram_2swsr_rfirst_gen> |
cmem_dat0 | ram_2swsr_rfirst_gen <Entity ram_2swsr_rfirst_gen> |
cmem_dat1 | ram_2swsr_rfirst_gen <Entity ram_2swsr_rfirst_gen> |
cmem_dat2 | ram_2swsr_rfirst_gen <Entity ram_2swsr_rfirst_gen> |
cmem_dat3 | ram_2swsr_rfirst_gen <Entity ram_2swsr_rfirst_gen> |
Definition at line 68 of file pdp11_cache.vhd.
proc_regs | ( | CLK | ) |
Definition at line 238 of file pdp11_cache.vhd.
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Process |
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Subtype |
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Subtype |
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Type |
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Record |
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Record |
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Constant |
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Signal |
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Instantiation |
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Instantiation |
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