w11 - vhd 0.794
W11 CPU core and support modules
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syn Architecture Reference
Architecture >> syn

Processes

proc_regs  ( CLK )
proc_next  ( R_REGS , EM_MREQ , FMISS , CMEM_TAG_DOA , CMEM_DOA_0 , CMEM_DOA_1 , CMEM_DOA_2 , CMEM_DOA_3 , MEM_BUSY , MEM_ACK_R , MEM_DO )

Constants

lwidth  positive := 22 - 2 - TWIDTH
regs_init  regs_type := ( s_idle , ' 0 ' , slv ( to_unsigned ( 0 , lwidth ) ) , slv ( to_unsigned ( 0 , TWIDTH ) ) , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) )

Types

state_type  ( s_idle , s_read , s_rmiss , s_write )

Subtypes

t_range  integer range TWIDTH - 1 downto 0
l_range  integer range lwidth - 1 downto 0
af_tag  integer range 22 - 1 downto 22 - TWIDTH
af_line  integer range 22 - TWIDTH - 1 downto 2
df_byte3  integer range 31 downto 24
df_byte2  integer range 23 downto 16
df_byte1  integer range 15 downto 8
df_byte0  integer range 7 downto 0
df_word1  integer range 31 downto 16
df_word0  integer range 15 downto 0

Signals

R_REGS  regs_type := regs_init
N_REGS  regs_type
CMEM_TAG_CEA  slbit := ' 0 '
CMEM_TAG_CEB  slbit := ' 0 '
CMEM_TAG_WEA  slbit := ' 0 '
CMEM_TAG_WEB  slbit := ' 0 '
CMEM_TAG_DIB  slv ( t_range ) := ( others = > ' 0 ' )
CMEM_TAG_DOA  slv ( t_range ) := ( others = > ' 0 ' )
CMEM_DAT_CEA  slbit := ' 0 '
CMEM_DAT_CEB  slbit := ' 0 '
CMEM_DAT_WEA  slv4 := " 0000 "
CMEM_DAT_WEB  slv4 := " 0000 "
CMEM_DIA_0  slv9 := ( others = > ' 0 ' )
CMEM_DIA_1  slv9 := ( others = > ' 0 ' )
CMEM_DIA_2  slv9 := ( others = > ' 0 ' )
CMEM_DIA_3  slv9 := ( others = > ' 0 ' )
CMEM_DIB_0  slv9 := ( others = > ' 0 ' )
CMEM_DIB_1  slv9 := ( others = > ' 0 ' )
CMEM_DIB_2  slv9 := ( others = > ' 0 ' )
CMEM_DIB_3  slv9 := ( others = > ' 0 ' )
CMEM_DOA_0  slv9 := ( others = > ' 0 ' )
CMEM_DOA_1  slv9 := ( others = > ' 0 ' )
CMEM_DOA_2  slv9 := ( others = > ' 0 ' )
CMEM_DOA_3  slv9 := ( others = > ' 0 ' )

Records

regs_type 
state state_type
addr_w slbit
addr_l slv ( l_range )
addr_t slv ( t_range )
be slv4
di slv16

Instantiations

cmem_tag  ram_2swsr_rfirst_gen <Entity ram_2swsr_rfirst_gen>
cmem_dat0  ram_2swsr_rfirst_gen <Entity ram_2swsr_rfirst_gen>
cmem_dat1  ram_2swsr_rfirst_gen <Entity ram_2swsr_rfirst_gen>
cmem_dat2  ram_2swsr_rfirst_gen <Entity ram_2swsr_rfirst_gen>
cmem_dat3  ram_2swsr_rfirst_gen <Entity ram_2swsr_rfirst_gen>

Detailed Description

Definition at line 68 of file pdp11_cache.vhd.

Member Function/Procedure/Process Documentation

◆ proc_regs()

proc_regs (   CLK)

Definition at line 238 of file pdp11_cache.vhd.

◆ proc_next()

proc_next (   R_REGS ,
  EM_MREQ ,
  FMISS ,
  CMEM_TAG_DOA ,
  CMEM_DOA_0 ,
  CMEM_DOA_1 ,
  CMEM_DOA_2 ,
  CMEM_DOA_3 ,
  MEM_BUSY ,
  MEM_ACK_R ,
  MEM_DO  
)
Process

Definition at line 251 of file pdp11_cache.vhd.

Member Data Documentation

◆ lwidth

lwidth positive := 22 - 2 - TWIDTH
Constant

Definition at line 70 of file pdp11_cache.vhd.

◆ t_range

t_range integer range TWIDTH - 1 downto 0
Subtype

Definition at line 72 of file pdp11_cache.vhd.

◆ l_range

l_range integer range lwidth - 1 downto 0
Subtype

Definition at line 73 of file pdp11_cache.vhd.

◆ af_tag

af_tag integer range 22 - 1 downto 22 - TWIDTH
Subtype

Definition at line 75 of file pdp11_cache.vhd.

◆ af_line

af_line integer range 22 - TWIDTH - 1 downto 2
Subtype

Definition at line 76 of file pdp11_cache.vhd.

◆ df_byte3

df_byte3 integer range 31 downto 24
Subtype

Definition at line 78 of file pdp11_cache.vhd.

◆ df_byte2

df_byte2 integer range 23 downto 16
Subtype

Definition at line 79 of file pdp11_cache.vhd.

◆ df_byte1

df_byte1 integer range 15 downto 8
Subtype

Definition at line 80 of file pdp11_cache.vhd.

◆ df_byte0

df_byte0 integer range 7 downto 0
Subtype

Definition at line 81 of file pdp11_cache.vhd.

◆ df_word1

df_word1 integer range 31 downto 16
Subtype

Definition at line 83 of file pdp11_cache.vhd.

◆ df_word0

df_word0 integer range 15 downto 0
Subtype

Definition at line 84 of file pdp11_cache.vhd.

◆ state_type

state_type ( s_idle , s_read , s_rmiss , s_write )
Type

Definition at line 86 of file pdp11_cache.vhd.

◆ regs_type

regs_type
Record

Definition at line 93 of file pdp11_cache.vhd.

◆ state

state state_type
Record

Definition at line 94 of file pdp11_cache.vhd.

◆ addr_w

addr_w slbit
Record

Definition at line 95 of file pdp11_cache.vhd.

◆ addr_l

addr_l slv ( l_range )
Record

Definition at line 96 of file pdp11_cache.vhd.

◆ addr_t

addr_t slv ( t_range )
Record

Definition at line 97 of file pdp11_cache.vhd.

◆ be

be slv4
Record

Definition at line 98 of file pdp11_cache.vhd.

◆ di

di slv16
Record

Definition at line 99 of file pdp11_cache.vhd.

◆ regs_init

regs_init regs_type := ( s_idle , ' 0 ' , slv ( to_unsigned ( 0 , lwidth ) ) , slv ( to_unsigned ( 0 , TWIDTH ) ) , ( others = > ' 0 ' ) , ( others = > ' 0 ' ) )
Constant

Definition at line 102 of file pdp11_cache.vhd.

◆ R_REGS

Definition at line 111 of file pdp11_cache.vhd.

◆ N_REGS

N_REGS regs_type
Signal

Definition at line 112 of file pdp11_cache.vhd.

◆ CMEM_TAG_CEA

CMEM_TAG_CEA slbit := ' 0 '
Signal

Definition at line 114 of file pdp11_cache.vhd.

◆ CMEM_TAG_CEB

CMEM_TAG_CEB slbit := ' 0 '
Signal

Definition at line 115 of file pdp11_cache.vhd.

◆ CMEM_TAG_WEA

CMEM_TAG_WEA slbit := ' 0 '
Signal

Definition at line 116 of file pdp11_cache.vhd.

◆ CMEM_TAG_WEB

CMEM_TAG_WEB slbit := ' 0 '
Signal

Definition at line 117 of file pdp11_cache.vhd.

◆ CMEM_TAG_DIB

CMEM_TAG_DIB slv ( t_range ) := ( others = > ' 0 ' )
Signal

Definition at line 118 of file pdp11_cache.vhd.

◆ CMEM_TAG_DOA

CMEM_TAG_DOA slv ( t_range ) := ( others = > ' 0 ' )
Signal

Definition at line 119 of file pdp11_cache.vhd.

◆ CMEM_DAT_CEA

CMEM_DAT_CEA slbit := ' 0 '
Signal

Definition at line 120 of file pdp11_cache.vhd.

◆ CMEM_DAT_CEB

CMEM_DAT_CEB slbit := ' 0 '
Signal

Definition at line 121 of file pdp11_cache.vhd.

◆ CMEM_DAT_WEA

CMEM_DAT_WEA slv4 := " 0000 "
Signal

Definition at line 122 of file pdp11_cache.vhd.

◆ CMEM_DAT_WEB

CMEM_DAT_WEB slv4 := " 0000 "
Signal

Definition at line 123 of file pdp11_cache.vhd.

◆ CMEM_DIA_0

CMEM_DIA_0 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 124 of file pdp11_cache.vhd.

◆ CMEM_DIA_1

CMEM_DIA_1 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 125 of file pdp11_cache.vhd.

◆ CMEM_DIA_2

CMEM_DIA_2 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 126 of file pdp11_cache.vhd.

◆ CMEM_DIA_3

CMEM_DIA_3 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 127 of file pdp11_cache.vhd.

◆ CMEM_DIB_0

CMEM_DIB_0 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 128 of file pdp11_cache.vhd.

◆ CMEM_DIB_1

CMEM_DIB_1 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 129 of file pdp11_cache.vhd.

◆ CMEM_DIB_2

CMEM_DIB_2 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 130 of file pdp11_cache.vhd.

◆ CMEM_DIB_3

CMEM_DIB_3 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 131 of file pdp11_cache.vhd.

◆ CMEM_DOA_0

CMEM_DOA_0 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 132 of file pdp11_cache.vhd.

◆ CMEM_DOA_1

CMEM_DOA_1 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 133 of file pdp11_cache.vhd.

◆ CMEM_DOA_2

CMEM_DOA_2 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 134 of file pdp11_cache.vhd.

◆ CMEM_DOA_3

CMEM_DOA_3 slv9 := ( others = > ' 0 ' )
Signal

Definition at line 135 of file pdp11_cache.vhd.

◆ cmem_tag

cmem_tag ram_2swsr_rfirst_gen
Instantiation

Definition at line 160 of file pdp11_cache.vhd.

◆ cmem_dat0

cmem_dat0 ram_2swsr_rfirst_gen
Instantiation

Definition at line 179 of file pdp11_cache.vhd.

◆ cmem_dat1

cmem_dat1 ram_2swsr_rfirst_gen
Instantiation

Definition at line 198 of file pdp11_cache.vhd.

◆ cmem_dat2

cmem_dat2 ram_2swsr_rfirst_gen
Instantiation

Definition at line 217 of file pdp11_cache.vhd.

◆ cmem_dat3

cmem_dat3 ram_2swsr_rfirst_gen
Instantiation

Definition at line 236 of file pdp11_cache.vhd.


The documentation for this design unit was generated from the following file: