w11 - vhd 0.794
W11 CPU core and support modules
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cmoda7lib.vhd
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1-- $Id: cmoda7lib.vhd 1181 2019-07-08 17:00:50Z mueller $
2-- SPDX-License-Identifier: GPL-3.0-or-later
3-- Copyright 2017- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4--
5------------------------------------------------------------------------------
6-- Package Name: cmoda7lib
7-- Description: CmodA7 components
8--
9-- Dependencies: -
10-- Tool versions: viv 2016.4-2017.1; ghdl 0.34
11--
12-- Revision History:
13-- Date Rev Version Comment
14-- 2017-06-11 912 1.1 add c7_sram_memctl
15-- 2017-06-04 906 1.0 Initial version
16------------------------------------------------------------------------------
17
18library ieee;
19use ieee.std_logic_1164.all;
20
21use work.slvtypes.all;
22
23package cmoda7lib is
24
25component cmoda7_aif is -- CmodA7, abstract iface, base
26 port (
27 I_CLK12 : in slbit; -- 12 MHz clock
28 I_RXD : in slbit; -- receive data (board view)
29 O_TXD : out slbit; -- transmit data (board view)
30 I_BTN : in slv2; -- c7 buttons
31 O_LED : out slv2; -- c7 leds
32 O_RGBLED0_N: out slv3 -- c7 rgb-led 0 (act.low)
33 );
34end component;
35
36component cmoda7_sram_aif is -- CmodA7, abstract iface, base+sram
37 port (
38 I_CLK12 : in slbit; -- 12 MHz clock
39 I_RXD : in slbit; -- receive data (board view)
40 O_TXD : out slbit; -- transmit data (board view)
41 I_BTN : in slv2; -- c7 buttons
42 O_LED : out slv2; -- c7 leds
43 O_RGBLED0_N: out slv3; -- c7 rgb-led 0 (act.low)
44 O_MEM_CE_N : out slbit; -- sram: chip enable (act.low)
45 O_MEM_WE_N : out slbit; -- sram: write enable (act.low)
46 O_MEM_OE_N : out slbit; -- sram: output enable (act.low)
47 O_MEM_ADDR : out slv19; -- sram: address lines
48 IO_MEM_DATA : inout slv8 -- sram: data lines
49 );
50end component;
51
52component c7_sram_memctl is -- SRAM controller
53 port (
54 CLK : in slbit; -- clock
55 RESET : in slbit; -- reset
56 REQ : in slbit; -- request
57 WE : in slbit; -- write enable
58 BUSY : out slbit; -- controller busy
59 ACK_R : out slbit; -- acknowledge read
60 ACK_W : out slbit; -- acknowledge write
61 ACT_R : out slbit; -- signal active read
62 ACT_W : out slbit; -- signal active write
63 ADDR : in slv17; -- address
64 BE : in slv4; -- byte enable
65 DI : in slv32; -- data in (memory view)
66 DO : out slv32; -- data out (memory view)
67 O_MEM_CE_N : out slbit; -- sram: chip enable (act.low)
68 O_MEM_WE_N : out slbit; -- sram: write enable (act.low)
69 O_MEM_OE_N : out slbit; -- sram: output enable (act.low)
70 O_MEM_ADDR : out slv19; -- sram: address lines
71 IO_MEM_DATA : inout slv8 -- sram: data lines
72 );
73end component;
74
75end package cmoda7lib;
out ACT_W slbit
out O_MEM_WE_N slbit
inout IO_MEM_DATA slv8
out ACK_R slbit
out BUSY slbit
out O_MEM_CE_N slbit
out ACT_R slbit
out ACK_W slbit
out O_MEM_OE_N slbit
out O_MEM_ADDR slv19
std_logic_vector( 18 downto 0) slv19
Definition: slvtypes.vhd:52
std_logic_vector( 3 downto 0) slv4
Definition: slvtypes.vhd:36
std_logic_vector( 16 downto 0) slv17
Definition: slvtypes.vhd:50
std_logic_vector( 31 downto 0) slv32
Definition: slvtypes.vhd:59
std_logic slbit
Definition: slvtypes.vhd:30
std_logic_vector( 7 downto 0) slv8
Definition: slvtypes.vhd:40