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W11 CPU core and support modules
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dcm_sfs_gsim.vhd
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-- $Id: dcm_sfs_gsim.vhd 1181 2019-07-08 17:00:50Z mueller $
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-- SPDX-License-Identifier: GPL-3.0-or-later
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-- Copyright 2010-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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------------------------------------------------------------------------------
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-- Module Name: dcm_sfs - sim
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-- Description: DCM for simple frequency synthesis
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-- simple vhdl model, without Xilinx UNISIM primitives
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--
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-- Dependencies: -
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-- Test bench: -
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-- Target Devices: generic Spartan-3A,-3E
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-- Tool versions: xst 12.1-14.7; ghdl 0.29-0.34
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--
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-- Revision History:
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-- Date Rev Version Comment
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-- 2018-11-03 1065 1.1 use sfs_gsim_core
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-- 2011-11-17 426 1.0.1 rename dcm_sp_sfs -> dcm_sfs
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-- 2010-11-12 338 1.0 Initial version
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------------------------------------------------------------------------------
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library
ieee
;
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use
ieee.std_logic_1164.
all
;
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use
work.
slvtypes
.
all
;
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use
work.
xlib
.
all
;
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entity
dcm_sfs
is
-- DCM for simple frequency synthesis
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generic
(
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CLKFX_DIVIDE
:
positive
:=
1
;
-- FX clock divide (1-32)
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CLKFX_MULTIPLY
:
positive
:=
1
;
-- FX clock multiply (2-32) (1->no DCM)
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CLKIN_PERIOD
:
real
:=
20
.
0
)
;
-- CLKIN period (def is 20.0 ns)
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port
(
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CLKIN
:
in
slbit
;
-- clock input
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CLKFX
:
out
slbit
;
-- clock output (synthesized freq.)
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LOCKED
:
out
slbit
-- dcm locked
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)
;
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end
dcm_sfs
;
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architecture
sim
of
dcm_sfs
is
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begin
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-- generate clock
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SFS:
sfs_gsim_core
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generic
map
(
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VCO_DIVIDE
=>
1
,
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VCO_MULTIPLY
=>
CLKFX_MULTIPLY
,
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OUT_DIVIDE
=>
CLKFX_DIVIDE
)
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port
map
(
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CLKIN
=>
CLKIN
,
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CLKFX
=>
CLKFX
,
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LOCKED
=>
LOCKED
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)
;
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end
sim
;
dcm_sfs.sim
Definition:
dcm_sfs_gsim.vhd:41
dcm_sfs
Definition:
dcm_sfs_gsim.vhd:28
dcm_sfs.CLKFX_DIVIDE
CLKFX_DIVIDE positive := 1
Definition:
dcm_sfs_gsim.vhd:30
dcm_sfs.CLKIN
in CLKIN slbit
Definition:
dcm_sfs_gsim.vhd:34
dcm_sfs.CLKFX_MULTIPLY
CLKFX_MULTIPLY positive := 1
Definition:
dcm_sfs_gsim.vhd:31
dcm_sfs.LOCKED
out LOCKED slbit
Definition:
dcm_sfs_gsim.vhd:37
dcm_sfs.CLKIN_PERIOD
CLKIN_PERIOD real := 20.0
Definition:
dcm_sfs_gsim.vhd:32
dcm_sfs.CLKFX
out CLKFX slbit
Definition:
dcm_sfs_gsim.vhd:35
sfs_gsim_core
Definition:
sfs_gsim_core.vhd:25
sfs_gsim_core.VCO_DIVIDE
VCO_DIVIDE positive := 1
Definition:
sfs_gsim_core.vhd:27
sfs_gsim_core.OUT_DIVIDE
OUT_DIVIDE positive := 1
Definition:
sfs_gsim_core.vhd:29
sfs_gsim_core.CLKIN
in CLKIN slbit
Definition:
sfs_gsim_core.vhd:31
sfs_gsim_core.VCO_MULTIPLY
VCO_MULTIPLY positive := 1
Definition:
sfs_gsim_core.vhd:28
sfs_gsim_core.LOCKED
out LOCKED slbit
Definition:
sfs_gsim_core.vhd:34
sfs_gsim_core.CLKFX
out CLKFX slbit
Definition:
sfs_gsim_core.vhd:32
slvtypes
Definition:
slvtypes.vhd:28
slvtypes.slbit
std_logic slbit
Definition:
slvtypes.vhd:30
xlib
Definition:
xlib.vhd:35
vlib
xlib
dcm_sfs_gsim.vhd
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