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W11 CPU core and support modules
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ib_sres_or_mon.vhd
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1-- $Id: ib_sres_or_mon.vhd 1181 2019-07-08 17:00:50Z mueller $
2-- SPDX-License-Identifier: GPL-3.0-or-later
3-- Copyright 2010- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4--
5------------------------------------------------------------------------------
6-- Module Name: ib_sres_or_mon - sim
7-- Description: ibus result or monitor
8--
9-- Dependencies: -
10-- Test bench: -
11-- Tool versions: ghdl 0.29-0.31
12--
13-- Revision History:
14-- Date Rev Version Comment
15-- 2010-10-28 336 1.0.1 log errors only if now>0ns (drop startup glitches)
16-- 2010-10-23 335 1.0 Initial version (derived from rritb_sres_or_mon)
17------------------------------------------------------------------------------
18
19library ieee;
20use ieee.std_logic_1164.all;
21use ieee.std_logic_textio.all;
22use std.textio.all;
23
24use work.slvtypes.all;
25use work.iblib.all;
26
27-- ----------------------------------------------------------------------------
28
29entity ib_sres_or_mon is -- ibus result or monitor
30 port (
31 IB_SRES_1 : in ib_sres_type; -- ib_sres input 1
32 IB_SRES_2 : in ib_sres_type; -- ib_sres input 2
33 IB_SRES_3 : in ib_sres_type := ib_sres_init; -- ib_sres input 3
34 IB_SRES_4 : in ib_sres_type := ib_sres_init -- ib_sres input 4
35 );
37
38architecture sim of ib_sres_or_mon is
39
40begin
41
42 proc_comb : process (IB_SRES_1, IB_SRES_2, IB_SRES_3, IB_SRES_4)
43 constant dzero: slv16 := (others=>'0');
44 variable oline : line;
45 variable nack : integer := 0;
46 variable nbusy : integer := 0;
47 variable ndout : integer := 0;
48 begin
49
50 nack := 0;
51 nbusy := 0;
52 ndout := 0;
53
54 if IB_SRES_1.ack /= '0' then nack := nack + 1; end if;
55 if IB_SRES_2.ack /= '0' then nack := nack + 1; end if;
56 if IB_SRES_3.ack /= '0' then nack := nack + 1; end if;
57 if IB_SRES_4.ack /= '0' then nack := nack + 1; end if;
58
59 if IB_SRES_1.busy /= '0' then nbusy := nbusy + 1; end if;
60 if IB_SRES_2.busy /= '0' then nbusy := nbusy + 1; end if;
61 if IB_SRES_3.busy /= '0' then nbusy := nbusy + 1; end if;
62 if IB_SRES_4.busy /= '0' then nbusy := nbusy + 1; end if;
63
64 if IB_SRES_1.dout /= dzero then ndout := ndout + 1; end if;
65 if IB_SRES_2.dout /= dzero then ndout := ndout + 1; end if;
66 if IB_SRES_3.dout /= dzero then ndout := ndout + 1; end if;
67 if IB_SRES_4.dout /= dzero then ndout := ndout + 1; end if;
68
69 if now > 0 ns and (nack>1 or nbusy>1 or ndout>1) then
70 write(oline, now, right, 12);
71 if nack > 1 then
72 write(oline, string'(" #ack="));
73 write(oline, nack);
74 end if;
75 if nbusy > 1 then
76 write(oline, string'(" #busy="));
77 write(oline, nbusy);
78 end if;
79 if ndout > 1 then
80 write(oline, string'(" #dout="));
81 write(oline, ndout);
82 end if;
83 write(oline, string'(" FAIL in "));
84 write(oline, ib_sres_or_mon'path_name);
85 writeline(output, oline);
86 end if;
87
88 end process proc_comb;
89
90end sim;
in IB_SRES_2 ib_sres_type
in IB_SRES_3 ib_sres_type := ib_sres_init
in IB_SRES_4 ib_sres_type := ib_sres_init
in IB_SRES_1 ib_sres_type
Definition: iblib.vhd:33
std_logic_vector( 15 downto 0) slv16
Definition: slvtypes.vhd:48