121use ieee.std_logic_1164.
all;
122use ieee.numeric_std.
all;
320 '0','0','0','0','0','0',
351 report "assert(AWIDTH>=8 and AWIDTH<=11): unsupported AWIDTH"
399 ADDRA => R_REGS.mal_waddr,
400 ADDRB => R_REGS.mal_raddr,
408 if rising_edge(CLK) then
416 end process proc_regs;
425 variable irb_ack : slbit := '0';
426 variable irb_err : slbit := '0';
427 variable irb_busy : slbit := '0';
428 variable irb_dout : slv16 := (others=>'0');
429 variable irbena : slbit := '0';
430 variable ibramen : slbit := '0';
431 variable ibramwe : slbit := '0';
432 variable igoeff : slbit := '0';
433 variable iactive : slbit := '0';
434 variable itake : slbit := '0';
435 variable laddr_inc : slbit := '0';
436 variable idat : slv(143 downto 0) := (others=>'0');
437 variable idat8 : slv16 := (others=>'0');
438 variable idat7 : slv16 := (others=>'0');
439 variable idat5 : slv16 := (others=>'0');
440 variable ivmerr : slv3 := (others=>'0');
442 variable imal_we : slbit := '0';
443 variable imal_re : slbit := '0';
444 variable imal_di : slv16 := (others=>'0');
445 variable imal_waddr_clr : slbit := '0';
446 variable imal_raddr_clr : slbit := '0';
456 irb_dout := (others=>'0');
470 imal_di := r.vm_addr;
471 imal_waddr_clr := '0';
472 imal_raddr_clr := '0';
482 if r.rbsel = '1' then
484 case RB_MREQ.addr(2 downto 0) is
531 if RB_MREQ.re = '1' and r.go = '0' then
532 if r.waddr(3) = '1' then
533 n.waddr := (others=>'0');
536 n.waddr := slv(unsigned(r.waddr) + 1);
558 if r.rbsel = '1' then
559 case RB_MREQ.addr(2 downto 0) is
591 when others => irb_dout := (others=>'0');
598 irb_dout(r.dp_pc_dec'range) := r.dp_pc_dec;
599 n.mal_raddr := (others=>'0');
602 irb_dout := r.dp_ireg;
619 n.dp_ireg_we_1 := r.dp_ireg_we;
620 if r.dp_ireg_we = '1' then
621 n.dp_pc_dec := r.dp_pc_fet;
626 n.dp_dres_val := '0';
632 n.dp_dres_val := '1';
640 n.vm_wacc_1 := r.vm_wacc;
641 n.vm_macc_1 := r.vm_macc;
642 n.vm_cacc_1 := r.vm_cacc;
643 n.vm_bytop_1 := r.vm_bytop;
644 n.vm_dspace_1 := r.vm_dspace;
651 n.vm_addr_1 := r.vm_addr;
659 n.vm_dout_1 := r.vm_dout;
668 n.vm_err_iobto := DM_STAT_VM.vmstat.err_iobto;
672 n.se_istart_1 := r.se_istart;
691 if r.se_idle = '1' then
702 if r.vm_req = '1' then
705 elsif (r.vm_ack or r.vm_err) = '1' then
710 if r.imode = '0' then
712 if r.mwsup = '1' then
713 if (r.vm_pend and not (r.vm_ack or r.vm_err)) = '1' then
719 itake := r.se_idone or r.se_vstart or r.vm_err;
722 if iactive='1' and itake='1' then
728 if laddr_inc = '1' then
729 n.laddr := slv(unsigned(r.laddr) + 1);
732 if r.wstop = '1' then
739 n.cnum := slv(unsigned(r.cnum) + 1);
742 idat := (others=>'0');
745 ivmerr := (others=>'0');
746 if r.vm_err_odd = '1' then
748 elsif r.vm_err_mmu = '1' then
750 elsif r.vm_err_nxm = '1' then
752 elsif r.vm_err_iobto = '1' then
754 elsif r.vm_err_rsv = '1' then
766 idat8 := (others=>'0');
767 if r.vm_req = '1' or (r.imode='1' and r.vm_err='0') then
769 if r.imode = '1' and (r.se_istart='1' or r.se_istart_1='1') then
785 if r.vm_ack = '1' then
789 elsif r.vm_err = '1' then
796 if r.imode = '0' then
804 idat7 := (others=>'0');
813 idat5 := (others=>'0');
817 if r.imode = '0' then
835 if r.imode = '1' and (r.se_istart='1' or r.se_istart_1='1') then
842 if r.vm_wacc = '1' then
845 if r.imode = '1' and r.se_istart_1 = '1' and r.vm_ack = '1' then
853 if r.vm_cacc = '0' then
854 if r.vm_req = '1' then
856 imal_di := r.vm_addr;
857 elsif r.vm_ack='1' then
859 if r.vm_wacc='1' then
862 imal_di := r.vm_dout;
864 if r.vm_bytop = '1' then
865 imal_di(15 downto 8) := (others=>'0');
870 imal_waddr_clr := r.dp_ireg_we;
872 if imal_waddr_clr = '1' then
873 n.mal_waddr := (others=>'0');
874 elsif imal_we = '1' then
875 n.mal_waddr := slv(unsigned(r.mal_waddr) + 1);
878 if imal_raddr_clr = '1' then
879 n.mal_raddr := (others=>'0');
880 elsif imal_re = '1' then
881 n.mal_raddr := slv(unsigned(r.mal_raddr) + 1);
900 end process proc_next;
integer := 8 dat5_rbf_dsrc_we
integer := 8 dat5_rbf_vstart
slv3 := "100" rbaddr_iaddr
integer range 15 downto 14 dat5_rbf_cmode
integer range 127 downto 112 bram_df_word7
integer := 14 dat8_rbf_wacc
integer := 15 dat8_rbf_req
integer range 7 downto 5 dat5_rbf_pri
regs_type :=( '0', '0', '1', '0', '0', '1', '0', '0', laddrzero, "0000",( others => '0'),( others => '0'),( others => '0'),( others => '0'),( others => '0'),( others => '0'), '0', '0',( others => '0'), '0', '0', '0',( others => '0'),( others => '0'),( others => '0'), '0', '0', '0', '0', '0', '0',( others => '0'),( others => '0'), '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0',( others => '0'), '0') regs_init
integer range 111 downto 96 bram_df_word6
integer range 12 downto 10 dat8_rbf_vmerr
integer range 7 downto 0 dat8_rbf_cnum
integer := 14 dat8_rbf_ack
integer range 47 downto 32 bram_df_word2
integer := 2 stat_rbf_wrap
integer := 8 dat8_rbf_idone
integer range 95 downto 80 bram_df_word5
integer := 11 dat5_rbf_rset
integer range 13 downto 12 dat5_rbf_pmode
slv16 :=( others => '0') MAL_DO
integer := 10 dat5_rbf_dres_val
integer range 143 downto 108 bram_mf_port11
integer := 0 dat7_rbf_idecode
integer := 12 dat8_rbf_cacc
integer := 9 dat8_rbf_istart
regs_type := regs_init N_REGS
integer range 12 downto 9 stat_rbf_malcnt
integer := 8 stat_rbf_snum
slv3 := "111" rbaddr_imal
integer := 4 dat5_rbf_tflag
integer range 143 downto 128 bram_df_word8
integer range 31 downto 16 bram_df_word1
integer := 10 dat8_rbf_dspace
integer := 11 dat8_rbf_trap_mmu
slv3 := "000" rbaddr_cntl
integer := 13 dat8_rbf_err
slv3 := "001" rbaddr_stat
integer range 2 downto 0 cntl_rbf_func
slv( AWIDTH- 1 downto 0) :=( others => '1') laddrlast
slv3 := "010" rbaddr_addr
integer := 4 cntl_rbf_imode
slv( 143 downto 0) :=( others => '0') BRAM_DI
slv3 := "011" rbaddr_data
slv3 := "100" vmerr_iobto
integer := 13 dat8_rbf_macc
regs_type := regs_init R_REGS
integer range 71 downto 36 bram_mf_port01
integer := 11 dat8_rbf_bytop
integer := 3 cntl_rbf_wstop
slv( AWIDTH downto 0) :=( others => '0') BRAM_ADDRA
slv( AWIDTH downto 0) :=( others => '0') BRAM_ADDRB
integer := 12 dat8_rbf_trap_ysv
integer range 3 downto 0 addr_rbf_waddr
integer range 3 downto 0 dat5_rbf_cc
integer := 1 stat_rbf_susp
integer range 15 downto 0 bram_df_word0
integer := 10 dat8_rbf_mwdrop
integer := 5 cntl_rbf_mwsup
integer range 7 downto 0 dat8_rbf_snum
integer range 35 downto 0 bram_mf_port00
slv3 := "110" rbaddr_ireg
integer range 15 downto 13 stat_rbf_bsize
integer range 107 downto 72 bram_mf_port10
integer range 4+ AWIDTH- 1 downto 4 addr_rbf_laddr
integer range 63 downto 48 bram_df_word3
integer range 79 downto 64 bram_df_word4
slv( AWIDTH- 1 downto 0) :=( others => '0') laddrzero
slv16 :=( others => '0') MAL_DI
slv( 143 downto 0) :=( others => '0') BRAM_DO
integer := 9 dat5_rbf_ddst_we
integer := 0 stat_rbf_run
integer range 15 downto 1 dat7_rbf_pc
in DM_STAT_DP dm_stat_dp_type
in DM_STAT_CO dm_stat_co_type
RB_ADDR slv16 := rbaddr_dmcmon_off
in DM_STAT_SE dm_stat_se_type
in DM_STAT_VM dm_stat_vm_type
in DI slv( DWIDTH- 1 downto 0)
in ADDRB slv( AWIDTH- 1 downto 0)
in ADDRA slv( AWIDTH- 1 downto 0)
out DOB slv( DWIDTH- 1 downto 0)
out DOA slv( DWIDTH- 1 downto 0)
in DIA slv( DWIDTH- 1 downto 0)
in ADDRB slv( AWIDTH- 1 downto 0)
in ADDRA slv( AWIDTH- 1 downto 0)
out DOB slv( DWIDTH- 1 downto 0)
in DIB slv( DWIDTH- 1 downto 0)
out DOA slv( DWIDTH- 1 downto 0)
std_logic_vector( 3 downto 0) slv4
std_logic_vector( 2 downto 0) slv3
std_logic_vector( 15 downto 1) slv16_1
std_logic_vector( 15 downto 0) slv16
std_logic_vector( 7 downto 0) slv8