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W11 CPU core and support modules
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tst_serloop.vhd
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1-- $Id: tst_serloop.vhd 1203 2019-08-19 21:41:03Z mueller $
2-- SPDX-License-Identifier: GPL-3.0-or-later
3-- Copyright 2011-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4--
5------------------------------------------------------------------------------
6-- Module Name: tst_serloop - syn
7-- Description: simple stand-alone tester for serport components
8--
9-- Dependencies: -
10-- Test bench: -
11--
12-- Target Devices: generic
13-- Tool versions: ise 13.1-14.7; viv 2014.4-2019.1; ghdl 0.29-0.36
14--
15-- Revision History:
16-- Date Rev Version Comment
17-- 2019-08-17 1203 1.0.3 fix for ghdl V0.36 -Whide warnings
18-- 2011-12-10 438 1.0.2 clr fecnt when abact; add rxui(cnt|dat) regs
19-- 2011-12-09 437 1.0.1 rename serport stat->moni port
20-- 2011-11-06 420 1.0 Initial version
21-- 2011-10-14 416 0.5 First draft
22------------------------------------------------------------------------------
23
24library ieee;
25use ieee.std_logic_1164.all;
26use ieee.numeric_std.all;
27
28use work.slvtypes.all;
29use work.serportlib.all;
30use work.tst_serlooplib.all;
31
32-- ----------------------------------------------------------------------------
33
34entity tst_serloop is -- tester for serport components
35 port (
36 CLK : in slbit; -- clock
37 RESET : in slbit; -- reset
38 CE_MSEC : in slbit; -- msec pulse
39 HIO_CNTL : in hio_cntl_type; -- humanio controls
40 HIO_STAT : out hio_stat_type; -- humanio status
41 SER_MONI : in serport_moni_type; -- serport monitor
42 RXDATA : in slv8; -- receiver data out
43 RXVAL : in slbit; -- receiver data valid
44 RXHOLD : out slbit; -- receiver data hold
45 TXDATA : out slv8; -- transmit data in
46 TXENA : out slbit; -- transmit data enable
47 TXBUSY : in slbit -- transmit busy
48 );
49end tst_serloop;
50
51architecture syn of tst_serloop is
52
53 type regs_type is record
54 rxdata : slv8; -- next rx char
55 txdata : slv8; -- next tx char
56 rxfecnt : slv16; -- rx frame error counter
57 rxoecnt : slv16; -- rx overrun error counter
58 rxsecnt : slv16; -- rx sequence error counter
59 rxcnt : slv32; -- rx char counter
60 txcnt : slv32; -- tx char counter
61 rxuicnt : slv8; -- rx unsolicited input counter
62 rxuidat : slv8; -- rx unsolicited input data
63 rxokcnt : slv16; -- rxok 1->0 transition counter
64 txokcnt : slv16; -- txok 1->0 transition counter
65 rxok_1 : slbit; -- rxok last cycle
66 txok_1 : slbit; -- txok last cycle
67 rxthrottle : slbit; -- rx throttle flag
68 end record regs_type;
69
70 constant regs_init : regs_type := (
71 (others=>'0'), -- rxdata
72 (others=>'0'), -- txdata
73 (others=>'0'), -- rxfecnt
74 (others=>'0'), -- rxoecnt
75 (others=>'0'), -- rxsecnt
76 (others=>'0'), -- rxcnt
77 (others=>'0'), -- txcnt
78 (others=>'0'), -- rxuicnt
79 (others=>'0'), -- rxuidat
80 (others=>'0'), -- rxokcnt
81 (others=>'0'), -- txokcnt
82 '0','0', -- rxok_1,txok_1
83 '0' -- rxthrottle
84 );
85
86 signal R_REGS : regs_type := regs_init; -- state registers
87 signal N_REGS : regs_type := regs_init; -- next value state regs
88
89begin
90
91 proc_regs: process (CLK)
92 begin
93
94 if rising_edge(CLK) then
95 if RESET = '1' then
97 else
98 R_REGS <= N_REGS;
99 end if;
100 end if;
101
102 end process proc_regs;
103
104 proc_next: process (R_REGS, CE_MSEC, HIO_CNTL, SER_MONI,
106
107 variable r : regs_type := regs_init;
108 variable n : regs_type := regs_init;
109
110 variable irxhold : slbit := '1';
111 variable itxena : slbit := '0';
112 variable itxdata : slv8 := (others=>'0');
113 variable skipxon : slbit := '0';
114
115 function nextchar(pskipxon: in slbit; pdata: in slv8) return slv8 is
116 variable inc : slv8 := (others=>'0');
117 begin
118 inc := "00000001";
119 if pskipxon='1' and (pdata=c_serport_xon or pdata=c_serport_xoff) then
120 inc := "00000010";
121 end if;
122 return slv(unsigned(pdata)+unsigned(inc));
123 end function nextchar;
124
125 begin
126 r := R_REGS;
127 n := R_REGS;
128
129 irxhold := '1';
130 itxena := '0';
131
132 itxdata := RXDATA;
133 if HIO_CNTL.mode = c_mode_txblast then
134 itxdata := r.txdata;
135 end if;
136
137 skipxon := '0';
138 if HIO_CNTL.enaxon='1' and HIO_CNTL.enaesc='0' then
139 skipxon := '1';
140 end if;
141
142 if HIO_CNTL.enathrottle = '1' then
143 if CE_MSEC = '1' then
144 n.rxthrottle := not r.rxthrottle;
145 end if;
146 else
147 n.rxthrottle := '0';
148 end if;
149
150
151 case HIO_CNTL.mode is
152 when c_mode_idle =>
153 null;
154
155 when c_mode_rxblast =>
156 if RXVAL='1' and r.rxthrottle='0' then
157 irxhold := '0';
158 if RXDATA /= r.rxdata then
159 n.rxsecnt := slv(unsigned(r.rxsecnt) + 1);
160 end if;
161 n.rxdata := nextchar(skipxon, RXDATA);
162 end if;
163
164 when c_mode_txblast =>
165 if TXBUSY = '0' then
166 itxena := '1';
167 n.txdata := nextchar(skipxon, r.txdata);
168 end if;
169 irxhold := '0';
170 if RXVAL = '1' then
171 n.rxuicnt := slv(unsigned(r.rxuicnt) + 1);
172 n.rxuidat := RXDATA;
173 end if;
174
175 when c_mode_loop =>
176 if RXVAL='1' and r.rxthrottle='0' and TXBUSY = '0' then
177 irxhold := '0';
178 itxena := '1';
179 end if;
180
181 when others => null;
182 end case;
183
184 if SER_MONI.abact = '1' then -- if auto bauder active
185 n.rxfecnt := (others=>'0'); -- reset frame error counter
186 else -- otherwise
187 if SER_MONI.rxerr = '1' then -- count rx frame errors
188 n.rxfecnt := slv(unsigned(r.rxfecnt) + 1);
189 end if;
190 end if;
191
192 if SER_MONI.rxovr = '1' then
193 n.rxoecnt := slv(unsigned(r.rxoecnt) + 1);
194 end if;
195
196 if RXVAL='1' and irxhold='0' then
197 n.rxcnt := slv(unsigned(r.rxcnt) + 1);
198 end if;
199
200 if itxena = '1' then
201 n.txcnt := slv(unsigned(r.txcnt) + 1);
202 end if;
203
204 n.rxok_1 := SER_MONI.rxok;
205 n.txok_1 := SER_MONI.txok;
206
207 if SER_MONI.rxok='0' and r.rxok_1='1' then
208 n.rxokcnt := slv(unsigned(r.rxokcnt) + 1);
209 end if;
210 if SER_MONI.txok='0' and r.txok_1='1' then
211 n.txokcnt := slv(unsigned(r.txokcnt) + 1);
212 end if;
213
214 N_REGS <= n;
215
216 RXHOLD <= irxhold;
217 TXENA <= itxena;
218 TXDATA <= itxdata;
219
220 HIO_STAT.rxfecnt <= r.rxfecnt;
221 HIO_STAT.rxoecnt <= r.rxoecnt;
222 HIO_STAT.rxsecnt <= r.rxsecnt;
223 HIO_STAT.rxcnt <= r.rxcnt;
224 HIO_STAT.txcnt <= r.txcnt;
225 HIO_STAT.rxuicnt <= r.rxuicnt;
226 HIO_STAT.rxuidat <= r.rxuidat;
227 HIO_STAT.rxokcnt <= r.rxokcnt;
228 HIO_STAT.txokcnt <= r.txokcnt;
229
230 end process proc_next;
231
232end syn;
std_logic_vector( 31 downto 0) slv32
Definition: slvtypes.vhd:59
std_logic_vector( 15 downto 0) slv16
Definition: slvtypes.vhd:48
std_logic slbit
Definition: slvtypes.vhd:30
std_logic_vector( 7 downto 0) slv8
Definition: slvtypes.vhd:40
std_logic_vector slv
Definition: slvtypes.vhd:31
slv8 nextcharpskipxon,pdata,
regs_type := regs_init N_REGS
Definition: tst_serloop.vhd:87
regs_type :=(( others => '0'),( others => '0'),( others => '0'),( others => '0'),( others => '0'),( others => '0'),( others => '0'),( others => '0'),( others => '0'),( others => '0'),( others => '0'), '0', '0', '0') regs_init
Definition: tst_serloop.vhd:70
regs_type := regs_init R_REGS
Definition: tst_serloop.vhd:86
in TXBUSY slbit
Definition: tst_serloop.vhd:48
in RESET slbit
Definition: tst_serloop.vhd:37
in RXDATA slv8
Definition: tst_serloop.vhd:42
in SER_MONI serport_moni_type
Definition: tst_serloop.vhd:41
out TXDATA slv8
Definition: tst_serloop.vhd:45
in CLK slbit
Definition: tst_serloop.vhd:36
out HIO_STAT hio_stat_type
Definition: tst_serloop.vhd:40
out RXHOLD slbit
Definition: tst_serloop.vhd:44
in RXVAL slbit
Definition: tst_serloop.vhd:43
in HIO_CNTL hio_cntl_type
Definition: tst_serloop.vhd:39
out TXENA slbit
Definition: tst_serloop.vhd:46
in CE_MSEC slbit
Definition: tst_serloop.vhd:38