71use ieee.std_logic_1164.
all;
72use ieee.numeric_std.
all;
119 if rising_edge(CLK) then
127 end process proc_regs;
134 variable icntl : hio_cntl_type := hio_cntl_init;
135 variable iled : slv8 := (others=>'0');
136 variable idat : slv16 := (others=>'0');
137 variable idp : slv4 := (others=>'0');
144 icntl := hio_cntl_init;
145 iled := (others=>'0');
146 idat := (others=>'0');
147 idp := (others=>'0');
154 n.enathrottle := SWI(6);
160 icntl.mode := SWI(2 downto 1);
161 icntl.enaxon := r.enaxon;
162 icntl.enaesc := r.enaesc;
163 icntl.enathrottle := r.enathrottle;
164 icntl.enaftdi := r.enaftdi;
167 iled(7) := icntl.enaesc;
168 iled(6) := icntl.enaxon;
169 if unsigned(HIO_STAT.rxfecnt) > 0 then iled(5) := '1';
end if;
170 if unsigned(HIO_STAT.rxoecnt) > 0 then iled(4) := '1';
end if;
171 if unsigned(HIO_STAT.rxsecnt) > 0 then iled(3) := '1';
end if;
178 case SWI(7 downto 4) is
179 when "0000" => idat := HIO_STAT.rxfecnt;
180 when "0001" => idat := HIO_STAT.rxoecnt;
181 when "0010" => idat := HIO_STAT.rxsecnt;
182 when "0100" => idat := HIO_STAT.rxcnt(15 downto 0);
183 when "0101" => idat := HIO_STAT.rxcnt(31 downto 16);
184 when "0110" => idat := HIO_STAT.txcnt(15 downto 0);
185 when "0111" => idat := HIO_STAT.txcnt(31 downto 16);
186 when "1000" => idat := HIO_STAT.rxokcnt;
187 when "1001" => idat := HIO_STAT.txokcnt;
189 when "1111" => idat := SER_MONI.abclkdiv;
208 end process proc_next;
std_logic_vector( 3 downto 0) slv4
std_logic_vector( 15 downto 0) slv16
std_logic_vector( 7 downto 0) slv8
regs_type := regs_init N_REGS
regs_type :=( '0', '0', '0', '0',( others => '0')) regs_init
regs_type := regs_init R_REGS
in HIO_STAT hio_stat_type
in SER_MONI serport_moni_type
out HIO_CNTL hio_cntl_type