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W11 CPU core and support modules
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bp_rs232_2l4l_iob.vhd
Go to the documentation of this file.
1
-- $Id: bp_rs232_2l4l_iob.vhd 1181 2019-07-08 17:00:50Z mueller $
2
-- SPDX-License-Identifier: GPL-3.0-or-later
3
-- Copyright 2010-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4
--
5
------------------------------------------------------------------------------
6
-- Module Name: bp_rs232_2l4l_iob - syn
7
-- Description: iob's for internal(2line) + external(4line) rs232, with select
8
--
9
-- Dependencies: bp_rs232_2line_iob
10
-- bp_rs232_4line_iob
11
--
12
-- Test bench: -
13
--
14
-- Target Devices: generic
15
-- Tool versions: xst 12.1-14,7; ghdl 0.26-0.31
16
--
17
-- Revision History:
18
-- Date Rev Version Comment
19
-- 2011-08-14 406 1.2.2 fix mistake in tx and rts relay
20
-- 2011-08-07 404 1.2.1 add RELAY generic and a relay stage towards IOB's
21
-- 2011-08-06 403 1.2 add pipeline flops; add RESET signal
22
-- 2011-07-09 391 1.1 moved and renamed to bpgen
23
-- 2011-07-02 387 1.0.1 use bp_rs232_[24]line_iob now
24
-- 2010-04-17 278 1.0 Initial version
25
------------------------------------------------------------------------------
26
--
27
28
library
ieee
;
29
use
ieee.std_logic_1164.
all
;
30
31
use
work.
slvtypes
.
all
;
32
use
work.
bpgenlib
.
all
;
33
34
-- ----------------------------------------------------------------------------
35
36
entity
bp_rs232_2l4l_iob
is
-- iob's for dual 2l+4l rs232, w/ select
37
generic
(
38
RELAY
:
boolean
:=
false
)
;
-- add a relay stage towards IOB's
39
port
(
40
CLK
:
in
slbit
;
-- clock
41
RESET
:
in
slbit
:=
'
0
'
;
-- reset
42
SEL
:
in
slbit
;
-- select, '0' for port 0
43
RXD
:
out
slbit
;
-- receive data (board view)
44
TXD
:
in
slbit
;
-- transmit data (board view)
45
CTS_N
:
out
slbit
;
-- clear to send (act. low)
46
RTS_N
:
in
slbit
;
-- request to send (act. low)
47
I_RXD0
:
in
slbit
;
-- pad-i: p0: receive data (board view)
48
O_TXD0
:
out
slbit
;
-- pad-o: p0: transmit data (board view)
49
I_RXD1
:
in
slbit
;
-- pad-i: p1: receive data (board view)
50
O_TXD1
:
out
slbit
;
-- pad-o: p1: transmit data (board view)
51
I_CTS1_N
:
in
slbit
;
-- pad-i: p1: clear to send (act. low)
52
O_RTS1_N
:
out
slbit
-- pad-o: p1: request to send (act. low)
53
)
;
54
end
bp_rs232_2l4l_iob
;
55
56
architecture
syn
of
bp_rs232_2l4l_iob
is
57
58
signal
RXD0
:
slbit
:=
'
0
'
;
59
signal
RXD1
:
slbit
:=
'
0
'
;
60
signal
CTS1_N
:
slbit
:=
'
0
'
;
61
62
signal
R_RXD
:
slbit
:=
'
1
'
;
63
signal
R_CTS_N
:
slbit
:=
'
0
'
;
64
signal
R_TXD0
:
slbit
:=
'
1
'
;
65
signal
R_TXD1
:
slbit
:=
'
1
'
;
66
signal
R_RTS1_N
:
slbit
:=
'
0
'
;
67
68
signal
RR_RXD0
:
slbit
:=
'
1
'
;
69
signal
RR_TXD0
:
slbit
:=
'
1
'
;
70
signal
RR_RXD1
:
slbit
:=
'
1
'
;
71
signal
RR_TXD1
:
slbit
:=
'
1
'
;
72
signal
RR_CTS1_N
:
slbit
:=
'
0
'
;
73
signal
RR_RTS1_N
:
slbit
:=
'
0
'
;
74
75
begin
76
77
-- On Digilent Atlys bords the IOBs for P0 and P1 are on diagonally opposide
78
-- corners of the die, which causes very long (7-8ns) routing delays to a LUT
79
-- in the middle. The RELAY generic allows to add 'relay flops' between IOB
80
-- flops and the mux implented in proc_regs_mux.
81
--
82
-- The data flow is
83
-- iob-flop relay-flop if-flop port
84
-- RXD0 -> RR_RXD0 -> R_RXD -> RXD
85
-- TXD0 <- RR_TXD0 <- R_TXD0 <- TXD
86
-- RXD1 -> RR_RXD1 -> R_RXD -> RXD
87
-- TXD1 <- RR_TXD1 <- R_TXD1 <- TXD
88
-- CTS1_N -> RR_CTS1_N -> R_CTS_N -> CTS
89
-- RTS1_N <- RR_RTS1_N <- R_RTS1_N <- RTS
90
91
P0 :
bp_rs232_2line_iob
92
port
map
(
93
CLK
=>
CLK
,
94
RXD
=>
RXD0
,
95
TXD
=>
RR_TXD0
,
96
I_RXD
=>
I_RXD0
,
97
O_TXD
=>
O_TXD0
98
)
;
99
100
P1 :
bp_rs232_4line_iob
101
port
map
(
102
CLK
=>
CLK
,
103
RXD
=>
RXD1
,
104
TXD
=>
RR_TXD1
,
105
CTS_N
=>
CTS1_N
,
106
RTS_N
=>
RR_RTS1_N
,
107
I_RXD
=>
I_RXD1
,
108
O_TXD
=>
O_TXD1
,
109
I_CTS_N
=>
I_CTS1_N
,
110
O_RTS_N
=>
O_RTS1_N
111
)
;
112
113
DORELAY
:
if
RELAY
generate
114
proc_regs_pipe:
process
(
CLK
)
115
begin
116
if
rising_edge
(
CLK
)
then
117
if
RESET
=
'
1
'
then
118
RR_RXD0
<=
'
1
'
;
119
RR_TXD0
<=
'
1
'
;
120
RR_RXD1
<=
'
1
'
;
121
RR_TXD1
<=
'
1
'
;
122
RR_CTS1_N
<=
'
0
'
;
123
RR_RTS1_N
<=
'
0
'
;
124
else
125
RR_RXD0
<=
RXD0
;
126
RR_TXD0
<=
R_TXD0
;
127
RR_RXD1
<=
RXD1
;
128
RR_TXD1
<=
R_TXD1
;
129
RR_CTS1_N
<=
CTS1_N
;
130
RR_RTS1_N
<=
R_RTS1_N
;
131
end
if
;
132
end
if
;
133
end
process
proc_regs_pipe
;
134
end
generate
DORELAY;
135
136
NORELAY
:
if
not
RELAY
generate
137
RR_RXD0
<=
RXD0
;
138
RR_TXD0
<=
R_TXD0
;
139
RR_RXD1
<=
RXD1
;
140
RR_TXD1
<=
R_TXD1
;
141
RR_CTS1_N
<=
CTS1_N
;
142
RR_RTS1_N
<=
R_RTS1_N
;
143
end
generate
NORELAY;
144
145
proc_regs_mux:
process
(
CLK
)
146
begin
147
148
if
rising_edge
(
CLK
)
then
149
if
RESET
=
'
1
'
then
150
R_RXD
<=
'
1
'
;
151
R_CTS_N
<=
'
0
'
;
152
R_TXD0
<=
'
1
'
;
153
R_TXD1
<=
'
1
'
;
154
R_RTS1_N
<=
'
0
'
;
155
else
156
if
SEL
=
'
0
'
then
-- use 2-line rs232, no flow cntl
157
R_RXD
<=
RR_RXD0
;
-- get port 0 inputs
158
R_CTS_N
<=
'
0
'
;
159
R_TXD0
<=
TXD
;
-- set port 0 output
160
R_TXD1
<=
'
1
'
;
-- port 1 outputs to idle state
161
R_RTS1_N
<=
'
0
'
;
162
else
-- otherwise use 4-line rs232
163
R_RXD
<=
RR_RXD1
;
-- get port 1 inputs
164
R_CTS_N
<=
RR_CTS1_N
;
165
R_TXD0
<=
'
1
'
;
-- port 0 output to idle state
166
R_TXD1
<=
TXD
;
-- set port 1 outputs
167
R_RTS1_N
<=
RTS_N
;
168
end
if
;
169
end
if
;
170
end
if
;
171
172
end
process
proc_regs_mux
;
173
174
RXD
<=
R_RXD
;
175
CTS_N
<=
R_CTS_N
;
176
177
end
syn;
bp_rs232_2l4l_iob.syn
Definition:
bp_rs232_2l4l_iob.vhd:56
bp_rs232_2l4l_iob.syn.R_RXD
slbit := '1' R_RXD
Definition:
bp_rs232_2l4l_iob.vhd:62
bp_rs232_2l4l_iob.syn.RR_TXD1
slbit := '1' RR_TXD1
Definition:
bp_rs232_2l4l_iob.vhd:71
bp_rs232_2l4l_iob.syn.RXD0
slbit := '0' RXD0
Definition:
bp_rs232_2l4l_iob.vhd:58
bp_rs232_2l4l_iob.syn.RXD1
slbit := '0' RXD1
Definition:
bp_rs232_2l4l_iob.vhd:59
bp_rs232_2l4l_iob.syn.RR_RTS1_N
slbit := '0' RR_RTS1_N
Definition:
bp_rs232_2l4l_iob.vhd:73
bp_rs232_2l4l_iob.syn.R_TXD1
slbit := '1' R_TXD1
Definition:
bp_rs232_2l4l_iob.vhd:65
bp_rs232_2l4l_iob.syn.RR_TXD0
slbit := '1' RR_TXD0
Definition:
bp_rs232_2l4l_iob.vhd:69
bp_rs232_2l4l_iob.syn.RR_CTS1_N
slbit := '0' RR_CTS1_N
Definition:
bp_rs232_2l4l_iob.vhd:72
bp_rs232_2l4l_iob.syn.R_RTS1_N
slbit := '0' R_RTS1_N
Definition:
bp_rs232_2l4l_iob.vhd:66
bp_rs232_2l4l_iob.syn.RR_RXD0
slbit := '1' RR_RXD0
Definition:
bp_rs232_2l4l_iob.vhd:68
bp_rs232_2l4l_iob.syn.CTS1_N
slbit := '0' CTS1_N
Definition:
bp_rs232_2l4l_iob.vhd:60
bp_rs232_2l4l_iob.syn.RR_RXD1
slbit := '1' RR_RXD1
Definition:
bp_rs232_2l4l_iob.vhd:70
bp_rs232_2l4l_iob.syn.R_TXD0
slbit := '1' R_TXD0
Definition:
bp_rs232_2l4l_iob.vhd:64
bp_rs232_2l4l_iob.syn.R_CTS_N
slbit := '0' R_CTS_N
Definition:
bp_rs232_2l4l_iob.vhd:63
bp_rs232_2l4l_iob
Definition:
bp_rs232_2l4l_iob.vhd:36
bp_rs232_2l4l_iob.RTS_N
in RTS_N slbit
Definition:
bp_rs232_2l4l_iob.vhd:46
bp_rs232_2l4l_iob.RELAY
RELAY boolean := false
Definition:
bp_rs232_2l4l_iob.vhd:38
bp_rs232_2l4l_iob.CTS_N
out CTS_N slbit
Definition:
bp_rs232_2l4l_iob.vhd:45
bp_rs232_2l4l_iob.I_RXD1
in I_RXD1 slbit
Definition:
bp_rs232_2l4l_iob.vhd:49
bp_rs232_2l4l_iob.TXD
in TXD slbit
Definition:
bp_rs232_2l4l_iob.vhd:44
bp_rs232_2l4l_iob.CLK
in CLK slbit
Definition:
bp_rs232_2l4l_iob.vhd:40
bp_rs232_2l4l_iob.O_TXD1
out O_TXD1 slbit
Definition:
bp_rs232_2l4l_iob.vhd:50
bp_rs232_2l4l_iob.O_RTS1_N
out O_RTS1_N slbit
Definition:
bp_rs232_2l4l_iob.vhd:53
bp_rs232_2l4l_iob.O_TXD0
out O_TXD0 slbit
Definition:
bp_rs232_2l4l_iob.vhd:48
bp_rs232_2l4l_iob.I_RXD0
in I_RXD0 slbit
Definition:
bp_rs232_2l4l_iob.vhd:47
bp_rs232_2l4l_iob.RXD
out RXD slbit
Definition:
bp_rs232_2l4l_iob.vhd:43
bp_rs232_2l4l_iob.RESET
in RESET slbit := '0'
Definition:
bp_rs232_2l4l_iob.vhd:41
bp_rs232_2l4l_iob.SEL
in SEL slbit
Definition:
bp_rs232_2l4l_iob.vhd:42
bp_rs232_2l4l_iob.I_CTS1_N
in I_CTS1_N slbit
Definition:
bp_rs232_2l4l_iob.vhd:51
bp_rs232_2line_iob
Definition:
bp_rs232_2line_iob.vhd:32
bp_rs232_2line_iob.O_TXD
out O_TXD slbit
Definition:
bp_rs232_2line_iob.vhd:39
bp_rs232_2line_iob.I_RXD
in I_RXD slbit
Definition:
bp_rs232_2line_iob.vhd:37
bp_rs232_2line_iob.TXD
in TXD slbit
Definition:
bp_rs232_2line_iob.vhd:36
bp_rs232_2line_iob.CLK
in CLK slbit
Definition:
bp_rs232_2line_iob.vhd:34
bp_rs232_2line_iob.RXD
out RXD slbit
Definition:
bp_rs232_2line_iob.vhd:35
bp_rs232_4line_iob
Definition:
bp_rs232_4line_iob.vhd:32
bp_rs232_4line_iob.RTS_N
in RTS_N slbit
Definition:
bp_rs232_4line_iob.vhd:38
bp_rs232_4line_iob.CTS_N
out CTS_N slbit
Definition:
bp_rs232_4line_iob.vhd:37
bp_rs232_4line_iob.O_TXD
out O_TXD slbit
Definition:
bp_rs232_4line_iob.vhd:40
bp_rs232_4line_iob.I_RXD
in I_RXD slbit
Definition:
bp_rs232_4line_iob.vhd:39
bp_rs232_4line_iob.TXD
in TXD slbit
Definition:
bp_rs232_4line_iob.vhd:36
bp_rs232_4line_iob.CLK
in CLK slbit
Definition:
bp_rs232_4line_iob.vhd:34
bp_rs232_4line_iob.I_CTS_N
in I_CTS_N slbit
Definition:
bp_rs232_4line_iob.vhd:41
bp_rs232_4line_iob.O_RTS_N
out O_RTS_N slbit
Definition:
bp_rs232_4line_iob.vhd:43
bp_rs232_4line_iob.RXD
out RXD slbit
Definition:
bp_rs232_4line_iob.vhd:35
bpgenlib
Definition:
bpgenlib.vhd:36
slvtypes
Definition:
slvtypes.vhd:28
slvtypes.slbit
std_logic slbit
Definition:
slvtypes.vhd:30
bplib
bpgen
bp_rs232_2l4l_iob.vhd
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