w11 - vhd 0.794
W11 CPU core and support modules
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Components | Constants | Functions | Instantiations | Signals
arch_example_top Architecture Reference
Architecture >> arch_example_top

Functions

integer   clogb2 ( size: in integer )
integer   STR_TO_INT ( BM: in string )
integer   XWIDTH
integer   clogb2 ( size: in integer )
integer   STR_TO_INT ( BM: in string )
integer   XWIDTH
integer   clogb2 ( size: in integer )
integer   STR_TO_INT ( BM: in string )
integer   XWIDTH
integer   clogb2 ( size: in integer )
integer   STR_TO_INT ( BM: in string )
integer   XWIDTH
integer   clogb2 ( size: in integer )
integer   STR_TO_INT ( BM: in string )
integer   XWIDTH

Components

migui_arty  <Entity migui_arty>
mig_7series_v4_2_traffic_gen_top 
migui_nexys4d  <Entity migui_nexys4d>

Constants

RANK_WIDTH  integer := clogb2 ( RANKS )
CMD_PIPE_PLUS1  string := " ON "
tPRDI  integer := 1000000
DATA_WIDTH  integer := 16
PAYLOAD_WIDTH  integer := DATA_WIDTH
BURST_LENGTH  integer := STR_TO_INT ( BURST_MODE )
APP_DATA_WIDTH  integer := 2 * nCK_PER_CLK * PAYLOAD_WIDTH
APP_MASK_WIDTH  integer := APP_DATA_WIDTH / 8
TG_ADDR_WIDTH  integer := XWIDTH+ 3 + ROW_WIDTH + COL_WIDTH
MASK_SIZE  integer := DATA_WIDTH / 8
TG_ADDR_WIDTH  integer := XWIDTH+ BANK_WIDTH + ROW_WIDTH + COL_WIDTH

Signals

app_ecc_multiple_err  std_logic_vector ( ( 2 * nCK_PER_CLK ) - 1 downto 0 )
app_ecc_single_err  std_logic_vector ( ( 2 * nCK_PER_CLK ) - 1 downto 0 )
app_addr  std_logic_vector ( ADDR_WIDTH - 1 downto 0 )
app_addr_i  std_logic_vector ( 31 downto 0 )
app_cmd  std_logic_vector ( 2 downto 0 )
app_en  std_logic
app_rdy  std_logic
app_rdy_i  std_logic
app_rd_data  std_logic_vector ( APP_DATA_WIDTH - 1 downto 0 )
app_rd_data_end  std_logic
app_rd_data_valid  std_logic
app_rd_data_valid_i  std_logic
app_wdf_data  std_logic_vector ( APP_DATA_WIDTH - 1 downto 0 )
app_wdf_end  std_logic
app_wdf_mask  std_logic_vector ( APP_MASK_WIDTH - 1 downto 0 )
app_wdf_rdy  std_logic
app_wdf_rdy_i  std_logic
app_sr_active  std_logic
app_ref_ack  std_logic
app_zq_ack  std_logic
app_wdf_wren  std_logic
error_status  std_logic_vector ( ( 64 + ( 4 * PAYLOAD_WIDTH * nCK_PER_CLK ) ) - 1 downto 0 )
cumlative_dq_lane_error  std_logic_vector ( ( PAYLOAD_WIDTH / 8 ) - 1 downto 0 )
mem_pattern_init_done  std_logic_vector ( 0 downto 0 )
modify_enable_sel  std_logic
data_mode_manual_sel  std_logic_vector ( 2 downto 0 )
addr_mode_manual_sel  std_logic_vector ( 2 downto 0 )
cmp_data  std_logic_vector ( ( PAYLOAD_WIDTH * 2 * nCK_PER_CLK ) - 1 downto 0 )
cmp_data_r  std_logic_vector ( 63 downto 0 )
cmp_data_valid  std_logic
cmp_data_valid_r  std_logic
cmp_error  std_logic
tg_wr_data_counts  std_logic_vector ( 47 downto 0 )
tg_rd_data_counts  std_logic_vector ( 47 downto 0 )
dq_error_bytelane_cmp  std_logic_vector ( ( PAYLOAD_WIDTH / 8 ) - 1 downto 0 )
init_calib_complete_i  std_logic
tg_compare_error_i  std_logic
tg_rst  std_logic
po_win_tg_rst  std_logic
manual_clear_error  std_logic_vector ( 0 downto 0 )
clk  std_logic
rst  std_logic
vio_modify_enable  std_logic_vector ( 0 downto 0 )
vio_data_mode_value  std_logic_vector ( 3 downto 0 )
vio_pause_traffic  std_logic_vector ( 0 downto 0 )
vio_addr_mode_value  std_logic_vector ( 2 downto 0 )
vio_instr_mode_value  std_logic_vector ( 3 downto 0 )
vio_bl_mode_value  std_logic_vector ( 1 downto 0 )
vio_fixed_bl_value  std_logic_vector ( BL_WIDTH - 1 downto 0 )
vio_fixed_instr_value  std_logic_vector ( 2 downto 0 )
vio_data_mask_gen  std_logic_vector ( 0 downto 0 )
dbg_clear_error  std_logic_vector ( 0 downto 0 )
vio_tg_rst  std_logic_vector ( 0 downto 0 )
dbg_sel_pi_incdec  std_logic_vector ( 0 downto 0 )
dbg_pi_f_inc  std_logic_vector ( 0 downto 0 )
dbg_pi_f_dec  std_logic_vector ( 0 downto 0 )
dbg_sel_po_incdec  std_logic_vector ( 0 downto 0 )
dbg_po_f_inc  std_logic_vector ( 0 downto 0 )
dbg_po_f_stg23_sel  std_logic_vector ( 0 downto 0 )
dbg_po_f_dec  std_logic_vector ( 0 downto 0 )
vio_dbg_sel_pi_incdec  std_logic_vector ( 0 downto 0 )
vio_dbg_pi_f_inc  std_logic_vector ( 0 downto 0 )
vio_dbg_pi_f_dec  std_logic_vector ( 0 downto 0 )
vio_dbg_sel_po_incdec  std_logic_vector ( 0 downto 0 )
vio_dbg_po_f_inc  std_logic_vector ( 0 downto 0 )
vio_dbg_po_f_stg23_sel  std_logic_vector ( 0 downto 0 )
vio_dbg_po_f_dec  std_logic_vector ( 0 downto 0 )
all_zeros1  std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
all_zeros2  std_logic_vector ( 38 downto 0 ) := ( others = > ' 0 ' )
wdt_en_w  std_logic_vector ( 0 downto 0 )
cmd_wdt_err_w  std_logic
wr_wdt_err_w  std_logic
rd_wdt_err_w  std_logic
device_temp  std_logic_vector ( 11 downto 0 )

Instantiations

u_migui_arty  migui_arty <Entity migui_arty>
u_traffic_gen_top  mig_7series_v4_2_traffic_gen_top
u_migui_arty  migui_arty <Entity migui_arty>
u_traffic_gen_top  mig_7series_v4_2_traffic_gen_top
u_migui_nexys4d  migui_nexys4d <Entity migui_nexys4d>
u_traffic_gen_top  mig_7series_v4_2_traffic_gen_top
u_migui_arty  migui_arty <Entity migui_arty>
u_traffic_gen_top  mig_7series_v4_2_traffic_gen_top
u_migui_nexys4d  migui_nexys4d <Entity migui_nexys4d>
u_traffic_gen_top  mig_7series_v4_2_traffic_gen_top

Detailed Description

Definition at line 223 of file example_top.vhd.

Member Function/Procedure/Process Documentation

◆ clogb2() [1/5]

integer clogb2 (   size in integer  
)
Function

Definition at line 227 of file example_top.vhd.

◆ STR_TO_INT() [1/5]

integer STR_TO_INT (   BM in string  
)
Function

Definition at line 237 of file example_top.vhd.

◆ XWIDTH() [1/5]

integer XWIDTH ( )
Function

Definition at line 250 of file example_top.vhd.

◆ clogb2() [2/5]

integer clogb2 (   size in integer  
)
Function

Definition at line 227 of file example_top.vhd.

◆ STR_TO_INT() [2/5]

integer STR_TO_INT (   BM in string  
)
Function

Definition at line 237 of file example_top.vhd.

◆ XWIDTH() [2/5]

integer XWIDTH ( )
Function

Definition at line 250 of file example_top.vhd.

◆ clogb2() [3/5]

integer clogb2 (   size in integer  
)
Function

Definition at line 236 of file example_top.vhd.

◆ STR_TO_INT() [3/5]

integer STR_TO_INT (   BM in string  
)
Function

Definition at line 246 of file example_top.vhd.

◆ XWIDTH() [3/5]

integer XWIDTH ( )
Function

Definition at line 259 of file example_top.vhd.

◆ clogb2() [4/5]

integer clogb2 (   size in integer  
)
Function

Definition at line 227 of file example_top.vhd.

◆ STR_TO_INT() [4/5]

integer STR_TO_INT (   BM in string  
)
Function

Definition at line 237 of file example_top.vhd.

◆ XWIDTH() [4/5]

integer XWIDTH ( )
Function

Definition at line 250 of file example_top.vhd.

◆ clogb2() [5/5]

integer clogb2 (   size in integer  
)
Function

Definition at line 236 of file example_top.vhd.

◆ STR_TO_INT() [5/5]

integer STR_TO_INT (   BM in string  
)
Function

Definition at line 246 of file example_top.vhd.

◆ XWIDTH() [5/5]

integer XWIDTH ( )
Function

Definition at line 259 of file example_top.vhd.

Member Data Documentation

◆ RANK_WIDTH

RANK_WIDTH integer := clogb2 ( RANKS )
Constant

Definition at line 248 of file example_top.vhd.

◆ CMD_PIPE_PLUS1

CMD_PIPE_PLUS1 string := " ON "
Constant

Definition at line 261 of file example_top.vhd.

◆ tPRDI

tPRDI integer := 1000000
Constant

Definition at line 265 of file example_top.vhd.

◆ DATA_WIDTH

DATA_WIDTH integer := 16
Constant

Definition at line 267 of file example_top.vhd.

◆ PAYLOAD_WIDTH

PAYLOAD_WIDTH integer := DATA_WIDTH
Constant

Definition at line 268 of file example_top.vhd.

◆ BURST_LENGTH

BURST_LENGTH integer := STR_TO_INT ( BURST_MODE )
Constant

Definition at line 269 of file example_top.vhd.

◆ APP_DATA_WIDTH

APP_DATA_WIDTH integer := 2 * nCK_PER_CLK * PAYLOAD_WIDTH
Constant

Definition at line 270 of file example_top.vhd.

◆ APP_MASK_WIDTH

APP_MASK_WIDTH integer := APP_DATA_WIDTH / 8
Constant

Definition at line 271 of file example_top.vhd.

◆ TG_ADDR_WIDTH [1/2]

TG_ADDR_WIDTH integer := XWIDTH+ 3 + ROW_WIDTH + COL_WIDTH
Constant

Definition at line 276 of file example_top.vhd.

◆ MASK_SIZE

MASK_SIZE integer := DATA_WIDTH / 8
Constant

Definition at line 277 of file example_top.vhd.

◆ migui_arty

migui_arty
Component

Definition at line 282 of file example_top.vhd.

◆ mig_7series_v4_2_traffic_gen_top

mig_7series_v4_2_traffic_gen_top
Component

Definition at line 335 of file example_top.vhd.

◆ app_ecc_multiple_err

app_ecc_multiple_err std_logic_vector ( ( 2 * nCK_PER_CLK ) - 1 downto 0 )
Signal

Definition at line 427 of file example_top.vhd.

◆ app_ecc_single_err

app_ecc_single_err std_logic_vector ( ( 2 * nCK_PER_CLK ) - 1 downto 0 )
Signal

Definition at line 428 of file example_top.vhd.

◆ app_addr

app_addr std_logic_vector ( ADDR_WIDTH - 1 downto 0 )
Signal

Definition at line 429 of file example_top.vhd.

◆ app_addr_i

app_addr_i std_logic_vector ( 31 downto 0 )
Signal

Definition at line 430 of file example_top.vhd.

◆ app_cmd

app_cmd std_logic_vector ( 2 downto 0 )
Signal

Definition at line 431 of file example_top.vhd.

◆ app_en

app_en std_logic
Signal

Definition at line 432 of file example_top.vhd.

◆ app_rdy

app_rdy std_logic
Signal

Definition at line 433 of file example_top.vhd.

◆ app_rdy_i

app_rdy_i std_logic
Signal

Definition at line 434 of file example_top.vhd.

◆ app_rd_data

app_rd_data std_logic_vector ( APP_DATA_WIDTH - 1 downto 0 )
Signal

Definition at line 435 of file example_top.vhd.

◆ app_rd_data_end

app_rd_data_end std_logic
Signal

Definition at line 436 of file example_top.vhd.

◆ app_rd_data_valid

app_rd_data_valid std_logic
Signal

Definition at line 437 of file example_top.vhd.

◆ app_rd_data_valid_i

app_rd_data_valid_i std_logic
Signal

Definition at line 438 of file example_top.vhd.

◆ app_wdf_data

app_wdf_data std_logic_vector ( APP_DATA_WIDTH - 1 downto 0 )
Signal

Definition at line 439 of file example_top.vhd.

◆ app_wdf_end

app_wdf_end std_logic
Signal

Definition at line 440 of file example_top.vhd.

◆ app_wdf_mask

app_wdf_mask std_logic_vector ( APP_MASK_WIDTH - 1 downto 0 )
Signal

Definition at line 441 of file example_top.vhd.

◆ app_wdf_rdy

app_wdf_rdy std_logic
Signal

Definition at line 442 of file example_top.vhd.

◆ app_wdf_rdy_i

app_wdf_rdy_i std_logic
Signal

Definition at line 443 of file example_top.vhd.

◆ app_sr_active

app_sr_active std_logic
Signal

Definition at line 444 of file example_top.vhd.

◆ app_ref_ack

app_ref_ack std_logic
Signal

Definition at line 445 of file example_top.vhd.

◆ app_zq_ack

app_zq_ack std_logic
Signal

Definition at line 446 of file example_top.vhd.

◆ app_wdf_wren

app_wdf_wren std_logic
Signal

Definition at line 447 of file example_top.vhd.

◆ error_status

error_status std_logic_vector ( ( 64 + ( 4 * PAYLOAD_WIDTH * nCK_PER_CLK ) ) - 1 downto 0 )
Signal

Definition at line 448 of file example_top.vhd.

◆ cumlative_dq_lane_error

cumlative_dq_lane_error std_logic_vector ( ( PAYLOAD_WIDTH / 8 ) - 1 downto 0 )
Signal

Definition at line 449 of file example_top.vhd.

◆ mem_pattern_init_done

mem_pattern_init_done std_logic_vector ( 0 downto 0 )
Signal

Definition at line 450 of file example_top.vhd.

◆ modify_enable_sel

modify_enable_sel std_logic
Signal

Definition at line 451 of file example_top.vhd.

◆ data_mode_manual_sel

data_mode_manual_sel std_logic_vector ( 2 downto 0 )
Signal

Definition at line 452 of file example_top.vhd.

◆ addr_mode_manual_sel

addr_mode_manual_sel std_logic_vector ( 2 downto 0 )
Signal

Definition at line 453 of file example_top.vhd.

◆ cmp_data

cmp_data std_logic_vector ( ( PAYLOAD_WIDTH * 2 * nCK_PER_CLK ) - 1 downto 0 )
Signal

Definition at line 454 of file example_top.vhd.

◆ cmp_data_r

cmp_data_r std_logic_vector ( 63 downto 0 )
Signal

Definition at line 455 of file example_top.vhd.

◆ cmp_data_valid

cmp_data_valid std_logic
Signal

Definition at line 456 of file example_top.vhd.

◆ cmp_data_valid_r

cmp_data_valid_r std_logic
Signal

Definition at line 457 of file example_top.vhd.

◆ cmp_error

cmp_error std_logic
Signal

Definition at line 458 of file example_top.vhd.

◆ tg_wr_data_counts

tg_wr_data_counts std_logic_vector ( 47 downto 0 )
Signal

Definition at line 459 of file example_top.vhd.

◆ tg_rd_data_counts

tg_rd_data_counts std_logic_vector ( 47 downto 0 )
Signal

Definition at line 460 of file example_top.vhd.

◆ dq_error_bytelane_cmp

dq_error_bytelane_cmp std_logic_vector ( ( PAYLOAD_WIDTH / 8 ) - 1 downto 0 )
Signal

Definition at line 461 of file example_top.vhd.

◆ init_calib_complete_i

init_calib_complete_i std_logic
Signal

Definition at line 462 of file example_top.vhd.

◆ tg_compare_error_i

tg_compare_error_i std_logic
Signal

Definition at line 463 of file example_top.vhd.

◆ tg_rst

tg_rst std_logic
Signal

Definition at line 464 of file example_top.vhd.

◆ po_win_tg_rst

po_win_tg_rst std_logic
Signal

Definition at line 465 of file example_top.vhd.

◆ manual_clear_error

manual_clear_error std_logic_vector ( 0 downto 0 )
Signal

Definition at line 466 of file example_top.vhd.

◆ clk

clk std_logic
Signal

Definition at line 468 of file example_top.vhd.

◆ rst

rst std_logic
Signal

Definition at line 469 of file example_top.vhd.

◆ vio_modify_enable

vio_modify_enable std_logic_vector ( 0 downto 0 )
Signal

Definition at line 471 of file example_top.vhd.

◆ vio_data_mode_value

vio_data_mode_value std_logic_vector ( 3 downto 0 )
Signal

Definition at line 472 of file example_top.vhd.

◆ vio_pause_traffic

vio_pause_traffic std_logic_vector ( 0 downto 0 )
Signal

Definition at line 473 of file example_top.vhd.

◆ vio_addr_mode_value

vio_addr_mode_value std_logic_vector ( 2 downto 0 )
Signal

Definition at line 474 of file example_top.vhd.

◆ vio_instr_mode_value

vio_instr_mode_value std_logic_vector ( 3 downto 0 )
Signal

Definition at line 475 of file example_top.vhd.

◆ vio_bl_mode_value

vio_bl_mode_value std_logic_vector ( 1 downto 0 )
Signal

Definition at line 476 of file example_top.vhd.

◆ vio_fixed_bl_value

vio_fixed_bl_value std_logic_vector ( BL_WIDTH - 1 downto 0 )
Signal

Definition at line 477 of file example_top.vhd.

◆ vio_fixed_instr_value

vio_fixed_instr_value std_logic_vector ( 2 downto 0 )
Signal

Definition at line 478 of file example_top.vhd.

◆ vio_data_mask_gen

vio_data_mask_gen std_logic_vector ( 0 downto 0 )
Signal

Definition at line 479 of file example_top.vhd.

◆ dbg_clear_error

dbg_clear_error std_logic_vector ( 0 downto 0 )
Signal

Definition at line 480 of file example_top.vhd.

◆ vio_tg_rst

vio_tg_rst std_logic_vector ( 0 downto 0 )
Signal

Definition at line 481 of file example_top.vhd.

◆ dbg_sel_pi_incdec

dbg_sel_pi_incdec std_logic_vector ( 0 downto 0 )
Signal

Definition at line 482 of file example_top.vhd.

◆ dbg_pi_f_inc

dbg_pi_f_inc std_logic_vector ( 0 downto 0 )
Signal

Definition at line 483 of file example_top.vhd.

◆ dbg_pi_f_dec

dbg_pi_f_dec std_logic_vector ( 0 downto 0 )
Signal

Definition at line 484 of file example_top.vhd.

◆ dbg_sel_po_incdec

dbg_sel_po_incdec std_logic_vector ( 0 downto 0 )
Signal

Definition at line 485 of file example_top.vhd.

◆ dbg_po_f_inc

dbg_po_f_inc std_logic_vector ( 0 downto 0 )
Signal

Definition at line 486 of file example_top.vhd.

◆ dbg_po_f_stg23_sel

dbg_po_f_stg23_sel std_logic_vector ( 0 downto 0 )
Signal

Definition at line 487 of file example_top.vhd.

◆ dbg_po_f_dec

dbg_po_f_dec std_logic_vector ( 0 downto 0 )
Signal

Definition at line 488 of file example_top.vhd.

◆ vio_dbg_sel_pi_incdec

vio_dbg_sel_pi_incdec std_logic_vector ( 0 downto 0 )
Signal

Definition at line 489 of file example_top.vhd.

◆ vio_dbg_pi_f_inc

vio_dbg_pi_f_inc std_logic_vector ( 0 downto 0 )
Signal

Definition at line 490 of file example_top.vhd.

◆ vio_dbg_pi_f_dec

vio_dbg_pi_f_dec std_logic_vector ( 0 downto 0 )
Signal

Definition at line 491 of file example_top.vhd.

◆ vio_dbg_sel_po_incdec

vio_dbg_sel_po_incdec std_logic_vector ( 0 downto 0 )
Signal

Definition at line 492 of file example_top.vhd.

◆ vio_dbg_po_f_inc

vio_dbg_po_f_inc std_logic_vector ( 0 downto 0 )
Signal

Definition at line 493 of file example_top.vhd.

◆ vio_dbg_po_f_stg23_sel

vio_dbg_po_f_stg23_sel std_logic_vector ( 0 downto 0 )
Signal

Definition at line 494 of file example_top.vhd.

◆ vio_dbg_po_f_dec

vio_dbg_po_f_dec std_logic_vector ( 0 downto 0 )
Signal

Definition at line 495 of file example_top.vhd.

◆ all_zeros1

all_zeros1 std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 496 of file example_top.vhd.

◆ all_zeros2

all_zeros2 std_logic_vector ( 38 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 497 of file example_top.vhd.

◆ wdt_en_w

wdt_en_w std_logic_vector ( 0 downto 0 )
Signal

Definition at line 498 of file example_top.vhd.

◆ cmd_wdt_err_w

cmd_wdt_err_w std_logic
Signal

Definition at line 499 of file example_top.vhd.

◆ wr_wdt_err_w

wr_wdt_err_w std_logic
Signal

Definition at line 500 of file example_top.vhd.

◆ rd_wdt_err_w

rd_wdt_err_w std_logic
Signal

Definition at line 501 of file example_top.vhd.

◆ device_temp

device_temp std_logic_vector ( 11 downto 0 )
Signal

Definition at line 502 of file example_top.vhd.

◆ TG_ADDR_WIDTH [2/2]

TG_ADDR_WIDTH integer := XWIDTH+ BANK_WIDTH + ROW_WIDTH + COL_WIDTH
Constant

Definition at line 283 of file example_top.vhd.

◆ migui_nexys4d

migui_nexys4d
Component

Definition at line 289 of file example_top.vhd.

◆ u_migui_arty [1/3]

u_migui_arty migui_arty
Instantiation

Definition at line 581 of file example_top.vhd.

◆ u_traffic_gen_top [1/5]

u_traffic_gen_top mig_7series_v4_2_traffic_gen_top
Instantiation

Definition at line 675 of file example_top.vhd.

◆ u_migui_arty [2/3]

u_migui_arty migui_arty
Instantiation

Definition at line 581 of file example_top.vhd.

◆ u_traffic_gen_top [2/5]

u_traffic_gen_top mig_7series_v4_2_traffic_gen_top
Instantiation

Definition at line 675 of file example_top.vhd.

◆ u_migui_nexys4d [1/2]

u_migui_nexys4d migui_nexys4d
Instantiation

Definition at line 605 of file example_top.vhd.

◆ u_traffic_gen_top [3/5]

u_traffic_gen_top mig_7series_v4_2_traffic_gen_top
Instantiation

Definition at line 698 of file example_top.vhd.

◆ u_migui_arty [3/3]

u_migui_arty migui_arty
Instantiation

Definition at line 581 of file example_top.vhd.

◆ u_traffic_gen_top [4/5]

u_traffic_gen_top mig_7series_v4_2_traffic_gen_top
Instantiation

Definition at line 675 of file example_top.vhd.

◆ u_migui_nexys4d [2/2]

u_migui_nexys4d migui_nexys4d
Instantiation

Definition at line 605 of file example_top.vhd.

◆ u_traffic_gen_top [5/5]

u_traffic_gen_top mig_7series_v4_2_traffic_gen_top
Instantiation

Definition at line 698 of file example_top.vhd.

The documentation for this design unit was generated from the following files: