53use ieee.std_logic_1164.
all;
54use ieee.numeric_std.
all;
95 signal VM_CNTL : vm_cntl_type := vm_cntl_init;
96 signal VM_STAT : vm_stat_type := vm_stat_init;
97 signal MMU_MONI : mmu_moni_type := mmu_moni_init;
98 signal DP_CNTL : dpath_cntl_type := dpath_cntl_init;
99 signal DP_STAT : dpath_stat_type := dpath_stat_init;
105 signal ID_STAT : decode_stat_type := decode_stat_init;
116 signal IB_MREQ : ib_mreq_type := ib_mreq_init;
117 signal IB_SRES : ib_sres_type := ib_sres_init;
in IB_SRES_2 ib_sres_type := ib_sres_init
in IB_SRES_3 ib_sres_type := ib_sres_init
out IB_SRES_OR ib_sres_type
in IB_SRES_4 ib_sres_type := ib_sres_init
in IB_SRES_1 ib_sres_type
ib_mreq_type := ib_mreq_init IB_MREQ
dpath_stat_type := dpath_stat_init DP_STAT
vm_cntl_type := vm_cntl_init VM_CNTL
slv16 :=( others => '0') VM_DOUT
slv16 :=( others => '0') VM_DIN
cp_stat_type := cp_stat_init CP_STAT_L
mmu_moni_type := mmu_moni_init MMU_MONI
vm_stat_type := vm_stat_init VM_STAT
ib_sres_type := ib_sres_init IB_SRES_DP
decode_stat_type := decode_stat_init ID_STAT
slv16 :=( others => '0') VM_ADDR
ib_sres_type := ib_sres_init IB_SRES_IRQ
psw_type := psw_init DP_PSW
ib_sres_type := ib_sres_init IB_SRES
slv9_2 :=( others => '0') INT_VECT
ib_sres_type := ib_sres_init IB_SRES_SEQ
slv16 :=( others => '0') DP_IREG
slv3 :=( others => '0') INT_PRI
dpath_cntl_type := dpath_cntl_init DP_CNTL
ib_sres_type := ib_sres_init IB_SRES_SYS
in IB_SRES_M ib_sres_type
out DM_STAT_DP dm_stat_dp_type
out DM_STAT_CO dm_stat_co_type
out IB_MREQ_M ib_mreq_type
out DM_STAT_VM dm_stat_vm_type
out DM_STAT_SE dm_stat_se_type
out STAT decode_stat_type
out DM_STAT_DP dm_stat_dp_type
in ID_STAT decode_stat_type
out DP_CNTL dpath_cntl_type
out MMU_MONI mmu_moni_type
out DM_STAT_SE dm_stat_se_type
in DP_STAT dpath_stat_type
in MMU_MONI mmu_moni_type
in IB_SRES_EXT ib_sres_type
out IB_MREQ_M ib_mreq_type
out DM_STAT_VM dm_stat_vm_type
in IB_SRES_CPU ib_sres_type
std_logic_vector( 2 downto 0) slv3
std_logic_vector( 8 downto 2) slv9_2
std_logic_vector( 15 downto 0) slv16