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W11 CPU core and support modules
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pdp11_dmhbpt.vhd
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1-- $Id: pdp11_dmhbpt.vhd 1203 2019-08-19 21:41:03Z mueller $
2-- SPDX-License-Identifier: GPL-3.0-or-later
3-- Copyright 2015-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
4--
5------------------------------------------------------------------------------
6-- Module Name: pdp11_dmhbpt - syn
7-- Description: pdp11: debug&moni: hardware breakpoint
8--
9-- Dependencies: pdp11_dmhbpt_unit
10-- rbus/rb_sres_or_4
11-- Test bench: -
12--
13-- Target Devices: generic
14-- Tool versions: ise 14.7; viv 2014.4-2019.1; ghdl 0.31-0.36
15--
16-- Synthesized (xst):
17-- Date Rev ise Target flop lutl lutm slic t peri
18-- 2015-07-12 700 14.7 131013 xc6slx16-2 78 133 0 42 s 3.8 (N=2)
19--
20-- Revision History: -
21-- Date Rev Version Comment
22-- 2019-08-17 1203 1.0.2 fix for ghdl V0.36 -Whide warnings
23-- 2019-06-02 1159 1.0.1 use rbaddr_ constants
24-- 2015-07-19 702 1.0 Initial version
25-- 2015-07-05 698 0.1 First draft
26------------------------------------------------------------------------------
27
28library ieee;
29use ieee.std_logic_1164.all;
30use ieee.numeric_std.all;
31
32use work.slvtypes.all;
33use work.rblib.all;
34use work.pdp11.all;
35
36-- ----------------------------------------------------------------------------
37
38entity pdp11_dmhbpt is -- debug&moni: hardware breakpoint
39 generic (
40 RB_ADDR : slv16 := rbaddr_dmhbpt_off;
41 NUNIT : natural := 2);
42 port (
43 CLK : in slbit; -- clock
44 RESET : in slbit; -- reset
45 RB_MREQ : in rb_mreq_type; -- rbus: request
46 RB_SRES : out rb_sres_type; -- rbus: response
47 DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer
48 DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - data path
49 DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox
50 DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core
51 HBPT : out slbit -- hw break flag
52 );
53end pdp11_dmhbpt;
54
55
56architecture syn of pdp11_dmhbpt is
57
58 type sres_array_type is array (3 downto 0) of rb_sres_type;
59 signal SRES_ARRAY : sres_array_type:= (others=>rb_sres_init);
60 signal HBPT_SUM : slv(NUNIT-1 downto 0) := (others=>'0');
61 constant hbptzero : slv(HBPT_SUM'range) := (others=>'0');
62
63 begin
64
65 assert NUNIT>=1 and NUNIT<=4
66 report "assert(NUNIT>=1 and NUNIT<=4): unsupported NUNIT"
67 severity failure;
68
69 GU: for i in NUNIT-1 downto 0 generate
71 generic map (
73 INDEX => i)
74 port map (
75 CLK => CLK,
76 RESET => RESET,
78 RB_SRES => SRES_ARRAY(i),
83 HBPT => HBPT_SUM(i)
84 );
85 end generate GU;
86
87 GD: for i in 3 downto NUNIT generate
88 SRES_ARRAY(i) <= rb_sres_init;
89 end generate GD;
90
91 RB_SRES_OR : rb_sres_or_4
92 port map (
98 );
99
100 HBPT <= '1' when HBPT_SUM /= hbptzero else '0';
101
102end syn;
slv(HBPT_SUM) :=( others => '0') hbptzero
( 3 downto 0) rb_sres_type sres_array_type
slv( NUNIT- 1 downto 0) :=( others => '0') HBPT_SUM
sres_array_type :=( others => rb_sres_init) SRES_ARRAY
in DM_STAT_DP dm_stat_dp_type
in DM_STAT_CO dm_stat_co_type
in DM_STAT_SE dm_stat_se_type
RB_ADDR slv16 := rbaddr_dmhbpt_off
in RB_MREQ rb_mreq_type
in DM_STAT_VM dm_stat_vm_type
out RB_SRES rb_sres_type
in RESET slbit
in DM_STAT_DP dm_stat_dp_type
in DM_STAT_CO dm_stat_co_type
in DM_STAT_SE dm_stat_se_type
in CLK slbit
RB_ADDR slv16 := rbaddr_dmhbpt_off
in RB_MREQ rb_mreq_type
in DM_STAT_VM dm_stat_vm_type
out HBPT slbit
out RB_SRES rb_sres_type
NUNIT natural := 2
Definition: pdp11.vhd:123
in RB_SRES_2 rb_sres_type := rb_sres_init
in RB_SRES_3 rb_sres_type := rb_sres_init
out RB_SRES_OR rb_sres_type
in RB_SRES_1 rb_sres_type
in RB_SRES_4 rb_sres_type := rb_sres_init
Definition: rblib.vhd:32
std_logic_vector( 15 downto 0) slv16
Definition: slvtypes.vhd:48
std_logic slbit
Definition: slvtypes.vhd:30
std_logic_vector slv
Definition: slvtypes.vhd:31