25use ieee.std_logic_1164.
all;
26use ieee.numeric_std.
all;
68 DI => IB_MREQ.din
(5 downto 0),
79 DI => IB_MREQ.din
(15 downto 8),
90 DI => IB_MREQ.din
(7 downto 1),
104 variable ibusy : slbit := '0';
105 variable idout : slv16 := (others=>'0');
106 variable iwe2 : slbit := '0';
107 variable iwe1 : slbit := '0';
108 variable iwe0 : slbit := '0';
109 variable iaddr : slv5 := (others=>'0');
113 idout := (others=>'0');
117 iaddr := (others=>'0');
121 idout(5 downto 0) := MAP_DOUT(21 downto 16);
123 idout(15 downto 1) := MAP_DOUT(15 downto 1);
146 iaddr := ADDR_UB(17 downto 13);
148 iaddr := IB_MREQ.addr(6 downto 2);
157 unsigned("000000000"&ADDR_UB(12 downto 1)));
163 end process proc_comb;
slv22_1 :=( others => '0') MAP_DOUT
slv16 := slv( to_unsigned( 8#170200#, 16) ) ibaddr_ubmap
slv5 :=( others => '0') MAP_ADDR
std_logic_vector( 21 downto 1) slv22_1
std_logic_vector( 4 downto 0) slv5
std_logic_vector( 15 downto 0) slv16
std_logic_vector( 17 downto 1) slv18_1