19use ieee.std_logic_1164.
all;
20use ieee.numeric_std.
all;
27subtype bv is bit_vector;
28subtype bv16 is bit_vector(15 downto 0);
103pure function xadc_temp2alim(temp : real) return bv16;
104pure function xadc_svolt2alim (volt : real) return bv16;
189pure function xadc_temp2alim(temp : real) return bv16 is
190 variable ival : natural := 0;
192 ival := natural(((temp + 273.
14) * 16.
0 * 4096.
0) / 503.
975);
193 return to_bitvector(slv(to_unsigned(ival,16)));
194end function xadc_temp2alim;
197pure function xadc_svolt2alim (volt : real) return bv16 is
198 variable ival : natural := 0;
200 ival := natural((volt * 16.
0 * 4096.
0) / 3.
0);
201 return to_bitvector(slv(to_unsigned(ival,16)));
202end function xadc_svolt2alim;
std_logic_vector( 3 downto 0) slv4
std_logic_vector( 11 downto 0) slv12
std_logic_vector( 15 downto 0) slv16
std_logic_vector( 7 downto 0) slv8
out SM_DADDR slv( DAWIDTH- 1 downto 0)
in SM_ALM slv( ALWIDTH- 1 downto 0)
out TEMP slv( TEWIDTH- 1 downto 0)
bv16 := x"0800" xadc_conf0_mux
bv16 := x"0800" xadc_conf1_dis_alm6
bv16 := x"0080" xadc_conf1_cal3_supog
bv16 := x"0400" xadc_conf1_dis_alm5
bv16 := x"0200" xadc_conf1_dis_alm4
bv16 := x"0001" xadc_conf1_dis_ot
bv16 := x"0004" xadc_conf1_dis_alm1
integer := 11 xadc_select_vpvn
bv16 := x"0008" xadc_conf1_dis_alm2
bv16 := x"2000" xadc_conf1_seq_cont
bv16 :=( others => '0') xadc_init_4a_default
bv16 := x"0100" xadc_conf0_acq
integer := 12 xadc_select_vrefp
bv16 := x"0010" xadc_conf1_cal0_adco
bv16 := x"3000" xadc_conf1_seq_schan
bv16 := x"0020" xadc_conf1_cal1_adcog
bv16 := x"0400" xadc_conf0_bu
integer := 0 xadc_select_calib
bv16 := x"ca33" xadc_init_53_default
integer := 6 xadc_select_vccpaux
bv16 := xadc_conf0_cavgor xadc_conf0_avg_16 xadc_init_40_default
bv16 := x"ae40" xadc_init_57_default
bv16 := x"2000" xadc_conf0_avg_64
integer := 7 xadc_select_vccoddr
integer := 14 xadc_select_vccbram
integer := 13 xadc_select_vrefn
bv16 := x"0000" xadc_conf0_avg_off
integer := 5 xadc_select_vccpint
bv16 :=( xadc_select_vccbram=> '1', xadc_select_vccaux=> '1', xadc_select_vccint=> '1', xadc_select_temp=> '1', xadc_select_calib=> '1', others => '0') xadc_init_48_default
integer := 8 xadc_select_temp
integer := 9 xadc_select_vccint
bv16 := x"1000" xadc_conf0_avg_16
bit_vector( 15 downto 0) bv16
bv16 := x"0100" xadc_conf1_dis_alm3
bv16 := xadc_conf1_seq_contor xadc_conf1_dis_alm6or xadc_conf1_dis_alm5or xadc_conf1_dis_alm4or xadc_conf1_cal3_supogor xadc_conf1_cal2_supoor xadc_conf1_cal1_adcogor xadc_conf1_cal0_adco xadc_init_41_default
bv16 := x"1000" xadc_conf1_seq_spass
integer := 10 xadc_select_vccaux
bv16 := x"0040" xadc_conf1_cal2_supo
bv16 := x"3000" xadc_conf0_avg_256
bv16 := x"0000" xadc_conf1_seq_default
bv16 := x"8000" xadc_conf0_cavg
bv16 := x"0002" xadc_conf1_dis_alm0
bv16 := x"0200" xadc_conf0_ec
in VPWRP slv4 :=( others => '0')
INIT_VCCAUX_UP real := 1.89
INIT_TEMP_LOW real := 60.0
INIT_TEMP_UP real := 85.0
INIT_VCCINT_LOW real := 0.92
INIT_VCCBRAM_LOW real := 0.92
in VPWRN slv4 :=( others => '0')
INIT_VCCAUX_LOW real := 1.71
INIT_VCCINT_UP real := 0.98
INIT_VCCBRAM_UP real := 0.98
INIT_VCCINT_LOW real := 0.95
INIT_VCCAUX_UP real := 1.89
INIT_VCCBRAM_LOW real := 0.95
INIT_TEMP_LOW real := 60.0
INIT_VCCBRAM_UP real := 1.05
INIT_TEMP_UP real := 85.0
INIT_VCCINT_UP real := 1.05
INIT_VCCAUX_LOW real := 1.71