181use ieee.std_logic_1164.
all;
182use ieee.numeric_std.
all;
252 signal RB_MREQ : rb_mreq_type := rb_mreq_init;
253 signal RB_SRES : rb_sres_type := rb_sres_init;
261 signal SER_MONI : serport_moni_type := serport_moni_init;
262 signal FX2_MONI : fx2ctl_moni_type := fx2ctl_moni_init;
281 signal CP_STAT : cp_stat_type := cp_stat_init;
297 signal IB_MREQ : ib_mreq_type := ib_mreq_init;
312 assert (sys_conf_clksys mod 1000000) = 0
313 report "assert sys_conf_clksys on MHz grid"
316 DCM :
dcm_sfs -- clock generator -------------------
318 CLKFX_DIVIDE => sys_conf_clkfx_divide,
319 CLKFX_MULTIPLY => sys_conf_clkfx_multiply,
320 CLKIN_PERIOD =>
20.0)
327 CLKDIV :
clkdivce -- usec/msec clock divider -----------
330 USECDIV => sys_conf_clksys_mhz,
359 SYSID => sysid_proj & sysid_board & sysid_vers ,
362 PETOWIDTH => sys_conf_fx2_petowidth,
363 CCWIDTH => sys_conf_fx2_ccwidth,
364 ENAPIN_RLMON => sbcntl_sbf_rlmon,
365 ENAPIN_RBMON => sbcntl_sbf_rbmon,
367 CDINIT => sys_conf_ser2rri_cdinit,
368 RBMON_AWIDTH => sys_conf_rbmon_awidth,
409 SYS70 :
pdp11_sys70 --
1 cpu system ----------------------
438 IBDR_SYS :
ibdr_maxisys -- IO system -------------------------
445 ITIMER => DM_STAT_EXP.se_itimer,
446 IDEC => DM_STAT_EXP.se_idec,
447 CPUSUSP => CP_STAT.cpususp,
448 RB_LAM =>
RB_LAM(15 downto 1),
461 READ0DELAY => sys_conf_memctl_read0delay,
462 READ1DELAY => sys_conf_memctl_read1delay,
463 WRITEDELAY => sys_conf_memctl_writedelay
)
508 LWIDTH => LED'length,
512 SEL_DSP =>
SWI(5 downto 4),
524 variable iled : slv8 := (others=>'0');
527 iled := (others=>'0');
537 iled(2) := FX2_MONI.flag_ep4_almost;
539 iled(0) := FX2_MONI.flag_ep6_almost;
549 end process proc_fx2leds;
553 DEBOUNCE => sys_conf_hio_debounce,
573 RB_SRES_OR :
rb_sres_or_2 -- rbus
or ---------------------------
std_logic_vector( 22 downto 0) slv23
std_logic_vector( 19 downto 0) slv20
std_logic_vector( 3 downto 0) slv4
std_logic_vector( 2 downto 0) slv3
std_logic_vector( 8 downto 2) slv9_2
std_logic_vector( 31 downto 0) slv32
std_logic_vector( 15 downto 0) slv16
std_logic_vector( 21 downto 0) slv22
std_logic_vector( 7 downto 0) slv8
std_logic_vector( 1 downto 0) slv2
slv8 :=( others => '0') LED70
slv9_2 :=( others => '0') EI_VECT
slv16 :=( others => '0') DSP_DAT
slv8 :=( others => '0') PERFEXT
slv8 :=( others => '0') LED
slv16 := x"ffe8" rbaddr_rbmon
slv16 := x"fef0" rbaddr_hio
slv16 :=( others => '0') DISPREG
fx2ctl_moni_type := fx2ctl_moni_init FX2_MONI
ib_mreq_type := ib_mreq_init IB_MREQ
slv3 :=( others => '0') EI_PRI
slv4 :=( others => '0') RB_STAT
slv8 :=( others => '0') SWI
slv32 :=( others => '0') MEM_DI
rb_mreq_type := rb_mreq_init RB_MREQ
serport_moni_type := serport_moni_init SER_MONI
slv16 :=( others => '0') ABCLKDIV
slv32 :=( others => '0') MEM_DO
rlink_sp1c_fx2 rlinkrlink
rb_sres_type := rb_sres_init RB_SRES
slv4 :=( others => '0') DSP_DP
cp_stat_type := cp_stat_init CP_STAT
rb_sres_type := rb_sres_init RB_SRES_CPU
slv16 := x"0201" sysid_proj
slv4 :=( others => '0') BTN
slv22 :=( others => '0') MEM_ADDR_EXT
ib_sres_type := ib_sres_init IB_SRES_IBDR
slv16 :=( others => '0') RB_LAM
rb_sres_type := rb_sres_init RB_SRES_HIO
slv4 :=( others => '0') MEM_BE
dm_stat_exp_type := dm_stat_exp_init DM_STAT_EXP
slv8 := x"02" sysid_board
rlb_moni_type := rlb_moni_init RLB_MONI
slv20 :=( others => '0') MEM_ADDR